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1. 8 825 1L JPWAKE FAN 1 FANE J30 KB FAN3 1 MOUSE JP12 1 m JOH J32 J33 USB o PORTS a J18 x lt e lt 3 x 8 E 2 N ui a o 8 E o SS E Eu EIE E a a N lt ER o O Las MCH LINE MEMORY P our TRANSLATOR E HUB a LINE 2 N u i CD o MIC CD 1 i 1 J19 AGP PORT IDE LED KEYLOCK SPEAKER mono wee JE P 71 1 J TT IR CON PW ON RESET AMR ICH 1 FLOPPY J26 1 AC 97 PCI CODEC Chip 1 PCI2 JBT1 1 woL lt o 1 o PCI3 BIOS x i BATTERY e 4 Mb e El PCI4 FWH mi E U Au a 1 5 PCI5 o Figure 1 5 SUPER PIIISCA Motherboard Layout 11 6 Chapter 1 Introduction Jumpers Quick Reference Description Default Setting JBT1 JL1 JP12 JP28 JPWAKE Connectors AMR CD CD_1 COM1 COM2 FAN FAN2 FAN3 GAME PORT J18 J19 J29 J30 J32 J33 J35 JF1 JF2 JOH JP26 LINE IN LINE OUT MIC IN WOL Also see the figures on page 2 6 for the locations of the I O ports CMOS Clear p 2 12 Pin 1 2 Normal Chassis Intrusion p 2 10 OFF Disabled Front Side Bus Speed p 2 11 Pin 1 2 Auto AC 97 Enable Disable p 2 12 Pin 1 2 Enabled Keyboard Wake Up p 2 12 Pin 1 2 Disabled Description Audio Modem Riser p 2 15 Audio CD Input large connector p 2 10 Audio CD Input small connector p 2 10 COM1
2. Two connectors for the COM1 c fe o E S 7 Pin Number Definition Pin Number Definition and COM2 serial ports are 1 DCD 6 CTS 2 DSR 7 DTR located just below the parallel 3 Serialln 8 RI i 4 RTS 9 Ground port see Figure 2 3 See Table 5 Senator do N 2 10 for pin definitions Wake On LAN Table 2 11 Wake On LAN Pi The Wake On LAN header is des Gorete WOL ignated as WOL Refer to Table 2 m 11 for pin definitions You must Number Definition enable the LAN Wake Up setting in AER BIOS to use this feature p 4 14 3 Wake up You must also have a LAN card with a Wake on LAN connector and cable Fan Headers Table 2 12 Fan Header Pin Definitions The thermal control fan header is lo JAMI PANS FANS cated on FAN3 The CPU and chas o S sis fan headers are located on FAN1 3 en ted and FANe respectively Refer to 3 Tachometer Table 2 12 for pin definitions Caution These fan headers are DC power 2 9 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual CD Headers Table 2 13 g Audio CD Header Pin Definitions There are two CD headers of dif CD CD_1 ferent sizes on the motherboard to Pin Number Definition enable audio CD playback Con 1 Right Stereo Signal nect an audio cable from your CD aroung roun player to whichever header fits 4 Left Stereo Signal your cable s connector Refer to Table 2 13 fo
3. E Ke Question After flashing the BIOS my system does not have video How can 1 correct this Answer lf the system does not have video after flashing your new BIOS it indicates that the flashing procedure failed To remedy this first clear CMOS per the instructions in this manual and retry the BIOS flashing procedure If you still do not have video please use the following BIOS Recovery Procedure First make sure the JPWAKE jumper is disabled Then turn your system off and place the floppy disk with the saved BIOS image file see above FAQ in drive A Press and hold lt CTRL gt and Home at the same time then turn on the power with these keys pressed until your floppy drive starts reading Your screen will remain blank until the BIOS program is done If the system reboots correctly then the recovery was successful The BIOS Recovery Procedure will not update the boot block in your BIOS Question Do need the CD that came with your motherboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications included on the CD 84 Chapter 3 Troubleshooting are 820 chipset drivers for Windows9x audio drivers and Super Doctor Monitoring software Question Why can t turn off the power using the momentary power on off switch Answer The instant power off function is contro
4. Question How do update my BIOS Answer It is recommended that you do not upgrade your BIOS if you are experiencing no problems with your system Updated BIOS files are located on our web site at http www supermicro com Please check our BIOS warning message and the info on how to update your BIOS on our web site Also check the current BIOS revision and make sure it is newer than your BIOS before downloading Select your motherboard model and down load the BIOS file to your computer Unzip the BIOS update file and you will find the readme txt flash instructions the fwhflash com BIOS flash utility and the BIOS image xxxxxx rom files Copy these files onto a bootable floppy and reboot your system It is not necessary to set BIOS boot block protection jumpers on the motherboard At the DOS prompt enter the com mand fwhflash This will start the flash utility and give you an opportunity to save your current BIOS image Flash the boot block and enter the name of the update BIOS image file Note t is important to save your current BIOS and rename it super rom in case you need to recover from a failed BIOS update Select flash boot block then enter the update BIOS image Select Y to start the BIOS flash procedure and do not disturb your system until the flash utility displays that the procedure is complete After updating your BIOS please clear the CMOS then load Optimal Values in the BIOS 4 E E oD 2 7 o o
5. 49 4B Description Initializing the bus input IPL and general devices next if present Displaying bus initialization error messages The new cursor position has been read and saved Displaying the Hit lt DEL gt message next Preparing the descriptor tables next The descriptor tables are prepared Entering protected mode for the memory test next Entered protected mode Enabling interrupts for diagnostics mode next Interrupts enabled if the diagnostics switch is on Initializing data to check memory wraparound at 0 0 next Data initialized Checking for memory wraparound at 0 0 and finding the total system memory size next The memory wraparound test has completed The memory size calculation has been completed Writing patterns to test memory next The memory pattern has been written to extended memory Writing patterns to the base 640 KB memory next Patterns written in base memory Determining the amount of memory below 1 MB next The amount of memory below 1 MB has been found and verified Determining the amount of memory above 1 MB memory next The amount of memory above 1 MB has been found and verified Checking for a soft reset and clearing the memory below 1 MB for the soft reset next If this is a power on situation going to checkpoint 4Eh next B4 Appendix B AMIBIOS POST Diagnostic Error Messages Check Point 4C 4D 4E 4F 50 51 52 57 59 Description T
6. DMA 2 Error Error in the second DMA channel FDD Controller Failure The BIOS cannot communicate with the floppy disk drive controller Check all appropriate connections after the computer is lt x lt D Pa Li a a lt powered down HDD Controller Failure The BIOS cannot communicate with the hard disk drive controller Check all appropriate connections after the computer is powered down INTR 1 Error Interrupt channel 1 failed POST INTR 2 Error Interrupt channel 2 failed POST A 5 BIOS Manual Error Message Information Invalid Boot Diskette The BIOS can read the disk in floppy drive A but cannot boot the computer Use another boot disk Keyboard Is Locked The keyboard lock on the computer is Unlock It engaged The computer must be unlocked to continue Keyboard Error There is a timing problem with the keyboard Set the Keyboard options in Standard Setup to Not Installed to skip the keyboard post routines KB Interface Error There is an error in the keyboard connector No ROM BASIC Cannot find a bootable sector on either disk drive A or hard disk drive C The BIOS calls INT 18h which generates this message Use a bootable disk Off Board Parity error in memory installed in an Parity Error expansion slot The format is OFF BOARD PARITY ERROR ADDR HEX XXXX XXXX is the hex address where the error occurred Run AMIDiag to find and correct memory pr
7. IDE Hard Disk Drive Connectors p 2 14 ATX Power Connector p 2 7 PS 2 Keyboard lower Mouse upper p 2 8 Universal Serial Bus Ports p 2 9 Parallel Printer Port p 2 14 Front Control Panel p 2 6 Overheat LED Header p 2 10 Floppy Disk Drive Connector p 2 14 Audio In Connector Audio Out Speaker Connector Microphone Input Wake on LAN Header p 2 9 and Front Control Panel connectors c S o 3 9 o bal SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual uononponuj Pentium III II 400 300 MHz Rambus CPU Pentium RIMM Slots Ill FCPGA DIMM Slots 133 100 MHz Host Bus 133 66 MHz Bus I 100 MHz SDRAM Bus 4x AGP MI MCH SMBus Devices c PCI Slots PCI Bus AC 97 2 AC 97 AMR 5209729 wen ATA66 IDE Drives 33 MHz Bus 4 SMBus USB 1 5 Mb sec E Superl O BIOS 4Mb LPC FWH Figure 1 9 820 Chipset System Block Diagram NOTE This is a general block diagram and may not represent the type of memory slots on your mother board See the following page for the actual specifica tions of each motherboard 1 16 Chapter 1 Introduction Features of the PIIISCA PIIISCD PIIISCE 370SCD CPU Support PIIISCA PIIISCD PIIISCE All Slot 1 Pentium III 450 733 MHz processors
8. p 2 12 Pin 1 2 Normal Chassis Intrusion p 2 10 OFF Disabled Front Side Bus Speed p 2 11 Pin 1 2 Auto AC 97 Enable Disable p 2 12 Pin 1 2 Enabled Keyboard Wake Up p 2 12 Pin 1 2 Disabled Description Audio Modem Riser p 2 15 Audio CD Input large connector p 2 10 Audio CD Input small connector p 2 10 COM1 Serial Port Connector p 2 9 COM Serial Port Connector p 2 9 CPU Fan Header p 2 9 Chassis Fan Header p 2 9 Thermal Control Fan Header p 2 9 Game Port IDE Hard Disk Drive Connectors p 2 14 ATX Power Connector p 2 7 PS 2 Keyboard lower Mouse upper p 2 8 Universal Serial Bus Ports p 2 9 Parallel Printer Port p 2 14 Front Control Panel p 2 6 Overheat LED Header p 2 10 Floppy Disk Drive Connector p 2 14 Audio In Connector Audio Out Speaker Connector Microphone Input Wake on LAN Header p 2 9 and Front Control Panel connectors c S o 3 9 o bal ET z o 2 o m fe 3 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual 7 8 1 FAN1 FAN3 FAN2 JPWAKE J30 KB M
9. 1 BATTERY o PCI3 a BIOS 1 e e PCI4 FWH H LI 3 Ju a 1 2 PCI5 o Figure 1 6 SUPER PIIISCD Motherboard Layout 1 10 Chapter 1 Introduction Jumpers Quick Reference Description Default Setting JBT1 JL1 JP12 JP28 JPWAKE Connectors AMR CD CD_1 COM1 COM2 FAN FAN2 FAN3 GAME PORT J18 J19 J29 J30 J32 J33 J35 JF1 JF2 JOH JP26 LINE IN LINE OUT MIC IN WOL Also see the figures on page 2 6 for the locations of the I O ports CMOS Clear p 2 12 Pin 1 2 Normal Chassis Intrusion p 2 10 OFF Disabled Front Side Bus Speed p 2 11 Pin 1 2 Auto AC 97 Enable Disable p 2 12 Pin 1 2 Enabled Keyboard Wake Up p 2 12 Pin 1 2 Disabled Description Audio Modem Riser p 2 15 Audio CD Input large connector p 2 10 Audio CD Input small connector p 2 10 COM1 Serial Port Connector p 2 9 COM Serial Port Connector p 2 9 CPU Fan Header p 2 9 Chassis Fan Header p 2 9 Thermal Control Fan Header p 2 9 Game Port IDE Hard Disk Drive Connectors p 2 14 ATX Power Connector p 2 7 PS 2 Keyboard lower Mouse upper p 2 8 Universal Serial Bus Ports p 2 9 Parallel Printer Port p 2 14 Front Control Panel p 2 6 Overheat LED Header p 2 10 Floppy Disk Drive Connector p 2 14 Audio In Connector Audio Out Speaker Connector Microphone Input W
10. 62 65 66 7F 80 81 82 85 86 Description The DMA page register test passed Performing the DMA Controller 1 base register test next The DMA controller 1 base register test passed Performing the DMA controller 2 base register test next The DMA controller 2 base register test passed Programming DMA controllers 1 and 2 next Completed programming DMA controllers 1 and 2 Initializing the 8259 interrupt controller next Extended NMI source enabling is in progress The keyboard test has started Clearing the output buffer and checking for stuck keys Issuing the keyboard reset command next A keyboard reset error or stuck key was found Issuing the keyboard controller interface test command next The keyboard controller interface test completed Writing the command byte and initializing the circular buffer next The command byte was written and global data initialization has been completed Checking for a locked key next Locked key checking is over Checking for a memory size mismatch with CMOS RAM data next The memory size check is done Displaying a soft error and checking for a password or bypassing WINBIOS Setup next The password was checked Performing any required programming before WINBIOS Setup next B 6 Appendix B AMIBIOS POST Diagnostic Error Messages Check Point Description 87 The programming before WINBIOS Setup has been completed Uncompressing the WINBIOS Set
11. AB Building the multiprocessor table if necessary POST next BO The system configuration is displayed AC Uncompressing the DMI data and initializing DMI B1 Copying any code to specific areas DOh The NMI is disabled Power on delay is starting Next the initialization cade checksum will be verified Dih Initializing the DMA controller Performing the keyboard controller BAT test Starting memory refresh and entering 4 GB flat mode next D3h Starting memory sizing next D4h Returning to real mode Executing any OEM patches and setting the stack next D5h Passing control to the uncompressed code in shadow RAM at E000 0000h The initialization code is copied to segment 0 and control will be transferred to segment 0 D6h Control is in segment 0 Next checking if Ctrl Home was pressed and verifying the system BIOS checksum If either lt Ctrl gt lt Home gt was pressed or the system BIOS checksum is bad next the system will go to checkpoint code EOh Otherwise going to checkpoint code D7h B 9 m x lt m Z Li a a lt gt Kl U m zZ H x lt BIOS Manual Notes
12. ATX power M ec P 2 E supply S S Infrared Connector Tablo 3 3 Infrared Pin H Definitions The infrared connector is located on JF2 pins 1 5 of JF2 See Table 2 2 for pin Pin definitions See the Technical Sup Number Definition port section of our web page for infor s ee mation on infrared devices you can 4 Ground connect to the system 5 RTA PW_ON Connector Table 2 3 The PW_ON connector is located on Ce pins 9 and 10 of JF2 Momentarily JF2 contacting both pins will power on off Pin m Number Definition the system The user can also con 9 PW ON figure this button to function as a 19 round suspend button See the Power Button Mode setting in BIOS on page 4 12 To turn off the power when set to suspend mode hold down the power button for at least 4 seconds See Table 2 3 for pin defi nitions Reset Connector Table za Reset Pin Definitions The reset connector is located on F2 Pin pins 12 and 13 of JF2 This connec Number Definition tor attaches to the hardware reset We SEN switch on the computer case See Table 2 4 for pin definitions 2 7 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual Hard Drive LED Table 2 5 Hard Drive LED Pin Definitions The hard drive LED is located on pins JF1 1 to 4 of JF1 Attach the hard drive Pin Number Definition LED cable to pins 1 and 2 See 1 45V R de 2 HD Active Table 2 5 for pin definitions 3 HDActive 4 5V 1
13. Keylock Power LED neus m Keylock Power LED Pin o Connector Definitions JF1 o X Pin 3 The keylock power LED connector is Number Function Definition 5 VCC 5V LED power located on pins 5 to 9 of JF1 See 6 VCC 5V LED power or key Table 2 6 for pin definitions Pins 5 7 Ground Black wire 8 Keyboard inhibit through 7 are for the power LED 9 Ground Black wire Pins 8 and 9 are for the keylock Speaker Connector Table 2 7 Speaker Connector Pin Definitions JF1 The speaker connector is located on Pin i 4 Number Function Definition pins 10 to 13 of JF1 See Table 2 7 10 CTETUR EE for pin definitions 11 Key No connection 12 Key 13 Speaker data ATX PS 2 Keyboard and Table 2 8 PS 2 Mouse Ports PS 2 Keyboard and Mouse Port Pin Definitions The ATX PS 2 keyboard and the J30 PS 2 mouse are located on J30 See Table 2 8 for pin definitions PA E The mouse port is above the key pus board port See Figure 2 3 3 Ground 4 VCC H Clock 6 NC 2 8 Chapter 2 Installation Universal Serial Bus TEE n S RA niversal Seria us Pin Derinitions USB J32 J33 Pin Pin The two Universal Serial Bus con Number Definition Number Definition 1 45V M 5V nectors are located on J32 and J33 2 Po 2 P0 S NE 3 P0 3 P0 See Table 2 9 for pin definitions A Ganga Gad 5 N A 5 Key Serial Ports Table 2 10 Serial Port Pin Definitions COM1 COM2
14. PIIISCD PIIISCE 370SCD User s Manual Audio Modem Riser AMR The AMR is a modular specification that integrates the audio modem func tions on the motherboard by assigning the analog I O functions to a riser card Integration of the audio modem function enhances system capabilities while reducing costs The AMR interface is based on an AC link that is compliant with Intel s Audio Codec 97 version 2 1 specification ET E o 2 o m fe 3 Firmware Hub FWH The FWH is a component that brings added security and managability to the PC platform infrastructure This device includes an integrated Random Num ber Generator RNG to enable stronger encryption digital signing and se curity protocols The FWH provides storage for the system BIOS and video BIOS which eliminates a redundant nonvolatile memory component Suspend to RAM STR When the system goes into a deep sleep S3 state power is removed from most of the system components but remains supplied to RAM to quickly restore the system to its previous state of operation Because system restoral happens in only 5 seconds applications that were open before the sleep state can reopen for immediate access In STR all data in system memory is stored in RAM when the system is suspended and system power is turned off the power supply fan also shuts off You must be running ACPI for this feature to take effect See page 1 22 for details on initiating ACPI All driver
15. SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual Question How do connect the ATA66 cable to my IDE device s Answer The 80 wire 40 pin ATA66 IDE cable that came with your system has two connectors to support two drives This special cable must be used to take advantage of the speed the ATA66 technology offers Con nect the blue connector to the onboard IDE header and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Ship ping and handling charges will be applied for all orders that must be mailed when service is complete 4 E E oD 2 7 o o E Ke This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This cha
16. Serial Number Intel included a serial number in their Pentium III processors as a unique system identifier For privacy reasons you can disable this setting to prevent the release of this identifier The settings for this option are Enabled or Disabled C000 Shadow 16K C400 Shadow 16K C800 Shadow 16K CC00 Shadow 16K D000 Shadow 16K D400 Shadow 16K D800 Shadow 16K DC00 Shadow 16K These options specify how the 32 KB of video ROM at C0000h or D0000h is treated The settings are Disabled Enabled or Cached WP When set to Disabled the contents of the video ROM are not copied to RAM When set to Enabled the contents of the video ROM area from C0000h C7FFFh or D0000h D7FFFh are copied shadowed from ROM to RAM for faster execution When set to Cached WP the contents of the video ROM area from C0000h C7FFFh or D0000h D7FFFh are copied from ROM to RAM and can be written to or read from cache memory Advanced Chipset Setup USB Function The settings for this option are Enabled or Disabled Set this option to Enabled to enable the USB Universal Serial Bus functions USB KB Mouse Legacy Support The settings for this option are Keyboard Auto Keyboard Mouse or Dis abled CPU Speed This option allows you to change the CPU speed The first number shows the CPU Core Bus ratio and the following two list the resulting CPU speeds at 133 and 100 MHz front side bus speeds respectively Rambus Channel Frequ
17. Serial Port Connector p 2 9 COM Serial Port Connector p 2 9 CPU Fan Header p 2 9 Chassis Fan Header p 2 9 Thermal Control Fan Header p 2 9 Game Port IDE Hard Disk Drive Connectors p 2 14 ATX Power Connector p 2 7 PS 2 Keyboard lower Mouse upper p 2 8 Universal Serial Bus Ports p 2 9 Parallel Printer Port p 2 14 Front Control Panel p 2 6 Overheat LED Header p 2 10 Floppy Disk Drive Connector p 2 14 Audio In Connector Audio Out Speaker Connector Microphone Input Wake on LAN Header p 2 9 and Front Control Panel connectors 1 9 c S o 3 9 o bal ET zh o 2 o m fe 3 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual 8 225 1 JPWAKE FAN 1 FAN2 J30 FAN3 KB MOUSE tc ul J32 J33 PORTS a JOH J26 x 1 E 1 JP12 E E u u gt S a spe o A b5Hz O E 2 O 27s o n 6 a o o r my sie a Blitz 3 z z 8118 z a a LM a i a a wan 1 855 o O Las MEMORY TRANSLATOR HUB MCH LINE Sx OUT uiu E a a tc LNE 2 IN fw x cD o Mic 11 IN CD I 1 1 1 J18 Jg AGP PORT MONO JP28 lt AMR ICH 1 AC 97 PCI CODEC Chip 1 PCI2 ver wot 1 a o 1
18. Time Out Minutes This option specifies the length of a period of hard disk drive inactivity When this length of time expires the computer enters the power conserving state specified in the Hard Disk Power Down Mode option The settings are Disabled and 1 Min through 14 Min in 1 minute incre ments Display Activity This option specifies if AMIBIOS is to monitor display activity for power conservation purposes When this option is set to Monitor and there is no display activity for the length of time specified in the Standby Timeout Minutes option the computer enters a power savings state The settings are Monitor or Ignore 4 12 Chapter 4 BIOS Manual Throttle Ratio Throttling is used to lower power consumption and reduce heat This option allows the CPU to operate at a reduced average power at a sacrifice in performance The settings for this option are 87 5 75 0 62 5 50 37 5 25 or 12 5 Advanced SMI Enable Controls Timer Overflow Enable This allows the system to generate a System Management Interrupt after a specific amount of time has passed The settings are Enabled and Disabled Thermal SMI Enable This allows the system to generate a System Management Interrupt after a specific temperature has been exeeded The settings are Enabled and Disabled PME SMI Enable This allows the system to generate a System Management Interrupt after a Power Management Event has occurred The settings are Enabled
19. at 133 100 MHz front Side bus speed All Slot 1 Pentium II 350 450 MHz processors at 100 MHz front side bus speed 370SCD e Pentium Ill FCPGA 500 700 MHz processors c S o 3 o o bal Memory e PIIISCA Two 184 pin RIMM sockets supporting up to 1 GB RDRAM Rambus DRAM Two 168 pin DIMM sockets supporting up to 1 GB unbuffered SDRAM or registered DIMMs NOTE If RDRAM is installed the DIMM slots will be disabled PIIISCD 370SCD Two 168 pin DIMM sockets supporting up to 1 GB unbuffered SDRAM or registered DIMMs e PIIISCE Two 184 pin RIMM sockets supporting up to 1 GB RDRAM Chipset Intel 820 ICH see page 1 19 for details Expansion Slots e 5PCIslots 1 AMR slot 1 4xAGP slot AGP Pro on PIIISCA and 370SCD 1 ISA slot 370SCD only BIOS 4 Mb Firmware Hub AMI Flash BIOS APM 1 2 DMI 2 1 PCI 2 2 ACPI 1 0 Plug and Play PnP PC Health Monitoring Seven onboard voltage monitors for CPU core chipset voltage 3 3V 5V and 12V Three fan status monitor with firmware software on off control Environmental temperature monitor and control CPU fan auto off in sleep mode Power up mode control for recovery from AC power loss System overheat LED and control 1 17 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual System resource alert Hardware BIOS virus protection Auto switching voltage regulator for the CPU core SUPERMICRO Super Doctor utility ACPI PC 9
20. fuse if the keyboard has one 8 times there is a memory error on the video adapter Replace the video adapter or the RAM on the video adapter 9 times the BIOS ROM chip is bad The system probably needs a new BIOS ROM chip 4 5 7 or 10 times the motherboard must be replaced If you hear it s because 5 short and 1 long beeps no memory is installed 8 short and 1 long beeps EDO memory is installed 6 short and 1 long beeps registered or buffered memory is installed A 3 lt x lt D Pa li a a lt BIOS Manual Error Message Information 8042 Gate A20 Gate A20 on the keyboard controller 8042 Error is not working Replace the 8042 Address Line Short Error in the address decoding circuitry on the motherboard C Drive Error Hard disk drive C does not respond Run the Hard Disk Utility to correct this problem Also check the C hard disk type in Standard Setup to make sure that the hard disk type is correct C Drive Failure Hard disk drive C does not respond Replace the hard disk drive Cache Memory Bad Cache memory is defective Replace it Do Not Enable Cache CH 2 Timer Error Most ISA computers include two times There is an error in time 2 CMOS Battery State Low CMOS RAM is powered by a battery The battery power is low Replace the battery CMOS Checksum Failure After CMOS RAM values are saved a checksum value is g
21. it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from static discharge Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Putthe motherboard and peripherals back into their antistatic bags when not in use Forgrounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the motherboard Unpacking The motherboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected 2 1 E fe 2 E N E SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual 2 2 Processor Installation AN When handling the processor package avoid placing direct pressure on the label area of the fan The following pages cover the installation procedure You should install the processor to the motherboard first then install the motherboard in the chassis then the memory and add on cards and finally the cables and drivers Following the installation procedures in the order they appear in this chapter should elimi nate t
22. only available if the setting of the parallel port mode option is ECP The settings are 0 1 2 3 5 6 and 7 Power Loss Control This option specifies what state the system returns to after losing power The settings are Always OFF Always ON and Previous 4 19 BIOS Manual Keyboard Wake up Function This option specifies which key will wake up the system when pressed The settings are Disable Ctrl F1 Space and Any Key Onboard Game amp Mini Port This option is used to either Enable or Disable the Game Mini Port Game Port Base Address This option specifies the base address to be used for the game port The settings are 200h and 208h MIDI Port Base Address This option specifies the base address to be used for the MIDI port The settings are 298h 330h and 300h MIDI IRQ This option specifies the IRQ to be used for the parallel port The settings are 5 7 9 and 10 Onboard IDE This option specifies the onboard IDE controller channels to be used The settings are Disabled Primary Secondary or Both Auto Detect Hard Disks This section allows BIOS to look for and configure any hard disk drives on your system After highlighting this option hit Enter and wait momentarily while BIOS performs the auto detect You will soon see the disk drives appear properly configured Change User Password Change Supervisor Password The system can be configured so that all users must enter a password ever
23. option are Yes or No Initial Display Mode This option determines the display screen with which the POST is going to start the display The settings for this option are BIOS or Silent H selected as BIOS the POST will start with the normal sign on message screen If Silent is selected the POST will start with the Supermicro screen Display Mode at Add on ROM Init The settings for this option are Force BIOS or Keep Current Floppy Access Control The settings for this option are Read Write or Read Only Hard Disk Access Control The settings for this option are Read Write or Read Only S M A R T for Hard Disks S M A R T Self Monitoring Analysis and Reporting Technology is a technology developed to manage the reliability of the hard disk by predicting future device failures The hard disk needs to be S M A R T capable The settings for this option are Disabled or Enabled Note S M A R T cannot predict all future device failures S M A R T should be used as a warning tool not as a tool to predict the device reliability 4 7 BIOS Manual Boot Up Num Lock Settings for this option are On or Off When this option is set to On the BIOS turns off the Num Lock key when the system is powered on This will enable the end user to use the arrow keys on both the numeric keypad and the keyboard PS 2 Mouse Support Settings for this option are Enabled or Disabled When this option is set to Enabled AMIBIOS supports a PS 2
24. plat form A 133 MHz front side bus speed 4xAGP RDRAM and increased I O performance are some of the new capabilities offered by the 820 The main bridge of the 820 is the Memory Controller Hub MCH which enables a 133 or 100 MHz front side bus speed An I O Controller Hub ICH integrates PCI peripherals and I O functions with a dedicated 33 MHz PCI bus An accel erated hub interface provides a 266 MB sec bandwidth between the MCH and ICH and also separates the I O devices from the MCH for improved performance Memory Controller Hub MCH The MCH consists of the host CPU interface DRAM interface I O interface and AGP interface for the 820 chipset It supports ECC memory for RDRAM The AGP 2 0 interface supports 4x data transfer and 4x fast write capabil ity The MCH host interface bus runs at 133 100 MHz UO Controller Hub ICH The ICH is the I O Controller Hub for the I O subsystem which integrates many of the functions required by today s PC platforms It provides the interface to the PCI Bus and communicates with the MCH over a dedicated hub interface Memory Translator Hub MTH The Memory Translator Hub allows the PIIISCA PIIISCD 370SCD to support DIMM SDRAM type memory Note for the PIIISCA Only one type of memory can be used if RIMM s are installed then any installed DIMM s will be disabled The MTH does not support ECC meaning that the use of ECC memory will result in non ECC operation 1 19 SUPER PIIISCA
25. that all jumpers are set to their default positions Check that the 115V 230V switch on the power supply is properly set Turn the power switch on and off to test the system a A WwW MN The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one No Video 1 If the power is on but you have no video remove all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnostics card is recommended For UO port 80h codes refer to App B Memory Errors 1 Make sure the DIMM RIMM modules are properly and fully installed 2 Determine if different speeds of DIMMs RIMMs have been installed and verify that the BIOS setup is configured for the fastest speed of RAM used It is recommended to use the same RAM speed for all DIMMs RIMMs in the system 3 For DIMMs make sure you are using PC 100 compliant unbuffered SDRAM EDO and buffered SDRAM are not supported 4 Check for bad DIMM RIMM modules or slots by swapping a single module between both slots and noting the results 5 Install a single memory module and make sure it is fully seated 6 Check the power supply voltage 115V 230V switch E 5 o gt o o z E Ke Losing the Syste
26. the chassis Also refer to this chapter to connect the floppy and hard disk drives the IDE interfaces the parallel and serial ports and the twisted wires for the power supply the reset button the keylock power LED the speaker and the keyboard If you encounter any problems see Chapter 3 which describes troubleshoot ing procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions section is provided Instructions are also included for contacting technical support In addition you can visit our web site at www supermicro com techsupport htm for more detailed information Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual Appendix A provides information on BIOS error beep codes and messages Appendix B lists post diagnostic error messages Table of Contents Table of Contents Preface About This Manual tendere mae cale Dh d desto tt ib Age Ds iii Manual Organization je a ide a pe iii Chapter 1 Introduction 1 1 Overview es 1 1 heelt see eee eterne d 1 1 Contacting Supermicrg essen SUPER PIIISCA Motherboard Image see SUPER PIIISCD Motherboard Image eee SUPER PIIISCE Motherboard Image see SUPER 370SCD Motherboard Image SUPER PIIISCA Motherboard Layout SUPER PIIISCD Motherboard Layout SUPER PIIISCE Motherboard Layo
27. type mouse Primary Display The settings for this option are Absent VGA EGA CGA 40x25 CGA 80x25 or Mono Password Check This option enables the password check option every time the system boots or the end user runs WinBIOS Setup If Always is chosen a user password prompt appears every time the computer is turned on If Setup is chosen the password prompt appears if WinBIOS Setup is executed Boot to OS 2 If DRAM size is over 64 MB set this option to Yes to permit AMIBIOS to run with IBM OS 2 The settings are No or Yes CPU Microcode Updation The settings for this option are Enabled or Disabled Internal Cache This option is for enabling or disabling the internal cache memory The settings for this option are Disabled WriteThru or WriteBack External Cache This option is for enabling or disabling the external cache memory The settings for this option are Disabled WriteThru or WriteBack System BIOS Cacheable When set to Enabled the contents of the F0000h system memory segment can be read from or written to cache memory The contents of this memory segment are always copied from the BIOS ROM to system RAM for faster execution The settings are Enabled or Disabled Note The Optimal default setting is Enabled and the Fail Safe default setting is Disabled Set this option to Enabled to permit the contents of F0000h RAM memory segment to be written to and read from cache memory 4 8 Chapter 4 BIOS Processor
28. use an add on card for audio either in the AMR ora PCI slot See Table 2 18 for jumper settings Keyboard Wake Up Table 2 19 7 Keyboard Wake Up The JPWAKE jumper is used in Jumper Settings conjunction with the Keyboard JPWAKE Wake Up function in BIOS page Sale 4 20 Enable both the jumper and 1 2 Disabled 2 3 Enabled the BIOS setting to allow the sys tem to be woken up by depressing a key on the keyboard See Table 2 19 for jumper settings Your power supply must meet ATX Specification 2 01 or higher and supply 720 mA of standby power to use this feature 2 12 Chapter 2 Installation 2 8 Parallel Port AMR Floppy and Hard Disk Drive Connections Use the following information to connect the floppy and hard disk drive cables The floppy disk drive cable has seven twisted wires A red mark on a wire typically designates the location of pin 1 A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B c fe T S 7 The 80 wire ATA66 IDE hard disk drive cable that came with your system has two connectors to support two drives This special cable should be used to take advantage of the speed this new technology offers The blue connector connects to the onboard IDE header and the other con
29. 1 Auto Configuration with Fail Safe Settings pp 4 21 Save Settings and Exit 4 21 Exit Without Saving Appendices Appendix A BIOS Error Beep Codes and Messages sse A 1 Appendix B AMIBIOS Post Diagnostic Error Messages pp B 1 vii SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual Notes Chapter 1 Introduction 1 1 Chapter 1 Introduction Overview c S o 3 3 o bal E Checklist Congratulations on purchasing your computer motherboard from an ac knowledged leader in the industry Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Please check that the following items have all been included with your motherboard If anything listed here is damaged or missing contact your retailer One 1 Supermicro Mainboard One 1 ATA66 ribbon cable for IDE devices One 1 Floppy ribbon cable for floppy drives Two 2 Continuity Modules for empty RIMM sockets PIIISCA One 1 Continuity Module for empty RIMM socket PIIISCE One 1 Supermicro CD containing drivers and utilities One 1 URM Univeral Retention Mechanism for the CPU preinstalled not included with 370SCD One 1 User s BIOS Manual 1 1 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual CONTACTING SUPERMICRO Headquarters zi Address Super Micro Computer Inc amp 2051 Junction Avenue S San J
30. 8 Features Microsoft OnNow 5 zh 2 o E fe 3 Slow blinking LED for suspend state indicator BIOS support for USB keyboard Real time clock wake up alarm Main switch override mechanism External modem ring on STR Suspend to RAM Onboard UO 2 EIDE bus master interfaces support Ultra DMA 66 1 floppy port interface up to 2 88 MB 2 Fast UART 16550A compatible serial ports 1EPP Enhanced Parallel Port and ECP Extended Capabilities Port supported parallel port PS 2 mouse and PS 2 keyboard ports 1 infrared port slow IR 2 USB Universal Serial Bus ports Audio jack and game port Other Selectable CPU speed control set in BIOS Keyboard wake up Internal external modem ring on AC 97 2 1 compliant link for audio and telephony CODECs Recovery from AC power loss control Wake on LAN WOL Multiple FSB clock frequency selections set in BIOS CD Utilities BIOS flash upgrade utility Super Doctor utility Drivers for 820 chipset utilities and onboard audio and video Chapter 1 Introduction Dimensions SUPER PIIISCA ATX 11 6 x 8 825 295 x 224 mm SUPER PIIISCD ATX 11 6 x 8 225 295 x 209 mm SUPER PIIISCE ATX 11 6 x 7 2 295 x 183 mm SUPER 370SCD ATX 12 x 7 8 305 x 198 mm E S o EJ ke o bal E E 1 2 Chipset Overview Intel s 820 chipset brings advanced technology to the performance PC
31. 9 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 There are no jumpers to config 1 Host Data 3 12 Host Data 12 ure the onboard IDE connectors 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 J18 and J19 Refer to Table 2 17 Host Data 0 18 Host Data 15 19 GND 20 Key 22 for pin definitions You 2 DRQ3 ee GND must use the ATA66 cable in 23 I O Write 24 GND K 25 O Read 26 GND cluded with your system to 27 OCHRDY 28 BALE 29 DACK3 30 GND benefit from the ATA66 tech 3 IRQ14 32 10CS16 nology 33 Addr 34 GND 35 Addr 0 36 Addr 2 37 Chip Select 0 38 Chip Select 1 39 Activity 40 GND 2 14 Chapter 2 Installation Table 2 23 AMR Connector Pin Definitions AMR Pin Pin Number Signal Number Signal B1 AUDIO MUTE A1 AUDIO PWRDN B2 GND A2 MONO PHONE B3 MONO OUT PC BEEP A3 B4 A4 B5 A5 B6 PRIMARY DN amp A6 GND B7 12V A7 5Vdual 5VSB c B8 GND A8 USB_OC x B9 12V A9 GND t B10 GND A10 USB E B11 5VD A11 USB AID KEY KEY 2 KEY KEY B12 GND A12 GND B13 A13 S P DIF_IN B14 A14 GND B15 3 3VD A15 3 3Vdual 3 3VSB B16 GND A16 GND B17 AC97_SDATA_OUT M7 AC97_SYNC B18 AC97_RESET A18 GND B19 AC97 SDATA IN3 A19 AC97 SDATA IN1 B20 GND A20 GND B21 AC97_SDATA_IN2 A21 AC97 SDATA INO B22 GND A22 GND B23 AC97 MSTRCLK RST A23 AC97 BITCLK AMR Connector Refer to Table 2 23 for the pin definitions of the AMR co
32. ACPI Supports Flash ROM AMIBIOS supports the LS120 drive made by Matsushita Kotobuki Electronics Industries Ltd The LS120 Can be used as a boot device Is accessible as the next available floppy drive AMIBIOS supports PC Health Monitoring chips When a failure occurs in a monitored activity AMIBIOS can sound an alarm and display a message The PC Health Monitoring chips monitor CPU temperature Additional temperature sensors Chassis intrusion Five positive voltage inputs Two negative voltage inputs Three fan speed monitor inputs 4 3 Running Setup Optimal default settings are in bold text unless otherwise noted The BIOS setup options described in this section are selected by choos ing the appropriate text from the Standard Setup screen All displayed text is described in this section although the screen display is often all you need to understand how to set the options see on next page 4 2 Chapter 4 BIOS AMIBIOS HIFLEX SETUP UTILITY VERSION 1 18 1998 American Megatrends Inc All Rights Reserved STANDARD CMOS SETUP ADVANCED CMOS SETUP ADVANCED CHIPSET SETUP POWER MANAGEMENT SETUP PCI PLUG AND PLAY SETUP PERIPHERAL SETUP AUTO DETECT HARD DISK CHANGE USER PASSWORD CHANGE SUPERVISOR PASSWORD CHANGE LANGUAGE SETTING AUTO CONFIGURATION WITH OPTIMAL SETTINGS AUTO CONFIGURATION WITH FAIL SAFE SETTINGS SAVE SETTINGS AND EXIT EXIT WITHOUT SAVING Standard CMOS setup for c
33. C Power cable and then use JBT1 to clear CMOS see page 2 12 Chapter 2 Installation ECC Support The Memory Translator Hub enables the use of SDRAM in the DIMM slots on the PIIISCA PIIISCD 370SCD The MTH does not support ECC ECC type memory may be used but will result in non ECC operation See page 1 19 for more info on the MTH The Memory Controller Hub MCH enables the use of RDRAM in the RIMM slots on the PIIISCA PIIISCE This hub supports both ECC and non ECC type memory Check the Memory ECC Mode BIOS setting on page 4 11 to enable the use of ECC See page 1 19 for more info on the MCH Figure 2 2 RIMM DIMM Installation c fe 4S 7 Side View of DIMM Installation into Slot PC100 PC100 4 Notches Notches acum Note Notches should align with the receptive points on the slot To Install Insert module vertically and press down until it snaps into place Pay attention to the two notches Top View of DIMM Slot IL IL To Remove Use your thumbs to gently push near the edge of both ends of the module This should release it from the slot 2 5 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual 2 5 Port Control Panel Connector Locations The I O ports are color coded in conformance with the PC 99 specification See Figure 2 3 below for the colors and locations of the various UO ports Mouse Paralle
34. Chassis may include a variety of mounting fasteners made of metal or plastic Although a chassis may have both types metal fasteners are the most highly recommended because they ground the motherboard to the chassis For this reason it is best to use as many metal fasteners as possible 2 4 Installing RIMMs DIMMs 5 o m Di m E e 5 CAUTION Exercise extreme care when installing or removing RIMM DIMM modules to prevent any possible damage Also note that continuity modules must be installed into empty RIMM slots RIMM DIMM Installation See Figure 2 2 1 Insert RIMMs DIMMs as required for the desired system memory See note below for single module installation 2 Insert each RIMM DIMM module vertically into its slot Pay attention to the two notches along the bottom of the module to prevent inserting the RIMM DIMM module incorrectly 3 Gently press down on the RIMM DIMM module until it snaps into place in the slot Note Continuity modules must be installed in empty RIMM slots on the PIIISCA PIIISCE Note Single module installation If installing only a single DIMM you may use either DIMM Bank 1 or O If installing only a single RIMM module it must be installed in the RIMM slot nearest to the CPU slot and continuity modules must be installed in all RIMM slots that remain empty Note Changing memory types When changing memory from SDRAM DIMMs to RDRAM RIMMs or vice versa you must first disconnect the A
35. For example if the system has a hard disk connected to Primary Slave and another hard disk to Secondary Master then 1st IDE HDD will be referred to as the hard disk connected to Primary Slave and 2nd IDE HDD will be referred to as the hard disk connected to the Secondary Master 3rd IDE HDD and 4th IDE HDD are not present Note that the order of the initializa tion of the devices connected to the primary and secondary channels are Primary Master first Primary Slave second Secondary Master third and 4 6 Chapter 4 BIOS Secondary Slave fourth The BIOS will attempt to read the boot record from 1st 2nd 3rd and 4th boot device in the selected order until it is successful in reading the booting record The BIOS will not attempt to boot from any device which is not selected as the boot device Try Other Boot Devices This option controls the action of the BIOS if all the selected boot devices failed to boot The settings for this option are Yes or No If Yes is selected and all the selected boot devices failed to boot the BIOS will try to boot from the other boot devices in a predefined sequence which are present but not Selected as boot devices in the setup and hence not yet been tried for booting If selected as No and all selected boot devices failed to boot the BIOS will try not to boot from the other boot devices which may be present but not selected as boot devices in setup Initialize 120 Devices The settings for this
36. OUSE von D u J32 J33 FCPGA USB SORTS a Processor J26 x lt E lt m Im u uu gt E 3ETE O E O SHS o A 8 z a o u Ze a Blitz a ails ala SS a lt a ure se 1 855 o MEMORY O Lg TRANSLATOR MCH HUB elle LINE OUT Bu E nA LINE Q IN u Fi CD mic 9 C01 IN 1 1 14 J18 A AMR JP12 BATTERY MONO JP28 1 illa AGP PRO PORT AC 97 CODEC 1 Chip PCI ICH 1 PCI2 a o d o PCI3 eo E pos ceo PCIA WOL JBT1 Ju FWH e o s e e hr amp 1 B PCI5 Q D o ISA1 Figure 1 8 SUPER 370SCD Motherboard Layout 1 14 12 Chapter 1 Introduction Jumpers Quick Reference Description Default Setting JBT1 JL1 JP12 JP28 JPWAKE Connectors AMR CD CD_1 COM1 COM2 FAN FAN2 FAN3 GAME PORT J18 J19 J29 J30 J32 J33 J35 JF1 JF2 JOH JP26 LINE IN LINE OUT MIC IN WOL Also see the figures on page 2 6 for the locations of the I O ports CMOS Clear p 2 12 Pin 1 2 Normal Chassis Intrusion p 2 10 OFF Disabled Front Side Bus Speed p 2 11 Pin 1 2 Auto AC 97 Enable Disable p 2 12 Pin 1 2 Enabled Keyboard Wake Up p 2 12 Pin 1 2 Disabled Description Audio Modem Riser p 2 15 Audio CD Input large connector p 2 10 Audio CD Input small connector p 2 10 COM1 Serial Port Connector p 2 9 COM Serial Port Connector p 2 9 CPU Fan Header p 2 9 Chassis Fan Header p 2 9 Thermal Control Fan Header p 2 9 Game Port
37. SUPER amp SUPER PIIISCA SUPER PIIISCD SUPER PIIISCE SUPER 370SCD USER S AND BIOS MANUAL Revision 1 3 The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Unless you request and receive written permission from SUPER MICRO COMPUTER you may not copy any part of this
38. ake on LAN Header p 2 9 and Front Control Panel connectors c S o 3 9 o bal ET o 2 o fe 3 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual 8 825 1 JPWAKE FAN 1 J30 KB MOUSE JOH a 1C ul FAN2 FANG 432 J33 z USB PORTS a J26 x lt e lt gt a 8 5 O E gt n a JP12 u d e i Ic P Hs FE A8 Si Za O Juss 25 amp Z MCH ale LINE x T our a g E aj ai T o une 2 N wi 5 El cD 9 s me CD 1 IN Ch 1 DE i A D Sr AGP PORT s wowo JP28 LE AMR ICH 1 AC 97 PCI CODEC Chip 1 PCI2 ei den 1 O 1 1 o PCI3 a BIOS 1 e o 4Mb e PCI4 e E FWH BATTERY ui 8 A3 a 1 D PCI5 o Figure 1 7 SUPER PIIISCE 1 12 Motherboard Layout 11 Chapter 1 Introduction Jumpers Quick Reference Description Default Setting JBT1 JL1 JP12 JP28 JPWAKE Connectors AMR CD CD_1 COM1 COM2 FAN FAN2 FAN3 GAME PORT J18 J19 J29 J30 J32 J33 J35 JF1 JF2 JOH JP26 LINE IN LINE OUT MIC IN WOL Also see the figures on page 2 6 for the locations of the I O ports CMOS Clear
39. ally They should always work but do not provide optimal system performance characteristics Save Settings and Exit Highlight this and hit Enter when you wish to save any changes made to settings in BIOS and exit back to the system boot up procedure Exit Without Saving Highlight this and hit Enter when you wish to exit back to the system boot up procedure without saving any changes 4 21 BIOS Manual Notes 4 22 Appendix A BIOS Error Beep Codes Appendix A BIOS Error Beep Codes amp Messages During the POST Power On Self Test routines which are performed each time the system is powered on errors may occur Non fatal errors are those which in most cases allow the system to continue the boot up process The error messages normally appear on the screen Fatal errors are those which will not allow the system to continue the boot up procedure If a fatal error occurs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list on the following page correspond to the number of beeps for the corresponding error All errors listed with the exception of 8 are fatal errors lt ra z Li a a lt gt v U m zZ z x lt gt BIOS Manual Error message Description Refresh Failure The memory refresh circuitry on the motherbo
40. and Disabled SW SMI Timer Enable The settings for this option are Enabled and Disabled TCO Logic SMI Enable This allows the TCO logic to generate a System Management Interrupt when a century rollover occurs The settings are Enabled and Dis abled Advanced Resume Event Controls RTC Resume You can have the system resume operation at a predetermined time by use of the real time clock Enabling this setting allows you to determine the following four settings The settings are Enabled and Disabled RTC Alarm Date This allows you to set a time at which the system will wake up The setting is a number representing the alarm date 4 13 BIOS Manual RTC Alarm Hour This allows you to set a time at which the system will wake up The setting is a number representing the alarm hour RTC Alarm Minute This allows you to set a time at which the system will wake up The setting is a number representing the alarm minute RTC Alarm Second This allows you to set a time at which the system will wake up The setting is a number representing the alarm second AC97 Logic Resume This allows you to wake up the system from an AC 97 modem The settings for this option are Enabled and Disabled USB Controller Resume This allows you to wake up the system from a USB device The settings for this option are Enabled and Disabled PME Resume This allows you to wake up the system from a PME device The settings for this option are Enabl
41. and Play BIOS data structures while providing a processor architecture independent implementation that is compatible with Windows 98 Note 1 Windows NT 4 0 does not support ACPI 2 To install Windows 98 with ACPI enter DOS and type setup p j at the CDROM prompt usually 1 22 Chapter 1 Introduction D with the Windows 98 CD loaded Make sure you include the spaces after setup and p Then hit lt Enter gt You can check to see if ACPI has been properly installed by looking for it in the Device Manager which is located in the Control Panel in Windows Microsoft OnNow The OnNow design initiative is a comprehensive system wide approach to system and device power control OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other re quests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on BIOS Support for USB Keyboard If the USB keyboard is the only keyboard in the system the USB keyboard will work like a normal keyboard during system boot up Real Time Clock Wake Up Alarm Although the PC may be perceived to be off when not in use it is still capable of responding to preset wake up events In the BIOS the user can set a timer t
42. ard is faulty Parity Error A parity error was detected in the base memory the first 64 KB block of the system Base 64 KB Memory Failure A memory failure occurred within the first 64 KB of memory Timer Not Operational A memory failure was detected in the first 64 KB of memory or Timer 1 is not functioning Processor Error The CPU on the system board generated an error 8042 Gate A20 Failure The keyboard controller 8042 contains the Gate A20 switch which allows the CPU to operate in virtual mode This error means that the BIOS cannot switch the CPU into protected mode Processor Exception Interrupt Error The CPU on the motherboard generated an exception interrupt Display Memory Read Write Error The system video adapter is either missing or its memory is faulty Please Note This is not a fatal error ROM Checksum Error The ROM checksum value does not match the value encoded in the BIOS CMOS Shutdown Register Read Write Error The shutdown register for CMOS memory has failed Refer to the table on page A 3 for solutions to the error beep codes A 2 Appendix A BIOS Error Beep Codes If it beeps reseat the DIMM memory If the system still beeps replace the memory 6 times reseat the keyboard controller chip If it still beeps replace the keyboard controller If it still beeps try a different keyboard or replace the keyboard
43. ce in sector size by boosting the write current for sectors on inner tracks This parameter is the track number where write precompensation begins Sectors The number of sectors per track MFM drives have 17 sectors per track RLL drives have 26 sectors per track ESDI drives have 34 sectors per track SCSI and IDE drive may have even more sectors per track Capacity The formatted capacity of the drive is Number of heads x Number of cylinders x Number of sectors per track x 512 bytes per sector Boot Sector Virus Protection This setting allows you to prevent any data from being written the boot sector of the hard drive While this may prevent viruses from infecting your system you may need to change information here when installing new programs The options for this setting are Enabled or Disabled Advanced CMOS Setup Quick Boot The Settings are Disabled or Enabled Set to Enabled to permit AMIBIOS to boot quickly when the computer is powered on This option replaces the old Above 1 MB Memory Test Advanced Setup option The settings are Setting Description Disabled AMIBIOS tests all system memory AMIBIOS waits up to 40 seconds for a READY signal from the IDE hard disk drive AMIBIOS waits for 5 seconds after sending a RESET signal to the IDE drive to allow the IDE drive time to get ready again 4 5 BIOS Manual AMIBIOS checks for a lt Del gt key press and runs AMIBIOS Setup if the key has been pr
44. control the data transfers between the I O devices and the system memory The chipset allows the BIOS to choose which channels to do the job The settings are PnP or ISA EISA IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 IRQ10 IRQ11 IRQ14 IRQ15 These options specify which bus the specified IRQ line is used on and allow you to reserve IRQs for legacy ISA adapter cards If more IRQs must be removed from the pool the end user can use these options to reserve the IRQ by assigning an ISA EISA setting to it Onboard I O is configured by AMIBIOS All IRQs used by onboard I O are configured as PCI PnP IRQ14 and 15 will not be available if the onboard PCI IDE is enabled If all IRGs are set to SA EISA and IRQ14 and 15 are allocated to the onboard PCI IDE IRQ 9 will still be available for PCI and PnP devices This is because at least one IRQ must be available for PCI and PnP devices The settings are PCI PnP or ISA EISA See page 3 5 for information on shared IRQs Reserved Memory Size This option specifies the size of the memory area reserved for legacy ISA adapter cards The settings are Disabled 16K 32K or 64K Reserved Memory Address This option specifies the beginning address in hex of the reserved memory area The specified ROM memory area is reserved for use by legacy ISA adapter cards The settings are C0000 C4000 C8000 CC000 D0000 D4000 D8000 or DC000 BIOS Manual Peripheral Setup KB Clock Rate This setting deter
45. d EC Mode S W ECC and H W ECC Use this option to enable or disable the use of EC or ECC memory correction schemes CPU Clock Frequency This option allows you to increase the FSB speed over the normal 100 and 133 MHz settings controlled by JP11 The settings for this option are Auto 105 114 120 124 128 5 and 133 9 MHz with JP12 set to 100 MHz or Auto and Auto 133 3 138 143 148 150 152 5 155 and 160 MHz when JP12 is set to 133 MHz or Auto The Auto setting on JP12 will determine which front side bus speed will be used PCI Clock Off The settings for this option are Enabled and Disabled Power Management NOTE APM is automatically installed If using ACPI changes to the following settings up to and including LAN Wake Up will have no affect If you prefer to use ACPI refer to the instructions on initializing ACPI on page 1 22 Standby Time Out This option specifies the length of a period of system inactivity while in the full power on state When this length of time expires the computer enters a standby power state The settings are Disabled 1Min 5Min and 10Min Suspend Power Saving Type The settings for this option are S1 and C2 S1 is a normal suspend state in which no system CPU or chipset context is lost C2 is a low power state In this state the system cache is maintained Suspend Time Out This option specifies the length of a period of system inactivity while in the standby state When this lengt
46. document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 1999 by SUPER MICRO COMPUTER INC All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the SUPER PIIISCA PIIISCD PIIISCE 370SCD motherboard The SUPER PIIISCA PIIISCD PIIISCE supports Pentium IIl 450 733 MHz processors and Pentium II 350 450 MHz processors The 370SCD supports Pentium III FCPGA 500 700 MHz processors Pentium Il processors with the Dual Independent Bus DIB architecture are housed in a package called a Single Edge Contact Cartridge SECC Pentium Ill processors are packaged in SECC2 type cartridges FCPGA processors are housed in a 370 pin package Manual Organization Chapter 1 includes a checklist of what should be included in your mainboard box describes the features specifications and performance of the SUPER PIIISCA PIIISCD PIIISCE 370SCD mainboard and provides detailed informa tion about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when you want to install the processor and RIMM DIMM memory modules and when mounting the mainboard in
47. ed and Disabled Remote Ring On This allows you to wake up the system from a serial port modem The settings for this option are Enabled and Disabled SMBUS Resume This allows you to wake up the system from a system management bus device The settings for this option are Enabled and Disabled LAN Wake Up This allows you to make use of the Wake on LAN feature The settings for this option are Enabled and Disabled Suspend to RAM Support This allows you to Enable or Disable the Suspend to RAM feature The settings for this option are Enabled and Disabled Available with ACPI only 4 14 Chapter 4 BIOS Post Video on S3 Resume This determines whether or not to invoke the VGA BIOS post when resuming from STR S3 The settings for this option are Enabled and Disabled Available with ACPI only Reset IDE on S3 Resume This determines whether or not to reset IDE when resuming from STR S3 The settings for this option are Enabled and Disabled Available with ACPI only PCI Plug and Play Setup Plug and Play Aware OS The settings for this option are No or Yes Set this option to Yes if the operating system in the computer is aware of and follows the Plug and Play specification AMIBIOS only detects and enables PnP ISA adapter cards that are required for system boot Currently only Windows 95 is PnP Aware Set this option to No if the operating system such as DOS OS 2 Windows 3 x does not use PnP You must set this o
48. ency This option determines the Rambus bus speed Settings are 400 MHz and 356 MHz 4 9 BIOS Manual Graphics Aperture Size The option specifies the amount of system memory that can be used by the Accelerated Graphics Port AGP The settings are 4 MB 8 MB 16 MB 32 MB 64 MB 128 MB or 256 MB PC PCIB Select Enable The settings for this option are Enabled or Disabled MIDI Decode The settings for this option are Disabled 330h 331h or 300h 301h AC97 Modem Controller This setting is used to switch between use of the Audio Modem Riser AMR and a modem The settings for this option are Enabled or Disabled AC97 Audio Controller This setting is used to switch the onboard audio on and off The settings for this option are Enabled or Disabled SMbus Controller The settings for this option are Enabled and Disabled Memory Hole Some ISA cards may require specific areas of memory in order to function This can be done by choosing the 15M 16M option as an area reserved for ISA use The Disabled option will not reserve a portion of memory for ISA cards DMA 0 Type DMA 1 Type DMA 2 Type DMA 3 Type DMA 5 Type DMA 6 Type DMA 7 Type These options determine the bus that the specified DMA channel can be used on The settings are LPC DMA or PC PCI ICH DCB Enable The settings for this option are Enabled or Disabled 4 10 Chapter 4 BIOS Memory ECC Mode The settings for this option are Disable
49. enerated for error checking The previous value is different from the current value Run WINBIOS Setup or AMIBIOS Setup gt v U m zZ H x gt CMOS System Option The values stored in CMOS RAM are either Not Set corrupt or nonexistent Run WINBIOS Setup or AMIBIOS Setup CMOS Display Type The video type in CMOS RAM does not Mismatch match the type detected by the BIOS Run WINBIOS Setup or AMIBIOS Setup CMOS Memory Size The amount of memory on the motherboard is Mismatch different than the amount in CMOS RAM Run WINBIOS Setup or AMIBIOS Setup A 4 Appendix A BIOS Error Beep Codes Error Message Information CMOS Time and Run Standard Setup to set the date and time Date Not Set in CMOS RAM D Drive Error Hard disk drive D does not respond Run the Hard Disk Utility Also check the D hard disk type in Standard Setup to make sure that the hard disk drive type is correct D Drive Failure Hard disk drive D does not respond Replace the hard disk Diskette Boot Failure The boot disk in floppy drive A is corrupt It cannot be used to boot the computer Use another boot disk and follow the screen instructions Display Switch Some compters require a video switch on the Not Proper motherboard be set to either color or monochrome Turn the computer off set the Switch then power on DMA Error Error in the DMA controller DMA 1 Error Error in the first DMA channel
50. ente nnt 2 11 Changing the CPU Speed ppp 2 11 CMOS Clear indt TESTEN 2 12 AC 97 Enable Disable enne 2 12 Keyboard Wake Up eene enne enhn nennen nn 2 12 2 8 Parallel Port AMR Floppy and Hard Disk Drive Connections 2 13 Parallel Port Connector Floppy Connector EE IDE gell Ee TEE AMR ee 2 9 Installing Software Drivers Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures aaa aaa aaa aaa aaa 3 1 Before Power On ada Ae CEA 3 1 NONROWE Mii acti o ese op IRI O A AK 3 1 No Video Memory Errors lae epa bu a gea a ugs 3 2 Losing the System s Setup Configuration pp 3 2 3 2 Technical Support Procedures pp 3 2 3 3 Frequently Asked Questions 3 4 Returning Merchandise for Service sse 3 6 Chapter 4 BIOS 4 1 ntrodu ctlon eerte rette hene 4 1 4 2 BIOS Features teet ee apt ater ret Dre RR REOS 4 2 4 3 RUNNING Setup onere rette tee eee ede terere 4 2 vi Table of Contents Standard CMOS Setup eene cepe e iet tte te 4 4 Advanced CMOS Setup sese 4 5 Advanced Chipset Setup essen 4 9 Power Management PCl Plug and Play Setup i eterne cech ance 4 15 Peripheral Setup oo ccccesseeseeseeesceeeeeeeeeeaeeesaeeeseeseeeeeeeeesaeeaeeareneeeesees 4 18 Auto Detect Hard DISKS nens 4 20 Change User Supervisor Password 4 20 Change Language Setting pe 4 21 Auto Configuration with Optimal Settings pp 4 2
51. er base address next Set the timer and printer base addresses Setting the RS 232 base address next Returned after setting the RS 232 base address Performing any required initialization before the Coprocessor test next Required initialization before the Coprocessor test is over Initializing the Coprocessor next Coprocessor initialized Performing any required initialization after the Coprocessor test next Initialization after the Coprocessor test is complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next Displaying any soft errors next The soft error display has completed Setting the keyboard typematic rate next The keyboard typematic rate is set Programming the memory wait states next Memory wait state programming is over Clearing the screen and enabling parity and the NMI next NMI and parity enabled Performing any initialization required before passing control to the adaptor ROM at E000 next Initialization before passing control to the adaptor ROM at E000h completed Passing control to the adaptor ROM at E000h next B 8 Appendix B AMIBIOS POST Diagnostic Error Messages Check Point Description A9 Returned from adaptor ROM at E000h control Next performing any initialization required after the E000 option ROM had control AA Initialization after E000 option ROM control has completed Displaying the system configuration next
52. essed Enabled AMIBIOS does not test system memory above 1 MB AMIBIOS does not wait up to 40 seconds for a READY signal from the IDE hard disk drive If a READY signal is not received immediately from the IDE drive AMIBIOS does not configure that drive AMIBIOS does not wait for 5 seconds after sending a RESET signal to the IDE drive to allow the IDE drive time to get ready again In Enabled keyboard will be bypassed Note You cannot run AMIBIOS Setup at system boot because there is no delay for the Hit lt Del gt to run Setup message Pri Master ARMD Emulated as Pri Slave ARMD Emulated as Sec Master ARMD Emulated as Sec Slave ARMD Emulated as The settings for these options are Auto Floppy or Hard disk 1st Boot Device 2nd Boot Device 3rd Boot Device The options for the 1st Boot Device are Disabled 1st IDE HDD 2nd IDE HDD 3rd IDE HDD 4th IDE HDD Floppy ARMD FDD ARMD HDD ATAPI CDROM SCSI Network or 1 0 The options for the 2nd Boot Device are Disabled 1st IDE HDD 2nd IDE HDD 3rd IDE HDD 4th IDE HDD Floppy ARMD FDD ARMD HDD ATAPI CDROM or SCSI The options for the 3rd Boot Device are Disabled 1st IDE HDD 2nd IDE HDD 3rd IDE HDD 4th IDE HDD Floppy ARMD FDD ARMD HDD or ATAPI CDROM 1st IDE HDD 2nd IDE HDD 3rd IDE HDD and 4th IDE HDD are the four hard disks that can be installed by the BIOS 1st IDE HDD is the first hard disk installed by the BIOS 2nd IDE HDD is the second hard disk and so on
53. essor into the socket and then close the lever 2 2 Chapter 2 Installation PIIISCA PIIISCD PIIISCE Your motherboard has a Slot 1 type connector which supports Pentium II and Pentium IN processors housed in SECC and SECC2 packages respec tively Please see the note below when installing a Pentium II processor with the SECC package Note The Pentium II processor comes in the SECC package which has locking tabs on the top corners Before installing the Pentium II package into the URM push these two locks inward until you hear a click After you have fully seated the processor into the Slot 1 connector as instructed below these locks should return to their outer positions c fe xS S 7 Arm in upright position Figure 2 1 Universal Retention Mechanism URM With the heat sink facing toward the RIMM DIMM memory slots slide the SECC SECC2 processor package into the URM and continue pushing it down until fully seated in the Slot 1 connector Some URMs have extra caps to be used for SECC2 processors AMP URMs do not have these If so after the processor is installed in the motherboard place a cap on each end of the URM and push down until they snap into place These caps are not left right specific 2 3 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual 2 3 Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis
54. h of time expires the computer enters a suspend power state The settings are Disabled 1Min 5Min and 10Min Power Button Mode This option specifies how the power button mounted externally on the computer chassis is used The settings are Standby and On Off When 4 11 BIOS Manual set to On Off pushing the power button turns the computer on or off The Standby setting places the computer in Standby mode or Full On power mode CPU Sleep Pin Enable The settings for this option are Enabled and Disabled Green PC Monitor Power State This option specifies the power state that the green PC compliant video monitor enters when AMIBIOS places it in a power savings state after the specified period of display inactivity has expired The settings are Standby Suspend or Off Video Power Down Mode This option specifies the power conserving state that the VGA video subsystem enters after the specified period of display inactivity has expired The settings are Disabled Standby or Suspend Note The Optimal default setting for this option is Suspend and the Fail Safe default setting is Disabled Hard Disk Power Down Mode This option specifies the power conserving state that the hard disk drive enters after the specified period of hard drive inactivity has expired The settings are Disabled Standby or Suspend Note The Optimal default setting for this option is Suspend and the Fail Safe default setting is Disabled Hard Disk
55. hanging time date hard disk type etc Esc Exit Till sei F2 F3 Color F10 Save amp Exit AMIBIOS SETUP STANDARD CMOS SETUP C 1998 American Megatrends Inc All Rights Reserved Date mm dd yyyy Tue Sep 1 1998 Base Memory KB Time hh mm ss 16 05 13 Extd Memory KB Floppy Drive A 1 44MB 3 Floppy Drive B Not Installed LBA Blk PIO 32Bit Type Size Cyln Head Wpcom Sec Mode Mode Mode Mode Pri Master Auto 42 40 981 5 981 17 Off Off Auto On Pri Slave Not Installed Sec Master Not Installed Sec Slave Not Installed Boot Sector Virus Protection Disabled Month Jan Dec ESC Exit the eg Day DL St PgUp PgDn Modify Year 1901 2099 F2 F3 Color 43 BIOS Manual Standard CMOS Setup Date and Time Configuration Select the Standard option Select the Date Time icon The current values for each category are displayed Enter new values through the keyboard Floppy A Floppy B Choose the Floppy Drive A or B icon to specify the floppy drive type The settings are Not Installed 360 KB 5 inch 1 2 MB 5 inch 720 KB 3 inch 1 44 MB 3 inch or 2 88 MB 3 inch Note The Optimal and Fail Safe settings for Floppy Drive A are 1 44 MB 3 1 2 inch and for Floppy Drive B are Not Installed Pri Master Pri Slave Sec Master Sec Slave Select these options to configure the drive named in the option Select Auto Detect IDE to let AMIBIOS automatically configure the drive A screen with a list of drive parameters ap
56. he memory below 1 MB has been cleared via a soft reset Clearing the memory above 1 MB next The memory above 1 MB has been cleared via a soft reset Saving the memory size next Going to checkpoint 52h next The memory test started but not as the result of a soft reset Displaying the first 64 KB memory size next The memory size display has started The display is updated during the memory test Performing the sequential and random memory test next The memory below 1 MB has been tested and initialized Adjusting the displayed memory size for relocation and shadowing next The memory size display was adjusted for relocation and shadowing Testing the memory above 1 MB next The memory above 1 MB has been tested and initialized Saving the memory size information next The memory size information and the CPU registers are saved Entering real mode next Shutdown was successful The CPU is in real mode Disabling the Gate A20 line parity and the NMI next The A20 address line parity and the NMI are disabled Adjusting the memory size depending on relocation and shadowing next The memory size was adjusted for relocation and shadowing Clearing the Hit DEL message next The Hit DEL message is cleared The WAIT message is displayed Starting the DMA and interrupt controller test next B 5 m x lt e Z m a a lt gt v U m zZ z x lt w BIOS Manual Check Point 60
57. he most common problems encountered when installing a system IMPORTANT Always connect the power cord last and always remove it before adding removing or changing any hardware components 5 o iE 2 m o 5 Heat Sink Follow the instructions that came with your processor or heat sink to attach a heat sink to the processor Your heat sink should have a 3 pin fan which connects to the FAN1 header Make sure that good contact is made between the CPU and the heat sink particularly with SECC2 Pentium III OEM packages Insufficient contact will cause the processor to overheat which may crash the system URM Your motherboard has a preinstalled URM Universal Retention Mecha nism not needed with 370SCD A picture of a URM is shown in Figure 2 1 This is one of several types all of which can support SECC and SECC2 packages Before installing your processor you must flip the arms of the URM to their upright positions Some URMs may have extra caps to be used for Pentium III processors AMP URMs do not use these After the processor is installed in the motherboard place one of these caps if included on each end of the URM and push down until they snap into place These caps are not left right specific Processor 370SCD Your motherboard has an FCPGA type socket which supports Flip Chip processors Lift the lever on the FCPGA socket and install with the notched corner of the processor oriented with pin 1 Fully seat the proc
58. hnical support Motherboard model and PCB revision number BIOS release date version this can be seen on the initial display when your system first boots up System configuration An example of a Technical Support form is on our web site at http www supermicro com techsupport contact_support htm 4 Distributors For immediate assistance please have your account number ready when placing a call to our technical support department We can be reached by e mail at support supermicro com or by fax at 408 895 2012 a E s e o Z o 2 2 o Be E 3 3 Frequently Asked Questions Question What are the various types of memory that the PIIISCA PIIISCD PIIISCE 370SCD motherboard can support Answer The PIIISCA PIIISCDand 370SCD have two DIMM slots that sup port 168 pin unbuffered 3 3V SDRAM They do not support ECC or EDO memory Note that whether running at 100 or 133 MHz FSB speed the memory must be PC100 compliant Because ECC is not supported using ECC memory will result in non ECC operation The PIIISCA also has 2 RIMM Sockets as does the PIIISCE Use 300 400 MHz 600 800 MB sec RIMM modules for RDRAM ECC and non ECC RDRAM are both supported Check the Memory ECC Mode BIOS setting on page 4 11 to enable the use of ECC Note Continuity modules must be installed into empty RIMM slots If both RIMMs and DIMMs are installed the DIMMs will be disabled SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual
59. ill he CPU to set the speed show you the actual CPU speed for each FSB speed option se lected The CPU Clock Frequency setting will show you additional FSB speed options The FSB speed is set with JP12 See Table 2 16 for jumper settings Note If the system does not reboot after changing the CPU speed clear CMOS and reboot then set the cor rect speed with the BIOS setting mentioned above See CMOS Clear instructions on the next page 2 11 5 o m D m e 5 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual CMOS Clear Refer to Table 2 17 for the jumper GE ieu dun per Settings settings to clear CMOS Always JBT1 remove the AC power cord from senper osition Definition the system before clearing CMOS 1 2 Normal 2 3 CMOS Clear For an ATX power supply you must completely shut down Position Position 1 2 2 3 E o Ka o z o the system remove the AC power cord and then use JBT1 to clear CMOS Replace JBT1 back to the pin 1 2 position before powering up the sys tem again Do not use the PW ON connector to clear CMOS AC 97 Enable Disable Table 2 18 AC 97 Enable Disable AC 97 brings high quality audio to Jumper Settings JP28 PCs When enabled with JP28 au JONG dio is processed onboard and the Position Definition 1 2 Enabled AMR slot will support modems only 2 3 Gm The disabled setting should be se lected when you wish to
60. is option specifies if an offboard PCI IDE controller adapter card is installed in the computer The PCI expansion slot on the motherboard where the offboard PCI IDE controller is installed must be specified If an offboard PCI IDE controller is used the onboard IDE controller is automati cally disabled The settings are Auto AMIBIOS automatically determines where the offboard PCI IDE controller adapter card is installed S ot 1 Slot 2 Slot 3 Slot 4 Slot 5 or Slot 6 This option forces IRQ14 and IRQ15 to a PCI slot on the PCI local bus This is necessary to support non compliant ISA IDE controller adapter cards If an offboard PCI IDE controller adapter card is installed in the computer you must also set the Offboard PCI IDE Primary IRQ and Offboard PCI IDE Secondary IRQ options Offboard PCI IDE Primary IRQ Offboard PCI IDE Secondary IRQ These options specify the PCI interrupt used by the primary or secondary IDE channel on the offboard PCI IDE controller The settings are Disabled Hardwired INTA INTB INTC or INTD PCI Slot1 IRQ Priority PCI Slot2 IRQ Priority PCI Slot3 IRQ Priority PCI Slot4 IRQ Priority Use these options to specify the IRQ priority for PCI devices installed in the PCI expansion slots The settings are Auto IRQ 3 4 5 7 9 10 and 77 in priority order DMA Channel 0 DMA Channel 1 DMA Channel 3 DMA Channel 5 DMA Channel 6 DMA Channel 7 4 16 Chapter 4 BIOS These DMA channels
61. l Port Game Port Burgundy Gold IISR 5 Hd D e r J m m m WWW 9 BOON 5 Keyboard COM1 Port COM Port ine Out Line In Mic Purple Turquoise Turquoise Lime Light blue Pink Figure 2 3 I O Port Locations and Definitions Front Control Panel JF1 and JF2 contain header SE pins for various front control IR Conn LED panel connectors See Figure 2 4 for the pin definitions of the speaker keyboard lock hard drive LED infrared connector Power and power on and reset button LED headers which are all located X on JF1 and JF2 Refer to pages 2 7 to 2 8 for details Keyboard Lock Power On Note JF1 and JF2 are positioned end to end on X the PIIISCE see layout on Speaker page 1 12 Reset JF2 JF1 Figure 2 4 Front Control Panel Connectors 2 6 Chapter 2 Installation 2 6 Connecting Cables see previous page for locations Power Supply Connector Table 2 1 ATX Power Supply Connector Pin Definitions J29 After you have securely mounted the Pin Number Definition Pin Number Definition motherboard memory and add on 1 3 3V 11 3 3V 2 3 3V3 12 12V cards you are ready to connect the 3 Ground 13 Ground 4 5V 14 PS ON cables Attach an ATX power supply H Sauna 18 Ground cable to J29 by aligning the tabs on 6 5V 16 Ground Ground 17 Ground both connectors See Table 2 1 for 8 PW OK 18 5V the pin definitions of an
62. lled in BIOS by the Power Button Mode setting see page 4 11 When the On Off feature is enabled the motherboard will have instant off capabilities as long as the BIOS has control of the system When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count the first screen that appears when the system is turned on the momentary on off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the motherboard Question see some of my PCI devices sharing IRQs but the sys tem seems to be fine ls this correct or not Answer Some PCI Bus Mastering devices can share IRQs without perfor mance penalties These devices are designed to work correctly while shar ing IRQs See Table 3 1 below for details on shared IRQs a E z o o Z o 2 Q 3 o Be E Table 3 1 Shared IRQs PIIISCA PIIISCD PIIISCE 370SCD PCI 1 PCI 5 amp AGP share 1 IRQ PCI 2 shares an IRQ with the AMR onboard audio and the SM bus PCI 3 does not share an IRQ dedicated IRQ PCI 4 shares an IRQ with the USB System Management bus Question installed my microphone correctly but 1 can t record any sound What should do Answer Go to Start Programs Accessories Entertainment and then Volume Control Under the Properties tab scroll down the list of devices in the menu and check the box beside Microphone
63. m s Setup Configuration 1 Check the setting of jumper JBT1 Ensure that you are using a high quality power supply A poor quality power supply may cause the System to lose the CMOS setup information Refer to page 1 20 for details 2 The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If the above steps do not fix the Setup Configuration problem contact your vendor for repair 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a motherboard manufacturer Super Micro does not sell directly to end users so it is best to first check with your distributor or reseller for troubleshoot ing services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please go through the Troubleshooting Procedures and Frequently Asked Question FAQ sections in this chapter or see the FAQs on our web site Chapter 3 Troubleshooting http www supermicro com techsupport htm before contacting Tech nical Support 2 BIOS upgrades can be downloaded from our web site at http www supermicro com techsupport download htm Note Not all BIOS can be flashed depending on the modifica tions to the boot block code 3 If you still cannot resolve the problem include the following information when contacting Super Micro for tec
64. mand byte is written next B 1 gt v U m zZ z x BIOS Manual Check Point 10 11 12 13 14 19 1A 23 24 25 27 Description The keyboard controller command byte is written Next issuing the pin 23 and 24 blocking and unblocking commands Next checking if the End or Ins keys were pressed during power on Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the End key was pressed Next disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 The video display has been disabled Port B has been initialized Next initializing the chipset The 8254 timer test will begin next The 8254 timer test is over Starting the memory refresh test next The memory refresh test line is toggling Checking the 15 second on off time next Reading the 8042 input port and disabling the MEGAKEY Green PC feature next Making the BIOS code segment writable and performing any necessary configuration before initializing the interrupt vectors The configuration required before interrupt vector initialization has completed Interrupt vector initialization is done Clearing the password if the POST DIAG switch is on Interrupt vector initialization is done Clearing the password if the POST DIAG Switch is on Any initialization before setting video mode will be done next B2 Appendix B AMIBIOS POST Diagno
65. mines the speed at which characters are repeated when the key remains depressed The settings are 6 MHz 8 MHz 12 MHz and 16 MHz CPU Current Temperature The current CPU temperature is displayed in this option CPU Overheat Warning The settings for this option are Enabled or Disabled When set to Enabled this option allows the user to set an overheat warning temperature CPU Overheat Warning Temperature Use this option to set the CPU overheat warning temperature The settings are 25 C through 75 C in 1 C intervals Note The Optimal and Fail Safe default settings are 55 C H W Monitor INO CPU1 H W Monitor IN2 3 3V H W Monitor IN3 45V H W Monitor IN4 12V H W Monitor IN5 12V CPU Fan Chassis Fan Thermal Control Fan The above features are for PC Health Monitoring The motherboards with W83781D have seven onboard voltage monitors for the CPU core CPU I O 3 3V 5V DN 12V and 12V and for the three fan status monitor Onboard FDC This option enables the FDC Floppy Drive Controller on the motherboard The settings are Disabled and Enabled Onboard Serial Port 1 This option specifies the base UO port address of serial port 1 The settings are Disabled 3F8h 2F8h SE8h and 2E8h Onboard Serial Port 2 This option specifies the base UO port address of serial port 2 The settings are Disabled 3F8h 2F8h 3E8h and 2E8h 4 18 Chapter 4 BIOS Serial Port 2 Mode The settings for thi
66. n a Network Interface Card NIC that has WOL capability Wake On LAN must be enabled in BIOS page 4 15 Note that Wake On Lan can only be used with an ATX 2 01 or above compliant power supply 1 5 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates of 300 MHz and above The SUPER PIIISCA PIIISCD PIIISCE 370SCD accommodates ATX power sup plies Although most power supplies generally meet the specifications re quired by the CPU some are inadequate It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2 01 or above Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges Note To support the keyboard wake up function your power supply must be ATX 2 01 or higher and must provide a minimum standby voltage of 720 mA 1 24 Chapter 1 Introduction 1 6 Super I O The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selec tion a clock generator drive interface control logic and in
67. nector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings 2 13 5 o m D m e 5 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual Table 2 20 Parallel Printer Port Pin Definitions 335 Parallel Port Connector Pin Number Function Pin Number Function 1 Strobe 2 Auto Feed 3 Data Bit 0 4 Error i n E SEIL init The parallel port is ER or E 7 Data Bit2 8 SLCT IN See Table 2 20 for pin definitions 9 Data Bit3 10 GND 11 Data Bit 4 12 GND 13 Data Bit 5 14 GND 15 Data Bit6 16 GND 17 Data Bit 7 18 GND 19 ACK 20 GND 21 BUSY 22 GND 23 PE 24 GND 25 SLCT 26 NC Table 2 21 Floppy Connector Pin Definitions JP26 Floppy Connector Pin Number Function Pin Number Function 1 GND 2 FDHDIN 3 GND 4 Reserved The floppy connector is located 5 Key 6 FDEDIN S 7 GND 8 Index on JP26 See Table 2 21 for pin 9 GND 10 Motor Enable initi 11 GND 12 Drive Select B definitions 13 GND 14 Drive Select A 15 GND 16 Motor Enable 17 GND 18 DIR 19 GND 20 STEP 21 GND 22 Write Data 23 GND 24 Write Gate 25 GND 26 Track 00 27 GND 28 Write Protect 29 GND 30 Read Data 31 GND 32 Side 1 Select 33 GND 34 Diskette Table 2 22 IDE Connector Pin Definitions J18 J19 Pin Number Function Pin Number Function 1 Reset IDE 2 GND 3 Host Data 7 4 Host Data 8 IDE Connectors 5 Host Data 6 6 Host Data
68. nnector 2 15 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual 2 9 Installing Software Drivers After all the hardware has been installed you must install the software drivers The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard After inserting this CD into your CDROM drive the display shown in Figure 2 5 should appear If this display does not appear click on the My Computer icon and then on the icon representing your CDROM drive Finally double click on the S Setup icon S SUPERMICRO Intel 820 Chipset Tools for Win9x A Install Intel 820 chipset INF files S ig JG Update winds INF Reboot System PX e Install Security Drivers Optional Language English UK amp US Gel Sr Install AC97 Audio Drivers Reboot System zo al Install SUPER Doctor Optional Q Browse CD I Auto Start Up Next Time be iii Sup Encerta corn Tadu ime oe Drivers amp Tools 5 o m D sl As o Intel 820 Chipset 5 Super amp NOTE For each item marked Reboot System you MUST reboot after installing The file isapnp vxd is in Windows system directory e g c windows system The file usbhub sys is in Windows drivers directory e g c windows system32 drivers Figure 2 5 Driver Tool Installation Display Screen Click the icons showing a hand writing on paper to view the readme files for each item Click the tabs to the right of these in orde
69. nvironmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user defined threshold The overheat circuitry runs independently from the CPU It can continue to monitor for overheat conditions even when the CPU is in sleep mode Once it detects that the CPU temperature is too high it will automatically turn on the thermal control fan to prevent any overheat damage to the CPU The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chassis temperature is too high CPU Fan Auto Off in Sleep Mode The CPU fan activates when the power is turned on It can be turned off when the CPU is in sleep mode When in sleep mode the CPU will not run at full power thereby generating less heat CPU Overheat LED and Control This feature is available when the user enables the CPU Overheat Warning function in the BIOS see page 4 18 This allows the user to define an overheat temperature When this temperature is exceeded both the over heat fan and the warning LED are triggered 1 21 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual System Resource Alert This feature is available when used with the Super Doctor utility program It is used to notify the user of certain system events such as a user defined CPU temperature being exceeded voltages sensed as being too high or to
70. o low fan failure and chassis intrusion Utilizing chassis intrusion requires a microswitch to be attached between the chassis and the JL1 header on the motherboard ET a o 2 o m fe 3 Hardware BIOS Virus Protection The system BIOS is protected by hardware so that no virus can infect the BIOS area The user can only change the BIOS content through the flash utility provided by SUPERMICRO This feature can prevent viruses from infecting the BIOS area and destroying valuable data Auto Switching Voltage Regulator for the CPU Core The auto switching voltage regulator for the CPU core can support up to 20A current and auto sense voltage IDs ranging from 1 3V to 3 5V This will allow the regulator to run cooler and thus make the system more stable 1 4 ACPI PC 98 Features ACPI stands for Advanced Configuration and Power Interface The ACPI specification defines a flexible and abstract hardware interface that pro vides a standard way to integrate power management features throughout a PC system including its hardware operating system and application soft ware This enables the system to automatically turn on and off peripherals such as CD ROMs network cards hard disk drives and printers In addition to enabling operating system directed power management ACPI provides a generic system event mechanism for Plug and Play and an oper ating system independent interface for configuration control ACPI lever ages the Plug
71. o wake up the system at a predetermined time see page 4 13 Main Switch Override Mechanism When an ATX power supply is used the power button can function as a System suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up During the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no power will be provided to the motherboard 1 23 e S o 3 o o bal E SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual External Modem Ring On Wake up events can be triggered by the external modem ringing when the System is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply Wake On LAN WOL 5 e 2 o m fe 3 Wake On LAN is defined as the ability of a management application to re motely power up a computer that is powered off Remote PC setup up dates and asset tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The motherboards have a 3 pin header WOL to connect to the 3 pin header o
72. oblems On Board Parity error in motherboard memory The Parity Error format is ON BOARD PARITY ERROR ADDR HEX XXXX XXXX is the hex address where the error occurred Run gt v U m zZ H x lt gt AMIDiag to find and correct memory problems Parity Error Parity error in system memory at an unknown address Run AMIDiag to find and correct memory problems A 6 Appendix B AMIBIOS POST Diagnostic Error Messages Appendix B AMIBIOS POST Diagnostic Error Messages This section describes the power on self test POST port 80 codes for the AMIBIOS Check Point Description 00 Code copying to specific areas is done Passing control to INT 19h boot loader next 03 NMI is Disabled Next checking for a soft reset or a power on condition 05 The BIOS stack has been built Next disabling cache memory 06 Uncompressing the post code unit next 07 Next initializing the CPU init and the CPU data area 08 The CMOS checksum calculation is done next OB Next performing any required initialization before keyboard BAT command is issued OC The keyboard controller MB is free Next issuing the BAT command to the keyboard controller 0E The keyboard controller BAT command result has been verified Next performing any necessary initialization 2 after the keyboard controller BAT command test a n OF The initialization after the keyboard controller BAT i command test is done The keyboard com
73. ose CA 95131 U S A Tel 1 408 895 2001 Fax 1 408 895 2008 E mail marketing supermicro com General Information support supermicro com Technical Support Web site www supermicro com European Office Address Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 E mail sales supermicro nl Chapter 1 Introduction Notes c 2 3 9 o Ben SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual SUPER PIIISCA Figure 1 1 SUPER PIIISCA Motherboard Image EI 2 o fe 3 Chapter 1 Introduction SUPER PIIISCD Figure 1 2 SUPER PIIISCD Motherboard Image c S o 3 o o 1 5 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual SUPER PIIISCE Figure 1 3 SUPER PIIISCE Motherboard Image EI o 2 o fe 3 fot DUTOT Chapter 1 Introduction SUPER 370SCD Figure 1 4 SUPER 370SCD Motherboard Image c S o 3 o o bal 5 SU ROSE EEE Bee E SEES Seo eee eee 5 fe Qa E 2 fe E SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual
74. pears Click on OK to configure the drive Type How to Configure SCSI Select Type Select Not Installed on the drive parameter screen The SCSI drivers provided by the SCSI manufacturer should allow you to configure the SCSI drive IDE Select Type Select Auto to let AMIBIOS determine the parameters Click on OK when AMIBIOS displays the drive parameters Select LBA Mode Select On if the drive has a capacity greater than 540 MB Select the Block Mode Select On to allow block mode data transfers Select the 32 bit mode Select On to allow 32 bit data transfers Select P O mode Select On to allow AMIBIOS to determine the PIO Mode It is best to select Auto to allow AMIBIOS to determine the PIO mode If you select a PIO mode that is not supported by the IDE drive the drive will not work properly If you are absolutely certain that you know the drive s PIO mode select PIO mode 0 4 as appropriate 44 Chapter 4 BIOS Entering Drive Parameters You can also enter the hard disk drive parameters The drive parameters are Parameter Description Type The number for a drive with certain identification parameters Cylinders The number of cylinders in the disk drive Heads The number of heads Write The size of a sector gets progressively smaller as the track Precompensation diameter diminishes Yet each sector must still hold 512 bytes Write precompensation circuitry on the hard disk compensates for the physical differen
75. pter describes the AMIBIOS for Intel 820 Pentium II Ill 350 733 MHz and Pentium Ill FCPGA 500 700 MHz processors The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk based program System BIOS The BIOS is the Basic Input Output System used in all IBM PC XT ATP and PS 29 compatible computers Configuration Data AT compatible systems also called ISA Industry Standard Architecture must have a place to store system information when the computer is turned off The original IBM AT had 64 kbytes of non volatile memory storage in CMOS RAM All AT compatible systems have at least 64 kbytes of CMOS RAM which is usually part of the Real Time Clock Many systems have 128 kbytes of CMOS RAM How Data Is Configured AMIBIOS provides a Setup utility in ROM that is accessed by pressing Del at the appropriate time during system boot Setup configures data in CMOS RAM POST Memory Test Normally the only visible POST routine is the memory test The screen that appears when the system is powered on is shown on the next page An AMIBIOS identification string is displayed at the left bottom corner of the screen below the copyright message 4 1 BIOS Manual 4 2 BIOS Features Supports Plug and Play V1 0A and DMI 2 1 Supports Intel PCI 2 2 Peripheral Component Interconnect local bus specification Supports Advanced Power Management APM specification v 1 1 Supports
76. ption correctly Otherwise PnP aware adapter cards installed in the computer will not be configured properly PCI Latency Timer PCI Clocks This option specifies the latency timings in PCI clocks for all PCI devices The settings are 32 64 96 128 160 192 224 or 248 PCI VGA Palette Snoop The settings for this option are Disabled or Enabled When set to Enabled multiple VGA devices operating on different buses can handle data from the CPU on each set of palette registers on every video device Bit 5 of the command register in the PCI device configuration space is the VGA Palette Snoop bit O is disabled For example if there are two VGA devices in the computer one PCI and one ISA and this option is disabled data read and written by the CPU is only directed to the PCI VGA device s palette registers If enabled data read and written by the CPU is directed to both the PCI VGA device s palette registers and the ISA VGA palette registers This will permit the palette registers of both devices to be identical This option must be set to Enabled if any ISA adapter card installed in the system requires VGA palette snooping 4 15 BIOS Manual PCI IDE Busmaster The settings for this option are Disabled or Enabled Set to Enabled to specify the IDE Controller on the PCI bus has bus mastering capabilities Under Windows 95 you should set this option to Disabled and install the Bus Mastering driver Offboard PCI IDE Card Th
77. r from top to bottom to install each item one at a time After installing each item marked Reboot System you must reboot the system before moving on to the next item on the list You should install everything here except for the Security Drivers and the Super Doctor utility which are optional The Security Drivers support multiple languages Click the arrow to pull down a menu of choices The bottom icon with a CD on it allows you to view the entire contents of the CD 2 16 Chapter 3 Troubleshooting Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or installing any hardware components Before Power On 1 Make sure no short circuits exist between the motherboard and chassis 2 Disconnect all ribbon wire cables from the motherboard including those for the keyboard and mouse 3 Remove all add on cards o E o o lt o 2 2 E o E 4 Install a CPU making sure it is fully seated and connect the chassis speaker and the power LED to the motherboard Check all jumper settings as well No Power 1 Make sure no short circuits exist between the motherboard and the chassis Verify
78. r pin definitions 5 7 5 D Table 2 14 9 Overheat LED JOH Overheat LED Pin Definitions JOH Connect an LED to the JOH header Pin to provide advanced warning of Number Definition chassis overheating Refer to DURAM Table 2 14 for pin definitions Chassis Intrusion Table 2 15 Chassis Intrusion The Chassis Intrusion header is lo Pin Definitions JL1 cated on JL1 See the board layouts Pin o T x Number Definition in Chapter 1 for its location See 1 intrusion Input 2 Ground Table 2 15 for pin definitions 2 10 Chapter 2 Installation 2 7 Jumper Settings c 37 2 1 onnector Explanation of Pins e 2 Jumpers To modify the operation of the moth 5 Jamper erboard jumpers can be used to Cap choose between optional settings Jumpers create shorts between two PRA pins to change the function of the connector Pin 1 is identified with a Pin 1 2 short square solder pad on the printed cir cuit board See the motherboard c fe 4S 7 layout pages for jumper locations Changing the CPU Speed Table 2 16 Front Side Bus Speed Jumper Settings JP12 Changing the CPU speed is en Jumper abled by software control in BIOS SE SCC 5 uto see CPU Speed on page 4 9 and 2 3 133 MHz CPU Clock Frequency on page 4 SER PNE j x Note The Auto setting allows 11 The CPU Speed setting w
79. s and add on cards must be ACPI supported for STR to function Recovery from AC Power Loss BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain powered off in which case you must hit the power switch to turn it back on or for it to automatically return to a power on state See the Power Loss Control setting in BIOS on page 4 19 of this manual to change this setting The default setting is Always OFF 1 3 PC Health Monitoring This section describes the PC health monitoring features of the SUPER PIIISCA PIIISCD PIIISCE 370SCD All three have an onboard System Hard 1 20 Chapter 1 Introduction ware Monitor chip that supports PC health monitoring Seven Onboard Voltage Monitors for the CPU Core Chipset Voltage 3 3V 5V and 12V The onboard voltage monitor will scan these seven voltages continuously Once a voltage becomes unstable it will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor E e S o EJ ke bel Ben E E Three Fan Status Monitor with Firmware Software On Off Control The PC health monitor can check the RPM status of the cooling fans The onboard 3 pin CPU and chassis fans are controlled by the power manage ment functions The thermal fan is controlled by the overheat detection logic E
80. s option are Normal IrDA1 6ms IrDA3 16 ASKIR ASKIR500 ASKIRDem and ASKIRD500 When set to anything but Normal the IR Duplex Mode becomes available and can be set to either Half or Full IR Duplex Mode This option is enabled by the selection made in the previ ous Serial Port 2 Mode option This makes the IR Duplex Mode available which can be set to either Half or Full Onboard Parallel Port This option specifies the base I O port address of the parallel port on the motherboard The settings are Auto AMIBIOS automatically determines the correct base I O port address Disabled 378 278 and 3BC Parallel Port Mode This option specifies the parallel port mode The settings are Normal Bi Dir EPP and ECP When set to Normal the normal parallel port mode is used Use Bi Dir to support bidirectional transfers Use EPP Enhanced Parallel Port to provide asymmetric bidirectional data transfer driven by the host device Use ECP Extended Capabilities Port to achieve data transfer rates of up to 2 5 Mbps ECP uses the DMA protocol and provides symmetric bidirectional communica tion Note The Optimal default setting for this option is ECP and the Fail Safe setting is Normal EPP Version The settings are Enabled and Disabled Note The Optimal and Fail Safe default settings are N A Parallel Port IRQ This option specifies the IRQ to be used by the parallel port The settings are 5 and 7 Parallel Port DMA Channel This option is
81. stic Error Messages Check Point Description 28 Initialization before setting the video mode is complete Configuring the monochrome mode and color mode settings next 2A Bus initialization system static output devices will be done next if present 2B Passing control to the video ROM to perform any required configuration before the video ROM test 2C All necessary processing before passing control to the video ROM is done Looking for the video ROM next and passing control to it 2D The video ROM has returned control to BIOS POST Performing any required processing after the video ROM had control 2E Completed post video ROM test processing If the EGA VGA controller is not found performing the display memory read write test next 2F The EGA VGA controller was not found The display memory read write test is about to begin 30 The display memory read write test passed Look for retrace checking next 31 The display memory read write test or retrace checking failed Performing the alternate display memory read write test next m 32 The alternate display memory read write test passed Se e fa Looking for alternate display retrace checking next z 34 Video display checking is over Setting the display lt mode next 37 The display mode is set Displaying the power on message next B 3 gt v U m zZ z x BIOS Manual Check Point 38 39 3A 40 42 45 46 47
82. terrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports four 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s E e S o EJ ke bel E E It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART includes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt sys tem Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O supports one PC compatible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The IRQs DMAs and I O space resources of the Super I O can flexibly adjust to meet ISA PnP requirements which suppport ACPI and APM Ad vanced Power Management 1 25 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual Notes 5 o 2 G m fe 3 1 26 Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Static sensitive electrical discharge can damage electronic components To prevent damage to your system board
83. up code and executing the AMIBIOS Setup or WINBIOS Setup utility next 88 Returned from WINBIOS Setup and cleared the screen Performing any necessary programming after WINBIOS Setup next 89 The programming after WINBIOS Setup has been completed Displaying the power on screen message next 8B The first screen message has been displayed The WAIT message is displayed Performing the PS 2 mouse check and extended BIOS data area allocation check next 8C Programming the WINBIOS Setup options next 8D The WINBIOS Setup options are programmed Resetting the hard disk controller next 8F The hard disk controller has been reset Configuring the floppy drive controller next 91 The floppy drive controller has been configured Configuring the hard disk drive controller next 95 Initializing the bus option ROMs from C800 next 96 Initializing before passing control to the adaptor ROM at a C800 x fa z 97 Initialization before the C800 adaptor ROM gains Lu control has been completed The adaptor ROM check Ee is next 98 The adaptor ROM had control and has now returned control to BIOS POST Performing any required processing after the option ROM returned control B 7 gt v U m zZ z x lt w BIOS Manual Check Point 99 9A 9B 9D 9E A3 A4 A5 A7 A8 Description Any initialization required after the option ROM test has been completed Configuring the timer data area and print
84. ut SUPER 370SCD Motherboard Layout 820 Chipset System Block Diagram pp Motherboard Features es 1 2 ei le le EE 1 3 PC Health Monitoring 1 4 ACPI PC 98 Features pp 1 5 Power Supply toner ciet c eee ed c IE IE E e PE tE Super HO soe ete toi eti be a e DA De e dcs de eed Chapter 2 Installation 2 1 Static Sensitive Devices ennt 2 1 PhO GAUL ONS E 2 1 Unpacking ev veseo ve i de ka tee epe re eme vetet 2 1 2 2 Processor Installation sss nennen 2 2 2 3 Mounting the Motherboard in the Chassis es 2 4 2 4 Installing RIMMs DIMMsS nennen 2 4 2 5 Port Control Panel Connector Locations 2 6 2 6 Connecting Cables pe 2 7 Power Supply Connector sese 2 7 Infrared Connector niente eee ener eroe a ean dd i a 2 7 PW ON Reiter Te 2 7 Reset Connector aaa 2 7 SUPER PIIISCA PIIISCD PIIISCE 370SCD User s Manual Hard Drive LED ei eet tty cete teet ide 2 8 Keylock Power LED Connectgr see 2 8 Speaker Connector essent nennen 2 8 ATX PS 2 Keyboard and Mouse Ports 2 8 Universal Serial B s cire eere er ee Ree ds 2 9 Serial POFtSJ EEN 2 9 Wake On LAN EE 2 9 Fan We EE 2 9 CD Headers rre eerte tenen at e NEN PUE es 2 10 Ovetrheat LED inne eene EN 2 10 Chassis Intr siOm oec cnet eae e ERE He RE Een 2 10 2 7 Jumper Settings eese nennen enne nnne nnne 2 11 Explanation of Jumpers eene enne ten
85. y time the system boots or when the AMIBIOS setup is executed You can set either a Supervisor password or a User password f you do not want to use a password just press Enter when the password prompt appears 4 20 Chapter 4 BIOS The password check option is enabled in the Advanced Setup by choosing either Always or Setup The password is stored in CMOS RAM You can enter a password by typing it out on the keyboard or by Selecting each letter via the mouse or a pen stylus Pen access must be customized for each specific hardware platform When you select to change the Supervisor or User password AMIBIOS prompts you for the new password You must set the Supervisor password before you can set the User password Enter a 1 6 character password lt will not appear on the screen when typed Retype the new password as prompted and press Enter Make sure you write it down If you forget it you must clear CMOS RAM and reset the pass word Change Language Setting Because this version of BIOS only supports English at this time this setting cannot be chosen Future releases may support other languages Auto Configuration with Optimal Settings The Optimal default settings provide optimum performance settings for all devices and system features Auto Configuration with Fail Safe Settings The Fail Safe default settings consist of the safest set of parameters Use them if the system is behaving erratic

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