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SuperMicro X6DAR-IG-B DUAL XEON E7525 DDR 2XSATA RAID VIDEO LAN Motherboard

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1. See the table at right for the func LED Definition i A Color tions associated with the second Amber Blinking LED 10 100MHz 1GHz GLAN1 GLAN2 4 Pin 8 Pin pw CPU ral po 29 fro a3 DIMM TA ZOP RW ai o S ESH Eha4 DIMM 16 Pw S A a aae DIMM 2A CPU1 Fail E 2J J16 929 23 DIMM 2B g z 3 E DIMM 3A Q DIMM 3B L _ _ RANI 314 DIMM 4A E DIMM 45 a Sog raf ELS N C J o2 BES FAN2 E7525 t Tumwater 3 3 CPU2 North Bridg zz 7 Zzgk G PCEX 133MHz POEA SE fag p PCI E x16 a pl Eal KONI Dr o w ways lt x S O g LAN 165 z TRU Force PW On 5 1 WOR lt ICH5R scsi ter BUH S 2 vez ae South ane SPAS 7 o CTRL RACE Bridge scsi eee a z 9 o t 8 D x EnableJPAT SCS B sid na ole JBT1 Chas S as Z _ FAN i JPL1 LAN Enable CLR mO Intru FIPG1 VGA Enable JD2 IDTWOL USB2 3 WD OH Pw SPK LEDSW 2 26 Chapter 2 Installation 2 8 IPMI Floppy Hard Disk Drive and SCSI Connections Note the following when connecting the floppy and hard disk drive cables e The floppy disk drive cable has seven twisted wires A red mark on a wire typically designates the location of pin 1 A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not
2. EnabledPat SCSI sf o ME M ed CTRL eS bat cal Chas FANB lersas ik Intru O kemeud WDO Wo USB2 3 WD OH pw SPK LEDSW ale m Clear CMOS 5 CTRL Race B Goudy x H JPG1 VGA Enable Chapter 2 Installation GLAN Enable Disable GLAN Enable Disable Jumper Settings JPL1 JPL1 enables or disables the Jumper GLAN port s on the motherboard Position Definition Pins 1 2 Enabled See the table on the right for ees Bienes jumper settings The default set ting is enabled VGA Enable Disable jek a sper a JPG1 enables or disables the VGA empa Connector on the motherboard Jumper me Position Definition See the table on the right for Pins 1 2 Enabled jumper settings The default set Pias amp gS Disabled ting is enabled Apin amp Pin g PW SMB i Fy 39 fod mao bin iy a oma oi Fall ig Sdo mma g pma SET vj Battely X 3 o m i ea ss pma 5 Nj omme lt ra 5 a a Fan JPLIFLAN Tumwater cpus North Bridgd ezik szi 228 rr PORCISSUFE prea ome amp PENS Eam E LANZ IPMI2 0 ele al ZR Zele T oE GLAN Enable
3. PW SMB KR rera E S omm urai ila pwe BW EE rA TMT cPUt Fail on E omer 7 esi gt TANT oe T pms ra 8 n pma ome R ERS J o S FANZ e7525 sU Tumwater 5 cPu2 North Bridad AN CPCs ECE PCIE x16 BLAN afz ZER ale fi y 7 lt TCHSR nee a i S ct Eroe Bridge 3 Gaushy x EARS wer GA ap Chas JPL1 LAN Enable CLR CMOSQ intru 8 USB2 PW SP Chapter 2 Installation SCSI Termination Enable Disable X6DAR 8G Only Jumpers JPA2 and JPA3 allow you to enable or disable termination for the SCSI connectors Jumper JPA2 controls SCSI channel A and JPA3 is for SCSI channel B The default setting is open to enable terminate both SCSI channels For SCSI to function properly please do not change the default setting See the table on the right for jumper set tings PLLSEL Select J4F4 J4F5 allows the user to se lect PLLSEL memory speed See the table on the right for jumper definitions The Default setting is BIOS Auto Detect PLLSEL Select le7525 Tumwater North Bridge CPU2 Sasatao ot 225 LAN1 E PCX 133MHz PCE fe ee ah PCE x16 SCSI Ch B j7 VGA lt 3 gt 104 S
4. 4 Pin 8 Pin pw cpu l PW SMB KE 39 jod 33 om 1 5 0 PInPW Sisqo ie Te i 3g TNT cput Faili S 238 Dm geil z TMT mae 8 oms ray id z via oma E pw oO e ERS a o FANZ E7525 sU Tumwater SULS CPU2 North Bridgel ozi PORTS 2255 LANI L INEZ JECA arg a8 PCLE x16 seOUb4 imal TPMIZO a fey TCHER a VaR PXH South scsi Ter BL p ridge Bios F S cTRL Eroe Bridge Sos 7902 5 Candy x Enabl scsi o CTRL pls Jett nls EF JPL1 LAN Enable cir cmosO IPGIUVGA Enable a USB213 Chapter 2 Installation use Wake On LAN The Wake On LAN header is des BAR WOL ignated WOL See the table on the Pin M 3 A Number Definition right for pin definitions You must 1 5V Standby enable the LAN Wake Up setting in a ake up BIOS to use this feature You must also have a LAN card with a Wake on LAN connector and cable Overheat LED JOH1 Overheat LED Pin Definitions JOH1 Connect an LED to the JOH1 Pin _ Number Definition header to provide warning of 1 5V 2 OH Active chassis overheating See the table on the right for pin defini 4 Pin 8 Pin p
5. ccececeeeeseeseeteeeeeeseeeeeetees 2 17 Power LED Speaker Header eseecsseeceeeeseeseeecseeeeeeeeeeeeeeaeeaeeaees 2 18 Wake On Ring 2 iiecteseisteee eara eaea cant OEN veers eeariens 2 18 Wake On2AN eienen e ave hin evsractrveas Sreerietes 2 19 Overheat LED E 2 19 Power Paultictic sendavcstecee avn teenie n ntreeeectavndi cri at 2 20 Alani IR S t arcsin Eaa eee eee 2 20 3rd Power Fault DeOteCt ccacccsscesssnccscscdsscancevecececenssscscczsccnvszescenssted ceases 2 21 Power Force Oi wis crscceencastend hevrteastscebeateit Goes aeaa a RnR 2 21 2 6 JUMpPEr Settings eseireoninahu na en A ANa 2 22 Explanation Of JUMPETS wistisccectececesceecesssacecnescccuserbecesczeterscaesecscxersvecsnes 2 22 CMOS Cleat nosnu aan inia ptre AREL E EEEN rA 2 22 GLAN Enable Disabley ssis adaa aa aiadetans 2 23 VGA Enable Disable Sisemaa eed e etcas ctiveeaseesess iesasans EART 2 23 Watch Dog Enable DISable cciicccccscccscecsccstccscoetsorsseveceasscnsestcneassereninszeds 2 24 SCSI Eniable DiSable wi oss cisscveccsssssaxssseivedesescesstassesacceandevieescsastesnaaseioaansers 2 24 SCSI Termination Enable Disable ccccccecceeeeeeeceeeeeteeeeeeteeeeeeeees 2 25 PLLSEL Select 2 7 Onboard Indicators eessen a NE ORA 2 26 GLAN LEDS isisisi eaaa E s ata EEKE SEAE 2 26 Floppy CONNECTION oisean iria dnia A 2 25 2 8 IPMI Floppy Hard Disk Drive and SCSI Connections 2 27 FOP DY ssevvecesccvescrsszeseecesccvscedaes sss tanccusece
6. Lec Bus USB PORT ad 0 1 2 3 LPC 1 0 FWH BMC CON KB FDD SER 1 H W Ms SER 2 MONITOR Figure 1 9 Block Diagram of the E7525 Chipset Note This is a general block diagram Please refer to the Motherboard Features for details Chapter 1 Introduction 1 2 Chipset Overview Built upon the functionality and the capability of the E7525 Tumwater chipset the X6DAR 8G X6DAR iG motherboard provides the performance and feature set required for dual processor based computer systems with configuration options optimized for communications presentation storage computation or database applications The Intel E7525 Tumwater chipset consists of the following components the E7525 Tumwater Memory Con troller Hub MCH the I O Controller Hub ICH5R and the PCI X Hub PXH The E7525 Tumwater MCH supports single or dual Nocona processors with Front Side Bus speeds of up to 800 MHz Note Its memory controller pro vides direct connection to two channels of registered DDR333 DDR266 with a marched system bus address and data bandwidths of up to 2 7 GB s DDR 333 per channel The E7525 Tumwater also supports the new PCI Express high speed serial I O interface for superior I O bandwidth The MCH provides configurable x16 PCI Express interfaces which may alternatively be configured as two independent x8 PCI Express interfaces These inter faces support connection of the MCH to a variety of other bridges that a
7. A4 Appendix A BIOS POST Messages Parity Check 2 nnnn Parity error found in the I O bus BIOS attempts to locate the address and display it on the screen If it cannot locate the address it displays Press lt F1 gt to resume lt F2 gt to Setup lt F3 gt for previous Displayed after any recoverable error message Press lt F1 gt to start the boot process or lt F2 gt to enter Setup and change the settings Press lt F3 gt to display the previous screen usually an initialization error of an Option ROM i e an add on card Write down and follow the information shown on the screen Press lt F2 gt to enter Setup Optional message displayed during POST Can be turned off in Setup PS 2 Mouse PS 2 mouse identified Run the 120 Configuration Utility One or more unclaimed block storage devices have the Configuration Request bit set in the LCT Run an 120 Configuration Utility e g the SAC utility System BIOS shadowed System BIOS copied to shadow RAM UMB upper limit segment address nnnn Displays the address nnnn of the upper limit of Upper Memory Blocks indicating released segments of the BIOS which can be reclaimed by a virtual memory manager Video BIOS shadowed Video BIOS successfully copied to shadow RAM AS SUPER X6DAR 8G X6DAR iG User s Manual Notes A 6 Appendix B BIOS POST Codes Appendix B BIOS POST Codes This section lists the POST Power On Self Test codes fo
8. _ O PIMPW Shaa pome Ew TH TT cput Fail Fa 340 pma SSS zea z TMT n i oa SCSI Channel Termination Enable Disable Jumper Settings JPA2 JPA3 Jumper Position Definition Open Enabled Closed Disabled Default Open Please do not change the default setting PLLSEL Select Jumper Settings J4F4 J4F5 DDR lara uars 333 MHz Closed Closed 266MHz Open Open etault Auto Detect SCSI Ch B Term Enable out z ridge Bios RAGE Brides x D Enable 2 JT NEF JPL1 LAN Enable CLR owas ecw Enable JD2 SCSI Ch A Term Enable SUPER X6DAR 8G X6DAR iG User s Manual 2 7 Onboard Indicators GLAN LEDs The Gigabit Ethernet LAN ports lo cated beside the Video port has two LEDs The yellow LED indi cates activity while the other LED may be green amber or off to indi cate the speed of the connection Left Q Right 1 Gb LAN Right LED Indicator Speed LED LED Color Definition Off No Connection Green 10 100 MHz Amber 1 GHz 1 Gb LAN Left LED Indicator Activity LED
9. 16 Chien Ba Road Chung Ho 235 Taipei Hsien Taiwan R O C Tel 886 2 8226 3990 Fax 886 2 8226 3991 Web Site www supermicro com tw Technical Support Email support supermicro com tw Tel 886 2 8228 1366 ext 132 or 139 Chapter 1 Introduction Figure 1 1 SUPER X6DAR 8G X6DAR iG Image G pm eo SUPER X6DAR 8G X6DAR iG User s Manual Figure 1 2 SUPER X6DAR 8G X6DAR iG Motherboard Layout not drawn to scale 4 Pin 8 Pin Pw CPU PW SMB KB 53 2 1D1 a DIMM 1A 20 PinPW gal fo UPS ESH Ela4 DIMM 1B PW Sga o DIMM 2A Fail TE OF jie CPU1 Ps zE Da DIMM 2B cea t moa 5 DIMM 3A 8 DIMM 3B a FANT a J14 DIMM 4A EN DIMM 45 zF a S32 u 3 os d S J o bE FAN2 E7525 od Le Tumwater gt Ss CPU2 North Bridge 1 t E 225 5 GLAN1 PCI X 133MHz PCI Exd ia ee i PCI E x16 ob D GLAN2 IPMI 2 0 a S o w w ji cia a lt z S1 0 GLAN taluelus IcTRU Force PW On a WOR lt ral ee
10. possible Packaged in a 604 pin Flip Chip Micro Pin Grid Array FC mPGA4 platform in a Zero Insertion Force ZIF socket mPGA 604 the Nocona Processor 800 MHz supports Hyper Threading Technology and EM67T Extension is ideal for high performance workstation and server environ ments with up to two processors on one system bus Please refer to the motherboard specifications pages on our web site http www supermicro com products motherboard for updates on supported processors This product is intended to be professionally installed Manual Organization Chapter 1 begins with a checklist of what should be included in your mainboard box describes the features specifications and performance of the motherboard and provides detailed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when you want to install the processor and DIMM memory modules and when mounting the mainboard in the chassis Also refer to this chapter to connect the floppy and hard disk drives SCSI drives the IDE interfaces the parallel and serial ports the keyboard and mouse the power supply and various control panel buttons and indicators If you encounter any problems see Chapter 3 which describes trouble shooting procedures for the video the memory and the setup configuration stored in CMOS Chapter 4 includes an introduction to BIOS and provides detailed informa tion on running the CMOS
11. 1 E Lee 5 DINE ES Bde TT anu Fail si om a 8 mms MD pew aR a lower LED lt Veo 233 D 0O Ay Sez FAN2 ra Retan SE cove cee CER North Bridge NIC1 LED lt Vec a g a255 Nic2LED lt o o ve LANI L re e JECTEX Hamm N Overheat Fan FailLED lt Vec IDE 2 Floppy pranz m l Svo 2 lt F J re fe Les Power Fail LED lt Vcc Force PW Onl Ne x x x wort lt oer E m vox PXH oan sosi Ter BES Ground eset Reset Button S ctr Eo Bridge cog BIOS 7902 2 B z 6 xr Enablel sos Bed Ground pwr gt Power Button AET cree BSel la J TE 5 nas S FAN EA i D JPLA LAN Enable saeia intru B HJPG1 VGA Enable IDZ carer 15 UsB2 5 SP TED M an 5 Chapter 2 Installation use HDD LED HDD LED Pin i 7 Definitions The HDD LED connection is located JF1 on pins 13 and 14 of JF1 Attach Pin X Numbe
12. 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART includes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O supports one PC compatible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The Super I O provides functions that comply with ACPI Advanced Con figuration and Power Interface which includes support of legacy and ACPI power management through an SMI or SCI function pin It also features auto power management to reduce power consumption The IRQs DMAs and I O space resources of the Super I O can flexibly adjust to meet ISA PnP requirements which support ACPI and APM Ad vanced Power Management Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electric Static Discharge ESD can damage electronic components To pre vent damage to your system board it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precauti
13. BIOS POST Codes POSTCode Description 5Ch 60h 62h 64h 66h 67h 68h 69h 6Ah 6Bh 6Ch 6Eh 70h 72h 76h 7Ch 7Dh 7Eh 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch 8Fh 90h 91h 92h 93h 95h 96h 97h 98h Test RAM between 512 and 640 kB Test extended memory Test extended memory address lines Jump to UserPatch1 Configure advanced cache registers Initialize Multi Processor APIC Enable external and CPU caches Setup System Management Mode SMM area Display external L2 cache size Load custom defaults optional Display shadow area message Display possible high address for UMB recovery Display error messages Check for configuration errors Check for keyboard errors Set up hardware interrupt vectors Initialize Intelligent System Monitoring Initialize coprocessor if present Disable onboard Super I O ports and IRQs Late POST device initialization Detect and install external RS232 ports Configure non MCD IDE controllers Detect and install external parallel ports Initialize PC compatible PnP ISA devices Re initialize onboard I O ports Configure Motherboard Configurable Devices optional Initialize BIOS Data Area Enable Non Maskable Interrupts NMIs Initialize Extended BIOS Data Area Test and initialize PS 2 mouse Initialize floppy controller Determine number of ATA drives optional Initialize hard disk controllers Initialize local bus hard disk controllers Jump to UserPatch2 B
14. BIOS controlled Base I O Address Select the base I O address for the parallel port The options are 378 278 and 3BC Interrupt Select the IRQ interrupt request for the parallel port The options are IRQ5 and IRQ7 Mode Specify the parallel port mode The options are Output Only Bi directional EPP and ECP DMA Channel Specify the DMA channel The options are DMA1 and DMAS3 Floppy Disk Controller This setting allows you to assign control of the floppy disk controller The options are Enabled user defined Disabled and Auto BIOS controlled Base I O Address Select the base I O address for the parallel port The options are Primary and Secondary SUPER X6DAR 8G X6DAR iG User s Manual gt DMI Event Logging Access the submenu to make changes to the following settings Event Log Validity This is a display not a setting informing you of the event log validity Event Log Capacity This is a display not a setting informing you of the event log capacity View DMI Event Log Highlight this item and press lt Enter gt to view the contents of the event log Event Logging This setting allows you to Enable or Disable event logging ECC Event Logging This setting allows you to Enable or Disable ECC event logging Mark DMI Events as Read Highlight this item and press lt Enter gt to mark the DMI events as read Clear All DMI Event Logs Select Yes and press lt Enter gt to clear all D
15. Build process or initialization is interrupted or critical with one member missing you must perform a Rebuild to optimized its function ality For a critical array Rebuild operation the optimal drive is the source drive Note 2 If no spare array exists and a hard disk drive fails you need to create a spare before you can rebuild an array To Rebuild an array 1 From the Main Menu select Manage Arrays as shown in the screen below From the List of Arrays select the array you want to Rebuild 2 Press Ctrl R to Rebuild SUPER X6DAR 8G X6DAR iG User s Manual Using the Disk Utilities The Disk Utilities enable you to format or verify the media of your Serial ATA hard disks To access the disk utilities 1 Turn on your computer and press Ctrl A when prompted to access the ARC utility as shown in the screen below 4 bdaplec BALE Cool igeration Mility P ont girat lar Fak Will ties AR n ehil wade VARIRA a a i il carior i WN telect option Appendix C Software Installation Instructions 2 From the ARC menu select Disk Utilities as shown in the screen below ETDAN Th astei Array Coo iguration DSi iky Disk Wel li ties Arrow hays a move certor Eabar be select oplion Esch to asit ested 3 Select the desired disk and press Enter as shown in the screen below ister RAIG Cond biuriti Part H Fart amp SATA Part ef iris present at AUST are displayed
16. PO ports USBO is the bottom connec 3 Pos 3 PO tor and USB1 is the top connector acts ss ey See the table on the right for pin definitions USBO 1 4 Pin 8 Pin pw CPU PW SMB 38 p3 DIMM 1A ese aS ST p Po Eg Elka DIMM 18 Pw amp A J DIMM 2A CPU1 Fail o E anie DIMM 26 a z5 z DIMM 3A a 8 DIMM 3B L 7 __ FANI J14 DIMM 4a el DIMM 4E E a Sze i 522 j e BE FAN2 E7525 ue t Tumwater 3 3 CPU2 North Bridgel ze Sec BLANt PCLX_133MHz PCE agi ia PCI E x16 oo Bd BLANZ IPMI 2 0 zj wy T z jaje lt S1 0 o GLa Jes CTR Force PW Ong EA e Chassis E 1 WOR lt ICH5R JWOR ntru m vex PXH South SCSI Ter BLAIS ANU U 6 cTRt 5 Bridge BIOS 7902 a 2 j a RAGE P scsl lt 9 sion T Battely X EnablepPAT SCS O CTRL B 5 1 Ajs JBT1 we Fon E as NER JPL4 LAN Enable CLR cmosQ Intru 9 PG1 VGA Enable woy Hure a USB2 3 WD SPK LEDSW Cha pter 2 Installation Front Panel Universal Serial Bus Headers Front Panel Universal Serial Bus Pin Defini itions FPUSB0 1 JD2 Pin An Extra USB header USB2 USB3 Number Definition JD2 can be used for front side SN US
17. a gylt Cela SUPER X6DAR 8G X6DAR iG User s Manual You can choose from the following options 1 Format Disk Simulates a low level format of the hard drive by writing zeros to the entire disk Serial ATA drives are low level formatted at the factory and do not need to be low level formatted again Caution Formatting destroys all data on the drive Be sure to back up your data before performing this operation 2 Verify Disk Media Scans the media of a disk drive for defects To Exit Adaptec RAID Configuration Utility 1 Once you have completed RAID array configurations press ESC to exit The following screen will appear 2 Press Yes to exit the Utility 4 fdapice BAIT Configuration Biility For more information regarding Adaptec RAID Utility please refer to Adaptec s User s Guide in the CD included in your shipping package You can also download a copy of Adaptec User s Guide from our web site at www supermicro com Appendix C Software Installation Instructions C 2 Installing Intel s ICH5R Driver by Adaptec and Windows Operating System a Insert Supermicro s bootable CD that came with the package into the CD Drive during the system reboot and the screen Super Micro Driver Diskette Maker will appear b Choose from the list the item Intel ICH5R Driver by 3rd Party Adaptec and press lt ENTER gt c From the next screen displayed choose the OS driver
18. and the lt A gt keys simulta neously to run the Adaptec RAID Configuration Utility when prompted by the following message Press lt Ctrl gt lt A gt for Adaptec RAID Configuration Utility Appendix C Software Installation Instructions The Adaptec Embedded Serial ATA with HostRAID Controller Driver Adaptec s Embedded Serial ATA RAID with HostRAID controller adds RAID functionality to the Serial ATA I O controller by supporting RAID 0 Striping or RAID 1 Mirroring to enhance the industry s pioneer PCl to e host controller products RAID striping RAID 0 can greatly improve hard disk I O performance because of its capability in striping data across multiple drives RAID mirroring RAID 1 allows the data to be simulta neously written to two drives so critical data is always available even if a single hard disk fails Due to the built in functionality the X6DAR 8G X6DAR iG is specially designed to keep pace with the increasing performance demands of computer systems by improving disk I O throughput and providing data accessibility regardless of a single disk failure By incorporating the Adaptec Embedded Serial ATA into the motherboard design Supermicro s X6DAR 8G X6DAR iG offers the user with the benefits of SATARAID without the high costs associated with hardware RAID applications Note For Adaptec s RAID Driver Installation Instructions please refer to the Adaptec RAID Controller User s Guide Emb_SA_RAID_UG pdf
19. ay Force PW 03 Te ete el Y 7 lt PXH ESI Tor 8 MSS a vex South Jem 2 5 ott Eo Bridge fOS 7002 a g G Sl face f oe mises bie 8 VGA Enable H pmo E peip S 3 Chas IS JFN cir ovos Q Pip Ea jaa ES U58273 DOH Pw SPK Leosw 2 23 SUPER X6DAR 8G X6DAR iG User s Manual Watch Dog JWD controls Watch Dog a system monitor that takes action when a software application freezes the system Pins 1 2 will have WD re set the system if a program freezes Pins 2 3 will generate a non maskable interrupt for the pro gram that has frozen requires soft ware implementation Watch Dog must also be enabled in BIOS SCSI Enable Disable X6DAR 8G Only Jumper JPA1 allows you to enable or disable the SCSI Controller The default setting is pins 1 2 to enable all four headers See the table on the right for jumper settings 4 Pin 8 Pin pw CPU Watch Dog Jumper Settings JWD Jumper Position Definition Pins 1 2 Pins 2 3 Open WD to Reset WD to NMI Disabled SCSI Enable Disable Jumper Settings JPA1 Jumper Position Definition Pins 1 2 Enabled Pins 2 3 Disabled SCSI Enable uth dge gsi Enable 1 3LR CMOS 2 USB2 3
20. gt to discard cancel any changes you made You will remain in the Setup utility Save Changes Highlight this item and hit lt Enter gt to save any changes you made You will remain in the Setup utility 4 24 Appendix A BIOS POST Messages Appendix A BIOS POST Messages During the Power On Self Test POST the BIOS will check for problems Ifa problem is found the BIOS will activate an alarm or display a message The following is a list of such BIOS messages Failure Fixed Disk Fixed disk is not working or not configured properly Check to see if fixed disk is attached properly Run Setup Find out if the fixed disk type is correctly identified Stuck key Stuck key on keyboard Keyboard error Keyboard not working Keyboard Controller Failed Keyboard controller failed test May require replacing keyboard controller Keyboard locked Unlock key switch Unlock the system to proceed Monitor type does not match CMOS Run SETUP Monitor type not correctly identified in Setup Shadow Ram Failed at offset nnnn Shadow RAM failed at offset nnnn of the 64k block at which the error was detected System RAM Failed at offset nnnn System RAM failed at offset nnnn of in the 64k block at which the error was detected Extended RAM Failed at offset nnnn Extended memory not working or not configured properly at offset nnnn System battery is dead Replace and run SETUP The CMOS clock battery indicator shows the ba
21. have twisted wires always connects to drive B Floppy Connector Floppy Connector Pin Definitions JP12 The floppy connector is located Pin Number Function Pin Number Function 1 GND 2 FDHDIN on J12 See the table below for 3 GND 4 Reserved ih 5 Ke 6 FDEDIN pin definitions gt GND 5 ne 9 GND 10 Motor Enable 11 GND 12 Drive Select B 13 GND 14 Drive Select A 15 GND 16 Motor Enable 17 GND 18 DIR 19 GND 20 STEP 21 GND 22 Write Data 23 GND 24 Write Gate 25 GND 26 Track 00 27 GND 28 Write Protect 29 GND 30 Read Data 31 GND 32 Side 1 Select 33 GND 34 Diskette 4 Pin 8 Pin ra T Pea tol Floppy sja S om 7 P urai tke os EE o Elas TNT cPu1 aa 2g J EF 116 Dm SSS es id 3 IMN eam gt RN a 5 w mma g 4 A a Free SUE crue EIDE North Bridgel l On pH ze VOR lt 2258 JWOR lt L a JEE Bama r pa BLAN2 TPMIZO ZIRI E iva a lt So E Eh sa Bl vox x ERR scsi tar oS Ty erre Toe Bridge sos B OS f7s02 4 2 a Chas SILEAN gE x Enable sa gug Intru ert aa S II wo CLR cmos x JPLAILAN Enable Ere os Intru 1 Pw SPK USB2 r n LEDSW SUPER X6DAR 8G X6DAR iG User s Manu
22. in the CD that came with this motherboard You can also download a copy of Adaptec s User s Guide from our web site at www supermicro com Using the Adaptec RAID Configuration Utility ARC The Adaptec RAID Configuration Utility is an embedded BIOS Utility including Array Configuration Utility Use this utility when you want to create configure and manage arrays Disk Utilities Use this option to format or verify disks To run the Adaptec RAID Configuration Utility you will need to enable the RAID function in the system BIOS refer to Chapter 4 for System BIOS Configurations and then press the lt Ctrl gt and lt A gt keys simultaneously when prompted to do so during the system startup Refer to the previ ous page for detailed instructions Note To select an option use the arrow keys to highlight the item and then press the lt Enter gt key to select it To return to the previous menu press the lt ESC gt key A Using the Array Configuration Utility ACU The Array Configuration Utility ACU enables you to create manage and delete arrays from the controllers BIOS add and delete spare drives and initialize drives During the system startup press lt Ctrl gt and lt A gt key simultaneously and the main menu will appear C 3 SUPER X6DAR 8G X6DAR iG User s Manual 4 Btapbec BALD Gol igeratia Adagia Pabodini JAT Hon Pil rri Configuration Wilby Flak Lb ties 1 ie eee cursor Esters
23. of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be ap plied for all orders that must be mailed when service is complete This warranty only covers normal consumer use and does not cover dam ages incurred in shipping or from failure due to the alternation misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This chapter describes the Phoenix BIOS Setup utility for the X6DAR 8G X6DAR iG The Phoenix ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of the Supermicro web site lt http www supermicro com gt for any changes to BIOS that may not be reflected in this manual System BIOS The BIOS is the Basic Input Output System used in all IBM PC XT AT and PS 2 compatible computers The Phoenix BIOS flash chip stores the system parameters such type of disk drives video displays etc in the CMOS The CMOS memory requires very little electrical power When the computer is turned off a back up battery provides power to the BIOS flash chip enabling it to retain system parameters Each time the computer is powered on
24. the current BIOS revision and make sure it is newer than your BIOS before downloading Select your motherboard model and down load the BIOS file to your computer Unzip the BIOS update file and you will find the readme txt flash instructions the phlash exe BIOS flash utility the platform bin platform file and the BIOS image xxxxxx rom files Copy these files onto a bootable floppy and reboot your system It is not neces 3 3 SUPER X6DAR 8G X6DAR iG User s Manual sary to set BIOS boot block protection jumpers on the motherboard At the DOS prompt enter the command phlash This will start the flash utility and give you an opportunity to save your current BIOS image Flash the boot block and enter the name of the update BIOS image file Question What s on the CD that came with my motherboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for Windows and security and audio drivers 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside
25. you want to install and press lt Enter gt d Insert a formatted diskette into drive A and press lt Enter gt as prompted e Exit the program after the process is completed Then reboot the system f Insert Microsoft Windows OS Setup CD in the CD Driver and the system will start to boot up from CD g Press the lt F6 gt key when the message Press F6 if you need to install a third party SCSI or RAID driver displays h When the Windows OS Setup screen appears press S to specify additional device s i Insert the driver diskette Adaptec Embedded Serial ATA Raid Controller Driver into Drive A and press the lt Enter gt key j Choose Adaptec Embedded Host Serial ATA Raid Controller from the list indicated in the Windows OS Setup Screen and press the lt Enter gt key k Press the lt Enter gt key to continue the installation process If you need to specify any additional devices to be installed do it at this time Once all devices are specified press the lt Enter gt key to continue with the installation From the Windows OS Setup screen press the lt Enter gt key The OS Setup will automatically load all device files and then continue the Windows OS installation m After Windows OS Installation is completed the system will automati cally reboot SUPER X6DAR 8G X6DAR iG User s Manual B 3 Installing Other Software Programs and Drivers A Installing Drivers other than Adaptec Em
26. 000BASE T RJ45 output e Dual EIDE channels support up to four Ultra DMA IDE devices e 1 floppy port interface up to 2 88 MB e 2 Fast UART 16550A compatible serial ports e PS 2 mouse and PS 2 keyboard ports e Up to 4 USB 2 0 compliant 1 1 compliant Universal Serial Bus ports e Two Serial ATA via ICH5R SATA controller Other e Internal external modem ring on e Wake on LAN WOL e Wake on Ring WOR e Console redirection CD Diskette Utilities e BIOS flash upgrade utility and device drivers Dimensions e ATX Ext 12 x 13 05 304 8 x 331 5 mm Note If ZCR 2015S is used please change the SCSI Bus to PCI 66MHz in the BIOS SUPER X6DAR 8G X6DAR iG User s Manual ar NOCONA PROCESSOR 1 S 2 a m z ja e EJ E 5 5z sz 57 VRM __ NOCONA PROCESSOR 2 CLOCK z ijs lig Ej E 5 6 4GB s ST PCI EXP A X4 ash th Jb N 1 PCI E_ X4 y v 7902 ZCR z3 3 PCI X BUS 100 MHZ 3 E 5 SOCKET x PXH PGE EX A X8 PCI X BUS 100 MHZ Gbit LAN b PCI EXP A X4 ANVIK DDRA 266 4 DDR 266 ee PCI EXP X16 ea ae DIMMs PCL E_ X16 DDRB 266 DDR 333 4 DDR 333 DIMMs HUB 266MB s IDE uDmA 100 PRI SEC PCI BUS 32 BIT ICHSR Lt VGA SATA SATA 0 1 Zz
27. 2 SMB J11 JD1 JF1 JL1 JP11 JOH1 JWOL JWOR SATA0 J3 SATA1 J4 Video LG5 USBO 1 J16 USB2 3 JD2 Memory RAM Slots Floppy Drive Connector G bit Ethernet Ports IPMI 2 0 Connector IDE1 2 Hard Disk Drive Connectors PS 2 Keyboard J34 Mouse J33 Triple Redundant PS Fail Detect Header Power System Mangement Bus See Chapter 2 SCSI Ch A JA2 SCSI Ch B JA1 Headers System Management Bus Header PWR LED Pins1 3 Speaker Pins4 7 Header Front Control Panel Connector Chassis Intrusion Header Alarm Rest Header Defult On Overheat LED Wake on LAN Header Wake on Ring Header Serial ATA Connectors Video Connector Universal Serial Bus Ports Front Panel USBO 1 Headers Note for X6DAR 8G only SUPER X6DAR 8G X6DAR iG User s Manual Motherboard Features CPU e Single or dual Intel 604 pin Xeon 32 bit w EM64T Nocona proces sors at a 800 MHz front side system bus speed Notes The CPU FSB is set at 800 MHz by the Manufacturer Please do not change the CPU FSB setting Please refer to the support section of our web site for a complete listing of supported processors Memory e Eight 72 bit 184 pin gold plated DIMM sockets supporting up to 16 GB DDR 333 PC 2700 or 32 GB DDR 266 PC 2100 Registered ECC Memory SDRAM Manufacturer Setting Notes Memory is set via BIOS Interleaved memory requires memory modules to be installed in pairs See Section 2 3 for details Chipset e I
28. 6DHR iG See the table on the eerie right for pin definitions The fan 3 Tachometer speeds are controlled by Thermal Caution These fan headers use DC power Management via BIOS Please re fer to the Hardware Monitoring Section in the Advanced Setting in BIOS 4 Pin 8 Pin Pw CPU iG PW SMB ps8 jio J32 33 DIMM TA 20 PInPW p4 Baa DIMM 1B m E E of DIMM 2A Cpui Fail lt a Fani Q saue DIMM 2B z z gi DIMM 3A g DIMM 3B L T N a J14 DMM 7A 5 DIMM a5 oo gS a Fan2 H Saz F o 30 E7525 e u Tumwater 5HUS CPU2 Fan4 North Bridgel GLAN ANA PCIX IMEZ EEA z PCI E x16 a GLAN AN2 IPMI 2 0 Tur Fan5 ZCR a Qa lt s o fo LA Jels gt TR Force PW On y 7 WOR lt PXH er A VGA South BIOS 7002 JPAB S CTRL Pace Bridge Sesi eae 8 BI Battedy X Enable PAT CTRL sE e Fan3 ajg JBT4 Chas S T gt as Ga JPL4 LAN Enable CLR cMos Intru O54 F JPG1 VGA Enable WOOL Wo USB2 3 WD OH pw SPK LEDSW 2 16 Chapter 2 Installation USB SMB A System Management Bus header is located at J11 Conn
29. B is present but fails the BIOS POST diskette tests Check to see that the drive is defined with the proper diskette type in Setup and that the diskette drive is attached correctly Incorrect Drive A type run SETUP Type of floppy drive A not correctly identified in Setup Incorrect Drive B type run SETUP Type of floppy drive B not correctly identified in Setup A 2 Appendix A BIOS POST Messages System cache error Cache disabled RAM cache failed and BIOS disabled the cache On older boards check the cache jumpers You may have to replace the cache See your dealer A disabled cache slows system performance considerably CPUID CPU socket number for Multi Processor error EISA CMOS not writeable ServerBlOS2 test error Cannot write to EISA CMOS DMA Test Failed ServerBlOS2 test error Cannot write to extended DMA Direct Memory Access registers Software NMI Failed ServerBIOS2 test error Cannot generate software NMI Non Maskable Interrupt Fail Safe Timer NMI Failed ServerBlOS2 test error Fail Safe Timer takes too long device Address Conflict Address conflict for specified device Allocation Error for device Run ISA or EISA Configuration Utility to resolve resource conflict for the specified device CD ROM Drive CD ROM Drive identified Entering SETUP Starting Setup program Failing Bits nnnn The hex number nnnn is a map of the bits at the RAM address which failed the memory test Ea
30. B access You will need a USB 3 PO s 4 Ground cable to use the connections Re 5 NA fer to the tables on the right for pin definitions Serial Port Pin Definitions COM1 Pin Number Definition Pin Number Definition 1 CD 6 DSR Serial Ports 2 RD 7 RTS 3 TD 8 CTS 4 DTR 9 RI COM Port1 J14 is located beside 5 Ground the Back Panel USBO 1 and COM Port 2 is located next to Chassis Serial Port Pin Definitions Fant See the table on the right COM ee Pin Number Definition Pin Number Definition for pin definitions 1 CD 6 DSR 2 RD 7 RTS 3 TD 8 CTS 4 DTR 9 RI 5 Ground 0 NC COM1 ap 69h E Aa 88 DTA jee 7 aaa ia oe a Ed a bma Put Fail lt ey KB Sd man are DIMM 3 oO 32 DIMI aan E 5 sP pm ell 534 DIM i ha m DI Fian SUE cove Sauls DIMA mr DIMA esse Eth piana TIPMI ZO 2 8 O DIMAN TA HRF J14 PM aa a scare HS DIM 8 Cree face Sage sosi BIOS 7002 7 8 ver 5 LE EnableBPAT SCS sla JBT1 idles h1 Cha CLR CMO Intru 8 FAN 2 VAYAD TO k VANK wo USB2 3 Pw SPK LEDSW USB2 3 COM2 2 15 SUPER X6DAR 8G X6DAR iG User s Manual GLAN1 GLAN2 Gigabit Ethernet Ports A G bit Ethernet ports designated JLAN1 JLAN2 are located beside the Video port on the IO backplane This ports accepts RJ45 type cables Fan Headers 3 pin Fan Header Pin Definitions There are five fan headers Fan 1 CPU and Chassis Fans to Fan 5 on the X6DHR 8G X
31. Cache Line Prefetch The CPU fetches the cache line for 64 bytes if Disabled The CPU fetches both cache lines for 128 bytes as comprised if Enabled P gt 1 O Device Configuration Access the submenu to make changes to the following settings KBC Clock input This setting allows you to set the clock frequency for the Keyboard Clock The options are 6MHz 8MHz and 12 MHz 4 13 SUPER X6DAR 8G X6DAR iG User s Manual On board COM 1 This setting allows you to assign control of serial port A The options are Enabled user defined Disabled and Auto BIOS controlled Base I O Address Select the base I O address for serial port A The options are 3F8 2F8 3E8 and 2E8 Interrupt Select the IRQ interrupt request for serial port A The options are IRQ3 and IRQ4 On board COM 2 This setting allows you to assign control of serial port B The options are Enabled user defined Disabled and Auto BIOS controlled Mode Specify the type of device that will be connected to serial port B The options are Normal IR for an infrared device and ASK IR Base I O Address Select the base I O address for serial port B The options are 3F8 2F8 3E8 and 2E8 Interrupt Select the IRQ interrupt request for serial port B The options are IRQ3 and IRQ4 Chapter 4 BIOS Parallel Port This setting allows you to assign control of the parallel port The options are Enabled user defined Disabled and Auto
32. Jumpers Connector Pins To modify the operation of the motherboard jumpers can be TF used to choose between _ _ umper optional settings Jumpers Cap create shorts between two pins Sy to change the function of the Setting connector Pin 1 is identified with a square solder pad on the printed circuit board See the motherboard layout pages 32 1 ee for jumper locations Note On two pin jumpers sie gt Closed means the jumper is Pin 1 2 short on and Open means the jumper is off the pins CMOS Clear JBT1 is used to clear CMOS Instead of pins this jumper consists of contact pads to prevent the accidental clearing of CMOS To clear CMOS use a metal object such as a small screwdriver to touch both pads at the same time to short the connection Always remove the AC power cord from the system before clearing CMOS JBT1 is located near the FPUSBO 1 headers on the motherboard Note For an ATX power supply you must completely shut down the sys tem remove the AC power cord and then short JBT1 to clear CMOS Do not use the PW _ON connector to clear CMOS oo a pen z a Doma J a Tad fd ma Fe Eak Detect Ret Gest 316 ome aro m PW A z DMT 8 DRAB Ea m o z E
33. MI event logs The default setting is No Chapter 4 BIOS gt Console Redirection Access the submenu to make changes to the following settings COM Port Address Specifies to redirect the console to On board COM A or On board COM B This setting can also be Disabled BAUD Rate Select the BAUD rate for console redirection The options are 300 1200 2400 9600 19 2K 38 4K 57 6K and 115 2K Console Type Choose from the available options to select the console type for console redirection The options are VT100 VT100 8bit PC ANSI 7bit PC ANSI VT100 VT UTF8 Flow Control Choose from the available options to select the flow control for console redirection The options are None XON XOFF and CTS RTS Console Connection Select the console connection either Direct or Via Modem Continue CR after POST Choose whether to continue with console redirection after the POST routine The options are On and Off 4 17 SUPER X6DAR 8G X6DAR iG User s Manual gt Hardware Monitor Logic CPU Temperature Threshold This option allows the user to set a CPU temperature threshold that will activate the alarm system when the CPU temperature reaches this pre set temperature threshold The options are 85 C 90 C 95 C and 100 C Highlight this and hit lt Enter gt to see monitor data for the following items CPU1 Temperature This item displays CPU1 Temperature CPU2 Temperature This item displays CPU2 Tempe
34. R X6DAR 8G X6DAR iG All have an onboard System Hardware Monitor chip that supports PC health monitoring Onboard Voltage Monitors for the CPU Cores Chipset Voltage Memory Voltage 3 3V 5V 12V 12V and 5V Standby An onboard voltage monitor will scan these voltages continuously Once a voltage becomes unstable a warning is given or an error message is sent to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor Fan Status Monitor with Firmware Software On Off Control The PC health monitor can check the RPM status of the cooling fans The onboard CPU and chassis fans are controlled by the Thermal Management via BIOS Environmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user defined threshold The overheat circuitry runs independently from the CPU It can continue to monitor for overheat conditions even when the CPU is in sleep mode Once it detects that the CPU temperature is too high it will automatically turn on the thermal control fan to prevent any overheat 1 10 Chapter 1 Introduction damage to the CPU The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chassis temperature is too high CPU Fan Auto Off in Sleep Mode The CPU fan activates when the power is turned on It continues
35. R 333 PC2700 memory modules are used 4 pieces of double banked memory and 6 pieces of single banked memory are supported Figure 2 2 Installing and Removing DIMMs To Install Insert the Notch p gt module vertically and press down until it snaps into place Pay attention Pan Note Notch osse h should align to me with the alignment receptive point notch at the on the slot bottom 2 6 Notch Chapter 2 Installation Top View of DDR Slot Release Tab L L Release Tab To Remove Use your thumbs to gently push near the edge of both ends of the module This should release it from the slot 2 4 OPorts Control Panel Connectors The I O ports are color coded in conformance with the PC 99 specification See Figure 2 3 below for the colors and locations of the various I O ports Figure 2 3 1 O Port Locations and Definitions SCSI X6DAR 8G Mouse Purple USBO 1 only ooz w EJE E se L u I E Keyboard COM Port1 GLAN1 GLAN2 Video Turquoise 2 7 SUPER X6DAR 8G X6DAR iG User s Manual Front Control Panel JF1 contains header pins for various buttons and indicators that are nor mally located on a control panel at the front of the chassis These connec tors are designed specifically for use with Supermicro server chassis See Figure 2 4 for the descriptions of the various contr
36. SUPER SUPER X6DAR 8G SUPER X6DAR iG USER S MANUAL Revision 1 0 The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA Th
37. Setup utility Appendix A gives information on BIOS POST messages Appendix B provides BIOS POST codes Appendix C Provides software and the OS installation instructions SUPER X6DAR 8G X6DAR iG User s Manual Table of Contents Preface About This Manta siccisa fosecsticn sieteni id a a N iii Manual Org ami Zatio ttt cccsaicdcsceptezcdi as cceesce sted siaaaastsraeecsszenied dvidesievsgustehes doa NESEN iii Chapter 1 Introduction TT OVOIVIOW a ninna vara venenatis ENE 1 1 CheckliStissrsuirse a eit aa ee nae 1 1 Contacting SUPEIMICKO ekseiis eiod ieee raS 1 2 SUPER X6DAR 8G X6DARZ IG IMaQe scssessesessesssseeseseesesteseaeseaneseaes 1 3 SUPER X6DAR 8G X6DAR IG Layout ccesececeeeeeeeseeeeeeeeeeteteeees 1 4 SUPER X6DAR 8G X6DAR iG Quick Reference cecececeeeeeeee 1 5 Motherboard Features cisccsicsecssecctsescccevernccbesti ceuensecseasnansrecesiceetsevaes 1 6 Intel Lindenhurst VS Chipset System Block DiagraM eeeee 1 8 1 2 Chipset OVGIVIOW crsa Er Aner RAE 1 9 123 Special FOAtures ansneenenn shee ieee inne 1 10 BIOS ROCOVElY ironed oie arid een Ate ates 1 10 Recovery from AC Power LOSS c ccecesssssssseeseseeeeeeeeeeaeeaeeaeeseeeeeeaes 1 10 124 PG Health MOnItOninG ices eaeisivavddivavieieentawaiigise aetna 1 10 125 ACPI IPG AtUheS cat terrre enaren reae a steed nare EAEE EAEE EErEE ANR 1 12 1 6 Power Supply r Super lO se a E raa a aa ae a r a Chapter 2 Installat
38. al IPMI J9 is designated as the IPMI Socket for the Motherboard IDE Connectors IDE Connector Pin Definitions J5 J6 e Pin Number Function Pin Number Function There are no jumpers to 1 Reset IDE 2 GND 3 Host Data 7 4 Host Data 8 configure the onboard IDE 1 7 reise se host Daa9 and 2 connectors at J5 i Host Data 5 8 Host Data 10 k 9 Host Data 4 10 Host Data 11 and J6 respectively See 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 the table on the right for pin 15 Host Data1 16 Host Data 14 definitions 17 Host Data 0 18 Host Data 15 19 GND 20 Key 21 DRQ3 22 GND 23 O Write 24 GND 25 O Read 26 GND 27 IOCHRDY 28 BALE 29 DACK3 30 GND 31 IRQ14 32 IOCS16 33 Addr 1 34 GND 35 Addr 0 36 Addr 2 37 Chip SelectO 38 Chip Select 1 39 Activity 40 GND IPMI IDET iDE2 4 Pin 8 Pin Pw CPU is PW SMB 33 jo S pm i OFA Dm pom TNT cpu aif s sane Doma 2 2 TT mi 3 pma FAT m pma 4 a o g Kan SLE crue North Bridge Ee L e PCTExa same TANG TPMIZ 0 alse p3 zer So sj JWOR Me SCSI Ter BIL Al z WoR AM JPA3 a 7 Hee Bios JPRS lt 6 CTRL Enoe Bridge sch gate Lee IS geyk E
39. bedded Serial ATA RAID Controller Driver After you ve installed Windows Operating System a screen as shown be low will appear You are ready to install software programs and drivers that have not yet been installed To install these software programs and drivers click the icons to the right of these items bj SUPER KODAR perwer biari Drivere amp Tek eh SUPERMICR Hinger Desde 20 Drivers amp Torla a Lats E7523 Aa Addypler Storage Hanaga Bromas Edition greats B o 4 SUPERNICAD upare Docker It g Flue civar cick afta arc rasnuae D a m Sube Shad Up Hest Tires For eon eine pienas vied SUPRA CRs pet ie SUPERMICRC Diituis lire Driver Tool Installation Display Screen Note Click the icons showing a hand writing on paper to view the readme files for each item Click the computer icons to the right of these items to install each item from top to the bottom one at atime After installing each item you must re boot the system before moving on to the next item on the list You should install everything here except for the SUPER Doctor utility Intel LDCM and the LAN SCSI driver diskettes which are optional The bottom icon with a CD on it allows you to view the entire contents of the CD Please refer to the Adaptec User s Guide for the installation of Adaptec s Serial ATA RAID Controller Driver Adaptec s User s Guide is included in the CD You can also download a copy of the user s guide from o
40. before you install the CPU heat sink CPU Installation 1 Lift the lever on the CPU socket lift the lever _to the upright position as shown in the picture on the right otherwise you will damage the CPU socket when you turn_on the power Install CPU1 first Socket lever 2 Insert the CPU in the socket and make sure that pin 1 of the CPU aligns with pin 1 of the socket both corners are marked with a triangle If only one CPU is used install it into CPU socket 1 socket 2 is automatically disabled if only one CPU is used 3 Press the lever down until you hear the click to make sure that the CPU is securely installed in the CPU socket Socket lever 2 2 Chapter 2 Installation Heatsink Installation 1 Do not apply any thermal compound to the heatsink or the CPU die the required amount has already been applied 2 Place the heatsink on top of the CPU so that the four mounting holes are aligned with those on the retention mechanism 3 Screw in two diagonal screws ie the 1 and the 2 screws until just snug do not fully tighten the screws to avoid possible damage to the CPU 4 Finish the installation by fully tightening all four screws Heatsink Removal Caution We do not recommend that the CPU or the heatsink be removed However if you do need to un install the heatsink please fol low the instructions below to r
41. ch 1 one in the map indicates a failed bit See errors 230 231 or 232 above for offset address of the failure in System Extended or Shadow memory A 3 SUPER X6DAR 8G X6DAR iG User s Manual Fixed Disk n Fixed disk n 0 3 identified Invalid System Configuration Data Problem with NVRAM CMOS data 1 0 device IRQ conflict O device IRQ conflict error PS 2 Mouse Boot Summary Screen PS 2 Mouse installed nnnn kB Extended RAM Passed Where nnnn is the amount of RAM in kilobytes successfully tested nnnn Cache SRAM Passed Where nnnn is the amount of system cache in kilobytes successfully tested nnnn kB Shadow RAM Passed Where nnnn is the amount of shadow RAM in kilobytes successfully tested nnnn kB System RAM Passed Where nnnn is the amount of system RAM in kilobytes successfully tested One or more 120 Block Storage Devices were excluded from the Setup Boot Menu There was not enough room in the IPL table to display all installed 120 block storage devices Operating system not found Operating system cannot be located on either drive A or drive C Enter Setup and see if fixed disk and drive A are properly identified Parity Check 1 nnnn Parity error found in the system bus BIOS attempts to locate the address and display it on the screen If it cannot locate the address it displays Parity is a method for checking errors in binary data A parity error indicates that some data has been corrupted
42. d 5thu8 12v Required Connection ATX 20 PinPWR 4 Pin PWR 8 Pin PWR CPU1 E7525 Tumwater North Bridge CPU2 og 225 LAN ls PCX 133MHz JECA ort fo ZEHAR Sasatao pranz l So SCSI Ch B 7 VGA Force PW On wi p gt SCSI Ch A 5 ICHSR WOR PXH SCSI Ter BL VER South Bios Pra CTRL Eae Bridge Sosi 7002 a 6 x Enable sosi g y cTkeL peA gt sn res EL EAN JPLA LAN Enable an emase intru 8 Bec Enable JD2 CWDIORWE TI e USB2 3 Pw SP SUPER X6DAR 8G X6DAR iG User s Manual NMI Button NMI Button Pin Definitions JF1 The non maskable interrupt button Pin F Number Definition header is located on pins 19 and 19 Control 20 of JF1 Refer to the table on 20 Ground the right for pin definitions Power LED PWR_LED Pin Definitions JF1 7 Pin The Power LED connection is lo Number Definition cated on pins 15 and 16 of JF1 B ean Refer to the table on the right for pin definitions NMI PWR LED PWSNE 38 jod 33 om
43. dge BIOS 7902 a Q 2 RAGE i SCSI scai Ee 9 8 D x EnableJJPA CTRL sE bad ojx JBT1 ros Chas FAN EFF JPL1 LAN Enable CLR owes Intru E JPG1 VGA Enable JD2 WOOD Two USB2 3 WD OH Pw SPK 2 17 SUPER X6DAR 8G X6DAR iG User s Manual use Power LED Speaker On the JDI header pins 1 3 are for a power LED and pins 4 7 are for the speaker See the table on the right for speaker pin defini tions Note The speaker connec tor pins are for use with an exter nal speaker If you wish to use the onboard speaker you should close pins 6 7 with a jumper Wake On Ring The Wake On Ring header is des ignated JWOR1 This function al lows your computer to receive and wake up by an incoming call to the modem when in suspend state for pin definitions See the table on the right You must have a Wake On Ring card and cable to use this feature Speaker Connector Pin Definitions JD1 Pin Number Function Definition 4 Red wire Speaker data 5 Key No connection 6 Key 7 Speaker data Wake on Ring Pin Definitions JWOR1 Pin Number Definition 1 Ground 2 Wake up WOR PWRLED Speaker
44. e SCSI Ter B C O I South BIOS JPA3 z RAGE edge scsi lt g y X Enable JPAT z e JBT1 Chas 3 FAN R JPL1 LAN Enable CLR mo Intru 9 E JPG1 VGA Enable D2 MWDJOHIT ILD Woy USB2 3 WD OH Pw SP SCSI Ch A trost mf it SCSI Ch B 2 29 SUPER X6DAR 8G X6DAR iG User s Manual Note For software installation instructions please refer to Ap pendix C For Adaptec s SCSI SATA HosiRAID Utility please refer to the CDs that came with your motherboard 2 30 Chapter 3 Troubleshooting 3 1 Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or installing any hardware components Before Power On 1 Make sure no short circuits exist between the motherboard and chassis oa fk WwW MN Disconnect all ribbon wire cables from the motherboard including those for the keyboard and mouse Remove all add on cards Install one CPU making sure it is fully seated and connect the chassis speaker and the power LED to the motherboard Check all jumper settings as well Use only the correct type of onboard CMOS battery as recommended by the Manufacturer Do not install the onboard bat
45. e State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product Unless you request and receive written permission from SUPER MICRO COMPUTER you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2004 by SUPER MICRO COMPUTER INC All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the SUPER X6DAR 8G X6DAR iG motherboard The SUPER X6DAR 8G X6DAR iG supports single or dual Intel 32 bit w EM64T Nocona pro cessors at a 800 MHz front side bus Based upon Intel s NetBurst microarchitecture with EM64T support the Nocona processor supports the IA 32 software and includes features found in the Xeon processor such as a Rapid Execution Engine and Hyper Pipelined Technology which in cludes a multi stage pipeline allowing the processor to reach much higher core frequencies The 800 MHz system bus is a quad pumped bus running off a 200 MHz system clock making 6 4 GBper second data transfer rates
46. eaved memory scheme is used you must install two modules at a time beginning with Bank 1 then Bank 2 and so on see Section 2 3 6 Check the position of the 115V 230V switch on the power supply Losing the System s Setup Configuration 1 Ensure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup informa tion Refer to Section 1 6 for details on recommended power supplies 2 The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If the above steps do not fix the Setup Configuration problem contact your vendor for repairs 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a motherboard manufacturer Super Micro does not sell directly to end users so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 3 2 Chapter 3 Troubleshooting 1 Please go through the Troubleshooting Procedures and Frequently Asked Question FAQ sections in this chapter or see the FAQs on our web site htto Awww supermicro com support faqs before con tacting Technical Support 2 BIOS upgrades can be downloaded from our web site at http www supermicro com suppor
47. ect the appropriate cable here to uti lize SMB on your system ATX PS 2 Keyboard and PS 2 Mouse Ports SMB Header Pin Definitions J11 Pin Number Definition 1 Data 2 Ground 3 Clock 4 No Connection PS 2 Keyboard and Mouse Port Pin Definitions J34 J33 Pin The ATX PS 2 Keyboard J34 and Number Definition PS 2 Mouse J33 are located be ae side the USBO 1 Ports on the Ground backpanel See the table at right 5 Clock for pin definitions See Figure 2 G Ng 3 for the locations of each SMB Keyboard Mouse f 4 Pin 8 Pin pw CPU PW SMB p38 jio E i cE DIMM TA n y laal DIMM 1B gpg HN DIMM 2A cPU1 Fail FE atts DIMM 2B G28 mad 5 DIMM 3A 8 DIMM 3B LATS ar J14 DIMM 4A 5H DIMM 4B aH 5S 2G rg ESO i S J os Be FAN2 E7525 u t Tumwater 3 3 CPU2 North Bridge L I Z lt LAN1 PCI X _133MHz PCEEXq fia Ad PCI E x16 i pInTS LAN2 IPMI 2 0 a e o lufe T zjale lt 7 S O 0 GLAN aqlse 35 cTRu Force PW On R 7 WOR lt ICH5R JWOR m VGA PXH South Scsi ter BraS 6 cTRL Bri
48. ect ian fapduere Benita Talect Beat faatura gt Boot Features Access the submenu to make changes to the following settings Quick Boot Mode If enabled this feature will speed up the POST Power On Self Test routine after the computer is turned on The settings are Enabled and Disabled If Disabled the POST routine will run at normal speed Quiet Boot This setting allows you to Enable or Disable the diagnostic screen during boot up 4 7 SUPER X6DAR 8G X6DAR iG User s Manual ACPI Mode Use the setting to determine if you want to employ ACPI Advanced Configuration and Power Interface power management on your system The options are Yes and No Power Button Behavior This setting allows you to choose how the system powers down upon pressing the power button The options are Instant Off and 4 sec overide Keyboard on Now Function This option alows you to select how the system may be resumed from the S3 S5 state The options are Space or Password Power Loss Control This setting allows you to choose how the system will react when power returns after an unexpected loss of power The options are Stay On Power Off and Last State Watch Dog This setting is for enabling the Watch Dog feature The options are Enabled and Disabled Summary Screen This setting allows you to Enable or Disable the summary screen gt Memory Cache Cache System BIOS Area This
49. ed that you use a high quality power supply that meets ATX power supply Specification 2 02 or above It must also be SSI compliant info at http www ssiforum org Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges Please refer to the next page for additional information NOTES 1 A 12V 8 pin power JID1 is required to support Intel Nocona CPUs In addition a 12V 4 pin PWR connection is also re quired for the system to function properly See Section 2 5 for details on connecting the power supply cables 2 Be sure to use the correct type of onboard CMOS battery as specified by the Manufacturer Do not install the CMOS battery up side down to avoid possible explosion SUPER X6DAR 8G X6DAR iG User s Manual 1 7 Super I O The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selec tion a clock generator drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports 360 K 720 K 1 2 M 1 44 M or
50. ed to the PC such as VCRs TVs tele phones and stereos SUPER X6DAR 8G X6DAR iG User s Manual In addition to enabling operating system directed power management ACPI provides a generic system event mechanism for Plug and Play and an oper ating system independent interface for configuration control ACPI lever ages the Plug and Play BIOS data structures while providing a processor architecture independent implementation that is compatible with Windows Operating Systems Microsoft OnNow The OnNow design initiative is a comprehensive system wide approach to system and device power control OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other re quests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button to make the system enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up During the SoftOff state the ATX power supply provides power to keep the re quired circuitry in the system alive In case the system malfuncti
51. eeedeeaevenarstencvtaeed B 1 Appendix C Installing Software Drivers and the Windows Operating System vi Chapter 1 Introduction Chapter 1 Introduction 1 1 Overview Checklist Congratulations on purchasing your computer motherboard from an ac knowledged leader in the industry Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Check that the following items have all been included with your mother board If anything listed here is damaged or missing contact your retailer One 1 Supermicro Mainboard One 1 ribbon cable for IDE devices One 1 floppy ribbon cable One 1 Supermicro CD or diskettes containing drivers and utilities One 1 User s BIOS Manual 1 1 SUPER X6DAR 8G X6DAR iG User s Manual Contacting Supermicro Headquarters Address SuperMicro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 Email marketing supermicro com General Information support supermicro com Technical Support Web Site www supermicro com Europe Address SuperMicro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro n General Information support supermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address SuperMicro Taiwan D5 4F No
52. emove the heatsink to prevent damage done to the CPU or the CPU socket 2 3 Heatsink Screw 1 Screw 2 SUPER X6DAR 8G X6DAR iG User s Manual 1 Unscrew and remove the heatsink Screw 1 Screw 3 screws from the motherboard in the oe PA sequence as show in the second MAy MIU Il PER picture on the right 2 Hold the heatsink as show in the picture on the right and gently wriggle the heatsink to loosen it from the CPU Do not use excessive force when Screw 4 wriggling the heatsink Screw 2 3 Once the CPU is loosened from the heatsink remove the heatsink from the CPU socket 4 Clean the surface of the CPU and the heatsink to get rid of the old thermal grease Reapply the proper amount of thermal grease on the surface before you re install the CPU and the heatsink Figure 2 1 PGA604 Socket Empty and with Processor Installed A Warning Make sure to lift the lever upward when installing the CPU If Empty socket the lever is only Triangle raised partially Processor damage to the installed socket or CPU may occur Triangle 2 4 Chapter 2 Installation Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis Make sure that the locations of all the mounting holes for both the motherboard and the chassis match Although a chassis may have both plastic and metal mounti
53. following sub menu screen for detailed options of these items Set the correct configurations accordingly The items included in the sub menu are 4 4 Chapter 4 BIOS Lorem fperifie Falp Co Parian Cy Linders i fzer yra an i papara H pra thia Hesla Anmah e Di Heads eae Pieri E he ere a aerians l inwtal ied 5 a Reape fot pou maleat Has imun Capac iigs dstaretied yp of Resteun Capacity i Ln Parmar a oye TI AR driun Tetal Proters Hi L lal larti E m kere Masirmun Capacity romuebiie ais inh drive i fale leaner Trass Pere Dinak bead 1 Lii fade Central Dinah bed 1 I fit iati EDizabiad Taan ar Rade TEtamiari Ulua Bhi Hade CB ie ah liid Type Selects the type of IDE hard drive The options are Auto allows BIOS to automatically determine the hard drive s capacity number of heads Sectors Maximum Capacity LBA Format ect Enter a number from 1 39 to select a predetermined type of hard drive CD ROM and ATAPI Removable The option User will allow the user to enter the parameters of the HDD installed at this connection The option Auto will allow BIOS to automatically configure the parameters of the HDD installed at the connection Choose the option 1 39 to select a pre determined HDD type Select CD ROM if a CD ROM drive is installed Select ATAPI if a removable disk drive is installed 4 5 SUPER X6DAR 8G X6DAR iG User s Manual Multi Sector Transfers Select the
54. grate Creating a RAID 0 from one new drive and Note one drive with data you wish to preserve RAID 1 Build1 Any time you wish to create a RAID 1 but especially if you have data on one drive that you wish to preserve RAID 1 Clear Creating a RAID 1 on new drives or when you want to ensure that the array contains no data after creation RAID 1 Quick Fastest way to create a RAID 1 Appropriate when using new drives RAID 1 Init Note If you select Migrate for RAID 0 or Build for RAID 1 you will be asked to select the source drive The contents of the source drive will be preserved However the data on the new drive will be lost C 8 Appendix C Software Installation Instructions 5 When you are finished press Done as the screen shown below TF Fj Properties beraj Type MID OCStr pe brrey Lobe Siripe Apri Sige BASE 4H f Sirips dice tiD Create SALI ola fo lali dene Notes 1 Before adding a new drive to an array back up any data contained on the new drive Otherwise all data will be lost 2 If you stop the Build or Clear process on a RAID 1 from ACU you can restart it by pressing Ctrl R 3 A RAID 1 created using the Quick Init option may return some data mis compares if you later run a consistency check This is normal and is not a cause for concern 4 The ACU allows you to use drives of different sizes in a RAID However during a build operation only the smaller drive ca
55. ible If the drive is used in an array you may not be able to use the array again Do not initialize a disk that is part of a boot array To determine which disks are associated with a particular array please refer to Viewing Array Properties To initialize drives 1 Turn on your computer and press Ctrl A when prompted to access the ARC utility 2 From the ARC menu select Array Configuration Utility ACU as shown in the screen below d kdaplec BALD Conf igeration Mility F Blak O00 Utes 3 Select Initialize Drives as shown in the screen below Appendix C Software Installation Instructions f Bal Pad amme rage sale Array fe Tetris foteeare ee Pie 4 Use the up and down arrow keys to highlight the disk you wish to initialize and press Insert as shown in the screen below Select debs fee lal biahizad eo BE i a 44 DL WDC Waid 11 461 SUPER X6DAR 8G X6DAR iG User s Manual 5 Repeat Step 4 so that both drives to be initialized are selected as shown in the screen below tiji drives for initie iga lected Dele Be UEC HODGE 46 WOE WHL i 3 fa UOC Maen 6 Press Enter 7 Read the warning message as shown in the screen 8 Make sure that you have selected the correct disk drives to initialize If correct type Y to continue C 14 Appendix C Software Installation Instructions Rebuilding Arrays Note 1 Rebuilding applies to Fault Tolerant array RAID 1 only If an array
56. ion Irae Span i be Help tlakd hhift Tab ar Eater selects field Removable Devices Highlight and press lt Enter gt to expand the field See details on how to change the order and specs of devices in the Item Specific Help window CD ROM Drive See details on how to change the order and specs of the CD ROM drive in the Item Specific Help window Hard Drive Highlight and press lt Enter gt to expand the field See details on how to change the order and specs of hard drives in the Item Specific Help window 4 22 Chapter 4 BIOS 4 7 Exit Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display All Exit BIOS settings are described in this section item Epecific linip Erir Discariieg Changes Exit Eyrten Estep amd Load Tanap Bef aiiles fe phar changed be Discard Changes iJ Gaur Changes Exit Saving Changes Highlight this item and hit lt Enter gt to save any changes you made and to exit the BIOS Setup utility Exit Discarding Changes Highlight this item and hit lt Enter gt to exit the BIOS Setup utility without saving any changes you may have made Load Setup Defaults Highlight this item and hit lt Enter gt to load the default settings for all items in the BIOS Setup These are the safest settings to use 4 23 SUPER X6DAR 8G X6DAR iG User s Manual Discard Changes Highlight this item and hit lt Enter
57. ion 2 1 Static Sensitive DEVICES 2A ve niectcsvcseaseses tend iraia iiaia a 2 1 PrecaUtOMS Aaaa e e tee e aaa ER 2 1 Unpacking iras devdececastess vets ianari trari ania ria aa irina Eea N VTN 2 1 2 2 Nocona Processor and Heatsink Installation eee eee eee eeeeee 2 2 2 39 Installing DIMMS escsisessccassiecceseceersecstevscensers ate vsuateacensciecersarneereesneaeiadivedteeseenbees 2 6 2 4 I O Ports Control Panel Connectors ccccecceeeeseseeeeeeeeeseeeeeeeeeeeeeeeeeaeeeeeees 2 7 2 5 Connecting Cables ATX Power Connector Processor Power C nneCtO sssi iia a 2 9 NMI BUOM asta r A a e Ae RE Power LED a HDD WED E N NIGUNICZ LED sirrien aana eaa e tines aati eaey 2 11 Overheat Fan Fail LED ececcecceceeceeeeeeeeeceeeeeeeeeaeeeeeeeeseeeeeeeneeeees 2 12 Power Fall WED a sissies dene wane anion Wantirna este 2 12 Table of Contents Reset BUNTON Sessi ania iadaa eeen E EEE ie eS POWwEr BUON Asetet neea E cas REEL NELA Chassis INtrUSiOM sana A GNE Universal Serial Bus Front Panel Universal Serial Bus Headers sessssessessrersersresnreens 2 15 SSSA POMS es ccs sscdbtcseiekseaiccaladsviecadeesSetaadsennsdnssass ens chs cbaseseadiedesaddedestsecsaces 2 15 GLAN Ethernet Pott asnes n i 2 16 Fatt HOA CMS tazeisecesetissiseesssuyesceccaceesescenpseazeseeteaseeteesnes Eaa ETENE EAER 2 16 SMB wetted snl EE eee EE E E E ees tneanitivein ty auianteAtley 2 17 ATX PS 2 Keyboard and Mouse Potts
58. ions are Enabled and Disabled DRAM Data Integrity Mode If enabled this feature allows the data stored in the DRMA memory to be integrated for faster data processing The options are 72 bit ECC 144 bit ECC Auto Algorithms and Disabled ECC Error Type This setting lets you select which type of interrupt to be activated as a result of an ECC error The options are None NMI Non Maskable Interrupt SMI System Management Interrupt and SCI System Control Interrupt SERR Signal Condition This setting specifies the conditions required to be qualified as an ECC error The options are None Single Bit Multiple Bit and Both USB Function This setting allows you to Enable or Disable all functions for the USB devices specified Legacy USB Support This setting allows you to enable support for Legacy USB devices The settings are Enabled and Disabled 4 12 Chapter 4 BIOS gt Advanced Processor Options Access the submenu to make changes to the following settings CPU Speed This is a display that indicates the speed of the installed processor Hyper threading This setting allows you to Enable or Disable the function of hyper threading Enabling hyper threading results in increased CPU performance Applicable for the XP systems Machine Checking This setting allows you to Enable or Disable Machine Checking If Enabled the OS will debug the system during system reset after a system crash Adjacent
59. le remote keyboard CBh Redirect Int 13h to Memory Technologies Devices such as ROM RAM PCMCIA and serial disk CCh Redirect Int 10h to enable remote serial video B 4 Appendix B BIOS POST Codes POSTCode Description CDh CEh D2h Re map I O and memory for PCMCIA Initialize digitizer and display message Unknown interrupt The following are for boot block in Flash ROM POSTCode_ Description EOh Eth E2h E3h E4h E5h E6h E7h E8h E9h EAh EBh ECh EDh EEh EFh FOh Fih F2h F3h F4h F5h F6h F7h Initialize the chipset Initialize the bridge Initialize the CPU Initialize system timer Initialize system I O Check force recovery boot Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize Multi Processor Initialize OEM special code Initialize PIC and DMA Initialize Memory type Initialize Memory size Shadow Boot Block System memory test Initialize interrupt vectors Initialize Run Time Clock Initialize video Initialize System Management Manager Output one beep Clear Huge Segment Boot to Mini DOS Boot to Full DOS Ifthe BIOS detects error 2C 2E or 30 base 512K RAM error it displays an additional word bitmap xxxx indicating the address line or bits that failed For example 2C 0002 means address line 1 bit one set has failed 2E 1020 means data bits 12 and 5 bits 12 and 5 set have failed in the lower 16 bits The BIOS also sends the bitmap to the port 80 LED display It first di
60. light the month day and year fields and enter the correct data Press the lt Enter gt key to save the data BIOS Date This feature allows BIOS to automatically display the BIOS date 4 3 SUPER X6DAR 8G X6DAR iG User s Manual Legacy Diskette A This setting allows the user to set the type of floppy disk drive installed as diskette A The options are Disabled 360Kb 5 25 in 1 2MB 5 25 in 720Kb 3 5 in 1 44 1 25MB 3 5 in and 2 88MB 3 5 in Parallel ATA This setting allows the user to enable or disable the funciton of Parallel ATA The options are Disabled Channel 0 Channel 1 and Both Serial ATA This setting allows the user to enable or disable the funciton of Serial ATA The options are Disabled and Enabled Serial ATA RAID Feature Select Enable to enable Serial ATA RAID Functions For the Windows OS environment use the RAID driver if this feature is set to Enabled If Disabled use the Non RAID driver Native Mode Operation This option allows the user to select the Native Mode for ATA Some Operating Systems are not supported by the Native Mode The options are Serial ATA Parallel ATA Auto and Both PIDE Channel 0 Master Slave IDE Channel 1 Master Slave IDE Channel 2 Master IDE Channel 3 Master These settings allow the user to set the parameters of IDE Channel 0 Master Slave IDE Channel 1 Master Slave IDE Channel 2 Master IDE Channel 3 Master slots Hit lt Enter gt to activate the
61. n ROM The options are Enabled and Disabled Enable Master This setting allows you to enable the selected device as the PCI bus master The options are Enabled and Disabled Latency Timer This setting allows you to set the clock rate for Bus Master A high prioity high throughout device may benefit from a greater Clock rate The options are Default 0020h 0040h 0060h 0080h O0AOh 00COh and OOEOh For Unix Novell and other Operating Systems please select the option other If a drive fails after the installation of a new software you might want to change this settiing and try again Different OS requires different Bus Master clock rate Large Disk Access Mode This setting determines how large hard drives are to be accessed The options are DOS or Other for Unix Novellle NetWare and other operating systems gt Advanced Chipset Control Access the submenu to make changes to the following settings Force Compliance Mode Entry This feature allows you to enable the PCI Express Compliance 1 0 Mode The options are Disabled or Enabled 4 11 SUPER X6DAR 8G X6DAR iG User s Manual Memory RAS Feature Control Select this option to enable the Memory RAS Feature Control The options are Standard Mirroring and Sparing Clock Spectrum Feature If Enabled BIOS will monitor the level of Electromagnetic Interference caused by the components and will attempt to decrease the interference whenever needed The opt
62. n be selected as the source or first drive 5 When migrating from single volume to RAID 0 migrating from a larger drive to a smaller drive is allowed However the destination drive must be at least half the capacity of the source drive 6 Adaptec does not recommend that you migrate or build an array on Windows dynamic disks volumes as it will result in data loss Warning Do not interrupt the creation of a RAID 0 using the Migrate option If you do you will not be able to restart or to recover the data that was on the source drive C 9 SUPER X6DAR 8G X6DAR iG User s Manual Adding a Bootable Array To make an array bootable 1 From the Main menu select Manage Arrays 2 From the List of Arrays select the array you want to make bootable and press Ctrl B 3 Enter Y to create a bootable array when the following message is displayed This will make all other existing bootable array non bootable Do you want to make this array bootable Yes No Then a bootable array will be created An asterisk will appear next to the bootable array as shown in the picture below Deleting a Bootable Array To delete a bootable array 1 From the Main menu select Manage Arrays 2 From the List of Arrays select the bootable array you want to delete and press Ctrl B a bootable array is the array marked with an asterisk as shown in the picture above 3 Enter Y to delete a bootable array
63. ng fasteners metal ones are highly recommended due to the fact that they ground the motherboard to the chassis Make sure that the metal standoffs click in or are screwed in tightly Then use a screwdriver to secure the motherboard on the motherboard tray 2 5 SUPER X6DAR 8G X6DAR iG User s Manual 2 3 Installing DIMMs Note Check the Supermicro web site for recommended memory modules http www supermicro com TECHSUPPORT FAQs Memory_vendors htm CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage Also note that the memory is interleaved to improve performance see step 1 DIMM Installation See Figure 2 2 1 Insert the desired number of DIMMs into the memory slots starting with DIMM 1A The memory scheme is interleaved so you must install two modules at a time beginning with DIMM 1A then DIMM 1B and so on 2 Insert each DIMM module vertically into its slot Pay attention to the notch along the bottom of the module to prevent inserting the DIMM module incorrectly 3 Gently press down on the DIMM module until it snaps into place in the slot Repeat for all modules see step 1 above Memory Support The X6DAR 8G X6DAR iG supports up to 32 16 GB of Registered DDR 266 333 PC2100 2700 memory recommended by the Manufacturer All motherboards were designed to support 2 GB modules in each slot but has only been verified for up to 1 0 GB modules If Reg ECC DD
64. ning the system on or 2 When the message shown below appears briefly at the bottom of the screen during the POST Power On Self Test press the lt Delete gt key to activate the main Setup menu Press the lt Delete gt key to enter Setup 4 3 Main BIOS Setup All main Setup options are described in this section The main BIOS Setup screen is displayed below Use the Up Down arrow keys to move among the different settings in each menu Use the Left Right arrow keys to change the options for each setting Press the lt Esc gt key to exit the CMOS Setup Menu The next section describes in detail how to navigate through the menus Items that use submenus are indicated with the B icon With the item highlighted press the lt Enter gt key to access the submenu 4 2 Chapter 4 BIOS Main BIOS Setup Menu tes Epes iF le Help Ta cl se ymt Dalar iEt it Aa a Ti e Biot Pate pT sg lade ae isla Tenet Dikara fiz iin A Am Parallel aTh Herk Serial Albee Bosak bedi J Hart jes Heis Ope rat lant eto E IE Chine A Paster b IHE Chanmai i isr E IE Chanet i Faster b IH Chinmai 1 Cisr H IM Chainer E Raster b IME Charme J acter Syotum Heme ys Kaan KEI Ens nomen el Phe erry 8 CENAH HB Main Setup Features System Time To set the system date and time key in the correct information in the appropriate fields Then press the lt Enter gt key to save the data System Date Using the arrow keys high
65. nly have a single power supply installed you should leave the pins open the default setting to prevent false alarms See the table on the right for jumper settings PWR Fail Alarm Reset i 4 Pin 8 Pi apin Pin pw cpu 5 E a ob CP s n IJ mme i a 1D1 gea 5 8 a id Fail adod e eeN cpu1 Pas in z TNT kia mn ay amp as on Eg 314 Na 5 PW oO 8 Dmae _ a FE 7 t Fail Y FEA EAN ers SE z2 Tumwater SULS cPu2 ric North Bridge ood ski L RETE FAN1 L POX INEZ Jeca ami tsa aa POLE Hammi a pean TPMI2 0 2 8 x z fale E i E Ga 5 p TEHER WOR WON a al ba PxH ZAA scsi Ter BH 5 mm 5 CTRL Rios Bridge cog BIOS 7902 u Sele O hss gti i ime ESB e ae ie nos SC FAN2 OR JPL1 LAN Enable cir cmos Q Chas 161 Fan FsPGAVGA Enable ID2 lo ussar iny LEDSW 2 20 Chapter 2 Installation 3rd PWR Supply PWR Fault Detect JP10 3rd PWR Supply PWR Fault Detect Jumper Settings JP10 The system can notify you in the Jumper t of ly fail Position Definition event of a power supply failure Open Disabled This feature assumes that three Closed _ Enabled power supply units are installed in the chassis with one acting as a backup If you
66. npemEa era Bed da sf k OR JPL1 LAN Enable CLR CMOS tae EAN a N YHJPG1 VGA Enable nee Srl Chas 2 FANS LEDSW Intru Q 1 MAMMA ATT Tara 2 28 Chapter 2 Installation Ultra320 SCSI Connectors X6DAR 8G Only Refer to the table below for the pin definitions of the Ultra320 SCSI connectors located at JA1 and JA2 68 pin Ultra320 SCSI Connectors JA1 and JA2 Connector Connector Contact Contact Number Signal Names Number Signal Names 1 DB 12 35 DB 12 2 DB 13 36 DB 13 3 DB 14 37 DB 14 4 DB 15 38 DB 15 5 DB P1 39 DB P1 6 DB 0 40 DB 0 7 DB 1 41 DB 1 8 DB 2 42 DB 2 9 DB 3 43 DB 3 10 DB 4 44 DB 4 11 DB 5 45 DB 5 12 DB 6 46 DB 6 13 DB 7 47 DB 7 14 DB P 48 DB P 15 GROUND 49 GROUND 16 DIFFSENS 50 GROUND i7 TERMPWR 51 TERMPWR 18 TERMPWR 52 TERMPWR 19 RESERVED 53 RESERVED 20 GROUND 54 GROUND 21 ATN 55 ATN 22 GROUND 56 GROUND 23 BSY 57 BSY 24 ACK 58 ACK 25 RST 59 RST 26 MSG 60 MSG 27 SEL 61 SEL 28 C D 62 C D 29 REQ 63 REQ 30 l1 O 64 I O 31 DB 8 65 DB 8 32 DB 9 66 DB 9 o 33 DB 10 67 DB 10 Eo we 34 DB 11 68 DB 11 CTRU ce PW oneg PXH e
67. ntel E7525 Tumwater chipset Expansion Slots e _X6DAR 8G X6DAR iG One x16 PCI Express slot One x4 PCI Express slot or One 64 bit 133 MHz PCI X 3 3V slot BIOS 8 Mb Phoenix Flash ROM e APM 1 2 DMI 2 1 PCI 2 2 ACPI 1 0 Plug and Play PnP SMBIOS 2 3 PC Health Monitoring e Onboard voltage monitors for CPU cores chipset voltage memory voltage 3 3V 5V 12V 12V and 5V standby e Fan status monitor with firmware software on off control e CPU chassis temperature monitors e Environmental temperature monitor and control e CPU fan auto off in sleep mode e CPU slow down on temperature overheat e CPU thermal trip support for processor protection 5V standby alert LED e Power up mode control for recovery from AC power loss 1 6 Chapter 1 Introduction e Auto switching voltage regulator for CPU core e System overheat LED and control e Chassis intrusion detection e System resource alert via Supero Doctor III ACPI Features optional e Microsoft OnNow e Slow blinking LED for suspend state indicator e Main switch override mechanism Onboard I O e Adaptec 7902 Controller supporting Dual Channel Ultra 320 SCSI with RAIDO RAID1 RAID10 JBOD support X6DAR 8G only e Support for Zero Channel RAID with Adaptec 2015S ZCR Card Card not included See note below e One IPMI 2 0 socket e One Intel 82546GB Dual Port Gigabit Ethernet Controller with support for 10BASE T 100BASE TX and 1
68. ntel ICH5R I O Controller Hub Located in the South Bridge of the Intel E7525 Tumwater Chipset the ICH5R I O Controller Hub provides the I O subsystem with access to the rest of the system It supports 2 channel Ultra ATA 100 Bus Master IDE controller PATA and two Serial ATA SATA Host Controllers which support up to two Serial ATA ports and up to two RAID drives SUPER X6DAR 8G X6DAR iG User s Manual Configuring BIOS settings for the SATA RAID Functions 1 Press the lt Del gt key during system bootup to enter the BIOS Setup Utility Note If it is the first time to power on the system we recommend that you load the Optimized Default Settings If you have already done so please skip to Step 3 2 Use the arrow keys to select the Exit Menu Once in the Exit Menu scroll down the menu to select the item Load Optimized Default settings and press the lt Enter gt key Select OK to confirm the selection Press the lt Enter gt key to load the default settings to the BIOS 3 Use the arrow keys to select the Main Menu in the BIOS 4 Scroll down to the next item SATA RAID Enable select Enabled and press lt Enter gt 5 Tap the lt Esc gt key and scroll down to Exit Select Save and Exit from the Exit menu Press the lt Enter gt key to save the changes and exit the BIOS 6 Once you ve exited the BIOS Utility the system will re boot 7 During the system startup press the lt Ctrl gt
69. number of transfer sectors The options are Disabled 2 4 6 8 and 16 Sectors LBA Mode Control This item determines whether Phoenix BIOS will access the IDE Primary Master Device via LBA mode The options are Disabled and Enabled 32 Bit I O Selects 32 Bit I O operation The options are Enabled and Disabled Transfer Mode Selects the transfer mode The options are Standard Fast PlO1 Fast PIO2 Fast PIO3 Fast PlO4 FPIO3 DMA1 and FPIO4 DMA2 Ultra DMA Mode Selects Ultra DMA Mode The options are Disabled Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 and Mode 6 System Memory This display informs you how much system memory is recognized as being present in the system Extended Memory This display informs you how much extended memory is recognized as being present in the system Chapter 4 BIOS 4 4 Advanced Setup Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display The items with a triangle beside them have sub menus that can be accessed by highlighting the item and pressing lt Enter gt Options for PIR settings are displayed by highlighting the setting option using the arrow keys and pressing lt Enter gt All Advanced BIOS Setup options are described in this section b Menry Cacha b PO Cintiguratine kdianisd Chipasr Coatral E draje Proctiser Opi does gt Let Beira Conf ip ret iban ME Beant Legging nmanlla Redir
70. oftware Installation Instructions elected Ir H 468 6 W aan Bi MIE Widoba Sarat Assigning Array Properties Once you ve create a new array you are ready to assign the properties to the array Caution Once the array is created and its properties are assigned you cannot change the array properties using the ACU You will need to use the Adaptec Storage Manager Browser Edition Refer to Adaptec s User s Guide in the enclosed CD To assign properties to the new array 1 In the Array Properties menu as shown in the following screen select an array type and press Enter Note that only the available array types RAID 0 and RAID1 are dis played on the screen RAID O or RAID 1 requires two drives SUPER X6DAR 8G X6DAR iG User s Manual PRID BISRe i TALE Mirror irra Size Str ige Size Create BAT vla 2 Under the item Arrays Label type in an label and press Enter Note The label shall not be more than 15 characters 3 For RAID 0 select the desired stripe size Note Available stripe sizes are 16 32 and 64 KB default It is recommended that you do not change the default setting 4 The item Create RAID via allows you to select between the different creating methods for RAID 0 and RAID 1 The following table gives examples of when each is appropriate Raid Level Create Via When Appropriate RAID 0 No Init Creating a RAID 0 on new drives RAID 0 Mi
71. ol panel buttons and LED indicators Refer to the following section for descriptions and pin defini tions Figure 2 4 JF1 Header Pins Groune NMI X x Power LED Vcc HDD LED Vcc NIC1 LED Vcc NIC2 LED Vcc Overheat Fan Fail LED Vcc Power Fail LED Vcc Ground Reset gt Reset Button Ground Pwr Power Button 2 8 Chapter 2 Installation 2 5 Connecting Cables use ATX Power Connector The primary power supply connector J1B1 on the X6DAR 8G X6DAR iG meets the SSI Su perset ATX 20 pin specification You must also connect the 4 pin J38 processor power connector to your power supply Refer to the table below right for the J38 4 Pin 12V connector Processor Power Connectors In addition to the Primary ATX power connector above there is a 12V 8 pin processor power connector The 12V _8 pin con nector at JiD1 must also be con nected to your power supply for CPU consumption See the table on the right for pin definitions ATX 20 pin Power Connector Pin Definitions J1B1 Pin Definition Pin Definition 11 3 3V 1 3 3V 12 12V 2 3 3V 13 COM 3 COM 14 PS_ON 4 5V 15 COM 5 COM 16 COM 6 5V 17 COM F COM 18 5V 8 PW OK 19 5V 9 5VSB 20 5V 10 12V 12V 4 pin Connector J38 Pins Definition 1 amp 2 Ground 3 amp 4 12V Required Connection 8 Pin 12v Power Supply Connector J1D1 Pins Definition 1 thru 4 Groun
72. only have one or two power supply units installed you should disable this the default setting with JP10 to prevent false alarms Power Force On Jumper JPF allows you to enable or Power Force On z 4 JPF disable the function of Power Jumper cep Force On If enabled the power Position Definition will always stay on automatically al arma If this function disabled the user n ore needs to press the power button to power on the system 3rd PWR De tect 4 Pin 8 Pin PWR Force On i SW SME Fu eeu FAN 33 Om 1 TE a 4 E x J pwe x Bgu pme Gai el a E 285 a 5 3 J o Frees SLLE opud North Bridge ogee 2255 LANT C_N JETTE Ha Too POLE x16 Bam Floppy PLANG IPM 2 0 svo l i A rce PW On wi a 5 7 ont ICHSR 5 VGA Pen South elere M CTRL RAGE Bridge scsi ot Tle 3 6 x Enable scsi 2 y etre BS la set nas S NEF JPL1 LAN Enable CLR emose intru 9 3sPG1 VGA Enable JD2 DIOR WT Ww USB2 3 SCSI Ch B j7 VGA SUPER X6DAR 8G X6DAR iG User s Manual 2 uss 6 Jumper Settings Explanation of
73. ons e Use a grounded wrist strap designed to prevent static discharge e Touch a grounded metal object before removing the board from the anti static bag e Handle the board by its edges only do not touch its components periph eral chips memory modules or gold contacts e When handling chips or modules avoid touching their pins e Put the motherboard and peripherals back into their antistatic bags when not in use e For grounding purposes make sure your computer chassis provides ex cellent conductivity between the power supply the case the mounting fasteners and the motherboard Warning Please use the correct type of onboard CMOS battery as specified by the Manufacturer Do not install the CMOS battery up side down to avoid possible explosion Unpacking The motherboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected 2 1 SUPER X6DAR 8G X6DAR iG User s Manual 2 2 Nocona Processor and Heatsink Installation When handling the processor package avoid placing direct pressure on the label area of the fan Also do not place the motherboard on a conductive surface which can damage the BIOS battery and prevent the system from booting up IMPORTANT Always connect the power cord last and always remove it before adding removing or changing any hardware components Make sure that you install the processor into the CPU socket
74. ons and you want to turn off the power just depress and hold the power button for 4 seconds This option can be set in the Power section of the BIOS Setup routine External Modem Ring On Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply Chapter 1 Introduction Wake On LAN WOL Wake On LAN is defined as the ability of a management application to re motely power up a computer that is powered off Remote PC setup up dates and asset tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The motherboard has a 3 pin header WOL to connect to the 3 pin header on a Network Interface Card NIC that has WOL capability Wake On LAN must be enabled in BIOS Note that Wake On LAN can only be used with an ATX 2 01 or above compliant power supply 1 6 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates The SUPER X6DAR 8G X6DAR iG accommodates ATX power 20 pin sup plies Although most power supplies generally meet the specifications re quired by the system some are inadequate You should use one that will supply at least 400W of power It is strongly recommend
75. or the system Clear means such a password has not been used and Set means a user password has been entered for the system 4 20 Chapter 4 BIOS Set Supervisor Password When the item Set Supervisor Password is highlighted hit the lt Enter gt key When prompted type the Supervisor s password in the dialogue box to set or to change supervisor s password which allows access to BIOS Set User Password When the item Set User Password is highlighted hit the lt Enter gt key When prompted type the user s password in the dialogue box to set or to change the user s password which allows access to the system at boot up Fixed Disk Boot Sector This setting may offer some protection against viruses when set to Write Protect which protects the boot sector on the hard drive from having a virus written to it The other option is Normal Password on Boot This setting allows you to require a password to be entered when the system boots up The options are Enabled password required and Disabled password not required 4 21 SUPER X6DAR 8G X6DAR iG User s Manual 4 6 Boot Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display Highlighting a setting with a or will expand or collapse that entry See details on how to change the order and specs of boot devices in the Item Specific Help window All Boot BIOS settings are described in this sect
76. r Definition the hard drive LED cable here to 13 Vee display disk activity for any hard 14 HD Active drives on the system including SCSI Serial ATA and IDE See the table on the right for pin defini tions NIC1 NIC2 LED Indicators NIC1 LED Pin Definitions JF1 The NIC Network Interface Con Pin troller LED connection for GLAN Numer Denion porti is located on pins 11 and 12 12 GND of JF1 and the LED connection for NIC2 LED Pin GLAN Port2 is on Pins 9 and 10 Definitions i JF1 Attach the NIC LED cables to dis in play network activity Refer to the Number Definition r id 9 Vcc table on the right for pin defini 10 GND tions HDD LED j pe fee NIC1 2 LED KB wz 38 J101 33 Domne 1 al Shas ome r re ira TRAE CPU1 Fail os al 20 19 a ae f WN ET Ground lt O NMI 3 om 1 314 oma 7 6 x lt olo x ome F 4 gt es a Power LED lt o o Veo o ae FANZ Free SOLE cpuz HDD LED M o o ve MET NIC1 LED lt Voc at ee E E NIC2LED I 0 o ves l IPMI20 a s f m Overheat Fan Fail LED lt 9 vee H g colon Sa Power Fail LED 4 o ve EE PxH rea oe daiis ground Reset Reset Button B Gattedy z nablel scsi pug 4 Be 2 seen erat peng oo Ground Pwr 7 Power Button SUPER X6DAR 8G X6DAR iG User s Manual failure Overheat FanFail LED Connect an LED to the OH Fan Fail connection on pins 7 and 8 of JF1 to p
77. r BE y 6 er Enon Ei sosi BIOS 7002 2 B Power FalLED lt o o ve B bandy x Enable scsi A 8 cree BEB la X als Jers nas Iran Ground Reset gt Reset Button SGP sr Ena cur owas ia YPGI VGA Enable lo Furst USBI PW SP Ground pwr gt Power Button LEDSW pi 2 4 Chapter 2 Installation uss Reset Button The Reset Button connection is lo cated on pins 3 and 4 of JF1 At tach it to the hardware reset switch on the computer case Refer to the table on the right for pin definitions Power Button The Power Button connection is Reset Pin Definitions JF1 Pin Number Definition 3 4 Reset Ground Power Button located on pins 1 and 2 of JF1 Pa aer a Momentarily contacting both pins JF1 will power on off the system This are Boater button can also be configured to 1 PW_ON i 2 Ground function as a suspend button with a setting in BIOS see Chap ter 4 To turn off the power when set to suspend mode de press the button for at least 4 seconds Refer to the table on the right for pin definitions Reset o
78. r the PhoenixBIOS POST codes are divided into two categories recoverable and terminal Recoverable POST Errors When a recoverable type of error occurs during POST the BIOS will display an POST code that describes the problem BIOS may also issue one of the following beep codes 1 long and two short beeps video configuration error 1 continuous long beep no memory detected Terminal POST Errors If a terminal type of error occurs BIOS will shut down the system Before doing so BIOS will write the error to port 80h attempt to initialize video and write the error in the top left corner of the screen The following is a list of codes that may be written to port 80h POSTCode Description 02h Verify Real Mode 03h Disable Non Maskable Interrupt NMI 04h Get CPU type 06h Initialize system hardware 07h Disable shadow and execute code from the ROM 08h Initialize chipset with initial POST values 09h Set IN POST flag OAh Initialize CPU registers OBh Enable CPU cache OCh Initialize caches to initial POST values OEh Initialize 1 O component OFh Initialize the local bus IDE 10h Initialize Power Management 11h Load alternate registers with initial POST values 12h Restore CPU control word during warm boot 13h Initialize PCI Bus Mastering devices 14h Initialize keyboard controller 16h 1 2 2 3 BIOS ROM checksum 17h Initialize cache before memory Auto size B 1 SUPER X6DAR 8G X6DAR iG User s Manual POSTCode De
79. rature System Temperature This item displays the system Temperature Fan Speed Control Modules This feature allows the user to decide how the system controls the speeds of the onboard fans If the option is set to 3 pin Server the fan speed is controlled by the CPU temperature When the CPU temperature is higher the fan speed will be higher as well If set to Disable the fan speed control is disabled and the onboard fan will run at the full speed 12V at all time The Options are Disable and 3 pin Server Fan1 Speed to Fan5 Speed 4 18 Chapter 4 BIOS Vcore A Vcore B P3V3 P5V N12V P12V VDD P5Vsb SUPER X6DAR 8G X6DAR iG User s Manual 4 5 Security Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display Security setting options are displayed by highlighting the setting using the arrow keys and pressing lt Enter gt All Security BIOS settings are described in this section loge Tps iia Malp Veer Paps la Det Gaqeruisor Parziamd Ber eer Pasar Pimad disk loot nectert io ee 1 Paianari of eee Pieab led Supervisor Password Is This displays whether a supervisor password has been entered for the system Clear means such a password has not been used and Set means a supervisor password has been entered for the system User Password Is This displays whether a user password has been entered f
80. ray Properties dialog box select Delete and press Enter The following prompt is displayed Warning Deleting the array will render array unusable Do you want to delete the array Yes No RAID 1 only the following prompt is also displayed Deleting the partition will result in data loss Do you also want to delete the partition Yes No 6 Press Yes to delete the array or partition or No to return to the previous menu 7 Press Esc to return to the previous menu SUPER X6DAR 8G X6DAR iG User s Manual Creating Arrays Before creating arrays make sure the disks for the array are connected and installed in your system Note that disks with no usable space or disks that are un initialized are shown in gray and cannot be used See Initializing Disk Drives To create an array 1 Turn on your computer and press Ctrl A when prompted to access the ARC utility 2 From the ARC menu select Array Configuration Utility Main Menu ACU as shown on the first screen on page B 5 3 From the ACU menu select Create Array 4 Select the disks for the new array and press Insert as the screen shown below Note To deselect any disk highlight the disk and press Delete elect drives to crest Plij Bo MIC Hoek Hed BL HOC Weib aa Hi PMA Laas 5 Press Enter when both disks for the new array are selected The Array Properties menu displays as the screen shown on the next page Appendix C S
81. re compliant with the PCI Express Interface Specification Rev 1 0a The MCH interfaces with the ICH5R ICH I O Controller Hub via HI 1 5 Hub Interface The PXH can be configured to support for 32 or 64 bit PCI devices running at 33 MHz 66 MHz 100 MHz and 133 MHz ICH5R System Features In addition to providing the I O subsystem with access to the rest of the system the ICH5R_ 1 O Controller Hub integrates many 1 O functions The ICH5R_ I O Controller Hub integrates 2 channel Ultra ATA 100 Bus Mas ter IDE Controller two Serial ATA SATA Host w RAIDO RAID1 support SMBus 2 0 Controller LPC Flash BIOS Interface PCI 2 3 Interface and System Management Controller Notes The CPU FSB speed is set at 800 MHz by the Manufacturer Please do not change the CPU FSB setting 1 9 SUPER X6DAR 8G X6DAR iG User s Manual 1 3 Special Features Recovery from AC Power Loss BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain powered off in which case you must hit the power switch to turn it back on or for it to automatically return to a power on state See the Power Lost Control setting in the Advanced BIOS Setup section Peripheral Device Configuration to change this setting The de fault setting is Always On 1 4 PC Health Monitoring This section describes the PC health monitoring features of the SUPE
82. rovide advanced warning of chassis overheating or sytem fan Refer to the table on the right for pin definitions Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1 Refer to the table on the right for pin definitions OH Fan Fail LED Pin Definitions JF1 Pin Number fe 8 Definition Vcc GND OH Fan Fail LED JF1 Message Normal Overheat Fan Fail State Off Stay On Blink Power Fail LED Pin Definitions JF 1 Pin Number 5 6 Definition Vcc GND OH Fan Fail LED 4 Pin 8 Pin Pw CPU re FW Sue 38 jod mm gt ormi PWR Fail LED ja Dmm aa ey a TN ail sane Dm Enun gs Ha ma 20 19 Fam f l Dms Ta ata Doma Z Ground lt ojo NMI F ome R 2 238 X lt jeje x J 2 dae A L Esas en SULE cpu2 Power LED lt a o vec North Bridge ff Se HDDLED lt o o vec e256 X LAN CN JETE ami tee ls Vi l BOLE IS Bamm k NICI LED lt 9 9 f ve puana TPMIZO ays f ARE 2LED lt O Vcc k svo Ae 4 m aiai es FT rheat Fan Fail LED lt Vcc TCHR WOH ane a VaR PXH South scsi Te
83. scription 18h 8254 timer initialization 1Ah 8237 DMA controller initialization 1Ch Reset Programmable Interrupt Controller 20h 1 3 1 1 Test DRAM refresh 22h 1 3 1 3 Test 8742 Keyboard Controller 24h Set ES segment register to 4 GB 28h Auto size DRAM 29h Initialize POST Memory Manager 2Ah Clear 512 kB base RAM 2Ch 1 3 4 1 RAM failure on address line xxxx 2Eh 1 3 4 3 RAM failure on data bits xxxx of low byte of memory bus 2Fh Enable cache before system BIOS shadow 32h Test CPU bus clock frequency 33h Initialize Phoenix Dispatch Manager 36h Warm start shut down 38h Shadow system BIOS ROM 3Ah Auto size cache 3Ch Advanced configuration of chipset registers 3Dh Load alternate registers with CMOS values 4th Initialize extended memory for RomPilot 42h Initialize interrupt vectors 45h POST device initialization 46h 2 1 2 3 Check ROM copyright notice 47h Initialize 120 support 48h Check video configuration against CMOS 49h Initialize PCI bus and devices 4Ah Initialize all video adapters in system 4Bh QuietBoot start optional 4Ch Shadow video BIOS ROM 4Eh Display BIOS copyright notice 4Fh Initialize MultiBoot 50h Display CPU type and speed 51h Initialize EISA board 52h Test keyboard 54h Set key click if enabled 55h Enable USB devices 58h 2 2 3 1 Test for unexpected interrupts 59h Initialize POST display service 5Ah Display prompt Press F2 to enter SETUP 5Bh Disable CPU cache B 2 Appendix B
84. scsi Ter Be 5 D VGA PXH South Bios t SPAS Lf i 7902 8 CTR RAGE Bridge scsi x 9 Battehy X Enable JPAT si lt JBT1 E Folh Chas 2 FAN Na JPL1 LAN Enable CLR CMOSQ Intru f 1JPG1 VGA Enable JD2 IWDIOHIWLILID Two USB2 3 WD OH Pw SPK Notes 1 Jumpers not indicated are for test purposes only 2 m indcates Pin 1 3 The only difference between the X6DAR 8G and the X6DAR iG is that the X6DAR 8G has SCSI 4 Manufacturer Setting Do not change the CPU FSB or memory size Chapter 1 Introduction Quick Reference X6DAR 8G X6DAR iG Please refer to Chapter 2 for pin definitions and detailed information Jumper Description Default Setting JBT1 CMOS Clear See Chapter 2 J4F4 J4F5 Memory Size Select See Chapter 2 JPL1 GLAN Enable Disable Pins 1 2 Enabled JP10 3rd PWR Supply Fail Detect Open Disabled JPA1 SCSI Enable Disable Note Pins 1 2 Enabled JPA2 JPA3 SCSI Term A B Enable Note Open Enabled JPG1 VGA Enable Disable Pins 1 2 Enabled JWD Watch Dog Pins 1 2 Reset Connector Description ATX PWR J1B1 Primary ATX 20 Pin Power Connector 12 V PWR J38 4 Pin Power Connector Required CPU PWR J1D1 8 Pin CPU Power Connector Required COM J14 COM2 J15 COM1 COM2 Serial Port Connectors FAN 1 5 Onboard CPU Fan Chassis Fan Headers DIMM 1A DIMM 4B Floppy Drive J12 GLAN1 2 IPMI J9 IDE1 2 J5 J6 KB Mouse J33 J34 PWR Fail JP9 Power SMB J32 SCSI Ch A B JA1 JA
85. setting allows you to designate a reserve area in the system memory to be used as a System BIOS buffer to allow the BIOS write cache its data into this reserved memory area Select Write Protect to enable this function and this area will be reserved for BIOS ROM access only Select Uncached to disable this function and make this area available for other devices Cache Video BIOS Area This setting allows you to designate a reserve area in the system memory to be used as a Video BIOS buffer to allow the BIOS write cache its data into this reserved memory area Select Write Protect to enable the function and this area will be reserved for BIOS ROM access only Select Uncached to disable this function and make this area available for other devices 4 8 Chapter 4 BIOS Cache Base 0 512K If enabled this feature will allow the data stored in the base memory area block 0 512K to be cached written into a buffer a storage area in the Static DRM SDROM or written into L1 L2 L3 cache inside the CPU to speed up CPU operations Select Uncached to disable this funciton Select Write Through to allow data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the base memory area of Block 0 512K Select Write Back to allow CPU to write data back directly from the buffer without writing data to the System Memory for fast CPU data proce
86. splays the checkpoint code followed by a delay the high order byte another delay and then the loworder byte of the error It repeats this sequence continuously B 5 SUPER X6DAR 8G X6DAR iG User s Manual Notes Appendix C Software Installation Instructions Appendix C Installing Software Drivers and Windows Operating System After all the hardware has been installed you must first configure the Adaptec Embedded Serial ATA RAID Driver before you install the Windows operating system The necessary drivers are all included on the Supermicro bootable CDs that came packaged with your motherboard For Adaptec s SCSI HostRAID Utility please refer to the CDs that came with your motherboard C 1 Introduction to the Adaptec Embedded Serial ATA RAID Controller Driver Serial ATA SATA Serial ATA SATA is a physical storage interface It uses a single cable with a minimum of four wires to create a point to point connection between devices It is a serial link which supports SATA Transfer rates from 150MBps Because the serial cables used in SATA are thinner than the traditional cables used in Parallel ATA PATA SATA systems have better airflow and can be installed in smaller chassis than Parallel ATA In addition the cables used in PATA can only extend to 40cm long while Serial ATA cables can extend up to one meter Overall Serial ATA provides better functionality than Parallel ATA Introduction to the I
87. ssing and operation The options are Uncached Write Through Write Protect and Write Back Cache Base 512K 640K If enabled this feature will allow the data stored in the memory area 512K 640K to be cached written into a buffer a storage area in the Static DRM SDROM or written into L1 L2 L3 cache inside the CPU to speed up CPU operations Select Uncached to disable this funciton Select Write Through to allow data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the base memory area of Block 0 512K Select Write Back to allow CPU to write data back directly from the buffer without writing data to the System Memory for fast CPU data processing and operation The options are Uncached Write Through Write Protect and Write Back Cache Extended Memory If enabled this feature will allow the data stored in the extended memory area to be cached written into a buffer a storage area in the Static DRM SDROM or written into L1 L2 L3 cache inside the CPU to speed up CPU operations Select Uncached to disable this funciton Select Write Through to allow data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the base memory area of Block 0 512K Select Write Back to allow CPU to write data back directly from the buffer wi
88. t bios Note Not all BIOS can be flashed depending on the modifications to the boot block code 3 If you still cannot resolve the problem include the following infor mation when contacting Super Micro for technical support Motherboard model and PCB revision number BIOS release date version this can be seen on the initial display when your system first boots up System configuration An example of a Technical Support form is on our web site at http www supermicro com support contact cfm 4 Distributors For immediate assistance please have your account number ready when placing a call to our technical support department We can be reached by e mail at support supermicro com by phone at 408 503 8000 option 2 or by fax at 408 503 8019 3 3 Frequently Asked Questions Question What are the various types of memory that my mother board can support Answer The X6DAR 8G X6DAR iG has eight 184 pin DIMM slots that sup port registered ECC DDR 333 266 PC2700 2100 SDRAM modules It is strongly recommended that you do not mix memory modules of different speeds and sizes Question How do update my BIOS Answer It is recommended that you do not upgrade your BIOS if you are experiencing no problems with your system Updated BIOS files are located on our web site at http www supermicro com Please check our BIOS warning message and the info on how to update your BIOS on our web site Also check
89. tery upside down to avoid possible explosion No Power Make sure no short circuits exist between the motherboard and the chas sis Verify that all jumpers are set to their default positions Check that the 115V 230V switch on the power supply is properly set Turn the power switch on and off to test the system The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one No Video If the power is on but you have no video remove all the add on cards and cables Use the speaker to determine if any beep codes exist Refer to the Appendix for details on beep codes SUPER X6DAR 8G X6DAR iG User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnos tics card is recommended For I O port 80h codes refer to App B Memory Errors 1 Make sure the DIMM modules are properly and fully installed 2 Determine if different speeds of DIMMs have been installed and verify that the BIOS setup is configured for the fastest speed of RAM used It is recommended to use the same RAM speed for all DIMMs in the system 3 Make sure you are using the correct type of ECC Reg DDR 333 266 PC2700 2100 SDRAM recommended by the manufacturer 4 Check for bad DIMM modules or slots by swapping a single module be tween two slots and noting the results 5 Make sure all memory modules are fully seated in their slots As an interl
90. the computer is configured with the values stored in the BIOS ROM by the system BIOS which gains control at boot up How To Change the Configuration Data The CMOS information that determines the system parameters may be changed by entering the BIOS Setup utility This Setup utility can be ac cessed by pressing the lt Delete gt key at the appropriate time during system boot see below Starting the Setup Utility Normally the only visible POST Power On Self Test routine is the memory test As the memory is being tested press the lt Delete gt key to enter the main menu of the BIOS Setup utility From the main menu you can access the other setup screens such as the Security and Power menus Begin ning with Section 4 3 detailed descriptions are given for each parameter setting in the Setup utility 4 1 SUPER X6DAR 8G X6DAR iG User s Manual 4 2 Running Setup Default settings are in bold text unless otherwise noted The BIOS setup options described in this section are selected by choos ing the appropriate text from the main BIOS Setup screen All displayed text is described in this section although the screen display is often all you need to understand how to set the options see on next page When you first power on the computer the Phoenix BIOS is immediately activated While the BIOS is in control the Setup program can be activated in one of two ways 1 By pressing lt Delete gt immediately after tur
91. thout writing data to the System Memory for fast CPU data processing and operation The options are Uncached Write Through Write Protect and Write Back 4 9 SUPER X6DAR 8G X6DAR iG User s Manual PCI Configuration Access the submenu to make changes to the following settings for PCI devices Onboard GLAN Gigabit LAN OPROM Configure Enabling this option provides the capability to boot from GLAN The options ared Disabled and Enabled Onboard SCSI OPROM Configure Enabling this option provides the caability to boot from SCSI HDD The options are Disabled and Enabled Reset Configuration Data If set to Yes this setting clears the Extended System Configuration Data ESCD area The options are Yes and No Frequency for RAID SLOT SCSI This option allows the user to change the bus frequency for the devices installed in the slot indicated The options are Auto PCI 33 MHz PCI 66 MHz PCI X 66 MHz PCI X 100 MHz and PCI X 133 MHz Frequency for PCIX 1 G LAN This option allows the user to change the bus frequency of the devices installed in the slot indicated The options are Auto PCI 33 MHz PCI 66 MHz PCI X 66 MHz PCI X 100 MHz and PCI X 133 MHz Chapter 4 BIOS gt PCI X 133MHz Slot 1 PCI Exp x4 Slot 2 PCI Exp x16 Slot 3 Access the submenu for each of the settings above to make changes to the following Option ROM Scan When enabled this setting will initialize the device expansio
92. to elici apliit Bee to taii feadefan li Managing Arrays Select this option to view array properties and delete arrays The following sections describe the operations Of Managing Arrays To select this option use the arrow keys and the lt enter gt key to select Managing Arrays from the main menu as shown above Ha lis Hees ge Array sale Arras dal De fe fot PE J hal m i i Appendix C Software Installation Instructions Viewing Array Properties To view the properties of an existing array 1 At the BIOS prompt press Ctrl A 2 From the ARC menu select Array Configuration Utility ACU 3 From the ACU menu select Manage Arrays as shown on the previous screen 4 From the List of Arrays dialog box select the array you want to view and press Enter The Array Properties dialog box appears showing detailed information on the array The physical disks associated with the array are displayed here 5 Press Esc to return to the previous menu Deleting Arrays Warning Back up the data on an array before you delete it to prevent the loss of data Deleted arrays cannot be restored To delete an existing array 1 Turn on your computer and press Ctrl A when prompted to access the ARC utility 2 From the ARC main menu select Array Configuration Utility ACU 3 From the ACU menu select Manage Arrays 4 Select the array you wish to delete and press Delete 5 In the Ar
93. to operate when the system enters Standby mode When in sleep mode the CPU will not run at full power thereby generating less heat Overheat Fan Fail LED and Control This feature is available when the user enables the Overheat Fan Fail warning function in the BIOS This allows the user to define an overheat temperature When this temperature is exceeded both the overheat fan and the warning LED are triggered System Resource Alert via Supero Doctor Ill This feature is available when used with Intel s LANDesk Client Manager optional For example if the system is running low on virtual memory and there is insufficient hard drive space for saving the data you can be alerted of the potential problem Auto Switching Voltage Regulator for the CPU Core The auto switching voltage regulator for the CPU core can support auto sense voltage IDs ranging from 0 8375V to 1 6V This will allow the regu lator to run cooler and thus make the system more stable 1 5 ACPI Features ACPI stands for Advanced Configuration and Power Interface The ACPI specification defines a flexible and abstract hardware interface that pro vides a standard way to integrate power management features throughout a PC system including its hardware operating system and application soft ware This enables the system to automatically turn on and off peripherals such as CD ROMs network cards hard disk drives and printers This also includes consumer devices connect
94. ttery is dead Replace the battery and run Setup to reconfigure the system A 1 SUPER X6DAR 8G X6DAR iG User s Manual System CMOS checksum bad Default configuration used System CMOS has been corrupted or modified incorrectly perhaps by an application program that changes data stored in CMOS The BIOS installed Default Setup Values If you do not want these values enter Setup and enter your own values If the error persists check the system battery or contact your dealer System timer error The timer test failed Requires repair of system board Real time clock error Real Time Clock fails BIOS hardware test May require board repair Check date and time settings BIOS found date or time out of range and reset the Real Time Clock May require setting legal date 1991 2099 Previous boot incomplete Default configuration used Previous POST did not complete successfully POST loads default values and offers to run Setup If the failure was caused by incorrect values and they are not corrected the next boot will likely fail On systems with control of wait states improper Setup settings can also terminate POST and cause this error on the next boot Run Setup and verify that the waitstate configuration is correct This error is cleared the next time the system is booted Memory Size found by POST differed from CMOS Memory size found by POST differed from CMOS Diskette drive A error Diskette drive B error Drive A or
95. u cpu lz FW SNE A PWR button Io pm 1 a erin ie fla Ca Rr Ey A TM cPut fa ae ial 20 19 J Dm SSS 4 f TWN gts Ground lt o o NMI 3 FA 3 314 oma Sh x lt a o x eme ee GY y ia dee r axa Power LED lt o o Vee Eeen SLE oruz Hopien d Jofo ve szik Nici LED lt of o ve za fi POENE JECA Baam Nios LED J F 7 ie z E al Overheat Fan Fail LED lt oof ve 5 P scar a Power FailLED lt o vec I5 ace pre pati em He Len 3 Cae ojo Reset Reset Button 3 y 7 i CTRL pea At X R SPLILAN Enable o cin emase rata 3 a Toma ojo Par gt Power Button seats SE rte z SUPER X6DAR 8G X6DAR iG User s Manual USB Chassis Intrusion A Chassis Intrusion header is lo cated at JL1 Attach the appropri ate cable to inform you of a chas sis intrusion Universal Serial Bus 2 14 USBO 1 Universal Serial Bus Pin Definitions USBO USB1 Two USB 2 0 ports J16 are lo pin eal a a Number Definition Number Definition cated beside the Mouse and COM1 1 5V fi 5V 2 Po 2
96. uild MPTABLE for multi processor boards Install CD ROM for boot Clear huge ES segment register Fix up Multi Processor table 1 2 Search for option ROMs One long two short beeps on checksum failure B 3 SUPER X6DAR 8G X6DAR iG User s Manual POSTCode Description 99h Check for SMART Drive optional 9Ah Shadow option ROMs 9Ch Set up Power Management 9Dh Initialize security engine optional 9Eh Enable hardware interrupts 9Fh Determine number of ATA and SCSI drives AOh Set time of day A2h Check key lock A4h Initialize typematic rate A8h Erase F2 prompt AAh Scan for F2 key stroke ACh Enter SETUP AEh Clear Boot flag BOh Check for errors Bih Inform RomPilot about the end of POST B2h POST done prepare to boot operating system B4h 1 One short beep before boot B5h Terminate QuietBoot optional B6h Check password optional B7h Initialize ACPI BIOS B9h Prepare Boot BAh Initialize SMBIOS BBh Initialize PnP Option ROMs BCh Clear parity checkers BDh Display MultiBoot menu BEh Clear screen optional BFh Check virus and backup reminders COh Try to boot with INT 19 Cih Initialize POST Error Manager PEM C2h Initialize error logging C3h Initialize error display function C4h Initialize system error handler C5h PnPnd dual CMOS optional C6h Initialize note dock optional C7h Initialize note dock late C8h Force check optional C9h Extended checksum optional CAh Redirect Int 15h to enab
97. ur web site C 20 Appendix C Software Installation Instructions Supero Doctor Ill The Supero Doctor III program is a Web base management tool that supports remote management capability It includes Remote and Local Management tools The local management is called SD III Client The Supero Doctor III program included on the CDROM that came with your motherboard allows you to monitor the environment and operations of your system Supero Doctor Ill displays crucial system information such as CPU temperature system voltages and fan status See the Figure below for a display of the Supero Doctor IIl interface Supero Doctor Ill Interface Display Screen I Health Information C 21 SUPER X6DAR 8G X6DAR iG User s Manual Supero Doctor Ill Interface Display Screen IIl Remote Control Ls Dae ee Greceful power control Paap ese keter IE aber a ay i ara By SC re peace oe lhe doaa ray peed tear ree ea ot H peel Beier fe ric ech or thes dew i aberi io camer the ache Hovpuemes Keep Sporo SO armo Doses peg ee on oe ee Pride TCA tema Power control Note SD IIl Software Revision 1 0 can be downloaded from our Web site at ftp ftp supermicro com utility Supero_Doctor_Ill You can also download SDIII User s Guide at http Awww supermicro com PRODUCT Manuals SDIII UserGuide pdf For Linux we will still recommend Supero Doctor II C 22
98. vdesecodstessedssscuvecsieuocieaes cosaccasenveteristess 2 27 IPM EET TTT E 2 28 IDE CONNECTIONS sinoi ae a brane eae a A 2 28 SCSI COMMECOMS asccsiesscaiecadicessveiserscedencesesedncsenceoeduszeduscsonsinstedodeanseseesndss 2 29 Chapter 3 Troubleshooting 3 1 Troubleshooting ProCOGureS cic ciccssissceccscscsccscessicesctsastcscensedeusetevesoatteareesteess 3 1 Before Power Omi tarina ere en eh sactetet a aN 3 1 SUPER X6DAR 8G X6DAR iG User s Manual NO POWO iselescivccocsssctevestneeaevdvereeesccpecdevssucsevaiie edariari iaria aa NOVIJE OS rann ea aE NERES Memory EMtOrs ss iccdscsesscesseessesvei cece saccasincsceds gli iveseussatitssesousvrcavoassasessiesess Losing the System s Setup Configuration 3 2 Technical Support Procedures sapinira auer ieee 3 3 Frequently Asked Questions 000 ec eceeeeeeeereeeeeneeeeeeeeeeseaeeeeeaeeeeseteeeeeeeaees 3 4 Returning Merchandise for Service cece eseeseeeeeeeeeeeeseeseteeeseeeeeeeeeaees Chapter 4 BIOS Aa MMO CUCHOM wes ie sscrs cance a a Giaeed alate Rna 4 2 RUNNING SOP xs serciek ears a TENAN 4 3 Mam BIOS Setien hl Geese ears seen teal ned lieder eet 424 Advanced Setupisenaiccucdaiiidavan aaa eels ad t 4 5 Security Setup s 426 Boot SetUPenien nnna E dace anne 427 EX eeno a aE E EE E NERS Appendices Appendix A BIOS POST MeSSages esssesseeseseeeeeseeeeeseseeeeaeeaetseeaeeeseeseetes A 1 Appendix B BIOS POST COQES tess ij sciseecseneasceseeeniderva n
99. w cpu PW SMB 38 jio KB pirm 53 m 7 J TPIP ila pwe Fed TART gi Fail 316 Dm gt zea gt CRE oo 3 pmm FANT ka fd J14 oma gt 5 i E E S el EBS D oO 7 o fae FANZ E7525 SLE Tumwater i CPU2 North Bridge Pert ome fad E LANT PO EEZ Jeeg Past POLE x6 Hamazi AN2 PMI 20 ajs AHAB lt silo g LA a bes TRI Force PW OnE x lt WOR mo PXH CUBR SCSI Ter BL 5 VGA South Bios JPM 5 iS CTRL RAGE Srog scsi 7902 a lt 2 B Gandy x Enabl scst eB 6 etree PSA had Bs sn liS JPLI LAN Enable CLR cmos Int 9 USB2 3 w S LEDSW SUPER X6DAR 8G X6DAR iG User s Manual Power Fault Power Fail Connect a cable from your power Pin Definitions JP9 supply to the Power Fail header Pin Number Definition JP9 to provide warning of power 1 PWR 1 Fail Signal supply failure This warning sig 2 PWR 2 Fail Signal a 3 PWR 3 Fail Signal nal is passed through the 4 Signal Alarm Reset PWR_LED pin to indicate of a power failure on the chassis See Note This feature is only available when using the table on the right for pin defini redundant Supermicro power supplies tions Alarm Reset Alarm Reset The system will notify you in the JP11 event of a power supply failure Jumper Position Definition This feature JP11 assumes that Open Normal defa Supermicro redundant power sup Short Clear Alarm ply units are installed in the chas sis If you o
100. when the following message is displayed The array is already marked bootable Do you want to make this array as not bootable Yes No Then the bootable array will be deleted and the asterisk will disappear Note do not use the delete key to delete the bootable array Appendix C Software Installation Instructions Adding Deleting Hotspares Note In order to rebuild a RAID RAID O or RAID 1 you would need to add_a new HDD as a hotspare 1 Turn on your computer and press Ctrl A as prompted to access the ARC Utility 2 From the ARC menu select Array Configuration Utility ACU 3 From the ACU menu select Add Delete Hotspares 4 Use the up and down arrow keys to highlight and select the disk you want to designate as a hotspare and press lt Insert gt and then press lt Enter gt 5 Press yes when the following prompt is displayed Do you want to create spare Yes No The spare you have selected will appear in the Select Drive Menu SUPER X6DAR 8G X6DAR iG User s Manual Initializing Disk Drives If an installed disk does not appear in the disk selection list for creating a new array or if it appears grayed out you may have to initialize it before you can use it as part of an array Drives attached to the controller must be initialized before they can be used in an array Caution Initializing a disk overwrites the partition table on the disk and makes any data on the disk inaccess

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