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1. Fig 4 51 Synch Parameter Setting At the same time a Synch Parameter Setting dialog box is added Synch Parameter Setting x Synch Point of Packet List Synch Point of Waveform Area Top C Left C Middle Middle cancel Fig 4 52 Synch Parameter Setting Dialog Box Activate Packet and Wave form Synch The default is not activated Top When Packet and waveform Synch is activated the synch point in the packet list is the top packet segment which is displayed by list Middle When Packet and waveform Synch is activated the synch point in the packet list is the middle Packet segment which is displayed by list Left When Packet and waveform Synch is activated the synch point in the waveform area is the left packet segment which is displayed by waveform Middle When Packet and Waveform Synch is activated the synch point in the waveform area is the middle packet segment which is displayed by waveform Activate Packet and waveform Synch and then select Top and Left Synch Parameter Setting D X w Activate Packet and Waveform Synch Synch Point of Packet List Synch Point of Waveform Area C Middle C Middle cancel Fig 4 53 Synch Parameter Setting Dialog Box Display the corresponding of waveform and packet as below image 108 FMO7I4A BEL FH Ae Be 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 ZEROPLU
2. is Cancel Help Fa End DEMO Z Fig4 133 CAN 2 0B Property Setup Double click the ZEROPLUS LA CAN 2 0B MODULE V1 32 00 CN01 to set the Protocol Analyzer CAN 2 0B dialog box PROTOCOL ANALYZER CAN 2 0B E i Configuration Packet Data Format Register Pin Assignment Start Packet Format Protocal Anal H Bus4d rotocol Analyzer Mame Ms 111Bit Start BI AUD iis O Bit Start Protocol Analyzer Property Data Reverse Decoding Percentage 5 ample BU After End Packet happens just begin to analyze Baud Rate 125000 Auto E When CAN Data for expansion combine Basic ID and ID Min d bps Max TOMb M Min lbps Max ps w The Del is displayd in the CAC Field Protocol Analyzer Color Stark Control Error CRC End ID Data Overload Fig4 134 Protocol Analyzer CAN2 0B Setup Click OK on the Protocol Analyzer CAN 2 0B dialog box to complete the CAN 2 0B Bus decoding 149 FMO7I4A 7A Be tt FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 ZEROPLUS LAP B 702000 S N 000000 0000 CAN Bus als UL UU LILILILI LL LI HIHHILIZHIHIA D H uir i n Fig4 135 Protocol Analyzer CAN2 0B Decoding Protocol Analyzer CAN 2 0B Packet Analysis PROTOCOL ANALYZER CAN2 0B Fig4 136 Protocol Analyzer CAN 2 0B Packet d
3. ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc1 Ee x 4G File Bus Signal Trigger Run Stop Data Tools Window Help 8 x Bem A xS cs mi b xk zm vo mw 50 vie S Page 1 Eg ds M comi es eR ae Oe E Rei Boe ijj o Height 30 m Scale 10ns Display Pos ns APos 150ns v A T 150ns v A B 300ns 7 Total 20 48us Display Range 250ns BPos 15 ns v B T 150ns v Compr Rate No Filter so 200ns T50ns 100ns 50ns ns 50ns 100ns Tns 2000s 25008 EL MU UU LULU UU LIU uu re FLELFLELTLETLELT LE LE C conie FLIELIF LIE LE A03 A03 g A04 A04 ss a g AD A07 L g A08 A08 EE m 4 ANG ANS Fig 4 39 Packet Startup 1O x 18 x ee ea ons ee e o LS o Heit f0 m Scale 10ns Display Pos Ons APos 150ns A T 150ns 7 A B 300ns iy Total 20 48us Display Range 250ns BPos 50ns 7 B T 150ns v Compr Rate No Fic ISIL 200ns 1 i Wns 1 100ns 50ns 1 n S LESE dons 100s Lien n ns Lu 200ns 1 250s x PD OUU UU 000000 00000000000000 x UU LU WL Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length Busi us 1023 s o 1 O 1 O 1 o 1 o 1 j 10s Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data o 1 EUM 1 1 1 j 100ns Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Da
4. CS ee ee 7 ans t Time Display fay Sampling Site Display Display Pos ns Frequency Display Display Range 200ns 201 E Frequency Display Hide time of waveform zzii Level C Filter Hs Hide time of waveform Fig 3 143 Tool bar Waveform Display Mode There are four display modes to determine the method of capturing data from sampling Sampling Site Display Time Display Frequency Display and Hide time of waveform 73 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 3 4 2 Modify Ruler Mode Use the menu to modify the Ruler Mode Go to Tools and click Customize See Fig 3 144 x Common Setup Toolbars Shortcut Key Auto Save Weayvetorm Display Mode C Sampling Site Display Frequency Display C Time Display Ruler Made Waveform Setting C Regular Ruler Waveform Height 30 Time Sampling Site Ruler Font Size 12 Fig 3 144 Ruler Mode Regular Ruler J 3 ij 10 3 E 5 10 il A 25 B Fig 3 145 Scales in Regular Ruler Time Sampling Site Ruler I dus I th I ri I hus I E I Ue I oes I I oe I tus I tus u Fig 3 146 Scales in Time Sampling Site Ruler Ruler Mode There are two styles of Ruler Regular Ruler Time Sampling Site Ruler Regular Ruler Presented in increments of 5 Time Sampling Site Ruler default Present
5. Activate the function of Chain Data Find ame Next Previous Close Min Value Max Value When Found Statistics Statistics I rz Statistics Statistics Waveform find x x Activate the function of Chain Data Find Bus Signal Name Next Previous Close Activate the function of Chain Data Find Bus Signal Name Next Previous Close Min Value Max Value Min Value Max Value fe m Statistics When Found Statistics When Found A Statistics 0 0 Fig 3 123 Waveform find Dialog Box of the Protocol Analyzer 12C 65 FMO7I4A Zeroplus Technology Co Ltd Waveform find Activate the Function of Chain Data Find Activate the Function of Chain Data Find Bus Signal Name Bus Signal Name Next Previous Close soa Next Previous Close Min Value Max Value Bus Item H lin Value Max Value F Statistics ali Statistics Statistics i Statistics Waveform find I x Activate the Function of Chain Data Find Bus Signal Name Next Previous Close Min Value Max Value Statistics Statistics 0 Activate the Function of Chain Data Find Bus Signal Name QUART J Next Previous Close Min Value Max Value Statistics Statistics When Found I x Activate th
6. ba Find Data Value E Ctrl F Find me e a ota le sb FE gt gt Start At End At When Found m Statistics Tip Ds o x ho Statistics Remember the final conditions i When the find function is used the function of Fig 3 48 Waveform Find Dialog Box without displaying the final conditions is added When Activating the Function of Chain Data Find you have closed the Waveform Find dialog Use the pull down menu to select the Bus Signal 42 FMO7I4A PRE THS LIS 2 T3 PR 23 S Zeroplus Technology Co Ltd box and you want to find the set conditions you can open the Waveform Find dialog box again for the system has saved the last set conditions The Zeroplus Logic Analyzer User s Manual Ver 3 10 Name The list of Find depends on whether it is a Bus or Signal that is being searched in Bus Choose among In Range and Not In Range enter the value for Min Value and Max Value Signal Choose among Rising Edge Falling Edge Either Edge High and Low Start At Choose the position to start our search by selecting one of the following Ds T A B ect select from the pull down menu When Found Choose A B or other bars to mark the position where it is coincident with the set conditions Statistics Show the number of instances of the search results Note It is available only when searching through a Bus v Activate the function of Chain Data Find Bus Signal Name B
7. 4 8 Noise Filter The Noise Filter function can make the system filter the waveform that doesn t meet users requirements 4 8 1 Basic Software Setup of Noise Filter STEP1 Click Data on the Menu Bar then select Noise Filter to activate the Noise Filter function as the figure below Data Tools Window Help Usados i xi Hoise Filter ecd Bus Width Filter lata Contrast Noise Filter None P Find Data Value CtrltF EA Find Pulse Width E Fig4 149 Noise Filter STEP 2 Transmit the tested signal to the Logic Analyzer as the figure below Pus Si qual gop o rue cna iso Sagas tn roar ase a sta Mae sone poe aad fa ci ca afe fri Le fade tafe ial aon asela tele filet fe _ E 4 4 2 4 4 3 Ge a Fig4 150 Tested Signal STEP 3 Filter the waveform that are not bigger than 5 clocks Hoise Filter x Moise Filter None DR 12T Fig4 151 The condition of Noise Filter is 5clock STEP 4 After filtering the waveform that are not bigger than 2 clocks the sak teui waveforms are deleted 3 Group 0 HB Bus Signal Filter 10 5 5 10 15 20 exi E Level 0 Less 1 jl Li Li Li Li 1 1 1 1 1 Li Li i Li 1 Lu Li 1 1 Li 1 1 Li 1 Li Li Li L Li 1 1 Li 1 1 1 1 c g M1 ADL 2048 M03 A03 a iia s x x Ce E x 8 8 7 8 8 8 Fig4 152 Signal after Filtering STEP 5 Reserve the original
8. Address 1019 Fig3 52 Pulse Width Find Dialog Box Signal Name It can select the single channel for Find Find It can select the Find conditions which are In Range Min Value gt lt and When users select the option of In Range they can input the value of the Min Pulse Width and Max Pulse Width between 1 and 65535 and find the Pulse Width in range When users select the Min Value they can find the Min Pulse Width for the present single channel When users select the options gt lt and they can input the value of the Pulse Width between 1 and 65535 and find the Pulse Width in range Start At Select the Start point of Find The selectable items are all Bars the default is the Ds Bar End At Select the End point of Find The selectable items are all Bars the default is the Dp Bar When Found Select a Bar to mark the found Pulse Width The selectable items are all Bars the default is A Bar Statistics It can count the number of Pulse Width in the present range Next It can find the next Pulse Width Previous It can find the previous Pulse Width For example Find in the AOO channel the Pulse Width is equal to 8ns take the A Bar as the mark See the below figure T Ad ae TIEN CHE 3 HJ Fig 3 53 Pulse Width Find on the Waveform Window 44 FMO7I4A P BE T1335 B ARAE Zeroplus Technology Co Ltd l To the Previous
9. Customize Fig 3 76 Shortcut Key Setting Customize esae n fs Fig 3 77 Auto Save Setting See Section 3 5 for detailed instructions 51 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Color Setting u Bus Property User s Manual Ver 3 10 Color Setting X Workaround Waveform Name Relating aveform BackGround List Background 1 List Background 2 Cursor Grid 131 3 30303 3 3073 3 3 101 After the background is altered corresponding color automatically changes according to the contrast ratio ooo ooo oo Oo rl ll I When being printed the background is white Cancel Default Help Fig 3 78 Color Setting See Section 3 6 for detailed instructions Bus Property x mBus Setting C Bus Te Activate the Latch Function aoo m Protocol Analyzer Setting Parameters Gonfig ZEROPLUS L CAM 2 08 MODULE V1 32 00 CN01 c ZEROPLUS L HDQ MODULE V2 07 00 CNO1 ZEROPLUS LA I2C MODULE Vv2 02 00 CN01 ZEROPLUS L SPI MODULE V1 13 00 CN01 C ZEROPLUS L UART MODULE V2 13 00 CN01 ZEROPLUS L LISB1 1 MODULE V1 62 00 CNO01 JV Use the DsDp Find More Protocol Analyzer Fig 3 79 Bus Property Bus Activate the function of analyzing the Bus Color Configuration Open the C
10. P BETHS BS 2 Ro Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 Menu Bar Bus Signal Menu Item i sampling setup Tip Icon Description M Decrease RAM Size ha Increase RAM bid Size Decrease nnr internal clock frequency Increase nnn internal clock frequency RAM Size Tip Clock Source Asynchronous Clock Detail Menu amp Dialog Box Sampling Setup x Clock Source Asynchronous Clock Frequency 1 25Hz ha Synchronous Clock C External Clock Single Glact C Mix cad External CLK1 Frequency LO0KH2 Min 0 001Hz Max 150MHz Sampling RAM Size Compression Mode Ee Filter RAM Size x rl Signal Filter Setup Apply IL Cancel Default Help Fig 3 20 Sampling Setup See Section 4 1 for detailed instructions Data Compression 2K os sh 50MHz ns mu Fig3 21 RAM Size Choose the RAM Size and the internal clock frequency from the pull down menus The amount of acquired data that can be stored by the Logic Analyzer depends on the amount of allocated RAM Size Take LAP B 70256 as an example The total depth of memory for the Logic Analyzer is 256K Bits in each probe If the Logic Analyzer starts gathering data with a 128K memory range it will take a long time to find the required information In order to avoid spending a lot of time gatheri
11. Sps 10Ms Delay Data Compression 128Kbits x 2 128Kbits x 2 1Mbits x 2 1Mbits x 2 Waveform Width Display Trigger Page 1 8192 Page 1 8192 Page 1 8192 Page 1 8192 Page Safety Certification FCC CE FCC CE FCC CE FCC CE 10 FMO7I4A APRESS BR VN ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Beers Mantel E Table 2 Items Type LAP B 702000 Channel Mode 70 Channel 32 Channel 16 Channel Operating System Win2000 XP Vista Win7 Interface USB 2 0 1 1 Power Supply AC100 240V 50 60Hz Internal Clock asynchronous Sampling Max External Bandwidth 150MHz 150MHz 150MHz outs oM outs Memory Memory Depth l l Per Channel 2Mbits 4Mbits 8Mbits Trigger Channel 70CH 32CH 16CH Tadder Condition Pattern Edge Pattern Edge Pattern Edge gg Wide AND OR Wide AND OR Wide AND OR N A N A N A Pre Trigger Waveform Width VES VES EG Display Trigger Level 16 Levels 16 Levels 16 Levels Trigger Count 1765535 1765535 1765535 Threshold Working Voltage 6V 6V 6V 6V 6V 6V Keep Trigger haat Chinese Si Chinese Tr Chinese Si Chinese Tr Chinese Si L English English Chinese Tr English anguage Time Base Range Sps 10Ms Sps 10Ms Sps 10Ms Function Signal Filter and YES N A N A Delay Compression Display N A N A Trigger Page 1 8192 Page Safety Certification FCC CE FCC CE FCC CE 11 FMO7I4A APRESS BR VN ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Beers Mantel E
12. cicoccocccoccoccoccocococoococcoccocccc cioccocccoccoccocococooccocoococcoccococcc ooo cr coo eo ooo cr coo oo M mA e e m Fig 3 133 Statistics Window 68 FMO7I4A BE tt S BS 98 E 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PSEUD SORS due ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc1 EN ini xi File Bus Signal Trigger Run Stop Data Tools Window Help 8 x Dc m amp AT EN x vje i 25MH jo 509 iue f F m m am 92 v amp i eol ens of Oe BY Ie de le v Scale 1 25MHz Display Pos ns APos 120ns A T 8 333MHz 7 A B 44157MHz 7 Total 16 384us Display Range 200ns 200ns BPos 120ns Y B T 8 333MHz v Compr Rate No 1 9g Sm SLATE 40ns_ 8 ns Dns lh TLL LE GU UTI uu PL LILLE LJ rag LJ e 4 A02 40 Nes La A ADA ADA L 4 ADS AD IO OC CC CCC CCC ACC Fo roo CC CCC 0 0 0 0 o0 0o ooo oo oolo oo ooo oe 200008500500 20o000 800 6 m i o N Fig 3 134 Logic Analyzer with Statistics Enabled There are four options for adjusting how statistical information may be presented These four options are Channel Selection Column Selection Condition Parameter and Warning Parameter Channel Selection Channel Selection x i5 14 13 12 11 109 876543210 Port amp jw fe fv Iw fe Iv Iv v m be Ie fn d I f dn Port M fe fv je fe e I P n e jn fn dn je fn dn Pork ft fe fe je fe t o n
13. u un Best Measure Best Quality LAP d FB E User Manual PC Based Logic Analyzer LAP B Series FMO7I4A 1 5 2 1 2 2 2 3 2 3 4 3 5 3 6 4 6 4 7 4 8 4 9 ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 Index Features of Zeroplus Logic AMAly 260 uude ueste edo vut or We ck os due orsus to uai oa o oe Wee hu as dai edo Ru Ea aUe perdus a uU J PAC eae eC On TA e E TE E DL E 6 OTC ee E E A E E 8 Hatcdwate Pe CII CARON o siepe E AE Benedi esata sevnsncencneiecuateaaeden cress atenasaccese ecenteousameeresee 10 Syse R SN MAE a ae acest as TT ETT ETT 14 1 4 1 Operatine System ReguiteMeniS E TOUT 14 142 Hardware System ReguiremeniS a sssserinesersiss nar a E a ET does 14 Device Maintenance and SAIC ss avaccuasensconesunanensvendoesanncsicneus conesenancicuesnduasanaceueueas EEN REE aT ARET 15 EEEO EET E E E E E E E E E E EE 17 SODare S OU E E E E E E E 18 Parda are Ta O e E E 20 Po A E E 22 BET duris uiii RERO 23 Monue TOOL AS E 26 Pan ID EAN ANC oer TEE 65 BE ARIS CS IG as sre EET E TERT TEE cece ETT E ET TUE 68 ak USO gst Ao EH UE eV EET TEE 72 3 4 1 Mo odity Wayetorim Display MOGGLuesiea cosa ress couv ord atta en tuat iacu Rak matu aeos nrbe toibRo asas a 73 S12 Mod KOE MOE otoieluedereisuttetutiut osos iui Euiesit edcrasiutbetesiut A Serer re ent thier rt
14. Bus Signal pru Fiter BB 576 7168u 4325376u 288 3584u 144 1792us p 144 1792u 288 3584u 432 53780576 7168u5 720 896 zi mRH a UPLTUUU TULIT 4 A01 01 x 4 A02 402 A03 AD3 5 ER g ADA A04 SZ coef ADE 05 SZ 4 A06 06 L 4 ADT AD g A08 05 L g A9 ANS NZ M A0 AIO SZ Le ANT ATT g 12 12 mo a End Connected P Fig 4 139 Before and After Compression Using 128K memory depth before compression has been applied the total of the data was 1 31072ms after the compression had been applied the total of the data was 334 46643ms Therefore the compression rate is 255 178 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms Step 5 Click the Compression icon again or click off the Compression function to stop compression Tip The Compression cannot be applied when the Sampling Frequency is more than 200MHz 152 FMO7I4A 77 Be Fs FH Aa a BB 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 4 1 oignal Filter and Filter Delay The function of the Signal Filter and Filter Delay is to allow the system to keep the required waveform and filter out the waveforms that aren t required 4 7 1 Basic Setup of Signal Filter and Filter Delay Software Basic Setup of Signal Filter Filter Delay Step 1 Set up RAM Size Frequency Trigger Volt
15. F b bb aie i so0Ktiz x mw mw sete v m e Page fi m m m C r hi OD m us JawwsBERE BS Height um Trigger Deloy FontSize 12 Seale 2us Display Pos ns APos 30us A T2s30us A B 60us 7 Total 4 0g96ms l Display Range S0us 52u8 B Pos 30us B T 30us Compr Rate No Bm rie bed a cccicom 4 010942 49645221 5090701 SAZO 5 307059 5531230 5675410 senes car TE Zanini asst x v Hp P HELLE DELE LELIELLLL LL LI AQ Trigger Property i xj AB Ane Trigger Content Trigger Delay Trigger Range a AD Trage Paad C Dele Time and Clock AB Tngge Page Tigga Delay Tma y Me Il 1 s k m df Mine Max 126 Mirc1Ons Max 167 11679m g AB Tipos Poston Trigger Delay Clock Ana o z Min 1 Mave 16711673 Aldo AM An T Pos One Start Pos 4 50753mi End Pos 509025 P A12 5417 Noir When more than one trigger pages me selected the trigger bor disappears from tive vier M PATERE Fig 4 8 Trigger Page and Screen 2 2 Delay Time and Clock Click the Delay Time and Clock then type the numbers into the column of the Trigger Delay Time or type numbers into the Trigger Delay Clock at the Trigger Delay page of the Trigger Property dialog box as shown in Fig 4 11 Or type the numbers into the column of Trigger Delay Trisser Delay 5 onthe Tool Bar The system will display the Start of the waveform Tip The formula of Delay Time and Clock is Trigger Delay Time Trigger Delay C
16. i 10 x 218 xl Wr eT of OB D gt DD ae mms komm CE Sle ee sg Height 30 T Font Size 12 Scale 68 94872ns Display Pos 5 266348us Total 327 68us Display Range 3 54263u APos 45 48us v A T 45 48us 7 B P0s 44 88us v A B 600ns v B T 44 88us Y Compr Rate No PL LEE EL sd Loo o JIK 1 Ci mM 7 Fig 4 86 SPI Signal 124 FMO7I4A Zeroplus Technology Co Ltd Protocol Analyzer SPI Packet Analysis Configuration Packet Data Format Register Cancel Default Help Fig4 87 Protocol Analyzer SPI Packet DATA List Data field captured by Bus in the packet display BUS Packet List BUS Packet List Export Synch Parameter Packet Name TimeStamp Length Port B Bus 327 64us Packet Name TimeStamp Data Length Port C Bus 0000 327 64us Packet Name TimeStamp Data Length Port D Bus 0000_ 327 64us Packet Name TimeStamp Data Data Data Data Data Data Data Data Data 12 67 78 89 94 Fig4 88 Protocol Analyzer SPI Packet List Packet Length and Packet Idling Length 1 SS channel is activated SS Rising Edse iz the start of the packet Unknow End Falg SS Falling Edea iz start of the packet Unknow Stat niay SP SCK Ss DATA Packet Length Fig4 89 Packet Length Packet Length From Unknow Start Flag TimeStamp to Unknow_E
17. th nnn ce DET jm m H 9 Aog Pen ee Pee Eee Ei Heigh 0 Tri Font Size fiz Scale 2 034902ns Display Po 127 615791n APos 150ns A Tz150ns 7 A Bz300ns 7 Total 20 40u DisplyRange 198 490 BPosiSOns B Ts150ns v Compr Rate No bd Bus Fiar B 184 170 14052 155 561 141 79070 127 61579 113 44085 39 265971 85 0310611 70 916 T E HI H Y oxo X oxe oxo Y ox X oxo X ox awan s j P H E E wm x x LI L 4 Mp Us a PAA An an DICE AL ET J Es Fig4 65 The Latch Function Displayed on the Waveform Area Illustration The selected channel is A00 the analysis mode is Rising Edge it indicates that the data of AOO is read at the Rising Edge See the A Bar in the above figure the data of Bus1is 0X2 112 FMO7I4A ZP Be Fs Fh Aa BBR Ws ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 4 5 2 I2C Analysis I2C Introduction The I2C which stands for Inter Integrated Circuits is a serial synchronous half duplex communication protocol The I2C was first proposed by Philips Semiconductor Netherlands This I2C protocol consists of a very simple physical interface which has only two signal channels SDA Serial Data and SCL Serial Clock Most I2C devices consist of an independently sealed I2C chip and this I2C chip has direct connection to both SDA and SCL The data transmission is a byte base 8 bit base for every segment Since many oscilloscopes do not
18. About ZER PLUS Mere Protocol Analyzer Open the website of ZEROPLUS to know more modules ZEROPLUS Logic Analyzer Tip The function of Software Version Information Display for ZEROPLUS LA means that the software will open a small window which displays the software version new functions and bug modifications when activating the software It is convenient for users TS to know the information of the V Show tips at Startup present software version Fig3 106 Software Version Information Display Window ZEROPLUS LAP B Series Standard V3 10 Welcome to use ZEROPLUS Logic Analyzer The document includes the version information of the software SndON3Z Oo 60 FMO7I4A The Zeroplus Logic Analyzer User s Manual Ver 3 10 P BE THS IS 2 T3 PR 23 S Zeroplus Technology Co Ltd Right Key Menu Item Detail Menu amp Dialog Box HW Sampling Setup iy Channels Setup I Be Gus Property Right key Menu on Bus Signal Column The Right Key menu is added on the basis of the Bus Signal menu So the function of Sampling Setup Channels Setup Bus Property Group into Bus Ungroup from Bus Format Row and Rename are the same as those in the Analog Waveform k Reverse Group into Bus CErl G Unogroup From Bus Er Add Channel Copy Channel Delete Channel Bus Signal menu And the function of the Analog Waveform is the same as that in the Tools menu Delete All Channels Restore Defa
19. Display Pos 191149 APos 978766 A T 978766 v Display Range 157239 225062 BPos 978736 v B T 978736 v Compr Rate 198 000 164021 372 170803 279 177585 186 184367 093 191149 197930 907 204712 8 4 UU UUT UU UUs 206924148 206924148 206924148 End DEMO da 3 Click the former data contrast button HE The first difference will return to the center of the waveform area as the image below Scale 1356 3814108 Total 1048576 Ready Data Contrast Mode z2 fe Be Te te Ble ol Bar Bar Bar Bar Display Pos 191150 APos 523281 A T 4523281 v A B 730603 v Display Range 157240 225063 B Pos 207322 7 B T 207322 v Compr Rate No _ 1640 220 4358 058 191149 965 197931 873 20471378 211495687 218277594 225059501 Co PATE TD ae E Ap 69 Eo TTA 19789 673 OATS EN WR PESE n 0X0000 114 wy S P361 S v ve w 16510 1048574 1048574 1048574 164021 372 170803 279 177585 186 184367 093 191149 197930 907 204712 814 211494 721 218276 628 225058535 UUP UUT UN Ut 206924148 206924148 206924148 Display the result of Data Contrast in the data contrast dialog box After activating the data contrast the contrast result can be displayed in the contrast result list as the following section in the red frame The information is very simple It is not necessary for users to learn more details users can only know whether the signal of one contrasted channel is absolutely the same to t
20. IIC BUS I2C 16367 A NACK ADDR NACK Packet Name TimeStamp Address Read A WACK DESCRIBE Fig4 43 Protocol Analyzer I2C Packet List 105 FMO7I4A ZP Be Ts FH ha BB 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Setting It is used to open Packet List Setting dialog box Refresh Press this button then the List View can renew automatically Export Export files into Text txt and CSV Files csv Synch Parameter The data of the waveform is corresponding with the data of the packet list Users move the waveform or the packet list another will automatically move the corresponding data at the same time 2 Display Protocol Analyzer Packet in order Tip The below view is Protocol Analyzer I2C the packet is determined by the position of the TimeStamp Bus packet List M xi Setting Refresh Export Synch Parameter Packet Name TimeStamp GCA Read aL DESCRIBE 1 uceusazc 477 7F_ Read A NACK ADDR NACK Packet Name TimeStamp Address Read A NWACK DESCRIBE 2 ic pusd2c 5231 7F Read A NACK ADDR NACK Packet Name TimeStamp Address Read A NACK DESCRIBE 3 ncBusq2c 9165 j 7F Read A NACK ADDR NACK P Name TimeStamp Address Read A WACK DESCRIBE 4 ncBUsQ2C 16367 J 7F Read A NACK ADDR NACK Packet Name TimeStamp Address Read A WACK DESCRIBE 5 ic pusdec 20290 7
21. Start Edge According to Filter Condition End Edge ims C Start Edge or End Edge Min 10ns C Opposite of Filter Condition ii C Period Delay Max 655 35us Display Bar Setup iv v Show Bar Bar Style Joriginal Bar Width 10ns OK Cancel Default Fig 4 140 Signal Filter Setup Step 4 Signal Filter Setup or on the signal to be analyzed 2 Click OK then click Run and activate the signal from the tested circuit to the Logic Analyzer 3 The system will only display the waveforms of the signals which are qualified by the Filter Condition 153 FMO7I4A 1 Set up the Filter Condition as Bus Signal ZP BE Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fiter Bl 73 299560 43253760 7 20 eus 28 83584u 64 88064u 1 00 925441 36 970241173 015041209 059841245 1046 U LILIULI L UU LU r ex a E oe g A09 403 g A10 A10 A1 A11 Group U Fiter Level 0 288 3584u 216 2688u 144 1792u 72 0896us ns 720896us 144 1792u 216 26895288 35645 360 448 LU DUELO TL CL LECHE T_T Fig 4 141 Without With Signal Filter Setup The first picture shows the result without Signal Filter setup The second picture shows the result
22. Tip 2 DOES E O OO ODER EUER mc xn uu HUUL jn iin Setting Set up the packet list Eu rl a T LI L1 Refresh Click it the content in the U v i packet list will be refreshed Export Users can use the fragment to work record and analyze the packet list data As Export according to the packet list arrangement it exports the text file and the csv file Synch Parameter Open the Synch Parameter Setting dialog box Cascade l Horizontal aaa Fle TES DE CECE ICME e 4 Vertical J Ex rre re Fig 3 100 Align workspace s Vertically Screen Display When there are two displayers connecting screen Display users can select Double Screen Display to display waveforms on both two displayers it is convenient for 58 FMO7I4A E Double Screen Display E First Screen Display Second screen Iipzplar nnunn an LILI LILEL LJ Wait Awaiting Connected Zz Fig3 101 Stopwatch Function Help P BE TH AR 2 3 BR 23 8 Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 displaying more waveforms a First Screen Display or E Second Screen Display can also be selected to display waveforms on the first displayer or the second displayer Stopwatch Function The function will show at the right corner of the bottom of the screen while sampling data It times from users pressing the ensured key at the Bus Property dial
23. csv formats Bus Output Parameter Decide whether or not to display the parameters of the file to be exported Perform Model Choose whether to export the data either vertically or horizontally Output Range Choose the range of the data to export from the pull down menus Data Information boot torn Cuneiner Data Style Include ALL ALL BUS PROTOCOL HAS CHANNELS PROTOCOL NO CHANNELS Data Model Export Data changed function the selectable items include ALL Data Sampling Changed Dot Compression Data Changed Dot Compression Some of the data value for the signal channels of sampling position are the same for example view the Data changed and decrease export capacity this function will be good for users Output Range Choose the range of the data to export from the pull down menus Pop up an export file automatically The export file can be popped up automatically Users can decide whether to activate the function the default is selected See the export file below Soe oe Thanks f A Filename 11 t size a t she n fes KB iTe Fil owas gf ou p date y rhe sert ing of erm ronment vani EnefP letere cor orretation for Logic y Samp RTP made bed yang ding tre ng FEQ of interior a 1 253Hz if p erie channel af signal The quantity of Bus The quant tt ry ar of sha mnel L fTh w effectual af internal Trigger lev i D yf Trigger eint b eris a 1 if Trigger count Groupl i Trigg
24. Click Run and then activate the signal from the tested circuit to acquire the result on the waveform display area Fig 4 139 shows the result before and after compression has been applied ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc2 iol x X File Bus Signal Trigger E Data Tools Window Help 18 x D c am H Ble gT l m gt D gt e 128K site s i 100MHz JL mw 5096 Xe Page fi jm fcr iii E i 10ns v Qe Be Te B le ei Height s Tg Font Size Scale 28 93584us Display Pos ns APos 645 27us v A T 645 27us v A B 300ns 7 Total 1 31072ms Display Range 655 35u B Pos B44 87us v B T 644 97us v Compr Rate No Group 0 g Bus Signal Levelo Fiter 1576 71 68u 432 5376u 288 3584u 144 1792us ns 144 1792u 288 3584us432 5376us576 7168us 720 896 g ADD 01 g 02 A02 A03 A03 g A04 A04 g A05 A05 A06 A06 4 AO A07 g A08 05 g A09 403 s A10 A10 AIT A11 g 12 12 End Connected ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc2 l 5 xl la x penlan ag amp AB E v site ih pe zi mu 50 4 Page 1 m m m m s a OY BP EY of Height fo Trig Font Size fiz Scale 28 83584us Display Pos Ons APos 187 75647ms v A T 167 75647ms v A B 300ns A Total 334 46643ms Display Range 7 20 896 B Pos 167 75617m amp v B T 167 75617ms v
25. E uart als Desktop 2 My Documents wr a re Open 2 Chto My Computer i a mE Filename Places Files of type Logic Analyzer File als pz Close Ctlt F4 Fig 3 5 Close the active workspace Save As 2 xl Save in S ODM Signal j ex E3 Fe My Recent Documents E Desktop data contrast file 1 als data contrast file 2 als 12C als SPI als uart als v4 My Documents BL My Computer E Dave tes pave As cm PT My Network aces File name j E Auto Save Save as type Logic Analyzer File als Cancel File Note Project LaProject Author SUNSHINE case lemma Note Fig 3 6 Save As Window Save Save the current file Save As Specify the name of the file to be saved Auto Save Save the required file automatically 2 FMO7I4A ZP Be Fs Fh AE eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 OOOO omn Ms Hehuod Fin pomme Sae Flacer Save ae lup Test Fies he Cancel Bus Output Parameter Dua Enformekien Bars Ibran oves Co No wase ja r Perform Model Datla Modal bate Changed Doticomeresson Vetia C Horizontal Data Fom xy Output Range 3 From Trigger Dar To aur z Pop up an export Ele automaticaly Fig 3 7 Export Waveform Window Export Waveform Export a file into text txt or CSV
26. Packet Length When judging the start of I2C it is the Packet TimeStamp This Data Start is regarded aS Packet Timestamp inei m is I2C t ADDRESS 00 WRIA DaTa zogse ech sm SDA RUU 1 SCL Packet Length Fig4 73 Packet Length Packet Length From Start s TimeStamp to Unknow End Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to Start s TimeStamp This Unknow register is Unknow End Flag 117 FMO7I4A ZP Be Fs Fh Aa a GRA Sl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd LEETS Mantel en ed Protocol Analyzer I2C Data Format Analysis xl Configuration Timing Facket Data Format Fiegister Activate Data Binary Decimal Hexadecimal ASCII Slave Addr Binary C Decima Hexadecimal ASCII Reg Adar Binary Decimal Hexadecimal ASCII Cancel Default Help Fig4 74 Protocol Analyzer I2C Data Format dialog box Users can set the Data Format of the Data Slave Addr and Reg Addr as their requirements When selecting the option Activate the data formats are decided by the settings in the Protocol Analyzer when not selecting the option Activate the data formats are decided by the settings in the main program 4 5 3 UART Analysis UART Introduction The UART which stands for Universal Asynchronous Receiver Transmitter is a serial asynchronous protocol The UART is often time integrated into PC communication devices and it usually equips an EEPROM Electronic
27. RA e H CHCE EIE a ea aL Hea De ag Poste i LI sii Canplay Poet OPRA AP Mna B Tair ot i Baiji 7 Tata i 1 ud Drap kagal 1004 D Paa pina F Taii Dasi i Ht Fig3 93 Blue Frame in the Navigator Window There is a blue frame in the above Navigator Window Users can click the Left Key of the mouse to select the waveform randomly FER LAP ope PS OF 1 Di anni E alc xi 4 De Makers exe bpe Qa jak gim tee adi xi Dag ES 0 kW cm ajo Sifs s j ead f CRECE EID Ge E S L Hegw Du Timp Fosse fir a ral 278a iDiteias Pai 1 T A Poa 00r0 Trial di iit dua Det Ranges blau li Pai here mi ww i e dnd ad a J Fs Dpat Fig3 94 Select Channel button After clicking the Right Key of the mouse the Select Channel dialog box will pop up as below Fig3 95 Select Channel dialog box In the Select Channel dialog box users can select the channel which users want to display and select four channels at most the defaulted channels are A00 A01 A02 and A03 there are four channels in total zm Memory Analyzer Fig 3 96 Memory Analyzer Interface 57 FMO7I4A 7A Be A FS he iP BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 See Section 4 11 for detailed instructions f 2 i 1 t n io ia Eme isy Eni m n 7 cm Packet List et TM Kia aes a CONS EON NA NC NE NE om F
28. Table 3 Items Type nterface USB20 11 O Max External Clock Max 150MHz N A N A synchronous Bandwidth AND OR XOR NOR NAND XNOR OMS oM oM Memory pisi ean 2Mbits 4Mbits 8Mbits Per Channel Trigger Channel 70CH 32CH 16CH Trigger Condition Pattern Edge Pulse Wide AND OR Trigger Internal Clock Rate 400Hz 250MHz 100MHz 500MHz 200MHz 1GHz asynchronous Sampling Rate Waveform Width Display E Post Trigger Trigger Level 16 Levels 16 Levels 16 Levels Trigger Count 1 65535 1 65535 1 65535 Working Voltage 6V 6V 6V 6V 6V 6V Operating Interface Chinese Si Chinese Si Chinese Tr Chinese Si Language Chinese Tr English English Chinese Tr English Time Base Range Sps 10Ms Sps 10Ms Sps 10Ms Signal Filter and YES N A N A Delay Display Trigger Page 1 8192 Page 1 Page Safety Certification FCC CE FCC CE FCC CE Threshold Voltage Protocol Analyzer Keep Increasing Software Function 12 FMO7I4A APRESS BR VN ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Beers Mantel E Table 4 Items Type Interface O USB20 1 J O Max External Clock Max 150MHz N A N A synchronous ESI AND OR XOR NOR NAND XNOR aomi outs 140Mbits Memory Memory Depth l Per Channel 2Mbits 4Mbits 8Mbits Trigger Channel 64CH 32CH 16CH Trigger Condition Pattern Edge Pulse Wide AND OR Pre Trigger YES YES YES Trigger
29. datae bit Data m an pere a Jy time 5n next timert amp tating edge is the timestamp of the data Packet Length ee ee Because the low level only has 196ns less than Idling time packet ends when the Low level ends Fig4 91 Packet Length Packet Length From Unknow Start Flag TimeStamp to Unknow_End Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to Unknow Start Flag TimeStamp Virtual SS is activated 3 Data is 8 bit the Idling Time is set as 3us Don t care data bit is activated 3 515us is bigger than 3 155us is bigger than Idling That is the idling time so the nest time however the data s end af the rising edge is the packet timestamp of data Packet Length Fig4 92 Packet Length Packet Length From Packet s TimeStamp Data to next Packet s TimeStamp Data Packet Idling Length It is 0 The End dot is Unknow Unknow is registered linknow End Flag i Packet Length Fig4 93 Packet Length Packet Length From Packet s TimeStamp Data to next Packet s TimeStamp Data Packet Idling Length It is 0 126 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 4 5 5 1 WIRE Analysis Preface To increase the Protocol Analyzer feature in order to analyze the Protocol Analyzer 1 WIRE transmission protocol data Using LA analysis function the required serial data can
30. fv irtena T ngger Crate Bg o o o o o o o o o a o a fJ hetda Space Tme Vals Mn Space Time Value M ax o e r r TrgEEEXEESEX Ses o vel 15 Width Teme V mue Men With T eme V hae M am r T Wwa vmi ond port Al Level Acte Al Level None Active Level Level Level Level3 Level LevelS Level amp Level7 Level Level T Level lO Lee Levelt Lew1 Levi Lewis T ooeCows Fig 3 33 Set Trigger Group1 Trigger Count i Fig 3 34 Set Trigger Count See Section 4 1 for detailed instructions xi Trigger Gipi Trigger emn Exiemal Tiger Entier Trappa E Enakie Estemal Tigi Exr Tres TT nn F lnt Teo T nager In Ex Til WTR 3 cen em ran e 38 The Zeroplus Logic Analyzer User s Manual Ver 3 10 ZP Be Fs Fh Aa a GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 accept the trigger signal from another Fig 3 35 Set External Trigger Logic Analyzer Trigger Property xj Trigger Delay Trigger Content Trigger Range Trigger Page Delay Time and Clock m Trigger Page m Trigger Delay Time git Trigger Property Ens Min 1 Max 8132 Min 800ms Max 83 880955ms e OON POENI r Trigger Delay Clock fi 50 v Min 1 Max 15776131 T Pos 0 Start Pos 1023 End Pos 1025 Note When more than on
31. it is the packet TimeStamp State 1 Having Stop The data start is regarded as Ihe Unknow Register is Unkneow End Flag Packet Timestamp UART RX TX l Packet Length Fig4 81 Packet Length State 2 No Stop This Unknow Register is This Unknow Register ie data start is regarded as packet lgeneralBus Unknow te nknon Eod Flag j Fi j O sti 1 AEN A DATA 031 X RX TX Facket Length Stop s Data Length 1 1 5 bit Fig4 82 Packet Length If the STOP falls short of condition it isn t noted down in UART Packet Length From START Start s TimeStamp to STOP Unknow End Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to START TimeStamp 121 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 4 5 4 SPI Analysis SPI Introduction SPI Synchronous Peripheral Interface is a parallel synchronous full duplex protocol with a Bus like physical interface This protocol was first developed by Motorola and was generally used for EEPROM ADC FRAM and display device drivers which are equipped with low data transmission speed The SPI data transmission is synchronous in both receiving and transmitting directions Although Motorola initially did not define the clocking impulse it is commonly seen that the clocking impulse is according to the master processor
32. the signal will rise and last throughout the period of t CYCD which is of 1 bit and ranges from 190us to 260us The t DW1 ranges from 32us to 50us and no more than 50us The t DWO ranges from 80us to 145us I LL bewi 3 4 E ir Fig4 112 Signal from BQ HDQ to Host 137 FMO7I4A BEFLSRO ES ER Z3 8 Zeroplus Technology Co Ltd Software Basic Setup of Protocol Analyzer HDQ PROTOCOL ANALYZER HDQ i x Configuration Packet Data Format Register Pin Assignment Channel aon ES f DIO Fa ER Time Settings us Break 5 ta oono Recover Host 1 jo to 70 Host jo en Device Host Bit 180 280 Device Bit 190 V Response 195 320 Remark 1000000 ts infinite Protocol Analyzer Color Break Recovery Address Write OF Cancel Fig4 113 Protocol Analyzer HDQ Configuration dialog box Set the HDQ Configuration dialog box Pin Assignment 40 Device 1 fo go The Zeroplus Logic Analyzer User s Manual Ver 3 10 HDQ has only one signal channel therefore it only specifies the name of the channel and marks the selected channel Protocol Analyzer Name Display the name of the selected Bus Channel Preset as AO0 Timing Settings us Set the time for Break Address Read Write Data and Recovery Protocol Analyzer Color Users can vary the colors of the decoded packet Operating Instructions Open th
33. 1 Fig 2 1 2 Plug the loose ends into the connectors on the circuit hw 5 h rl g a board to be analyzed Fig 2 2 j rat Note The following sequence must be observed when plugging the connectors into the circuit board Such as AO Brown A2 Red A3 Orange and so on TTRTRREEIERRRET ENT Hate SAAN 3 The circuit board must be grounded to the Logic Analyzer with the black Ground Cable Fig 2 3 ML m T kebi OL i ar at LE k T jl TETTE Tm TERR py EE pr Ard p TM iu L y j P y 4 Fig 2 3 Step 1 Plug the thin male end of the USB cable into the laptop or PC Step 2 Plug the square female end into the Logic Analyzer 4 Plug the square end of the USB cable into the Logic Analyzer Fig 2 4 5 Plug the thin end into the computer Fig 2 5 Fig 2 5 At this point the computer should be able to detect the Logic Analyzer and finalize the installation for hardware connection For further information refer to the Troubleshooting and the Frequently Asked Questions FAQ chapters in the User Manual 20 FMO7I4A PRERNA RDSE 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig 2 6 An Assembly of Laptop Logic Analyzer and a Testing Board 2 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 2 3 Tips and Advice When testing a ci
34. 1 1 ae 1 LaDoc1 1 32ns 0 1 D v 2LaDocl 2 28ns 1 1 0 24ns 0 D 1 1 1 1 20ns 1 D 1 1 1 1 15ns D 1 1 1 1 1 12ns 0 D 0 0 D 0 8ns 1 0 0 0 D 0 99 FMO7I4A PRE THS LIS 2 T3 PR 23 S Zeroplus Technology Co Ltd Hot Hews Window d Tip To let online users learn the latest news we add the Running Text Ads Function Turn On Start the Running Text Ads function News Activity Let users learn the activities of our company Production News Let users learn the latest products of our company Note If both News Activity and Production News are turned on The Running Text Ads will play News Activity prior to Production News and the news is played in order the whole process plays repetitively Havi gator Tip The Navigator Window is displayed under the waveform display area when activating the Logic Analyzer The Navigator displays the waveform length of all the captured data it only can display the waveform of the data of four channels In the Navigator Window users can click the Left Key of the mouse to select the waveform randomly The selected waveform keeps pace with the waveform in the waveform display area The size of the selection frame is in inverse proportion to the Zoom Rate the larger the Zoom Rate is the smaller the size of the selection frame is Users can also click the Right Key of the mouse to select the displayed The Zeroplus Logic Analyzer User s Manu
35. 12 11 10 D Channels Setup bs Fig 3 25 Channels Setup See details in Section 4 2 34 FMO7I4A Tip Add Bus Signal Delete Bus Signal Delete All Default Reserve waveform data and show them Croup mto Bus tre Ungroup from Bus Ctrl U Expand Collapse Format Row k P BE HAR 0 BPR 23 8 Zeroplus Technology Co Ltd Click the Add Bus Signal button to add a port This will appear as New Click the port s to be added to the new signal Click the Bus you want to delete and then press the Delete Bus Signal button Press the Delete All button to delete all the Buses Press Default to return all channels and Buses to the system defaults Select this function when having added or deleted channels the software reserves the original waveform not select this function the waveforms in channels are cleaned up Signals can be grouped into Buses by pressing Ctrl G Signals can be added deleted copied and grouped into Bus Use the mouse or the keyboard or right click and select Properties from the popup dialog box the functional form of sampling setting The untied Data Bus is a signal line the signal line means Data Bus The movement of a signal line from up to down are Auto Size not available in waveform display Move Left Up Move Right Down Hide Show All and Color Ungroup signals from Bus by pressing Ctrl U A Bus contains at least 1 signal channel In order to see these signals c
36. 127 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Software Basic Setup of Protocol Analyzer SPI Step 1 Set up RAM Size Frequency Trigger Voltage and Trigger Position as described in Section 4 1 Step 2 Setup the Falling Edge on the signal of SS which connected to the Signal Selector SS pin of the tested SPI board Step 3 Set up the Protocol Analyzer Dialog Box which is set as the steps of I2C PROTOCOL ANALYZER SPI E X 55 Pin Assignment 55 Channel Fin Assignment SELK ADD DATA ADD 55 Channel Protocol Analyzer Property 55 Setting Made LPHA DO CP L Transmission MSB SLSB Direction Data Length fe bit MIIO at the LSB when the bit count is nat enough C Virtual 55 Idling Time 20ns Foires Marl Sime I Don t care data bit Protocol Analyzer Color Cancel Default Help Fig 4 84 Protocol Analyzer SPI Configuration dialog box Step 4 Set the SPI Configuration dialog box Pin Assignment SCLK It is the Clock channel and the default is AOO DATA It is the Data channel and the default is A02 Protocol Analyzer Property Mode There are six modes for selecting which are CPHA 0 CPOL 0 CPHA 1 CPOL 1 CPHA 1 CPOL 0 CPHA 0 CPOL 1 Rising and Falling Transmission Direction Set the Transmission Direction to MSB gt LSB or LSB gt MSB Data Length Set the Dat
37. 3z7 675us now Bar Bar Style original Bar Width ons OK Cancel Default Fig 4 142 Filter Delay Setup Filter Condition Tip Definitions of the Start Edge the End Edge and the Period Delay are listed as Figs 4 143 4 144 4 145 and 4 146 time eT Filter Condition lime start edge Fig 4 143 Start Edge Filter Condition delay time end edge l Filter Condition end edge delay time 155 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 Fig 4 144 End Edge Filter Condition IE pena period delay time Ll Filter Condition ESPERTI Ld L Fig 4 145 Period and Delay Time Ze 0 mM lw Signal Filter Setup ADI Ani r Filter Condition 4 A02 A02 A03 A03 Trigger Condition V ADA AOA Filter Condition X g A05 405 4 A05 05 4 AD amp 07 4 A08 408 4 A09 03 4 A10 AIO r Select Filter Delay Mode Select Delay Start Point Delay Time Al A11 According Eo Filter Condition c Es Edge A12 PT E AEE S eee TS Te C Start Edge or End Edge j 4 A2 C Opposite of Filter condition C Anas 2 d Max 327 675us s A13 13 Display Bar Setup 4 A14 Al showBar Bar Style origina g AIS 15 Bar Width s OK Cancel Default Fig 4 146 Filter Delay Setup Step 7
38. 4 2 shown Tip Connect the output pin of the oscillator from the tested board to the Signal connector of Logic Analyzer to measure its using the internal clock of Logic Analyzer 86 FMO7I4A BE 411 45 The Zeroplus Logic Anal P BE Tot 3S fis 13 H ER Z e Deere Mel Ver 3 10 ad Zeroplus Technology Co Ltd VILLE SUP Le Asynchronous Clock Internal Clock Frequency SOOKHz oed Sampling RAM Size Compression Mor RAM Size z Data Compre hath AE Fig 4 2 Clock Source Pull down Menu External Clock Synchronous Clock Click on External Clock and then select Single Clock or Mix Clock to sample the external signals Users can start the logic operation with the Single Clock when they start the Mix Clock In the Frequency column type the frequency of the oscillator on the DUT as shown in Fig 4 3 Tip The External Clock is applied when the frequency of the oscillator on the tested board is less then 100MHz Connect the output pin of the oscillator on the tested board to the CLK pin of Logic Analyzer Single Clock External CLEO OR T C Miz clock External CLK1 Frequency 100KHz Min 0 001Hz Max 150MHz Fig 4 3 External Clock Step 3 RAM Size Click on the RAM Size 2K from the pull down menu on the Sampling Setup dialog box as shown in Fig 4 4 Fig 4 4 RAM Size 87 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Tec
39. 6 R Be BY Te PN BS 4 Height 59 Tri Font Size fi 2 Z Scale 1 960837us Display Pos 104 333312us APos 650 315us A T 650 315us v A B 150ns x Total 1 31072ms Display Range 55 31238 BPos 850 165us v B T 650 165us 7 Compr Rate No y 115 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig 4 69 Waveform Analysis Protocol Analyzer I2C Timing Analysis PROTOCOL ANALYZER I2C l X Configuration Timing Packet Data Format Register Waveform Image m a eo H gt Le susor tsu sto gt i tho sta 5i P 2 E tuovat tuosta ie Time Format Settings v tHD DAT 0 20 to 50 00 us Jv tSU STO 0 50 to 50 00 us Cancel Default Help Fig 4 70 Protocol Analyzer I2C Timing Setup Waveform Image Describe the position of the set time Time Format Settings When the Time Settings is activated the set time will become the condition of judging decoding For example when you want to decode START you should judge whether the conditions of START are satisfied firstly and then judge whether the set time of tHD STA is coincident with the factual waveform If the two conditions are satisfied the START can be decoded Other segments decoding of the packet is the same with that of the START
40. A B C D A B C D A B C D A B C D Port x4Sets portx4sets portx4sets portx4sets portx4sets Testing Cable 8Pinx2 8Pinx2 8Pinx2 8Pinx2 8Pinx2 Blankx1set Blankx1set Blankx1set Blankx1set Blankx1set Quick Start Guide Aluminum Tool Trigger Transmission selection selection selection selection selection Channel This Driver CD consists of a multilingual software interface program as well as a multilingual User Manual 1 1 1 6 FMO7I4A BEL FH Ae 4948 E 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 ZEROPLUS 16 Pin x 1 8 Pin x 2 Fig 1 2 Testing Cable Fig 1 1 Logic Analyzer Pt s P ZEROPLUS IM i Qu ao l UE Fig 1 3 Probe SS varied depending on models Fig 1 4 USB Cable Fig 1 5 Quick Start Guide Fig 1 6 Driver CD P aa b NS BN Fig 1 7 1 Pin External Clock Cable Fig 1 8 2 Pin Ground Cable White Black 7 FMO7I4A ZP Be Fs Fh Aa GRA S ae Zeroplus Logic Analyzer sers Manual Ver 3 10 Zeroplus Technology Co Ltd 1 2 Introduction Zeroplus Logic Analyzer LAP B Series all share the same external features as illustrated in the following figures Fig 1 9 A View of the Zeroplus Logic Analyzer LAP B Series See Fig 1 11 for detailed information on the Signal Connectors External Port Trigger Out Trigger In Power Interface ur NAL PORT A B C D Measurement Channel Int
41. Binary Decimal Decimal Signed Hexadecimal or ASCII as the Data Format of the Bus to represent the value see Fig 4 33 3 Set and Don t Care and type the value of Bus into Value column to set the trigger condition of the Bus 4 Click OK to confirm the settings Step 4 Click Run and activate the signal from the tested board to the system to get the result as shown in Fig 4 35 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms Set Value is 3 as Hexadecimal and set Operator equals to then click OK Click Run and activate the signal from the tested board to the system to get the result as the trigger happens on OX3 ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc1 Bl x Lus File Bus Signal Trigger Run Stop Data Tools Window Help 8 x De BS fm EE SSIE b 2k v ih 100MHZ x am ow 709 v 9e S Page fi E3 EB Gl Ri cv fil oos me RII Ae BP Te BA S Height 30 Tr Font Size fiz Scale 90 112us Display Pos ns APos 30us A T 30us 7 A B 60us 7 Total 4 096ms Display Range 2 046ms BPos 3Dus v B T 30us 7 Compr Rate No 3 g w E g Bus Signal Fiter 13 75274u 7 390754u 1 028768u 5 333218u 11 695204u18 05719u 24 419175130 781161137 143147143 50513 gt i X 0x0 oxi 0 g aoo X _ 2
42. Data Contrast B Find Data value Ctrl F EA Find Pulse width l To the Previous Edge Fil f To the Next Edge fel 30 To T Add Bar AlF aF m Delete Bar Alt B aF P zoom E em Hand H g Normal ESCAPE R Zoom In FY E Zoom Qut F Show all Data F10 x Previous Zoom Eri Data Format List Data Mode Fig 6 7 Waveform Mode 1 iv Square waveform Sawtooth Waveform The Zeroplus Logic Analyzer User s Manual Ver 3 10 The second alternative is to right click any place in the Waveform Display Area This will pull out a menu Click Waveform Mode and choose a waveform See Fig 6 8 Yes you can Fig 6 8 R Find Data value Ctrl F Fe Find Pulse width Go Ta Place T Add Bar Fe Zoom E em Hand H i Normal ESCAPE Show all Data F1 wy Previous soam Er dz Data Format waveform Mode Color Bus Data ralar s Bus Single Data Golar Waveform Mode 2 dv Square Waveform Sawtooth Waveform 177 FMO7I4A RGO1 ZP BE Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 6 3 Registration What is the significance of the hardware serial number A Every product is assigned and engraved with a unique serial number which allows us to trace the original manufacturing date of a specific product RGO2 A RGO03 RGO04 RGO5 RGO6 A RGO7 A RGO8 A How do
43. HES Tem To Jma 1 Scale 1356 3814108 Display Pos 191150 A Pos 523281 A T 523281 7 A B 730603 7 Total 1048576 Display Range 157240 225063 BPos 207322 B T 2207322 Compr Rate No 164022 337 170804244 177586151 184368 058 191149 965 197931 873 20471378 211495687 218277594 225059501 eee WOO ummm 7 78 Laon Ox0001 QX0000 Qx0001 QXO0000 33114 w vfi ym v vv23819 ve v ve vv wT6bIO 1048574 1048574 1048574 154021 372 170803279 177585 186 184367 083 191149 197930 907 204712 814 211494 721 218276 628 225058535 UE UUT UUT LU LLLI mee 206924148 206924148 206924148 End DEMO Z Fig 4 157 Waveform Window 162 FMO7I4A ZP Be Ft Fh Aa GRA Sl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 NOTET Sore is used for marking the different areas in this contrast file Refresh Protocol Analyzer The Refresh Protocol Analyzer function can make the system analyze the data between Ds and Dp again 4 9 2 Basic Software Setup of Refresh Protocol Analyzer STEP 1 Click Tools on the Menu Bar then select A or click Ed on the Tool Bar directly to refresh Protocol Analyzer Customize Color Setting BUS Bus Property Refresh Prakacal Analvz Analog Waveform k Hardware Function Config Hardware Function Switch Export Hardware Configuration File Fig4 158 Refresh Protocol Analyzer STEP
44. In practice there are two clocking impulses CPOL Clock Polarity and CPHA Clock Phase The configuration of both CPOL and CPHA decides the sampling rate When the SPI must transmit serial data it initiates the highest bit Since SPI is a synchronous communication protocol and data transmission may not be in bytes a complete SPI signal packet must consist of SCK MOSI MISO and SS segments with CPHA and CPOL They are as following SCK Serial Clock Line SCL MOSI Master data output Slave data input MOSI stands for Master Out Slave In MISO Master data input Slave data output MISO stands for Master In Slave Out SS SS stands for Signal Selector of the master device which is to select signals for the Slave devices CPHA The clock phase CPHA control bit selects one of the two fundamentally different transfer formats CPOL The clock polarity is specified by the CPOL control bit which selects an active high or active low clock The data are driven and sampled riror os Clock Polarity 0 where rising edges happen Clock Polarity 0 where rising edges happen Clock Phase 0 where wawe cycle start Clock Phase 1 where wave cycle end The dota are driven and sampled The data are driven and sampled Clock Polarity 1 where rising edges happen Clock Polarity 1 where rising edges happen Clock Phase 0 where wave cycle start Clock Phase 1 where wave cycle end Fig 4 83 Clock Polarity and Clock Phases
45. Moise Fiker ES Bus Width Filter Data Contrast BA Find Data Value Chief l To the Previous Edge Fil 4 Tothe Next Edge Fi The Zeroplus Logic Analyzer User s Manual Ver 3 10 T Go To T Bar T is Adder At A Ax GoTo ABar s Delete Bar Ak48 BY GoToBBa B Ri Zoom E Go To More Hand H m B R Normal ESCAPE nR Zoom In F9 Binary M Zoom Out rg Decimal F10 Decimal Signed xj Previous Zoom ciez w Hexadecimal Asi IT fats Firmat Waveform Mode List Data Mode Sawtooth Waveform Sampling Changed Dot Compression Fig 3 42 Data Menu k E i B x fioo a lag Oe EE le 91 Fig 3 43 Data Tool Box Menu Bar Data Menu Item Pa Select an Analytic Range un Noise Filter en Bus Width Filter Detail Menu amp Dialog Box Check the dialog box to make the analytic range changed by dragging the Ds and Dp holders with the left mouse button Noise Filter It can filter 0 10 Clock Width s positive pulse or negative pulse signal Cr xi Noise Filter None Fig3 44 Noise Filter See Section 4 9 for detailed instructions Bus Width Filter X oa 4 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig3 45 Bus Width Filter Select the check box to activate the function of the Bus Width Filter in the dialog box and then
46. Packet Name TimeStamp Data Data Data Data Data Data Data Data Data o 1 o 1 o 1 Oo 1 O0 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data 6 BusiBu 973 O 1 o 1 j O 1 O 1 o Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Poot a tPotyatotyatotia tof 1 Fig4 46 BUS Packet List Packet Length and Packet Idle Length Packet s Start is the start of Bus Data the default length is controlled by the Setting dialog box If the input packet length isn t the end of data the software will prolong the length of the packet to end the data automatically as the figure below 106 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 Fig4 47 Auto Prolong Packet The Fig4 47 is a Bus its first data is 0x00 and its length is 1023 If users input 20 as the Bus Length But 20 x address is not the end of this data then the software will prolong the length of the Packet to 1023 automatically B T 3 Bus Fig4 48 Packet End The Fig4 48 is a Bus if the start of the packet is T Bar but the set Bus Length is 20 addresses and the data 0x02 isn t the end at that time the packet will prolong to the end position automatically that is to say the Address 27 B Bar is the packet end The above two data are made consecutively as the fi
47. Sore ere arer 74 3 4 3 Modify Waveform Height amp Correlated Setting cc cccccccssseseeecceeeeeeeeeeeeeeeeeeeeeeaeaeenees 75 TRAN SAN T C 78 COS SUR o osea ese S dace MEUM NMIEPM ME MU SM I EN DN UM 79 3 6 1 Modify Workaround Color s ccsccassseaccessennssdesadaactacenowsdsseranctsaatnesdesedeacdacehesedsseeswetsastensdeseteaodees 81 302 ME ortu MC CLO iC OVO NERR 82 The Flow OF SOM W are Operatii s ecincuteuc uso a E ved dottou ume l qva Ueber suate eR CO aep dn a 84 Introduce HOR to Losic Analysis acsee eroe e e i E a EEO Emre ene A 85 LO ATI Ea E E E sees 86 Bo LO CAN S16 e E E E E E E T OLEIU d Md MN USC RPECP add IEEE 99 PIU PY e e E E E E E E E E RN UPS NURE 102 Pos Paer e E A E A E E 104 BOAT a TET ET E EET 109 4 5 1 Bus Anab S1S aea uev ibd E E A E E 110 LAS MEEMN VASE Rm 113 eo MESE MOUSE 118 Er uE ci UTER TER 127 4 5 5 ENIRE Sab SE a prd enclace E rais URd s OP MDEMEU daria aM UM eee 127 LA MEME SIE SU CIS RT 136 V MEME BP OBANI SI NERO 142 CCOmpDEC S SIOD oars ator teats easstnd acs MD MEME MEM MEM MUTOU ME I sca MU MU UL US MURUS 151 4 6 1 Software Basic Setup of Compression s sssseeeesesseeeeeeeen enne nennen nnn nnne enne nnns 151 SS a i and Ester Ded aoi esum E MEUM MEE de 153 4 7 Basic Setup of Signal Filter and Filter Delay eeeeesseeeeeeeenrnneeeeeen 153 NOISE E HECE S oor duda seam PM dudes ueateenca capone Ee s
48. Trigger Run Stop Data Tools Window and Help The thirteen tool items are Standard Trigger Run Stop Sampling Trigger Content Set Display Mode Windows Mouse Pattern Zoom Data Height Trigger Delay and Font Size File 3 Mew t Open Close Save Save AS Auto Save E Export Waveform 73 Export Packet List fey Capture Window Language Print Prink Preview Recent File Exit Ctrl M Ctr O Ctril F4 Ctrl 5 Chrl ShiFk E ctrl E Ctrl F Fig 3 2 File Menu D g E Close Close the file being worked on Auto Save Save the required file automatically See Section 3 4 for detailed instructions Export Waveform Export files into Text txt and CSV Files csv Export Packet List Export the active packet list Language Allow users to change the language interface of menus tool boxes etc Print Preview Show three options Bus Signal amp Bus amp Filter columns Waveform Display Area and Position Display Area See Fig 3 14 Exit Exit the program Fig 3 3 Standard Tool Bar 26 FMO7I4A 7A Be A FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Menu Bar File Menu Item Detail Menu amp Dialog Box 3 Mew CEN Open a New file Look in ODM Signal 53 ck E3 Fe data contrast file 1 als y data contrast file 2 als My Recent I2C als Documents SPI als
49. a A Ta LIE S rs e iid 249 07177 gt fe Be Te El gt Height 30 Trigger Delay Font Size Scale 4 015MHz Display Pos 3 428878us A Pos 0ns 7 A T 0Hz 7 A B 1 541GHz v Total 327 68us Display Range 2 797917us BPos 549 069885ps v B T 1 541GHz 7 Compr Rate No Bus Signal Pomel aero 307 S SUERTE 2ns2 183519us 3 428878us 4 674238us 5 919595us 7 164954us 8 410313us 9 6 10 002KHz Waveform find x Activate the Function of Chain Data Find Bus Signal Name X wex Previous Close IF Min Value Max Value Start At End At When Found Statistics s f z Statistics Address 0 ut ES TE Z Fig 3 132 The B Bar is placed at the 0X12 of Data of Protocol Analyzer SPI where the condition of the Waveform Find is set 1 1 3 3 Statistics Feature Section 3 3 presents detailed information on the Statistics feature in the software interface The Statistics feature presents user information pertaining to nine periodicities Full Period Positive Period Negative Period Conditional Full Period Conditional Positive Period Conditional Negative Period Start Pos End Pos and Selected Data Click on the Statistics icon and an interface like Fig 3 133 or Fig 3 134 will pop up Statistics Window Channel Selection f Column Selection Condition Parameter Warning Parameter 0 0 0 0 0 0 0
50. as either MSB LSB or LSB MSB PROTOCOL ANALYZER 1 WIRE X Pin Assignment Protocol Analyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standard us 7 Transmission Direction Data Sampling Position Data Length 0 m legc Min bit M ax 32 bit Hin Mae 120 Cancel Default Help Fig4 105 Protocol Analyzer 1 WIRE Transmission Direction Setup STEP 4 Set the Sampling Position ZP Be Ts FH ha BB 4 ml The Zeroplus Logic Analyzer User s Manual Ver 3 10 Users can slightly adjust the sampling position of 1 WIRE This feature is applicable when the signal cannot be decoded The default value is 30us 133 FMO7I4A Zeroplus Technology Co Ltd PROTOCOL ANALYZER 1 WIRE l x Pin Assignment Protocol Analyzer Color Owl Reset Pulse EE B Presence Pulse EE Protocol Analyzer Property Dats EN Connect Speed Standard t us Transmission MSB LSB Direction Data Length fe bit Min bit M ax 32bit Sampling Position 30 m PR ron aa Stes in 1 M as 120 Cancel Default Help Fig4 106 Protocol Analyzer 1 WIRE Sampling Position Setup STEP 5 Set Data Length BERE SE BR 4 8 ER Z3 gl The Zeroplus Logic Analyzer User s Manual Ver 3 10 This function decides how many bits of data can be combined as one set of figures The defaul
51. be converted and presented in the form of Bus Therefore the software needs to add a dialog box so as to set up a Protocol Analyzer 1 WIRE dialog box 1 WIRE Introduction 1 Brief Introduction Features 1 WIRE is a non synchronic half duplex serial transmission which requires only one OWIO to transmit data The typical 1 WIRE transmission structure is illustrated in Figure4 98 During the 1 WIRE transmission the OWIO can be used to transmit data and supply power to all devices connected to the 1 WIRE OWIO will link to a 4 7K Ohm Pull High electric resistance which is linked to the power supply 3V 5 5V The transmission speed for 1 WIRE can be divided into two types Standard and High speed Every 1 WIRE has a unique 64 bit code for the device to recognize Therefore the maximum number of link devices is 1 8 almost unlimited JV to 5 5V Host Micro Controller Fig4 94 Applications Applications 1 WIRE is commonly applied to the EEPROM and to certain sensor interfaces 2 Protocol Analyzer Signal Specifications Name of Protocol Analyzer 1 WIRE Signal Frequency Not fixed around 10K Appropriate Sampling Rate 127 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 Name of Syn Signals OWIO Data Verification Point 30 us after the falling edge signals 3 Protocol Analyzer IO Description owo The only I O transmits Reset signals and data 4 Protoco
52. can be calculated by the main program automatically and displayed on the CAN 2 0B dialog box Data Reverse Decoding If it is selected the data can be decoded in reverse After End Packet happens just begin to analyze If it is selected the signal will be decoded when the End Packet appears When CAN Data for expansion combine Basic ID and ID If the option is selected the Basic ID and ID will be combined The Del is displayed in CRC Field If it is selected the Del will be displayed in the CRC Field Protocol Analyzer Color The protocol analyzer colors can be varied by users Operating Instructions Turn on the user interface of Logic Analyzer 146 FMO7I4A 7A Be tt FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 gt ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc1 Fig4 129 User Interface Sample the CAN 2 0B waveform or open the sampled waveform ee SP UUULE UUU UUUU LILILIUWU L HUUU LIU ud es NMEMNMEM 3 ww 3 w 93ww M dE MEME A Fig4 130 CAN2 0B Waveform Group the channel into Bus 147 FMO7I4A 7A Be A FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 gt ZEROPLUS LAP B 702000 S N 000000 0000 CAN Bus als SUL UU Ul LJLJEJLIU L UU ulIUuUILI Ug U pos Bus Property Group into Bus Ungraup from Bus Fig4 131 Group into Bus ep
53. capture and store screen valuable data in the memory When the combination of input signals from each channel is satisfied with the conditions of Signal Filter Mode the section of acquired data will be gathered by the Logic Analyzer and stored in the memory After storing the data it will return to the Logic Analyzer s system and be displayed as a waveform If the combination is not satisfied with the conditions of Signal Filter Mode the Logic Analyzer won t gather and store i R Tip 1 Ea Don t Care means that the Logic Analyzer captures There are 3 modes of Signal Filter all are from sampling configuration for each channel Filter Condition delay time mT Filter Condition delay time start edge Fig 3 23 High and Low Levels It is the system default n and ae the input signals satisfying the high level 3 Low Level means that the Logic Analyzer captures and displays the input signals satisfying the low level Filter Condition delay time EE Fi DERE Condition end edge delay time Fig 3 24 High and Low Levels Filter Delay Setup Filter Delay According to the filter condition Start Edge Show the waveform from the start edge to the delay time interval See details in Section 4 1 p C ls T us 15 14 13 12 11 10 3 harme DE 15 14 13 12 131 ko 3 ws etup due T 15 14 13 12 13 10 8 8 7 15 14 13 17 11 10 8 1 14 13 i 11 i Y 1 14 13 1Z 11 i T Tip i 15 14 13
54. display Fig 3 60 To Zoom In left click and drag the mouse pointer from left to right 696 7195 5694 4194 269 32973 28175 23378 185E JA UU UU QU uudtuuduul LILI LI LI d Fig 3 61 To Zoom Out left click and drag the mouse pointer from right to left When users activate the Zoom to zoom in zoom out the selected area the Tooltip on the right corner of the bottom will display the Time Clock or Address of the selected area When selecting the Zoom function and users are pressing and dragging the left key the information on the right corner of the bottom will be changed and updated with the width of the selected area And the information is displayed on the right corner of the bottom in the way of Tooltip When users loosen the mouse the information will disappear Tooltip Time Frequency Sample xxx time ns unit Address xxx There is no unit with the address Fig 3 62 To display the Tooltip left click and drag the mouse pointer from right to left or from left to right i Hand H ad 47 FMO7I4A P BE T4133 AR 0 BPR 23 6 Zeroplus Technology Co Ltd h Normal ESCAPE TR zoom In Fa nlf zoom Qut Fa Tips Zoom In and Out can be switched by changing the percentage value in the pull down menu 1 The system can set the value of Zoom In and Out The default unit is us when zooming in it will be automatically changed to ns when zooming out it w
55. fig4 101 Write zero Time Slot 4 ho o lrec VeuLLUP i MEM e a Vus IH MIN Views Sampling Window av D 0p ee M 15 us OD 2 us 60 us RESISTOR OD 6 us m MASTER 4 lho Fig4 97 Write zero Time Slot B Write 1 If the sampling is high 1 is generated note Read 1 is of a similar waveform pattern as in Fig4 98 129 FMO7I4A 77 Be Fs FH Aa a BB 4x e The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 Write one Time Slot Veur PULLUP MIN Vig MIN Vi MAX OV meee RESISTOR ASTER Fig4 98 Write one Time Slot 3 Read Data 1 When Slave reads data Master will generate a Read time slot 2 To initialize Read Data Master has to convert Data line from the high logic to the low 3 Data line must be kept as low as 1us 4 The Output Data of Slave must be 14us at most 5 To read from 15us where Read slot starts Master must stop driving I O Read data Time Slot VPULLUP VPULLUP MIN VH MIN se SAMPLING WINDOW VIL MAX OV tsu RELEASE LOWR RDV RESISTOR m MASTER D52432 Fig4 99 Read data Time Slot 6 When Read Time Slot ends I O Pin will be pulled back to the high count through the external resistor 7 During a write cycle all Write time slots must have duration of at least 60us and a recovery period of 1us 4 Typical 1 WIRE Conversation model can be sum
56. in software or hardware We appreciate your feedback 184 FMO7I4A
57. laser printer 169 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd LEETS Mantel eros 5 3 Hardware Troubleshooting Q1 Why are no lights on when I hook the USB cable to the Logic Analyzer A Double check whether the other end is properly connected to your PC There may also be a defect in your USB cable Try another cable Q2 Whycan t read any signals from my Logic Analyzer A Check whether you have correctly connected the signal cables to the activated pin on your test board and check the power supply of your test board The Logic Analyzer does not supply any electricity to a test board via signal lines Q3 I geta signal from only one Logic Analyzer when I have two connected what is wrong A Currently only the LAP B 702000 supports many Logic Analyzers working in series Also make sure that the signal lines power lines and ground line are properly connected Refer to Fig 1 11 Table 1 2 Table 1 3 Table 1 4 and Table 1 5 Q4 Why should I bother grounding Where can I ground A Grounding will protect the Logic Analyzer and the test board A proper ground may improve the quality and accuracy of your data Since it is impossible to avoid unwanted interference you may ground the Logic Analyzer with the test board to ensure that unwanted interference will equally disturb both the testing and tested devices ensuring a set of data that is still accurate Conclusion Every user of ou
58. ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PSEUD SORS due 3 6 1 Modify Workaround Color To modify the workaround color click the color block shown in Fig 3 158 A color panel shown in Fig 3 158 will pop up Select a color shown on the panel or click on Define Custom Colors to create the desired color Color Basic colors NI el NNI EHI WES ee E E AmE g E NN NM IN I EHENMNENMENMN EENHESENI NM Custom colors LEB i SS Sg Hue 160 Red 243 LFTITTTITITT d Detine Custom Colors gt Colors alid Lum 223 Blue 243 OF Cancel Add to Custom Colors Fig 3 158 Color panel with its advanced view 81 FMO7I4A PRE THS LS 2 f3 PR 23 S Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 3 6 2 Modify Waveform Color Foreground color refers to the color of the output signal lines in the Waveform Display Area Fig3 160 presents how to change the color of a signal Repeat the following procedures if users need to change colors of multiple items Step 2 Step 3 Step 1 Color Setting X Workaround Waveform 1 gm AL Mame F Relating Color Linewidth AD M 1 pixel AL 1 pixel AL pixel Aad 1 pixel LY 1 pixel AUB 1 pixel AU 1 pixel AQ pixel AOS 1 pixel 410 1 pixel A11 1 pixel 12 E 1 pixel A13 ads m 1 pixel T miwel hd 4 F Ex Cancel Default Hel
59. n be Pn fn dn jn fn dn Ptb fe fe fv je fe v Iv n n be Pn fn n je fn n Clear all OK Cancel Fig 3 135 Channel Selection Allow the choice of pins in which port will be included in the statistical analysis of a test run Column Selection 69 FMO7I4A ZP Be Ts Fa ha a BB 47x ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 Column Selection X v Full Period Positive Period Negative Period Conditional Full Period W Conditional Positive Period Conditional Negative Period J Start Pos J End Pos I Selected Data Fig 3 136 Column Selection Allow the choice of items which will be considered in the statistical results Condition Parameter Condition Parameter X Conditional Full Period 146ns IN Conditional Positive Period ans lt Time lt Conditional negative Period ans lt Time lt 8ns Fig 3 137 Condition Parameter Allow the setting of time intervals for Conditional Full Period Conditional Positive Period and Conditional Negative Period Statistics Window x Channel Selection Column Selection Condition Parameter Warning Parameter Refresh Statistics Filter cococcococcooooocoooooooocdocsu ciocoocococcoooooocoooocoooococdcsu 0 CccOdoooOgosd u amaooc co oc e e mm Fig 3 138 The Numbers of Data
60. signal connector of the Logic Analyzer and so do Port B C and D The voltage of each port can be configured independently Trigger Property B X Trigger Delay Trigger Content Trigger Range Trigger Level Port A 00 07 TTL J fs Port 08 15 User Defined jit v Pace ono RO xl Port B 08 15 A Please enter a number between 6 0 and 6 0 Fort C 00 07 Fort C 08 15 PotD 00 07 TTL fis M Port D 08 15 TTL fis Iv Ext Port 00 05 User Defined 3 3333 Iv OF Cancel Default Help Fig 4 13 Trigger Level Error Step 5 Trigger Range Setup Click i icon or click Trigger Property from the Trigger on the Menu Bar Then Click the Trigger Range the dialog box will appear as shown in Fig4 16 Tip This function is mainly for the range control for the saved files after triggering According to the procedures of the range control users can start the save of data according to the requirement of its time and times to get the standard of data statistics status 91 FMO7I4A P BE T1353 B ARAE Zeroplus Technology Co Ltd Trigger Property X Trigger Delay Trigger Content Trigger Range M Activate Trigger Range Range Setting Time Sample 1 minute Trigger Mark Setting The Allowed Trigger Mark Bar 128 Cancel Default Help Fig 4 14 Trigger Range 1 Activate Trigger Range The default is not activated 2 Range
61. the oO function of iu Protocol Analyzer CAN 2 0B and select OK to confirm c on MANU RT TIL LR LIT V E ULT UJ Group into Bus Gopy hanne Delete Channel ooo d L Fig4 132 Bus Property Select the decoding function of the CAN 2 0B 148 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 ZEROPLUS LAP B 702000 S N 000000 0000 CAN Bus als iol x Xx File Bus Signal Trigger RunjStop Data Tools Window Help 8 xj Oe eS SuSE b xk x aie i 50MHZ v ow 200 He s Page fi Cl E el feau e Ris ae Be Te PS Height fo rs Font Size fi Ew Scale 16 38us Display Pos 196 42us APos 111 02us v A T 111 02us v A B 600ns 7 Total 655 36us Display Range 131 18u BPos 110 42us v B T 11042us v Gomer Rae No Bus Signa m xig oxo Li Bus Setting 0x0 Su C Bus 4 TE J Activate the Latch Function m Protocol Analyzer Setting Protocol Analyzer Parameters Config C ZEROPLUS LA 1 WIRE MODULE V1 10 00 CN01 4 Q ZEROPLUS LA CAM 2 05 MODULE 1 32 00 CNO1 c ZEROPLUS L HDQ MODULE V2 07 00 CNO1 ZEROPLUS LA I2C MODULE V2 02 00 CNO1 ZEROPLUS LA SPI MODULE V1 13 00 CN01 ZEROPLUS LA UART MODULE V2 13 00 CN01 v Use the DsDp Find More Protocol Analyzer
62. to modify the Waveform Height and how to modify the Correlated Setting ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc2 nsi s x Fig 3 141 The Interface layout Shown in Default Settings 72 FMO7I4A ZP Be Fs Fh Aa eB BR S ae Zeroplus Logic Analyzer sers Manual Ver 3 10 Zeroplus Technology Co Ltd 3 4 1 Modify Waveform Display Mode To modify the display mode users can use icons on the tool bar box or menu For the menu go to Tools and click Customize See Fig 3 142 Color Setting pi Bus Property Waveform Display Made ay Refresh Protocol Analyzer C Sampling Site Display C Frequency Display Analog Waveform C Time Display Hide time of waveform Hardware Function Gong Huler Made W aveform Setting Regular Ruler Hardware Function Switch Waveform an Export Hardware Gontiguration File Font Size ie Correlated Setting Auto Close v Show the T Bar in the middle area Show Gridline Show Tooltip Data Process What da you want to show when vou press the Stop during the running Keep your data Continue reading data Check for Update D efault Cancel Help Fig 3 142 Customize the Display Mode by Using the Tool Bar gt ZEROPLUS LAP B 702000 5 N 000000 0000 LaDoc2 dg File Bus Signal Trigger Run Stop Data Tools Window Ft Tor De m S ate B b Sampling Site Display
63. to store CRC O Software Basic Setup of Protocol Analyzer 1 WIRE x Pin Assignment Protocol Analyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standard us Transmission MSB LSB Direction Data Length E bit Min bit M as 32 hit Data hie Mas 120 Cancel Default Help Fig4 101 Protocol Analyzer 1 WIRE Configuration dialog box Set the 1 WIRE Configuration dialog box Pin Assignment 1 WIRE only needs one channel to decode the signals and the default is AOO Connect Speed The Connect Speed can be set to Standard 1 us or High 0 2 us Transmission Direction The Transmission Direction can be set to MSB gt LSB or LSB gt MSB MSB gt LSB From High Level to Low Level LSB gt MSB From Low Level to High Level Data Length The Data Length can be set in the range from 1 to 32 bit and the default is 8 bit Sampling Position The Sampling Position can be set in the range from 1 to 120us and the default is 30us Protocol Analyzer Color Users can vary the colors of the decoded packet 131 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PREES ANUA VOT ste User Interface Instructions Set up the Protocol Analyzer Dialog Box which is set as the steps of I2C PROTOCOL ANALYZER 1 WIRE E X Fin Assignment Protocol Analyzer Color Owl Rese
64. used to find the previous packet It is used to find the next packet 7 It is used to find the last packet Option It is used to set the relative parameters for the List Window of the Memory Analyzer see the following Option dialog box ption ij x Bar Assignment Reaction Bar Ja Active Display Assignment Display Width 16 Color nr EE cater Datat EE Alteration i Cancel Default Fig4 167 Option Dialog Box Reaction Bar The default is the A Bar the added Bar can be displayed and selected in the pull down menu if users have added a new Bar The data position of the Reaction Bar will be displayed in the List Window of the Memory Analyzer Note The Ds Dp Bar and T Bar can t be displayed in the pull down menu Display Width It is used to set the display width of the List Window of the Memory Analyzer the default is 16 Users can select the 4 8 16 and 32 from the pull down menu and they also can input a value between 1 and 100 Color Users can vary the color of Addr Data R Data W and Alteration as their requirements The default color of the Addr is black the default color of the Data R is blue the default color of the Data W is red and the default color of the Alteration is gray Import Export d The Export function can select the TXT or EXCEL format to store the Data of the List 165 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus T
65. waveform open the Noise Filter window and then select None the waveform will be restored x Noise Filter None Fig4 153 Restore the Waveform 158 FMO7I4A PRET INE The Zeroplus Logic Anal PRETEN H Ps ex Deere Md Ver 3 10 di Zeroplus Technology Co Ltd 4 9 Data Contrast In order to make users analyze the Data and contrast the difference of Data easily there are adding the function of Data Contrast The function of Data Contrast is used to compare the difference of two signal files of the same type One is the Basic File and the other is the Contrast File It can line out the different waveform segments of the basic file in the contrast file Meanwhile it can count the number of the difference 4 9 1 Basic Software Setup of Data Contrast STEP 1 Click Data on the Menu Bar then select Xi to open the Data Contrast Settings dialog box Data Contrast Settings X vw Active Data Contrast Contrast Files Basic File HOQim 10Mh2 al Contrast File HOG im 200Mhz als Error Tolerance None Beginning of Data Contrast Result Error Stat an Contrast Beginning Paint T Bar Data Tools Window Help ME ci ad Select an Analytic Range Ue esos Et Noise Filter peneeeennnag wm k ap MN E WoT Data Contrast v Roll the contrast waveforms synchronization Pin Assignment w Display Files the contrast differences Ed Find Data Value CtrltF W D
66. 10 Software Basic Setup of Protocol Analyzer UART Step 1 Set up RAM Size Frequency Trigger Voltage and Trigger Position as described in Section 4 1 Tip The Setup of the Frequency should be higher but not too far away from the Baud Rate of the tested board Step 2 Setup Either Edge X as the trigger condition on the signals which are connected to the Tx pin or the Rx pin of the tested UART board Step 3 Set up the Protocol Analyzer Dialog Box which is set as the steps of I2C i NENNEN 88000 x I0 Pin Assignment Channel 400 hs Protocol Analyzer Property Parity Check None Parity Data E e BARRARE eo S Auto Length Stop Bit L Percentage 70 Min 1bps Max 10Mbps Sample Transmission LSB gt MSB Data Reverse Decoding Direction m Protocol nalyzer Color Start Cancel Default Help Fig 4 75 Protocol Analyzer UART Configuration dialog box Step 4 Set the UART Configuration dialog box Pin Assignment UART only needs one channel to decode the signals the default is AO0 Protocol Analyzer Property Parity Check There are three options on the dropdown menu None Parity Odd Parity and Even Parity and the default is None Parity Data Length Set the Data Length in the range from 1 to 56 Stop Bit Select the Stop Bit from the three options 1 1 5 and 2 and itis stopped in the High Level Percentage Sample Users can select the P
67. 111 FMO7I4A BERE S BS 98 E 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PSEUD SORS due Bus Signal 0 0 00408s 004 077s 004073s 00407s 004 066s 004063s 00408s 0041 0X000 0X0003 0X0004 0X0006G 0X0007 OX0008 m MF Fig4 63 After the Bus Data Color Setting Tips Reserve the original state by the above steps STEP 4 Activate the Latch function Activate the Latch function The default is not activated When the Latch function is activated the default channel is A00 and there are three conditions for selecting Rising Edge Falling Edge and Either Edge the default is Rising Edge Set the Latch function for one Bus The set Latch channel is A00 the analysis condition is set as Rising Edge Bus Property X Color Config ADD Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Coni v ZEROPLLIS LA CAN 2 06 MODULE 1 32 000CN01 ZEROPLUS LA HOQ MODULE v2 07 00 cN01 ZEROPLLIS LA I2C MODULE v2 02 0D CNO1 ZEROPLLIS LA SPI MODULE v1 13 DD CND1 ZEROPLLIS LA UART MODULE v2 13 DD CMO1 ZEROPLLIS LA LISB1 1 MODULE v1 62 DD CND1 v Use the Dsp More Protocol Analvzer ma orem Fig4 64 Activate the Latch Function The picture of the waveform analysis D ZEROPLUS LAP 0 702000 5 000000 0000 LoDoct EIE amp De DysiSqnal Topper Runviioo Qua lods Window tiep Du M d RARAS p p x
68. 111111 denotes End Peli Data Frame In the Peli Data Frame Data Frame as follows the frame of message is separated into Start of Frame SOB Arbitration Field Control Field Data Field CRC Field Ack Field End of Frame However the parts of Arbitration Field have much more than 18bits and the SRR and IDE is 1 Arbitration Control Data CRC Ack Endof Field ist Field Field Held Frame Lom TT T iim O LIT i mm um mug 18 5b a es 15 bits identifier Data CRC des r Code Fig4 124 Peli Data Frame Remote Transmit Request Frame When RTR 1 it denotes Remote Transmit Request Frame at this time DLC3 DLCO are the data bytes of return data And the frame doesn t have Data Field E 12 4 6 16 Arbitration Control CRC Field Field Field Frame m LL 5 e Ala er ERR NONE 11 bits es Identifier Data p Length Code 144 FMO7I4A 7A Be A FS he 1h BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig4 125 Remote Transmit Request Frame Error Frame The active Error Flag consists of six consecutive Data Field dominant bits Dominant bits violate the law of bit stuffing All bits can produce Error Frame after recognizing bit stuffing wrong which the Error Frame called Error Corresponding Error flag field includes sequence bits from 6 to 12 which produces by 1 or more nodes Error Frame ends in Error Delimiter field After Err
69. 116 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd eek ANUA vel ste Protocol Analyzer I2C Packet Analysis PROTOCOL ANALYZER I2C x Configuration Timing Packet Data Format Register ltem Color Item Color v lavedd DO V ANACK E M Read EN 7 D ACK E v Wiite EM 7 D NACK EN M Data EE IV Describe EM IV AACK EM Iv Reg Addr E DK Cancel Default Help OK Fig4 71 Protocol Analyzer I2C Packet dialog box In the Packet dialog box users can select the set item to be displayed and the color of item It is a Bus Packet List view which includes 4 formats which I2C happens as follows BUS Packet List Setting Refresh Export Synch Parameter 3 Packet KEE TimeStamp Length Port Bus 655 345us Packet Marne Tires SEE 2 PortC Bus 655 345us J DODO Packet Name Times ENS Data Length Packet METH TimeStamp Address Read A ACK Data DACRE Data CEACE pes rortatac aous ce read wack 25 Doc 38 mack Data DACRE bata RGR cata DRC cae Oo 47 D ACK 58 D ACK 69 D ACK 7 D ACK Fig4 72 Protocol Analyzer I2C Packet List Packet 1 It is commonly normal data which includes 1 Data Packet 2 It is commonly normal data which includes 2 Data Packet 3 It is commonly normal data which includes 1 Data Packet 4 It is commonly normal data which includes 6 Data and 1 Address
70. 1l WIRE 20161527 33 96 30 96 07 90 01 48 2F FF FF FF FF FF FF 04 00 ET Fig4 109 Protocol Analyzer 1 WIRE Packet List Packet 1 It is commonly normal Data which includes 1 Data Packet 2 It is commonly normal Data which includes 1 Data Packet 3 It is commonly normal Data which includes 1 Data Packet 4 It is commonly normal Data which includes 1 Data Packet 5 It is commonly normal Data which includes 1 Data Packet and Idling Length Packet s TimeStamp is reset 135 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 4 5 6 HDQ Analysis Preface Increase the Protocol Analyzer feature to analyze the Protocol Analyzer HDQ transmission protocol data Using LA analysis function the required serial data can be converted and presented in the form of the Protocol Analyzer Therefore the software needs to add a dialog box so as to set up a Protocol Analyzer HDQ dialog box HDQ Introduction 1 Brief Introduction Features Protocol Analyzer HDQ is a non synchronic half duplex serial transmission which requires only one HDQ and uses a quasi PWM Pulse Width Modulation to verify the serial data Applications HDQ is commonly applied to the display interface for battery management 2 Protocol Analyzer Signal Specifications Signal Frequency Not fixed around 12MHz 13MHz and 19 2MHz Appropriate Sampling Rate 100MHz Name of Syn Signals HDQ Data V
71. 2 CH x Bus Trigger i b g AD2 A02 T gg Protocol Analyzer Trigger ee A03 A03 5d Group Level L g ADA ADA T o 0 A05 AI x Bus Name perator Value i Bust 1 iL 4 A06 A06 5 zs Data Format 4 A07 At oe C Binary C Decimal C Decimal Sianed g A08 x Hexadecimal ASCII i 4 A09 408 SZ L g ATO ATO OK Cancel Default Help a A11 A11 5d ok ces Detour Hep Fig 4 35 Bus Trigger Setup 101 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 4 3 Plug Analysis Plug Introduction The Protocol Analyzer which runs in the form of the Module is independent from the Main Program Every Protocol Analyzer is an independent module that is one Protocol Analyzer doesn t has an effect upon another Protocol Analyzer One Protocol Analyzer can analyze many buses at the same time and the parameters of each Protocol Analyzer are independent At present the Protocol Analyzer supports I2C UART SPI HDQ 1 WIRE CAN2 OB at present In the future it will support more Protocol Analyzers However when the specific Module or Protocol Analyzer needs to be used they should be paid firstly Zeroplus Technology reserves the right to purchase the Protocol Analyzer or use the Protocol Analyzer for free Operating Instructions After the Protocol Analyzer Plugs are installed they can be seen as the figure below for exam
72. 2 Transmit the tested Protocol Zu Sona to the oJ als acit for EXON coe Analyzer SPI Bus 5ignal Filter I e I UNKNOW 08000000 UNKNOW 10000000 10000000 UNKNOW Fig4 159 Waveform before Refreshing STEP 3 Choose Select an Analytic Range function to select the 21 range and drag Ds Bar to B Bar Bus Signal Bus Filter ZH 4 MO MW d X Fig4 160 Drag Ds Bar to B Bar g aD STEP 4 Click x the Logic bud will analyze the data Janaa Ds ule Dp Bus Si ed Bus Filter ERU 400 g sO g N02 Fig4 161 Analyze the Data Between Ds and Dp STEP 5 Click Sl again the waveform returns to the original state 163 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 B Is i goes nes EP Eq ori Lear n qd Bus Signal Bus Filter ERAN UNKNOW 10000000 Fig4 162 Restore the Original State Tip The Refresh Protocol Analyzer function has effected while the Ds and Dp are activated 4 10 Memory Analyzer Memory Analyzer enables the system to divide the packet format in the Protocol Analyzer and display the Address and Data in an independent list It is better for understanding the relative relationship and status of t
73. 85 Taiwan Chung Ho City Instrument Division Business Department ZEROPLUS TECHNOLOGY CO LTD 2F No 242 1 Nanya St North Dist Hsinchu City 30052 Taiwan R O C Taiwan Hsinchu City Tel 886 3 542 6637 Fax 886 3 542 4917 ZIP Code 30052 E Mail hunter zeroplus com tw ZEROPLUS TECHNOLOGY CO LTD Address 2F NO 123 Jian Ba Rd Taiwan Chung Ho City Chung Ho City Taipei Hsian R O C Tel 886 2 6620 2225 Ext 200 Fax 886 2 6620 2226 Other Service Departments ZEROPLUS TECHNOLOGY DONG GUAN CO LTD Room 2821 B2 Section Building 1 Hong Rong Square District 80 Bao an Shenzhen City Guangdong Province China Shenzhen China Mainland Tel 86 755 2955 6305 6 Fax 86 755 2955 6306 808 ZIP Code 518102 ZEROPLUS TECHNOLOGY DONG GUAN CO LTD 101 No 172 Alley 377 Chen Hui Road Zhang Jiang Pudong New Area Shanghai City Tel 86 21 50278005 6 Fax 86 21 50278006 ZIP Code 201203 China Shanghai Users can download the newest Software and User Manual ZEROPLUS is the brand of ZEROPLUS TECHNOLOGY CO LTD The other brands and products are the brand or registered trade mark of the individual company or organization Conclusion The demonstrations in this User Manual will enhance users understanding of our products in future issues even though the manual ends here We thank you for choosing the Logic Analyzer Please contact us if you feel anything that could be done better either
74. A I2C MODULE V2 02 00 CNO1 c ZEROPLUS L SPI MODULE V1 13 00 CNO1 c ZEROPLUS L UART MODULE v2 13 00 CNO1 ZEROPLUS L USB1 1 MODULE V1 62 00 CN01 v Use the DsDp Cancel Help Fig 3 80 Find Editor Box More Protocol Analyzer When you input I in the Find editor box the Protocol Analyzer list displays all Protocol Analyzers with the initial character of I see the below picture Bus Property xj mBus Setting C Bus olor Gonfig Activate the Latch Function Protocol Analyzer Setting Protocol Analyzer Parameters Config ZEROPLUS L I2C MODULE V 2 02 00 CNO1 v Use the DsDp More Protocol Analyzer Cancel Help Fig 3 81 Find Result Refresh Protocol Analyzer See Section 4 10 for detailed instructions Analog Waveform The function of Analog Waveform means that the Display Mode of Bus Data is not the Pure Data Mode while it displays data change with the curve which looks like a waveform which in fact is a curve to describe the data change So it is called the Analog Waveform The Analog Waveform can be divided into two kinds namely Single Analog Display and Mixed Analog Display see the figures as below fieles oed AP di Tro NO PP ORG UNIT TL aar Pb i D Bua tme unir pata leon aie pb 7 EET aliti xj Ate d Be Ae bM cm sod ee ce G BBs ton e je js 2bEILLZOM EL Hage fio tag Fou Soe fi
75. Address r Protocol Analyzer Color Start Data Slave Addr Read Write Reg Addr A ACK A NACK D ACK D NACK Stop OK Cancel i Fig 4 68 Protocol Analyzer I2C Configuration dialog box Step 6 Set the I2C Configuration dialog box Pin Assignment SDA Channel It is the Data channel and the default is AOO SCL Channel It is the Clock channel and the default is A01 Data Mode Set the Data Length used by the Slave Addr and the Data Protocol Analyzer Property Set the Write Bit or Read Bit to Low Level Set the ACK or NACK to Low Level Don t stop analyzing when NACK appears When the option is selected the data will be analyzed continuously when the NACK appears Add the Read Write Bit for Slave Address When the option is selected the decoding will be displayed by way of the added Read Write Bit for Slave Address Protocol Analyzer Color Users can vary the colors of the decoded packet Step 7 Press OK to exit the dialog box of Protocol Analyzer I2C Step 8 Click Run to acquire I2C signal from the tested I2C circuit Refer to Fig 4 69 Tip Click BB icon to view all data and then select the waveform analysis tools to analyze the waveforms gt ZEROPLUS LAP B 702000 S N 000000 0000 I2C als B xj X File Bus Signal Trigger Run Stop Data Tools Window Help 81 x DEAS SES ET ELE gt bb 256K v ve i 200MHZz o o 5096 x e Page 1 Eg Gl E i 0 fi s60837u
76. B 4 Group into Bus Cre C Bus Color Contig rv Ungroup from Bus Ctrl U Activate the Latch Function 400 gt De M Al i Add Channel Rising Edge p Gopy channel adii Protocol Analyzer Setting Delete Ghanne we Protocol Analyzer Parameters Config 4 A Delete All Channels i i ZEROPLUS LA CAN 2 08 MODULE V1 32 00 CNO01 ZEROPLLIS LA HDQ MODULE V2 07 00 CNO1 Q ZEROPLUS LA I2C MODULE V2 02 00 CNO01 ZEROPLUS LA SPI MODULE V1 13 00 CNO1 c ZEROPLUS LA UART MODULE V2 13 00 CNO01 C ZEROPLUS LA LISB1 1 MODULE V1 62 00 CN01 on PE Restore Default Channels oA Format Row i Rename V Use the DsDp Find More Protocol Analyzer HE EN Fig4 67 Bus Property Step 5 For Protocol Analyzer Setting select Protocol Analyzer Then choose ZEROPLUS LA I2C MODULE V2 02 00 CNO1 click Parameters Configuration The following image will appear 114 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd eek ANUA vel ste PROTOCOL ANALYZER I2C x Configuration Timing Packet Data Format Register Pin Assignment Data Mode Item Name Data Length SDA A00 v Slave Addr Address bit ec o gt RegAdd Regd 8 bit Data Data 8 bit r Protocol Analyzer Property write Bit Low Level Don t stop analyzing when NACK appears ACK v Low Level Add the Read Write Bit for Slave
77. C Data NCRC 249 SRR IDE 15648 RTR RB1 RO 8 89 78 67 NCRC DEMO Ui Fig4 137 CAN 2 0B Packet List Displayed with the Waveform 4 6 Compression The Compression function can make the system to compress the received signal and has more data stored in each memory channel 4 6 1 Software Basic Setup of Compression Step 1 Set up RAM Size Frequency Trigger Voltage and Trigger Position as described in Section 4 1 Step 2 Set up the trigger edge on the signal or the bus to be triggered Step 3 Click UH icon or click the compression function from the Sampling Setup dialog box then click Apply or OK to run PLUS LAP B 702000 5 N 0D0D00 0DU00 LaDoci Bus Signal Trigger Runj5top Data Tool Window Help d Sampling Setup ETB gt bb oo dh 25MH gt a on KK x AGG Signal Filte Clock Source Asynchronous Clock Group inte Unaroaup t Frequency 125mhz Expand i Synchronous Clock Colle f External Clock Format Ric Rename s Single Glock External CLEO 16 Ghanm OR 32 Chann C Mix Glock External CLE1 z chanm Frequency 1 0EHz Min B OD1Hz Max 150MHz Compression Made Signal Filter RAM Size z Data Compression Signal Filter Setup Aol Cancel Default Help 151 FMO7I4A BEL SE BS 977 BR 73 a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PSEUDO SEES due Fig 4 138 Compression Mode Step 4
78. Coni i ZEROPLUS L CAM 2 06 MODULE 1 32 000CN014 ZEROPLUS L HOQ MODULE 2 07 O0fCNO1 i ZEROPLUS LA 120 MODULE V2 02 000CNO1 i ZEROPLUS LA SPI MODULE v1 13 00r CNO1 ZEROPLUS L UART MODULE v2 13 0007 MO1 i ZEROPLLIS LA LISB1 1 MODULE v1 62 0007 M01 Iw Use the psp More Protocol Analyzer Cancel Help Fig4 59 Color Configuration Bus Data Color j X Bus Mame Busl Data Condition Data Min Data Max Cancel Default Help Fig4 60 Bus Data Color Bus Name Display the selected Bus name Data Condition Select the Data Condition to change the Bus data color There are four options which are In Range and Not In Range Data Min Enter the min data that is required by users Data Max Enter the max data that is required by users The max data can be used only when the data condition is set in range Select Color Select the changed color according with the data condition which is set by users STEP 3 Click Color Configuration to open the Bus Data Color dialog box and set the Data Condition 5 and Select Color is Orange Bus Data Color x Bus Mame Busi Data Condition Data Min Data Max Cancel Default Help Fig4 61 Set the color for Bus1 004 073 Yv 004 08 004 077s 004 0665 F oxooo 0x0003 004 063 004 07s NA SZ Fig4 62 Before the Bus Data Color Setting
79. DULE 2 02 000CN01 i ZEROPLUS LA SPI MODULE 1 15 000CNO14 i ZEROPLUS LA UART MODULE v2 13 000 MU1 v Use the DsDp More Protocol Analvzer Fig4 37 Bus Property STEP 3 Click Parameters Configuration button select Register dialog box and enter the serial key The below dialog box will appear PROTOCOL ANALYZER 1 WIRE i xj Congratulation 1 RAE decoding function has been activated IF You have questions about operating software please follow the appropriate instructions below Our technical support team willbe happy to answer any questions you have gt gt By phone Bab z bb21 2225 gt gt Applications through Email service 2zeroplus com ty gt gt Website http Zh zeroplus corn ty Copyright C 1337 2010 2 EROPLUS TECHNOLOGY ED LTD Cancel Default Help Fig4 38 Protocol Analyzer 1 WIRE 103 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PSEUD SORS due 4 4 Bus Packet List Bus Packet List is a graphic list which is used for doing Statistics and showing Bus packet It is visual and direct especially for I2C USB and CAN2 0B When there is a packet list it gets twice the result with half the effort to check the data The Packet List has its startup button in the Tool Bar After starting it it will show a small window underside the waveform window You can alter its size in order to find more data
80. Dd ed MO 7 Fig4 117 Bus Property ZEROPLUS LA 1 WIRE MODULE V1 10 00 CN01 ZEROPLUS L CAN 2 0B MODULE V1 32 00 CN01 ZEROPLUS L HDQ MODULE v2 07 O00 CNO1 Fig4 118 Protocol Analyzer HDQ Setup Complete the Protocol Analyzer HDQ decoding 140 FMO7I4A BEL SE AS 9778 BR 73 a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du E ZEROPLUS LAP B 702000 S N 000000 0000 HDQim 10Mhz als Bl x X2 File Bus Signal Trigger Run Stop Data Tools Window Help amp x Oe amp zs m bb 3 1M sie 141 10MHz JL an 50 i Page fi m E3 RE e Gi 6 7a5asour R Be Be Te B e oE Height 30 Tri Scale 6 745489us Display Pos 1 258367s APos 97 8766ms v A T 97 8766ms 7 A B 3us v Total 20 786216s Display Range 1 258198 BPos 97 87368ms v B T 97 8736ms v Compr Rate 198 000 1 258232s 1 258266s 1 25835 1 2583335 1 258367s 1 258401s 1 258435s 1 250468s 1 258502 1 25853 Jour ja AT ppp pr gu pup fea Waal jupe E wq E L A03 A03 g A04 04 g A05 405 4 A06 06 AQ AD g A08 A08 4 A09 409 g A10 A10 ATI AT hd b T LLLEM bM Z Fig4 119 Protocol Analyzer HDQ Decoding Protocol Analyzer HDQ Packet Analysis PROTOCOL ANALYZER HOQ l x Configuration Packet Data Format Register ltem Color ltem Color Cance
81. E 15 14 13 12 11 8 7 6 5 4 3 2 1 15 14 13 12 11 8 7 Bl 0 y A04 04 15 14 13 12 11 PEETS IA 3 2 1 15 14 13 12 11 8 EN 6 0 f A05 A05 f ADG A06 IV Reserve waveform data and show them Ok Cancel Help y AQ A07 Fig 4 30 Channels Setup Rename the Bus and set up the channels of the Bus as shown in Fig 4 31 Channels Setup xj Add Bus Signal Delete Bus Signal Delete All Default KOAX XXX X AX XC ECC C OS SS X Aes ess ei c o o o o o aff 4 x DG x oS S SIS OQ 2G Rael ADDR DADS XA XX XX XX VEE AS 2S US OS OS DG Do DG oS Sos gt EX ava xS 7 7 MMM PO PO P2 Mh ceIoljiojojjjojo Oo cO CO CO CO CO co co 7 7 7 7 7 RH mnnn m eee Ee Ee Ee Se CO CO CO CO CO CO CO WY IV Reserve waveform data and show them Ok Cancel Help Fig 4 31 Rename Bus 1 Click the column with blue type the given name of the Bus and then press Enter to confirm it 2 Go to the relative channels as shown in Fig 4 31 and go to numbers 3 4 5 6 which are located on column Port A and row Bus1 Click them to become purple and then set these segments of signals 3 Click OK to get the result as shown in Area 1 99 FMO7I4A 77 Be Fs FS he a BB INEI The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du Bus Signal E U Levelo Fiter EM 4 80224ms 1 35168ms 901 12us 450 56us 9 450 56
82. ESCAPE TR Zoom In F9 a Zoom Out F8 Show all Data F10 gt Previous Zoom Ctrl z2 Data Format b Waveform Mode Square Waveform Sawtooth Waveform List Data Mode Fig 3 70 Waveform Mode in the Sawtooth Waveform b rinmarusevigumm l To the Previous Edge Fil 06 AO ADS A08 A10 J To the Next Edge Fiz d r d d Go To 1 T 0 7 amp Add Bar Alt a 1 0 0 0 1 0 n 0 sf Delete Bar Alt B 1 i i 1 Al Zoom E 1 0 D n ji 1 D n 0 Hand H 1 0 T 0 N Normal ESCAPE 1 0 0 0 1 0 0 0 nR Zoom D E i d M Zoom Gut F3 4 D 0 D EB show all Data F10 4 A i x Previous zoom Ghrl z D D 0 Data Format 0 0 D D 0 waveform Mode 0 0 0 0 D gt iv All Data WEE IE DE Sampling Changed Dot Compression 0 j1 j0 ji 0 D Data Changed Dot Compression 1 1 0 f 0 0 Fig 3 71 Show the List Data Mode All Data Sampling Changed Dot Compression Data Changed Dot Compression 49 FMO7I4A PRE THS LIS 2 ARO Zeroplus Technology Co Ltd Tools rS Customize Color Setting BUS Bus Property Refresh Protocol 4nalyzer 4nalog Waveform k waveform Display Mode Sampling Site Display Time Display Hardware Function Cong Ruler Made Regular Ruler Hardware Function Switch Export Hardware Gonfiguration File Correlated Setting Iv Auto Close Show Gridline Show Tooltip Data Process Common Setup Toolbars Shortcut
83. Edge Fil To the Next Edge Plz tro To Tip 1 Press T go to T Bar 2 Press A go to A Bar 3 Press B go to B Bar Altes t Add Bar Add user defined bars 1 Click the above menu item from Data menu or click Add Bar icon from the tool box 2 Give a Bar Name define a Bar Color and enter a Bar Position 3 Define the Bar Key with the number between 0 and 9 Tip The number shortcut key is set in the Add Bar dialog box Every new bar can be filled in one number which is used to find the required bar The Zeroplus Logic Analyzer User s Manual Ver 3 10 Go to the previous edge sweep of the indicated signal Go to the next edge sweep of the indicated signal Go To T A B or Go To More Pimple Fea un Fas 1Stee A 7519 Besplar bagi i 13thes B fan tea B a liaa r Fig 3 54 T Bar will be displayed in the center of the waveform area k l Select an Analytic Range gt Noise Filter zm Bus Width Filter Data Contrast B Find Data value Ctrl F LA Find Pulse Width l To the Previous Edge Fil f To the Next Edge F12 Go To d Te GoToTBar T p Add Bar Alt Au Ga To A Bar A si Delete Bar Alt B B Go ToB Bar E i zoom E Go To More em Hand H E Normal ESCAPE R Zoom In F2 E Zoom Out F8 Shaw all Data F10 w Previous zoom Ckrl4 z Data Format waveform Made List Data Mode Fig 3 55 The selected bar will be shifted to th
84. Erasable Programmable Read Only Memory for error checking proposes with other chips There are two concepts about UART which must be understood before performing any further tasks The UART protocol will first translate a parallel data into serial data for the UART requiring only one wire to transmit signals The transmission starts at a triggered Low position and there are 7 or 8 bits of data following afterwards To halt a transmission it requires a signal or multiple bits of logic 1 Odd number bit transmission requires odd parity error checking and even number bit transmission requires even number error checking Following the parity check is another data translation from serial data into parallel data UART also generates an extra signal to indicate receiving and transmitting conditions Furthermore since UART is an asynchronous communication protocol and data transmission may not be in bytes a complete UART signal packet must consist of Start Data Parity and Stop segments They are as following Start When TXD is changing from HIGH to LOW voltage 1 bit Data Users must decide the size of signal packet segment from 4 to 8bits Parity This performs three types of parity checks Odd Parity Even Parity and None Parity Stop This occurs when TXD is at high voltage This is adjustable this is commonly set to 1 or 2 118 FMO7I4A ZP Be ts FH ha BB 4x e The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3
85. F Read A NACK ADDR NACK Zi Fig4 44 TimeStamp TIP When the Display Bar function of Signal Filter is activated the Signal Filter Display Bar will be displayed in the Bus Packet List View as well as the TimeStamp Address and Length of the Display Bar 3 Packet Idle and Packet Length Packet Idle Packet Interval Time Packet Length Packet Time Length When those above two items are to be displayed it only chooses one of them to display which is controlled by Plug Because it is impossible that every Protocol Analyzer packet has registered TimeStamp and ended we add two special Unkonw_Flag to judge the TimeStamp and end of the packet they are Unknow Start Flag and Unknow End Flag This Data Start is regarded as Packet Timestamp This Unknow register is Unknow End Flag Packet Length Fig4 45 Protocol Analyzer I2C Packet Length Tip Because 2C has start as the Packet TimeStamp it does not need to use Unknow Start Flag as the TimeStamp 4 Bus BUS Packet List Refresh Export Synch Parameter Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data o 1 o 1 jJ 0 j Packet Name TimeStamp Data Data Data Data Data Data Data Data Data L0 12 o 2 oO Packet Name TimeStamp Data Data Data Data Data Data Data BEL Data o 1 o 1 O 1 0 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data o 1 o 2 j o j 1 o
86. Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Packet Idle Time When the check box is selected the default value is 5ms Specifically when the Packet Idle Time is activated the packet will be divided again according to the Packet Idle Time If the Time Length between the previous packet and the next packet is more than 5ms the two packets will still be divided or the two packets will be merged into one packet It is a Bus Packet List view which includes 4 formats which UART happens below PARITY clews whether users start PARITY or not BUS Packet List Export Synch Parameter Packet Name TimeStamp Length Port B Bus 221 82532ms 0000 3 703698s Packet Name TimeStamp Data Length Packet Name TimeStamp Data Length Packet MEIN Timestamp Data Parity DESCRIBE Port A UART 221 82528ms 00 Error 1 Parity Error should High Fig4 80 UART Packet List Packet1 It is commonly normal Data which includes 1 Data Packet2 It is commonly normal Data which includes 1 Data Packet3 It is commonly normal Data which includes 1 Data Packet4 It is the state of Parity Error the DESCRIBE is Parity Error should High Note Because the Even Parity and the Odd are impossible to present to the same Bus so we only take the Even Parity for an example here Packet Length When judging the start of UART
87. GRA ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 3 User Interface 3 1 Menu amp Tool Bars 3 2 Find Data Value 3 3 Statistics Feature 3 4 Customize Interface 3 5 Auto Save 3 6 Color Setting 3 The Flow of Software Operation 23 FMO7I4A ZP Be ts FH ha BB 4x e The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 Objective Chapter 3 presents detailed information on the Logic Analyzer software interface in four sections Menu Bar Tool Bar Statistical Function and Interface Customization Basic Layout The layout of the Logic Analyzer software interface can be divided into nine sections as shown in the following figure 20 UPLUS LAP B 702000 S N 000000 0000 LaDoc1 GE File xad Trigger Data Tools Window Help TEES Pos APos 15 Display Range 25 26 BPos 15 v Group 0 aoa Filter 4 Fig 3 1 Software Interface Menu Bar All operations are performed directly from the menu bar including configure label rename execute and stop Pull down menus allow easy navigation through the measurement pane Tool Bar The tool bar is the graphical user interface which can make you work with some of the more common applications From these icons you can change settings and operate the Logic An
88. Irigger Mark Trigger Mark Fig3 39 Click to activate the Trigger Mark function See Sections 4 1 for detailed instructions Set the trigger condition as Don t Care See Section 4 1 for detailed instructions Hish Set the trigger condition as High ans See Section 4 1 for detailed instructions Set the trigger condition as Low See Section 4 1 for detailed instructions oC Dont Care 39 FMO7I4A 77 BE Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Set the trigger condition as Rising Edge See Section 4 1 for detailed instructions lt lt Jains la Set the trigger condition as Falling Edge See Section 4 1 for detailed instructions Ere Files Set the trigger condition as Either Edge See Section 4 1 for detailed instructions Reset Reset the trigger condition Run Stop b Single Eun F5 bb Repetitive Run Fb B up ET Fig 3 40 Run Stop Menu b b Fig 3 41 Run Stop Tool Box Menu Bar Run Stop Menu Item Detail Menu amp Dialog Box Single Run FS Click to run once See Section 4 1 for detailed instructions Click to run continuously until the Stop button is bb Repetittve Eun Fo pressed See Section 4 1 for detailed instructions g Stop Fi Click to stop the repetitive run See Section 4 1 for detailed instructions 40 FMO7I4A BETIS A 2 A PR 23 8 Zeroplus Technology Co Ltd Data 7 Select an Analytic Range gt
89. JME y O MHz OME O MHz VGA Display Capability with VGA Display Capability with 1024x768 1024x768 resolution or higher resolution or higher At least 100MB available space At least 100MB available space USB1 1 supported USB2 0 supported Display Devices 14 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 1 5 Device Maintenance and Safety Follow these instructions for proper operation and storage of the Logic Analyzer Table 1 7 General Advice Cautions Do not place heavy objects on the Zeroplus Logic Analyzer Avoid hard impacts and rough handling Protect the Logic Analyzer from static discharge Do not disassemble the Zeroplus Logic Analyzer this will void the warranty and could affect its operation Cleaning Use a soft damp cloth with a mild detergent to clean Do not spray any liquid on the Zeroplus Logic Analyzer or immerse it in any liquid Do not use harsh chemicals or cleaners containing substances such as benzene toluene xylene or acetone Table 1 8 Electrical Specifications Working Voltage Refer to the User Manual for error analysis calculation 15 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd LEETS Mantel eros Table 1 9 Operating Environment WARNING Avoid direct sunlight Use in a dust free non conductive environment see Note Relative Humidity lt 80 Altitude l
90. Key Auto Save Frequency Display f Hide time of waveform Waveform Setting Waveform an FontSize fiz v Show the T Bar in the middle area The Zeroplus Logic Analyzer User s Manual Ver 3 10 What do you want to show when you press the Stop during the running C Keep your data Check for Update Continue reading data Default Cancel Help Fig 3 72 Tools Menu 5 4 Height 30 Fig 3 73 Height Tool Box Menu Bar Tools Menu Item LT lt 3 Common Setup Toolbars Shortcut Key Auto Save ra Customize Detail Menu amp Dialog Box Waveform Display Mode Sampling Site Display C Frequency Display Hide time of waveform C Time Display Ruler Mode Waveform Setting C Regular Ruler Waveform 30 X Time Sampling Site Ruler FontSize 2 7 eR WARREN PEDE r Correlated Setting v Auto Close Show Gridline J Show Tooltip v Show the T Bar in the middle area r Data Process What do you want to show when you press the Stop during the running Continue reading data Default C Keep your data v Check for Update Cancel Help Fig 3 74 Customize the workspace See Section 3 4 for detailed instructions 50 FMO7I4A 7A Be tt FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Customize Fig 3 75 Toolbars Setting
91. MU d ase renMmpIU e ubt MR UIS 158 4 8 1 Basic Software Setup Of Noise Pier iei corso eoa enin e eor s ee uana ears sse san e urea ee aad aua said 158 BUE TMS RE OUTRE 159 2 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 4 9 Basic Software Setup of Data Contrast eeeessessssssssseeeeeeeeeeeeeeee enne eene nnns 159 ECrrespnProtocel Andi veu escis bte E EE uim ique inm D ei A E DU UAM REN M OEE 163 4 9 2 Basic Software Setup of Refresh Protocol Analyzer eeeeeeeeeeeeeeeeeeeeenn 163 4 10 Momon a ZETooucuoreivete ute seu Pet Ursus dUTet MU eu NISI DI OroM NI PP I DU MeL IDEEN NUI rO LoR MUI 164 4 10 1 Basic Software Setup of Memory Analyzer sseessseeeeeeenneeeeenen nnne enne nnns 164 TEOUDICSHOOLITIE oic test urn ccs airs ke pd Esse Eid PODES ML EU M sm NEUE 167 5 1 Installation Troubleshoottng 25 5 e rertetie retta oe Irene hu an Een poda a bkg neve Ia arae Rex a ep eb eade da ab bd eme id 168 3 2 SOME are TroUuBICSmOO IET joecass ee doerdid arr E poco Ieri ides ub rec Peeters E 169 5 3 Hardwate TIroublesHOOLlllB seecnrr bis oco seminum eusmod ure ementi aros sen Ue ceu uiuo qu unus oReME eaa 170 171 6 1 PP ARG i NT Tc i 172 6 2 SII TT 174 6 3 PRS IGS EAN esset nese
92. P Be tt Fh ha BB 47x ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 Waiting Connected Zz Fig 4 29 Waiting Status 98 FMO7I4A 7A Be A FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 4 2 Bus Logic Analysis Section 4 2 presents detailed instructions about logic analysis with a set of grouped signals which is known as Bus Logic Analysis Basic Software Setup of the Bus Logic Analysis Step 1 Set up the RAM Size Frequency Trigger Voltage and Trigger Position as described in Section 4 1 Step 2 Group channels into a Bus Click Channels Setup on Bus Signal of the Menu Bar or click i icon The dialog box is shown in Fig 4 30 will appear PLUS LAP B 702000 S N 000000 0000 LaDoc1 Bus Signal Trigger Run Stop Data Tools Window Help fy Sampling Setup bb 2k sie i 100MHz pem rose v 9 s Page fi iii Ed Channels Setup lfan112u vl v Ad Be Te B 1e atll o nei RA elim xi Hj Signal Pe Setup Group Ungaro Zapar XXN AAA rs Calley Oe Re eo Z E 8 7 6 5 4 3 2 1 8 7 6 w Renan 8 7 6 5 4 3 2 1 87 6 0 15 14 13 12 11 8 7 6 5 4 3 2 1 15 14 13 12 11 8 71 6 0 16 Ch 15 14 13 12 11 8 71 6 5 4 3 2 1 15 14 13 12 11 6 7 6 0 32 Ch 15 14 13 12 11 BPG oye 15 14 13 12 11 BEANS 0 70 Ch 15 14 13 12 11 8 7 8 5 4 3 2 1 15 14 13 12 11 6 7 16 0 I
93. PY_CN hp LaserJet 1000 Properties Status Ready Type hp LaserJet 1000 Where USBODT Comment Print Chit Print range Copies All Number of copies 1 Pages from 1 to n F cu IZallate C Current Page up Cancel 30 FMO7I4A 7A Be A FS he iP BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig 3 16 Click to enter the Print dialog box Print Preview Fig 3 17 Click to show a Preview of the Print Recent File Show recently saved file Exit Exit the program Bus Signal Sampling Setup x inf Sampling Setup Clock Source fz Channels Setup Asynchronous Clock Shy Signal Filter Setup me Frequency 1 25Hz ba Group into Bus Gtr G Ungroup from Bus Ctrl U Synchronous Clock External Clock Expand Collapse Single Clock External CLKO Format Row Auto Size OR d Rename SS MD E RENE Move Left Up lock External CLK1 16 Channel Mode Move Right Down 32 Channel Mode Sey 00K Min 0 001Hz Max 150MHz 70 Channel Mode rll Show All Channels Setup p il inesse x X os 2S zc i Apply Cancel Default Help DOR DE DA EES Rl 141 131 121 11 Runt Fig 3 18 Bus Signal Menu Dialog boxes of the Sampling Setup and Channels Setup are shown and indicated by arrows Es TUU Tr Y Y Fig 3 19 Trigger Tool Box 3l FMO7I4A
94. Post Trigger TOGET TENEI 16 Levels 16 Levels 16 Levels Trigger eoun 1 65535 1 65535 1 65535 Threshold Working Voltage 6V 6V 6V 6V 6V 6V Keep Operating Interface Chinese Si Chinese Si Chinese Si Language Chinese Tr English Chinese Tr English Chinese Tr English IMG BASE RANJE ops 10Ms ops 10Ms ops 10Ms Software Trigger Page 1 8192 Page 1 Page Safety Certification FCC CE FCC CE FCC CE ee eae 100Hz 333MHz 100MHz 500MHz 200MHz 1GHz asynchronous Sampling Rate 13 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 1 4 system Requirements This section discusses basic operating system and hardware requirements for the Logic Analyzer Software and hardware capabilities may vary depending on PC configuration this manual assumes proper installation of a supported operating system as listed below 1 4 1 Operating System Requirements Table 1 5 Operating System Requirements of LAP B Series e Windows 2000 e Windows NT 4 0 Professional Server Family Workstation amp Server Service Pack 6 e Windows XP e Windows Server 2003 Home Professional Editions 32 Bit Operating System version Name e Windows VISTA 32 Bit and 64 Bit version e Windows 7 32 Bit and 64 Bit version 1 4 2 Hardware System Requirements Table 1 6 Hardware System Requirements of LAP B Series a Name Lowest Configuration Recommended Configuration
95. Qualified by Condition Parameter 70 FMO7I4A Zeroplus Technology Co Ltd Warning Parameter Warning Parameter X Conditions Min M ax Period v J 10us m 100us C Frequency D 10k T 100kHz Fig 3 139 Warning Parameter Set the conditions which will be marked to call users attention Statistics Window E x Channel Selection Column Selection Condition Parameter Warning Parameter Refresh Statistics Filter Full Periad Conditional Conditional Conditional Start Pas Ds Dp 400 1020 1020 1020 AUT S14 514 alg Ds Dp 402 aah Zur for Ds Dp 405 128 126 129 Ds Dp A04 6 6 65 Ds Dp 405 3z 2 RE Ds Dp AUG 16 16 17 Ds Dp AU 8 a J Ds Dp AUG 1 Ds Dp 409 1 Ds Dp 410 1 Ds Dp 411 1 Ds Dp 412 1 Ds Dp 415 1 Ds Dp A14 1 Ds Dp 4 2 Fig 3 140 The numbers of data qualified by warning conditions are printed in black otherwise in red 71 PRERNA ROGE 4 ml The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A 7A Be A FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 3 4 Customize Interface Section 3 4 presents detailed instructions pertaining to how to modify the Waveform Display Mode how to modify the Ruler Mode how
96. S LAP B 702000 S N 000000 0000 12C als B x X3 Fille Bus Signal Trigger Run Stop Data Tools Window Help 8 x Depala N a IEN b O 256K v oie i 200MHz jos 50 ie Page fi mamla i 6 id BB ft 685276u e R zi 8e Be Te BA BS Height 30 TriggerDe Font Size fi 2 Scale 1 685276us Display Pos 99 62384us A Pos 650 315us v A T 650 315us x A B 150ns 7 Total 1 31072ms Display Range 57 491934u BPos 650 165us v B T 650 165us 7 Compr Rate No Bus Signal Fiter Bj 65318315u74 344697082 771079431 197459u599 62384u5108 0502221116 476603 124 30994 133 329366 141 755 ES ES UE nor Ana i ree m m d sal ilal lla T gt m Setting Export Synch Parameter Packet Name TimeStamp va p PACK Data e Data e Data i H T T coo neau Ce te a p rortadacy sossue UL ge tread ae zs 35 oa 47 oak S9 D ACK Data o Data D ACK D ACK 69 D ack 7A D ACK Fig 4 54 Waveform and Packet Synchronization Interface 4 5 Bus Analysis The setup is correlated to the Bus which needs to be made up for example Bus Protocol Analyzer Open the dialog box BUS STEP 1 Click Tools on Menu Bar and then select Bus Property or select to set up Bus Property rs Customize Color Setting BUS Bus Property a Refresh Protocol Anal
97. Setting The Zeroplus Logic Analyzer User s Manual Ver 3 10 There are Time Sample and Frequency Sample in the part of Range Setting the default is Time Sample The units of Time Sample are second minute hour and day The unit of Frequency Sample is times Users can set the value as their requirements in the editor box 3 Trigger Mark Setting Activate Trigger Mark The number can be set in the range of 0 and 65535 however the function is not activated by default Task 3 Bus Trigger and Trigger Mark Setup Step 1 Click icon or click Bus Trigger Setup on the Trigger menu to open the Bus Trigger dialog box The Trigger menu will appear as shown in Fig 4 15 5 Bus Trigger Setup 7 Channel Trigger Setup 4i Trigger Property Trigger Mark X Dont Care High Low Rising Edge amp Falling Edge X Either Edge Reset Fig 4 15 Trigger Menu Step 2 Bus Trigger Setup 1 Bus Trigger Setup 92 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Bus Trigger i X Bus Mame Operator Bust Data Format Binary Decimal C Decimal Signed Hexadecimal C ASCII Cancel Default Help Fig4 16 Bus Trigger Tip The Bus Name item can be selected for the pull down menu It only displays the Bus name And the ASCII mode also is added 2 Protocol Analy
98. Signal Filter Time Interval 1 Activate the Show Bar function to display the Data Length of the deleted signal which was tested as shown in figure below Display Bar Setup show Bar Bar Style no Bar Width Sns OK Cancel Default Help Fig4 147 Display Bar 2 The bar has two styles which are Original and Bar the default is Original style in which the column Bar Width is disabled when the Bar style is selected the column of Bar Width is enabled 3 Bar Width When the Bar style is selected the Bar Width can be set by users the default is 1 Tip The minimum bar width is 1 and the maximum bar width is 65535 If the value exceeds the range or the font is not according to the requirement a tip window will appear 156 FMO7I4A 7A BETIS he i BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du Signal Filter Time Interval is denoted by Bar Fig4 148 Signal Filter Time Interval Tip The Signal Filter Time Interval function is limited under the following situations A The Signal Filter function is disabled when the Sampling Frequency is more than 200MHz B The final two data are NULL C Logic Analyzer supports the Signal Filter Time Interval function on the condition that the interval between Signal Filter must be more than two clocks 157 FMO7I4A zo EE JN ES The Zeroplus Logic Anal P BB T Hsc Bt f Fa is Deere Went Ver 310 Zeroplus Technology Co Ltd
99. a Find Bus Signal Name Bust Next Previous Close Please key in a chain of data with a comma to compart them For example 0 32 0 45 0 50 0 66 It needs to add the packet name in the Protocol Analyzer For example ADDRESS 0X2A DATA 0X20 0x01 0x02 0x03 Start At End At When Found Statistics Ds Dp A E Statistics Address 974 0 Fig 3 50 Process of Activating the Function of Chain Data Find 43 FMO7I4A The Zeroplus Logic Analyzer User s Manual Ver 3 10 P BE T4133 B 0 ARAE Zeroplus Technology Co Ltd I Find Pulse Width Tip This function is mainly used for finding the pulse width in a single channel and the single channel of a Bus It improves the efficiency of finding the Pulse Width for engineers and strengthens the Find function of the Logic Analyzer Git tales tee Aapo Da je oe Tb s fa amp Ag rH an so Xm jnmus jeep ein Fuga 1 aj G RE 5 HADT TUOS Uu FEL PF nl n B Tones Des herd MH Cimier Fai 414 AF GL 4 toe A Pam LT pol RR EP TT W TaHA i epe Bir Fn Ll Be m i mobi Mam a am amp wiam Wu maa mee E al T t XE Ux 41 I PRES Ia Fig3 51 Function of Chain Data Find Displayed on the Waveform Window x Signal Name 400 v i Previous Close Find Min Pulse Width Max Pulse Width r Statistics fn zie 5i sms 52 428ks Statistics Start At End At When Found Ds m Dp v lati rz
100. a Length in the range from 1 to 56 and the default is 8 Fill 0 at the LSB when the bit count is not enough For example the value of Data is 1001111 there is only 7 Bits When the value of Data is set to 8 Bits the displayed value should be 10011110 SS Pin Assignment SS Channel Select the channel for the SS the default is A1 SS Setting Set the Judgment Level of the SS Channel to Low or High Virtual SS When the SS Channel is not activated the Virtual SS will be activated The Idling Time of the Virtual SS should be set as an auxiliary condition to decode Type the idling time of the SCLK signal on the tested SPI circuit The idling time is defined as the idling time as shown in Fig 4 85 123 FMO7I4A BE t S BS 98 E 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du begin aides ECK CPOL 1 UN UUU UUA UNT a MUUUUUL JUUUUULL be 4 idling fime SCK CPOL D THE i Idling time Fig 4 85 Idling Time Protocol Analyzer Color Users can vary the colors of the decoded packet Step 5 Click OK to exit the dialog box of Protocol Analyzer SPI Step 6 Click Run to acquire the SPI signal from the tested SPI circuit Refer to the Fig 4 86 Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms gt ZEROPLUS LAP B 702000 S N 000000 0000 SPI als Lus T DS Rune Data Tools Window Help
101. age and Trigger Position as described in Section 4 1 Step 2 Set up the trigger edge on the signal or the bus to be triggered Step 3 Click icon or click the Signal Filter Setup button on the Sampling Setup dialog box or select the item form the pull down menu of the Bus Signal and then the Signal Filter Setup dialog box will appear PLUS LAP B 702000 5 N 000000 0000 LaDoc1 Trigger Run Stop Data Tools Window Help EIE pb zx vlon i lfi25MHz l x He Channels Sampling Setup AY Signal Filte Clock Source gp falda oe Group inte Unaraup f Expand i ae Synchronous Clock Colapse C External Clock Format Re Rename Single Clock Bus Signal Trigger Run Stop Data ii Sampling Setup en I 3z chanm e iy Channels Setup n Mix Glock F z O Ghann E Signal Filter Setup ed Frequency 100KHz2 Min 0 001Hz Max 150MHz Group into Bus Chrl G Ungroup Fran Bus orl Sampling RAM Size Compression Mode Signal Filter Expand p Size ok v Data Compression Signal Filter Setup callapse Format Row Apply ll Cancel Default Help Rename Signal Filter Setup x Filter Condition Trigger Condition Filter Condition Trigger Condition Filter Condition Port C Port D Filter Delay Setup v Activate Filter Delay Select Filter Delay Mode Select Delay Start Point e Time l
102. al Ver 3 10 Fig 3 87 Display Signals in Listing Mode IP eskHz Hot News Window Turn On iw News Activity Iw Production News Window Help in Waveform Display Listing Display Navigator Memory Analyzer Bus Packet List Statistics Window 200s re I l l Cascade Horizontal Vertical Screen Display FRG 8 w 1 LaDocl 1 2 LaDocl 2 Fig3 88 Running Text Ads Function Cea 4 xs cL ea Pc T Aa T honl N Frm ps Pie bb Ma H De Ta Font fare Bime Tibi ae a Tot E 8 Lapi Flange Ti dina lr Pus Br B T dna Camps Fisi Na ekai AS CT j m Fig3 89 Display Hot News Window in the window interface Fig 3 90 Image Interface Fig 3 91 Navigator Window PE ruens ur d APR oh fs AP of PUL EE os TERED Lt LLLI Batya Tope Gano ee sch Ske Heb alit xj teh d x5 gs Ex sj emu je fee e ree g mBHl3 u 5mga pmne jr Teka be aie 4 Haig m thy Fou Soe fi wa Mie Esnpige Frey Grin AP ong Toit A Baflm foot Bel RT Draptis kangh PE aed li Pas tien g Talma Carmina Fo Fig 3 92 Navigator Window under the waveform display area 56 FMO7I4A BE t S BS 948 E 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du EFT Lal s Fuer s tuin bbbiv 1 alan L il 1 A Dm Sater i unigo pis eon es eb n m jm he raars e crx BEES Page channel ET Ix Og amp
103. ala 2u amp Display F os ns AF amp 3UuE Totala Orns Display Rarige 5i us 52u5 B Pos 36us m ar AG all ATI Fig 4 23 Trigger Count Screen Shot 2 Step 3 External Trigger Glitch Select the External Trigger Glitch on the Trigger Setup dialog box The External Trigger Glitch dialog box will appear as shown in Fig4 24 95 FMO7I4A Task 5 ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Channel Trigger Setup E xq Trigger GroupO Trigger Group External Trigger Glitch m External Trigger Glitch v Enable External Trigger Glitch EXT Trigger LVTTL 3 3 OR M v Enable Two Trigger In ExT Triggerl LVTTL 3 3 v Trigger Qut Enable when Trigger Condition iod Cancel Default Help Fig4 24 External Trigger Glitch Enable External Trigger Glitch Activate the first group external trigger It includes four selections which are EXT TriggerO EXT Trigger 1 EXT Trigger 2 and EXT TriggerO Enable Two Trigger In Activate the second group external trigger It includes four selections which are EXT TriggerO EXT Trigger 1 EXT Trigger 2 and EXT Trigger1 When you start it you can start the logic operation with the first one group Trigger Out Enable Set the output trigger condition There is an output point for the hardware and it can be selected by the softwar
104. alent Orders Statement Ctrl A Go to A Bar Center A bar Ctrl B Go to B Bar Center B bar Ctrl C File gt Graph Open Capture Graph dialog box Ctrl E Data gt Enclose Change Mouse mode to Enclose mode Ctrl F Data gt Find Data Value Search specific data with predetermined conditions Ctrl G BUS gt Group selected signals into a Bus Group into Bus Ctrl N File gt New Create a new file Ctrl O File gt Open Open a saved file Ctrl P File gt Print Print an active file Ctrl S File gt Save Save an active file with its current name location and file format Bus Signal gt Ctrl U Ungroup from Bus Ungroup signals Pins from a Bus Ctrl Z Data gt Undo Last Zoom Reverse the last zoom Ctrl Shift E File gt Export Open the Export dialog box 182 FMO7I4A Hot Key Equivalent Orders Page Down Operate the position shown Page Up Operate the position shown Home Operate the position shown End Operate the position shown Up Operate the position shown Down Operate the position shown Left Operate the position shown Right Operate the position shown ESC Operate the position shown Space Change the trigger conditions Hot Key Equivalent Orders F1 Help gt Logic Analyzer Help F2 Decrease the sampling rate F3 Increase the sampling rate ZP BE Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Table 7 3 Hot Keys 3 Statement Go to next page of th
105. allow engineers observe timing sequence information directly from the screens of oscilloscopes this Logic Analyzer was created to help engineers resolve timing sequence issues during their circuit development I2C has a multi control Bus as its physical and firmware interfaces This Protocol Analyzer is basically a signal network that may connect to one or several control units The intention of inventing this protocol was in the application of designing television sets which allowed the central processing unit to quicken data communications with peripheral chips and devices The 12C interface is initiated with a SDA triggered High and SCL triggered Falling Edge Following the initiation there will be a set of 7 bits or 10 bits address space Beyond this point there will be Read Write ACK Acknowledgement and STOP or HALT HLT The signal information packet is transmitted in bytes If there are two or more devices trying to access the Protocol Analyzer I2C whichever device has SCL at logic high will gain access priority Furthermore since I2C is a synchronous communication protocol and data transmission must be in bytes a complete I2C signal packet must consist of Start Address Read Write Data ACK NACK and Stop segments They are as following Start This is the initiation of SCL and SDA 1 bit only Address This identifies the device address 7 bits Read Write This is a data direction bit O Write 1 Read ACK NACK This is a
106. alyzer easily Note The prompting information of the shortcut keys has been added in the tooltips of the Tool Bar that is to say when users place the cursor on the icons the corresponding shortcut key information will appear For example the prompting information of the New button is New Ctrl N CtrI N is the Shortcut Key of the function of New Information Bar The Information Bar displays information about the grids in the waveform For example Address Time Frequency T Trigger Bar A Bar B Bar and other Bars Details of the labels are below Scale Define the acquisition clock that controls the data sampling Total The period of time when Logic Analyzer captures data Display Pos The middle tip means the middle position of the waveform Display Range Display the waveform time range of the current waveform display A Pos The main function is setting A Bar or the other Bar B Pos The main function is setting B Bar or the other Bar A B Press the under arrow to exchange and become the other Bar Moreover you also can execute this function from the other Bar Ruler Waveform Display Listing Display Ruler shows the time position of the waveform shown in the waveform display area or the listing display area Bus Signal Waveform Display Listing Display 24 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Edit names of the measured channel
107. and made it available to the public Conclusion This chapter is full of hard facts for engineers The contents of this version of the User Manual may look more different than the one on the web Every engineer finds new problems new solutions or other issues during real life applications Though there are dozens of questions here we look forward to your feedback which is important for future versions It may help us produce more efficient and accurate devices so that we will offer you much better service 180 FMO7I4A P BE T1332 B 02 ARAE Zeroplus Technology Co Ltd 7 Appendix 7 1 Hot Keys 7 2 Contract Us 181 The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A Pe THSLR 2 ARA 8 Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 Objective In this chapter users will learn the functions of all defined Hot Keys in the software interface of the Logic Analyzer 7 1 Hot Keys Table 7 1 Hot Keys 1 Hot Key Equivalent Orders Statement A Go to ABar MONS the A bar to the center of the waveform area select A bar by the cursor Move the B bar to the center of the waveform B Go to B Bar area select B bar by the cursor Move the T bar to the center of the waveform T Go to T Bar l area select T bar by the cursor E Change to Enclose mode Change the mouse mode to Enclose H Change to Hand mode Change the mouse mode to Hand Table 7 2 Hot Keys 2 Hot Key Equiv
108. as a result of the customized idle time Add a customized packet idle time to the Bus Packet List Setting dialog box see Fig4 42 BUS Packet List Refresh Export Synch Parameter Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data o Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data eS ee qw ee es 19 Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data o Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Busl Bus oe Packet Name TimeStamp Data Data Data Data Data LO Packet Name TimeStamp Data Data Data Data Data Data Data Data Data 6 Busi Bu 973 o Packet Name TimeStamp Data Data Data Data Data 7 Busi usy 963 o Fig 4 42 Bus Packet List 1 View Specifications Packet Name and TimeStamp can be selected to display from the Packet List Setting dialog box Packet List the order of Packet Name Display the name of Packet or the Filter Display Bar TimeStamp It is the starting point of the Packet Tip The rest name and content are supplied by Plug ES Setting Refresh Export Synch Parameter Packet Name TimeStamp Address Read A NACK DESCRIBE Packet Name TimeStamp Address Read AMACK DESCRIBE Packet Name TimeStamp Address Read A NACK DESCRIBE Packet Name TimeStamp Address Read A NACK DESCRIBE
109. ayed in the center of the waveform area See the below image ZEROPLUS LAP B 702000 S N 000000 0000 HDQ1m 200Mhz als File Bus Signal Trigger Run Stop Data Tools Window Help su fiw Be Te te s Bar Bar Bar Bar P waite 184022 337 170804 244 177586151 184368 058 191149965 197931 873 20471378 211495 687 218277594 225059501 ee 0xoo001 OxOtt 90001 0x0000 vu v v VABB 5510 1048574 1048574 164021 372 170803 279 177585 186 184367 093 191149 197930 907 204712814 211494 721 218276 628 225058 535 UE UUT UU UUs 206924148 206924148 206924148 Ready End DEM 2 Click the next data contrast button 28 The second difference will be displayed in the center of the waveform area as the image below 160 FMO7I4A 7A Be A FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 ZEROPLUS LAP B 702000 S N 000000 0000 HDQim 200Mhz als File Bus Signal Trigger Run Stop Data Tools Window Help Scale 1356 3814108 Total 1048576 Scale 1356 3814108 Total 207862161 z Bx Be Te te B le 21 RS oo Height Display Pos 191150 A Pos 523281 7 A T 523281 v A B 730603 v Display Range 157240 225063 B Pos 207322 7 B T2207322 v Compr Rate No 164022 337 170804 244 177586151 184368 058 191149 965 19793 873 20471378 211495687 218277594 225059501 0x 0001 0x 0000 eased 1048574 1048574
110. box and the width between bars can be set as users requirements After finishing those operations many bars can be moved at the same time ZP BE Fs Fh Aa BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Lori d Due jek ten Dad a RAR vara F zj sae a l E Fig3 117 Display the Bar State window Bar Width and Connection Settings x v Activate Connection M Activate Width is m The min value of the width is limited by the sampling frequency the min value is 10000ns Cancel Fig 118 Bar Width and Connection Settings Dialog Box Activate Connection Select whether activate the function of the Bar connection Activate Width Set the width between the connected bars and the unit is set as ns Ma Maud fue Vere Des De Bre e Dg d xuhanrsmMM AA xem en sj tom ae T E himnai CE H eemeeTz x ee ee oe ee ee ore Taw L Exam DD DR Tapii aus eme s lu j z Fs Fig 3 119 Drag more than Two Bars The widths between A Bar and B Bar A Bar and C Bar are set as 15ns Note When any of the three bars is dragged the A Bar B Bar and C Bar will move synchronously 64 FMO7I4A BERE SE AS 4 GRAS The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 3 2 Find Data Value Find Data Value is a very useful tool to help the users to find data on the received signals Step 1 Click the Find Data Value pi i
111. ch needs many voltage ranks Moreover the Logic Analyzer can receive many signals during a test How does the Logic Analyzer operate The Logic Analyzer reserves trigger requirement setting for users and uses them on the test equipment for the value of the sampling signals and puts them into the internal memory The software of the Logic Analyzer will read out the value from the memory and switch it to the waveform or status shown for users analysis What is the asynchronous Timing Mode Since the sampling clock and tested objects are not directly related to each other and the former won t be controlled by the latter the sampling clock and the tested signals will not be done at the same time We call this Timing Mode which means that in the same time interval you can get sampling data from the test equipment at one time such as every 10 seconds The internal clock the Logic Analyzer s inner confirmed one is often for sampling in Timing Mode as is the logic waveform What is the synchronous State Mode Because the sampling clock and measured object can be directly related and are controlled by the latter signals of the former and the latter can proceed simultaneously We call this State Mode In this mode the measured object provides the sampling clock State Mode is that the Logic Analyzer can obtain sampling data from the test equipment synchronously In other words when the test equipment has a signal or signal group it is the ti
112. click Move Left Up to move the signal or Bus up left through the list of the Bus Signal Highlight a signal or Bus and click Move Right Down to move the signal or Bus down right through the list of the Bus Signal Highlight a signal or Bus and click Hide to hide it Click Show All to show all signals and Buses that have been hidden Highlight a signal or Bus and click Color to change the color Highlight a signal or Bus and click Rename to rename the Bus or signal Channel Mode for LAP B 702000 LAP B 702000X LAP B 702000Z and Take the LAP B 702000 for an example There are three modes for LAP B 702000 which are 16 Channel Mode 32 Channel Mode and 70 Channel Mode the default is 70 Channel Mode 16 Channel Mode There are only 16 channels available the max RAM Size is 8M and the max Sampling Frequency is 1000MHz 32 Channel Mode There are only 32 channels available the max RAM Size is 4M and the max Sampling Frequency is 500MHz 70 Channel Mode Keep the parameter of the LAP B 702000 There are 70 channels available the max RAM Size is 2M and the max Sampling Frequency is 333MHz 36 FMO7I4A 7A Be A FS BS 5 17 BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Petes LE ii ess ee ee Fig 3 29 Trigger Menu a Fig 3 30 Trigger Tool Box 37 FMO7I4A Menu Item gi B
113. con the dialog box of Waveform find will appear Step 2 Use the pull down menu to select the Bus Signal Name The Bus Signal listed on the pull down menu represent the status of the Bus Signal column as shown in Fig 3 120 Bus Signal Bus Signal Name E Port Bus Signal Mame Port A a Port 4 Bus 5ignal ele Port H Fort B RR E ADE S06 9C Fig 3 120 Step 3 Choose the character for Find The list of characters depends on whether it is a Bus Signal or the protocol analyzer such as I2C UART SPI etc which is being searched See Figs 3 121 3 122 3 123 3 124 3 125 3 126 3 127 3 128 and 3 129 Bus Choose among In Range and Not In Range Enter the Min Value or Max Value Protocol Analyzer Choose the segments bits of the protocol analyzer Select the protocol analyzer item and enter the value for Min Value or Max Value Signal Choose among Rising Edge Falling Edge Either Edge High or Low x x Activate the function of Chain Data Find Activate the function of Chain Data Find Bus Signal Name Next Previous Close Next Previous Close Min Value Max Value ind Min Value Max Value When Found Fig 3 121 Waveform find Dialog Box of the Logic Signal Waveform find Waveform find x Activate the function of Chain Data Find amm E Next Previous Close ic irralue Bus Item Max Value E
114. confirmation bit following every data transmission segment Data The actual signal data transmitted by byte Stop This appears when SCL High and SDA Low bit only 113 FMO7I4A 77 Be Fs FH Aa a BB 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Software Basic Setup of Protocol Analyzer I2C Step 1 Set up RAM Size Frequency Trigger Voltage and Trigger Position as described in Section 4 1 Step 2 Set up the Falling Edge as the trigger condition on the signal which connects to the tested I2C data pin SDA Step 3 Group the unanalyzed channels into Bus1 laroup U E E Less Filter e Y ums E a A Sampling Setup a i Channels Setup BUS Bus Property i AD Analog Waveform Reverse Bus Signal Group into Bus Ctrl G Er Ungroup From Bus nu 4 AD dd Channel y D Copy Channel Delete Channel d AD Delete AIL Channels Restore Default Ghannels A03 A03 Formak Fo Ld oom ADA ADA Rename nee ff ADS ADS Fig4 66 Group into Bus Step 4 Select Busi then press the Right Key on the mouse to list the menu Next click Bus Property or click Tools to select Bus Bus Property or click to open Bus Pi rty dialog box Filter 2 ia Sampling Setup y Channels Setup HESS Analog Waveform Bus Property E on CA Reverse Bus Setting
115. d User s Manual Ver 3 10 Window Waveform Display Listing Display Hok Hews Window F Navigator gm Memory Analyzer ES Bus Packet List Statistics Window Cascade Horizontal vertical Screen Display w 1 LaDoci Fig 3 84 Window Menu Windows 8 m B Fig 3 85 Window Tool Box Menu Bar Window Menu Item Detail Menu amp Dialog Box X File Bus Signal Trigger Run Stop Data Tools window Help Dg amp Mm i gt gt H Waveform Display i a pm Listing Displa m amel i ev ay Brey zwi 7 Hot News Window gt i2 E EO IS EX Navigator Scale 2 816ns Display Pos ns CE EDI UNE Total 8 192us Display Range 70 4 oe Bus Packet List Filter Statistics Window 14 08ns 3 E51 i I i Group 0 Level 0 Bus Signal Cascade Horizontal m Vertical ia Waveform Display Screen Display v llaDoci O File Bus Signal Trigger Run Stop Data Tools window Help Dg amp i c OP JE my Waveform Display m Seo of Fiete he Hot News Window ZZ Navigator Beas Biber as dns Memory Analyzer Total 8 192us um yzer OF Bus Packet List ADO A01 A02 iP istics Wi T UN j Statistics Window Cascade Listing Display 60 OOo g Horizontal E eons 1 D 1 Vertical 48ns D 1 1 Screen Display 44ns 1
116. e three selections are When Trigger Condition START and STOP From LAP B Trigger Out Sync It can accept the trigger signal from another Logic Analyzer Bus Signal Trigger Condition Setup Highlight a designated signal and then set its required trigger edge 1 Left Click gt to set the signal trigger edge as shown in Fig 4 25 2 Right Click to set the signal trigger edge as shown in Fig 4 26 3 Click Trigger on the menu bar and choose a trigger edge from the list of triggers as shown in Fig 4 27 EOM E ESTE NEST Bus Signal Lari Ads Vj N N P P n n Right Click Bus Trigger Setup D0 Laroup U Level 0 Bus Signal Lett Click K ADD AN Channel Trigger Setup si Trigger Property m s A2 AU2 Trigger Groupo Li Trigger Groupi M A3 Ang a NS CE RS o6 Don t Care Re ADA ADA BE High La ADB ADS eet l 4 Rising Edge Suns 13 JE roo am df ADE ADE Falling Edge SC Either Ed be aD An BE EL y AD AU Either Edge Color M ADR Ans mE Re f ADB ADS x TU Fig 4 25 Left Click Fig 4 26 Right Click 96 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PREES ANUA VOT ste Trigger Runfstop Data Tools y Bus Trigger Setup 7 Channel Trigger Setup 4 Trigger Property Trigger Mark x Don t Care High e Low f Rising Edge Falling Edge X Ei
117. e LAP operation interface ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc1 X2 Fie Bus Signal Trigger Run Stop Data Tools Window Help e x Denan at aopo b gt jek amp 100MHz v a m 50 Page fi jm E mm er c au fons OF B qe Pb le orjia eo Height 50 z Tri Font Size fiz Scale 10ns Display Pos ns APos 150ns A T 150ns 7 A B 300ns Total 20 48us Display Range 250ns BPos 150ns v B T 150ns v Compr Rate No a G 0 sla Level 0 FE EM g Eu 00 4 A01 01 g A04 04 g A05 A05 g 06 405 g A07 07 4 A09 05 s A10 A10 ATI A11 4 A12 412 Fig4 114 Operation Interface FMO7I4A 7A BETIS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Sample the HDQ waveform or open the sampled waveform Fig4 115 HDQ Waveform Group the channel into Bus pas Bus Property Group into Bus Ungroup from Bus Fig4 116 Group into Bus Select Bus Property 139 FMO7I4A 7A Be tt FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 ZEROPLUS LAP B 702000 S N 000000 0000 HDQ1m 10Mhz als Ihe W oxa Kon Ko NE oo Kor Kor Ko NEC ES Bus Property Graup inte Bus Copy hanne Delete Ghannel nn NEN EMEN ww pMMA 11
118. e actual installation Step 9 Click Finish to complete the installation 18 FMO7I4A O zeropius LOGIC ANALYZER SET LAP B MODULE LAP H Standard Tos adihiekl W rard Welcome bo thes natall shsekd Wizad for LAP B Stamdasd Ties Hrs adf Fed rd dl ril LASER reed or your computer To continue cick Hart LICENSE AGREEMENT IMPORTANT READ CAREFULLY Tht LICENSE AGREEMENT ps entered indo effect between ZEROPLUS Technology Co Ltd Kherematfter ton ner n Whereas ZEROPLUS came software wsthucing computer ee ss agn LAPA Skonudard nataigh Wizard PRE TA BBR S Zeroplus Technology Co Ltd L AP UNT andi per mm Wis InstaliSihiekd Wizard Complete Soup Fuse Faces arido LAP Sharlar on car Gonhphabis c Tes vaara fo peel rry Cormputee ris Ma 1 well neato i corpus later Piemenve anp daks hom heir divea and fen click Firth in ood Lap Ho Sh anelare al allShield Wierd Healy to recall the Pucsgram The vazad ri psusdie lo beg ribasso 19 The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A The Zeroplus Logic Analyzer P BE t FER ARRA S User s Manual Ver 3 10 Zeroplus Technology Co Ltd 2 2 Hardware Installation Hardware Installation simply involves in connecting the Logic Analyzer to your computer with the included USB Cable as shown in Figures 2 4 and 2 5 1 Plug the fixed end of the cables into the LA Fig 2
119. e center of the waveform area H Bar Mame rc Cancel Bar Pos 15 Bar Kev 3 Fig3 56 Add Bar 45 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 faster the default number of the new bar is O It is noticed that once the number key is set it can t be modified and each new bar can be named with the same number that is to say one number can name many bars For example users can set the number 3 as p the shortcut key When users press the number om 3 key the C Bar will be displayed in the centre pin position of the screen ib Fig3 57 Add Bar with the number between 0 and 9 Delete a defined bar by users Close 1 Click the above menu item from Data menu or click Delete Bar icon from the tool box 2 Select a defined bar by users and click Delete 3 Delete the selected bar with the Delete Key on the Keyboard Use the mouse to select the added bar and press the Delete key on the keyboard to delete the bar Fig3 58 Delete Bar Dialog Box 343 098 Ta Fig 3 59 Delete a selected Bar 46 FMO7I4A ZP Be Fs Fh AE eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Tip A Zoom In or a Zoom Out view will be v I m pum centered in the Waveform Display Area and fo a Pe MEME the new zoomed view will be sized according to the available space on the
120. e data or the waveform Go to prior page of the data or the waveform Go to the beginning of the data or the waveform Go to the end of the data or the waveform Move the cursor up a grid Move the cursor down a grid Move the selected Bar or display left to the prior waveform or data Move the selected Bar or display right to the posterior waveform or data Release all selected bars and changes Mouse mode to Normal Change trigger conditions Table 7 4 Hot Keys 4 F5 Run Stop gt Single Run F6 Run Stop gt Repetitive Run F7 Run Stop gt Stop F8 Data gt Zoom Out F9 Data gt Zoom In F11 Data Before F12 Data gt After Statement Logic Analyzer Help Decrease the sampling rate Increase the sampling rate Execute the acquirement once Execute the acquirement continuously Stop acquiring data Zoom out the waveform Zoom in the waveform Move forward to the prior variation waveform and center that location Move forward to the next variation waveform and center that location 183 FMO7I4A ZP BE Fs Fh ha BBR Ws ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 7 2 Contact Us Table 7 5 Contact Us Contact Us Copyright 1997 2011 ZEROPLUS TECHNOLOGY CO LTD Headquarter ZEROPLUS TECHNOLOGY CO LTD 3F No 121 Jian Ba Rd Chung Ho City Taipei County R O C Tel 886 2 6620 2225 Fax 886 2 6620 2226 ZIP Code 235
121. e function of Chain Data Find Bus Signal Name Next Previous Close Min Value Waveform find x Activate the function of Chain Data Find Bus Signal Name q 5 xH Next Previous Close Bus Item Find Min Value Max Value F Statistics Statistics 0 Max Value Fig 3 126 Waveform find Dialog Box of the UART Signal Activate the function of Chain Data Find Activate the function of Chain Data Find Bus Signal Name z gnal Name EI 1 Next Previous Close spr Next Previous Close ry ey SPI SPI Min Value Max Value Min Value Max Value SCLK SCLK SS m Da FFFF SS m 00 FERE DATA DATA A03 When Found statistics When Found Statistics A04 en AOS A x statistics A e Statistics 406 0 A07 0 Fig 3 127 Waveform find Dialog Box of the Protocol Analyzer SPI x xi Activate the Function of Chain Data Find Activate the Function of Chain Data Find Bus Signal Name Bus Signal Name Min Value Max Value Bus Item Find Min Value Max Value SCLK p Y oo F Data DATA A03 When Found Statistics Start At pe a Berra Ds Statistics A06 p A07 Fig 3 128 Waveform find Dialog Box of the SPI Signal x xi Activate the Function of Chain Data Find Activate the Function of Chain Data Find Bus Signal Name Bus Signal Name SS SSS p Next Previous Close SPI jJ Next Previo
122. e of the ports can expand the memory size A The Logic Analyzer s memory is fixed at 4 megabits Due to current hardware limitations the memory size cannot be modified even as the number of ports used change H04 Are different external sampling frequencies for different channels possible A No there is only one external sampling frequency available H05 Canldisable or set a certain port to don t care while during compression A No during compression H06 Why does the Logic Analyzer feature negative voltage calibration A This allows users to analyze any given signal H07 How dol adjust the Trigger Level A The adjustment of the trigger level is done with a port which consists of 18 channels The trigger level can only be adjusted for an entire port H08 Does the Logic Analyzer use hardware or software compression technology A For time efficiency the Logic Analyzer uses hardware compression H09 Is planning an Analyzer that can handle more channels A Yes we are working in this direction H10 Does the memory page vary when the depth of the memory changes A Yes the depth of memory changes the memory page H11 Is the Logic Analyzer expandable How may l expand it A Yes the Logic Analyzer is expandable At this stage you can expand it with external module devices H12 Why must reinstall the driver every time I use a different the Logic Analyzer A Since each Logic Analyzer has unique serial numbers you
123. e trigger pages are selected the trigger bar disappears from the view Cancel Default Help Fig 3 36 Set Trigger Delay Tips x The voltage level that a trigger source Trigger Delay Trigger Content Trigger Range signal must be reached before the Trigger Level trigger circuit initiates a sweep PotA 00 07 TTL vy fis wv There are 4 ports available Each port has xi ME z fs m the ability to assign different PotB 00 07 TTL fs m voltages to meet the users requirements moss ME zi et Use the pull down menu to choose pets E lt M among TTL default TTL CMOS 5V PotCog15 TTL v CMOS 3 3V ECL and User Defined in f choose the value of the Trigger Voltage ince z i between 6 0V and 6 0V OK Cancel i Fig 3 37 Set Trigger Content x Trigger Delay Trigger Content Trigger Range v Activate Trigger Range Ti ps Range Setting When the Bus data is too long the Inm ENS Mes i default trigger mark bar can t meet the need of the mark of the current Bus Tigges Mark Sng single function so we add the function v Activate Trigger Mark of Trigger Mark Setting Users can set ieee eae eee the number of the trigger mark bar as st their requirements and then more bars which conform to the current trigger data to be marked Cancel Default Help Fig 3 38 Set Trigger Range See Section 4 1 for detailed instructions
124. echnology Co Ltd User s Manual Ver 3 10 Window of the Memory Analyzer the Import function also can select the TXT or EXCEL formats to analyze the former export data Merge It can merge with the different export files See the Merge dialog box below Merge MEN X Object File File to merge Open OK Cancel Fig4 168 Merge Dialog Box Object File 1 It is the covered file that is to say it is a new file 2 It can display the path of the Object File and the file name 3 It can open the Object File by clicking the Open option File to merge 1 It can create the new file with the object file 2 It can display the path of the File to merge and the file name 3 It can open the File to merge by clicking the Open option Refresh _Refresh_ Pressing this button can refresh the data status of each Address data when there are some alterations in the Bus Data Reset The data status of each Address will be cleaned out and returned to the original status by pressing the button Display Alberation l l l l l l l The Data in the List Window of the Memory Analyzer will be cleared by pressing this button and the List Window will display the alteration status of each cell If the same Address has been written or read repetitively the background of the cell will be gray and the list window will display the Data of the last packet If the Address doesn t have any alteration it will display the da
125. ed in increments of 50us 74 FMO7I4A 77 Be Fs FH Aa a BB 47x ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 3 4 3 Modify Waveform Height amp Correlated Setting To modify Waveform Height click Tools gt Customize Waveform Height sets the height of the waveform 18 100 in chosen items at toolbar that will show the amplitude of the waveform x Common Setup Toolbars Shortcut Key Auto Save Weayvetorm Display Mode Sampling Site Display Frequency Display C Time Display Huler Made Waveform Setting C Regular Ruler Waveform Height 30 Time Sampling Site Ruler Font Size 12 Fig 3 147 Waveform Setting Waveform Height 18 Waveform Height 40 p uroup U Bus Signal L ev el 0 j S g amp 05 405 i 0 g A10 A10 pee AMAT Fig 3 148 1 Fig 3 148 2 Fig 3 148 Examples of Waveform Height 75 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PREES ANUA VOT ste Correlated Setting Check the boxes to activate the following settings Correlated Setting M Auto Close Iw Show the T Bar in the middle area Show Gridline Show Tooltip Data Process What do you want to show when you press the Stop during the running Keep your data Continue reading data Check for Upda
126. en packet data and waveform data what is more in order to make it easier for users to observe the data we add the packet and waveform synchronization function In order to operate conveniently we add a Synch Parameter button on the BUS Packet List as the image below 107 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd eek ANUA vel ste BUS Packet List x Refresh Export Synch Parameter Packet Name imeStamn Nata ata Data Data Data Data Data Data Data Data Length o 1 joj j o P 1 F O P 1 p O 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data 10 10 10 10 10 10 10 Length 10 10 10 o o 1 o 1 F O P 1 o 1 j Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Busi us 1003 o 1 1 1 o i ofi_ Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Of 1 of 1 F O P 1 F O P 1 p O f 1 j Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Of 1 of 1 O P 1 F O P 1 p O PF 1 j Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data 6 Busi us 973 0 o 1 o 1 Oo 1 j O 1 O j 1 j Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data 0 1 O0 1 O 1 O 1 O ta 10 10 Length
127. enu For the dialog box go to File menu to click Auto Save or go to Tools bar to select Customize and select Auto Save See Fig 3 153 x Common Setup Toolbars Shortcut Key Auto Save W Activate 3 Mew Ctrl M File Name E z Open Ctrl o Close Ctrl F4 Save Path Mame Save Ctrl 5 D ackuphLa Data Save S Auto Sawe Repetitive Aun Data Display Menu Renewal Mode Export Waveform Ctrl Shift E Time Interval Every Renewal 73 Export Packet List D i fry Capture Window icErl C a Spee the first file after stopping the LFI Language id Print Ctrl F Print Preview Recent File Exit Fig3 153 1 Auto Save on File Menu Fig3 153 2 Auto Save of Customize Auto Save The default is not activated after activating it keeps working and users also can choose Cancel to close it Activate The default is not activated after activating it keeps working and users also can choose Cancel to close it File Name Before users name the file the file name is defaulted as LA In fact the saved file name can add a serial number for the file automatically Save Path Name Users can enter the path directly or choose the path from the selectable path button Uil Time Interval When the Auto Save function is activated the time interval from one finished sampling to the next activated sampling can be set according to users requirements the default is 1s and the unit can be selected from s second m
128. er Zeroplus Technology Co Ltd User s Manual Ver 3 10 6 2 Software SW01 Why is the compression function not activated by default A Mostly to avoid significant errors when testing signals with high variability or measuring a certain channel for a long time period SWO02 What is the purpose of the Compression Function A The Compression Function measures signals that vary slightly over a long period SWO3 Can I activate the Trigger Page and Compression Function simultaneously A Yes you can SW04 When should I use the Bar function A This function allows you to highlight a segment of a waveform so that you can have a closer view Depend on the configuration of Waveform Display Mode under Tools Customize a more accurate numeric value of address time or frequency difference will be calculated and displayed as shown in Fig 6 1 A Po2 30 333333ns A T 30 333333ns A B h8 333333ns B Pas 38ns B T 38ns Compr Rate Mo Fons 2ang lasne P r 12ans amp on amp T aT ths JUns Fig 6 1 Bar Function SWO5 Can triggers be differentiated in Pre Trigger and Post Trigger A Yes they can SWO6 Are all setup parameters and configurations saved as save my work A Yes everything in your work space except signal graph will be saved SWO7 If have the wheel feature with my mouse or other pointing devices may adjust the waveform display zoom in the Position Display Area by scrol
129. er is often used for triggering an oscilloscope How do update my software The software will automatically check for and download updates This function deletes old software first and then downloads and installs the latest version 179 FMO7I4A 77 Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd LEETS Mantel eros 6 5 Others OT01 How was the Logic Analyzer developed A It took us more than two years to develop this product We envision Everyone carrying the Logic Analyzer and we would like to make some contributions to the electronics industry in return We also wished to transform the stereotypical OEM factory into a world class R amp D center OT02 Why is there a rich information database for game chips rather than the Logic Analyzer A First of all we apologize for any inconvenience caused by the lack of information pertaining to Logic Analyzers We are currently working very hard on multilingual information and documentations pertaining to the Logic Analyzer Visit our website for the latest drivers software and manuals http www zeroplus com tw logic analyzer en technical support php In the meantime we will have updates ready when verified error free OT03 What was the original intention of developing this item A Originally the Logic Analyzer was just for use by our engineering department Later on we saw the greater need for this kind of devices We made numerous enhancements
130. er pagen Signa al Filter getup Filter litt an lengthens or shartenks r if el ay tine nis sab sign lrilter Bar Disab The display nf message Toral 2043 Ah stants for the signal nf high parrern LX presenrs the sienal of low Gatte and x means din t care Vu igna Trigger Z tup X DXU o amp atnds fer dan care HW pr sente high pattern and LM mea low patter n wf WET means Rising Edge X EX presents Falling Edge X EX pta nda for git yThe display ant trigger getup of Bus According the character of the original file T present The 5 serving condit ton 15 BS semiai To pag ch channel and Eus Fig3 8 Export File 28 FMO7I4A BER Na The Zeroplus Logic Anal Bet isch OH PR T e Deere Mel Ver 3 10 ad Zeroplus Technology Co Ltd 21xl SS ve gn E Om Sun i Bee E LEE Wan 383 Ex Dane aa lupe Ten Fies ts Cire Bus Outpt Parameter Dra Formar Exp rt Pieria Vins Na vexadecmal pure Data Form gt Cuput Ranga From irit Packet Ta inl Packet fi V Pop up an export file automatically Fig 3 9 Export Packet List Window Users can use paperwork register and analyze packet list data Pop up an export file automatically The function of popping up an export file automatically in the Export Packet List dialog box is the same with that of the Export Waveform dialog box Export Format The Export Format is convenient for user
131. ercentage from the options 5096 60 7096 80 and 90 on the dropdown menu and the default is 7096 Transmission Direction Set the Transmission Direction to MSB gt LSB or LSB gt MSB T Busi VART 9X0 40i X IF al IF ost C OxXO y 704 X Fig 4 76 Data Waveforms MSB gt LSB and LSB gt MSB Baud Rate The dropdown menu has options as below 110 300 600 1200 2400 4800 9600 19200 38400 57600 115200 230400 460800 and 921600 Users can select the desired value from the menu At the same time The Auto can be selected to calculate the Baud Rate automatically If the Auto is selected the Baud Rate will be calculated and displayed on the Configuration dialog box automatically Data Reverse Decoding When the aay is selected the data will be decoded in reverse HTT T Without using the reverse data level to decode 119 FMO7I4A Busi UART oxo 4 D 32 X ZP Be Fs Fh AE eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd eek ANUA vel ste 0X0 UNKNOW START E DATA 10000000 BE unn TRUCO URL TT T Using the reverse data level to decode ELM Fig 4 77 Without With the Reverse Data Level for Decoding Protocol Analyzer Color Users can vary the colors of the decoded packet Step 5 Press OK to exit the dialog box of Protocol Analyzer UART Step 6 Click Run to acquire t
132. erface N Sena iw DOT ep epr P CU say Ta Eo Ww 4 3 5 o E s Paf 4 UP PESE hak Fi I se TS Es i NL lU COEUNT POWER r a MEM NEME NEN DLL EI M ek SEE REM IM ee I e CUR UE WOW ew Om mm e xc with oan RR inci n Qmm rn E STATUS T do Preeriis GE e C PORT Right Side View of the Zeroplus Logic Analyzer LAP B Series 8 FMO7I4A ZP BE TIBB4 2 BR VN ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Beers Mantel E Table 1 2 List of Functional Pins in Each Model LAP B LAP B LAP B LAP B LAP B LAP B LAP B 70256 702000 70256L 702000L 7020004 7020002 702000X 5 Port A A00 A15 GND v J v Port B WE CN B15 GND Port C BECOME C15 GND Port D EN sr 2 L L d i Hen L L j2 j2 x LJL L PN L eer Mee S jj Sc m Ape x px L l ol T N N e dili H L ee IN TO TRIGGER a i i y y Y Y Y Table 1 3 Definitions and Functions of Pins for Advanced Models CO External Clock When using the External Clock for sampling it receives the external clock C1 Etema Clock When using the External Clock for sampling it receives the external clock C2 Extena Clock When using the External Clock for sampling it receives the external clock When using the External Clock Signal it receives the external T1 Trigger In signal l When using the Externa
133. erface Analysis Compression and Signal Filter and Filter Delay 4 1 Logic Analysis Logic Analysis is meant for a single signal analysis Section 4 1 gives detailed instructions on the software s basic setup Basic Software Setup of the Logic Analysis Task 1 Sampling Setup Step 1 Click iM icon or click Sampling Setup from Bus Signal on the menu bar the dialog box as shown in Fig 4 1 will appear PLUS LAP B 7027000 5 4 000000 0000 Laboc1 Bus Signal Trigger Run Stop Data Tools Window Help E Sampling Setup n m b bb C IIK i MP 125MHz ARG Signal Filte Clock Source a Asynchronous Clock Group inte Unagroup t Frequency 125 Hz Expand n i Synchronous Clock Collapse External Clock Formak Ric Rename fr Single Glock External CLEO 16 Ghanm OR 3z chan BITE External cua 7O thanm Frequency LOOK Hz Min 0 001H2 Max 150MHz Sampling RAM Size Compression Mode Signal Filter RAM Size z Data Compression Signal Filter Setup Fig 4 1 Sampling Setup Step 2 Clock Source Frequency Internal Clock Asynchronous Clock Click on Internal Clock and then select the Frequency from the pull down menu to set up the frequency of the device under test DUT The frequency of the Internal Clock must be at least four times higher than the frequency of the Oscillator on the DUT Or select the frequency 200mHz from the pull down menu on Tool Bar as Fig
134. erification Point Low signals gt 190us converts to High signals gt 40us 3 Protocol Analyzer IO Description o The sole I O transmits Host and BQ HDQ status and data 4 Protocol Analyzer Electrical Specifications Parameter jas n Lo de jv Protocol Analyzer HDQ Format Description The format changes according to the pulse width so the display must refer to the defined pulse width Protocol Analyzer HDQ is made up of 16 bits signals Firstly after the period of status signals a device will be installed for the 7 bits address through the Host so that 1 bit signals can be read or written After a response time of high signals the data will be exported in 8 bits format with the data and location content from LSB to MSB The following is the Host to BQ HDQ analysis 136 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Send Host to BO HDQ Send Host to BO HDO or i Receive from BQ HDQ CDMR Data j IRR i l ui Address RAN i LSB MSB Break Bi Bit Lee gt I IRsPS Address Bil s _ Start bit Data Bit Stop Bit Fig4 110 Host to BQ HDQ Analysis Protocol Analyzer Format Break This is the initial bit for the Protocol Analyzer HDQ after Low signal lasting a period of t B it is then converted to a High signal lasting a period of t BR The length of Low signal is no less than 190us whereas the Hi
135. esac pared iebae E E o gc ss i etn EU M ss Sco Enti UP o fep I cM A SEO En Ub M ca fene Mig R MEME 178 6 4 Techntedl TOOT AO IN soc eu eco toe reU ESOS esum pae EUccUn UI E E E RUM ecuene es 179 6 5 ug E H O t 180 APD SITUE MN TOT 181 7 1 TOE IRC YS m 182 FN Bonis 184 3 FMO7I4A Za Be Fl FS AS 15 RAAS The Zeroplus Logic Anal P BET xe FA Phe s m Deere Mel Ver 3 10 a Zeroplus Technology Co Ltd Preface This Quick Start Guide is designed to help new and intermediate users navigate and perform common tasks with the Zeroplus Logic Analyzer Despite its simple packaging and interface the Logic Analyzer is a sophisticated measurement and analysis tool It is also a highly sensitive electrical current sensing device Users must carefully read instructions and procedures pertaining to installation and operation Any instrument connected to the unit should be properly grounded A pair of anti static gloves are strongly recommended when performing a task with the device To ensure accuracy and consistency of output data use of the bundled components are strongly recommended Users opinions are very important to Zeroplus Please contact our engineering team by telephone fax or email with your questions or feedback Thank you for choosing the Zeroplus Logic Analyzer No
136. ext J Previous Close Max Value a Fig 3 130 The A Bar is placed at the 0X69 of Bus1 where the condition of the Waveform find is set The Statistics of the Waveform find is 10 ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc1 a File Bus Signal Trigger Run Stop Data Tools Window Help a ca oy 894 gm i gt bO E E 141 E j Tunt I J Page i alli imi i i fed GB Ga 009s pI Scale 1 25GHz Display Pos 5 296us APos 7 336us A T 136 314KHz v A B 134 12KHz v Total 16 384us Display Range 5 316us BPos 120ns v B T 8 333MHz 7 Compr Rate No 5 232us 5 288us F 5 284us 5 28us Ts OXEA OX6B OX6C 62 5MHz 62 5MHz Waveform find Activate the Function of Chain Data Find Busi Signal Name f 1 Previous Close Bus Item Find Min Value Max Value m Start At When Found s p zl E Ja Statistics Address 662 16 x x T Z IEEE 0 05 5 80 4 A10 410 x x mmmxlzs g A12 12 Fig 3 131 The C Bar is placed at the OX6A of Bus1 where the condition of the Waveform find is set 67 FMO7I4A BEL SE AS 977 BR 43 a The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 A ZEROPLUS LAP B 702000 S N 000000 0000 SPI als B Oj xl File Bus Signal Trigger Run Stop Data Tools Window Help 8 x osalete R aL P alfe Es al SOMHz aw o s 4 4 Page fli
137. foe I Def ae m am k I Scale 2us Display Pos Une APOs 3 us T Total 4 NaBr Display Range S us 52u5 B Pas 3Ous T m ame m Trigger Delay E A T 30u amp F B T 30us orngir Aalt Ha 90 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig 4 11 Trigger Position 40 7h zERDPLLS LAP R TOO 5 OO Odo Later E zio xj Au Die tele Thap Runfutee Qata Toole window ele Dml ih ee AE 534 Iob see i m liz mo J hi am E E uns les Be UH Il i d Trigger Delay Font Si ze 12 Bcal us Display Pad One AFos a0us A 1 T ial nnm ni DIT ng Atlus Sus B Fos J us B T230us Cor nprRalicHo T 7 o il Fiter L Bussiga e Ar A an Mg au Aa A03 wf ADE Apa AE a ME 4T A a Brem sc Fig 4 12 Trigger Position 70 Step 4 Trigger Level Setup Click the pull down menu of Trigger Level on Port A B C and D to select the Trigger Level as the voltage level that a trigger source signal must reach before the trigger circuit initiates a sweep Tip There are four commonly used preset voltages for Trigger Voltage TTL CMOS 5V CMOS 3 3V and ECL Users also can define their own voltage from 6 0V to 6 0V to fit with their DUT Port A represents the pins from A00 A07 on the
138. gh signal is no less than 40us gn m Fig4 111 Pulse from Low to High tem Address The Address comprises 7 bits The initial Low signal lasts a period of t HW1 and if the write O status continues through the end of the t HWO period the signal will convert to High and last throughout the period of t CYCH as shown by the dotted line in the following figure Conversely if it is the write 1 status after t HW1 period of time the signal will convert to High and last throughout the period of t CYCH which is of 1 bit and no less than 190 us The t HW1 range is from 0 5us to 17us and no more than 50us The t HWO range is from 86us to 100us and no more than 145us Read Write Read Write is 1 bit 0 and 1 are displayed in the same way as the above description T RSPS The High signal lasts a period of 190us 320us The following 8 bit data is from Send Host to BQ HDQ or Receives from BQ HDQ Data Data Made up by 8 bits it is from Send Host to BQ HDQ or Receives from BQ HDQ Data It operates in the same way as in 2 2 and the data is from LSB to MSB BQ HDQ To Host If the data transmission is read by BQ HDQ To Host the initial Low signal lasts a period of t DW1 and if the write O status continues through to the end of the t DW1 period the signal will convert to high and last throughout the period of t CYCD as shown by the dotted line in the following figure Conversely if it is the write 1 status after t DW1 period of time
139. gure below se v a BE Be IE be WA le l Height 26 Trigger Del 4 Pos 1023 A T 1023 BPosZ7 B T227 LIES 40 i BE 32d TYTTTATTTTTATTTTTATTTTTATTYTTEEKTYTTT es ee es eee Fig4 49 Auto Prolong Packet The Packet List is displayed as the figure below BUS Packet List x Refresh Export Synch Parameter Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length E Lo j 1 j o j 1 o 1 o j 1 o 1 J 10 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length FS REFER EE EFI ERN EN ER DE BD TT Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data 10 10 10 10 Busi us 1003 o 1 O 1 O 1 O 1 O 1 Jj 10 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 10 10 10 o 1 j O 1 j O 1 j O J 1 j O0 J 1 j Packet Name TimeStarnp Data Data Data Data Data Data Data Data Data Data O0 1 j O 1 j O 1 j O 1 j O 1 J 10 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 6 Bust Bus 973 a EUN CN RR RYE RENE RN INTE Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length a a TT GN ORA xl Fig4 50 Bus Packet List Tip The Protocol Analyzer Packet will be explained in the following plug 5 Packet and Waveform Synchronization For the convenience of fast corresponding betwe
140. h rr FM 4 ART ar Am Am sFAm mt ant CD CULTE is OOOO aie xj aE BEN Sot E JA E f oue ELLIOU Fami Sum Bien Tata oa 7 AF Mn adu A LE s LE F ar um s m grad at a a AT E Fiii B Li l od p ala ll b ar re alil xj de Sete imum vus pn ba E abiti xg tte d XXE FAD thala mjm em eee Pine 1 m Bee oom ee jan Tee E fortes fi Wri Tm HI Dermm aa D Liz LLLI A tal fen eae zou Dam aes Pl 258 Pres ne B Talt Tam Pale Sn PME r i Bad Ef x Yon x yam Mm aM rr Fu x ART ar Am i co ean wa cmm p Bite RA du Fig3 116 Add a Bar on the waveform area 63 The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A Tip When the mouse is placed at the name of the current Bar the Bus state data which belong to the Bar in the current position will be displayed See the image in the right column the data of A Bar in the position of Port A Port B Port C and Port D are respectively OX0056 0X0000 0X0000 and 0X0000 Tip The function of Bar Width and Connection Settings can be used by the Bar with the Ctrl key and the way of using those functions are the same as the function of the file check in WINDOWS Click the Ctrl key and the connected Bar synchronously then double click the Bar the Bar Width and Connection Settings dialog box will appear And the Bar Connection function can be activated by the dialog
141. hat of the other 161 FMO7I4A BEL SE AS 977 BR 43 a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du Data Contrast Settings X vw Active Data Contrast Contrast Files Basic File HOG 1 m 10MAz als Contrast File HO 1 rni 200Mhz als Error Tolerance None Beginning of Data Contrast Result Error Stat ACO AOC ACL ACL Anz AD2 AS A03 ADA AD4 ADS ADE A06 A06 r 1 jw Roll the contrast waveforms synchronization Pin Assignment vw Display Files the contrast differences W Display files horizontal PerForm Contrast M Do contrast automatically when being run Apply Close Help Contrast Beginning Point T Bar Fig 4 156 The Result of the Data Contrast Dialog Box AOO AO0 FAIL It denotes that there are differences between the two channels of the two files A01 A01 PASS It denotes that the data between the channels of the two files are absolutely the same 2 Contrast the waveforms in the waveform window The software contrasts the two data files in the waveform area window and displays the contrast waveform and basic waveform horizontally and users can contrast the two waveform files by rolling the mouse however the differences can be marked in red waveform line ioj xl Dg E S E oe FF B gt DD ii da sh amp E EIL 9 Ri iid 0 0737256 EE ax B Be Te te le o
142. he Address and Data in the operating process of the Protocol Analyzer Users will know the operation when they use this function It improves the efficiency of knowing the conditions 4 10 1 Basic Software Setup of Memory Analyzer STEP 1 Click Tools on the Menu Bar then select m to activate the Memory Analyzer function Waveform Display Listing Display Hat News Window Navigator m Memory Analyzer 3 Bus Packet List Statistics Windows Cascade Horizontal Vertical Screen Display k 1 1 alc 2 zalc w S12 alc Fig4 163 Memory Analyzer Interface STEP 2 Open the Memory Analyzer dialog box Memory Analyzer x lt gt gt gt option Import Export Merge Refresh Reset Bi i Ba Bus1 I2C Address write data Read data P Adrese ra data e ae 3 L 8 13 ox PL LL LL LLL ef od 1 IL L L l mem S T T Lom 1 1 1 1 1 1 ema L 1 L 3 Lung T T1 T 4 31 p JJ jJ oco 0 p j q p yq p Jj Luu p q 3 4 1 p T n p p B oco 0 d 0 pq bf d o dl o d o o d d 1 f X Ht P Es Fig4 164 Memory Analyzer Dialog Box 1 Compact Mode and Complete Mode Click the Right Key in the Memory Analyzer dialog box there are two modes for selecting which are the Compact Mode and the Complete Mode See the two differe
143. he UART signal from the tested UART circuit Refer to Fig 4 78 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms 2EROPLUS LAP B 702000 S N 000000 0000 UART als Bl x X3 File Bus Signal Trigger Run Stop Data Tools Window Help 8 x Osh So 84H FF B b b gt fek zhes g 50mHz z o mw 50 z ss Page fi Eg Gal 9 e ia 7 982105 7 a Ra Be Be Ty A ES 4 Height 30 Tri Font Size 2 al Scale 982105us Display Pos 538 360194ms APos 221 82558ms v A T 221 82558ms v A B 600ns 7 Total 3 703719s Display Range 538 1606 B Pos 221 82498mi B T 221 82498ms v Compr Rate 930422 000 v a SER er ae ee meal ES TER Dol sre eran El oa Sener el Ur E T bla 4 gt 4 J gt Ready End DEMO Ui Fig 4 78 Waveform Analysis Protocol Analyzer UART Packet Analysis PROTOCOL ANALYZER UART Configuration Packet Data Format Register ltem Color ltem Color Min 10ns Max 102 ET Time IE res EH ee ee Cancel Default Help Fig4 79 Protocol Analyzer UART Packet dialog box Data List Data field captured by Bus in the packet display Parity Display parity check in packet Describe Error description to any field format or data bit 120 FMO7I4A ZP Be Fs
144. he software interface and then reinstalling it By default the program is available for all users Q4 My HDD is modest which software components are absolutely necessary A Choose Custom as your setup type Next unselect items such as examples and tutorials You must install at least the Main App application Q5 My MS Windows system will not accept the driver what can I do A Double check that you run the correct Setup exe from the folder that corresponds to your hardware and MS Windows version Visit our website for the latest updated or debugged software If you are running this program on a virtual machine the virtual machine may not support the amount of hardware addressing In this case try it with a machine that is physically running a Windows system 168 FMO7I4A Q1 A Q2 Q3 Q4 ZP Be Fs Fh Ae eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd LEETS Mantel ER dd 5 2 Software Troubleshooting Can I run the program even if don t have the Logic Analyzer hardware Yes you can You can run the program under the demo mode See Fig5 1 ZEROPLUS Logic Analyzer X Hardware Searching Failed s C Fig 5 1 Select Run Demo if you do not have the actual hardware I am running a graphing program and software at the same time Whenever I try to make a screenshot of my work it keeps telling me that have insufficient memory space what is wrong A few users have reported si
145. hnology Co Ltd eek ANIAN VOT suci Task 2 Trigger Property Setup Step1 Click Fig 4 5 wi icon or click Trigger Property from the Trigger on the Menu Bar The dialog box will appear as shown in Bus Trigger Setup 7 Channel Trigger Setup 15 Trigger Property Trigger Mark ETIAIN Tid E s Don t Care Trigger Delay Trigger Content Trigger Range High Bl Low C Delay Time and Clock Trigger Delay Time 4 Rising Edge amp Falling Edge Trigger Page X Either Edge 1 Aris Min Sns Mas 83 880955me Min Mas 81532 Reset Trigger Delay Clock Min 1 Mas 16776191 Trigger Position Bie T Pos One Start Pos 8 1 84us End Pos 8 2us Note When more than one trigger pages are selected the trigger bar disappears from the view Cancel Default Help Fig 4 5 Trigger Property Step 2 Trigger Page Delay Time and Clock The Trigger Page the Delay Time and Clock can t be applied at the same time 1 Trigger Page Click Trigger Page then type the numbers or select the numbers from the pull down menu of the Page Page on the Tool Bar or click the pull down menu of the Trigger Page on the Trigger Delay page of the Trigger Property dialog box as shown in Figs 4 6 4 7 and 4 8 The selected page numbers will be displayed on the screen Tip The Trigger Bar T Bar will not be displayed when the setup of the Tr
146. i ar fr br UART Bus Analysis EA m MERET SPI Bus Analysis H Sns JO Height ez Fig 3 162 Software Flow Diagram Conclusion Information demonstrated in this chapter is only for entrance level There are more advanced approaches which may require fewer steps than those shown in this chapter This chapter is meant to equip users with sufficient grounding of the Logic Analyzer s software interface 84 FMO7I4A Pe THSLR 2 ARA Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 4 Introduction to Logic Analysis 4 1 4 2 4 3 4 4 4 9 4 6 4 4 8 4 9 Logic Analysis Bus Logic Analysis Plug Analysis Bus Packet List Bus Analysis Compression Signal Filter and Filter Delay Noise Filter Data Contrast 4 10 Refresh Protocol Analyzer 4 11 Memory Analyzer 85 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Objective Chapter 4 gives detailed instructions on performing two basic analysis operations and five advance analysis applications with the Logic Analyzer These two basic analysis operations are the Logic Analysis and the Bus Analysis which are fundamental to all further applications The other five advance analysis applications are the I2C Inter Integrated Circuit Analysis the UART Universal Asynchronous Receiver Transmitter Analysis the SPI Synchronous Peripheral Int
147. ialog box The packet color can be varied by users 150 FMO7I4A BEL SE AS 98 BR 73 a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du ZEROPLUS LAP B 702000 S N 000000 0000 CAN Bus als oj xj 42 File Bus Signal Trigger Run Stop Data Tools Window Help 81 x D c amp di y E gk gm e IE bbb 32K si ie 50MHz v an w 20 v 9 Page ji iii ii OB Ge E N ii e B r 37413us ow ae Be BY Te te e oi BS Height 30 TriggerDeley Font Size fi 2 Y Scale 7 37413us Display Pos 273 267297us APos 111 02us v A T 111 02us v A B 600ns v Total 655 36us Display Range 88 914059us BPos 110 42us v B T 110 42us v Compr Rate No Bus Signal Fiter 1257847064162 8553544199 5260024236 3986494273 267297u310 137944u 347 0085924 383 8732394420 7498874457 6205 g Bm OL Ee yUUUL UU LILI LIL Li L vam am EE PULL ae ifl L 4 A02 A02 A03 A03 g ADA A04 g A05 A05 Setting i Refresh Export Synch Parameter T IX RE OV IR Packet E TimeStamp Length a gt PortB Bus 131 14us 655 32us Packet Name TimeStamp Data Length Port C Bus 131 14us 0000 655 32us m Packet Name TimeStamp Data Length PortD Bus 131 14us 0000 655 32us Packet Name TimeStamp Basic ID SRR IDE ID RTR RB1 RBO DL
148. ield Identifier is 11bits its function is the sequence when transmitting signal numerical value is less the priority is higher and the array is from ID 10 to ID 0 and the numerical value is not all from ID 10 to ID 4 finally RTR Remote Transmit Request is the judgment bit of transmission or Remote Transmit Request When RTR 0 it denotes that the data goes out when RTR 1 it means asking far data to come back Control Field Control Field consists of 6 bytes including Data Length Code and two Reserved Bits as Peli frame for future expansion The transmission reserved bit must be 0 Receiver receives all bits combining 1 with O As the below figure IDE and RBO of Control Field are reserved bits which must be 0 and the latter 4bits are only 0 8 which denotes the data behind will transmit several bytes data Fig4 122 Control Field Data Field The Data Field consists of the data to be transferred within a Data Frame It can contain from 0 to 8 bytes and each contains 8 bits which are transferred MSB first CRC Field 16bits CRC the last is a delimiter and the default is 1 143 FMO7I4A AP RE BL AR 2 ARAE The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Fig4 123 CRC Field Ack Field That is the return signal of Receiver which has two bits and the final is a delimiter whose default is 1 If receiving success Ack will send back 0 then the transmitter knows the Receiver has received the data End of Frame 1
149. igger Page is more than 1 Trigger Property x Trigger Delay Trigger Content Trigger Range Trigger Page C Delay Time and Clock Trigger Page m Trigger Delay Time Min 8ns Max 83 880355ms Trigger Delay Clock m Min 1 Max 15775131 T Pos Ons Start Pos 8 184us End Pos 8 2us Note When more than one trigger pages are selected the trigger bar disappears from the view Cancel Default Help 88 FMO7I4A BEL SE BS iB 47x ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 Fig 4 6 Trigger Page iglx la x B majs c IET f ah so0kH2 z ore m e oh Page f ii G E E 961 fi saa ecR RARE Rn Bee oo Hegw 0 Tiggor TAA M E Bea a Display Pos One A Fi u A Tz30us A BzB us Disi Range stus 52us B Fas 3 us v B Tz3 u amp Compr Rate Ma Trigger Froperty Trigger Creer Trigger Daly Trigger Range f Tnaaer Paa 1 Dels Tine and Chock r Trigges Pepe o r Tigges Delay Tine 1 1m Meri ac Poin Ong Max 167 11 675a sns fcd Mas 16711679 T Pos a na Steet Por a 4555 Sur End Pos 655 37us Binder Sf hen mon than nne bigger pages am selected He rige bor disappesas from Fig 4 7 Trigger Page and Screen 1 IUETTTCIITT E SUME x r o t 2181 xl TLI 5 REN 0
150. ill be changed to ms s or ks 2 Pull down menu There are thirty scales The maximum zoom in and out is the cycle of each grid 0 0001piece The minimum zoom in and out is the cycle of each grid 1 000 000 000 Zoom In and Out the proportion with each grid being the cycle the zoom in and out 96 is 100 The time of zoom in and out counts by the clock of each grid sample frequency For example 1 Each grid is being a cycle the zoom in and out is 100 The time of zooming in and out will be presented by the clock of each grid X 1 sample frequency 2 Each grid stands for the clock of 100 pieces the zoom in and out is 1 and the time of zooming in and out will be displayed by the cycle of each grid X 1 sample frequency show all Data F10 The Zeroplus Logic Analyzer User s Manual Ver 3 10 Fig 3 63 Click Hand and then press and hold the left mouse button to drag Reset the mouse pointer function 10 AR A Pos 396 B Pos 399 I5 4 8 a4 55 54 5t ESTA TUA QUIA Fig 3 64 Normal status 10096 d R A Pos 41 B Pos 25 4 J E UUUUUUU UATU TLU L Fig 3 65 Result from normal to Zoom In 2 AE R A Fos 1025 B Fos 1015 i cds 1 Jed Fig 3 66 Result from normal to Zoom Out E e e ae e p p jj E alil m ana eee ee e Wurm t de ru E TE OCETA B Fig 3 67 Show all Data of a memory page 48 FMO7I4A P BETHS LIS AR S Zeroplus Tech
151. ions Detailed description invites reference company website CopyrightiC 1997 2011 ZEROPLUS TECHNOLOGY CO LTD Website Abbots iw zeronlus com kw Fig 6 4 The circled information is the version number SW10 How may I upgrade my software interface program A Visit our website at http www zeroplus com tw and follow the instructions for the English version You may also use the following address for English updates http www zeroplus com tw new_instrument main download php type 1 SW11 Can I save my signal data to a separate pure text file txt A Yes this feature has been available since V1 03 01 SW12 Why is the text display covered by other text or outside the display width A At this stage our software interface program has missing code for multilingual support You will have to ensure your system default 175 FMO7I4A BERE FH Ae Be 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 encoding is one of the following languages 1 any English Encoding en en XX 2 Traditional Chinese zh zh XX 3 Simplified Chinese zh zh CN in HZ GB2312 GB18030 Double check the language configuration in Regional and Language Options a QuickTime Regional and Language Options Documents gt 64 txt Outlook VisualBoy control Panel Ss Scann Customize settings for the display of languages Search CJ Window
152. isplay Files horizontal EA Find Pulse Width Iv Do contrast automatically when being run l Io the Previous Edge EUN Apply Close Help Fig 4 154 Data Contrast Activate Data Contrast Click the checkbox to activate the function of Data Contrast Basic File It is the standard contrast file Contrast File It is used to compare with the Basic File Contrast Beginning Point It can set the beginning point of the contrast at Trigger Bar or Beginning of Data Error Tolerance It is the allowable time error when setting data contrast Contrast Result It displays the same contrasted result and the different contrasted result with PASS and FAIL respectively Error Stat It displays the number of discrepant parts Pin Assignment Users can select the contrastive channel Perform Contrast It can activate the Contrast at once Display files horizontal The waveform window of the two contrast files are displayed in horizontal Users can select it as their requirements and the default is non activated Roll the contrast waveforms synchronization The two contrast files roll synchronously Users can select it as their requirements and the default is non activated Display files the contrast differences It can line out the difference in the contrast waveform Users can select it as their requirements and the default is non activated Do Contrast automatically when being run The two files will be contrasted automatically when being run Tip For
153. l Default Help Fig4 120 Protocol Analyzer HDQ Packet dialog box Item Select the content which needs to display in the Packet List which includes Break Recovery Address Data Read Write and Describe Color Set color for items which needs to display in the packet list 141 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 4 5 7CAN 2 0B Analysis Preface Add Protocol Analyzer function to analyze CAN 2 0B transport protocols data CAN 2 0B serial transmission there are two signal lines CANH and CANL that match with baud ratio judge serial data If you want to change serial data into the Protocol Analyzer format you need to analyze this function with LA A dialog box needs to be added you should set up a Protocol Analyzer CAN 2 0B dialog box CAN 2 0B Introduction 1 Brief Introduction Features CAN 2 0B Controller Area Network is an Asynchronous Transmission protocol It costs low sky high use rate far data transmission distance 10KM very high data transmission bit 1M bit s sending information without appointed devices according to message frame dependable error disposal and detection error rule message automatism renewal after damage and node can exit Bus function on the serious error Application CAN 2 0B is used for automotive electronics correlation systems connection 2 Protocol Analyzer Signal Specifications Name of Protocol Analy
154. l Analyzer Electrical Specifications Parameter Every IC varies according High count Voltage 2 8 5 2 V to the Pull High voltage dc jV Low count Voltage E Protocol Analyzer 1 WIRE Format Description Two speed types of 1 WIRE Standard 1MHz 1us High 5MHz 0 2us Four types of 1 WIRE Signals 1 Reset Every communications period starts with Reset signal Master will send a Reset Pulse so that all the Slave devices on the Protocol Analyzer 1 WIRE enter into recognition status When one or many Slaves receive Reset Pulse a Presence Pulse signal will be sent back from Slave indicating receipt of the signal 2 Write 0 Send a 0 bit to Slave Write 1 time slot Write 1 Send a 1 bit to Slave Write 1 time slot 4 Read Data Read data sequences resembles Write time slot However when Master releases Protocol Analyzer and reads data from Slave devices Master creates samples from Protocol Analyzer status In this way Master can read any 0 or 1 bit from Slave devices Four signal types are described respectively in the following 1 Reset 1 When Master starts communicating with Slave Master first sends a low count Reset Pulse TX of amp 57L Standard speed 480us High Speed 48us for a period of time MASTER TX RESET PULSE MASTER RX PRESENCE PULSE E VeuLLUP VeULLUP MIN Vi miN V L MAX OV RESISTOR mum AS IER Fig4 95 Master TX Reset P
155. l Clock Signal it receives the external T2 Trigger In sanal TRIGGER IN TO Tager wien using the External Clock Signal it receives the external signal TRIGGER OUT Trigger Out The trigger out signal is used for outputting the trigger signal 9 FMO7I4A ZP BE TIBB4 2 BR VN ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Beers Mantel E 1 3 Hardware Specification Table 1 4 Hardware Specifications of LAP B Series Table 1 Win2000 XP Vista Win7 USB 2 0 1 1 PowerSupp ssi wA RO AC100 240V 50 60Hz Max External Clock way 150MHz Max 150MHz Max 150MHz Max 150MHz ri Bandwidth 100MHz 100MHz 100MHz 100MHz Memory 17 5Mbits 17 5Mbits 140Mbits 140Mbits Memory Memory Depth 256Kbits 256Kbits 2Mbits 2Mbits Per Channel Trigger Channel 70CH 70CH 70CH 70CH Triaaer Condition Pattern Edge Pattern Edge Pattern Edge Pattern Edge gg Wide AND OR Wide AND OR Wide AND OR Wide AND OR Internal Clock Rate 4412 400MHz 1Hz 400MHz 1Hz 400MHz 1Hz 400MHz asynchronous Sampling Rate Pre Trigger WEIN Width Display Trigger Count 1765535 1765535 1765535 1765535 Working Voltage 6V 6V 6V 6V 6V 6V 6V 6V Analyzer Kep AIRE mn E EE Trigger Threshold Voltage ben meda ME Chinese Si Chinese Si Chinese Si p E Chinese Tr Chinese Tr Chinese Tr Chinese Tr guag os lt a EM R TimeBaseRange Base TimeBaseRange Sps 10Ms Sps 10Ms Sps 10Ms
156. l number of your product Thus we strongly recommend registering your product for your own benefit What should do if the hardware serial number is previously registered In this case take a picture of the decal on the rear side of the product and fill in the registration form Call us and mail both picture and registration to us A customer representative will be happy to assist you How do l register my protocol analyzer and buy protocols Every product is assigned and engraved with a unique serial number Please print your S N number window as an example attachment and send it to your distributor or ZEROPLUS head office According to your S N we will provide passwords for your protocol registration 178 FMO7I4A TIO1 TIO2 TIO3 T104 TIO5 TI06 TIO7 T108 TIO9 TI10 ZP BE Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 6 4 Technical Information What is the Logic Analyzer The Logic Analyzer is a tool that sieves out and shows the digital signal from a test equipment by using a clock pulse The Logic Analyzer is like a digital oscilloscope However it only shows two voltage states the logic status 1 and 0 differ from many voltage levels of an oscilloscope The Logic Analyzer has more channels than an oscilloscope to analyze the waveform Since the Logic Analyzer obtains only signals 1 and 0 its sampling frequency is slower than an oscilloscope whi
157. lick the symbol before the name of the Bus Fig 3 26 Expand If the Bus has been expanded click the symbol before the Bus name to Collapse the Bus Buz 5ignal Fig 3 27 Collapse Auto SIze Move Left Up Move Right Down Hi de show ALL Color 35 The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A Tip Format Row Auto Size NOT Available in waveform Display Move Left Up Change to Move Left in Listing Display Move Right Down Change to Move Right in Listing Display Hide Show All Color Rename Tip When users select one channel to change the name of the channel users can rename other channels fast by clicking the up and down arrows on the keyboard 16 Channel Mode 32 Channel Mode we TO Channel Mode Tip The purpose of adding the 16 Channel Mode and 32 Channel Mode is to improve the Sampling Frequency The typical Sampling Frequency is above 400MHz which is over the input bandwidth of the External Clock so in the 16 Channel Mode and the 32 Channel Mode when the functions of Signal Filter and Compression are closed the function of the External Clock is also to be closed P BE IA 2 ARA 8 Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 Fig 3 28 Click to change the Bus or signal display Change the display of a Bus or a signal Size the signal columns automatically Highlight a signal or Bus and
158. ling A This feature has been enhanced since V 1 03 If your program version is prior to this version visit our website for the latest update at http www zeroplus com tw new instrument main download php type 1 SWOS8 What are the extremes for Delay Time and Clock amp Trigger Delay Clock A The interface will inform you of the interval you may use However it varies from case to case depend on your test devices See Fig 6 2 174 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Trigger Delay Time bns Min Uns Mas B3 880355ms Trigger Delay Clock E Min T Max T5 7 75131 Fig 6 2 Delay Time and Clock SWO09 How do know the version number of my software interface program A Click Help from the Menu Bar See Fig 6 3 and then select About ZEROPLUS Logic Analyzer See Figs 6 3 and 6 4 Help ZEROPLLIS Logic Analyzer Help Fi keyboard Map Problem Feedback kd About ZEROPLUS Logic Analyzer About ZEROPLUS More Protocol Analyzer Fig 6 3 About ZEROPLUS Logic Analyzer About ZEROPLUS Logic Analyzer x LAP B Series ZB THE BR S a ER 3 8 Version Standard v3 10 MUz Zoroplus Technology Co Ltd The Information of Ehe Version ZEROPLUS LAP B Series Standard V3 10 Welcome to use ZEROPLUS Logic Analyzer The document includes the version information of the software New Funct
159. lock 1 Frequency To use the compression mode the Trigger Page and Delay Time and Clock will be unavailable Step 3 Trigger Position Setup Type the percentages or select the percentages from the pull down menu of the 1 22 _ 9 on the Tool Bar or click the pull down menu of the Trigger Position on the Trigger Delay page of the Trigger Property dialog box as shown in Figs 4 9 4 10 4 11and 4 12 The selected Trigger Position percentages will be displayed where the trigger data is counted from the right side of the screen of the system 89 FMO7I4A BE t SE Ae 98 E 43 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du Min 1 I ax 8132 Trigger Position Fig 4 9 Trigger Position Pull down Menu EN 2LRUPUUS LAP TOU 5 NOOOUOO OUO LaDoc loj 4 Ble anjiyo Trigger Runfstep Data Tools Window Heip EILIE Demam LS m y EN b br zr SEEN one REED oe jm S mm E no ud l aus w BE E Ie e o nest fo Trigger Delay FomSie fiz Ocale 2us Display Pos ns Totar4 B5 ms APoz J us A amp T230us A G 60us B Pos 3 B T23Du5 0 Bus Signal es Pay Ab 4 B AU mam F MA an F MSc 24 NEU AUT AU AD EROPLUS LAP B TIEOIONS M000000 0000 Latoti lol A le uena Tigger Run Stop fete Tools window Heb 13 xl Oe d EIL gt p
160. marized as below A typical 1 Wire conversation Reset Pulse Presence Pulses Next Reset Pulse E NOT TO SCALE 7 ROM ID N LI i READ OR WRITE DATA Resel Sequence BIT ROM FUNCTION 8 Futs of MEMORY Command Code Unique FUNCTION device is selected Command Code Diagram 1 typical 1 Wire communication sequence Fig4 100 A typical 1 WIRE conversion 1 Master keeps Protocol Analyzer at low signal standard speed 480us high speed 48us as the Reset Pulse 2 Then Master releases Protocol Analyzer and locates a Presence Pulse responded by any online Slave 3 The above two points are Reset Pulse and Presence Pulse which can be put together as a Reset Sequence 4 If Presence Pulse is detected the slave location will allow Master to access Slave using the Write O or Write 1 Sequence 130 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 5 1 WIRE Serial Number 1 Every 1 WIRE Slave has a unique laser memory 2 The serial number is 64bits 3 The serial numbers are 8bytes in total located in three individual which are illustrated as below 64 bit Registration ROM number Be bit CRC 45 bit Serial Number b bit Family Code MSB LH TSE LSB Starting from LSB the first byte is for family code which is used to identify product categories 9 Next the 48bits is the only address for storage The last byte MSB is used
161. me to get the signal For example while the test equipment is sending out one rising edge the Logic Analyzer can start to obtain one signal What are A bar B bar and T bar The T bar A bar and B bar are labels T is the trigger label which cannot be removed when the waveform or the state is displayed which marks a pod When searching for or obtaining data the A and B labels can be set in any location Use the order of these markings you can return quickly to the desired position to analyze data This can also be a point to measure the interval among A B A T and B T What is a Trigger Gripper A gripper is the gathering point to collect the Logic Analyzer channels When a cable connector is not suitable for the tested device a trigger gripper may be an alternative for connection What is a Channel The channel is the collection line of the input signal Each channel is responsible for linking the pin of the measured device Every channel is used to collect signals from the test equipment How can I display acquisition in the waveform captured by external sampling signal Select Waveform Display from the Window list What is an External Trigger An external trigger is a signal outside the Logic Analyzer which is used for the simultaneous test of 2 test tools For example the Logic Analyzer can be started by one signal from another test tool Or when it is triggered it can output one signal to another test tool The Logic Analyz
162. milar problems We are not certain what causes it or how to fix it However we have found that if there is a defective address within 128MB to 512MB in your physical memory your software might signal End of memory Thus the program will warn you about insufficient memory Test your memory with a varied memory testing program Or take a screenshot close the program paste it to the graphing program and re open the program A part of the background picture remains within the Position Display Area especially when running the program in Demo Mode What s wrong with it Your machine may have a memory management problem with either your physical RAM onboard or the RAM on your video card Turn off any other multimedia of graphic programs and then re run the software If this does not work restart your system This should temporarily fix the problem However we highly recommend terminating all irrelevant programs while working with the Logic Analyzer Try not to burn DVDs listen to music or watch movies while working with the Logic Analyzer The default color setting of the Position Display Area is very cool but don t see anything when print my work out with my black and white laser printer What can I do Refer to Section 3 6 it should have clear understandable instructions about changing the color of the user interface See Fig 3 136 this color setting should give a clear view of the Position Display Area even with an old black and white
163. minute and hr hour Every Renewal When Repetitive Run is activated the wave form image or the state image will renew again and again Open the First file after stopping the Run When the Repetitive Run function is activated the waveform only displays the first file and it isn t renewed when the Repetitive Run is stopped the waveform still displays the first file fii D Backup LA Data inl o x File Edit View Favorites Tools Help ae Q sek di 2 wi Search i Folders BA Address o D BackupiLa Data E Go File and Folder Tasks A LA 1 als TE La 2 als ALS File ALS File B KB 8 KB Make a new folder e Publish this Folder to the Web LA 3 als GEO La 4 als ALS File ALS File E Share this Folder 8 KB LACS als ALS File 10 KB GELS La 6 als ALS File Other Places 10 KB c Backup L My Documents cj Shared Documents Y My Computer amp My Network Places LA 7 als ALS File 10 KB SEES LA 8 als L ALS File 10 KB SEC La 11 als ALS File 10 KB LA 10 als ALS File 10 KB SEES LA 13 als ALS File 10 KB Bhhhhhh LA 12 als Details E 10 KB LA 9 als ALS File 10 KB 13 objects 112 KB d My Computer Fig3 154 Auto Save 78 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 3 6 Color Setting To modify Color click Tools gt Color Set
164. must reinstall the driver every time you change the Logic Analyzer H13 Whyis there no data Why does data sampling seem inconsistent A The reasons are varied but you may follow this checklist for troubleshooting 1 Always check the USB connection between the Logic Analyzer and your PC 2 We strongly recommend using USB ports in the rear panel of a PC these ports usually have better voltage stabilities than front panel ports However if front panel USB ports are directly soldered to the main board you can use them 3 Make sure the Logic Analyzer is directly connected with the PC without a USB hub 4 Inconsistent data display may indicate voltage irregularities in the main board examine capacitors on your main board or power supply 5 If the problem is the power supply we strongly recommend purchasing a power supply with a hardwired voltage transformer rather than a voltage regulator For power supplies with the same output power those built with hardwired voltage transformers 172 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 are usually much more heavier than those relying on voltage regulators H14 Whatare the time settings for Setup and Hold A Setup Time 0 05ns 0 25ns Hold Time 0 02ns 0 08ns Clock High requires a minimum of 0 31ns Clock Low requires at least 0 47ns 173 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyz
165. n 2 3 ips and Advice 17 The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd LEETS Mantel eros Objective This chapter describes installation of the Logic Analyzer hardware and software Software installation steps must be followed precisely to ensure successful installation 2 1 Software Installation In this section users will learn how to install the software interface and drivers As with proper installation of many USB devices the Logic Analyzer application and driver software must be installed prior to the connection of the hardware The following steps illustrate an installation of a Zeroplus LAP B Logic Analyzer The seven models mentioned in Chapter 1 would follow the identical procedures Step 1 Insert the driver CD ROM in the PC CD drive Step 2 Execute the installation program Go to the START menu click START click Run click Browse select Setup exe file in the appropriate model folder and then click OK It is recommended that all other programs are closed while the installation proceeds Step 3 Choose the desired language Step 4 Click Next to proceed with the Install Wizard Step 5 Select I accept the term of the license agreement and click Next Step 6 Enter User and Company Names Step 7 Choose the setup type We recommend Complete for most users Step 8 Click Install to confirm settings and begin th
166. nalytic Range select the special position 10 and then select Place Ds Bar See the figure in the right column Add Bar Bar Tip When the mouse is located at a special position on the waveform area click the right key to select the Add Bar function a bar will be added automatically in the special position according to the sequence of the word and color See the C Bar in the position 5 in the right column More Functions on the Waveform Operation Area BE tt 352 As 20 Fa DR ZS Zeroplus Technology Co Ltd a it G EE Si t faa i PUE e Bep woe oe ea qoe gne Pi aliti zj mmm IE MON ex Jas JEVE CESS n reos Fomdm fir LT che ae Cay Pee ELI A Tan maab Test Pil ae ee L Lo aL 1LJ LEAL Compe Fran tag ia y 3 hargya ie m i A a ii gm E SE p UU aan ri ind E xi xi f fT Lir 4 E om fae NE Ji zm t E ERER HE zi t M im dign tira res Lo if Bg im A M hil i r mw 1 H T Tabak 1 il errn Poe LJ a ae De s um ah i el war i m FE H ds LI list ska J En ipai E DOMO EXC 1 uli md Aa a Pk PS Cth eer tee foie ees jek B fe Dad amp SRR FA HP er c nun j fe Poe tl oes NODE fox ruwzbRDLLMx Hage m Tug Dies Font a Denia 1 ibm dare Dome Pree an ated fen Pon xj Dime uen 18 24 Brett B TaHP e epi Pale in Pater a a Be wa _ Aw ART m M s a
167. nd Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to Unknow Start Flag TimeStamp 2 SS channel is not activated Virtual SS is activated 1 Data is 8 bit the Idling Time is set as 3us 125 ZP BE Ts FH ha BB 4 ml The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A BE t S BS 948 E 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 2 J55u g ig less than Idling time so the information after 2 355us isn t data Unknow registers Unknow End Flag Data s Timestmmp is the packet n it isos om SPI j SCK TM x x DAT A 39 gm Ten sen l or N Packet T eneth If the time length of SCE 1a 3 575us is bigger than Idling Time so it is data s timestamp Level is bigger than idling time it is the timestamp of data and the timestamp of next data Fig4 90 Packet Length Packet Length From Unknow Start Flag TimeStamp to Unknow End Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to Unknow Start Flag TimeStamp Virtual SS is activated 2 Data is 8 bit the Idling Time is set as 3us Don t care data bit is not activated Although 3 155us is bigger The Unknow than Idling time data s regi sters 1 information only capture the sixth bit and doesnot Unknow nd PF capture to the eighth bit HE sn the data is thought
168. ng data select a smaller RAM Size The RAM Size options are 2K 16K 32K 64K 128K and 256K Use the pull down menu to choose the speed of the clock on the board being tested The sampling frequency should be more than 4 times higher than the signal to be measured so that the waveform duty cycle depiction will be accurate 32 FMO7I4A Asynchronous t Iock Internal Clock Frequency 100MHz m Sampling RAM Size Compression Mode RAM Size Data Compress Sampling Synchronous Clock _ e 1 MUR T H Tip Inf Compression Tip in Signal Filter Setup E P BE T4133 B 0 ARAE Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 Choose the frequency of the clock on the board of the Logic Analyzer Select External Clock to acquire data through External sampling Choose either Rising Edge or Falling Edge to execute the analysis process According to the users input the value of external frequency in software the software can count the relevant value about signal mode and frequency For example the value of the message the time scale and the zoom in and out will be the value of time mode Connecting the Synchronous Clock Use one of the single connecting cables put one end on the mother board and the other in the LA as shown in the diagram opposite Check the box to compress all the data Compression is used for compressing the acquired data thr
169. nology Co Ltd Return to the last zoom Kk Previous Zoom Ctrlti lata Format Waveform Mode k Square Waveform Iw Sawtooth Waveform List Data Mode d Tip The data of Listing Display Mode are so many to be convenient for users that it adds the function of displaying data changed dot The format for the data display All Data Sampling Changed Dot Compression Data Changed Dot Compression All Data It is the present display mode Sampling Changed Dot Compression Take the sampling changed dot as the compression data reference dot Data Changed Dot Compression Take the present data change dot as the compression data reference dot The Zeroplus Logic Analyzer User s Manual Ver 3 10 Binary Decimal Decimal Signed Hexadecimal ASCII Fig3 68 Data Format Show numerical information in Binary Decimal Decimal Signed Hexadecimal or ASCII format To the Next Edge F12 PULL LL Go To gt t Add Bar Alt A s Delete Bar Alt B Ld L Ri Zoom E e Hand H R Normal ESCAPE TR Zoom In F9 u Zoom Out F8 Show all Data F10 x Previous Zoom Ctri z Data Format gt Waveform Mode Square Wa veform Sawtooth Waveform List Data Mode b Fig 3 69 Waveform Mode in the Square Waveform j To the Next Edge Go To p Add Bar ar si Delete Bar Alt B ar ii Zoom E ey Hand H R Normal
170. nt figures 164 FMO7I4A ZP Be Fs Fhe a BB 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Memory Analyzer x lt lt Ea E gt gt optio Import Export Merge Refresh Reset Display Alteration Pi Bus1 12C st 9999 Address irite data Read data Ade Wie dats feed dae 5 1 5 1 7 1 513 115 1 71 ek EC 1 5 de T1 es e e ee a ee oao o Eo o LL So LL LLL Y o0 y iw CompactMode D Complete Mode Unused 0X30 0X3F ox40 eee o po pe T T I eS eS SL ST NN SSG NS A a qo p p IL ee ee eee Loco d j j 1 1 l1 1L 1d l1 d Fig 4 165 Compact Mode a lt lt eS gt gt option Import Export Merge Refresh Reset Display Alteration Bl Bus1 I2C write data Read data eee eee ee eee ee AC oxoo oxor ox amp oxos oe oxos oxo c oao omi oaz ae oas oxi x6 OX20 ox21 OX22 CompactMode ox4 ox25 oxco X C v Complete Mode ox40 oxa Xa poss oxa O45 oxe c oxso osi 52 s X j0O54 s X oxe c ox6o oxei oxe2 es OX64 ess OX66 c ox7o oi1 z oz 074 s o0xve c Aoo Fig 4 166 Complete Mode 2 Buttons lt lt It is used to find the first packet ES It is
171. of the trigger positions the T Bar is displayed in order TO T1 T2 T3 T4 and the color is red as the image below 1 Bus The trigger condition is 0 the red T Bar marks the trigger condition in order 93 FMO7I4A BERE SE AS 4 GRAS The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 Bus Signal m m Bl NH oora En BE Tw I I I I m Fig4 18 Bus Trigger Mark 2 Protocol Analyzer I2C The trigger condition is Data 0 the red T Bar marks the trigger condition in order Du Bus Signal Bus ES 20 En 10 EB 0 iB 5 Be pos l T i 1 H Fig4 19 Protocol Analyzer Trigger Mark Task 4 Channel Trigger Setup Step 1 Click icon or click Channel Trigger Setup from the Trigger on the Menu Bar The dialog box will appear as shown in Fig 4 20 Channel Trigger Setup x Trigger Group Trigger Group External Trigger Glitch Finer T Level 0 OT Level 1 OT Level2 Filter Condition x HI Level 3 3 E R Level 4 Trigger Condition 2 lt OT Level5 OT Level Filter Condition x OT Level F OT Levels Trigger Condition 2 lt OT Leva S OT Level 10 OT Level ti OT Level 12 OT Level 13 Space Time Value Min Space Time Value Max OT Level 14 Enable 40ns OT Level 15 Width Time Value Min Enable 40ns Jv Enable Pre Fill Data v Wait space end point Jv wait width end poin
172. og box to Bus insert sending back the analyzed data It has five functions as following Time of waiting for triggering Time of triggering success Time of sampling data Time transmitted to computer after sampling data finished Time of Bus data overloading FEROPLUS Logic Analyzer Help Fl Keyboard Map Problem Feedback About ZEROPLUS Logic Analyzer About ZEROPLUS More Protocol Analyzer Fig 3 102 Help Menu Menu Bar Help Menu Item ZEROPLUS Logic Analyzer Help Fi Eewvboard Map Problem Feedback Detail Menu amp Dialog Box te H T Ht User Manual Features Installation Open ZEROPLUS Logic Analyzer Help file Fig 3 104 The table of Keyboard Map Report a problem to the service e mail at service 2 zeroplus com tw 59 FMO7I4A 77 Be ts FH ha a BB 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 About ZEROPLUS Logic Analyzer LAP B Series 4 PRA RAR A 2a Version Standard_ 3 10 CNO2 lus Technology Co Ltd SIN The Information of the Version ZEROPLUS LAP B Series Standard V3 10 About ZEROPLUS Logic Analyzer Welcome to use ZEROPLUS Logic Analyzer The document includes the version information of the software Detailed description invites reference company website Copyright C 1997 2011 ZEROPLUS TECHNOLOGY CO LTD Website htto www zeroplus com tw Fig 3 105 Copyright About ZEROPLUS Logic Analyzer
173. olor Configuration dialog box to set the conditions for the Bus Activate the Latch function Activate the Latch function Protocol Analyzer Activate the function of analyzing the Protocol Analyzer Use the DsDp Use the Ds and Dp to help analyze the Protocol Analyzer Find Find the desired Protocol Analyzer module Users can input the Protocol Analyzer name to quickly find the Protocol Analyzer module from many Protocol Analyzers After inputting the first character of the name in the Find box of Bus Property dialog box the corresponding module will be displayed in the Protocol Analyzer list box according to the input character See the figure below 92 FMO7I4A 2 Refresh Protocol Analyzer Analog waveform r Single Analog Display Mixed Analog Display Tip When the function of Analog Waveform is activated the Analog Waveform will be displayed in the waveform area of the Bus s sub channel and take the space of four channels And four sub channels won t draw the waveform It notes that the sub channel of the Bus must be more than four channels BETHS BS 20 T3 BR 23 E Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual Ver 3 10 Bus Property x Bus Setting C Bus Activate the Latch Function Protocol Analyzer Setting Parameters Gontig s ZEROPLUS LA CAN 2 08 MODULE 1 32 00 CNO1 C ZEROPLUS L HDQ MODULE V2 07 00 CNO1 ZEROPLUS L
174. or Flag sends out Bus actively to get the right state and the interrupted node tries its best to send abeyant message Error Delimiter Error Delimiter consists of eight recessive bits and allows Bus node to restart Bus transmission after Error happens Fig4 126 Error Frame Overload Frame There are two kinds of Overload conditions which both lead to the transmission of an Overload Flag The internal conditions of a node which requires a delay of the next Data Frame start during the first bit of Intermission Overload Flag can send six 0 which may damage Intermission format so that it makes the other nodes know node sending Overload Flag at this time When Overload Flag is sent out Over Delimiter can send eight 1 others send seven 1 after finishing either Fig4 127 Overload Frame Interframe Space Interframe Space is divided into Intermission and Protocol Analyzer Idle Intermission is three 1 It is impossible to send any message during this time excepting Overload Frame The Protocol Analyzer is recognized to be free the period of Protocol Analyzer Idle may be of arbitrary length And any station having something to transmit can access the Protocol Analyzer When a node is at the state of error passive the node will send eight O after Intermission and other nodes have the chance to retransmit themselves information 145 FMO7I4A ZP Be Fs Fh Aa GRA S The Zeroplus Logic Analyzer Zero
175. ough a lossless compressor The purpose of this compression is to place more data in limited memory than in actual memory The compression rate of the Logic Analyzer can be up to 255 times Taking the memory being 128K as an example this means that the maximum acquisition can be 32M Bits 128Kx255 32M Bits for each channel The chosen capacity of the memory 1MB means that the maximum data being sieved out arrives at 1MB 255 255M Bits Per Channel Note The rate will change depending on the data being analyzed x Filter Condition i 5 1 Trigger Condition Filter Condition 2s Trigger Condition Filter Condition 2s Filter Delay Setup M Activate Filter Delay r Select Filter Delay Mode Select Delay Start Point Delay Time i n Start Edge p According to Filter Condition C 1 End Edge Min 1 x Start Edge or End Edge C Opposite of Filter Condition 9 9 2 C Period Delay Max 65535 r Display Bar Setup show Bar Bar Style Bar Width 1 OK Cancel Default FMO7I4A 33 ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig 3 22 Dialog Box Signal Filter Setup Tip The function of Signal Filter is to use an alterable judgment circuit Click to enter the Signal Filter Setup which can filter undesired signals in order to
176. p Step 4 Fig 3 160 Stepwise illustration of changing waveform colors Step 1 Select several names Step 2 Select the corresponding items in Relating Step 3 Choose a color by following the method shown in Fig 3 160 Step 4 Click OK to change their colors at the same for example A01 A02 A03 and A04 Here is a sample of an altered Logic Analyzer software interface which will be used for further demonstrations in subsequent chapters See Fig 3 161 82 FMO7I4A 7A Be A FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc2 EET a mu mimm mm E Fig 3 161 An altered interface sample to be used in subsequent chapters 83 FMO7I4A 77 Be Fs FH Aa a BB 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du 3 The Flow of Software Operation BET Signal Filter Filter Delay RAM Size 128K ri mi Sample Rate 700MHz Trigger Condition 7 oo Delay Time Clock li MM Tan Lian e Trigger Level e E NO m Trigger Page mi R ee Select Analysis Firscticai ES Trigger Position 50 Hit D Trigger Count Com 1 Run gt Activate Signal fram Testing Board UART Bus Analvsis Acquire Nvavelf rm Toolate Analvze Data 20 Bus Analysis E Mad d ds Bb qn Ble r
177. ple I2C UART SPI HDQ 1 WIRE CAN2 0B Bus Property J X Bus Setting C Bus Clar Canis Activate Hae Latch function Ano Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Config v ZEROPLLIS LA 1 WIRE MODULE v1 10 000 C NOT i ZEROPLLIS LA CAN 2 06 MODULE v1 32 000 CM01 i ZEROPLUS LA HOQ MODULE V2 07 00fCNO1 i ZEROPLUS LA I2C MODULE v2 02 000C N01 i ZEROPLUS LA SPI MODULE v1 13 000 C MOT i ZEROPLUS LA UART MODULE v2 13 0007 MU1 v Use the DsDp More Protocol Analyzer i Cancel Help Fig4 36 Bus Property Every Logic Analyzer Module can provide some basic Protocol Analyzer plugs When users need to use the analysis which is not provided by the basic Protocol Analyzer plugs you can purchase from our company and then you can get this Protocol Analyzer plug and the register code for example 1 WIRE STEP 1 Install the Protocol Analyzer 1 WIRE Software STEP 2 Select 1 WIRE in the list of Bus Property dialog box 102 FMO7I4A ZP Be Fs Fh Aa eB BR S ae Zeroplus Logic Analyzer sers Manual Ver 3 10 Zeroplus Technology Co Ltd Bus Property X Bus Setting C Bus Golor Canine Activate the Latch function Adc Rising Edge Protocol Analyzer Setting f Protocol Analyzer Parameters Config o EROP ELA LWIRE MODILE LIIIN RN i ZEROPLUS LA CAN 2 06 MODULE 1 32 000CNO1 i ZEROPLUS LA HOQ MODULE V2 07 00fCNO1 ZEROPLUS LA I2C MO
178. plus Technology Co Ltd User s Manual Ver 3 10 Software Basic Setup of Protocol Analyzer CAN 2 0B xj Pin Assignment Start Packet Format Protocol Analyzer Mame Bus 111Bit Start hannel AD LS ese Protocol Analyzer Property Data Reverse Decoding Percentage Sample BUE E After End Packet happens just begin to analyze Baud Fate 125000 Auto When CAN Data far expansion combine Basic ID and ID Min lbps Max 10Mb EM Min 1 bps Max ps Iv The Del iz displayd in the CRC Field Fig4 128 Protocol Analyzer CAN2 0B Configuration dialog box Set the CAN 2 0B Configuration dialog box Pin Assignment Protocol Analyzer CAN 2 0B only needs one channel to decoding signals the default channel is AO Start Packet Format The Start Position can be divided into two formats 111 Bit Start the Start Position is that three bits are High and 0 Bit Start the Start Position is that one bit is Low Protocol Analyzer Property Percentage Sample The Percentage Sample should be entered in the position of the Baud Rate which is selected from the range between 25 and 75 and the default of the Baud Rate is 60 The resolution can be adjusted to 1 Baud Rate The Baud Rate can be set to Integer or selected from the pull down menu 10000 20000 40000 50000 80000 100000 125000 200000 250000 400000 500000 660000 800000 and 1000000 manually and the default is 125000 If the Auto is selected the Baud Rate
179. r product is a potential writer for Chapters 5 7 in this User Manual In fact this chapter is a composition of many unnamed electronic professionals especially experts 170 FMO7I4A 6 FAQ 6 1 6 2 6 3 6 4 6 5 oP BE P135 A 40 ARAS Zeroplus Technology Co Ltd Hardware Software Registration Technical Information Others 171 The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 Objective In this chapter common problems and questions are roughly classified into five categories Hardware Software Registration Technical Information and Others This is a backup resource for users especially those without Internet access Most references refer to English web links 6 1 Hardware H01 Is it ok to substitute stock items for bundled cables and connectors A Yes users may use any compatible connectors and cables However to ensure consistency and accuracy in measurements and data we strongly recommend using the bundled connectors and cables Each of the Logic Analyzer is calibrated with the bundled cables and connectors before packing H02 Does Zeroplus manufacture grippers How may purchase grippers A Yes we have a production line dedicated to grippers Contact our sales department and a sales representative will be happy to assist you H03 Is the memory size fixed If just use on
180. rcuit board make sure that the internal sampling frequency within the Logic Analyzer is at least four times higher than the external board frequency 1 2 Ifthe signal connector does not work well with the pins on the test board try using the supplied probes ZEROPLUS 3 1 Take the loose end of the cable and insert it into the clip 3 2 Compress the probe as shown to reveal 2 metal prongs Fig 2 8 3 3 Place the metal prongs on a metal connector on the testing board and release the fingers so that the prongs can grip the metal connector Fig 2 9 BS Ti E p ti Ji qm AE an A a mas j Y APALMARARARAREAMAE RANA AAA A Fig 2 9 4 The Logic Analyzer will connect to the Zeroplus server for software updates if an internet connection is available 5 Unwanted signals can be filtered out using the Signal Filter or Filter Delay functions 6 When measuring for a long period Compression makes memory more efficient 7 Trigger condition depends on the test board If triggering does not work well try narrowing the trigger conditions and optimize them repeatedly 8 Ifa test board has a lower frequency than Logic Analyzer sample signals according to the external clock 9 When sampling from an external clock filter extra signals with the Signal Filter function 10 Unused channels may be removed from the Bus Signal display using Bus Signal Menu Channels Setup 22 FMO7I4A 77 BE ts FH ha
181. register online Visit our homepage at http www zeroplus com tw Choose the Instrument Division and click on English Once you finish membership registration proceed with product registration After finishing product registration you will receive an email consisting of your product registration information A password may be required for further customer services and other inquiries What should I do if online registration fails Do a screen grab of the window including the error message and email our customer service department A customer service representative will be glad to assist you as soon as possible once the email is correctly received How may register if the purchasing date was longer than one month In this case fill in the registration card and send it via post fax or email to our customer service department and a representative will process the registration for you What is the warranty length for my product A two year FACTORY WARRANTY is offered in which you will have to send the defective product to the closest branch an authorized service site or our headquarters The in store warranty may vary and many require extra charges for various extended warranty policies The company is not being responsible for an in store warranty that exceeds our factory warranty Why should I register this product If you do not register this product the warranty will be counted from the manufacturing date indicated by the seria
182. s Tema ini Cosplay Fee Pri Pon fine A Toi 7 A Baiji CA ELET Comply Range pairi D Paa ding p tali Cel te Yo kaga ba rom M m 7 j AEREI HATE r 9 m ran om d S MM Auo ar Ms s m gm zm E rai ngmmmmm n nWgg DNE I l ai eun tsi nes Fig 3 82 Single Analog Display 53 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Stee ae AFA ob TSn An pni sr Poke be mB Foi Sam TE A STIL Dsnpige Free Drip AP oe Ana ATaM o Tutar i ELET Cena ny reges FDI D Poa ping B Tadma Fig 3 83 Mixed Analog Display Hardware Function Config Hardware Function Configuration It can be used to configure the ZEROPLUS Hardware Functions by users And the selected functions should be written into the Hardware Function Switch Hardware The Function is only available for the LAP B 702000X Hardware Function Switch When the Software detects that multiple Hardware Functions have been written into the Hardware users can switch the function among multiple functions The Function is only available for the LAP B 702000X Export Hardware Configuration File Export Hardware Configuration File The functions written into the Hardware can be exported and used again The Function is only available for the LAP B 702000X 54 FMO7I4A ZP Be Fs Fh AS eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Lt
183. s color shown matches the trace color 6 Trigger Column Trigger Column allows users to adjust signal trigger conditions 7 Filter Column Filter Column allows users to set Bus or signal Filter conditions 8 Display Area Acquired data is displayed as a waveform or in a list format Waveform Display This interface shows the digital signals When the signal is logic 0 the waveform will be displayed as If the signal is logic 1 the waveform is as ___ An unknown signal waveform is displayed in gray between the high and low levels as There are seventy channels in LAP B 70256 LAP B 70256L LAP B 702000 LAP B 702000L LAP B 702000 LAP B 702000X and LAP B 702000Z But when the LAP B 702000 LAP B 702000X and LAP B 702000Z are in the 16 Channel Mode the number of channels will be 16 when the LAP B 702000 LAP B 702000X and LAP B 702000Z are in the 32 Channel Mode the number of channels will be 32 Listing Display This interface shows the digital signals as 1 and 0 Logic 1 is displayed as 1 and logic 0 is displayed as 0 9 Status Area Display Logic Analyzer status The function name is also indicated here 25 FMO7I4A PRE MINER AR S Zeroplus Technology Co Ltd 3 1 Menu amp Tool Bars The Zeroplus Logic Analyzer User s Manual Ver 3 10 Section 3 1 presents detailed information on the eight menu and thirteen tool items shown in the Menu Bar The eight menu items are File Bus Signal
184. s Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 Objective In this chapter troubleshooting is divided into installation software and hardware issues These troubleshooting questions and answers depend not only on our engineers but also on end users such as students engineers technical manual writers and others 5 1 Installation Troubleshooting Q1 Why is there no prompt when insert the driver CD into my CD ROM A At this stage the driver CD is not auto executable The primary issue here is a chipset problem Although these seven Logic Analyzer models seem only different in model number they are quite different in firmware and chipsets Due to installation procedures see Chapter 2 we are unable to compile a driver program that auto detects the chipset at the beginning of the installation Q2 Why does the installation software keep giving an error message saying that don t have enough memory A This kind of problem happens in many hardware installations Turning off multimedia programs such as Media Player media decoders media encoders and so on If there are any multimedia icons in the system tray see the far right end of the START menu taskbar remove them The Logic Analyzer software will run better in memory locations from 64 to 512 MB Q3 What if want to share this software interface with all users of my computer after installing it A The shortcut is removing t
185. s Security 4 Schedlnumbers times and dates Network Connections gt i Help and Support e 4 Sounds and Audio Devices LS Printers and Faxes S Speech 7 Bun m Taskbar and Start Menu sh Stored User Names and Passwords Log Off king E Symantec LiveUpdate 3 System 2 Shut Down ul Taskbar and Start Menu igs Windows Firewall BICI Fig 6 5 Windows Regional and Language Options SW13 Is there a Reset that restores the default color setting for signal output wave forms in the Position Signal Display Area A Yes there is Click Tools from the Menu Bar and select Color Setting click Default However this restores everything in this window You must make a further adjustment if the color setting is the only thing you want to restore See Fig 6 6 Color Setting X D IL LLELELLLELLE ad After the background ts altered corresponding color automatically changes according to the contrast ratio When being printed the r2 background iz white Fig 6 6 Restore Color Default SW14 Can I change the displayed waveform mode A Yes you can There are two ways to do this First go through Data gt Waveform Mode and choose a waveform See Fig 6 7 176 FMO7I4A SW15 Can I change the Signal Display Mode into the Timing mode A P BE THS LIS 2 T3 PR 23 S Zeroplus Technology Co Ltd I Select an Analytic Range ir Noise Filter Ber Bus Width Filter
186. s to use the captured data in the following process There are two formats for selecting Report Form and Pure Data Form See the following picture mBus Output Parameter m Data Format Export Format 77 Export Packet List GE Yes C No Hexadecimal Pure Data Form x Option Pure Data Form r Output Range From Fist Packet To Fina Packet 0 0 v Pop up an export file automatically Z A Fig 3 10 Export Format Pull down Menu In the part of the Export Format when the users select the Report Form the Option button can t be used when users select the Pure Data Form the Option button can be used The Option pops up the Option dialog box as follows where users can customize the export data items in the dialog box which are Packet Name TimeStamp Length and Describe v Length v Describe Fig 3 11 Option Dialog Box For instance all the export options are selected entirely See the below picture SH T Trost p ACK BXE7 D ACK BXFS D REK GX H9 D ACK BX18 D RCK BX2B D PER BX3C 7D REK OX4D D ACK BX5E D REK 29 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 Fig 3 12 Pure Data Form m Capture to File Note C Clipboard C MSPaint Capture Region FullScreen Select Region Selection line color iv opposi
187. t Al Level Active All Level None Active Level 0 Level 2 Level3 Level4 Level5 Level6 Level Level8 Level 9 Level 10 Level 11 Level 12 Level 13 Level 14 Level 15 Trigger Count E Cancel Default Help Fig4 20 Channel Trigger Setup Step 2 Trigger Count Setup Type the numbers or click the pull down menu of the Trigger Count on the Trigger Setup dialog box as shown in Fig 4 21 The system will be triggered where the Trigger Count is set as show in Figs 4 22 4 23 94 FMO7I4A 7A Be A FS BS 5 17 BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du Al Level Active Al Level None Active Trigger Count Default Fig 4 21 Trigger Count Pull down Menu S NL LAP A TAON eiin Later d Eie Bis T geer Runfgp Date Took Werk Heb ala x Demla m A Re be sek i m rums oe o Be Ts ili G GB By 08 0794047 Rn Be BY Ee oM e Haight 30 TrqqgerDolny _ Fonsie I2 z Bom T7 10434u5 Display Pos 855 385u5 A Pas 550 315u5 A TzR5 n315us A Bzi 5 ns Total 1 31072ms Display Range amp y HMM BPos b501 5us B T B50 185us F Comgpr Frate Mo BO 1 tus 24 2 up dE Plot 956 027 bus 1 101007 Las AF AIDS AM AT Lou a A3 AID l8lxi Wb i EMG fe th Page ft ze alla rus Heigh m TriggerDelay A B B us 3 us F Compre Hu Sc
188. t 2000m Temperature 0 40 degrees C This is a Class A product which may cause radio interference in a domestic environment Note EN 61010 1 2001 specify degrees of pollution and their requirements Logic Analyzer falls under Level 2 Pollution refers to addition of foreign matter solid liquid or gaseous ionized gases which may produce a reduction of dielectric strength or surface resistivity Pollution Degree 1 No pollution or only dry non conductive pollution occurs This pollution has no effect Pollution Degree 2 Normally only non conductive pollution occurs Occasionally however temporary conductivity caused by the condensation must be expected Pollution Degree 3 Conductive pollution occurs or dry non conductive pollution which becomes conductive due to the condensation occurs In such conditions the equipment is normally protected against exposure to direct sunlight precipitation and wind but neither temperature nor humidity is controlled Storage Relative Humidity lt 80 Environment Temperature 0 50 degrees C Conclusion After reading this section users should have a basic grasp of the Logic Analyzer A complete understanding of the section Device Maintenance and Safety is a critical prerequisite of any further operation as presented in the User Manual 16 FMO7I4A PRE MIRA f3 ER 23 S Zeroplus Technology Co Ltd 2 Installation 2 1 Software Installation 2 2 Hardware Installatio
189. t Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standard t us Transmission MSB LSB Direction Data Length E bit Min bit M as 32 bit Data Fig4 102 Protocol Analyzer 1 WIRE Configuration dialog box STEP 1 Select Channel 1 WIRE has only one OWIO Select the channel that is to link to the OWIO PROTOCOL ANALYZER 1 WIRE X Fin Assignment Protocol Analyzer Color Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standard us Transmission MSB LSB Direction Data Length E bit Min bit M ax 32 bit Data Min Mae 120 Cancel Default Help Fig4 103 Protocol Analyzer 1 WIRE Channel Setup STEP 2 Set Connect Speed 1 WIRE has two modes Standard 1 us and High 0 2 us The speed setup according to the specifications of the object is to be tested and the default mode is standard 132 FMO7I4A Zeroplus Technology Co Ltd PROTOCOL ANALYZER 1 WIRE x Pin Assignment Protocol Analyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Propert Data d Transmission Direction MSB gt ERE zl Sampling Position ZZ Em Min bit Ml ax 32bit Mie Mas 120 Cancel Default Help Fig4 104 Protocol Analyzer 1 WIRE Connect Speed Setup STEP 3 Set the Transmission Direction Set the Transmission Direction
190. t is 8 bits and 32bits is the maximum PROTOCOL ANALYZER 1 WIRE X Fin Assignment Protocol Analyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standard us Transmission Diregi Data Sampling Position Data Length 0 m ka Min Mas 120 Cancel Default Help Fig4 107 Protocol Analyzer 1 WIRE Data Length Setup 134 FMO7I4A 77 Be Ts Fh Aa a BB 47x ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PREES ANUA VOT ste Protocol Analyzer 1 WIRE Packet Analysis PROTOCOL ANALYZER 1 WIRE ltem Color v NEN v Describe DE Cancel Default Help Fig4 108 Protocol Analyzer 1 WIRE Packet dialog box That is the new View the below View includes several formats that 1 WIRE can happen it describes Data number and Describe difference BUS Packet List E xj Setting Refresh Export Synch Parameter Packet Name TimeStamp Data 1 Busi 1 WIRE 4032363 33 96 30 96 03 90 02 48 B7 FF FF FF FF FF FF 04 00 Packet Name TimeStamp Data 2 Busi 1 WIRE 8065053 33 96 30 96 07 90 00 48 F7 FF FF FF FF FF FF 04 00 Packet Name TimeStamp Data 3 Busi 1 WIRE 12096936 33 96 30 96 03 90 02 48 SF FF FF FF FF FF FF 04 00 Packet Name TimeStamp Data 4 Busi 1l WIRE 16129232 33 96 30 96 03 90 02 48 8F FF FF FF FF FF FF 04 00 Packet Name TimeStamp Data 5 Busi
191. ta of the Address without the background color If it is the first time that the Address has been read we confirm that the data of the packet has been altered Al When users input the Address in this Edit Box and click the Find icon it will go to the corresponding position which is highlighted by the Blue frame STEP 3 Display the Memory Analyzer function in the waveform window Tip The Packet is read the Address is OX6E the Data are 0X25 0X36 0x47 0x58 0x69 and Ox7A in sequence IETTUIDIUUESECUUNUUEEMZSBIEST PiE p Uusisanal Tigger Runjsrop Dete Took window pep alls ioe amp RAS tol Hb FERK v vs ae 200mhz ZEE EE 9e 4 Page 1 Fal mE RB avanza eRe et ee ie A ci r Height m eee ae Nr Font 1 Seale 391 7007920 Display Pos 27 3 90 APOS 130063 T A T2130063 V tal 262144 Display Range tosh 57124 B Pos 130023 A T 135003832 conan Es M Bussin ew Fe A maga asas aae aono maa paaa NOUIS aaee esse sae B pa F Ea F a zx xp jjj IL IU mi m t jl ae Er x ell ror MN MERE nia oe SE a mum Fig4 169 Memory Analyzer Display 166 FMO7I4A PRE MIRA Ro Zeroplus Technology Co Ltd 9 Troubleshooting 5 1 Installation Troubleshooting 5 2 Software Troubleshooting 5 3 Hardware Troubleshooting 167 The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A ZP Be F
192. ta om o 1 o 1 J O j 1 j O j 1 o 1 pj 100s Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data o 1 j L3 1 1 o 1 j 100m Ready The Packet List has setup windows users can set up the parameters according to their requirements Setting Bus Packet Length in the following dialog box is only used for doing Bus Statistics Users can define how long the time is as a data packet in order to add the export function See the following figure 104 FMO7I4A BERE SE AS 977 BR 73 a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd USUS SEES du setting 5 x Data Format Binary Bus Select WBS 1 Bus Decimal f DecimalSigned Hexadecimal ASCII Bus Packet Length ions Min 10ns Max z 48us Packet Item v Packet V Mame M Timestamp Length Data Text G C Text Color Auto Cancel Default Help Fig 4 41 Packet List Setting Tip Customize Protocol Analyzer Packet Length When Packet List deals with data packets of those modules which are in single data unit however this Packet is not convenient for users to observe we need to add a function of customizing Packet Idle which allows users to input an idle time as users requirements When the packet is displayed the program will decide which data should be put in the same packet according to the input time And users can observe the packet better
193. te Bus Signal EI Porta Group 0 Bus Signal Level Q Fitter 0 710 888 8514 amp 95 s speek x ry YY YY YY ese 4 A00 sc DX dem 4 A01 M ba A03 In g M Fig 3 150 An Example for Auto Close Auto Close With the cursor in the channel when users try to drag a Bar the Bar will stop at the approaching edge of the channel High Edge or Low Edge Tip In the above example when dragging the A Bar the A Bar will stop at the Low Edge of A02 76 FMO7I4A ZP Be Fs Fh Aa BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 UULUUU UH LI JL ILILI LL pae Fig 3 151 Gridlines Show Gridline The gridline will be displayed in the waveform display TT Fig 3 152 Tooltips Show Tooltip Leave the mouse over an icon or a waveform and the description will be shown Show the T Bar in the middle area Show the T Bar in the middle of the Waveform Display Area after triggering Check for Update The Logic Analyzer software will automatically check for updates when being started Default All the settings of the Common Setup will return to the initial settings TI FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 3 5 Auto Save To save captured data for a long time users can use icons on the tool bar box or the m
194. te of color im Note text color Cancel Fig 3 13 Capture Window This feature is equivalent to Alt Print Screen or Print Screen Capture to File Save the captured image as either a jpeg or bmp Clipboard Copy the captured image to the clipboard for use in other applications MSPaint Directly start MSPaint to view the captured image Capture Window CtrHC ici Capture Region Full Screen Capture everything on the screen Select Region After pressing the capture button a cross hair will appear on the screen Left click the mouse button to drag an area to capture Select Line Color Click the color box to change the color Opposite of Color Click this check box to ensure that the note text will be the opposite of the line color Color of the Note Choose the color of the note text Note Type in a note to attach to the captured image Capture Click the button to capture the image Cancel Click Cancel to end the capture Chineser5i Chineset Tr v English Fig 3 14 Choose among Chinese Simplified Si Chinese Traditional Tr and English Language j x A Switching language needs to restart the program to take effect please save the douments If the document is not modified this operational ignore Fig 3 15 When changing languages the above screen will be displayed and the program will need to be restarted Print eee Printer Name SLU
195. the selected channel in the Bus Signal column 7EROPLUS Logic Analyzer X AN Do vau want to delete the channel Cancel Fig3 111 Delete the selected channel in the Bus Signal column ZEROPLUS Logic Analyzer x A All the Buses and channels will be deleted Da you want to continue Fig 3 112 Delete all the Buses and channels in the Bus Signal column ZEROPLUS Logic Analyzer l x PN All the Buses and channels will restore to the default Do you want to continue i Cancel Fig3 113 Restore the deleted Buses and channels in the Bus Signal column P Find Data value Ctrl F FA Find Pulse Width i30 To b Place k Add Bar lr Zoom E omy Hand H ry Mormal Esc Show all Data F10 eo Previous soam Ghr 2 Data Format waveform Mode b Color Bus Data Golar Bus Single Data Golor Fig3 114 Right key Menu on the waveform Area 62 FMO7I4A Place A Bar Place B Bar Place DS Bar Place Dp Bar Place More The Right key menu on the waveform area adds the function of Place Ds Bar and Place Dp Bar However the functions are only used after the Ds and Dp Bars are activated otherwise they will be disabled These functions are the same as those of A Bar When the mouse is stopped at a special position click the right key on the mouse select the Place Ds Bar or Place Dp Bar the Ds or Dp Bar will move to the special position For example open Select an A
196. ther Edge Reset Fig 4 27 Trigger Menu Task 6 Run to Acquire Data Step 1 Single Run Click the Single Run gt icon from the Tool Bar or press START button on top of Logic Analyzer or press F5 or click Single Run from Run Stop of the Menu Bar then activate the signal from the DUT to the Logic Analyzer to acquire the data shown in the waveform display area Step 2 Repetitive Run Click the Repetitive Run icon from the Tool Bar or click Repetitive Run from Run Stop of the Menu Bar activate continuous signal to the Logic Analyzer to acquire the continuous data and then click the Stop icon to end the repetitive run Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms 7 ZERDPLUS LAP BCTOZODU M S B 000000 0000 Labor Il xl AGE ile mesa Trigger Runiutep Data Took widow pb 7 l8 xJ Oe Sm BB Nf ze mee e om 70K je 99 E z E uu k ik 02850 pons e RIZ RE BY Te o P Ge on Height s Tigger Deisy TT RE P RO D HUP Em JUDA UU JUD UU LU LUUD cud xg gu UU UU UU UU UU EXER PLLA er x iad o EMEN Fig 4 28 Click amp icon to view all Data Step 3 Stop Click the Stop icon to end the Run Tip If the status is Waiting with no signal output as shown in Fig 4 29 click the Stop icon to end the Run Check the setup again and try the Run process again 977 FMO7I4A Z
197. this function Data Contrast we provide the SDK Development Tool for users Users can customize the Data Contrast Interface according to their requirements We have packed the Data Contrast UI as the GUI DLL and designed an interface which is used for the communication between the GUI DLL and Main Program The GUI adopts the Non modal Interface design which can make the GUI Interface and Main Program Interface switch freely When users activate the Data Contrast function the software will search whether there is a GUI DLL or not then it can judge whether there is a user defined Interface If there is a user defined Interface the GUI DLL will take effect if there isn t the embedded Data Contrast Interface will be activated Image Interface 159 FMO7I4A BEL SE AS 977 BR 43 a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd PSEUD SORS due Fig 4 155 Tool Bar dm The former data contrast LaS Select the channel in the contrast file and then click the button to find the former data contrast as a result the contrasted result is displayed in the center position of the waveform area mls The next data contrast a Select the channel in the contrast file and then click the button to find the next data contrast at last the contrasted result is displayed in the center position of the waveform area Operating Instructions 1 Select the channel AOO in the contrast file to find the differences the first difference is displ
198. tice We will not have additional notice for you when there is any modification of the User Manual If there is some unconformity caused by the software version upgrade users should take the software as the standard 4 FMO7I4A Pe THSLR 2 ARA i Zeroplus Technology Co Ltd 1 Features of Zeroplus Logic Analyzer 1 1 1 2 1 3 1 4 1 5 Package Contents Introduction Hardware Specifications oystem Requirements Device Maintenance and Safety The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual Ver 3 10 Objective In this chapter users will learn about the package contents description hardware specifications system requirements and safety issues of the Zeroplus Logic Analyzer Although this chapter is purely informative we highly recommend reading this carefully to ensure safety and accuracy when performing any operation with the Zeroplus Logic Analyzer 1 1 Package Contents Verify the package contents before discarding packing materials The following components should be included in your product For assistance please contact our nearest distributor Table 1 1 Parts List for Retail Packages LAP B 70256 LAP B 702000 l prg LAP B 70256L LAP B 702000L LAP B 702000 LAP B 702000Z LAP B 702000X LogicAnalyzer Logic Analyzer USB Cable XT2PCS X72PCS XT2PCS XT2PCS XT2PCS A B C D
199. ting Color Setting i x Workaround W avefarm Mame F Relating Color avetorm BackGround List Background 1 List Background 2 Cursor Grid Unknow Line Default Bus Bus Test List T ext Time Text Signal Filter Bar Bus Error Baas Errar T aok 4 4 All LEELEEELLL LLL AI Y Y TYTTTT1 n After the background is altered comesponding color automatically changes according to the contrast ratio Preview When being printed the iv background iz white Fig 3 155 Workaround and Waveform Setting Workaround Color The workaround color of the Logic Analyzer and the text Workaround Waveform Name Relating Color s E E E sl E E C NOE E eset E a E a E E o E Ea E Ems E E o E M Fig 3 156 Workaround Color Menu Waveform BackGround The Logic Analyzer s waveform Viewer Background Color List Background 1 The Logic Analyzer s First Listing Viewer Background Color List Background 2 The Logic Analyzer s Second Listing Viewer Background Color All optional items include the current color of all Buses Signals Cursors Grids Unknown Lines Default Bus Bus Text List Text and Time List users can scroll the vertical wheel to view the selectable items Bus Error Users can configure the color of Bus Error Data from the Color Setting Dialog Box Bus Error Text Users can configure the color of Bus Error Text from the Color Setting Dialog Box Relating When
200. ulse and Master RX Presence Pulse 2 Then Master releases Protocol Analyzer and enters the RX mode Through high pull resistor Protocol Analyzer 1 WIRE is pulled back to the high status 3 Then Master detects a rising edge from the Data Line when every slave will wait for a period of time epi standard speed 15 60us high speed 2 6us and send back a Presence Pulse to Master PDL standard speed 60 240us high speed 8 24us 4 Finally the Protocol Analyzer 1 WIRE will be pulled back to the high status through the resistor 128 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 5 Meanwhile Master can detect any online Slave 6 From Fig4 100 the low count Reset Pulse and Presence Pulse signals can be clearly seen m 1 af e DR Pai Rg a num nal a nt p s ie gt 1 00 V M 100s Chi X aaay Figure 2a You can clearly see the negative going reset and the presence pulse Fig4 96 Reset Presence Detect Sequence 2 Write Data 1 To initialize Write Data Master will convert the Data Line from the high logic to the low 2 There are two types of Write time slot Write 1 Time Slot and Write O Time Slot 3 During a write cycle all Write time slots must have duration of at least 60us and a recovery period of 1us When the I O line goes down Slave devices create samples from 15 60 us A Write 0 If the sampling is low 0 is generated as in
201. ult Channels Format Ror Rename Fig 3 107 Right key Menu Lj W re mw Pe m urn ze sis Page 1 AT eek be wee Wege a Tagger l Derim Fas Der APIs Ades F AT MR Derme Praga ee PAX HIP dr B T ber Reverse ran Tip This function of Reverse is used to PEE EP LPA aF oe M E ed reverse the collected signal Change the rris map na High Level into the Low Level change MMEA onim ANEETA i m P Espeon the Low Level into the High Level The n EEEE tom Ainai i Faia Te its ai s Reverse of Waveform Mode displays 29 217 EIC ee om with the dashed so it is easy to MEM H eT distinguish es sm oom ya im is cms Hugs Cru gs P F Fig3 108 Reverse Function Displayed in the Waveform Window Add Channel x Channel on Cancel Fig 3 109 Add the required channel in the Bus Signal column Add Channel 61 FMO7I4A Copy Channel Delete Channel Delete All Channels Restore Default Channels Right key Menu on the Waveform Area Tip The functions of the right key menu on the waveform area are similar to those of the Data menu The menu adds the functions such as Place Ds and Dp Add Bar in the waveform display area ZP Be ts FH ha i BB 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 ZEROPLUS Logic Analyzer X AN Do vau want to copy the channel 7 Cancel Fig 3 110 Copy
202. us 90112us 1 35168ms I ET si X 3 Channels Setup NITUCTOMPIEITE I M M M E RPP ENEWVENENUENHEESHENSENHENSEA Y AA A EA AA EA E AEA EAA EAE EA EAE AEA AEAEE PP v Reserve waveform data and show them Ok Cancel Help Fig 4 32 Channels Setup Window Tip Channels Setup In the dialog box of Channels Setup there isn t only Add Bus Signal but also Delete Bus Signal Delete All Default functions provided 1 Delete Bus Signal Firstly highlight the Bus or channels on Area 6 of Fig 4 32 then click Delete Bus Signal to delete them 2 Delete All Click Delete All to delete all Bus signals on Area 6 of Fig 4 32 3 Default Click Default to restore the dialog box of Channels Setup as shown in Fig 4 30 Step 3 Trigger Condition setup 1 Highlight the Bus which will be triggered then click icon or select Bus Trigger Setup from the Trigger of the Menu Bar the dialog box shown in Fig 4 33 will appear Bus Trigger C Binary C Decimal C Decimall Signed Hexadecimal C ASCII Cancel Default Help Fig 4 33 Bus Trigger Setup Tip Single click on the trigger column of the Bus as shown in Fig 4 34 100 FMO7I4A BE t S BS 98 E 47x ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 Buz Signal Single Click an the Left Key A3 A03 m Ad 04 Fig 4 34 Bus Trigger Column 2 Set
203. us Close Bus Item Find Min Value Max Value Bus Item in Value Max Value oo rrr rrrr Statistics 0 Statistics 0 ps 66 P Be Fs Fh AS BBR al The Zeroplus Logic Analyzer User s Manual Ver 3 10 FMO7I4A PERAR AS BBR al ae Zeroplus Logic Analyzer sers Manual Ver 3 10 Zeroplus Technology Co Ltd Fig 3 129 Waveform Find Dialog Box of the Bus Item of the SPI Signal Step 4 Choose the position to start the search by selecting one of the following Start At Ds T A B C End At Dp A B C etc Then click Next or Previous to search it When Found Choose a Bar to mark the result A B C etc Step 5 Click Statistics to show the number of instances of the search results Note Itis available only when searching through a Bus i H T ZEROPLUS LAP B 702000 S N 000000 0000 LaDoc1 AR Eile Bus Signal Trigger n Data Tools Window Help ar B Te Bar F le el A B 128 999KHz 7 Compr Rate No APos 7 532us v B Pos 120ns v Display Pos 7 632us Display Range 7 652us Scale 1 25GHz A T 131 027KHz 7 Total 16 384us 5 8 F 8 333MHz v 7 628us 7 624us 7 62us A 7 61 Bus Men 9 m M 62 5MHz xi 7 648us f 544us 7 64us 7 636us E me 62 5MH Waveform find Activate the Function of Chain Data Find B ignal Name Bes N
204. us Trigger Setup Channel Trigger Setup Tip The trigger action tells the Logic Analyzer when sending data to the PC The trigger conditions determine when the trigger point starts to record the information Tips External Trigger Glitch Enable External Trigger Glitch Activate the first group external trigger It includes four selections which are EXT TriggerO EXT Trigger 1 EXT Trigger 2 and EXT TriggerO Enable Two Trigger In Activate the second group external trigger It includes four selections which are EXT TriggerO EXT Trigger 1 EXT Trigger 2 and EXT Trigger1 When you start it you can start the logic operation with the first one group Trigger Out Enable Set the output trigger condition There is an output point for the hardware and it can be selected by the software three selections are When Trigger Condition START and STOP From LAP B Trigger Out Sync It can PBERHSIHO SIR A Al Zeroplus Technology Co Ltd Detail Menu amp Dialog Box Bus Trigger x Feeseseeeeeeeeeeeseseeoreesses Data Format C Binary C Decimal C Decimal Signed Hexadecimal ASCII Cancel Default Help Fig 3 31 Set Bus Trigger ns See Section 4 1 and 4 2 for detailed instructio Chaat EC xj FS niera f nager rata Tt T Tt T Tt T T T T Led T T T T 1 T T Level 14 B Oo Lr oO Lr oD o o n Li n Li Oo Li Oo oO
205. us1 Sl Previous Close Please key in a chain of data with a comma to compart them For example 0x32 0x45 0X50 0X66 It needs to add the packet name in the Protocol Analyzer For example ADDRESS 0X2A DATA 0X20 x 0X1 0 2 0 3 Start At End t When Found Statistics Ds Dp v A Statistics Address 1006 fo Fig3 49 Waveform Find Dialog Box with Activating the Function of Chain Data Find Tip The function of Chain Data Find is mainly for finding the data in the packets of Bus and Protocol Analyzer which have some serial data For example it can start finding with the serial packet segments there are 0X01 0X02 and 0X03 in the Bus It improves the efficiency of Data Find See the following process x F Activate the function of Chain Data Find Bus Signal Name Bust Next Previous Close Bus Item Find Min Value Max Value pata o F Start At End t When Found Statistics Address 990 0 Waveform find JV Activate the Function of Chain Data Find Bus Signal Name Bust Next Previous Close Please key in a chain of data with a comma to compart them for example 0 32 0 45 0 50 0 66 It needs to add the packet name in the Protocol Analyzer for example ADDRESS 0 24 DATA 0x20 Start At End At When Found Statistics Ds v Dp A Statistics Address 990 To Waveform find v Activate the Function of Chain Dat
206. users can input the corresponding value of the width to be filtered in the right edit box Input the time value of the width when the display is in the Time Display or the Frequency Display and the unit is based on time such as s ms us etc if the inputted value is out of the range it will switch to the best time value in range Input the clock value of the width when the display is in the Sampling Site Display and the range of the input is from 1 to 65535 For example after activating this function and then input the value 5ns The Bus Data which is less than or equal to 5ns will be filtered as the figure below x a Contrast Files Basic File LaDoci X Contrast File LaDoci r Contrast Beginning Point Error Tolerance TBar None Y C Beginning of Data Contrast Result Error Stat x Data Contrast Roll the contrast waveforms synchronization Pin Assignment Display files the contrast differences Display Files horizontal Perform Contrast v Do contrast automatically when being run Close Help Fig3 47 Data Contrast Settings Contrast the difference of data It is used for contrasting the difference between two signal files of the same style One is the Basic File the other is the Contrast File which can display the difference from the Basic File Tavefora Find Activate the Function of Chain Data Find Bus Signal Name
207. users select one item to change the color of the item and users want to change other items into the same color users 79 FMO7I4A ZP Be Fs Fh Aa eB BR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 can select other items at the same time then the selected items will be changed into the same color So it is convenient for users to change many items into the same color once After the background is altered corresponding color automatically change according to the contrast ratio When users set the color for the workaround and have selected the option the system will switch other colors automatically to become the contrast color When being printed Background is white When being printed the background color is white Waveform Change the color of the Buses or signals on the waveform area Color Setting X Workaround Waveform Mame F Relating Color Linewidth A E 1 pixel Ap L 1 pixel AU 1 pixel ALS E 1 pixel AL pixel A05 1 pixel UB 1 pel UY E 1 pixel 405 E 1 pixel A H 1 pixel ATU 1 pixel A171 pixel A1 E X 1 pixel A13 E E 1 pixel Add r 1 nivel d 4 H Cancel Default Help Fig 3 157 Waveform Color Menu Waveform Color The channel color can be varied by users Linewidth The Linewidth can be adjusted from the pull down menu there are three options which are 1pixel 2pixel and 3pixel 80 FMO7I4A ZB BBETIHSBSO BB 4x
208. vzer Analog Waveform k Hardware Function Config Hardware Function Switch Export Hardware Configuration File Fig4 55 Set Bus Property Ig4 56 Bus Property STEP 2 Click the Right Key on the Bus Signal column and then select Bus Property Tip The signal must be grouped into Bus or the Bus Property cannot have effect 109 FMO7I4A 7A BETIS he ie R43 S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 gu Bus Property SEGUE hla GUS Loopy Channel Delete Channel Fig4 57 Click Right key to set Bus Property 4 5 1 Bus Analysis The Bus Analysis function enables the system to analyze the Bus Basic Setup for the Bus STEP 1 Click Bus Property the following dialog box will appear Parameters Tonig er ZEROPLLIS L CAN 2 06 MODULE v1 32 000 NOT i ZEROPLUS L HOQ MODULE v2 07 OD c NOT ZEROPLUS L I2C MODULE v2 02 006 C MU1 ZEROPLLIS L SPI MODULE v1 13 000 C7 N01 i ZEROPLUS L UART MODULE 2 13 0007 M01 i ZEROPLUS L LISB1 1 MODULE v1 62 000 CM01 JY use the Ens DE Fig4 58 Bus Setting 110 FMO7I4A BERE S BS 98 E 4 ml The Zeroplus Logic Analyzer Zeroplus Technology Co L td User s Manual Ver 3 10 STEP 2 Click Color Configuration to set Bus Data Color Bus Property I xj Color Config Activate the Latch function Ana Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters
209. which has set the high level on the Filter Condition of the signal A01 Only the high status of the A01 waveform is displayed Step 5 Filter Delay Setup 1 Click on the Activate Filter Delay as shown in Fig 4 141 2 Click on the Accord ing to Filter Condition or the Opposite of Filter Condition to select the waveforms to be kept 3 Click on the Start Edge End Edge or Period Delay to set the Start Point of Filter Delay 4 Type the value of the Delay Time into the column of the Delay Time 5 Click OK then click Run to activate the signal from the tested circuit to the Logic Analyzer 6 The result will be displayed in the waveform display area as shown in Fig 4 141 Step 6 Stop Signal Filter Filter Delay Click Stop then click Signal Filter Setup and select Cancel from the Signal Filter Setup dialog box to stop the Signal Filter or the Filter Delay Setup Tip Click Stop to check the conditions of the Signal Filter or the Filter Delay setup if there aren t any results Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms 154 FMO7I4A SRR AMOR AN The Zeroplus Logic Analyzer User s Manual Ver 3 10 Filter Delay Setup vw Activate Filter Delay Select Filter Delay Mode Select Delay Stark Point Start Edge According to Filter Condition End Edge C Opposite of Filter Condition C Start Edge or End Edge C Period Delay Display Bar Setup Max
210. zer CAN 2 0B Required No of Channels Signal Frequency Not fixed around 12MHz 13MHz and 19 2MHz Appropriate Sampling Rate 100MHz Same Data Time Per Bit Name of Syn Signals CAN 2 0B Data Verification Point Low signals gt 190us convert to High signals gt 40us 3 Protocol Analyzer IO Description The main signal source of transmission data Signal is opposite to the signal source of transmission data 4 Protocol Analyzer Electrical Specifications Parameter LogieutHioh 25 v Jo Legiemuttow O05 JV S CAN 2 0B Frame Specification 142 FMO7I4A 7A Be Ft FS he ie BBR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual Ver 3 10 CAN 2 0B can separate frames as follows Data Frame Remote Transmit Request Frame Error Frame Overload Frame Because CAN 2 0B is transmitted by the format of difference signals the signal can separate into CANL and CANH and the signal direction of CANH is opposite to that of CANL next we analyze CAN2 0B signal with the standard of CANL Basic Data Frame Data frame can be divided into Basic CAN and Peli CAN Data Frame of Basic CAN transmission As follows message data can be separated into Start of Frame SOB Arbitration Field Control Field Data Field CRC Field Ack Field End of Frame Fig4 121 Basic Data Frame Start of Frame Every Start of Frame must be 0 which means asking far data to come back Arbitration F
211. zer Trigger Setup Bus Trigger X Bus Trigger Protocol Analyzer Trigger fv Allow Protocol Analyzer Trigger Protocol Analyzer Protocol Packet Value p Data Farmat C Binary Decimal C Decimal Signed Hexadecimal ASCII Cancel Default Help Fig4 17 Protocol Analyzer Trigger Allow Protocol Analyzer Trigger When it is selected the Protocol Analyzer Trigger function is activated And then users can set Protocol Analyzer Protocol Packet Value and Data Format Protocol Analyzer It only displays the name of the Protocol Analyzer and only one name can be selected Protocol Packet It is displayed according to the data in every Protocol Analyzer Value The value needs to be entered in the frame and the Data Format can be selected according to users requirements the default is Hexadecimal When a value can be entered in the selected Protocol Analyzer data the frame can be used Or the frame will be disabled For example Protocol Analyzer I2C when the Protocol Packet is Data the frame can be used To the contrary when Start of the Protocol Packet is selected the frame is disabled Data Format The displayed Data Format can be selected There are five options Binary Decimal Decimal Signed Hexadecimal and ASCII Step 3 Trigger Mark Setup To find the item in the Bus better users can activate Trigger Mark function after starting Bus Trigger The Trigger Mark is shown with T Bar according to the number

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