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C505L-4EM CB

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1. When ERTC 1 RTINT should not be set to 00h Valid input at XTAL3 must be ensured before RTC is started RTC 3 RTC count inaccuracy The RTC does not count 100 accurately within the specified range 4 25 lt Vpp lt 5 5 although it counts fairly consistently at each Vpp The percentage error may vary slightly from device to device depending on board layout operational voltage Vpp capacitance and type of crystal used in the XTAL3 XTAL4 external clock circuitry The following values are obtained using our evaluation board and actual errors may vary on another board At Vpp 5V error 0 26 in 5120s using C3 68pF C4 48pF when the microcontroller is in power down mode At Vpp 5V error 1 29 in 4800s when the microcontroller is in normal operational mode Workaround None However to reduce count inaccuracy ensure optimal board layout to minimise noise at XTAL3 Use crystal of good consistency and accuracy and a suitable combination of capacitance in the XTAL3 XTAL4 clock circuitry recommended values are C3 68pF C4 33pF or C3 68pF C4 47pF Note that better accuracy can be achieved at lower Vpp minimum specified 4 25V WDT 1 Watchdog Timer is not halted in idle mode The Watchdog Timer WDT is not halted in the idle mode as defined However during the idle mode an overflow condition of the WDT does not initiate an internal reset In such a case the WDT starts a new count sequence Workaround 1 Do not use the WDT functio
2. by software The following is a software workaround in C fee initialisations PCON1 RTINT 0x set RTC interrupt value necessary only if wakeup from power down by RTC is required RTCR 0x00 set RTC reload value to 0 DAC0 0x set LCD contrast LCON 0x01 LCD initialisation use sys clk LCRL 0x84 LCRH 0xec LCD is started tides codes for LCD LCON 0x03 LCD use RTC clock LCRL 0x2e no visible side effects even though LCRL amp LCRH are changed later amp LCRH 0x80 while LCD is running I if wakeup from pd IS via RTC interrupt this line of code must be just before power down is entered RTCON 0x03 start RTC running allow pd wakeup via RTC IN PCON 0x02 power down enabled PCON 0x40 power down entered Afterpd Wakeup can be initiated by either RTC interrupt or external interrupt The following is executed after return from power down wakeup interrupt LCON 0x01 LCD use sys clk again on wakeup from pd LCRL 0x84 LCRH 0xec Errata Sheet C505L 4EM Step CB Release 1 0 HR 20f5 RTC 1 When RTINT 00h IRTC is set even when there is no input at XTAL3 Conditions are RTINT 00h RTC interrupt enable bit ERTC 1 and RTC is started Interrupt flag bit IRTC is set even when there is no input at XTAL3 If power down is entered and wakeup via RTC interrupt has been enabled wakeup will occur immediately since the IRTC flag is set which may be undesirable Workaround
3. e Infineon tec hnologie Microcontrollers Errata Sheet 12 November 2001 Release 1 0 Device C505L 4EM Stepping Code Marking CB Package P MQFP 80 This Errata Sheet describes the deviations from the current user documentation The classification and numbering system is module oriented in a continual ascending sequence over several derivatives as well already solved deviations are included So gaps inside this enumeration could occur The current documentation is C505L User s Manual 11 99 C505L Data Sheet 06 99 Instruction Set Manual 07 00 Note Devices marked with EES or ES are engineering samples which may not be completely tested in all functional and electrical characteristics therefore they should be used for evaluation only The specific test conditions for EES and ES are documented in a separate Status Sheet Errata Sheet C505L 4EM Step CB Release 1 0 HR 1 of 5 Functional Problems LCD 3 LCD display glitches occasionally at higher Voo when clocked by RTC clock At higher Vpp the LCD may occasionally display some weird characters when clocked by the RTC clock at XTAL3 Workaround To avoid the display glitches from becoming apparent clock the LCD with the system clock If it is required for the LCD to display when the microcontroller is in power down mode LCD must be clocked by RTC clock in this mode the clock input to LCD can be dynamically switched between system clock and RTC
4. ended OTP 1 OTP module may fail under special conditions leading to undefined CB operation AC DC Deviations AC DC Short Description Fixed Deviation ADC TUE is 3 LSB ft l Vpp is valid for a smaller range than specified on documents Li Application Support Group Singapore Errata Sheet C505L 4EM Step CB Release 1 0 HR 5 of 5
5. n in combination with the idle mode Errata Sheet C505L 4EM Step CB Release 1 0 HR 3 of 5 2 In case of WDT is running before entry into idle mode to avoid a WDT initiated reset upon exit of the idle mode the following methods can be used A The WDT is refreshed immediately upon exit from idle mode B A timed interrupt can be used to exit the idle mode before the WDT reaches the counter state 7FFCh This can be achieved by using Timer 0 1 or 2 This timer can be programmed to generate an interrupt at a WDT counter state prior to overflow for e g at 7FOOh Prior to entering idle mode the WDT can be refreshed and the timer 0 1or 2 can be started immediately to synchronize the WDT In the interrupt service routine of the Timer 0 1 or 2 the WDT must be refreshed If required idle mode could be entered again SWPD 1 Triggering of Software Power Down SWPD wake up immediately after SWPD entry via external interrupt on a frequent basis is not recommended When the micro controller is running at frequencies lower than 10MHz and the external wake up from SWPD occurs very soon e g lt 200ms after entering this mode and this happens on a regular basis the internal clock may still be valid when the wake up trigger occurs In this rare case the micro controller may get confused with its state and program execution becomes unpredictable Workaround In applications running at 10MHz or below that enters and exits the SWPD m
6. ode on a frequent basis it is recommended to enter Slow Down mode before Power Down mode entry On SWPD wake up the first instruction in the interrupt routine at 07bH should disable Slow Down mode This method would only cause an insignificant delay in the range of us and would ensure specified behavior of the micro controller Note that when Slow Down mode has been entered there is no longer a minimum time requirement before SWPD external wake up is triggered Deviation from Electrical and Timing Specification DC 3 ADC TUE is 3 LSB The total unadjusted error of the A D converter module is 3 LSB instead of 2 LSB specified DC 4 Vo is valid for a smaller range than specified on documents Vpn is valid in the range from 4 5V to 5 5V at all specified temperatures instead of 4 25V to 5 5V as specified on the documents This smaller range is effective on devices with date code starting from 0116 Errata Sheet C505L 4EM Step CB Release 1 0 HR 40f5 History List since last CPU Step ES CA Functional Problems Functional Short Description Fixed Problem LCD 3 LCD display glitches occasionally at higher Vpp when clocked by RTC clock eo RTC 1 When RTINT 00h IRTC is set even when there is no input at XTAL3 RTC 3 RTC count inaccuracy wor i Watchdog Timer is nothaltedinidlemode Triggering of Software Power Down SWPD wake up immediately o l SWPD entry via external interrupt on a frequent basis is not recomm

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