Narrow Band Filter Implementation On A Low Cost
Contents
1. p D 432 5 aurceCade sD 5 2 poir Gene Td OF x Cancel Help The code for float2Qpoint h is shown below Function Protoyptes for Floating point to 0 fixed point conversion routines fdefine bitzero b n 00001l fdefine bitone bn oc non0n0l0 fdefine bittwo fdefine bitthree OhOOOOLOOO fdefine bit four b d ng0l0 0 0 0 fdefine bitfive ObOOLOOOOO Fdefine bitsix ObOLOOOOOO fdetfine bitseven bl n g gn 0 represent number from to 2 ified Decimal place is between bits and 7 ren x x x x ae ff cil i642 iral 2 8 f20516 25052 f2 64 tied unsigned char FloatTol float float to Sbit Q7 Number Q can represent number from 2 to z l 64 of Decimal place is between bits 5 and 6 ff Sl el al El xl x x x of re 1 21 58 2 26 unsigned char FloatTo 6 floati float to Shit Number The code for float2Qpoint c is given below include lt math h gt include float2Qpoint h convert float to 8bit Q7 Number Q7 can represent number from 1 to 1 1 128 Decimal place is between bits 6 and 7 s x x x x x x 1 1 2 1 4 1 8 1 16 1 32 1 64 1 128 unsigned char FloatToQ7 float fpval unsigned char charval 0 if fpval 0 charval charval bitseve2. include lt megal63 h gt include lt delay h gt include float2Qpoint h define PWM1DCReg OCRIAL char 1 x2 yO yl y2 Filter State Variables Filter State Variables are of Q7 form Q7 can represent number from 1 to 1 1 128 Decimal place is between bits 6 and 7 s x x x x x 7 111 2 1 4 1 8 1 16 1 32 1 64 1 128 char x0 x0 is a filter state variable that is used to copy the 16bit a d value it 1s right shifted 8 bits and type cast to char to allow multlipication in filter algorithm char b0 b1 b2 a1 a2 Filter Coefficients Filter Coefficients are of Q6 form Q6 can represent number from 2 to 2 1 64 Decimal place is between bits 5 and 6 s x x U xn 2 1 11 2 1 4 1 8 1 16 1 32 1 64 int yOtemp Temporary 16 bit filter accumulation Filter multiply accumulate result Variable is Q13 form Q13 can represent number from 4 to 4 1 8192 Decimal place 1s between bits 13 and 14 s x x x x x x x xix x x define ADC VREF TYPE 0x20 Read the 8 most semnificative bits of the ADC conversion result unsigned char read adc unsigned char input 1 ADMUX adc input ADC VREF TYPE ADCSR 6 1 while ADCSR 4 0 ADCSR 4 1 return ADCW return ADCH Timer 2 output compare interrupt service routine interrupt TIM2 COMP void timer
3. CH d dB Hanning The input frequency was adjusted in a lower direction until the output was 3db from the maximum at 1 02KHz The following frequency plot shows that the lower 3dB corner occurs at 810 Hz Tek Pile Armed Pos 810 0Hz MATH Operation M LL E A wn o Wt GUNS TREN are ba FFT e 040404040404 dc C 957 NI NS tts a LN EAS 50 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 1 oS oS 4 4 4 4 4 4 4 4 4 4 4 XE EAS 504 404 4 NS B 4 4 4 4 4 4 4 4 4 4 S NS Bl o oS oS 4 4 4 4 4 4 4 4 4 4 4 4 S XE Window 504040404 Bl BRL gs o on oS oS OOOH Hanning The input frequency was adjusted in an upper direction until the output was 3db from the maximum at 1 02KHz The following frequency plot shows that the upper 3dB corner occurs at 24K Hz L Tek Armed Post 1 240kHz MATH I L 5 Operation Wg PR op ane I re FFT a ts a a ts iE n 2 Ne 552 04 RS Xx UELLE EM RS LM OR i 78
4. E E MEE EL M C x 4 ccu E x c 2 2 E EISE Cc a E AE c curo cu M c E wes 7 H a L dl ms E NN 0 M M x 7 7 75 cuu Mu IEEE Tas 5 04 AILES NN UU Window Hanning 41 4 4 4 4 4 4 41 4 4 NN EU be al 67 s a s TN FFT Zaarm 67 s 1 Hanni anning Overall the digital filter performed as expected There were slight discrepancies in the center frequency and filter bandwidth resulting from the quantized filter coefficients variety of tradeoffs were made throughout the design The ATmegal63 only operates to SMHz This system clock dictated the maximum PWM fundamental frequency The maximum PWM frequency in conjunction with the analog LPF s transition bandwidth and maximum sampling rate dictated the maximum bandwidth signal that could possible reconstructed The sampling rate was limited by the speed at which the interrupt service routine containing the input sampling filter in place and output update code could run Initially with floating point filter coefficients this loop rate was around 6 7KHz After the filter was converted to fixed point the loop rate achievable increased to 13 15K Hz In general the limiting factors are 1 The analog outp
5. Read Analog Channel 0 Port A PIN 1 on the STK500 x0 read adc 0 Assuming that the input signal ranges from digital 0 to 255 we must subtract off half the scale to eliminate the dc offset 0 x0 0x80 Filter Multiply and accumulate to Q13 Number y0Otemp int al y1 int a2 y2 int b0 x0 int b1 x1 int b2 x2 5 6 Strip off a Q7 from 013 y0 char yOtemp gt gt 6 Update state variables y2 yl yl yO 2 x1 x0 Update PWM output compare register OCRIAL y0 0x80 Initialize all variables directly above the code Global enable interrupts asm sei as follows Initialize Filter State Variables x0 x1l x2 y0 2 0 Set Filter Coefficients The arguments of FloatToQ6 are second order narrow band digital filter coefficients which may be changed as desired to meet design requirements b0 FloatToQ6 0 109375 b1 FloatToQ6 0 0 b2 FloatToQ6 0 109375 al FloatToQ6 1 453125 a2 FloatToQ6 0 812500 Under Project gt Configure on the CodeVisionAVR main menu add the following two files to the project as shown below 1 float2Qpoint c 2 float2Qpoint h 2 3 4 F B 9 10 11 12 13 14 15 16 14 18 13 20 21 22 23 24 23 26 4 Configure Project MB prj Files C Compiler After Make D evavrhuserfiles MB pr E i 43235 5
6. nS a a 5 54 4 ULM 4 44085 MNA 54 4 4 4 4 4 44 4040404 4 4 84 MX Window RUNE ccn annin E Zoom 51 E a E 25 0065 Hanning The input frequency was set beyond the upper 3db to 2KHz Just below the analog filter corner frequency The following 2KHz frequency plot is shown below Tek Miles E Auto Pos 2 000kHz MATH s a a ts 2 Operation a a s M Macc RM T FFT a a ts ts s ms a a s s WR E 4 DERI 4 m1 i Mo 2 QN Moo CN CN UMS UNS VA XL a UNI CUR UNION T 2 A 2 NN MEM TEC MEL ICE NM ML EET M IE DX E I UE ME E MM I UM UE ELI ML UE ALME ILE ELM Window Hanning TELE NE MIEL 4 II MA 1 A a T CH2 10 0dE 10 0658 Hanning The input frequency was set below the lower 3db to 500Hz The following 500Hz frequency plot is shown below Tek Pi p Ready Pas SUL UHz MATH 2 Operation in E UT TEN nen ee FFT in
7. UI EL RE FFT Os POE i iP P P i Poi P i Poi i i Poi i poi i i o i o BE Poi EE P i Poi E go i Gi i i i i i i i i o i DA Rp A CUNT URGE x E sers x M MO Glo XS xu n queo omoes xD URS EI OUS WEE NE ME NE dl i endow AE NEP E now E FFT Zoom CH 10 098 0 Hanning This plot shows the PWM fundamental frequency at 31 25 KHz and the first harmonic at 2 f The PWM output is low pass filtered at lt lt fpy to attenuate the high frequency contributions from the raw square wave signal while passing lower frequency components obtained by the pulse width modulation The low pass filtered PWM signal without digital filter input is shown below d L p rig 01 E Operation MM EM d ME FFT M E NE A ae vue i s wd nM nica M cx CMM IM MU 3 s i x Ce EE E iP P i EE i i P i d Poi i i ER EE i i ico o i iP i i i i i i P i d ioi i i i d ioi iP i i EM qM E ME M AE ELM E cu uou EN LE ES a S z AE D M ML PE TE NEL LE UM M ES M S NL UNE 2 MEL LEM E ME S M CE CEA MN ME E HE M M NES UN NES KE EAS NS ER 6 5 xe ctc ue t Iia cuc FFT Zaam x oon Hanning It is worth noting that the PWM
8. Tr Tr Equate the coefficients with the general second order digital infinite impulse response filter 0127 222 H z EE EU E EUR 8 2G dee 4 T y q bl 0 4 2p r mp d 04 2 qe i 9 4 4 Prewarping 20 7 1 27 The bilinear transform does not produce perfectly linear relationship between analog and digital frequencies especially for higher frequencies 2 e7 5 joa T 1x e z e fa zl Therefore in order to design for a center frequency fd and bandwidth fd max fd min similar to that of the analog filter the digital filter coefficients must be calculated with f0 fa and B Ba fa max fa min jaa Unity gain desired at center frequency AzfaG Haj 20 znba4jzm 167 fa G 167 fa 2 fa Difference Equation yln aly n 1 a2y n 2 bOx n blx n 1 b2x n 2 5 2 Fixed Point Representation To more accurately construct the digital filter floating point data and coefficient values should be used However there 15 significant processor overhead required to perform floating point calculations Floating point overhead limits the effective sampling rate of the filter because interrupt service routine ISR takes extra time to execute thus lowering the highest possible ISR execution rate To improve mathematical throughput and i
9. e Possibility to insert assembler code directly the C source file VERY EFFICIENT USE OF RAM Constant character strings are stored only in FLASH memory and aren t copied to RAM like in other compilers for the AVR LLIDLDLDDUOCLU Source level debugging with COFF symbol file generation allows variable watching and the use of the Terminal I O Atmel s AVR Studio 3 22 Debugger Fully compatible with Atmel s In Circuit Emulators Supported chips ATtiny22 9052313 9052323 2343 9052333 4433 9054414 8515 9054434 8535 9058534 ATmega603 103 ATmega161 ATmega163 ATmega32A FPSLIC AT94K10 20 40 e Supplementary libraries for Alphanumeric LCD modules for up to 4x40 characters Philips IC Bus National Semiconductor LM75 Temperature Sensor Dallas 051621 Thermometer Thermostat Philips PCF8563 and PCF8583 Real Time Clocks Dallas 051302 and 051307 Real Time Clocks Dallas 1 Wire protocol Dallas D81820 DS1822 Temperature Sensors SPI Power management Delays e Built in CodeWizardAVR Automatic Program Generator allows you to write in a matter of minutes all the code needed for implementing the following functions External memory access setup Chip reset source identification Input Output Port initialization External Interrupts initialization Timers Counters initialization Watchdog Timer initialization UART initialization and interrupt driven buffered serial communication with the following parameters
10. 3000 4000 5000 6000 Frequency Hz Phase degrees 0 1000 2000 3000 4000 5000 6000 Frequency Hz There may also be fixed point errors that are induced in the phase of the filtered signal 6 Performance Tradeoffs Conclusion Overall the filter performed as expected The system was run with a sinusoid from a signal generator as an input The filter output signal was monitored with an oscilloscope with an integrated spectrum analyzer The following plots show the filter response at various input frequencies In order to characterize the filter the sinusoidal frequency was swept from 0 02 Hz up to 2 5K Hz while observing the filtered output At low frequencies the digital filter attenuated At high frequencies still less than the PWM output analog LPF the digital filter attenuated It was observed that the filter output was a maximum at 1 02KHz input The frequency plot of the system output at 1 02KHz is shown below after reconstruction filter Maximum digital filter output Tek E a Armed Pas 1 020kHz MATH z Operation EE eee ee ee E FFT i v a MAE EM DE A c Ic c xxx ccu Mc M E E E 4050444 4 4 4 4 4 X XEM 4054 444 4 4 MX XE 4 4 4 4 4 4 4 4 4 MC Window Hanning cr xxx uuu WE EI 114 dg ede 5 HAS o o e o 1 5 e dire 6 e oe FFT Zoom
11. 4 References CodeVisionAVR V1 01 6 User Manual Rev H 1998 2001 HP InfoTech S R L ATMEL ATmegal63 ATmegal63L Data Sheets Advance Information Rev 1142B 11 00 Atmel Corporation 2000 AVR STK500 User Guide http courses engr wisc edu ecow get ece 432 professorm homework ece432h3 pdf
12. ATmega163L 0 8 MHz ATmega163 The datasheet for the ATmegal63 is included with this cd Further feature specifications are available by following this link to the Atmel datasheet The processor block diagram follows below Block Diagram PAD PA7 PCO PCT DATA REGISTER DATA DIR DATA REGISTER DATA DIR PORTA REG PORTA PORTC REG PORTC 8 BIT DATA BUS AVEC T OSCILLATOR AGND 2 WIRE SERIAL ATAL AREF INTERFACE Hi INTERNAL E XTAL2 PROGRAM STACK WATCHDOG TIMING AND COUNTER POINTER TIMER CONTROL PROGRAM 252 MCU CONTROL i FLASH REGISTER INSTRUCTION GENERAL TIMER REGISTER PURPOSE COUNTERS REGISTERS DECODER N CONTROL LINES CALIBRATED OSCILLATOB DATA REGISTER DATA DIR DATA REGIST DATA DIR PORTB REG PORTB PORTD REG PORTD PORTB DRIVERS PORTD DRIVERS ANALOG COMPARATOR eeepc erc eccl PBO PB PDO POY For additional information follow this link to an Atmel Corporation internal AVR training Power Point presentation located on the accompanying CD 3 Development Systems 3 Hardware Atmel STK500 Starter Kit The Atmel STK500 15 a complete starter kit and development system for the AVR Flash microcontroller from Atmel Corporation It is manufactured and sold by Atmel for the purposes of part evaluation and prototype development The entire STK500 users guide can be found on this ed by
13. Automatic Program Generator 3 fltbfxpt c http infotech ir ro 18 unsigned char FloatToQ float convert float Global Variab e mail dhptechn8ir ro hpinfotech mail com 19 3 FO Functions 20 06 can represent number from 2 to 2 1 64 B Warnings 10 Project Filter 21 Decimal place is between bits 5 and 6 float2qpoint c 11 Version 1 0 ES s xi xi xi x x x Global Variab 12 Date 4 27 2001 23 9 0 Functions 13 Autkor Erick L Oberstar M S E E candidate 24 2 1 1 2 1 4 2 8 1 16 1 32 1 64 D 3i Other Files 14 Michael J Bauch B S E E candidate 25 unsigned char FloatToQ6 float convert float i float2qpointh 15 Company University of Wisconsin Madison 26 16 1513 Univ Ave Madison WI 53706 Global Variab i 17 Comments This application uses and ATmegali 63 to Functions m 4 18 implement a 2nd order digital filter 19 20 Chip type ATmegai63L C ME CVAVR DSPFilter float 21 Clock frequency 8 000000 MHz 25 22 Memory model Small 2b 2 1 1 2 1 4 1 8 1 16 1 32 1 64 23 Internal SRAM size 1024 27 24 External SRAM size 0 28 unsigned char FloatToQ6 float fpval 25 Data Stack size 256 29 26 Xxx x Eee eee ee eee eee eee eee exe 30 char charval 0 27 31 28 include megali63 h 32 29 includ
14. Fixed Point Effects Fixed point representation effects several areas of the filter design response Since the filter coefficients are represented by 8 bit Q7 and Q6 fixed point format the coefficients can only have quantum values The worst case 8 bit Q7 coefficients can be off by 1 256 The worst case 8 bit Q6 coefficients can be off by 1 128 As the center frequency or bandwidth of the filter are lowered the fixed point effects on the filter coefficients become more pronounced Below is a Matlab plot showing a IKHz center frequency 500Hz bandwidth band pass filter who s frequency response was generated using floating point coefficients Figure No 1 Floating Point 1KHz 500Hz BW Band Pass Filter Ele Edit View Insert Tools Window Help JD SH SIR AAS 922 20 Magnitude dB 0 1000 2000 3000 4000 5000 6000 Frequency Hz Phase degrees 0 1000 2000 3000 4000 5000 6000 Frequency Hz Below is a Matlab plot showing a center frequency 500Hz bandwidth band pass filter who s frequency response was generated using the fixed point coefficients closest to the designed floating point filter coefficients There are three apparent effects amplitude scaling a slight shift in center frequency and a slight difference in the filter s bandwidth Figure No 2 Fixed Point 1KHz 500Hz BW Band Pass Filter Ele Edit View Insert Tools Window Help JD SMS 2 2 20 20 Magnitude dB 0 1000 2000
15. following this link The features for the STK500 listed below are from the AVR STK500 User Manual Features AVR Studio e Compatible RS232 Interface to PC for Programming and Control Regulated Power Supply for 10 15V DC Power Sockets for 8 pin 20 pin 28 pin and 40 pin AVR Devices Parallel and Serial High voltage Programming of AVR Parts Serial In System Programming ISP of AVR Parts In System Programmer for Programming AVR Parts in External Target System Reprogramming of AVR Parts 8 Push Buttons for General Use 8 LEDs for General Use AVR I O Ports Easily Accessible through Pin Header Connectors Additional RS232 Port for General Use Expansion Connectors for Plug in Modules and Prototyping Area On board 2 Mbit DataFlash e for Nonvolatile Data Storage AVR Studio version 3 2 or newer supports the STK500 For up to date information on this and other AVR tool products please read the document avrtools pdf AVR Studio Users Guide The newest version of AVR Studio avrtools pdf and the user guide can be found in the AVR section of the Atmel Web site 3 2 Software Development System Software was developed using a pair of applications Application source code was developed using a third party C compiler called CodeVisionAVR CVAVR Source code debugging was performed using Atmel s Integrated Development Environment IDE called AVR Studio The hardware platform was programmed from the
16. output filter attenuates the fundamental 22dB which corresponds to the expected attenuation because the plot is a power spectrum measurement rather than a voltage or current spectrum 4 3 Sampling Rate The system utilized one of the counter timers with interrupt support on the Atmegal63 for deterministic input signal sampling input signal filtering and output signal updating Counter Timer 2 was configured to use the full 8 MHz system clock in an output compare mode with the output disconnected The timer was configured to clear itself and generate an interrupt on a compare match The Timer 2 compare register was loaded with a hex value that results in a 12 048 KHz interrupt rate with an 8 MHz system clock 5 DSP 5 Filter Design In order to build a narrow band digital filter start with a simple second order continuous time band pass filter H s 86 _ s s0 s 50 As a narrow band approximation B lt lt f0 place the poles as shown below 50 zb j27f 0 509 j2af 0 where B Desired Band Width based on 3dB attenuation f0 Desired Center frequency G scale factor to control over all filter gain H s _ r s s s0 50 S050 Let p S0 s0 2 7B Let q SO s0 4 0 sG 8 S ps cq Next apply the bilinear transform 2 1 z T sampling interval GG 2 2 4 2p aj T 1 2 d d px T A 1 T 2 wr 4 2 AT
17. pi Ba q pi 2 Ba 2 4 pi 2 fa 2 b0 2 G T A T 2 2 p T q bl 0 b2 b0 al 2 q 8 T 2 A T 2 2 p T q a2 A T 2 2 p T 4 2 2 p T yl 0 2 0 xl 0 x2 0 N 1000 Number of Samples f 1000 Frequency of Sine Wave 0 1 t n fs x sin 2 pi f n fs for k 1 N 1 y k al yl a2 y2 bO x k b1 x1 b2 x2 2 yl y k 2 x x k end plot t x hold on plot t y r Frequency Response figure 2 H W S freqz bO b1 b2 1 al a2 1024 fs S xunits hz freqzplot H W S From float2q6 m Written By Erick L Oberstar University of Wisconsin Madison oberstar cae wisc edu copywright 2001 function y float2q6 x y 00000000 if x 0 1 1 X 2 abs x end if x gt 1 y 2 1 if gt 1 2 3 1 if x gt 1 16 y 6 1 x x 1 16 end if x gt 1 32 7 1 x x 1 32 end if x gt 1 64 y 8 1 x x 1 64 end From q6FilterFreqResp2 m This is used to plot the frequency response of a Q6 fixed point quantized FIR filter Written By Erick L Oberstar copywright 2001 o1 KHz 500 HZ BW Bandpass Filter figure 1 deal Coefficients from nbfilter m b0 0 11603539655267 bl 0 b2 0 11603539655267 al 1 51959288821994 a2 0 76989749559855 num b0 b1 b2 de
18. 2 comp i1sr void i Place your code here unsigned int input input variable contains return from read adc input read adc 0 read ad ch 0 PWMIDCReg input gt gt 8 Read Analog Ch 0 amp subtract half scale to remove offset x0 read adc 0 0 0 0 80 Subtract off DC offset yOtemp int al yl 1nt a2 y2 int b0 xO int b1 x1 int b2 x2 Filter Multiply and accumulate to Q13 Number y0 char yO0temp gt gt 6 shift states y2 yl yl y0 2 xl xl 0 PWMIDCReg y0 0x80 Add back DC offset and Update PWM register PORTB PORTB Toggle output port to allow measurement of ISR Sampling Rate Declare your global variables here void main void Declare your local variables here Input Output Ports initialization Port A PORTA 0x00 DDRA 0x00 Port B PORTB 0x00 DDRB OxFF output for debugging Port C PORTC 0x00 DDRC 0x00 switch input for debugging Port D PORTD 0x00 DDRD 0x20 Timer Counter 0 initialization Clock source System Clock Clock value Timer 0 Stopped Mode Output Compare OCO output Disconnected TCCRO 0x00 TCNT0 0x00 Timer Counter 1 initialization Clock source System Clock Clock value 8000 000 kHz Mode 8 bit Pulse Width Modulation output Non Inv OCIB output Discon PWM output frequency 15 doubled Noise Canceler Off In
19. 267 al FloatToQ6 1 51959288821994 a2 FloatToQ6 0 76989749559855 2KHz filter b0 FloatToQ6 0 04956754656797 b1 FloatToQ6 0 0 b2 FloatToQ6 0 04956754656797 al FloatToQ6 0 95473001076082 a2 FloatToQ6 0 90091007200971 Global enable interrupts Ztasm sei Place your code here while 1 t Place your code here End of Main While Loop End of void Main 7 2 Matlab Souce Code From nbfilter m close all clear all hold off Digital Filter On Micro controller Project ATmegal63L Atmel 8 Bit AVR Written By Michael J Bauch copywright 2001 y n al y n 1 a2 y n 2 bO x n bl x n 1 b2 x n 2 lt y gt lt gt lt 2 gt lt x gt xl lt 2 gt Narrow band digital filter fd 1000 Desired digital filter center frequency Hz fs 22 05 10 3 Sampling rate samples sec T l fs Sampling interval seconds Bd 200 Desired digital filter band width Hz Added by elo fd 1000 Desired digital filter center frequency Hz fs 12048 Sampling rate samples sec T 1 6 sampling interval seconds Bd 500 Desired digital filter band width Hz added by elo end Prewarping fa tan pi fd T pi T famin tan pi fd Bd 2 T pi T famax tan pi fd Bd 2 T pi T Ba famax famin G Ba 2 fa sqrt pi 2 Ba 2 16 1 72 Digital Filter Coefficients 2
20. 7N2 7E1 701 8N1 8N2 8E1 and 801 Analog Comparator initialization Q ADC initialization Q SPI Interface initialization Bus LM75 Temperature Sensor 051621 Thermometer Thermostat PCF8563 PCF8583 DS1302 and DS1307 Real Time Clocks initialization 1 Wire Bus and 051820 051822 Temperature Sensors initialization LCD module initialization e Built in Serial Communication Terminal for debugging RS232 RS422 RS485 e Built in In System AVR Chip Programmer compatible with the Atmel STK500 Kanda Systems STK200 and STK300 development boards Vogel Elektronic VTEC ISP Dontronics DT006 with automatic programming after successful compilation Supported chips 9051200 ATtiny12 15L 22 9052313 9052323 2343 9052333 4433 9054414 8515 9054434 8535 ATmega603 103 ATmega161 ATmega163 ATmega32A DOOCOD A screen grab of the compiler is shown below GodeVisionAWVR filter prj E Bl X File Edit Project Tools Settings Windows Help o e z 9 Los MAS CrNMENCVAVR DSPFilter fltbfxpt c lol Bic MeE CVAvR DsPFilter float CodeVisionAVR 4 E xi xi xi x x x Project filter 5 Copyright 1998 2001 1B Notes B Pavel Haiduc HP InfoTech S R L i 17 1 2 2 2 4 2 8 2 26 1 32 1 64 1 128 8
21. CVAVR compiler IDE using the AVR Studio programmer 3 2 1 CodeVisionAVR CVAVR C Compiler CodeVisionAVR is a third party compiler targeted at the Atmel AVR line of RISC microcontrollers It is build by HP InfoTech a Romanian one man company CVAVR is used for source code development A list of CVAVR features copied from the HP InfoTech website http infotech ir ro is included below Features e 32 bit application runs under Windows 95 98 NT 4 0 and 2000 Easy to use Integrated Development Environment and C Compiler e Editor with auto indentation and keywords highlighting e Supported data types bit char int short long float double e AVR specific extensions for Accessing the EEPROM amp FLASH memory areas Bit level access to I O registers Interrupt support e Compiler optimizations Peep hole optimizer Advanced variables to register allocator allows very efficient use of the AVR architecture Block Soubroutine Packing replaces repetitive code sequences with calls to subroutines Loop optimization Branch optimization Subroutine call optimization Cross jumping optimization Constant folding otore copy optimization Dead code removing optimization Two memory models TINY 8 bit data pointers for chips with up to 256 bytes of RAM and SMALL 16 bit data pointers for chips with more than 256 bytes of RAM for better code efficiency a User selectable optimization for Size or Speed
22. Narrow Band Filter Implementation On A Low Cost Microcontroller Issues and Performance 2001 Erick L Oberstar Michael J Bauch Table of Contents l 2 Project Summary Atmel AVR Summary Development Systems 3 1 Hardware Atmel STK500 Starter Kit 220 software Development Systems 3 21 CodeVision AVR C Compiler 3 22 Atmel AVR Studio Assembler Debugger system Configuration 4 Analog Input 4 2 Analog Output 4 3 sampling Rate DSP 5 1 Filter Design J2 Fixed Point Representation 523 Fixed Point Effects Performance Tradeoffs Conclusion Appendix 7 1 C Souce File 7 2 Matlab Souce Files 7 3 DSP on an AVR Lab Procedure 7 4 Referenced Materials 1 Project Summary The purpose of this project was to investigate the issues relating to the implementation of a digital filter on a low cost microcontroller platform rather than an expensive and special purpose Digital Signal Processor DSP system particular a 1IKHz center frequency 500 Hz bandwidth narrow band filter was implemented Issues relating to sampling rate fixed point mathematics and signal reconstruction were observed and investigated Overall system performance was also observed 2 Atmel AVR Summary Atmel s AVR microcontrollers have a RISC core running single cycle instructions and a well defined I O structure that limits the need for external components Internal oscillators timers UART SPI pull up resis
23. OTRST 0 C BB1 0 BO2 1 811 0 12 1 C B01 0 B020 C BII 0B12 0 BO0TSZ1 0 01 1 02 0 C 11 1 B12 0 Check Signature Check Erasure Preserve EEPROM I Verify x Cancel Help 8 Under Project gt Configure gt C Comiler on the CodeVisionAVR main menu be sure that Promote Char to int and Char is unsigned are both unchecked Configure Project example Files Compiler After Make SRAM Chip B3 Data Stack size 256 bytes Internal SRAM size 1024 bytes Clock 8 000000 A MHz External SRAM size o bytes LIART Etena SRSM Wait State Initialize Baud Rate B aud 3600 Memory Made C Tiny Small Compilation Bit Yanables size 16 Global ttdefine Enhanced Instr Automatic Register Allocation Use an External Startup Initialization File Enable Warnings Optimize fo Stack End Markers v Size File Output COFF ROM Speed Use the Terminal 1 0 in AWA Studio 9 Make the Project and Program the Chip Testing 1 Apply 0 5V Signal Attach SIGNAL to PORTA PIN 1 on the STK500 Attach GROUND to the GND PIN on the STK500 2 Build an analog low pass filter to attenuate all harmonics of the PWM in an attempt to reconstruct the digitally filtered signal PORTD PIN 5 Filtered Sig STK500 Output GROUND Ground 150 0 C 47 uF Corner Freq 2257 5 Hz 7
24. amming In System Programmable Flash Memory 16K Bytes with Optional Boot Block 256 2K Bytes Endurance 1 000 Write Erase Cycles Boot Section Allows Reprogramming of Program Code without External Programmer Optional Boot Code Section with Independent Lock Bits 512 Bytes EEPROM Endurance 100 000 Write Erase Cycles 1024 Bytes Internal SRAM Programming Lock for Software Security Peripheral Features Two 8 bit Timer Counters with Separate Prescaler and Compare Mode One 16 bit Timer Counter with Separate Prescaler Compare Mode and Capture Mode Real Time Clock with Separate Oscillator and Counter Mode Three PWM Channels 8 channel 10 bit ADC Byte oriented 2 wire Serial Interface Programmable Serial UART Master Slave SPI Serial Interface Programmable Watchdog Timer with Separate On chip Oscillator Analog Comparator Special Microcontroller Features Power on Reset and Programmable Brown out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Four Sleep Modes Idle ADC Noise Reduction Power Save and Power Down Power Consumption at 4 MHz 3 0V 25 Active 5 0 mA Idle Mode 1 9 mA Power down Mode 1 pA and Packages 32 Programmable Lines 40 pin PDIP and 44 pin TQFP Operating Voltages 2 7 5 5V ATmega163L 4 0 5 5V ATmega163 Speed Grades 0 4MHz
25. e lt delay h gt 33 if 1 lt 0 0 30 include float2Qpoint h 34 4 35 charval charval bitseven 32 36 fpval 2 0 fabsi fpval 4 gt 4 Ell Messages STK500 Detecting STK500 found on COM2 Reading FLASH input file OK Setting device parameters serial programming mode OK Entering programming mode OK Programming FLASH using block mode Reading FLASH using block mode OK FLASH contents is equal to file OK Programming fuses OxFFDF OK Daadina tuona NyEENE Insert The full manual for the CVAVR compiler can be found on the accompanying CD 3 2 2 Atmel AVR Studio AVR Studio 15 Win32 application built by Atmel to provide an IDE for assembly language code generation and simulation It also provides an interface to Atmel s STK500 AVR Flash MCU Starter Kit for part programming and hardware testing For the purpose of this project AVR Studio was used primarily for C level source code simulation debugging The AVR Studio IDE can be used to step through code watch variables and stimulate registers as well as I O pins in both assembly and C A screen shot of the AVR Studio IDE in a C source level debugging configuration is shown below AVR Studio fitbfxpt__ c File Edit Project Debug Breakpoints Trace amp triggers Watch Options View Tools Window Help als agoen oh 2 amp LO P 0 9 6 2 o
26. lash and EEPROM memory of the AVR ISP programming requires only Vcc GND RESET and three signal lines for programming STK500 User Guide 3 8 Software Configuration 1 Open CodeVisionAVR C Compiler 2 Creat a New Project using CodeWizardAVR 3 Select the Chip and the Clock as shown in Figure 1 t CodeWwizardAVR untitled File Help Ek CodewizardAVR untitled cwp UART Analog Comparator ADC SPI Ic wire 2 Wine 20 wie 2 Wine 20 UART Analog Comparator ADC 5 1 LCD Bit Banged Project Information LCD Bit Banged Project Information Chip Ports External IRG Timers Chip Ports External IR Timers Data Direction Fullup Llutput Value Clock 2 000000 MHz Bit Bit2 Bit 2 Check Reset Source Bit3 Bit 3 Bt4 Oo Bit5 O Bite T Figure 1 Chip and Clock Select Bit T Bit Figure 2 Port D Configuration 4 Set Data Direction Bits 4 and 5 of PORTD to Output as shown in Figure 2 e Bit 5 will be used for a non inverting PWM output and Bit 4 could be used for an inverting PWM output 5 Set the ADC Analog to Digital Converter options as shown in Figure 3 e ADC clock at IMHz is slow enough to give 8 bit resolution according to the 163 Data Sheet p 98 e ADC clock at IMHz is fast enough so that its frequency is g
27. ll be Clock Value Compare where the Compare value The sampling rate may be updated in program by assigning the desired The Clear Timer 2 on Compare match option resets the counter to 0 after its The Compare Match IRQ option designates a source code segment in which e Timer 2 clock will dictate the Sampling Rate ATMEGA 163 Data Sheet p 44 50 e is given in hexidecimal e Caution The compare value must be between 0 and 255 In the case shown the Sampling Rate will be 12 048 kHz Compare value to OCR2 Output Compare Resister value matches the compare value of OCR2 the interrupt service routine must be placed Caution The interrupt service routine must fit within the sampling interval t LodeWizardAVH untitled cwp File Help UART Analog Comparator ADC SPI IC wie 2wienzc LCE Bit Banged Project Information Chip Ports External IAG Timers Timer 0 Timer 1 Timer 2 watchdog Clock Source System Clack Clock Value 1000 000 Mode Output Compare Output Disconnected H Clear Timer 2 on Compare Match Overflow IR Compare Match IRG Timer Value J0 h Compare 53 h Figure 5 Timer2 Sampling Rate t LodeWizardAVH untitled cwp File Help IC wie 2 Wine 20 UART Analog Comparator ADC SPI Chip Ports External IR Timers LCD Bit Banged Project Information Project Mame MamwBand 002505 Ve
28. lue Type Address xO v4 char 0 char Declare your global variables here x2 0 char BEG 0 00 5 char REG void main void char 0 char REG Declare your local variables here in scopa 7 2 T 7033 Ti 1 4 14 Watch Watch3 Watch4 Simulator 163 Ln 230 Col NUM 2 The entire AVR Studio User Guide can be found on the accompanying CD 4 System Configuration 4 Analog Input The ATmegal63 features a 10 bit successive approximation analog to digital converter Timer Counter Interrupt Mask Register TIMSK There are two modes of operation 1 Free Running 2 Single Conversion In Single Converstion Mode each conversion must be initiated by the user In Free Running Mode the ADC is constantly sampling and updating the ADC Data Register The fifth bit of the ADCSR register selects between these modes Any pin of PortA may be chosen as the ADC input via multiplexer ADC supports single ended conversion between 0 and 5 volts The conversion time ranges between 65 and 260 micro seconds The ADC may operate up to 15kSPS at maximum resolution and up to 76kSPS at 8 bit resolution The successive approximation circuitry requires an input clock frequency that may be chosen from pre scaled system clock values in the ADC module According to ATmegal63 Data Sheet p 98 the ADC clock must be less than
29. m fitbfxpt__ c xli 1 Genrer ADCSR 6 1 ajf Name Value Location a while ADCSR 4 0 2 9 Timer Counterl ADCSR 4 1 m Timer Counter 0 2 return ADCW 0009 Timer Counter 0x00 x2C return ADCH Bw Interrupt Mask PRD 0x38 bit 5 4 3 2 Interrupt Flag R 3 sv Control Registh ae eae ee B Control Regist PE EFT T 0x2E bit 7 53 Timer 2 output compare interrupt service routine i Compare A High 0x00 interrupt TIM2 COMP void timer2 comp isr void NM Compare A Low 0x00 0x2A 19 Compare B High 0x29 Place your code here Compare 2 Eo Input Capture 0x27 009 Input Capture L 0x25 unsigned int input input variable contains return PSRID E 0x30 bit 0 input read read ad ch 0 8 9 Timer Counter2 A PWM1DCReg input 58 Watchdog EEPROM Port Port B Port C Port D Read Analog Ch 0 amp subtract half scale to remove offs i read 0 xO xO 0x80 Shift right 8 bits to align correct A D 9 105 6 48 10 yOtemp int al yl int a2 y2 int bO x0 int bl x 9 89 SPI Interface yO char yOtemp gt gt 6 89 UART Interface 2 9 89 TWI Serial Inte shift states y2 yl yl y0 x2 xl xU PWMIDCReg yO 0x80 Update PWM register me Ar ad Va
30. n 1 al a2 fs 12048 n 256 Number of points in frequency response freqz num den n fs figure 2 fixed point effect on filter 125 0 11603539655267 bl 0 b2 125 0 11603539655267 al 1 515625 1 51959288821994 2 765625 0 76989749559855 b0 0 109375 b2 0 109375 al 1 453125 a2 0 812500 2 828125 num 60 b1 b2 den 1 al a2 fs 12048 n 256 Number of points in frequency response freqz num den n fs Vo h f freqz num den n fs Vofreqzplot h f 7 3 DSP on an AVR Lab Procedure Lab Microcontroller Narrow Band Digital Filter Implementation Materials STK500 Board Resistor 150 Ohm 2 163 Chip Capacitor 47 micro Farad 2 CodeVisionAVR C Compiler ATMEL AVR Studio 3 22 8MHz Crystal Oscillator 1 2 3 4 Hardware Configuration Place the ATMEGA163 chip in the STK500 Socket SKT3100A3 e be sure that only one AVR device is inserted in the sockets at a time e be sure that the notch on the chip matches the notch on the socket Connect the ISP6PIN header to the red SPROG3 target ISP header with the 6 wire cable arrow on the connector points toward pinl e the cable should not be twisted Place the 8MHz crystal oscillator in the crystal socket Position the OSCSEL Oscillator Select jumper across pins 2 and 3 SP In System Programming uses the AVR internal SPI serial peripheral interface to download code into the F
31. n j return convert float to 8bit 06 Number Q6 can represent number from 2 to 2 1 64 Decimal place is between bits 5 and 6 s x x x x x x x EA 2 111 211 4 1 8 1 16 1 32 1 64 unsigned char FloatToQ6 float fpval char charval 0 if fpval 0 0 1 charval charval bitseven 2 0 fabs fpval if fpval gt 1 0 1 charval charval bitsix fpval fpval 1 0 if fpval gt 1 0 2 0 1 charval charval bitfive fpval fpval 1 0 2 0 if fpval gt 1 0 4 0 charval charval bitfour fpval fpval 1 0 4 0 if fpval gt 1 0 8 0 charval charval bitthree fpval fpval 1 0 8 0 j if fpval gt 1 0 16 0 charval charval bittwo fpval fpval 1 0 16 0 j if fpval gt 1 0 32 0 charval charval bitone fpval fpval 1 0 32 0 if fpval gt 1 0 64 0 charval charval bitzero fpval fpval 1 0 64 0 return charval 1 end of unsigned char FloatToQ6 float fpval 7 Under Project gt Configure on the CodeVisionAVR main menu choose to automatically program the chip After Make 4 Configure Project mikeb pr Files C Compiler Alter Make Chip Frogramming Option FLASH Lack Bits Fuse Bit s No Protection CKSELO 0 CKSEL1 0 CKSEL2 0 Programming and Verification disabled CKSEL3 0 Programming disabled SES BODEN 0 6 01 1 02 1 11 1 12 1 BO
32. ncrease the ISR execution rate 1 e increase sampling rate calculations are performed using two s complement signed fixed point representations Q7 and Q6 8 bit fixed point representations for input samples and filter coefficients respectively were chosen because the low cost microcontroller selected is natively 8 bit Q7 numbers represent fixed point numbers ranging from 1 to 0 9921875 in increments 0 0078125 1 to 1 1 128 The 8 bit Q7 number bit weighting 1s shown below The decimal place 15 between bits 6 and 7 Input samples in a Q7 format 1 1 2 1 4 1 8 1 16 1 32 1 64 1 128 Eight bit Q6 numbers can represent fixed point numbers ranging from 2 to 1 984375 in increments 0 015625 2 to 2 1 64 The Q6 representation bit weighting is shown below The decimal place is between bits 5 and 6 Filter coefficients are in a Q6 format SARKA S X 2 1 1 2 1 4 1 8 1 16 1 32 1 64 When a Q7 and Q6 number are multiplied both 8 bit numbers the result is a 16 bit Q13 number Q13 numbers range from 4 to 3 9998779296875 in increments of 0 0001220703125 4 to 4 1 8192 The 13 representation bit weighting 15 shown below 5 x x x x x x x x 1 4 2 11 1 2 11 4 Ix x x Ix 1 8192 The 16 bit Q13 number 15 scaled back to a Q7 representation for the digital filter s output This Q7 number is contained in the bit just left
33. of the decimal place and the seven bits just below the decimal place These Q7 bits are extracted by shifting the 16 bit Q13 number right six bits and selecting only the low byte of the 16 bit value The resulting 8 bit Q7 number 15 shown below isix ix xi 41211 1172 14 x x x x x x x x 1 8192 8 bit Q7 A critical detail is that the 8 bit Q7 amp Q6 numbers must be a signed data type C This 15 important because when a product of a Q7 amp number 15 calculated the 8 bit values must be sign extended to 16 bits to do the multiplication correctly A point of caution The CodeVision compiler contains switches to make char data types unsigned by default as well as to allow automatic promotion of char types to int See the below project configuration block showing these switches and the correct settings 4 Configure Project filter prj x Files C Compiler After Make SRAM Chip ATmegal B3L Data Stack size ebb bytes Internal SRAM size 1024 bytes Clock 8 000000 WA MHZ External SRAM size fo bytes UART Extermal State Initialize Baud Rate Baud 8500 Promote charto int charis unsignac wG adi Automatic Register Allocation Use an External Startup Initialization File Enable Warnings Stack End Markers File Cutout Formats CoFF EEF Use the Terminal l O in AYR Studia 5 3
34. or equal to IMHz to provide 8 bit resolution A worse case conversion rate is 25 ADC clock cycles The conversion time must obviously be shorter than the sampling interval to produce relevant digital values So 25 times the ADC clock period must be less than the sampling period or equivalently the ADC clock frequency must be 25 times greater than the sampling rate For a 12 048 kHz sampling rate the ADC clock frequency must be greater than approximately 3012 MHz An ADC clock frequency of IMHz satisfies the upper boundary of the preceding paragraph and the lower boundary just mentioned 4 2 Analog Output Pulse Width Modulation A common and inexpensive D A converter can be implemented using a PWM digital output and a simple inexpensive analog filter full application note AN538 written by Microchip Technology describing PWM and the key issues regarding it is found on the accompanying CD The principle concept of PWM is to vary the duty cycle of a square wave at some fundamental frequency This PWM square wave is then low pass filtered at a corner frequency much less than the fundamental frequency of the square wave to pass output signals up to the corner frequency For the Atmel ATmegal63 Timer 1 was configured for PWM generation Timer 1 on the Atmegal63 is a 16 bit counter timer that can count at full system clock speed a prescaled value of the system clock or an external input clock When configured in PWM mode Timer 1 has
35. put Capture on Falling Edge TCCR1A 0x91 TCCR1B 0x09 TCNT1H 0x00 TCNT1L 0x00 OCR1AH 0x00 OCR1AL 0x00 OCR1BH 0x00 OCR1BL 0x00 Timer Counter 2 initialization Clock source System Clock Clock value 1000 000 kHz Mode Output Compare OC2 output Disconnected Timer Counter 2 is cleared on compare match TCCR2 0x0A ASSR 0x00 TCNT2 0x00 OCR2 0x53 External Interrupt s initialization INTO Off INT1 Off GIMSK 0x00 MCUCR 0x00 Timer s Counter s Interrupt s initialization TIMSK 0x80 Analog Comparator initialization Analog Comparator Off Analog Comparator Input Capture by Timer Counter 1 Off ACSR 0x80 SFIOR 0x00 ADC initialization ADC Clock frequency 1000 000 kHz ADC Voltage Reference AREF pin Only the 8 most semnificative bits of the ADC conversion result are used ADMUX ADC_VREF TYPE ADCSR 0x83 For IMHz A D ClockFreq ADCSR 0x81 For AMhz A D ClockFreq x0 xl x2 y0 2 0 Initialize Filter State Variables Filter Coefficients b0 FloatToQ6 1 0 b1 FloatToQ6 0 0 b2 FloatToQ6 0 0 al FloatToQ6 0 0 a2 FloatToQ6 0 0 1 KHz filter b0 FloatToQ6 0 109375 b1 FloatToQ6 0 0 b2 FloatToQ6 0 109375 al FloatToQ6 1 453125 a2 FloatToQ6 0 812500 Real 1kHz Filter b0 FloatToQ6 0 11603539655267 b1 FloatToQ6 0 0 b2 FloatToQ6 0 11603539655
36. reater than 25 times the sampling frequency This guarantees that the worse case conversion time will occur within 1 sampling period according to the 163 Data Sheet p 93 E LodeWwizardAVH untitled cwp H LodeWwizardAVH untitled cwp File Help File Help wie 2wienzc IC wie 2 Wine 20 LCD Bit Banged Project Information LCD Bit Banged Project Information Chip Ports External IH Timers UART Analog Comparator ADC UART Analog Comparator ADL SF Chip Ports External IR Timers ADC Enabled Use bits Timer Timer Time 2 Watchdog ADC Interrupt Clock Source System Clock Volt Ref Clock S000 000kKH2 TTE Made 8 bit Pulse Width Modulation Out amp Nondnv Out B oiscon M fr T Inp ze teret on T Se 8 hCmp amp O h Cmp B U Figure 3 ADC Figure 4 Timer PWM 6 Set the Timer 1 options as shown in Figure 4 e Timer 1 clock will run the PWM at a frequency given by ClockValue 256 for the SBIT PWM 2X frequency option according to the ATMEGA163 Data Sheet p 41 e In this case the PWM frequency will be 31 25 kHz e The duty cycle may be entered as a fraction of OxFF in CmpA or may be dynamically updated by assigning the desired value to the OCRIAL Output Compare Register within the program 7 Set the Timer 2 options as shown in Figure 5 The Sampling Rate wi
37. rsion Date 5 3 2001 Author Site Lic 10 Univ of Wisconsin Company 1513 Univ Ave Madison WI 537 Comments Figure 6 Project Name 8 Name the Project NarrowBand as shown in Figure 6 9 Generate Save amp Exit on the CodeWizard AVR File menu e the same name may be entered for all three saves Programming 1 Directly below the Zinclude megal163 h insert include float2Qpoint h e this header file contains the function prototypes for the floating point to 8 bit Q7 and Q6 fixed point conversion routines 2 Declare the filter state variables and the filter coefficient variables next with the following lines char x2 y1 y2 filter state variables Q7 char x0 input Q7 char b0 b1 b2 a1 a2 filter coefficients Q6 int yOtemp accumulation variable Q13 3 Theread adc function must be modified to look exactly as it does below B unsigned char read adc unsigned char adc input J 1 0 ADMUX adc VREF ADCSER 6 1 2 while ADCSR 4 0 3 ADCSR 4 1 seturn ADCH A return ADCH b xj e The ADCW was replaced with the ADCH so that the function will return an the top byte or the 8 most significant bits of the DC value produced by the ADC The integer type definition of in the function header was also replaced with a character type definition 4 Place the following code inside the interrupt service routine timer2 comp
38. tors pulse width modulation ADC analog comparator and watch dog timers are some of the features in AVR devices AVR instructions are tuned to decrease the size of the program whether the code is written C or Assembly With on chip in system programmable Flash and EEPROM the AVR is a reasonable choice to optimize for cost and get products to market quickly The part selected to implement a simple 2 order digital filter 15 the ATmegal63 The ATmegal63 belongs to the Atmel AVR family of 8 bit RISC microcontrollers This part runs up to 8MHz and has 16KB of FLASH Program memory 512 byte of EEPROM Nonvolatile Data Memory IKB of SRAM 32 I O lines 17 hardware interrupts 3 counter timers an 8 channel 10 bit A D and various other on chip peripheral modules Key features used by the filter project were one counter timer for interrupt service routine timing A D converter for sampling an analog waveform one counter timer for Pulse Width Modulation PWM timing for an inexpensive analog output a hardware integer multiply and a C friendly instruction set Additional features from the Atmel Datasheet are Features High performance Low power AVR 8 bit Microcontroller 130 Powerful Instructions Most Single Clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 8 MIPS Throughput at 8 MHz On chip 2 cycle Multiplier Nonvolatile Program and Data Memories Self progr
39. two compare registers that provide 8 9 or 10 bit resolution on the PWM output duty cycle Timer in PWM mode can be configured to have two independent PWM outputs The duty cycle of each output 15 set by writing the 8 9 or 10 least significant bits depending on resolution to the corresponding duty cycle register For more detailed information on the counter timer one see page 36 ATmegal63 datasheet included on the accompanying CD For this application Timer 1 was configured for PWM output in an 8 bit mode with frequency doubling enabled Given the system oscillator frequency f the PWM output frequency in 8 bit mode with frequency doubling 15 given by the equation Tiree 8 2 9125K H7 fem 956 This PWM mode was selected to make the PWM fundamental frequency as high as possible This maximizes the possible bandwidth of the digitally filtered output signal The PWM output signal was filtered using two sequential single pole RC filters Both filters were designed for the same 3dB frequency to provide a second order filter The RC filter corner frequency is given by the equation 1 faas 2zRC A corner frequency of 2 5 KHz was desired resistor value of 1500 and capacitor value of 0 47 uF were chosen giving 2 26KHz The spectrum of the unfiltered PWM signal with no digital filter input signal is shown below Tek E zi Trig d an MATH i Operation d qM I M ML T M
40. ut method is based on the system clock PWM If an external A D was used the PWM limitations could be removed and analog output filter corner frequency could be pushed farther out in frequency 2 The sampling filtering and output interrupt service routine loop rate sets the maximum sampling rate Therefore the analog signal I O bandwidth is limited This could be improved by an increased clock rate or improved multiply accumulate architecture inside the processor like a DSP part would have Note according to Atmel 20MHz version of the ATmegal63 is forthcoming In summary the Atmel ATmegal63 microcontroller is capable of simple audio band signal processing conditional on an external D A converter and use of fixed point arithmetic subject to the fixed point effects 7 Appendix 7 C Source Code This program was produced by the CodeWizardAVR V1 0 1 7b Standard Automatic Program Generator Copyright 1998 2001 Pavel Haiduc HP InfoTech S R L http infotech ir ro e mail dhptechn ir ro hpinfotech mail com Project Filter Version 1 0 Date 4 27 2001 Author Erick L Oberstar Michael J Bauch Copywright 2001 Comments This application uses and ATmegal63 to implement a 2nd order digital filter Chip type ATmegal63L Clock frequency 8 000000 MHz Memory model Small Internal SRAM size 1024 External SRAM size 0 Data Stack size 256
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