RL78/G13 Basic Initialisation for Cubesuite+ and IAR Toolchain
Contents
1. o ferrocene Connectedo oysa osora 4 s Init portmoce nputpot Bits 7 and 6 High speed System Clock EXCLK OSCSEL X1 P121 Pin X2 EXCLK P122 Pin Pin Operating Mode oo o Input port mode Input port i X1 oscillation mode Connected to crystal ceramic oscillator oa o Input port mode Input port External clock input mode Input port External clock input Note For details on the procedure for setting up the registers refer to RL78 G13 User s Manual Hardware RO1AN1083EG0100 Rev 1 00 Page 24 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Controlling clock operations e Clock operation status control register CSC High speed system clock operation control Stop X1 oscillator Subsystem clock operation control Stop XT1 oscillator HOCO clock operation control HOCO operation Symbol CSC 7 6 5 4 3 2 1 0 Gd 6e L 3 ee e 9 3 39 Bit 0 HIOSTOP Control of HOCO clock operation oe Runs HOCO 1 Stops HOCO Bit 6 Control of Subsystem Clock Operation XTSTOP External Clock Input XT1 Oscillation Mode cese Input Port Mode Mode Runs XT1 oscillator Enables eerie clock from the EXCLKS pin Input port Stops XT1 oscillator Disables external clock P from the EXCLK pin Bit 7 Control of High speed System Clock Operation MSTOP External Clock Input X1 Oscillation Mode ee i Port Mode Enables exter2. Operation Check Conditions Item Description Microcontroller used RL78 G13 R5F100LEA Operating frequency e High speed on chip oscillator HOCO clock 32 MHz e CPU peripheral hardware clock 32 MHz Operating voltage 5 0 V can run on a voltage range of 2 9 V to 5 5 V e LVD operation Vivin Reset mode 2 81 V 2 76 V to 2 87 V Integrated development environments CubeSuite V1 00 01 from Renesas Electronics Corp IAR Embedded Workbench for Renesas RL78 version 1 10 4 C compiler CA78KOR V1 20 from Renesas Electronics Corp ICCRL78 V1 10 4 C C Compiler for Renesas RL78 From IAR RO1AN1083EG0100 Rev 1 00 Page 4 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 4 Description of the Hardware 4 1 Hardware Configuration Example Figure 4 1 shows an example of the hardware configuration used for this application note RL78 G13 P51 INTP2 P50 INTP1 P40 TOOLO For on chip debugger Figure 4 1 Hardware Configuration Notes 1 The purpose of this circuit is only to provide the connection outline and the circuit is simplified accordingly When designing and implementing an actual circuit provide proper pin treatment and make sure that the hardware s electrical characteristics conditions are met connect the input dedicated ports separately to Vpp or Vss via a resistor 2 Connect any pins whose name begins with EVss to Vss and any pins whose nam
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6. the clock generator Arguments e None Return value e None Remarks Function Name main Synopsis Main function Header r cg macrodriver h r cg cgc h r cg port h r cg userdefine h Declaration void main void Explanation main function of the C language Places the following outputs on the LEDs according to the values of SW1 P50 and SW2 P51 SW2 SW1 LED Binary Value 0 0 050000001 1 0 1 0500000101 1 0 0500000110 1 1 0b00000111 Arguments None Return value None Remarks RO1AN1083EG0100 Rev 1 00 Page 9 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 5 Flowcharts Shown below is the overall flow of the sample program described in this application note Start D The option bytes are referenced before the initialization function is called Initialisation function Cubesuite hdwinit IAR low level init Figure 4 1 Overall Flow Option byte configuration outline The option bytes of the RL78 G13 are made up of user option bytes 000COH 000C2H 010COH 010C2H and on chip debugging option bytes 000C3H 010C3H The option bytes are automatically referenced and the prespecified functions are set up when power is first supplied or after the release of the reset state The option bytes cannot be set up by any user program The option bytes can exercise the controls listed below They must be set up without fail before the microcomputer i
7. to the external reset pin the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed In a similar way the states of pins in a product that is reset by an on chip power on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited The reserved addresses are provided for the possible future expansion of functions Do not access these addresses the correct operation of LSI is not guaranteed if they are accessed Clock Signals After applying a reset only release the reset line after the operating clock signal has become stable When switching the clock signal during program execution wait until the target clock signal has stabilized When the clock signal is generated with an external resonator or from an external oscillator during a reset ensure that the reset line is only released after full stabilization of the clock signal Moreover when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress wait until the target clock signal is stable Differences between Products Before changing from one product to another i e to one with a different type number confirm that the change will not lead to problems The char
8. 0 pin products 3 Not installed in 20 24 and 25 pin products Note Power saving and noise reduction are achieved by stopping the supply of clocks to any unused hardware macros Controlling the operation speed mode Operation speed mode control register OSMC Setting in STOP mode or HALT mode while subsystem clock is selected as CPU clock Enables supply of subsystem clock to peripheral functions Selection of operation clock for realtime clock and interval timer Subsystem clock Symbol OSMC T 6 5 4 3 2 1 0 marc o o wes 3 1 9 0 0 o s 9 fo 1 9 1 9 Bit4 WUTMMCKO Selection of operation clock for realtime clock and interval timer 0 Subsystem clock fsus Internal low speed oscillator LOCO clock Enables supply of subsystem clock to peripheral functions Stops supply of subsystem clock to peripheral functions except the realtime clock and interval timer Setting in STOP Mode or HALT Mode while subsystem clock is selected as CPU clock 1 Note The OSMC register is designed to reduce the operating current for low power operation in STOP mode and in HALT mode in which the CPU is running on the subsystem clock For details on its configuration procedure refer to RL78 G13 User s Manual Hardware RO1AN1083EG0100 Rev 1 00 Page 28 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 5 5 Main Processing Figure 4 6 shows the flowchart for the main pro
9. 434 NESAS APPLICATION NOTE RL78 G13 RO1AN1083EG0100 Rev 1 00 Basic Initialisation for Cubesuite and IAR Toolchain Mar 13 2012 Introduction This application note describes the basic setting items that are necessary for initializing the RL78 G13 The sample program discussed in this application note initializes the RL78 G13 and provides on off control of three LEDs according to the combination of two switch input states Target Device RL78 G13 When applying the sample program covered in this application note to another microcomputer modify the program according to the specifications for the target microcomputer and conduct an extensive evaluation of the modified program This application note has been updated for the RSKRL78 G13 hardware platform RO1AN1083EG0100 Rev 1 00 Page 1 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Contents Te IEEE E 3 2 SpecliCallOLS cuoi eerte TE aote ER Di edt vede e DE A Uf te Uc deine 3 3 Operation Check Conditions esssssssssesesseesse eene entente nnnssn nnne tn nennen nsn nnne tnnt 4 4 Description of the Hardware ener einen nnns sentent ensis entr te sten nnns 5 4 1 Hardware Configuration Example sse enne enne nnne 5 4 2 Listof Pins to be Used ucl iced terria fan eu torre Lar eiu AAE EENE EE ENEE Cn esa Lor Rad dra da awake 5 5 Description of the Software ssss
10. 5 2 List of Option Byte Settings Table 4 2 summarizes the settings of the option bytes Table 4 2 Option Byte Settings Address Value Description 000C0H 010CO0H 01101110B Stops the watchdog timer operation Stops counting after the release of the reset state 000C1H 010C1H 01111111B LVD reset mode 2 81 V 2 76 V to 2 87 V 000C2H 010C2H 11101000B HS mode HOCO 32 MHz 000C3H 010C3H 10000100B Enables the on chip debugging function 5 3 List of Functions Table 4 3 lists the functions that are used by this sample program Table 4 3 Functions Function Name Outline Cubesuite hdwinit Initializes the hardware settings IAR low level init R_Systeminit Calls the hardware initialization functions R_PORT_Create Initializes the I O ports R_CGC_Create Initializes the clock generator main Main function RO1AN1083EG0100 Rev 1 00 Page 7 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 4 Function Specifications This section describes the specifications for the functions that are used in the sample code Function Name hdwinit Synopsis Initialize hardware settings Header r cg macrodriver h r cg cgc h r cg port h r cg userdefine h Declaration void hdwinit void Explanation Performs the following operations 1 Executes the DI instruction 2 Executes the function R Systeminit 3 Executes the El instruction Arguments Non
11. ALT STOP mode Enables counter operation in HALT STOP mode Bits 3 to 1 m E 7 Bit 4 Control of watchdog timer counter Disables counter operation Stops counter after the release of reset sequence Enables counter operation Starts counter after the release of reset sequence Bits 6 to 5 WINDOW1 Watchdog timer window open period WINDOWO 00 Setting prohibited Bit 7 WDTINT Use of interval interrupts o O Interval interrupt is not used An interval interrupt is generated when 75 is reached Note 010COH must also set to be the same value as 000COH because the contents of 000COH and 010COH are swapped at boot swap time RO1AN1083EG0100 Rev 1 00 Page 12 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 2 000C1H 010C1H LVD related settings 7 6 5 4 3 2 1 0 Lo Ji 5 s a o p v When use as interrupt amp reset mode Detection Voltage Option Byte Setting Value LVIMDS1 LVIMDSO VPOC2 VPOC1 VPOCO Falling Falling Other than above Fs Setingprhibled prohibited When used as reset mode Detection Voltage Option Byte Setting Value Vivin Vivir LVIMDS1 LVIMDSO VPOC2 VPOC1 VPOCO LVISO Rising edge Falling edge Other than above Setting prohibited Note 010C1H must also set to be the same value as 000C1H because the
12. H and 010C2H are swapped at boot swap time RO1AN1083EG0100 Rev 1 00 Page 15 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 4 000C3H 010C3H On chip debugging option bytes 7 6 5 4 3 2 1 0 Plo fet po 2 j o j 0 o j o 1 j 0 j 1 Bits 7 and 0 OCDENSET OCDERSD Control of On chip Debugging Operation o0 0 pssblesonhipdebugging o etngprohbiec 0 1 NE authentication of security ID fails when authentication of security ID fails Note 010C3H must also set to be the same value as 000C3H because the contents of 000C3H and 010C3H are swapped at boot swap time RO1AN1083EG0100 Rev 1 00 Page 16 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 5 1 Initialization Function Figure 4 2 shows the flowchart for the initialization function Cubesuite hdwinit IAR low level init Disable interrupts IE 0 System function r systeminit IE 1 Enable interrupts Figure 4 2 Initialization Function RO1AN1083EG0100 Rev 1 00 Page 17 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 5 2 System function Figure 4 3 shows the flowchart for the system function r_systeminit D Disuse peripheral I O redirection PIOR reaister 00000000B function 9 Set up I O ports PORT Create Set up CPU cloc
13. acteristics of MPU MCU in the same group but having different type numbers may differ because of the differences in internal memory capacity and layout pattern When changing to products of different type numbers implement a system evaluation test for each of the products Notice 1 All information included in this document is current as of the date this document is issued Such information however is subject to change without any prior notice Before purchasing or using any Renesas Electronics products listed herein please confirm the latest product information with a Renesas Electronics sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website 2 Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semicond
14. asic Initialisation for Cubesuite and IAR Toolchain Setting up ports for LEDs e Port mode register 5 PM5 Port mode register 6 PM6 P52 LEDO P53 LEDI P62 LED2 P63 LED3 Symbol PM5 7 6 5 4 3 2 1 0 1 1 ERESEREREREE See SW2 See SW1 PM5n pin I O mode selection oo Output mode output buffer on Input mode output buffer off Symbol PM6 7 6 5 4 3 2 1 0 To 5 9 5 1 5 1 5 PM6n pin I O mode selection Output mode output buffer on Input mode output buffer off Notes 1 This sample code configures any unused ports for output to minimize the adverse influence of through current 2 For details on the procedure for setting up the registers refer to RL78 G13 User s Manual Hardware RO1AN1083EG0100 Rev 1 00 Page 21 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Setting up ports for switches e Port mode register 5 PM5 e Pull up resistor option register 0 PUO P50 SW1 P51 SW2 Port mode control register 0 PMCO Digital input Symbol PM5 7 6 5 4 3 2 1 0 PM57 PM56 PM55 PM54 PM53 PM52 PM51 PM50 0 0 1 1 See LED1 See LEDO PM5n pin I O mode selection o Output mode output buffer on A Input mode output buffer off Symbol PU5 7 6 5 4 3 2 1 0 0 Puss Puss Puss Puss Pusz Pusr Puso o o 9 9191913 13 4 IPUOn Selection of on chip pull up resistor for POn pin o On chi
15. cessing routine main D SW1 and SW2 state SW1 ON SW2 ON LED1 OFF LED2 OFF LED3 ON LED1 OFF LED2 ON LED3 OFF LED1 ON LED2 OFF LED3 OFF LED1 OFF LED2 OFF LED3 OFF Figure 4 6 Main Processing R01AN1083EG0100 Rev 1 00 Page 29 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 6 Sample Code The sample code is available on the Renesas Electronics Website 7 Documents for Reference RL78 G13 User s Manual Hardware Rev 1 00 RO1UH0146EJO100 RL78 Family User s Manual Software Rev 1 00 RO1USO015EJO0100 RL78 G13 Renesas Starter Kit Users s Manual Rev 1 00 R20UTO459EG0100 The latest versions of the documents are available on the Renesas Electronics Website Technical Updates Technical Brochures The latest versions of the documents are available on the Renesas Electronics Website RO1AN1083EG0100 Rev 1 00 Page 30 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Website and Support Renesas Electronics Website http www renesas com Inquiries http www renesas com inquiry All trademarks and registered trademarks are the property of their respective owners RO1AN1083EG0100 Rev 1 00 Page 31 of 31 Mar 13 2012 RENESAS Revision Record Rev 1 00 Date Mar 13 2012 Description Page Summary Ported from r01an0451ej0100 Ported
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17. contents of 000C1H and 010C1H are swapped at boot swap time RO1AN1083EG0100 Rev 1 00 Page 13 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain When used as interrupt mode Detection Voltage Option Byte Setting Value Vivin VivIL LVIMDS1 Rising edge Falling edge Other than above Setting prohibited When LVD is off Detection Voltage Option Byte Setting Value Mow Vin LVIMDS1 LVIMDSO VPOC2 VPOCi vPoco Lvisi LVISO E Ew pow powednox deo ow 1 Setting prohibited Remarks x don t care RO1AN1083EG0100 Rev 1 00 Page 14 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 3 000C2H 010C2H HOCO and flash memory operation settings 6 5 4 3 2 1 0 7 cwonEr cwonEo 3 o FROSELS FROSEL FROSELI FROSELO o a iao a qno poses 9 j Bits 7 and 6 CMODEO Setting of Flash Memory Operating Mode Operating Operating Frequency Range Voltage Range LV low voltage main 1 MHz to 4 MHz 1 6V to 5 5 V mode LS low speed main 1 MHz to 8 MHz 1 8V to 5 5 V mode HS high speed main 1 MHz to 16 MHz 2 4 V to 5 5 V mode 1 MHz to 32 MHz 2 7 V to 5 5 V Setting prohibited FRQSEL2 RQSEL1 FRQSELO HOCO Frequency mz 1 1 1 Note 010C2H must also set to be the same value as 000C2H because the contents of 000C2
18. e Return value None Remarks This function is called by the startup routine Function Name R Systeminit Synopsis Call hardware initialization functions Header r cg macrodriver h r cg cgc h r cg port h r cg userdefine h Declaration void R Systeminit void Explanation Performs the following operations 1 Sets the initial value of the peripheral I O redirection register PIOR 2 Executes the function R PORT Create 3 Executes the function R_CGC_Create 4 Sets the initial value of the flash memory CRC control register CRCOCTL 5 Sets the initial value of the invalid memory access detection control register IAWCTL Arguments None Return value None Remarks Function Name R PORT Create Synopsis Initialize I O ports Header r cg macrodriver h r cg port h r cg userdefine h Declaration void R PORT Create void Explanation Configures P50 and P51 for input enabling the on chip pull up resistor and P53 P62 and P63 for output high level output Configures the other ports except pin P40 for output low level output Arguments None Return value None Remarks RO1AN1083EG0100 Rev 1 00 Page 8 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Function Name R_CGC_Create Synopsis Initialize the clock generator Header r cg macrodriver h r cg cgc h r cg userdefine h Declaration void R_CGC_Create void Explanation Initializes the registers related to
19. e begins with EVpp to Vpp respectively 3 Vpp must be held at not lower than the reset release voltage V yj that is specified as LVD 4 2 List of Pins to be Used Table 4 1 lists the pins to be used and their functions Table 4 1 Pins to be Used and Their Functions Pin Name y o Description P52 Output LED on LEDO control port P53 Output LED on LED1 control port P62 Output LED on LED2 control port P63 Output LED on LED3 control port P50 INTP1 Input Switch input SW1 port P51 INTP2 Input Switch input SW2 port R01AN1083EGO0100 Rev 1 00 Page 5 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 Description of the Software 5 1 Operation Outline The sample program described in this application note initializes the CPU e g selecting the CPU clock frequency and sets up its I O ports After completing the hardware setup the sample program controls the on off of three LEDs LED1 to LED3 according to the combination of states of two switch inputs SW1 and SW2 1 CPU initialization Setsup the peripheral I O redirection function Sets up the I O ports Sets up the CPU clock Note The option bytes are referenced before the CPU is initialized lt Setup conditions gt Sets the reset value because the CPU does not use the peripheral I O redirection function PIOR register Makes the following configurati
20. egisters that are used to initialize the CPU clock e Clock operation mode control register CMC e Clock operation status control register CSC e System clock control register CKC e Peripheral enable register 0 PERO e Operation speed mode control register OSMC Note Selectable only for 40 44 48 52 64 80 100 and 128 pin products Given below is an example of setting up the CPU clock for this sample code RO1AN1083EG0100 Rev 1 00 Page 23 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Setting up the clock operating mode e Clock operation mode control register CMC High speed system clock pin s operating mode Input port mode Subsystem clock pin s operating mode Input port mode XTI oscillator oscillation mode Low power consumption oscillation X1 clock oscillation frequency control 1 MHz lt MX x 10 MHz Symbol CMC 7 6 5 4 3 2 1 0 exa T osese EXGIKS OSOSELS eer poen amen oo o o o o o o o Bit 0 AMPH Control of X1 clock oscillation frequency 0 1 MHz lt fMX lt 10 MHz l 1 10 MHz lt fMX lt 20 MHz Bits 2 and 1 Selection of oscillation mode for XT1 AMPHS1 AMPHSO oscillator Low power consumption oscillation n NE FEES Ultra low power DM oscillation Bits 5 and 4 Subsystem Clock Pin EXCLKS OSCSELS XT1 P123 Pin XT2 EXCLKS P124 Pin Operating Mode o 0 input pon mode frp
21. fo o o yo fefeo ilo Bits 1 and 0 TAUmEN Control of timer array unit m input clock Stops supply of input clock e SFR for timer array unit m cannot be written e Timer array unit m is in the reset state 4 Supplies input clock SFR for timer array unit m can be read and written Bits 3 and 2 SAUmEN Control of serial array unit m input clock Stops supply of input clock e SFR for serial array unit m cannot be written e Serial array unit m is in the reset state i Supplies input clock SFR for serial array unit m can be read and written Bits 6 and 4 IICAmEN Control of serial interface IICAm input clock Stops supply of input clock e SFR for IICAm cannot be written e lICAm is in the reset state Supplies input clock SFR for IICAm can be read and written Bit 5 Control of A D converter input clock Stops supply of input clock e SFR for A D converter cannot be written e A D converter is in the reset state i Supplies input clock SFR for A D converter can be read and written Bit 7 Control of realtime clock RTC input clock Stops supply of input clock e SFR for RT cannot be written e RTC is in the reset state f Supplies input clock SFR for RTC can be read and written R01AN1083EG0100 Rev 1 00 Page 27 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Notes 1 For 80 100 and 128 pin products only 2 Not installed in 2
22. k R CGC Create Stop CRC calculator Disable detection of invalid memory access Figure 4 3 System Function RO1AN1083EG0100 Rev 1 00 Page 18 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 3 Setting up the I O Ports Figure 4 4 shows the flowchart for setting up the I O ports PORT_Create D Configure analog input alternate ADPC register 00000001B function pins for digital I O PMC register bits 0 Set t d ist PMB register 00000011B P51 and P50 gt Input port et upi port moge register Other PMx register bits lt 0 Set up pull up resistor option PU5 register lt 00000011B P51 and P50 Internally pulled register up Other PUx register bits lt 0 P5 register lt 00001100B P52 to P53 Output H Set up port register P6 register 00001100B P62 to P63 Output H Other Px register bits 0 Other Px register bits Output L Figure 4 4 I O Port Setup RO1AN1083EG0100 Rev 1 00 Page 19 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Outline of I O port setup The RL78 G13 is equipped with digital I O ports so that it can provide a variety of controls The I O ports serve multiple pin functions in addition to serving as digital I O ports The I O ports are controlled by the registers listed below They must be set up during the system initialization routine that i
23. llation This application note and associated code has been written to work with both Cubesuite and IAR IDEs and compilers Decompress if zipped the files For Cubesuite Open the mtpj project in the CS Code directory in Cubesuite For IAR Open the eww workspace in the VAR directory in IAR Workbench 2 Specifications The sample program described in this application note performs basic initialization steps such as the setup of the clock frequency and input output ports After the initialization the program controls in its main processing routine the on off of three LEDs according to the combination of two switch input states Table 2 1 lists the Peripheral Functions to be Used and their Uses and figure 2 1 shows the outline of the initialization processing Table 2 1 Peripheral Functions to be Used and their Uses Peripheral Function Use Port input output Switch input SW1 and SW2 LED on off control LED1 to LED3 Input lt Output gt LED1 LED2 LED3 RL78 G13 Switch Input LED Output SW1 P50 SW2 P51 LED1 P53 LED2 P62 LED3 P63 OFF OFF OFF ON Figure 2 1 Overview of LVD Operation Reset Mode RO1AN1083EG0100 Rev 1 00 Page 3 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 3 Operation Check Conditions The sample code contained in this application note has been checked under the conditions listed in the table below Table 3 1
24. nal clock from Runs X1 oscillator the EXCLKS pin z Input port Disables external clock Stops X1 oscillator j from the EXCLK pin Note For details on the procedure for setting up the registers refer to RL78 G13 User s Manual Hardware R01AN1083EG0100 Rev 1 00 Page 25 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Setting up the CPU peripheral hardware clock fci x e System clock control register CKC fc x status Main system clock fcix selection HOCO clock fim Symbol CKC Bit4 MCMO Control of main system clock fmain operation NUN Selects HOCO clock fm as the main system cock fun Selects high speed system clock fux as the main system clock fma Bit 5 Main system clock fman state o Hoco clock w High speed system clock fmx Selection of CPU peripheral hardware clock fc x Main system clock fma Subsystem clock fsug CPU peripheral hardware clock fci state Main system clock fmain Subsystem clock fsug Note For details on the procedure for setting up the registers refer to RL78 G13 User s Manual Hardware RO1AN1083EG0100 Rev 1 00 Page 26 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain Setting use disuse of peripheral hardware macros e Peripheral enable register 0 PERO Hardware input clock control Stop input clocks Symbol PERO 7 6 5 4 3 2 1 0 Po
25. nesas Electronics Malaysia Sdn Bhd Unit 906 Block B Menara Amcorp Amcorp Trade Centre No 18 Jin Persiaran Barat 46050 Petaling Jaya Selangor Darul Ehsan Malaysia Tel 60 3 7955 9390 Fax 60 3 7955 9510 Renesas Electronics Korea Co Ltd 11F Samik Lavied or Bldg 720 2 Yeoksam Dong Kangnam Ku Seoul 135 080 Korea Tel 82 2 558 3737 Fax 82 2 558 5141 2012 Renesas Electronics Corporation All rights reserved Colophon 1 1
26. ons for the I O ports 1 Configures the ports that are configured for analog input after the release of the reset state for digital I O ADPC register and port mode control register 2 Configures P50 and P51 which are to be used as switch inputs SW1 and SW2 for input and the other ports for output port mode register 3 Connects on chip pull up resistors to P50 and P51 which are to be used as switch inputs SW1 and SW2 pull up resistor option register 4 Sets P53 P62 P63 which are to be used for on off control of LEDs LED1 to LED3 to 1 and the other unused pins to 0 port register Sets up the CPU clock 1 Sets the reset value because the high speed system clock and subsystem clock are not to be in use clock operation mode control CMC register and clock operation status control CSC register 2 Selects the main system clock fum as the CPU peripheral hardware clock fci and HOCO fm as the main system clock far system clock control CKC register 2 Executes the main processing Performs the LED output control as summarized in Table 4 1 according to the state of the switch inputs SW1 and SW2 Table 4 1 Main Processing LED Output SW1 P50 SW2 P51 LED1 P53 LED2 P62 LED3 P63 OFF Note Refer to RL78 G13 User s Manual for notes on device use RO1AN1083EG0100 Rev 1 00 Page 6 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain
27. p pull up resistor not connected On chip pull up resistor connected Notes 1 This sample code configures any unused ports for output to minimize the adverse influence of through current 2 For details on the procedure for setting up the registers refer to RL78 G13 User s Manual Hardware RO1AN1083EG0100 Rev 1 00 Page 22 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 5 5 4 CPU Clock Setup Figure 4 5 shows the flowchart for setting up the CPU clock C R CGC Create 2 Set up high speed system clock subsystem clock Select CPU peripheral hardware clock fcu return Figure 4 5 CPU Clock Setup CMC register 00000000B MSTOP bit lt 1 Does not use high speed system clock XTSTOP bit lt 1 Does not use subsystem clock MCMO bit lt 1 Selects high speed OCO clock fiu as system clock fain CSS bit lt 1 Selects main system clock fma as CPU peripheral hardware clock fci Outline of CPU clock setup The RL78 G13 allows the user to select the system clock source from the high speed on chip oscillator HOCO main system clock oscillator external clock input and subsystem clock oscillator external clock input The system clock is controlled by the registers listed below The CPU clock must be initialized during the system initialization routine that is executed when power is first supplied or after the release of the reset state R
28. s executed when power is first supplied or after the release of the reset state Registers that are used to manipulate ports e Port mode register PMxx e Port register Pxx e Pull up resistor option register PUxx e Port input mode register PIMx e Port output mode register POMx e Port mode control register PMCxx e A D port configuration register ADPC e Peripheral I O redirection register PIOR e Global digital input disable register GDIDIS Note A register used to place port pins in digital I O or analog input mode Since the port pins are configured for analog input when a reset signal occurs the pins that are to be used for digital I O must always be set up with this register after the release of the reset state For the sample program described in this application note all port pins are configured for digital I O Notes 1 Refer to RL78 G13 User s Manual Hardware for the procedure to set up registers to configure ports as alternate function pins for peripheral functions 2 Provide proper treatment for unused pins so that their electrical specifications are observed Connect each of any unused input only ports to Vpp or Vss via a resistor 3 Connect any pins whose name begins with EVss to Vss and any pins whose name begins with EVpp to Vpp respectively Given below is an example of manipulating ports that are used in this sample code RO1AN1083EG0100 Rev 1 00 Page 20 of 31 Mar 13 2012 RENESAS RL78 G13 B
29. s to be used User option bytes e Makes settings related to the watchdog timer 000COH 010COH e Makes LVD related settings 000C1H 010C1H e Sets up the HOCO and flash memory 000C2H 010C2H On chip debugging option bytes 000C3H 010C3H Notes 1 010COH must also set to be the same value as 000COH because the contents of 000COH and 010COH are swapped at boot swap time 2 010C1H must also set to be the same value as 000C1H because the contents of 000C1H and 010C1H are swapped at boot swap time 3 010C2H must also set to be the same value as 000C2H because the contents of 000C2H and 010C2H are swapped at boot swap time 4 010C3H must also set to be the same value as000C3H because the contents of 000C3H and 010C3H are swapped at boot swap time RO1AN1083EG0100 Rev 1 00 Page 10 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain The option bytes can be specified through User Option Byte Values on the Device panel on the CubeSuite Link Option tag Note For details on the procedure for setting up the CubeSuite link options refer to the CubeSuite tutorial RO1AN1083EG0100 Rev 1 00 Page 11 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 1 000COH 010COH watchdog timer related settings 7 6 5 4 3 2 1 0 Eel tt Lela fae Bit 0 wosTBYON Control of watchdog timer counter l Disables counter operation in H
30. sssssssssssssseseeeee nennen nnn ennt nr sitne enters enr siste snnt eres 6 5A Operation Outline T 6 5 2 Listof Option Byte Settings irre ette har e Eee bta ek e Ra EE tn uM xeu ew a A Au eR a Edad eh 7 5 9 IISEOT FUNCIONS esee eerte ene three FUR ee a neu ehe xen e FR ea nentes dehet a a xen te eui eee en 7 5 4 Function SpecifIGations iid dei irte reete aeo Gan ails bu ud ope x dne ein dale 8 bib EloWch lts eti etre eee ie t ol dta er das ed ted ce bid La alata den aka dore a ta RR o ulsteteass 10 5 5 1 INIT AN ZATION FUNGUO E 17 5 5 2 SYSTEM TUNGU Neas 18 5 5 3 Setting up the I O Ports TODO sse enne enn nnn intres 19 5 5 4 GPU Clock Setup eee oie eek th ped a ut e edenda ee e e a ra ev dex Eae eaa 23 5 5 5 Main Processing oue eda eq tarta deerit esata taa dte aa det ERE RO Rea ie Dae dt ca RR Ra Rad ni du RI Rae Rada ndo 29 6 Sample Code HET 30 4 DOCUMENTS for Referenca sessirnir ennienni Pig vr adeb a E cada bye Ped la dedaadineedanedievedstatl Cae ai dd 30 Website and SUppolt i het ot EP tiep e e pit raras ease eet Ra Seca botte e pcne 31 PROVISION RECOM f c 1 General Precautions in the Handling of MPU MCU Product ssssseeseeeeeeeen nnns 2 RO1AN1083EG0100 Rev 1 00 Page 2 of 31 Mar 13 2012 RENESAS RL78 G13 Basic Initialisation for Cubesuite and IAR Toolchain 1 Insta
31. to RSKRL78 G13 hardware Added support for IAR Updated Document template First edition issued A 1 General Precautions in the Handling of MPU MCU Products The following usage notes are applicable to all MPU MCU products from Renesas For detailed usage notes on the products covered by this manual refer to the relevant sections of the manual If the descriptions under General Precautions in the Handling of MPU MCU Products and in the body of the manual differ from each other the description in the body of the manual takes precedence 1 Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual The input pins of CMOS products are generally in the high impedance state In operation with an unused pin in the open circuit state extra electromagnetic noise is induced in the vicinity of LSI an associated shoot through current flows internally and malfunctions occur due to the false recognition of the pin state as an input signal become possible Unused pins should be handled as described under Handling of Unused Pins in the manual Processing at Power on The state of the product is undefined at the moment when power is supplied The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied In a finished product where the reset signal is applied
32. uctor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information 5 When exporting the products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations 6 Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein 7 Renesas Electronics products are classified according to the following three quality grades Standard High Quality and Specific The re
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