User Manual for SMT111 - Sundance Multiprocessor Technology Ltd.
Contents
1. Unit Module Description Standalone Carrier Board single module size Unit Module Number SMT111 Document Issue Number Original Author Sebastien Maury User Manual for SMT 111 Sundance Multiprocessor Technology Ltd Chiltern House Waterside Chesham Bucks HP5 1PS This document is the property of Sundance and may not be copied nor communicated to a third party without prior written permission I Sundance Multiprocessor Technology Limited 2009 Certificate Number FM 55022 Revision History E Changes Me Date uiae Table of Contents 1 ise e Tei OND EEN 5 2 Related Re el Tu 6 2 1 Referenced Documents 6 22 APPICAbIEDPOCUMEen EE 6 3 Acronyms Abbreviations and Definitions sssssnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn 7 3 1 Acronyms abd ADDI Viat ONS E 7 d F nctional DescriIDUOD ssssnucsisiisi kdgnEEUE I eMe naa MREEGI A FE uH UE UV UU NEGKRKOK CC C CERER 8 4 1 Block RUE Leen EE 8 AZ ee E ek Le nic 9 qz AUX FPGA devide EE 9 42 2 USB 2 0 controller DVI 9 4 23 QU VAR T Lc 10 AA EE h alia OVCO ens A 10 4 2 5 JTAG IN and JTAG OUT LVTTL I Os connectors sss sese esse eee eee 10 4 2 6 Module TIM SITE 11 4 2 7 Sundance Local Bus SLB connector ENN 11 4 2 8 Rocket IO Serial Link RSL Connector sss sese ee eee eee eee 11 4 2 9 External power supply connector nennen 11 PLOW Sab E 12 4 2 11RE2. 11 RESET push button The RESET signal is asserted during power up or by pressing the RESET push button switch SW2 RESET SW2 Figure 4 RESET push button SW2 The red LED third LED down from the USB connector JP4 on the SMT111 should go off and illuminates every time you issue a hard reset blue push button SW2 It indicates that the Xilinx Spartan 3 FPGA firmware is loaded and running You should see that same result with the USB cable plugged in or not 4 2 12 4 position DIP switch A four position DIP switch SW1 allows for the following settings Table 4 DIP switch SW2 Settings 4 2 13 Jumper J P7 Figure 5 Jumper J P7 The jumper JP7 shall NOT be removed and remain fitted 4 2 14 Xilinx J TAG connector A JTAG connector is available to access the Xilinx Spartan 3 FPGA and the Xilinx PROM devices using the Xilinx IMPACT tools JTAG Figure 6 Xilinx J TAG connector Do NOT erase or reprogram the Xilinx PROM without the contentment of Sundance since it may alter the functionalities of the SMT111 provided by default 5 Footprint 5 1 Top View USB Connector 5V and 3 3V Power 12Vdc Power Input JTAG In Out LVTTL I O TIM Site RS232 Connectors RSL Pass Thru Reset Switch Figure 7 SMT 111 PCB Top view 5 2 Bottom View RS232 RSL from TIM Flash SLB Power and Data Xilinx JTAG QUIUEZZON 21S eee A kl a u 8 eea aa la
3. SET push button NEEN 13 d 2 124 position DIPSWEGR a nano 13 zr wage P 0 a 14 42 2 14X mx V TAG COMME E 14 5 Footprint 15 dl PV rail io 15 e lt e s ces EE 16 5 9 cie s e c lt EE 16 6 Alle TT gii 17 7 Support PACK e EA 17 8 Physical ge ne TE 17 9 Sdi cicci 17 1 EI cr 18 User Manual S Page3of 18 Last Edited 21 05 2010 16 53 00 Table of Figures Figure L SMTILL Block Dagro ii 8 Figure 2 12Vdc Power Supply connector pinout eene 12 Figure 3 User RRE 12 Figure 4 RESET push DUTTON SWZ susa 13 EIUS S 28 niei dy uA MIT 14 Figure 6 XIX TAG CORMCCEOM sica 14 Hgure 7 SMTILL PCB Ri 15 Figure B SMT111 PCB Bottom view ENNEN ENNEN EEN 16 Figure 9 SMELLE OW SiS TR 16 1 Introduction The SMT111 is a single module TIM site and Sundance Local Bus SLB FPGA mezzanine card standalone carrier board This carrier board features several external I O interfaces The main features of the SMT111 are Single 12Vdc power input is required and the on board DC DC power converters produce the necessary TIM supplies TIM and SLB carrier board TIM comports connected to the SLB USB 2 0 interface connected to one TIM comport UART and RS232 interfaces On board Flash memory to store the module configuration application JTAG input and output The following connectors are provided to in
4. Sen e ee D OO OOOOO000000 0 kd 9 100680660 000000 0000000 66690666 FOL A C i SE EEEE Zeini Seit en microSD FPGA 12V Power UART 12V Power USB Controller Figure 8 SMT 111 PCB Bottom view 5 3 Photograph Figure 9 SMT 111 powered up 6 Pinout Contact Sundance s technical support 7 Support Packages The following board support packages are mandatory to use the SMT111 e SMT6300 Driver package with support for the SMT111 carrier board USB interface e SMT6002 Flash programming utility tool for FPGA only modules These board support packages do NOT allow to create a host side C C software application with Visual Studio C or similar software programming tools It is strongly recommended to purchase the additional packages e SMT6048 Host side software functions and API for the USB 2 0 interface e 3L Diamond Software tool suite to design FPGA user applications 8 Physical Properties maar ne Supply Vols a 9 Safety This module presents no hazard to the user when in normal use User Manual SMT111 Page 17 of 18 Last Edited 21 05 2010 16 53 00 10 EMC This module is designed to operate from within an enclosed host system which is build to provide EMC shielding Operation within the EU EMC guidelines is not guaranteed unless it is installed within an adequate host system This module is protected from damage by fast voltage transients o
5. riginating from outside the host system which may be introduced through the output cables Short circuiting any output to ground does not cause the host PC system to lock up or reboot
6. rrier board JTAG chaining is handled by the Xilinx FPGA The JTAG OUT connector can be used to carry general purpose LVTTL I O signals The selection of JTAG OUT or LVTTL I Os is made by a DIP switch SW1 User Manual S Page 10 of 18 Last Edited 21 05 2010 16 53 00 4 2 6 Module TIM site A single module TIM site can accept any of Sundance s FPGA or DSP modules All communication ports are routed to the TIM connectors e Primary TIM connector Top Comport 0 and Comport 3 e Secondary TIM connector Bottom Comport 1 Comport 2 Comport 4 and Comport 5 The Comport 3 link is routed by default to the USB 2 0 interface The remaining Comports Comport 1 Comport 2 Comport 4 and Comport 5 are directly connected hardwired to the Sundance Local Bus SLB connector 4 2 7 Sundance Local Bus SLB connector One Sundance Local Bus SLB slot is available to add additional I Os to the SMT111 carrier board Forty eight signals from the SLB are connected to four comports on the TIM connector Comport 1 Comport 2 Comport 4 and Comport 5 These are all LVTTL compatible As all DSP and FPGA modules that Sundance produce use FPGA device to communicate via Comports the SLB signals are therefore available directly by this FPGA 4 2 8 Rocket IO Serial Link RSL connector A pair of Rocket IO Serial Link RSL connectors is provided on the top and bottom of the SMT111 carrier board Four lanes of RSL
7. s Programs can be loaded and executed via this port using the 3L Diamond tools The USB connector pin out is shown here Table 1 USB connector Pinout The USB 2 0 controller device is configured from an EEPROM After a successfully configuration of the USB device the LED labelled D6 is ON User Manual 4 2 3 Quad UART An Oxford Semiconductor 16C954 UART provides four RS232 channels Some Maxim MAX3241 devices perform the conversion from 3 3V LVTTL to true RS232 signal levels The RS232 signals are available via latching IDC headers The pin out is shown here Table 2 RS232 Pinout The 10 pin IDC headers do NOT have the standard pinout required for a direct connection to a 9 way D type connector 4 2 4 Flash memory device The Xilinx Spartan 3 FPGA is coupled to a 64Mbytes of flash to enable configuration of FPGA only modules or to store DSP applications and additional FPGA configuration files bitstreams A separate MicroSD Transflash socket connects directly to the FPGA No FPGA IP core is provided as standard However with the addition of a MicroBlaze processor a full FAT file system may be implemented 4 2 5 JTAG IN and JTAG OUT LVTTL I Os connectors An XDS510 560 compatible 14 way 0 1 pitch DIL pin header is provided to enable debugging of a DSP module using Texas Instruments Code Composer Studio A JTAG OUT connector can be used to chain this carrier with any other Sundance ca
8. signals are simply connected from the top TIM side to the bottom This allows access to the TIM s underside RSL signals 4 2 9 External power supply connector A single 12Vdc power source is needed to power the SMT111 carrier board On board converters provide the following voltages Table 3 Power converters Ratings This is sufficient power to provide up to 80Watts of power for FPGA TIMs if Vcore is derived from 5V User Manual SMT111 Page 11 of 18 Last Edited 21 05 2010 16 53 00 The power input connector Molex 39 28 1083 MINI FIT 8 way pin out is shown here 12V GND 5 0 Zeie ra ET Tele vx sagege GND 12Vdc Figure 2 12Vdc Power Supply connector pinout 4 2 10 User LEDs There are four user LEDs directly connected to the FPGA D1 D2 D3 and D4 Figure 3 User LEDs The default Xilinx Spartan 3 FPGA firmware provided by default with the SMT111 drives the LEDs to monitor some health status This feature is coded in the FPGA firmware and cannot be switched off unless the firmware is modified When powering off and then powering on the SMT111 carrier board the Xilinx Spartan 3 FPGA located on the SMT111 configures from a Xilinx PROM Once the configuration is successful you should see a red LED flashing at regular intervals the first LED down from the USB connector You should also see D1 D2 D3 and D4 ON They are the 4 LEDs next to the power connector J P2 4 2
9. terface to 12Vdc Power connector to power the carrier board TIM connectors to plug any of TIM module USB 2 0 to interface to a computer laptop host based system JTAG IN and JTAG OUT to access any TI DSP processor Four RS232 accessible from the Xilinx Spartan 3 FPGA or the USB controller Reset push button to re initialise the carrier board One Rocket IO Serial Link RSL accessible either from top bottom Xilinx J TAG Header to access the Xilinx devices through the JTAG chain Sundance Local Bus SLB FPGA mezzanine slot with SLB power connector MicroSD Flash socket User Manual S Page 5 of 18 Last Edited 21 05 2010 16 53 00 2 Related Documents 2 1 Referenced Documents Sundance Local Bus SLB specification document Sundance Rocket IO Serial Link RSL specification document Texas Instruments Module TIM specification document Comport specification document Similar products SMT 148 FX Standalone carrier board with 4 module sites and I O facilities SMT 118 Standalone carrier board with 3 module sites and I O facilities SMT 180 Standalone carrier board with 8 module sites 2 2 Applicable Documents SMT 6300 Driver package with support for the SMT111 carrier board USB interface SMT 6002 Flash programming utility tool for FPGA only modules SMT 6048 Host side software functions and API for the USB 2 0 interface 3 Acronyms Abbreviations and Definitions 3 1 Acron
10. yms and Abbreviations Rocket IO Serial Link UART Universal Asynchronous Receiver Transmitter Universal Serial Bus 4 Functional Description 4 1 Block Diagram Figure 1 SMT 111 Block Diagram 4 2 Module Description 4 2 1 Xilinx FPGA device The primary controlling device on the SMT111 is a Xilinx Spartan 3 XC3S200 FPGA This device has a speed grade of 4 and it is an FTG256 package The main feature of this FPGA device is to provide the interface between a TIM Comport the USB and the UART controllers The FPGA design for the USB interface is used on the SMT111 carrier board and allows applications 3L Diamond applications to be downloaded to the TIM For UART configurations a simple protocol may be used to access the internal registers The FPGA operating mode flash programming USB and UART in controlled via a 4 way switch In normal operation this Spartan 3 FPGA device is configured by a Xilinx PROM XCFOAS It may also be accessed and configured via a Xilinx compatible JTAG header 4 2 2 USB 2 0 controller device A Cypress CY 7C68013A is used to implement a USB 2 0 interface The Cypress part in addition to providing USB functions with a FIFO type interface also contains a UART and an 8051 micro controller This device operates with the Xilinx Spartan 3 FPGA to provide a communication path to the TIM via Comport link 3 Comport 3 This interface can operate at rates up to 48MBytes
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