isl54406 - ISL54406 - Stereo Click and Pop Eliminator with
Contents
1. TEMP MIN MAX PARAMETER TEST CONDITIONS C Notes 12 13 TYP Notes 12 13 UNITS ANALOG SWITCH CHARACTERISTICS Analog Input Signal Range Vpp 3 3V Vsel2 1 4V Vse 1 1 4V Full 1 5 1 5 V VANALOG ON Resistance FON VDD 3 0V VsEL2 1 4V VSEL1 LAN 25 2 5 2 8 Ixout 40mA Vin or Van 0 85V to 0 85V See Figure 2 Note 16 Full S 4 0 ron Flatness rFLAT ON Vpp 3 0V VseL2 LAN VseL1 1 4V 25 2 ma IxouT 40mA Vin or Van 0 85V to 0 85V Notes 14 16 Full i i ma ron Matching Between Vpp 3 0V VseL2 LAN VseL1 1 4V 25 0 09 0 25 Channels Aron IxouT 40mA Mumw or Vern Voltage at max ron Over signal range of 0 85V to Full R 0 35 0 85V Note 15 16 Discharge Pull Down Vpp 3 6V VseL2 LAN Vse1 1 4V 25 240 kQ Resistance Ru RR VrouT Or VLouT 0 85V 0 85V Measure current through the discharge pull down resistor and calculate resistance value Click and Pop Discharge VDD 3 0V VsEL2 04 VsELi 1 4V 25 35 Q Resistance VinL or V INR 0 85V 0 85V Measure current through the Click and Pop discharge resistance and calculate resistance value FN6578 1 4 intersil July 14 2010 ISL54406 Electrical Specifications 2 7V to 3 6V Supply Test Conditions Vpp 3 0V GND OV VseLx H 1 4V VsSELx L 0 5V Notes 11 Unless Otherwise Specified Continued Boldface limits apply over the operat2. L10 1 8x1 4A 10 LEAD ULTRA THIN QUAD FLAT NO LEAD PLASTIC PACKAGE Rev 5 3 10 EL 1 80 A B 1 e Ari 1 Y INDEX AREA 0 70 gt heer ae S i 8 5 4X 0 30 0 10 C 1 2X 7 6 6X 0 40 TOP VIEW BOTTOM VIEW SEE DETAIL X o 10 c MAX 0 55 Cc 9 X 0 60 T j SEATING PLANE 1 CA 0 08 C 10X 0 20 3 10 0 70 SIDE VIEW A EE Ale ees 4 A L L I fae eels 8 R 0 1 27 REF 4X 0 30 LA e D STT d 1 6X 0 40 PACKAGE OUTLINE L 9 0 05 TYPICAL RECOMMENDED LAND PATTERN DETAIL X NOTES 1 Dimensions are in millimeters Dimensions in for Reference Only 2 Dimensioning and tolerancing conform to ASME Y14 5m 1994 3 Unless otherwise specified tolerance Decimal 0 05 Dimension applies to the metallized terminal and is measured between 0 15mm and 0 30mm from the terminal tip 5 JEDEC reference MO 255 The configuration of the pin 1 identifier is optional but must be located within the zone indicated The pin 1 identifier may be either a mold or mark feature 15 H FN6578 1 intersil July 14 2010 ISL54406 Thin Dual Flat No Lead Plastic Package TDFN B TOP VIEW B 1 0 10 Cc A E y A Jo 08 c Cc SIDE VIEW A3 SEATING PLANE DATUM B INDEX UY AREA NX k OL DATUM A
3. me Nd 1 Xe gt 0 10 clale REF W BOTTOM VIEW E Ser NX Kee L1 AdS a e SECTION C C cc TERMINAL TIP FOR ODD TERMINAL SIDE L10 3x3A 10 LEAD THIN DUAL FLAT NO LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL MIN NOMINAL MAX NOTES A 0 70 0 75 0 80 A1 0 05 A3 0 20 REF b 0 20 0 25 0 30 5 8 D 2 95 3 0 3 05 D2 2 25 2 30 2 35 7 8 E 2 95 3 0 3 05 E2 1 45 1 50 1 55 7 8 e 0 50 BSC k 0 25 L 0 25 0 30 0 35 8 N 10 2 Nd 5 3 Rev 4 8 09 NOTES 1 Dimensioning and tolerancing conform to ASME Y 14 5 1994 Nis the number of terminals Nd refers to the number of terminals on D All dimensions are in millimeters Angles are in degrees ar WN Dimension b applies to the metallized terminal and is measured between 0 15mm and 0 30mm from the terminal tip 6 The configuration of the pin 1 identifier is optional but must be located within the zone indicated The pin 1 identifier may be either a mold or mark feature 7 Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance 8 Nominal dimensions are provided to assist with PCB Land Pattern Design efforts see Intersil Technical Brief TB389 9 Compliant to JEDEC MO 229 WEED 3 except for D2 dimensions 2 30 me 10X 0 50 1 50 2 90 hor Pin oe ate 8x 0 a 10X 0 25 TYPICAL REC
4. Low THD THD N at imW into 320 Load lt 0 02 e Click and Pop Elimination gt 60dB e Audio Muting 002s gt 110dB e Low Power Consumption 21uW with 3V supply Low Power Shutdown Mode 1 8V Logic Compatible Available in 10 Ld TDFN 3mmx3mm or tiny 10 Ld 1 8mmx1 4mm yTQFN Package Pb Free RoHS Compliant Applications Consumer Entertainment Systems MP3 and other Personal Media Players Cellular Mobile Phones PDA s Audio Switching and Muting Related Literatu re see page 14 e Technical Brief TB363 Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices SMDs e Application Note AN1368 ISL54406EVAL1Z Evaluation Board User s Manual HCONTROLLER July 14 2010 1 FN6578 1 CAUTION These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures 1 888 INTERSIL or 1 888 468 3774 Intersil and design is a registered trademark of Intersil Americas Inc Copyright Intersil Americas Inc 2008 2010 All Rights Reserved All other trademarks mentioned are the property of their respective owners V r Ul A D 6 ISL54406 Pin Configurations note 1 ISL54406 ISL54406 10 Ld 3x3 TDFN 10 Ld 1 8x1 4 pTQFN TOP VIEW TOP VIEW voD 1 SEL2 gt RIN LOUT GND ROUT 3 ROUT GND NOTE 1 ISL54406 Swit
5. 6057 100 200 500 ik 2k 5k 10k 20k FREQUENCY Hz FREQUENCY Hz FIGURE 13 INSERTION LOSS FIGURE 14 OFF ISOLATION 40r g V t 1V DIV DD 60 T C 3 B 80 S S S i Q 100 lt N E a o lt gt 120 Vin 1 5V S F L SEL1 SEL2 OV z E v 140 R 32Q oer Vin 0 2Vp p TO 2Vp p D TT EE 20 100 200 500 ik 2k 5k 10k 20k TIME s 200ms DIV FREQUENCY Hz FIGURE 15 CROSSTALK FIGURE 16 POWER UP POWER DOWN CLICK AND POP TRANSIENT 12 H FN6578 1 intersjl July 14 2010 ISL54406 Typical Performance Curves Ta 25 C Unless Otherwise Specified Continued VOLTAGE V 200mV DIV A NARI TIME s 100ms DIV FIGURE 17 20kQ CLICK AND POP REDUCTION Die Characteristics SUBSTRATE AND TDFN THERMAL PAD POTENTIAL POWERED UP GND TRANSISTOR COUNT 98 PROCESS Submicron CMOS VOLTAGE V SEL2 VINR 2V DIV VRIN 200mV DIV VROUT 200mV DIV TIME s 100ms DIV FIGURE 18 320 CLICK AND POP REDUCTION 13 imtersil FN6578 1 July 14 2010 ISL54406 Revision History The revision history provided is for informational purposes only and is believed to be accurate but not warranted Please go to web to make sure you have the latest Rev DATE REVISION CHANGE 06 4 10 FN6578 1 On page 3 added evaluation board part numbe
6. 8 1 intersjil July 14 2010 ISL54406 Test Circuits and Waveforms continued FLOAT FLOAT OV TO 3 0V DC STEP OR 3 0V TO OV DC STEP SEL1 SEL2 VDD ine LOUT 20kQ 1 5V Power Supply Turn On Turn Off Click and Pop Transient Test Ka See Figure 17 FIGURE 6 CLICK AND POP TEST CIRCUIT 42 8 imtersil FN6578 1 July 14 2010 ISL54406 Application Block Diagram LEFT SPEAKER RIGHT SPEAKER Detailed Description The ISL54406 device is a dual single pole single throw SPST analog switch that operates from a single DC power supply in the range of 2 7V to 5V It was designed to function as a transient suppressor to eliminate Click and Pop noise on headphones It comes in a 10 Ld 3mmx3mm TDFN or a tiny 10 Ld 1 8mmx1 4mm UTQFN package for use in MP3 players PDAs cellphones and other personal media players The part consist of a pair of 2 59 audio switches The audio switches can accept signals that swing below ground by as much as 1 5V They were designed to pass audio left and right stereo signals that are ground referenced with minimal distortion The ISL54406 was specifically designed for MP3 players personal media players and cellphone applications that require but do not have Click and Pop elimination See Application Block Diagram on page 9 The ISL54406 contains logic control pins SEL1 and SEL2 that will determine the state of the switch See the Truth Table on pa
7. AT LOAD 0 056 20 200 2k 20k 20 200 2k 20k FREQUENCY Hz FREQUENCY Hz FIGURE 9 THD N vs SUPPLY VOLTAGE vs FREQUENCY FIGURE 10 THD N vs SIGNAL LEVELS vs FREQUENCY 0 20 RLoaAp 322 RLoap 322 E FREQUENCY 1kHz FREQUENCY ikHz Vpp 3V Vpp 3V 0 10 0 10 0 08 0 08 0 06 T 0 06 0 04 gt z z 0 04 I 0 02 I 0 03 E E 0 01 0 02 0 01 0 003 0 008 0 12 0 23 0 35 0 47 0 58 0 70 0 82 0 93 1 05 1 16 1 2 3 4 5 6 7 8 9 10 20 30 OUTPUT VOLTAGE Vrms OUTPUT POWER mW FIGURE 11 THD N vs OUTPUT VOLTAGE FIGURE 12 THD N vs OUTPUT POWER 11 i D FN6578 1 intersjl July 14 2010 ISL54406 Typical Performance Curves Ta 25 C Unless Otherwise Specified Continued lo 40 e CLICK AND POP MODE m 60 a 0 5 S e E 5 80 L D 0 L a a ot 1 0 5 N 100 H y L MUTE MODE z amp 1201 1 5 S Vop 3V 140 R 322 Ri 322 Vin 0 707 Vrms Vin 0 2Vp p TO 2yp p 2 0 160L l 20 100 200 500 ik 2k 10k 20k 1
8. ISTICS Power Supply Range Vpp Full 2 7 3 6 V Positive Supply Current Ipp Vpp 3 6V VseL2 LAN VseLi 1 4V 25 7 10 HA Full 7 15 HA Shutdown Current Ishpn Vpp 3 6V VseL2 Float Vse 1 Float 25 50 nA DIGITAL INPUT CHARACTERISTICS SELx Voltage Low Vse_x_L Vpp 2 7V to 3 6V Full 0 5 V SELx Voltage High VsELx_H VDD 2 7V to 3 6V Full 1 4 V Input Low Current IseL2L Vpp 3 6V VseL2 OV or Float Full 20 2 20 nA IsELiL VseLi OV or Float FN6578 1 5 Interna July 14 2010 ISL54406 Electrical Specifications 2 7V to 3 6V Supply Test Conditions Vpp 3 0V GND OV VseLx H 1 4V VsSELx L 0 5V Notes 11 Unless Otherwise Specified Continued Boldface limits apply over the operating temperature range 40 C to 85 C Continued TEMP MIN MAX PARAMETER TEST CONDITIONS C Notes 12 13 TYP Notes 12 13 UNITS Input High Current IseL2H Vpp 3 6V VseL2 3 6V VseEL1 3 6V Full 2 1 2 HA ISEL1H SEL1 Pull Down Resistor Vpp 3 6V VseL2 3 6V VseL1 OV Full 4 MQ RSEL1 SEL2 Pull Down Resistor Vpp 3 6V VseL2 OV VseELi 3 6V Full 4 MQ RSEL2 NOTES 11 VseLx Input voltage to perform proper function 12 The algebraic convention whereby the most negative value is a minimum and the most positive a maximum is used in this data sheet 13 Parameters with MIN and or MAX limits are 100 tested at 25 C unless ot
9. OMMENDED LAND PATTERN 16 imtersil FN6578 1 July 14 2010
10. ches Shown for SEL1 Logic 1 and SEL2 Logic 1 Truth Table Pin Descriptions ISL54406 ISL54406 Lin Lsnunt CLICK TDFN pTQFN NAME FUNCTION SEL2 SEL1 RIN RsHunT AND POP MODE 1 10 VDD Power Supply 0 0 OFF OFF Inactive Shutdow 2 1 SEL2 Logic Control 2 n 3 2 LOUT Audio Left Output 0 1 OFF ON Active Click and 4 3 ROUT Audio Right Output Pop 5 4 GND IC Ground Connection 1 0 OFF ON Inactive Mute 6 5 RIN Audio Right Input 1 1 ON OFF Inactive Audio 7 6 LIN Audio Left Input SEL1 and SEL2 Logic 0 when lt 0 5V Logic 1 when gt 8 9 7 8 N C No Connection 1 4V 10 9 SEL1 Logic Control 1 PD PD Thermal Pad Tie to Ground or Float 2 2 e FN6578 1 _ntersil July 14 2010 ISL54406 Ordering Information PART TEMP RANGE PACKAGE PKG NUMBER PART MARKING C Pb Free DWG ISL54406IRUZ T Notes 2 3 6 40 to 85 10 Ld 1 8x1 4 uTQFN L10 1 8x1 4A ISL54406IRTZ Note 4 4406 40 to 85 10 Ld 3x3 TDFN L10 3x3A ISL54406IRTZ T Notes 2 4 4406 40 to 85 10 Ld 3x3 TDFN L10 3x3A ISL54406EVAL1Z Evaluation Board NOTES 2 Please refer to 1B347 for details on reel specifications 3 These Intersil Pb free plastic packaged products employ special Pb free material sets molding compounds die attach materials and NiPdAu plate e4 termination finish which is ROHS compliant and compatible with both SnPb and Pb free soldering operations Intersil Pb free products are MSL cla
11. ge 2 for a description of each state A detailed description of the audio switches are provided in the section that follows Audio Switches The two 2 50 audio switches L R are designed to pass signals that swing 1 5V above and below ground Crosstalk between the audio switches is 90dB over the audio band These switches have excellent off isolation of 110dB over the audio bandwidth with a 320 load Over a signal range of 1V 0 707Vrms with Vpp gt 2 7V these switches have an extremely low roy resistance variation 0 030 They can pass ground referenced audio signals with very low distortion lt 0 04 THD N when delivering 4mW into a 320 e RsHUNT 0 iuF HCONTROLLER ISL54406 headphone speaker load See Figures 10 11 12 and 13 for THD N performance curves The audio drivers should be connected at the LIN and RIN side of the switch and the speaker loads should be connected at the LOUT and ROUT side of the switch for proper Click and Pop elimination The switches have Click and Pop circuitry on the LIN and RIN side that is activated when the SEL1 pin is driven High and SEL2 pin is driven Low The audio switches are turned OFF in this state The ISL54406 should be put in this mode before powering down or powering up of the audio source drivers The high off isolation of the audio switches along with the Click and Pop circuitry will prevent the transients generated during power up and power down of the audio so
12. herwise specified Temperature limits established by characterization and are not production tested 14 Flatness is defined as the difference between maximum and minimum value of ON resistance over the specified analog signal range 15 ron matching between channels is calculated by subtracting the channel with the highest max ron value from the channel with lowest max ron value 16 Limits established by characterization and are not production tested 17 Click and Pop Reduction specifications are limited by test equipment Test Circuits and Waveforms VSEL2H ty lt 20ns LOGIC tf lt 20ns INPUT VSEL2L SWITCH v INPUT INPUT SWITCH OUTPUT oy Repeat test for all switches C includes fixture and stray capacitance R L Vout VANPUT R Fran RL Ton FIGURE 1A MEASUREMENT POINTS FIGURE 1B TEST CIRCUIT FIGURE 1 SWITCHING TIMES 6 P e FN6578 1 ntersil July 14 2010 ISL54406 Test Circuits and Waveforms continued VDD Repeat test for all switches ron V1 40mA SIGNAL SEL1 LIN OR RIN LOUT OR ROUT FIGURE 2 ron TEST CIRCUIT FIGURE 3 OFF ISOLATION CIRCUIT SIGNAL GENERATOR 320 1 ROUT OR RINORLIN LOUT OVDC TO 3VDC STEP 1Hz OV TO 1 5V DC STEP OR 1 5V TO OV E DC STEP 1Hz SEL2 Waveform Rising Edge 100ms after OV to 1 5V DC Step Falling Edge 100ms before 1 5V to OV DC Step See Figures 18 and 19 FIGURE 5 CLICK AND POP TEST CIRCUIT 1 7 H H FN657
13. ing temperature range 40 C to 85 C Continued TEMP MIN MAX PARAMETER TEST CONDITIONS C Notes 12 13 TYP Notes 12 13 UNITS DYNAMIC CHARACTERISTICS Turn ON Time ton Vpp 2 7V VseL1 2 7V RL 500 25 5 z us Ci 10pF See Figure 1 Turn OFF Time torr VDD 2 7V VseLi 2 7V RL 500 25 S 45 ns Ci 10pF See Figure 1 OFF Isolation Mute Mode Vpp 3 0V VseL2 OV VseELi 3 0V 25 110 dB Vin or Vpm 0 707Vrms Ri 320 f 20Hz to 20kHz See Figure 3 Vpp 3 0V VseL2 OV VseL1 3 0V 25 110 dB Vin or Vpm 0 707Vrms RL 20kQ f 20Hz to 20kHz See Figure 3 Crosstalk VDD 3 0V VsEL2 3 0V VsEL1 3 0V 25 90 dB Rin to Lour Lin to Rout RL 320 f 20Hz to 20kHz V p or VRIN 0 707Vrms 2Vp p See Figure 4 Total Harmonic Distortion Vpp 3 0V f 20Hz to 20kHz 25 7 0 03 VseL2 3 0V VseL1 3 0V MN or VRIN 0 36Vrms 1Vp p RL 320 Vpp 3 0V f 20Hz to 20kHz 25 0 06 VsEL2 3 0V VsEL1 3 0V VLIN or Vrin 0 707Vpms 2Vp p RL 320 Click and Pop Reduction Vpp 3 0V VseL1 3 0V Vse_2 OVto 25 gt 60 S dB Note 17 3 0V DC step Ry 20kQ Vip or Vmwp OVDC to 1 5VDC step see Figure 6 Vpp 3 0V VseLi 3 0V Vse_2 OV to 25 gt 70 dB 3 0V DC step RL 320 Vip or VinrR OVDC to 1 5VDC step see Figure 6 POWER SUPPLY CHARACTER
14. intersil Stereo Click and Pop Eliminator with Audio Muting ISL54406 The Intersil ISL54406 is a Dual SPST Single Pole Single Throw switch that provides a very low distortion audio path for a stereo headphone or high impedance line in load This path can be interrupted to provide gt 110dB of off isolation for signal muting purposes into 32Q or high impedance loads such as consumer entertainment system line inputs MP3 docking systems for powered speaker or automotive entertainment system in line or cassette interfaces Recovery from muting is instant even with very large DC blocking capacitors The ISL54406 also has comprehensive Click and Pop elimination measures to prevent these artifacts from occurring in the load due to system power up power down codec enable disable headphone hot plug in and audio muting on off situations The Click and Pop elimination is effective into low and high impedance loads and requires no external timing components to deal with DC blocking capacitors placed between the single supply codec and the load The ISL54406 is available in a 10 Ld TDFN 3mmx3mm or a tiny 10 Ld pTQFN 1 8mmx1 4mm ultra thin package It operates over a temperature range of 40 to 85 C Application Block Diagram 0 ipuF 3 3V ISL54406 LOGIC CONTROL eg AND POP Seel CIRCUITRY Features e Single Supply Operation Vpp 2 7V to 5 0V e Negative Signal Swing Capability 1 5V e
15. pins are Logic 0 the device will enter a low powered Shutdown SHDN Mode In SHDN the audio switches are OFF the 6Q path is high impedance the Click and Pop circuitry is inactive and the device will draw a typical supply current of 5nA Note When the logic inputs are floated the ISL54406 will automatically be placed in SHDN mode due to the internal 4MQ pull down resistors on the logic pins Note In Shutdown Mode the Off Isolation of the audio switch degrades in performance compared to Audio Mute Mode In SHDN the negative charge pumps that permit the signal to swing below ground are turned off to reduce power consumption thus any negative signal swing at the LIN and RIN will appear at the LOUT and ROUT pins The device should not be placed into SHDN when the source is still active or for high Off Isolation performance CLICK AND POP OPERATION Single supply audio sources are biased at a DC offset that generates transients during power on off of the source This DC transient is coupled into the load through a blocking capacitor see Application Block Diagram on page 9 When the source is off and suddenly turned on with a DC offset the capacitor will develop a voltage across it that is equal to the DC offset If the switch is in Audio mode when this occurs a transient discharge will occur in the speaker generating a Click and Pop noise Proper elimination of Click and Pop transients requires that the ISL54406 be
16. placed in Click and Pop Mode before the audio source is turned on or off This allows any transients generated by the source to be discharged through the Click and Pop circuitry first With a typical DC blocking capacitor of 220uF and the Click and Pop circuitry designed to have a resistance of 350 allowing a 100ms dead time for discharging a transient before placing the switch in Audio mode will eliminate the DC transient generated by the blocking capacitor Note The ISL54406 should not be brought into Audio Playback Mode directly from Shutdown Mode and vice versa A DC transient may occur at the LOUT ROUT pins when brought from Shutdown directly to Audio Playback mode The recommended procedure is to place the ISL54406 into Mute mode for at least 100ms when entering or leaving Audio Playback mode Power supply considerations The power supply connected at Vpp and GND provides power to the ISL54406 part In a typical application Vpp will be in the range of 2 7V to 5 0V and will be connected to the battery or LDO of the MP3 player or cellphone A 0 1pF local decoupling capacitor should be placed near the Vpp pin of the IC to eliminate power supply transients Before power up and power down of the ISL54406 part the SEL1 and SEL2 logic control pins should be driven to Logic 0 or left floating In a high impedance state 4MQ internal pull down resistors on the SEL1 and SEL2 pins will set the ISL54406 logic pins to 0 This will
17. put the switch in the SHDN state which turns all switches OFF and deactivates the Click and Pop circuitry which will minimize power supply currents and increase battery life 10 imtersil FN6578 1 July 14 2010 ISL54406 Typical Performance Curves Ta 25 C Unless Otherwise Specified 2 61 4 0 Tout 40mA 3 8 _ E a 85 C 2 60 224 VDD 2 7 3 6 La SE See VDD 3 0 3 2 VDD 3 0V z 2 59 TO a ma 3 0 8 S gt gt 2 8 O VDD 3 3 O Ae L 2 58 H KEE 2 4 2 2 2 57 VDD 3 6 2 0 O O o re e e e 1 8 40 C 2 56 e DEE PRES IE E PEE IE PLO E PR O 1 0 0 8 0 6 0 4 0 2 O 02 0 4 0 6 0 8 1 0 1 2 1 0 0 8 0 6 0 4 0 2 O 0 2 0 4 0 6 0 8 1 0 1 2 Vout V Vout V FIGURE 7 ON RESISTANCE vs SWITCH VOLTAGE vs FIGURE 8 ON RESISTANCE vs SWITCH VOLTAGE vs SUPPLY VOLTAGE TEMPERATURE 0 068 0 10 RLoap 322 1 06VRMS r Vv 0 707V E Gu VLOAD RMS i 0 884V ams 0 09 a meee i 0 707VRMS NIN a Zemools gt E Vpp 2 7V e BEE z coe AAA E O ps F Vpp 3 6V z E L 0 04 0 060 0 354VRMS 0 02 0 058 t Rioap 322 F Vpp C L RMS VOLTAGES
18. r to Ordering Information table On page 4 in Thermal Information changed HTQFN theta JC value from 62 to 105 Added Notes 7 and 8 to reference uTQFN package On page 5 changed Shutdown Current ISHDN limit from 5nA to 50nA Converted to new Intersil template Changes include Added Note 5 to Ordering Information on page 3 Pin Descriptions on page 2 updated to show the thermal pad Absolute Maximum Ratings on page 4 added latch up level Added boldface limits text in conditions of Spec Table and bolded Min and Max over temp Limits Updated Over temp Note to meet standard verbiage Added Products on page 14 Added Revision History on page 14 5 28 08 FN6578 0 Initial Release Products Intersil Corporation is a leader in the design and manufacture of high performance analog semiconductors The Company s products address some of the industry s fastest growing markets such as flat panel displays cell phones handheld products and notebooks Intersil s product families address power management and analog signal processing functions Go to www intersil com products for a complete list of Intersil product families For a complete listing of Applications Related Documentation and Related Parts please see the respective device information page on intersil com ISL54406 To report errors or suggestions for this datasheet please go to www intersil com askourstaff FIT
19. s are available from our website at http rel intersil com reports search ph For additional products see www intersil com product_tree Intersil products are manufactured assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www intersil com design quality Intersil products are sold by description only Intersil Corporation reserves the right to make changes in circuit design software and or specifications at any time without notice Accordingly the reader is cautioned to verify that data sheets are current before placing orders Information furnished by Intersil is believed to be accurate and reliable However no responsibility is assumed by Intersil or its subsidiaries for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries For information regarding Intersil Corporation and its products see www intersil com 14 P e FN6578 1 _ntersil July 14 2010 ISL54406
20. ssified at Pb free peak reflow temperatures that meet or exceed the Pb free requirements of IPC JEDEC J STD 020 4 These Intersil Pb free plastic packaged products employ special Pb free material sets molding compounds die attach materials and 100 matte tin plate plus anneal e3 termination finish which is ROHS compliant and compatible with both SnPb and Pb free soldering operations Intersil Pb free products are MSL classified at Pb free peak reflow temperatures that meet or exceed the Pb free requirements of IPC JEDEC J STD 020 5 For Moisture Sensitivity Level MSL please see device information page for ISL54406 For more information on MSL please see techbrief TB363 3 intersil FN6578 1 July 14 2010 ISL54406 Absolute Maximum Ratings VDD to GND pe vin GG ee ee eee Vibe ee ok Input Voltages Lin Rin Note 6 2V to Vpp 0 3V SEL1 Note 6 aasa aaaaaa 0 3V to Vpp 0 3V SEL2 Note 6 0 3 to Vpp 0 3V Output Voltages 0 3 to 5 5V Thermal Information Thermal Resistance Typical Dun C W De C W 10 Ld UTQFN Note 7 8 160 105 10 Ld TDFN Notes 9 10 55 18 Maximum Junction Temperature Plastic Package 150 C Maximum Storage Temperature Range 65 C to 150 C Pb free reflow profile see link below http www intersil com pbfree Pb FreeReflow as Lour Rout Note 6 2V to Vpp 0 3V Continuo
21. urce from getting through to the headphones thus eliminating Click and Pop noise in the headphones The audio switches are turned ON and the Click and Pop circuitry disabled whenever SEL1 and SEL2 is driven High ISL54406 Operation The discussion that follows will describe using the ISL54406 in the Application Block Diagram on page 9 LOGIC CONTROL The state of the ISL54406 device is determined by the logic level at the SEL1 and SEL2 pins The part has four states or modes of operation The Audio Playback Mode Audio Mute Mode Click and Pop Mode and Shutdown Mode Refer to Truth Table on page 2 for the logic state of each mode of operation The SEL1 and SEL2 pins are internally pulled low through 4MQ resistors to ground and can be left floating to pull the logic pins Low Logic Control Voltage Levels SEL1 and SEL2 Logic 0 Low when lt 0 5V or Floating SEL1 and SEL2 Logic 1 High when gt 1 4V 9 imtersil FN6578 1 July 14 2010 ISL54406 Audio Playback Mode If the SEL1 and SEL2 pins are Logic 1 the device will be in the Audio Playback mode In Audio Playback mode the LIN left and RIN right 2 5Q audio switches are connected to LOUT and ROUT respectively and the audio Click and Pop circuitry is inactive high impedance When headphones are connected to the LOUT and ROUT outputs of the ISL54406 the audio source drives the headphones with low distortion audio Audio M
22. us Current A 150mA Peak Current Pulsed ims 10 Duty Cycle Max 300mA ESD Rating Human Body Model gt 5kV Machine Model oooooooooooo gt 300V Charged Device Model oooo gt 1 5kV Latch up Tested per JEDEC Class II LevelA at 85 C Operating Conditions Temperature Range 40 C to 85 C CAUTION Do not operate at or near the maximum ratings listed for extended periods of time Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty NOTES 6 Signals on LIN RIN LOUT ROUT SEL1 and SEL2 exceeding Vpp or GND by specified amount are clamped Limit current to maximum current ratings 7 Dua is measured with the component mounted on a high effective thermal conductivity test board in free air See Tech Brief TB379 for details 8 For jc the case temp location is taken at the package top center 9 ja is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach features See Tech Brief TB379 10 For 0jc the case temp location is the center of the exposed metal pad on the package underside Electrical Specifications 2 7V to 3 6V Supply Test Conditions Vpp 3 0V GND OV VseLx H 1 4V VseLx L 0 5V Notes 11 Unless Otherwise Specified Boldface limits apply over the operating temperature range 40 C to 85 C
23. ute Mode If SEL1 is Logic 0 and SEL2 is Logic 1 the device will be in the Audio Mute Mode In Audio Mute Mode the audio switches are OFF high impedance the audio Click and Pop shunt circuitry is OFF high impedance and the LOUT and ROUT pins are shorted through 60 resistors to ground Off Isolation performance in Audio Mute Mode gives a 110 dB signal reduction across a 32Q load when driving with a 0 707Vrms signal at the switch input Click and Pop Mode Note Click and Pop Mode should not be used for audio muting applications In Click and Pop Mode a low impedance 350 path to ground at the LIN RIN inputs will degrade Off Isolation performance see Figure 14 If SEL1 is Logic 1 and SEL2 is Logic 0 the device will go into Click and Pop Mode This mode is optimal when powering up or down the audio sources In Click and Pop Mode the audio in line 2 50 switches are OFF high impedance The LOUT and ROUT pins are shorted through 6 resistors to ground and the LIN and RIN are shunted through 350 resistors to ground Click and Pop circuitry is active Before powering down or powering up of the audio source drivers the ISL54406 should be put in the Click and Pop Mode In Click and Pop Mode transients generated at the LIN and RIN pins due to a DC step voltage at the audio drivers will not pass through the ISL54406 audio switches preventing Click and Pop noise to the load Shutdown Mode If SEL1 and SEL2
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