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EVALSPEAr320CPU SPEAr320 CPU evaluation board

1. 8 7 6 5 4 3 2 1 PL GPIO 0 97 PL GPIO 0 97 V GPIO44 4 5 x a 2 8 658 i o b 3 CI 16 ER b 4 VE 8 3 gt s 15 0 1 uF XSR 10V PL GPIOIS 39 amp 4o40 GPIOS C56 ap E 4 TH TPS ev g 4 TH TP6 100 w a 2 46 TH TP7 C57 11 14 48 TH TP8 TO Tiuri a 5V T2IN T20UT 0 1 uF XSR 10V 12 13 T RIOUT RIIN 6 4 R2OUT R2IN INRESET nRESET ST3232C 3 PL GPIO2 PL GPIO3 1 m 2 GPIO2 GPIO3 E a STRIP 2X2 2 54 MD me E m DI STRIP 3X1 STRIP 3X1 ul PL GPIO2 4 GB RS232 RXD La GB5 GB10 737 3 e FIDUCIAL 79 SAMTEC MIS 038 9 B10 3 3V IDC 5X2 MD POL PL GPIO47 GPIO63 2 4 E 3 AIN 0 7 PL GPIO77 39 40 PL GPIO94 B wu 11 1 FIDUCIAL 12 ADC_VREFP gt CLK L A4 PL CLK L 82 FIDUCIAL Spear300 CPU Board 3 9 GB5 GBIO Title DaughterBoard interface 23 SAMTEC MIS 038 Date 20 Oct 2009 Gode Shoat 7 of g 8 7 6 5 4 3 2 1 SLOLINN sonewouyos 86 06 o m lt Figure 13 Schematic revision history 2
2. 8 7 6 5 4 3 2 1 T cso iw SMI DATAOUT 15 8 SMI DATAIN 1 Kohm SMT CIK gis spop mman JTAG Connector S SM wE 1 Kohm M n ____ 0 CSEL r 3 d NC NCH 2 1 j 2 1 LS da IDE HH Mi au ERIT LI E 827 IMS IMS 15 TMS SMI DATAOUT FS TE 33vHp ee GND 108 9 BIK 35 201 TDO cso MIS no MAB POWERGOOD E SMrcsi 16 1S TESTO K16 18 17 TESTO AIN 0 7 0 1 uF XSR 10V 8781 1679 42 KITE 4 ADC _ TEST2 AINO a gt PE 72 TESTS 8 AINI ADC VREFN sav CS4 2 0 Ohm AM B BOOT SEL J14 AIN3 d BOOT SEL SMI DATAOUE 8 SMI DATAIN E 2 4 AINS Kohm CER e 501 spo SMIRWET 9 CLK C78 2 AIN7 Cae gt 4 x RTC XI A P14 VREFP 19 15 pF COG 50 Spea00 ADS RET HOLD ADC VREFN 25 SP idco a L p HHE pareke AVDD2V5 NIS ABC RR SINC NT m ADC AGND FERRITE NC E NC 3 El T n RTC XO 2 10 2 CH ee CR R 0603 0 OHM GND 2 5V_SP PL werk xi af RIC VDDivs TD 45 33 pF COG 50V 9 m MCLK VDD2V5 IUEXSRIOV a Monk 5 MCLK VDDIV2
3. Spear300 Board CPU Board Title Release note Rev Date 20 Oct 2009 Code Sheet Q of 8 sonewoyos UM1015 Board layout 7 Board layout Figure 14 SPEAr320 CPU evaluation board layout top view Expansion connector J13 Power J11 Reset button P1 21068 27 E Serial link J17 USB zi host J2 USB device J1 JTAG J3 105 6 3700 420 ad EY que 0 Ce a 5 e L Ia 2 TTD 0000000000 Expansion connector 12 TT masa Rit Riz Rid RIS R46 R79 R79 0000000000 Doc ID 18124 Rev 1 31 38 Revision history UM1015 8 8 1 8 2 32 38 Revision history Hardware revision history Revision 2 0 SPEAr320 CPU evaluation boards are documented in revision 1 of the EVALSPEAr320CPU user manual Earlier board revisions are documented in UM0842 the EVALSPEAr320PLC user manual Document revision history Table 9 Document revision history Date Revision Changes 22 Oct 2010 1 Initial release Doc ID 18124 Rev 1 UM1015 License agreements Appendix License agreements 2 DEMO PRODUCT LICENSE AGREEMENT By using this Demonstration Product You are
4. 155 AGNDI H3 AGND2 2 sav rmm AGND3 B vrTGND 22 V V V sy V _ 2207 vcc THERMAL 9 a n E ane n 4l 75 28 70 ST PWGGIT 1K Ohm 1K Ohm E E a 1K Ohm 680 Ohm 330 Ohm 6 7 pe 3 3 4 100 Ohm 100 Ohm a3 S D5 D6 Es 090 FIDUCIAL FIDUCIAL i 5 h GREEN GREEN GREEN GREEN GREEN gi Y ch cp 1 B K K a 2 2 C38 68 L L E E 1 DLE SSR0V 5 ES PDIDIZ3Y NPNPDIDIZIY Project Spear300 CPU Board Title Rey Power supply 2 3 Pate 20 Oct 2009 pem Bec 9 g SLOLINN 86 86 m lt Figure 11 Customization interface schematic 8 7 6 4 2 1 PL GPIO 0 9 SPIO O 97 PL_GPIO 0 97 12V SP 3 3V_SP ANN ____ UE H16 v 33y SP V 2 54 SP F8 ES 9199 E34 pL GPIo0 PL 61097 Hi a E 18 VDDIV2 1 VDD3V3 PL GPIO GPIO96 HH VDDIV22 VDD3V3 2 1 PL GPIO2 PL GPIO95 HT3 C94 C95 VDDIV23 VDD3V3 3 GPIO3 pa 47 uF Tan 10V 47 uF Tan 10V VDDIV2 4 gt VDD3V34 p PL GPIO3 PL GP
5. Revision History Revi on History Revision Descriptions Date Revision Descriptions Date Initial release C78 C79 connected to GND instead of 2 5V Add signal nRESET to daughter board connectors pinout to be defined Add three optionals USBLC6 013 U14 U15 for ESD protection Add optional STBP120B 016 for overvoltage protection Add two Spare Resistor for RTC Power R76 R77 Add four 3 2mm mechanical holes Add two GND pins on 32 768Khz oscillator for PCB footprint Changed daughter board connectors Tyco MICTOR instead Samtec QTH Made some cosmetic changes 1 20 May 2009 2 0 Change R49 Value to 56K ohm 23 Sep 2009 28 May 2009 2 1 Add TP30 for DQSI test Add J22 for serial cable jumper Use NC for no pop components 16 Oct 2009 2 2 Change R8 and R9 to 470 ohm remove NC and R51 and R52 to 0 ohm NC 20 Oct 2009 23 Made some cosmetic changes 20 Oct 2009 Changed daughter board connectors Samtec MIS instead Tyco MICTOR 10 June 2009 Add four 47uF capacitor C94 C95 C96 C97 25 June 2009 Remove UART Solution 1 at Page 7 Remove JTAG alternativ Optional part at Page 4 Add a 10uF capacitor at input pot of STBP120 C98 Add two net 5232 and RS232 TXD at Page 7 U12 pin 14 and U12 pinl3 these two net are connected to Pin40 and Pin42 of 113 Remove Test Point and Change footprint of D4 TS420 B fro
6. UM1015 License agreements 2 SOFTWARE LICENSE AGREEMENT This Software License Agreement Agreement is displayed for You to read prior to downloading and using the Licensed Software If you choose not to agree with these provisions do not download or install the enclosed Licensed Software and the related documentation and design tools By using the Licensed Software You are agreeing to be bound by the terms and conditions of this Agreement Do not use the Licensed Software until You have read and agreed to the following terms and conditions The use of the Licensed Software implies automatically the acceptance of the following terms and conditions DEFINITIONS Licensed Software means the enclosed demonstration software and all the related documentation and design tools licensed in the form of object and or source code as the case maybe Product means a product or a system that includes or incorporates solely and exclusively an executable version of the Licensed Software and provided further that such Licensed Software executes solely and exclusively on ST products LICENSE STMicroelectronics ST grants You a non exclusive worldwide non transferable whether by assignment law sublicense or otherwise revocable royalty free limited license to i make copies prepare derivatives works display internally and use internally the source code version of the Licensed Software for the sole and exclusive purpose of dev
7. 0 Reserved Table 6 Switch 1 functional configuration Test bit Functional configuration Configuration 3 Note When Switch SW1 x is in the ON position the bit value is 0 When Switch 1 is in the OFF position the bit value is 1 Bits 3 4 5 and 6 enable you to set the Functional configuration The default configuration is Configuration 3 For other configurations refer to the SPEAr320 user manual available at www st com spear Doc ID 18124 Rev 1 15 38 Switch and jumper settings UM1015 4 2 Switch 2 settings Table 7 Switch 2 settings Boot from SW2 1 SW2 2 SW2 3 SW2 4 SW2 5 SW2 6 SW2 7 SW2 8 USB BOOT Off On Off On Off On Off On ETH parameter from I2C ROM On Off Off On Off On Off On ETH parameter from SPI ROM Off On On Off Off On Off On Serial NOR default setting On Off On Off Off On Off On Parallel NOR 8 EMI with ACK Off On Off On On Off Off On Parallel NOR 16 EMI with On Off Off On On Off Off On ACK Parallel NAND 8 Off On On Off On Off Off On Parallel NAND 16 On Off On Off On Off Off On Reserved for SPI Off On Off On Off On On Off Reserved for On Off Off On Off On On Off UART BOOT Off On On Off Off On On Off BootROM bypass On Off On Off Off On On Off Parallel NOR 8 EMI without Off On Off On On Off On Off ACK Parallel NOR 16 EMI without On Off Off On On Off On off ACK Reserve
8. P2 xo DITH PLL AVDD 2V5 2 4 33 pF COG 50V DITH PIL vpp2v5 DITH PLL VDD Bi MRESET DITH PLL AVSS 2V5 Gl EBL 1 G4 DITH PIL vss2vs ee 2 DIGITAL REXT MCIK GND SUB 2 54 x F4 ai MCLK GND FB 3 STRIP 2X1 2 54 MD rp DIGITAL GND BCOMP RTC_GND 12V SP FERRITE Gi El L pea INRESET NE 125V_sP gt z 10 nF X7R 50V TE Aa m nRESET c31 c32 c33 2 MD cup T 2 nRESET 5 76 10 8 X7R 50 STM8L1 E z NC B 8 m 1 co Reset management 7 0 1 uF XSR 10V NPNBCMS 5 150 Kohm 0 1 uF XSR 10V D3 A K RTC Power Boot Sel D BAVO 4 an T TE zie Tio s MOLEX 1 25MM 2W M Enn an Spear300 CPU Board Title 2 DIP SWITCH MICRO 6X sun Miscellaneus interface Date 200ct2009 Code Sheet of 8 8 7 6 5 4 3 2 1 sonewoyos 181 JOg 8E LG Figure 10 Power supply schematic
9. HOSTI OVERCURAM USB_HOSTI_OVERCUR 2 L3 1 HOSTO 5V USB COMMON VSS H0 Vbus INF DM USB DVSS oDe p K5 N2 EE USB TXR TUNE USB DEV VSSa USB HOSTO VSSa Hl Vbus H SEELEN USB ANALOG TEST USB_HOST1_VSSa HI DM ipe g INE DP HI GND 4 Spear300 Shield1 27 Shield2 m Shield3 F3 Shield4 USB A TYPE RA DOUBLE EB2 _ KOW FERRITE 0603 EBU 4 Y L FERRITE 0603 sonewoyos SLOLINN UM1015 Schematics Figure 8 USB power and optional part schematic HOSTO VBUS HO VBU 0 1 uF XSR 10V 0 1 uF XSR 10V 0 1 uF XSR 10V USB Power 0 1 uF XSR 10V Optional part 1 01 02 102 USBLC6 Vbus GND 02 1 02 USBLC6 Vbus GND ST USBLC6 2SC6 HOSTO 5V HOSTI DM I D D VOl 101 Her LANE 02 1 02 USBLC6 Vbus GND ST USBLC6 28C6 Place C102 close to U13 5 VBus Place C101 close to U14 5 VBus Place C100 close to U15 5 Vbus HOSTI 5V 4 Doc ID 18124 Rev 1 25 38 86 96 ral8L dI JOg Figure 9 Miscellaneous interfaces schematic
10. PL_GPIO31 50 2 5V 51 PL GPIO32 52 2 5V 53 PL GPIO25 54 2 5V 55 PL GPIO22 56 2 5V 57 PL GPIO21 58 INRESET 59 PL GPIO17 60 nRESET 61 PL GPIO12 62 1 2V 63 PL GPIO10 64 1 2V 65 PL GPIO7 66 1 2V 67 PL GPIO1 68 1 2V 69 PL GPIOO 70 3 3 71 NC 72 3 3 73 NC 74 3 3 75 NC 76 3 3V 77 78 79 80 81 GND 82 GND 83 84 85 86 1 If J20 Jumper is set to pin2 3 otherwise 2 f J21 Jumper is set to pin2 3 otherwise NC 3 If J22 Jumper is set to pin2 4 and pin1 3 otherwise RS232 RX 4 f J22 Jumper is set to pin2 4 and pin1 3 otherwise RS232 TX 5 Physically connected to the internal metal plane of the connector Pins 77 through 81 and 82 through 86 are shorted together Doc ID 18124 Rev 1 4 UM1015 Expansion connectors 3 Table 3 CPU board extension connector J13 Pin Description Pin Description 1 PL GPIO47 2 43 3V 3 GPIO49 4 PL GPIO63 5 PL GPIO56 6 PL GPIO46 7 PL GPIO58 8 PL GPIO57 9 GPIO64 10 PL GPIO61 11 PL GPIO45 12 PL GPIO66 13 PL GPIO48 14 PL GPIO69 15 PL GPIO50 16 PL GPIO72 17 PL GPIO55 18 PL GPIO73 19 PL GPIO59 20 PL GPIO70 21 PL GPIO60 22 PL GPIO67 23 PL GPIO65 24 PL GPIO71 25 PL GPIO62 26 PL GPIO75 27 PL GPIO68 28 PL GPIO82 29 PL GPIO52 30 PL GPIO76 31 GPIO53 32 PL GPIO85 33 PL GPIO51 34 PL GPIO87
11. 07 DATAJ HI DATA3 ADDR3 FRE DATA3 DATA3 ADDR3 HUF DATAT DATA4 ADDR4 HN DATA4 RIZ DATA4 ADDR4 U DATA DATAS ADDRS HN DATAS amp PT7 DATAS ADDRS U DATAG g DATAG ADDR6 DATA6 PI3 DATA6 ADDR6 A DATA7 _ ADDR7 pg y DATA y ADDR7 5 ADDRES DATA C8 ADDRS 5 9 TT6 ADDRS ps DATAS TI DATAS 5 ADDR9 MZ 7 DATAS 2 TUIT 9 ADDR DDR D7 DATA9 ADDRIO p DATA9 UI6 DATAIO ADDRIO PRG Di DATAIO E ADDRII DATAIO E 014 5 ADDRII 6 ADDR DI DATAII S ADDRI2 S UIT DATAI2 ADDRI2 Hog D9 DATAI2 ADDRIS DATAI2 ADDRI3 DATAI3 M ADDRI3 MR DATAB 2 LI DATA 2 LI BA2 RIZ ADDRIA 2 2 HE3 BA2 FT3 BAT DATAIS E DATAI5 8 BAL FE BAT DATAI5 8 BAL r BAT a pao LB BAO DOMO F3 2 DOMO 2 nRAS BAL FRE BAL UDM n VREF Place close to pin UDM n VREF Place close to pin 5 nCAS BA S0 F VREF a DOSO 7 VREF me T 10955 1 1 8V SP a VDDIV8 1 HAL L8V SP n n j 3 ISed 50 GEN DOT AS UDQS VDDIV8 2 UDQS VDDIV8 2 E jan A PS O ni DOSO Doso TR df a VDDIV8 5 VDDIVS 5 10050 PIO VREF RAS KT nWE n Place close to pin RAS K7 WE n Place close to pin DOSI UIS VREF c CAS L7 nRAS VDDLIV8 8 CAS L7 nRAS VDDLIV8 8 3DQST Tis DOS v
12. 35 PL GPIO54 36 PL GPIO95 37 PL GPIO74 38 PL GPIO79 39 PL GPIO77 40 PL GPIO94 41 PL GPIO78 42 ADC VREFN 43 GPIOS81 44 AINO 45 PL GPIO80 46 GND 47 PL GPIO84 48 AIN1 49 PL GPIO83 50 GND 51 PL GPIO86 52 AIN2 53 PL GPIO91 54 GND 55 PL GPIO90 56 AIN3 57 PL GPIO96 58 GND 59 PL GPIO88 60 AIN4 61 PL GPIO89 62 GND 63 PL_GPIO92 64 AIN5 65 PL_GPIO93 66 GND 67 PL_GPIO97 68 AING 69 PL CLK4 70 GND Doc ID 18124 Rev 1 13 38 Expansion connectors UM1015 14 38 Table 3 CPU board extension connector J13 continued Pin Description Pin Description 71 72 AIN7 73 CLK2 74 GND 75 76 ADC VREFP 77 78 79 80 81 GND 82 GND 83 84 85 86 1 Physically connected to the internal metal plane of the connector Pins 77 through 81 and 82 through 86 are shorted together Doc ID 18124 Rev 1 4 UM1015 Switch and jumper settings 4 Switch and jumper settings 4 1 Switch 1 settings Table 4 Switch 1 SoC functional configuration Bit Description 1 see Debug configuration below 2 Reserved 3 Reserved 4 Reserved 5 Reserved 6 BootSel see Debug configuration below Table 5 Switch 1 debug configuration Test bit Debug configuration 2 1 0 0 Normal Mode No debug enabled 0 1 ARM JTAG connected to J4 1
13. For more information on the ETM interface refer to the trace box manufacturer s documentation www lauterbach com www agilent com www yokogawa com 2 0 5 Serial interface One serial interface port is available Typically used as an OS monitor this port is available on the J17 connector It is possible to simulate a cross cable by changing the position of the J22 jumpers Figure 3 Serial cable setting J22 Cross 2 4 Cable 1 3 Doc ID 18124 Rev 1 9 38 Block diagram UM1015 2 0 6 2 0 7 2 0 8 10 38 Real time clock battery powered The real time clock RTC is powered by an external battery 3V in order to prevent data loss even if the main power supply is switched off General power supply From a 5 V external AC DC regulator power source this block generates all the required voltages as follows 1 2V Switching regulator PM6641 to supply the internal logic of the SPEAr320 MPU 1 8V Switching regulator PM6641 for the DDR2 memory 2 5V LDO regulator for the analog portion of SPEAr320 3 3V Switching regulator PM6641 to supply the other interfaces A power monitor is also present to provide the general reset of the board Reset button A manual reset button P1 on the top of the board see Figure 14 on page 31 resets the microprocessor on the core board Doc ID 18124 Rev 1 ky UM1015 Expansion connectors 3 Note Expansion connectors The CPU board has two 8
14. GPIO34 PL GPIO63 Spear300 PL GPIO35 PL GPIOG2 p PL GPIO36 PL GPIO61 PL GPIO37 PL GPIO60 HB p PL GPIO38 PL GPIO59 a PL GPIO39 PL GPIO58 p PL GPIO40 PL GPIO37 PL GPIO4 PL GPIO56 p PL GPIO42 PL GPIOS5 0 SP D PL GPIO43 PL GPIO54 H E p PL GPIO44 PL_GPIO53 B P PL GPIO45 PL GPIO32 HTO er PL GPIO46 PL GPIOSI A E s 8 D PL GPIO47 PL GPIOS0 g g PL GPIO48 PL GPIO49 R 099 2 5 048 4 PLCLKL KI pr e E 2 PL CLK2 PL CLK3 PL FIDUCIAL FIDUCIAL Spear300 IEEE gt gt 2 PL CLK 1 4 2 ia g g g g 0 043 X 046 x C49 5 5 5 5 5 5 5 33V 3 12 SP 10 Kohm WA 3 z HB s 10 Kotin 1 9 PL GPIOSI x i 3 x BY T PL GPIOS2 R ioui on R cs0 10 Kohm r a 5 R26 a PL GPIOS3 EM g 3 3 a a Bo ann 10 Kohm PL _GPIOS4 gjo ma FMEC3 2 R35 oo TP27 1 EZ TWA IP SWITCH MICRO 8X SMD TP TH POWER FMEC3 2 1 28 EM3 4 Konm B0 3 booting options ELT TP TH POWER FMEC3 2 1 Kohm TP29 1 Project La E44 wr Spear300 CPU Board 1Kohm TP TH POWER FMEC3 2 Title ei Rev 5 Customization interface 23 Date 20 Oct 2009 Code Set 69 g 8 7 6 4 2 1 sonewoyos SLOLINN 2 lt 8 6c Figure 12 Daughterboard interface schematic
15. agreeing to be bound by the terms and conditions of this agreement Do not use this Demonstration Product until You have read and agreed to the following terms and conditions The use of the Demonstration Product implies automatically the acceptance of the following terms and conditions LICENSE STMicroelectronics ST grants You the right to use the enclosed demonstration board offering limited features only to evaluate and test ST products including any incorporated and or accompanying demo software components and documentation identified with the order code EVALSPEAr320CPU collectively the Demo Product solely only for your evaluation and testing purposes The Demo Product shall not be in any case directly or indirectly assembled as a part in any production of Yours as it is solely developed to serve demonstration purposes and has no direct function and is not a finished product Certain demo software included with the Demo Product may be covered under a separate accompanying end user license agreement in which case the terms and conditions of such end user license agreement shall apply to that demonstration software DEMO PRODUCT STATUS The Demo Product is offering limited features allowing You only to evaluate and test the ST products You are not authorized to use the Demo Product in any production system and may not be offered for sale or lease or sold leased or otherwise distributed If the Demo Product is incorporated in a demonstr
16. in this Agreement will be construed as i a warranty or representation by ST to maintain production of any ST device or other hardware or software with which the Licensed Software may be used or to otherwise maintain or support the Licensed Software in any manner and ii a commitment from ST and or its licensors to bring or prosecute actions or suits against third parties for infringement of any of the rights licensed hereby or conferring any rights to bring or prosecute actions or suits against third parties for infringement However ST has the right to terminate this Agreement immediately upon receiving notice of any claim suit or proceeding that alleges that the Licensed Software or your use or distribution of the Licensed Software infringes any third party intellectual property rights All other warranties conditions or other terms implied by law are excluded to the fullest extent permitted by law LIMITATION OF LIABILITIES In no event ST or its licensors shall be liable to You or any third party for any indirect special consequential incidental punitive damages or other damages including but not limited to the cost of labour re qualification delay loss of profits loss of revenues loss of data costs of procurement of substitute goods or services or the like whether based on contract tort or any other legal theory relating to or in connection with the Licensed Software the documentation or this Agreement even if ST ha
17. serial NOR Flash At power on the serial port outputs a brief header message with some uBoot information uBoot version SDK version and some internal hardware information At this point you can choose to e Stop the system directly in uBoot Press the spacebar on the host computer keyboard before the boot delay time expires default is 3 seconds e Boot Linux The system logs you in automatically as super user and displays the Linux shell prompt on the screen Doc ID 18124 Rev 1 7 38 Block diagram UM1015 2 Block diagram Figure 2 EVALSPEAr320CPU board block diagram Expansion Connector Bottom Side Expansion Connector Bottom Side 2 0 1 Dynamic memory subsystem 8 38 The Dynamic memory subsystem comprises three major parts Memory chip The SPEAr320 MPU supports up to 256 Mbytes of memory Place and route is provided for 2 chips but only one has been populated The memory used is a Micron DDR2 device its part number is MT47H64M16HR 3 and its size is 128 Mbits x 8 16 Mbits x 8 x 8 banks Local power supply The local power supply is based on a monolithic voltage regulator for the chip set and DDR2 3 PM6641 It is generated locally in order to minimize the layout impact and also to avoid any noise injection between different subsystems Signal termination A parallel termination is added on the clock lines to compensate if needed for the layout dissymmetry Two 100k ohm resistors are used for eac
18. the demonstration software in whole or in part You warrant to ST that the Demo Product will be used and managed solely and exclusively in a laboratory by skilled professional employees of Yours with proven expertise in the use and management of such products and that the Demo Product shall be used and managed according to the terms and conditions set forth in the related documentation provided with the Demo Product According to European Semiconductor Industry Association ESIA letter ESIA Response on WEEE Review May 2008 of the Directive 2002 96 EC on Waste Electrical and Electronic Equipment WEEE Semiconductor products and evaluation amp demonstration boards are not in the scope of the Directive 2002 96 EC of the European Parliament and of the Council on waste electrical and electronic equipment WEEE Consequently aforementioned products do not have to be registered nor are they subject to the subsequent obligations NO WARRANTY The Demo Product is provided as is and with all faults without warranty of any kind expressed or implied ST and its licensors expressly disclaim all warranties expressed implied or otherwise including without limitation warranties of merchantability fitness for a particular purpose and non infringement of intellectual property rights ST does not warrant that the use in whole or in part of the Demo Product will be interrupted or error free will meet your requirements or will operate with the combinati
19. used for power measurements Sheet 7 e Jumper J22 is a 4 pin symmetric IDC or strip connector that switches RX and TX signals for different types of RS 232 cables 9 Two pins are connected to the ST3232 Receive Transmit side Two pins are connected to the RS 232 Receive Transmit connector side e Connector J17 is a connector for standard IDC to DSUB converters e Jumper J20 switches between RS 232 transmit signals or GPIO2 lfjumper is on pins 1 and 2 pin PL GPIO2 is connected to 012 573232 and the COMO is available on J17 f jumper is on pins 2 and 3 pin PL GPIO2 is connected to the expansion connector J12 pin 9 In this case the COMO is available on CN13 e Jumper J21 switches between RS 232 receive signals or GPIO3 lfjumper is on pins 1 2 pin PL GPIOS is connected to 012 573232 and the COMO is available on J17 fjumper is on pins 2 and 3 pin PL GPIO3 is connected to the expansion connector J12 pin 11 In this case the COMO is available on CN13 a With 2 jumpers inserted it is possible to switch between two jumper inserted vertically and two jumpers inserted horizontally This enables the serial cable null modem cable to be adapted to the CPU board Doc ID 18124 Rev 1 17 38 Board components UM1015 5 Board components Table 8 CPU board components Component Capacitor Designator C1 2 4 5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C2
20. 0 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 C56 C57 C58 C59 C60 C99 C100 C101 C102 Footprint 0402 Description Ceramic capacitor 0 1uF 10 10V X5R 0402 Resistor R42 R43 R44 R45 R46 R47 R48 R50 0603 Resistor 0603 0 ohm Resistor R30 R31 R32 R33 R34 R35 R36 R37 R38 R72 R73 R74 0603 Resistor 0603 1k ohm 196 0 1W Inductor L3 LPS3 9X3 9 Power Inductor 1uH 1 7A 3 9x3 9mm SMD Capacitor C89 0603 Ceramic capacitor 2 2nF 1095 50V X7R 0603 Inductor Li L2 LPS3 9X3 9 Power Inductor 2 2uH 1 2A 3 9x3 9mm SMD Resistor R59 R60 0603 Resistor 0603 4 3 ohm 1 0 1W Resistor 18 38 R27 R28 0603 Resistor 0603 4 7k ohm 1 0 1W Doc ID 18124 Rev 1 3 UM1015 Board components Table 8 CPU board components continued Component Designator Footprint Description R10 R11 R12 R13 R14 R15 R16 R17 Resistor R18 R19 0603 Resistor 0603 10k ohm 196 0 1W R20 R21 R22 R23 R24 R25 R26 Capacitor pis Cre 0603 Ceramic capacitor 10 nF 10 50V X7R 0603 C61 C62 C63 C64 C65 C66 2 67 68 Capacitor C69 C70 0805 Ceramic capacitor 10uF 10 10V X5R 0805 C71 C72 C73 C74 C98 Resistor R68 0603 Resistor 0603 15k ohm 196 0 1W Capacitor C78 C79 0603 Ceramic capacitor 15pF 596 50V COG 0603 Capacit
21. 6 pin connectors J12 and J13 that are used to extend the board On the board the connectors are horizontally center aligned and the distance between the mechanical holes is 3400 00 th Table 2 lists connector J12 pins Table 3 on page 13 lists connector J13 pins Connector through hole pins 10 pins are connected to GND Figure 4 86 connectors J12 and J13 75 Sere Q mimm numm m 76 Table 2 CPU board extension connector J12 Pin Description Pin Description 1 1 8V 2 5V 3 41 8V 4 45V 5 1 8V 6 5V 7 41 8V 8 45V 9 PL GPIO2 RS232 TX LVTTL 10 PL GPIO44 11 PL GPIO3 RS232 RX LVTTL 12 PL GPIO39 13 RS232 TX8 14 PL GPIO40 15 RS232 RX 16 PL GPIO38 17 PL GPIO42 18 PL GPIO29 19 PL GPIO43 20 PL GPIO37 21 PL GPIO34 22 PL GPIO30 23 PL GPIO33 24 PL GPIO28 25 PL GPIO16 26 PL GPIO26 27 PL GPIO24 28 PL GPIO27 29 PL GPIO20 30 PL GPIO9 31 PL GPIO23 32 PL GPIO13 33 PL GPIO18 34 PL GPIO8 Doc ID 18124 Rev 1 11 38 Expansion connectors UM1015 12 38 Table 2 CPU board extension connector J12 continued Pin Description Pin Description 35 PL GPIO11 36 PL GPIO6 37 PL GPIO19 38 PL GPIO4 39 PL GPIO15 40 PL GPIO5 41 PL GPIO14 42 NC 43 PL GPIO36 44 NC 45 PL GPIO41 46 NC 47 PL GPIO35 48 NC 49
22. 8 T 6 5 3 2 1 C94 Place close to IN 4 5 PIN Sv T j 25 9 PADX2 80H60 DC POWEI 1 T R59 2 Ww 2mm pi 43 Ohm Em D gt MES gt ml La ig E 8 ANCC mA S EN FLT p m zl 2 lon los R DC POWER SOCKET 2 1MM ESTA ET Rit 4 4 1 MMSZ5232BT1 8 x K STIDIII7S25TR 8 NC p 5 35 0 Ohm 9 NC m el 5 1 uF XSR 10V 64 8 Bap 8 2 8 Bd __ 4 14 I uFXSRIV A 2 55 7 Kohm xz 2 GND ST STBPI20C 4 Place near PM6641 Place faraway Y T 10 uF X5R 10V m C68 C65 4 47 v Tan 10V H 10 uF X5R 10V 46 LDOIN dL V 10 uF XSR 10V pseg 1 2 VSWI 188 RAE 3 z R49 56K Ohm FSET VSW27188 kika 2 37 CSNS 10 uF XSR 10V AVCC SET PHI k 1 C66 9 19 47 uF Tan 10V 10 uF X5R 10V nii VINI 158 VSWI 1505 RAE 1 12 i Les ye EV VINZ1S8 VSW271805 From farthest 1 8V point 11 B 15 Kohm 1 VFB 158 Hoe 4 i ay 10 uF XSR 10V pen paisse 185 Ha ASA 4 EVSW27185 s css a 47 uF Tan 10V oe cs 284 T 4 t 10 uF XSR 10V Eee VIN2 1805 E E VIT 2 as VEB 1805 VITREF 5 1505 SS 1505 ohm NC PG 1505 VREF jos 1505 93 geR2 SGNDI 158 H BE YSV 63V RA 0 am NC ki a VIN 185 SGND2 188 k k SGNDI 1505 2 2 VFB 185 SGND271805 Fe pus 2 2 nF XIR 25 piss
23. D 18124 Rev 1 ky UM1015 Board components Table 8 CPU board components continued Component Designator Footprint Description Connector J12 J13 MIS 038 SAMTEC MIS 038 SAMTEC MIS series 76pin 0 64mm pitch Rectifier D4 DPAK SCR TS420 B 1 Schottky barrier rectifier 1A 60V SMD Embedded U1 SG BGA 6004 SPEAR300 STmicroelectronics Spear330 microprocessor Power distribution 7 switch U4 508 ST2052 STm Current limited power distribution switches RS 232 arivar U12 S016 ST3232C STm RS 232 driver and receiver and receiver ST LD1117S25TR STm low drop fixed positive voltage Voltage regulator U9 SOT223 regulator 2 5V 800mA m STM811 STm Reset generator and power monitor 3 3V Reset circuit U7 SOT143 4 SOT143 4 Voltage regulator 010 VFQFPN 48 ST PM6641 STm DDR2 3 Voltage Regulator 48pin VFQFPN J5 J6 J7 Connector J8 2X1 2 54 MD STRIP 2X1 2 54 MD Strip vertical male 2X1 2 54mm Connector J22 2X2 2 54 MD STRIP 2X2 2 54 MD Strip vertical male 2X2 2 54mm Connector J20 J21 3X1 2 54 MD STRIP 3X1 Strip vertical male 3X1 2 54mm Overvoltage U16 TDFN 10 ST STBP120C STm overvoltage protection device Vout max protection 5 5V ST USBLC6 28C6 STm USB 2 0 ESD protections protection circuit U15 Switch P1 SW PB SMD6x6 6 SW PB SMD Mechanical key switch SMD 6x6 6mm h4 3mm USB A RA DB USB A TYPE RA DOUBLE USB double A type connector rig
24. EVALSPEAr320CPU SPEAr320 CPU evaluation board UM1015 User manual www st com BLANK 7672 UM1015 YA User manual EVALSPEAr320CPU SPEAr320 CPU evaluation board Introduction This document applies to revision 2 0 SPEAr320 CPU evaluation boards This board can be used to evaluate SPEAr320 microprocessors the evaluation board kit comprises one board one serial cable interface and one power supply CPU board features SPEAr320 embedded MPU Up to 2 Gbit DDR2 333 MHz standard 128 Mbytes Up to 16 Mbyte Serial Flash memory standard 8 Mbytes Two USB 2 0 full host port channels One USB 2 0 host device port One serial port up to 115 baud JTAG Debug ports Figure 1 SPEAr320 CPU evaluation board Top Bottom m p gt a October 2010 Doc ID 18124 Rev 1 3 38 www st com Contents UM1015 Contents 1 Getting started vi oi it acm nni an a D o an ak n 7 1 1 CONNEC ONS si a acea ai a l amasisa ad eee ae weak A 7 1 2 Booting procedure awa ak kwe ank pk eae YE a kaa 7 2 Block diagram oo oie an ap oi CR n a 8 3 Expansion connectors 11 4 Switch and jumper settings 15 4 1 qeu m P n m sei a da ko a See ened eww ean 15 4 2 settings s kaa vet eR nitt RR ce 16 4 3 Jumpers and conn
25. IO94 M DPA WADE PL GPIO4 PL GPIO93 016 ES Em MO e ee Uae 4 PL GPIOS PL GPIO92 PL GPIO6 PL GPIO9l Fara i ME m NI PL GPIO7 GPIO90 STRIP 2X1 2 54 MD STRIP 2X1 2 54 MD VDDIV29 5 VDD3V3 9 P ee EFTS SP VDDIV2 10 VDD3V3 p PL GPIO9 GPIOSS E QUEE D PL GPIOI0 PL GPIO87 E P PL GPIOI1 8 PL GPIOS6 v 18V SP Vv 12V SP PL GPIOI2 E PL GPIOSS D L ay DDR VD VSO GND 32 10 P PL GPIOL4 E PI GPIORS 096 097 DDR VDDIV83 GND 3 El Epi 47 uF Tan 10V 547 uF Tan 10V DDR VDDIV84 GND 30 PL GPIOIS Z PL GPIOS2 PL GPIOI6 HDTS ey B DDENDDINES GNDA PL GPIOI7 S2PL GPIOS0 E x E A DDR VDDIV87 GND 27 P PL GPIOI8 S PL GPIO79 D DOR DD D27 PL GPIOI9 GPIO78 B STRIP 2X1 2 54 MD STRIP 2X1 2 54 MD GND 25 p PL GPIO20 8 PL GPIO77 G6 lanpi an PL GPIO21 amp PL GPIO76 an p PL GPIO22 PL GPIO75 x w a GND 3 GND 22 PL GPIO23 GPIO74 an GND 22 PL GPIO24 q PL GPIO73 BI6 Place Cap near jumpers GND 5 GND 20 2 PL GPIO25 PL GPIO72 a knn p PL GPIO26 PL GPIO71 3ND 1 p GND 7 GND_18 PL GPIO27 PL GPIO70 FATS ane EnD i P PL GPIO28 PL GPIO69 B ans END PL GPIO29 PL GPIO68 716 2 x GND 10 GND 15 p PL GPIO30 PL GPIO67 ri E P PL_GPIO31 GPIO66 apil a 3 p PL GPIO32 PL GPIO65 X E PL GPIO33 SPL GP1064 P PL
26. ademark of STMicroelectronics All other names are the property of their respective owners 2010 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 38 38 Doc ID 18124 Rev 1 ki
27. ation system the demonstration system may be used by You solely for your evaluation and testing purposes Such demonstration system may not be offered for sale or lease or sold leased or otherwise distributed and must be accompanied by a conspicuous notice as follows This device is not and may not be offered for sale or lease or sold or leased or otherwise distributed OWNERSHIP AND COPYRIGHT Title to the Demo Product demo software related documentation and all copies thereof remain with ST and or its licensors You may not remove the copyrights notices from the Demo Product You may make one 1 copy of the software for back up or archival purposes provided that You reproduce and apply to such copy any copyright or other proprietary rights notices included on or embedded in the demonstration software You agree to prevent any unauthorized copying of the Demo Product demonstration software and related documentation RESTRICTIONS You may not sell assign sublicense lease rent or otherwise distribute the Demo Product for commercial purposes unless you are an authorized ST distributor provided that all the other clauses of this DEMO PRODUCT LICENSE AGREEMENT shall apply entirely in whole or in part or use Demo Product in production system Except as provided in this Agreement or in the Demo Product s documentation You may not reproduce the demonstration software or related documentation or modify reverse engineer de compile or disassemble
28. d Off On On Off On Off On Off Reserved On Off On Off On Off On Off Note If SW2 1 and SW2 2 are both off BO pin PL_GPIO51 is in HiZ state and can be controlled from the application board If SW2 3 and SW2 4 are both off B1 pin PL_GPIO52 is in HiZ state and can be controlled from the application board If SW2 5 and SW2 6 are both off B2 pin PL_GPIO53 is in HiZ state and can be controlled from the application board If SW2 7 and SW2 8 are both off B3 pin PL_GPIO54 is in HiZ state and can be controlled from the application board SW2 1 and SW2 2 on invalid condition SW2 3 and SW2 4 on invalid condition SW2 5 and SW2 6 on invalid condition SW2 7 and SW2 8 on invalid condition 16 38 Doc ID 18124 Rev 1 437 UM1015 Switch and jumper settings 4 3 Jumpers and connectors The jumpers and connectors numbered below refer to the CPU board schematics available www st com spear Sheet 4 Connector J3 is a standard 20 pin 2 54 mm connector used for JTAG connections Jumper J5 enables the power supply to the Real Time Clock block If jumper J5 is closed the RTC is powered standard e Connector J10 is a 2 vie 1 25 mm pitch connector for battery back up with cable Sheet 5 e Connector J11 is a standard power connector for the ADC power supply with a 2 1 mm central pitch Sheet 6 e Jumpers J6 J7 J8 and J9 are serial jumpers for the SPEAr power rail All jumpers MUST be closed This configuration is
29. e close to DDR2 Chip ei 9 gt FIDUCIAL 4 8 100 Ohm 100 Ohm 8 5 SP 1 8 _SP 1 E m 061 62 10 uF X5R 10V 10 uF XSR 10V Place close to LAST DDR2 Chip Project Spear300 CPU Board Title DDR2 interface 23 Date 20 Oct 2009 Code Sheet 2 o g SLOLINN sonewoyos 181 Figure 7 USB interface schematic T USB Interface se 10 nF X7R 50V BLM21BD601SNID 4 G3 N3 vb L USB DEV 5v USB DEV VBUS USB VBUS USB DEV VDD3V3 FRI 5 BLM21BD6018N1D amp M2 USB HOSTO VDD3V3 2 5y SP Dx L3 USB DEVINE DP USB DEV DM USB HOSTI VDD3V3 meo 2 p DE x ouod BLM21BD601SNID Shieldi USB DEV VDD2V5 Shicld2 USB HOSTO VDD2V5 k7 B HOST VDD2V5 HOSTO VBUS J USB HOSTI VDD2V5 BLM21BD601SNID USB B TYPE RA gt USB_HOSTO_VBUS a m x K2 M3 gt 5 5 H HOSTO DM KH usB DM USB DVDDIV2 USB VDD1y2 z FERRITE 0603 USB HOSTO DP g b HOSTO OVERCUR H4 C24 025 EBI6 es USB HOSTO OVERCUR 5 KE 5 S S FERRITE 0603 Spear300 2 1 1 HOSTI VBUS H3 GI FB7 SB HOSTI USB Interface HOSTI DM m E BLM21BD601SNID USB HOST DM eil USB HOSTI DP 12V SP
30. e not been complied with upon reasonable notice to enter Your official premises in order to verify your compliance with this Restriction clause NO WARRANTY The Licensed Software is provided as is and with all faults without warranty of any kind expressed or implied ST and its licensors expressly disclaim all warranties expressed implied or otherwise including without limitation warranties of merchantability fitness for a particular purpose and non infringement of intellectual property rights ST does not warrant that the use in whole or in part of the Licensed Software will be interrupted or error free will meet your requirements or will operate with the combination of hardware and software selected by You You are responsible for determining whether the Licensed Software will be suitable for your intended use or application or will achieve your intended results ST has not authorized anyone to make any representation or warranty for the Licensed Software and any technical applications or design information or advice quality characterization reliability data or other services provided by ST shall not constitute any representation or warranty by ST or alter this disclaimer or warranty and in no additional obligations or liabilities shall arise from ST s providing such information or services ST does not assume or authorize any other person to assume for it any other liability in connection with its Licensed Software Nothing contained
31. ectors 17 5 Board components w kes ese a ee pe 18 6 SCHEMANCS eee ren oi mo 22 7 Board layout ss an op samia eee a a a a aa n 31 8 Revision history ki ki a Ro dci a CR OR Ros 32 8 1 Hardware revision history ets ese pwo aa ae eee PER ERI AC RE REY RE 32 8 2 Document revision history x oos vee ka 32 A License 15 33 4 38 Doc ID 18124 Rev 1 ky UM1015 List of tables List of tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Switch SW I bits ZT uu na cossus mae doe mme Stee bea eect 9 CPU board extension connector 12 11 CPU board extension connector 13 13 Switch 1 SoC functional 15 Switch 1 debug configUratiON eee eee ken ken ken kan kaa kaa kaa kaa kan 15 Switch 1 functional configuration 15 Switch 2 08 4 16 CPU board 18 Document revision history ls eee n kel n kk ea kn ka n rr 32 Doc ID 18124 Rev 1 5 38 List of figures UM1015 List o
32. eloping executable versions of such Licensed Software only for use with the Product ii make copies prepare derivatives works display internally and use internally object code versions of the Licensed Software for the sole purpose of designing developing and manufacturing the Products make use sell offer to sell import or otherwise distribute Products OWNERSHIP AND COPYRIGHT Title to the Licensed Software related documentation and all copies thereof remain with ST and or its licensors You may not remove the copyrights notices from the Licensed Software You may make one 1 copy of the Licensed Software for back up or archival purposes provided that You reproduce and apply to such copy any copyright or other proprietary rights notices included on or embedded in the Licensed Software You agree to prevent any unauthorized copying of the Licensed Software and related documentation RESTRICTIONS Unless otherwise explicitly stated in this Agreement You may not sell assign sublicense lease rent or otherwise distribute the Licensed for commercial purposes in whole or in part purposes unless you are an authorized ST distributor provided that all the other clauses of this DEMO PRODUCT LICENSE AGREEMENT shall apply entirely You acknowledge and agree that any use adaptation translation or transcription of the Licensed Software or any portion or derivative thereof for use with processors manufactured by or for an entity ot
33. f figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 6 38 SPEAr320 CPU evaluation 3 EVALSPEAr320CPU board block 8 Serial cable setting 9 86 pin connectors J12 13 11 Schematic interconnections 1 22 DDR interface schematic 23 USB interface schematic 24 USB power and optional part 25 Miscellaneous interfaces 26 Power supply 27 Customization interface 28 Daughterboard interface schematic 29 Schematic revision history 30 SPEAr320 CPU evaluation board layout top 31 SPEAr320 CPU evaluation board layout bottom 31 Doc ID 18124 Rev 1 ky UM1015 Ge
34. h line in order to obtain an impedance of 50 ohms All the other terminations are directly inside the pads both on the SPEAr320 MPU and the memory sides Doc ID 18124 Rev 1 437 UM1015 Block diagram 2 0 2 Static memory subsystem Serial Flash memory The SPEAr320 MPU supports up to 16 Mbytes of Serial Flash memory Place and route for 2 blocks of 8 Mbytes are provided on the board but only one is populated It is based on an M25P64 VMF6P Numonix Serial Flash memory device Resistor R8 protects the Flash memory from any unwanted write access 2 0 3 USB 2 0 subsystem Host ports The board has two host ports that are fully compliant with the USB 2 0 specification two controllers with one port each This means that the two hosts can work in concurrent mode with the maximum possible bandwidth Each host has also full control of the VBUS supplied by the ST2052 power switch that also provides over current protection in case of a short circuit in the USB cable Device port The board has one USB 2 0 device port 2 0 4 Debug interface The JTAG interface can be used for static debugging which means that it is possible to set a breakpoint and when the system stops verify the contents of the memory or registers or both and modify them if needed To select the debug feature set Switch SW1 bits 2 1 Table 1 Switch SW1 bits 2 1 Bit 2 Bit 1 Description 0 0 No debug features available 0 1 The ARM JTAG is connected to J4
35. her than ST is a material breach of this Agreement and requires a separate license from ST No source code and or object code relating to and or based upon Licensed Software is to be made available by You to any third party for whatever reason You acknowledge and agrees that the protection of the source code of the Licensed Software warrants the imposition of security precautions and You agree to implement reasonable security measures to protect ST s proprietary rights in the source code of the Licensed Software You shall not under any circumstances copy duplicate or otherwise reproduce the source code of the Licensed Software in any manner except as reasonably necessary to exercise Your rights hereunder and make one back up copy You are granted the right to make one archival or backup copy of the source code of the Licensed Software which copy shall be marked as an archival copy and as the confidential information of ST Access to the source code of the Licensed Software shall be restricted to only those of Your employees with a need to know for the purpose of this Agreement You will not under any circumstances permit the source code of the Licensed Software in any form or medium including but not limited to hard copy or computer print out to be removed from your official premises as you have informed us The source code of the Licensed Software must remain inside your official premises as you have informed us You will lock the source code of
36. ht angle Connector Ji USB B RA 1 USB B TYPE RA SH USB B type connector right angle Ferrite bead FB1 FB2 0805 WURTH 742792023 Ferrite Wurth 742792023 SMD 500mA 2 Doc ID 18124 Rev 1 21 38 Schematics UM1015 6 Schematics Figure 5 Schematic interconnections 02 DDR Interface 02 DDR Interface 03 USB Interface 04 Mise 04 PL PL GPIO O0 ot IL poen 97 PL In Figure 5 02 DDR2 intrface and power 03 USB interface 04 Miscellaneous serial flash RTC power boot options JTAG reset 05 Power supply 06 PL_GPIO interface extended boot options 07 Daughterboard and UART connectors 22 38 Doc ID 18124 Rev 1 ky 2 lt 8E EC Figure 6 DDR interface schematic 8 7 6 5 4 3 2 1 0 15 4 u DATAS G8 M8 DATAO PIL n ADDRO DATA DATAO ADDRO M DATAO ATAT RIT DATAO ADDRO HTT HT ADDRI AJ ADDRI U DDR DATA3 H3 DATA2 ADDR Hy DATA2 AT UIT DATA2 ADDR2
37. m DO 214AC to DPAK Add C99 0 1uF 0402 capacitor to Spear300 VREF pin Add R78 Oohm resistor to Pin17 of J3 JTAG Port and another pad be connected to GND Add R79 Oohm resistor to Pin19 of J3 JTAG Port and another pad be connected to GND Add GND to C94 C95 C96 C97 03 July 2009 FBB is only connected to PIN 6 of J1 at Page3 Add a 6 16 is connected to PIN 5 of J1 at Page3 FB9 is connected to PIN 9 and PIN 11 of J2 at Page3 FB10 is connected to PIN 10 and PIN 12 of J2 at Page3 03 July 2009 Swap U2 and U3 data signals for better pcb routing at Page2 Swap Socket J12 and J13 signals and add four 1 8V power pins to J12 at Page7 RI1 R21 pull up to 3 3V change from 3 3V_SP at D3 Pin Al connect to 3 3V change from 3 3V_SP at Page4 10 July 2009 Change all Motherboard to CPU Board Apdate Fiducial REF symbol 17 July 2009 Pull down U10 4 CSNS to AGND Connect U10 39 SET PHI to AGND 21 July 2009 Change U13 5 net to USB DEV 5V Add C102 to Vbus pin Change U14 5 net to HOSTO 5V Add C101 to Vbus pin Change U15 5 net to 5V Add C100 to Vbus pin Modify USB ESD circuit design insert ESD IC into USB signals DM and DP include USB DEV and Two USB Host 23 July 2009 Pull up R61 to 1 2V Change RS232 TXD net to J17 5 pin Change RS232 RXD net to J17 3 pin Change R72 R73 R74 value to 1K ohm Change R41 value to 680 ohm Change R75 value to 330 ohm 10 Sep 2009
38. not been inserted in this Agreement WAIVER The waiver by either party of any breach of any provisions of this Agreement shall not operate or be construed as a waiver of any other or a subsequent breach of the same or a different provision RELATIONSHIP OF THE PARTIES Nothing in this Agreement shall create or be deemed to create a partnership or the relationship of principal and agent or employer and employee between the Parties Neither Party has the authority or power to bind to contract in the name of or to create a liability for the other in any way or for any purpose RECYCLING The Demo Product is not to be disposed as an urban waste At the end of its life cycle differentiated waste collection must be followed as stated in the directive 2002 96 EC In all the countries belonging to the European Union EU Dir 2002 96 EC and those following differentiated recycling the Demo Product is subject to differentiated recycling at the end of its life cycle therefore It is forbidden to dispose the Demo Product as an undifferentiated waste or with other domestic wastes Consult the local authorities for more information on the proper disposal channels It is mandatory to sort the demo product and deliver it to the appropriate collection centers or when possible return the demo product to the seller An incorrect Demo Product disposal may cause damage to the environment and is punished by the law 10 Nov 2008 4 Doc ID 18124 Rev 1
39. on of hardware and software selected by You You are responsible for determining whether the Demo Product will be suitable for your intended use or application or will achieve your intended results ST shall not have any liability in case of damages losses claims or actions anyhow caused from combination of the Demo Product with another product board software or device ST has not authorized anyone to make any representation or warranty for the Demo Product and any technical applications or design information or advice quality characterization reliability data or other services provided by ST shall not constitute any representation or warranty by ST or alter this disclaimer or warranty and in no additional obligations or liabilities shall arise from ST s providing such information or services ST does not assume or authorize any other person to assume for it any other liability in connection with its Demo Products All other warranties conditions or other terms implied by law are excluded to the fullest extent permitted by law LIMITATION OF LIABILITIES In no event ST or its licensors shall be liable to You or any third party for any indirect special consequential incidental punitive damages or other damages including but not limited to the cost of labour re qualification delay loss of profits loss of revenues loss of data costs of procurement of substitute goods or services or the like whether based on contract tort or any othe
40. or d C88 0603 Ceramic capacitor 22nF 10 50V X7R 0603 Capacitor C93 1206 Ceramic capacitor 22 uF Y5V 20 80 6 3V 1206 Crystal oscillator Y2 RAD HC49 Crystal Oscillator 24 MHz 30ppm through hole Resistor R70 0603 Resistor 0603 27k ohm 1 0 1W Crystal oscillator Y1 XT38T Crystal Oscillator 32 768KHz 20ppm d2x6mm Capacitor C92 0603 Ceramic capacitor 33 nF 1096 50V X7R 0603 Capacitor C80 C81 0603 Ceramic capacitor 33pF 596 50V COG 0603 Resistor R29 0805 Resistor 0805 43 2 ohm 0 196 0 1W Resistor R69 0603 Resistor 0603 47k ohm 196 0 1W C82 C83 C84 C85 Capacitor C86 C94 35284 Tantalium Capacitor 47uF 1096 10V 3528 21 C95 C96 C97 Resistor R49 0603 Resistor 0603 56k ohm 196 0 1W R62 R63 Resistor R64 R65 0603 Resistor 0603 68k ohm 196 0 1W R66 R67 Resistor R61 0603 Resistor 0603 75k ohm 196 0 1W R2 R4 Resistor R5 R6 R7 0603 Resistor 0603 100 ohm 1 0 1W ky Doc ID 18124 Rev 1 19 38 Board components UM1015 Table 8 CPU board components continued Component Designator Footprint Description Resistor R1 R53 0805 Resistor 0805 121k ohm 0 195 0 1W Resistor ix 0603 Resistor 0603 150 Kohm 1 0 1W Resistor R39 R40 0603 Resistor 0603 150 ohm 195 0 1W Resistor R75 0603 Resistor 0603 330 ohm 196 0 1W Resistor R58 0603 Resistor 0603 390k ohm 195 0 1W Resistor R8 R9 0603 Resistor 0603 470 ohm 196 0 1W Capacitor C90 0603 Ceramic ca
41. pacitor 470 1095 50V X7R 0603 Resistor R41 0603 Resistor 0603 680 ohm 195 0 1W Battery U8 BR2032 BATT BR2032 Coin type Lithium batterie straight d20mm Ferrite Murata BLM21BD601SN1D i FB5 FB6 kk 0895 600 ohm 100MHz 200mA 0 35hm 0805 Hi speed switching dual diode 200mA 70V Diode D3 SOT23 D BAV70 DC power socket J11 DPS2 5MM DC Power socket 2 5mm DIP switch SW1 SWM 6X SMD Surface mount 6 way micro dip switch pitch1 27mm DIP switch SW2 SWM 8X SMD Surface mount 8 way micro dip switch pitch1 27mm FB8 FB9 FB12 FB13 Ferrite bead FB14 FB15 0603 Ferrite 2506033007Y0 SMD 400mA FB10 FB16 LED 5 7 0805 LED SMD 2 0 x 1 25 Superbright Green Connector J17 IDC5X2MD IDC 5X2 MD POL IDC header 10pin p2 54mm straight male polarized Connector J3 IDC10X2MD IDC header 20pin p2 54mm straight male polarized LED D1 D2 0805P Led SMD 2 0 x 1 25mm Superbright red Memory US SO16 M25P64 Numonix 64Mbit SPI Serial Flash Memory 3 3V 16pin SO Diode Z1 SOD123 C425 MMSZ5232BT1 Zener Diode 5 6V 0 5W Connector J10 MLX 1 25MM M MOLEX 1 25MM 2W M Molex 1 25mm 2way male straight SDRAM U2 U3 FBGA84 MT47H64M16HR3 MICRON DDR2 128MB 1 8V FBGA84 Transistor Q1 SOT23 NPN BC848 NPN transistor 30Vbc 5Vbe 100mA NPN PDTD123Y Digital transistor NPN Rb 2 2K Re 10K Transistor Q2 Q3 SOT23 500mA 250mW SOT 3 Pad PD1 PDX280H60SQ PADX2 80H60 Two square pad 80x80mils 60mils Hole 100mils pitch Resistor R54 0603 R 0603 0 OHM Resistor 0603 0 ohm 20 38 Doc I
42. ppoivs 1 A2 a s I vppoivs 1 F E n mu 2 m 2 ODTO T3 P4 1uFXSRIOV ES VDDQ1V8 2 er 8 AKN oke VDDQIV8 2 E S TA COMP 2V5 REXT CLK VDDQ1V8 3 K VDDQ1V8 3 ODTI nct VDDQIV8 4 9 L nctk VDDQIV8 4 E E VDDQ1V8 5 m VDDQIV8 5 7 10 GATE OPENO ae ODTL opr VDDQ1V8 6 LEV E K9 VDDQIV8 6 1 8V_SP 5 GATE OPENI VDDQ1V8 7 VDDQ1V8 7 s DOMO U12 121 Kohm 1 R3 VDDOIV amp 8 R3 VDDQIV8 8 R4 Place close to pins RT VDDOIV8 9 R7 RFUI VDDQIV8 9 DOMI COMP 2 5 GND T Z REU2 vDDQIVS L8V SP T Z VDDQIVS 10 1 8V SP i po mu van z Spear300 27 2 VSSQ3 27 2 VSSQ3 VSSDL a VSSQ4 VSSDL VSSQ4 po VSS S P9 5805 vssi VSSQ6 vssi VSSQ6 VSS2 8 VSSQ7 vss2 VSSQ7 VSS3 VSSQ8 vss3 VSSO8 2 VSS4 5 VSSQ9 vss4 5 VSSQ9 VSSS 85010 VSSS VSSQ10 L MT47H64MI6HR3 NC n MT47H64MI6HR3 d i bd om 1 8V_SP 2 ki E S l ox el al z om a a a g 7 fi cs 8 6 amp c9 2 6 6 5 6 100 Ohm 100 Ohm RTO aT 8 98 x x x x la 5 5 5 5 z E E a a id E FIDUCIAL s s s 5 5 5 5 5 5 s 5 T ak 8 gon VREF Place close to DDR2 Chip Plac
43. r legal theory relating to or in connection with the Demo Product the documentation or this Agreement even if ST has been advised of the possibility of such damages In no event shall ST s Doc ID 18124 Rev 1 33 38 License agreements UM1015 34 38 aggregate liability to You or any third party under this agreement for any cause action whether based on contract tort or any other legal theory relating to or in connection with the Demo Product the documentation or this agreement shall exceed the purchase price paid for the Demo Product if any TERMINATION ST may terminate this license at any time if You are in breach of any of its terms and conditions Upon termination You will immediately destroy or return all copies of the demo software and documentation to ST APPLICABLE LAW AND JURISDICTION In case of dispute and in the absence of an amicable settlement the only competent jurisdiction shall be the Courts of Geneva Switzerland The applicable law shall be the law of Switzerland The UN Convention on contracts for the International Sales of Goods shall not apply to these General Terms and Conditions of Sale SEVERABILITY If any provision of this agreement is or becomes at any time or for any reason unenforceable or invalid no other provision of this agreement shall be affected thereby and the remaining provisions of this agreement shall continue with the same force and effect as if such unenforceable or invalid provisions had
44. rent provision RELATIONSHIP OF THE PARTIES Nothing in this Agreement shall create or be deemed to create a partnership or the relationship of principal and agent or employer and employee between the Parties Neither Party has the authority or power to bind to contract in the name of or to create a liability for the other in any way or for any purpose 3 Doc ID 18124 Rev 1 37 38 UM1015 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoe
45. s been advised of the possibility of such damages In no event shall ST s liability to You or any third party under this Agreement including any claim with respect of any third party intellectual property rights for any cause of action exceed 100 US This section does not apply to the extent prohibited by law For the purposes of this section any liability of ST shall be treated in the aggregate TERMINATION ST may terminate this license at any time if You are in breach of any of its terms and conditions Upon termination You will immediately destroy or return all copies of the software and documentation to ST APPLICABLE LAW AND JURISDICTION In case of dispute and in the absence of an amicable settlement the only competent jurisdiction shall be the Courts of Geneva Switzerland The applicable law shall be the law of Switzerland Doc ID 18124 Rev 1 437 UM1015 License agreements SEVERABILITY If any provision of this agreement is or becomes at any time or for any reason unenforceable or invalid no other provision of this agreement shall be affected thereby and the remaining provisions of this agreement shall continue with the same force and effect as if such unenforceable or invalid provisions had not been inserted in this Agreement WAIVER The waiver by either party of any breach of any provisions of this Agreement shall not operate or be construed as a waiver of any other or a subsequent breach of the same or a diffe
46. the Licensed Software and all copies thereof in a secured storage inside your official premises at all times when the source code of the Licensed Software is not being used as permitted under this Agreement Doc ID 18124 Rev 1 35 38 License agreements UM1015 36 38 You will inform all Your employees who are given access to the source code of the Licensed Software of the foregoing requirements and You will take all reasonable precautions to ensure and monitor their compliance with such requirements You agree to promptly notify ST in the event of a violation of any of the foregoing and to cooperate with ST to take any remedial action appropriate to address the violation You shall keep accurate records with respect to its use of the source code of the Licensed Software In the event ST demonstrates to You a reasonable belief that the source code of the Licensed Software has been used or distributed in violation of this Agreement ST may by written notification request certification as to whether such unauthorized use or distribution has occurred You shall reasonably cooperate and assist ST in its determination of whether there has been unauthorized use or distribution of the source code of the Licensed Software and will take appropriate steps to remedy any unauthorized use or distribution You agree that ST shall have the right where ST reasonably suspects that the terms and conditions of this Agreement with reference to Restriction clause hav
47. tting started 1 1 1 2 Getting started Warning This board contains static sensitive devices The EVALSPEAr320CPU board is shipped in protective anti static packaging Do not submit the board to high electrostatic potentials and follow good practices for working with static sensitive devices e Wear an anti static wristband Wearing a simple anti static wristband can help prevent ESD from damaging the board e Zero potential Always touch a grounded conducting material before handling the board and periodically while handling it e Useananti static mat When configuring the board place it on and anti static mat to reduce the possibility of ESD damage e Handle only the edges Handle the board by its edges only and avoid touching board components Connections Refer to Figure 14 on page 31 1 Connect a serial cable from connector J17 serial link to a host PC 2 Onthe host PC running Windows or Linux start the Terminal program 3 Connect the 5 V voltage adapter supplied in the EVALSPEAR320CPU package to the J11 power voltage connector on the CPU board 4 Apply power to the board 5 The Terminal program displays a sequence of boot messages followed by the Linux console prompt For more information refer to user manual UMO844 Getting started with Linux for SPEAr available at www st com spear Booting procedure The SPEAr320 CPU evaluation board can boot a Linux kernel that has been pre installed in the
48. ver of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered tr

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