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detailed GOP_XC2C64 User`s Manual - Oho

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1. Hardware platform for VHDL VERILOG digital design introductory courses GOP XC2C64 USER S MANUAL V0 9 Page 5 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 2 3 Xilinx XC2C64 CPLD Features Document 1 and 2 lists lots of goodies here are the best facts Fastand modern low power CPLD 4 logic arrays 16V40 each offers 40 array inputs with 16 macrocells and a 56 product term PLA Macrocells offer D T and Latch type memory elements with dedicated CE input Flipflops can toggle on rising falling and both edges gt 3 global clocks and product term clock 4 global tristate nets and a global set reset net Inputs have Schmitt Trigger option gt Input registers with little setup time of 3 3ns typ on a XC2C64 7 device gt Lots of I O standards Free powerful VHDL VERILOG schematics simulation design software availlable Webpack 1000 reprogramming cycles 20 years data retention Widely used CPLD lots of information availlable by XILINX Inc and on the web 2 4 Xilinx XC2C64 CPLD Disadvantages The following items are not relevant in most cases However they should be used as a checklist wheather an application is affected gt Needs 1 8V core voltage 3 6V maximum I O voltage Despite the PLA architecture less product terms per macrocell than XC9500XL family gt Inputs are not 5V tolerant gt In rare cases reprogramming is o
2. Connection to the 24pin DIL plug to pin10 via serial resistor CON2 pin10 Short to GND by CONS for 20pin DIL plug 13 FB4MC13 PLD13 pin11 Connection to the 24pin DIL plug to pin11 via serial resistor CON2 pin11 Not used for the 20pin DIL plug 14 FB4MC14 PLD14 tp3 Test connector pin3 CON4 pin3 15 VCCINT Power VCC Power supply 1 8V from regulator TPS76318 16 FB4MC15 RC_IN rcin Input to an RC network can be used as an RC oscillator RC network output 17 GND Power GND Connection to the GND Layer of the PCB 18 FB3MC15 RC OUT rcout Output from an RC network this is for demonstration that RC network rc oscillators work reliably on CoolRunner ll devices with Schmitt Trigger inputs 19 FB3MC14 PLD19 tp4 Test connector pin4 CONA pin4 20 FB3MC12 PLD20 tp5 Test connector pin5 CON4 pind 21 FB3MC11 PLD21 tp6 Test connector pinG CON4 pin6 22 FB3MC10 PLD22 pin14 Connection to the 24pin DIL plug to pin14 via serial resistor CON2 pin14 Not used for the 20pin DIL plug 23 FB3MC6 OSC osc Crystal oscillator input XOSC1 This signal should be routed internally to a global clock net 24 TDO TDO JTAG interface CON 1 ping GOP_XC2C64 USER S MANUAL V0 9 Page 14 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de 25 GND Power GND Connection to the GND Layer of the PCB 26 VCCIO Pow
3. Module Layout Bottom Eeer 21 14 Terhalang 22 15 lucu EE 23 16 USER S MANUAL Revisions GOP XC2C64 USER S MANUAL V0 9 Page 3 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de GOP XC2C64 USER S MANUAL V0 9 Page 4 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 2 Introduction The GOP XC2C64 is a mini module composed of a CPLD device with a PAL GAL compatible 24 pin DIL footprint Many additional features make it useful and flexible 2 1 GOP XC2C64 Features gt XC2C64 7VQ44C CPLD a member of the XILINX CoolRunner ll family with a 24 or 20 pin PAL GAL compatible DIL footprint Xilinx Parallel Cable IV or Platform USB compatible download connector 14pin 2mm an OHO Elektronik low cost programmer is also availlable Operating voltage from 2 7V to 3 6V Serial resistors in the I O and test connector pins helps to decrease ringing Onboard Clock oscillator with 49 152 MHz for audio or RS232 applications Reverse plug in protection Ared green dual led gt A T pin test connector for probing internal signals or interconnecting several GOP s Solder jumpers for additional ground connections gt Easy to reuse Professional design manufactured on a 4 layer PCB Made in Germany 2 2 GOP XC2C64 Applications Rapid Prototyping Fastevaluation of Xilinx CPLD s Battery operated equipment
4. 3 3 PAL GAL Emulation Of 24 Pin And 20 Pin Devices As a general hint the DIL plug should be protected mechanically with the supplied DIL sockets as an adaptor In 24 pin mode of the module a 24 pin socket should be used In 20 pin mode of the module a 20 pin socket should be used Please insure that pin 1 of the module is always pin 1 of a socket In the 20 pin mode an additional GND connection must be done via a 2mm jumper on jumper block CONS at position 1 2 see Layout Top View This adds GND to pin 10 In rare cases additional GND connections are desired Pins 3 14 and 23 can be shorted to GND with solder jumpers JP1 JP3 JP2 respectively on the bottom side of the module These shorts should be soldered via a stereo microscope to insure that there are no other invalid connections GOP XC2C64 USER S MANUAL V0 9 Page 11 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de 4 CPLD Design Support As for CoolRunner Il CPLD design 3 9 and 11 are very recommended readings VHDL and UCF design templates for 20 and 24 pin configurations are availlable GOP XC2C64 USER S MANUAL V0 9 Page 12 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de 5 GOP_X2C64 I O Voltage Levels The Collrunner Il CPLD series offer a broad variety of I O voltage standards However on the GOP X2C64 only the LVCMOS33 standard is supported 12 inf
5. a pullup on tp2 Tp2 can be used as a simple input by shorting to tp1 This is also an input to the global tri state net GTS1 3 FB4MC14 PLD14 tp3 Test connector pin3 CON4 pin3 4 FB3MC14 PLD19 tp4 Test connector pin4 CON4 pin4 5 FB3MC12 PLD20 tp5 Test connector pin5 CON4 pind 6 FB3MC11 PLD21 tp6 Test connector pin6 CON4 pin6 d i zech i 3 3V input voltage protected by a polyfuse 9 CON3 Configuration Jumper options Enable 20pin PAL GAL Emulation put GND to pin 10 of CON2 Enable XOSC1 crystal oscillator 49 152 MHz GOP XC2C64 USER S MANUAL V0 9 Page 17 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 10 DIL Connector Layout GOP XC2C64 module top view for 24 pin and 20 pin emulation mode 20mm 20mm SESLSESLLS O00 amp 49 Bmm 48 5mm GOP XC2C64 USER S MANUAL V0 9 Page 18 of 24 st o CN ue ke 5 O 5 S D x Ko T T Loo G0 6E ZZ GO0c Ol Gc op AQ ET IISQ e geu3 lt E Uld oO 40123euuo3 SdIMag urdgz lt Z T Uld p2ge 829G8 b ZT T 49dunp uondg Tes j8qunN iueun2oqg o 200 92322X dO9 JILIL NO2 NYHOV
6. pinf9 Connection to the 24pin DIL plug to pin19 via serial resistor O GTS2 CON2 pin19 pin15 Connection to the 20pin DIL plug to pin15 via serial resistor Global tristate net GTS2 20 FB1MC11 PLD32 pin20 Connection to the 24pin DIL plug to pin20 via serial resistor O GTS3 CON2 pin20 pin16 Connection to the 20pin DIL plug to pin16 via serial resistor Global tristate net GTS3 21 FB1MC2 PLD37 pin21 Connection to the 24pin DIL plug to pin21 via serial resistor CON2 pin21 pin17 Connection to the 20pin DIL plug to pin17 via serial resistor GOP XC2C64 USER S MANUAL V0 9 Page 16 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de 22 FB1MC1 PLD38 pin22 Connection to the 24pin DIL plug to pin22 via serial resistor CON2 pin22 pin18 Connection to the 20pin DIL plug to pin18 via serial resistor 23 FB2MC1 PLD39 pin23 Connection to the 24pin DIL plug to pin23 via serial resistor CON2 pin23 pin19 Connection to the 20pin DIL plug to pin19 via serial resistor 24 PIN 24 3 3V input voltage to the module 8 CON4 Test Connector Pinout Table Pin CPLD pin Schema UCF function net name port Comment routed to name 1 GND GND Power ground plane connection 2 FB1MC9 PLD34 tp2 Test connector pin2 R38 is soldered to the 3 3V O GTS1 CON4 pin2 supply voltage as
7. to the 20 24pin DIL plug to pin9 via serial CON2 pin9 pin9 resistor 10 FB4MC11 PLD12 pin10 Connection to the 24pin DIL plug to pin10 via serial resistor CON2 pin10 Short to GND by CONS for 20pin DIL plug 11 FB4MC13 PLD13 pin11 Connection to the 24pin DIL plug to pin11 via serial resistor CON2 pin11 Not used for the 20pin DIL plug 12 GND GND Power ground plane connection 13 FB1MC3 PLD36 pin13 Connection to the 24pin DIL plug to pin13 via serial resistor CON2 pin13 Not used for the 20pin DIL plug 14 FB3MC10 PLD22 pin14 Connection to the 24pin DIL plug to pin14 via serial resistor CON2 pin14 Not used for the 20pin DIL plug 15 FB3MC3 PLD27 pin15 Connection to the 24pin DIL plug to pin15 via serial resistor CON2 pin15 pin11 Connection to the 20pin DIL plug to pin11 via serial resistor 16 FB3MC2 PLD28 pin16 Connection to the 24pin DIL plug to pin16 via serial resistor CON2 pin16 pin12 Connection to the 20pin DIL plug to pin12 via serial resistor 17 FB3MC1 PLD29 pin17 Connection to the 24pin DIL plug to pin17 via serial resistor CON2 pin17 pin13 Connection to the 20pin DIL plug to pin13 via serial resistor 18 FB1MC13 PLD30 pinf8 Connection to the 24pin DIL plug to pin18 via serial resistor l O GSR CON2 pin18 pin14 Connection to the 20pin DIL plug to pin14 via serial resistor Global set reset net 19 FB1MC12 PLD31
8. G TZ 88 49jyouziepuesw hg ubtseg vzH TOUSCH B 41S IoSS1g HTOpNg MINOSL M3 13 0HO aa oF c L3 e zz Zen zc Sen E ez Gu ZZ veu CC CD 5 EINER ME az teu 7 zc zey 7Qus iz La L3 HSU QLIS WWZ72ZXZH du 8 us e A m zc Zen Pi zc SCH e CC CC 5 e zc pu Pi zc ecu L3 CC A 390 aza Pr each e 5 CH SES zz v C zz Ela L3 L3 N zz v Ee L3 CH LO Ta EN PS Eech T 1 ES ec vn e Lt n 99ZIX 2 ONS UO TNId o i 5 m GNI Yo EZNId m Si Es o ON9 UO ENId 5 2 suon euuo GNI tof z Q 5 4epI S euOlTPDU ous a EE NI If ST d S o SE e T d oO ZE ZE d mm m P 9 031 8 d SU nge m ad c prar 907 d c Wi c gan d x im E x d 808TE92Sdl S E N ino Ig er EN GZ92QLSINIU Oo STO d er USO E WIT d s K EUM Um zS19 C UNA g b ES a be Tzdld TZ ESLO TIWTA d ee O o rs ZZ d zz 8819 0473 5 2S0 TE TSL9 6NTA4 d UI o Zz d E ea d 2 szad 8z d 2 6z0 1d ec THT d 2 O 1n0 99n O qm OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 12 Module Layout Top View y S2090HSINIH ch UNO FTN a L2 Fa g n g IkkOn 7 K9323X C garEnH i 7031 GOP XC2C64 USER S MANUAL V0 9 Page 20 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 13 Module Layout Bottom View DILSMD M24 CON2 J d a B GO
9. GOP XC2C64 USER S MANUAL V 0 9 OHO Elektronik www oho elektronik de Author M Randelzhofer OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de OHO Elektronik Michael Randelzhofer Rudolf Diesel Str 8 85221 Dachau Germany WEB www oho elektronik de EMAIL info oho elektronik de Phone 49 8131 339230 FAX 49 8131 339294 2005 OHO Elektronik Michael Randelzhofer All rights reserved Disclaimer Under no circumstances OHO Elektronik Michael Randelzhofer is liable for conseguential costs losses damages lost profits Any schematics pcb or program parts are under the copyright of OHO Elektronik Michael Randelzhofer and can only be reproduced by permission of this company The contents of this USER S MANUAL are subject to change without notice However the main changes are listed in the revision table at the end of this document Products of OHO Elektronik Michael Randelzhofer are not designed for use in life support systems where malfunction of these products could result in personal injury The products of OHO Elektronik Michael Randelzhofer are intended for use in a laboratory test environment only They can generate radio freguency energy depending on the downloaded design and application which can disturb local radio or TV eguipment and so they have not been tested to be CE compliant If you encounter any technical problems or mistakes in this docume
10. P XC2C64 USER S MANUAL V0 9 Page 21 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de 14 Technical Specifications CPLD Xilinx XC2C64 7VQ44C Supply Voltage on PIN24 2 7 3 6V Size 40 5 x 20mm 1 594 x 0 787 Height PCB to Top max 8mm 0 315 Height PCB to Bottom max 12mm 0 472 Weight 7g GOP XC2C64 USER S MANUAL V0 9 Page 22 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 15 Literature gt 1 DS090 Coolrunner Il CPLD Family Data Sheet http direct xilinx com bvdocs publications ds090 pdf gt 2 D8092 XC2C64 64 Macrocell Coolrunner Ill CPLD http direct xilinx com bvdocs publications ds092 pdf 3 XAPP444 CPLD Fitting Tips and Tricks http direct xilinx com bvdocs appnotes xapp444 pdf 4 TPS76318 Low Power 150mA Low Dropout Linear Regulators http focus ti com lit ds symlink tps76318 pdf gt 5 DS097 Xilinx Parallel Cable IV http direct xilinx com bvdocs publications ds097 pdf 6 DS300 Platform Cable USB http direct xilinx com bvdocs publications ds300 pdf 9 XAPP784 Bulletproof CPLD Design Practices http direct xilinx com bvdocs appnotes xapp784 pdf 10 XAPP805 Driving Leds with Xilinx CPLD s http direct xilinx com bvdocs appnotes xapp805 pdf gt 11 XAPP378 Using CoolRunner ll Advanced Features http direct xilinx com bvdocs publications xapp378 pdf gt 12 XA
11. PP382 CoolRunner ll UO Characteristics http direct xilinx com bvdocs appnotes xapp382 pdf GOP_XC2C64 USER S MANUAL V0 9 Page 23 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 16 USER S MANUAL Revisions Version Date Comments V0 9 23 10 2005 Prerelease GOP XC2C64 USER S MANUAL V0 9 Page 24 of 24
12. ccesses global clock nets GCKO and GCK1 inside the CPLD Pins 19 20 accesses the global tristate net GTS2 and GTS3 Pin 18 accesses the global set reset net 5 remaining I O s are availlable to the front side test connector CON4 also through 220 series resistors GOP XC2C64 USER S MANUAL V0 9 Page 9 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de Pin 2 of the connector accesses the global tristate net GTS1 This pin also has a pullup resistor to VCC R39 A 2 54mm jumper can be used to short pin 2 to GND at pin 1 of the testconnector as a simple status input Pin 7 of the testconnector has an unmounted pullup resistor R44 to the 3 3V supply voltage A crystal oscillator with an output frequency of 49 152MHz is connected to another I O of the CPLD This oscillator can be disabled completely by removing its power supply at jumper block CONS position 3 4 Please note that this clock must be routed inside the CPLD to a global clock net to insure proper synchronous circuit operation Furthermore 2 I O s are connected to a dual led having a red and a green chip in it s case These leds can be lighted by driving a logical 1 to these I O s The output for the red led has also access to the global tristate net GTSO Finally 2 I O s are connected to an RC network for demontration purpose A simple RC oscillator can be evaluated If the input pin 18 of the CPLD has an Scmitt Trigger attr
13. er VCC Power supply 3 3V input voltage from DIL pin 24 27 FB3MC3 PLD27 pin15 Connection to the 24pin DIL plug to pin15 via serial resistor CON2 pin15 pin11 Connection to the 20pin DIL plug to pin11 via serial resistor 28 FB3MC2 PLD28 pin16 Connection to the 24pin DIL plug to pin16 via serial resistor CON2 pin16 pin12 Connection to the 20pin DIL plug to pin12 via serial resistor 29 FB3MC1 PLD29 pin17 Connection to the 24pin DIL plug to pin17 via serial resistor CON2 pin17 pin13 Connection to the 20pin DIL plug to pin13 via serial resistor 30 FB1MC13 PLD30 pinf8 Connection to the 24pin DIL plug to pin18 via serial resistor O GSR CON2 pin18 pin14 Connection to the 20pin DIL plug to pin14 via serial resistor Global set reset net 31 FB1MC12 PLD31 pinf9 Connection to the 24pin DIL plug to pin19 via serial resistor O GTS2 CON2 pin19 pin15 Connection to the 20pin DIL plug to pin15 via serial resistor Global tristate net GTS2 32 FB1MC11 PLD32 pin20 Connection to the 24pin DIL plug to pin20 via serial resistor O GTS3 CON2 pin20 pin16 Connection to the 20pin DIL plug to pin16 via serial resistor Global tristate net GTS3 33 FB1MC10 LED R ledrd Red led of the duo led O GTSO LED1 0 led off 1 gt led on Global tristate net GTSO 34 FB1MC9 PLD34 tp2 Test connector pin2 R38 is soldered to the 3 3V supply O GTS1 CON4 pin2 voltage as a pullup on tp2 Tp2 can be used as a sim
14. ibute in the UCF File the RC oscillator operates properly 3 2 JTAG Port The CPLD JTAG signals are routed directly to the Xilinx standard 2mm 14pin JTAG port connector CON1 supported from the Parallel cable IV and Platform USB cable see 5 6 Pin 1 of the port is connected to GND which allows high speed programming with the above cables Pins 12 13 and 14 of the JTAG port are not used on this module Please notice the pin orientation of JTAG port CON1 GOP XC2C64 USER S MANUAL V0 9 Page 10 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de Power Suppy The module can be powered at DIL pin 24 from 2 7 to 3 6 Volts Module GND pin is pin 12 in 24 pin mode and pin 10 in 20 pin mode An onboard voltage regulator produces the CPLD core and I O voltage of 3 3V The regulator 4 can source up to 150mA The module has a protection against reverse insertion or reverse power connection In that case the protection shorts the power supply by a polyfuse device The polyfuse recovers after deactivation of the power supply Burn through cycles of the polyfuse are limited For more information please consult the data sheet Even so care should be taken when plugging the module Consider that a short pulse of several amps can damage the environment in which the module is inserted ATTENTION Please note that an input voltage greater than 4V will destroy the module
15. l clock net 2 GCK1 FB1MC11 denotes function block1 macrocell 11 There is an UCF file definition for 24pin and another one for 20pin device usage GOP XC2C64 USER S MANUAL V0 9 Page 15 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 7 CON2 DIL Connector Pinout Table Pin CPLD pin Schema UCF function net name port Comment routed to name 1 FB2MC7 PLD43 pin1 Connection to the 20 24pin DIL plug to pin1 via serial O GCKO CON2 pin10 pin1 resistor This is also an input to the global clock net 1 GCKO 2 FB2MC8 PLD44 pin2 Connection to the 20 24pin DIL plug to pin2 via serial O GCK1 CON2 pin10 pin2 resistor This is also an input to the global clock net 2 GCK1 3 FB2MC2 PLD40 pin3 Connection to the 20 24pin DIL plug to pin3 via serial CON2 pin3 pin3 resistor 4 FB2MC5 PLD41 pin4 Connection to the 20 24pin DIL plug to pin4 via serial CON2 pin4 pin4 resistor 5 FB2MC6 PLD42 pind Connection to the 20 24pin DIL plug to pind via serial CON2 pin5 pin5 resistor 6 FB2MC12 PLD2 pin6 Connection to the 20 24pin DIL plug to pin6 via serial CON2 pin6 pinG resistor 7 FB2MC13 PLD3 pin7 Connection to the 20 24pin DIL plug to pin7 via serial CON2 pin7 pin7 resistor 8 FB4MC2 PLD6 ping Connection to the 20 24pin DIL plug to pin8 via serial CON2 ping pin8 resistor 9 FB4MC1 PLD5 pin9 Connection
16. nly possible if no running clocks are applied to any CPLD pin GOP_XC2C64 USER S MANUAL V0 9 Page 6 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de 2 5 GOP XC2C64 Board Picures Top And Bottom View Si K EN e Li cb 2 T g F 1330 ee R DI J 30 ly d RJ Es Si 3 1 GOP XC2C64 USER S MANUAL V0 9 Page 7 of 24 OHO Elektronik Rudolf Diesel Str 8 D 85221 Dachau Germany www oho elektronik de 2 6 GOP XC2C64 Board In A Lab Environment GOP XC2C64 USER S MANUAL V0 9 Page 8 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 3 GOP XC2C64 Board Overview 2mm 14pin JTAG PORT CON1 BELLERI 10000600 Te Gin Oo 2 54mm 24 Pin nd DIL M 9 socket 9 PLUG o JP1 JP2 JP3 CON2 E E E Oo E E E e Access e Solder Jumper e To 22 e For Additional Ground 2 4 CPLD Connections e Oo e Pins 1 3 2mm 4pin 0 3 GAP 6 Jumper Block CON3 1 2 20 Pin Ground 3 4 XOSC Supply 2 54mm 7pin Test Connector CONA 3 1 VO Distribution 22 Xilinx XC2C64 7VQ44C CPLD I O s are wired to a 24 pin DIL socket plug CON2 on the bottom of the module through 220 serial resistors These resistors primarily reduces ringing Pin 1 and 2 of the DIL plug a
17. nt please contact mrandelzhofer oho elektronik de serious hints are very appreciated Trademarks All brand names or product names mentioned are trademarks or registered trademarks of their respective holders PAL and GAL are registered trademarks of Lattice Semiconductor Corp GOP XC2C64 USER S MANUAL V0 9 Page 2 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 1 Table of contents l Tabl of Contents mmm 3 PME ral eso TREO mmm 5 21 GOP XC2C04 Features ecc E 5 2 2 GOP XC2C64 Applications ce hec an an 5 23 Xilinx XC2C64 CPLD EE 6 TA Xilinx XC AC 64 CPLD Disadvantages EE 6 2 3 GOP_XC2C64 Board Picures Top And Bottom VIEW kaset 7 2 6 GOP XC2C64 Board In A Lab Environment oooooo o oo WoooooKooomooooewantnkewmninnnata 8 3 GOP XC2C64 Board Oven Mene 9 CS MEN CEP elt E 9 22 Sea na 10 PUWEE SUD niet Aa ne et PA unm Sa er Ee DAMM DNE MM MM E CUI MM Na AE An 11 33 PAL GAL Emulation Of 24 Pin And 20 Pin Devices ocooocoo oooo orooooooommaa 11 A CPLD D sign SOP OTE E 12 Be GOP X2654 VO Voltag Levels ban ma ai na 13 6 Detailed XC2C64 7VQ44 CPLD Pinout Table 14 A MAING DIL Connector Pengut KE 16 B CON4 Test Connector kee scs ema enam kamar 17 9 CONS Configuration Jumper Options kak Rn Ba 17 10 DI Connector EE Bea ana Na RA E S 18 11 Schematics sa ba EROE 19 12 Mod le Layout Top E 20 I3
18. orms about Coolrunner ll I O characteristics GOP XC2C64 USER S MANUAL V0 9 Page 13 of 24 OHO Elektronik Rudolf Diesel Str 8 gt D 85221 Dachau Germany www oho elektronik de 6 Detailed XC2C64 7VQ44 CPLD Pinout Table CPLD pin Schema UCF port Pin function net name 24pin 1 Comment routed to 20 pin 1 FB2MC10 gck2 Use as an internal clock node to the global clock net GCK2 O GCK2 If XOSC1 is used but not routed to GCKO or GCK1 use this global net instead 2 FB2MC12 PLD2 pin6 Connection to the 20 24pin DIL plug to pin6 via serial CON2 pin6 pin6 resistor 3 FB2MC13 PLD3 pin7 Connection to the 20 24pin DIL plug to pin7 via serial CON2 pin7 pin7 resistor 4 GND Power GND Connection to the GND Layer of the PCB 5 FB4MC1 PLD5 pind Connection to the 20 24pin DIL plug to pin9 via serial CON2 pind pin9 resistor 6 FB4MC2 PLD6 pin8 Connection to the 20 24pin DIL plug to pin8 via serial CON2 pin8 pin8 resistor 7 VCCIO VCC CR Power supply 3 3V input voltage from DIL pin 24 VCC 8 FB4MC7 LED_G ledgn Green led of the duo led LED1 0 gt led off 1 gt led on 9 TDI TDI JTAG interface additional 47k pullup to VCC CON 1 pin10 10 TMS TMS JTAG interface additional 47k pullup to VCC CON1 pin4 11 TCK TCK JTAG interface additional 47k pullup to VCC CON1 pin6 12 FB4MC11 PLD12 pin10
19. ple input by shorting to tp1 This is also an input to the global tri state net GTS1 35 VAUX JTAG VCC Power supply 3 3V input voltage from DIL pin 24 36 FB1MC3 PLD36 pint3 Connection to the 24pin DIL plug to pin13 via serial resistor CON2 pin13 Not used for the 20pin DIL plug 37 FB1MC2 PLD37 pin21 Connection to the 24pin DIL plug to pin21 via serial resistor CON2 pin21 pin17 Connection to the 20pin DIL plug to pin17 via serial resistor 38 FB1MC1 PLD38 pin22 Connection to the 24pin DIL plug to pin22 via serial resistor CON2 pin22 pin18 Connection to the 20pin DIL plug to pin18 via serial resistor 39 FB2MC1 PLD39 pin23 Connection to the 24pin DIL plug to pin23 via serial resistor CON2 pin23 pin19 Connection to the 20pin DIL plug to pin19 via serial resistor 40 FB2MC2 PLD40 pin3 Connection to the 20 24pin DIL plug to pin3 via serial CON2 pin3 pin3 resistor 41 FB2MC5 PLD41 pin4 Connection to the 20 24pin DIL plug to pin4 via serial CON2 pin4 pin4 resistor 42 FB2MC6 PLD42 pind Connection to the 20 24pin DIL plug to pin5 via serial CON2 pin5 pin5 resistor 43 FB2MC7 PLD43 pin1 Connection to the 20 24pin DIL plug to pin1 via serial O GCKO CON2 pin10 pin1 resistor This is also an input to the global clock net 1 GCKO 44 FB2MC8 PLD44 pin2 Connection to the 20 24pin DIL plug to pin2 via serial O GCK1 CON2 pin10 pin2 resistor This is also an input to the globa

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