Silos Code Coverage
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1. 1 out 1 always A or B or C or D begin if gt B C lt D Z else if c gt D F else end always out begin 1 outi out 1 out2 outi 1 out out outi end T1 T2 Tdelta Time 0 130us SILOS x 4 10 6 A Simucad 2007 4 Figure 2 Data Tip Showing Code Coverage Information Page 1 2 Code Coverage Line Report 927 0 coverage of 14 lines Module T ask Functon Name 16 select 0 code_coverage 1 14 code coverage Z 15 code_coverage 2 18 code coverage a 11 code_ coverage 3 12 code_coverage v 3 13 code _coverage y 3 19 code_coverage 43 2 code coverage 4i 24 code_coverage 43 25 code_coverage 43 26 code coverage 44 22 code_coverage v 3e et SERRE code coverage Figure 3 Code Coverage Line Report e Click the Main window to change the focus to the text window e Place the mouse cursor over the red icon in the left margin of the file code_coverage v and a data tip will pop up stating Line Not Executed Figure 2 e A large number of hits in the Code Coverage Line Report Figure 3 may indicate a looping problem in the design To see an example of this double click on the last entry in the Code Coverage Line Report to automatically go to that line of file code_coverage v Notice that this line is in an always loop that trig gers itself by recursively setting the variable in the sensitivity list To see how many ti2. 22 C else Z A B end H a Dounan FY MYHPOWOINHDR Oe me always out begin 1 outi out gt 24 1 out2 outl Feline Execution Count 44jut out2 outi 26 end opg 27 endmodule Ti T2 Tdelta Time 0 130us Simucad 4 Figure 4 Data Tip Showing Code Coverage Information References 1 VIS Group 1996 VIS A system for Verification and Syn thesis in proceedings of 8th International Conference on Computer Aided Verification CAV pp428 432 Vol 1102 Lecture Notes in Computer Science Springer July 2 Expression Coverability Analysis Improving code cover age with model checking Graeme D Cunningham Paul B Jackson Julian A B Dines 3 Silos User Manual Application Note 4 004
3. SILVACO Application Note Silos Code Coverage Introduction Code coverage analysis measures how thoroughly a simulation testbench exercises parts of a design It pro vides an indication of the quality of the testbench if some part of the design is not exercised by a testbench then a test case may be missing from the test specification which was used to create the testbench Alternatively perhaps it is expected that the section is unexercised be cause the design is more general than strictly needed and some mode is unused A section of code may also be unexercised because of a bug in the design There are various kinds of code coverage including statement coverage path coverage FSM coverage and expression coverage Silos code coverage reports be havioral lines that did not execute and operators not fully exercised This application note describes how to create a line cov erage report using Silos Example Procedure for Using Line Coverage Feature of Silos e The example project code_coverage spj will be used to explain the procedure e Start Silos and open the project code_coverage spj 23 Code Coverage Line Report 92 0 coverage of 14 lines select 0 code_coverage select 1 14 code_coverage select 2 15 code_coverage v select 2 18 code_coverage select 3 11 code_coverage select 3 T2 code_coverage Y select 3 13 code_coverage select 3 19 code_coverage select 43 21 code_cover
4. age Y select 43 24 code_coverage Y select 43 25 code_coverage select 43 26 code_coverage select 44 22 code_coverage v select 44 23 code_coverage Figure 1 Code Coverage Line Report Application Note 4 004 e To enable Code Coverage reporting click on the En able Code Coverage button if it is not already select ed If the Enable Code Coverage button is selected after inputting the files for the design Silos will display a message box to allow the user to reload the design and enable Code Coverage reporting e Click on the Go button to simulate the design e Select the Reports Code Coverage Line Report menu selection to open the Code Coverage Line Coverage report Figure 1 This report is sorted by the number of times each line is executed Hits in ascending or der Normally you are interested in which lines are not executed O Hits However the report can also be used to see which lines have a high number of execu tions indicating a possible flaw in the design The sort order can be changed by clicking on the desired sort column heading e While viewing the Code Coverage Line Report double click on the first entry in the report that has zero Hits This will open the file code_coverage v and display the line that did not execute with a red icon in the left margin of the line input 1 0 A B C D output 1 0 Z reg 1 0 Z reg out outl out2 initial
5. mes the line was executed change the focus back to the Main text window place the mouse cursor over the green text box and a data tip will pop up stating Line Execution Count 44 Figure 4 e The Code Coverage results can be displayed in an other program such as Microsoft Excel To demon strate the exporting of the Code Coverage results select the Reports Export menu selection to open the Export Code Coverage Data dialog box Select a file name and click the OK button to close the dialog box The file can be viewed in an editor window to verify the export format or import the file into a program such as Microsoft Excel Conclusion The Code Coverage of a given test pattern can easily be measured using Silos Reports in various formats can be generated using this feature that list unexercised lines and hit count for the behavioral source code of a Verilog design Page 2 SILVACO SILOS x E Tools Silos 4 8 10 C verilog d code_coverage code_coverage spj File Edit View Analyzer Debug Explorer Reports Help 188 A214 BIBS A lt 2 Giswetmue a gt 2 t1 12 Elz 3 Output code_coverage v x 1 title Simple Design to illustrate Code Coverage nm 3 module select A B C D Z input 1 0 A B D output 1 0 Z reg 1 0 Z reg out outl out2 initial 1 out 1 GJ always A or B or C or D begin if gt 8 C eD Z A ies ees ees 63 6 else if C gt D
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