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X Series User Manual

1. oo lt lt Al 0 Al 0 68 34 Al 8 Al 0 Al 16 Al 16 68 34 Al 24 AI 16 Al GND 67 33 Al 1 Al 1 Al GND 67 33 Al 17 Al 17 Al 9 AI 1 66 32 Al GND Al 25 Al 17 66 32 Al GND Al 2 Al 2 65 31 Al 10 Al 2 Al 18 Al 18 65 31 Al 26 AI 18 Al GND 64 30 Al 3 Al 3 Al GND 64 30 AI 19 Al 19 Al 11 Al 3 63 29 Al GND Al 27 Al 19 63 29 Al GND Al SENSE 62 28 Al 4 Al 4 Al SENSE 2 62 28 Al 20 Al 20 Al 12 Al 4 61 27 AI GND Al 28 Al 20 61 27 AI GND Al 5 Al 5 60 26 Al 13 Al 5 Al 21 Al 21 60 26 Al 29 Al 21 Al GND 59 25 Al 6 Al 6 Al GND 59 25 Al 22 Al 22 Al 14 Al 6 58 24 Al GND Al 30 Al 22 58 24 Al GND Al7 Al7 57 23 al 15 Al7 Al 23 Al 23 57 23 al 31 Al 23 Al GND 56 22 AOO Al GND 56 22 AO 2 AO GND 55 21 AO1 AO GND 55 21 AO3 AO GND 54 20 APFIO AO GND 54 20 APFI 1 D GND 53 19 PO 4 D GND 53 19 P0 12 P0 0 52 18 D GND P0 8 52 18 D GND P0 5 51 17 PO 1 P0 13 51 17 P0 9 D GND 50 16 P0 6 D GND 50 16 P0 14 P0 2 49 15 D GND P0 10 49 15 D GND P
2. SOURCE OUT Counter Armed Figure 7 33 Continuous Pulse Train Generation Continuous pulse train generation is sometimes called frequency division If the high and low pulse widths of the output signal are M and N periods then the frequency of the Counter n Internal Output signal is equal to the frequency of the Source input divided by M N For information about connecting counter signals refer to the Default Counter Timer Pinouts section Buffered Pulse Train Generation X Series counters can use the FIFO to perform a buffered pulse train generation This pulse train can use implicit timing or sample clock timing When using implicit timing the pulse idle time and active time changes with each sample you write With sample clocked timing each sample you write updates the idle time and active time of your generation on each sample clock edge Idle time and active time can also be defined in terms of frequency and duty cycle or idle ticks and active ticks 8 Note On buffered implicit pulse trains the pulse specifications in the DAQmx Create Counter Output Channel are ignored so that you generate the number of pulses defined in the multipoint write On buffered sample clock pulse trains the pulse specifications in the DAQmx Create Counter Output Channel are generated after the counters start and befor
3. Q QW S A AQ Q QQ QA QO 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Al 20 Al 20 Al 28 Al 20 Al GND Al 21 Al 21 Al 29 Al 21 Al GND Al 22 Al 22 AI 30 AI 22 Al GND Al 23 Al 23 AI 31 AI 23 Al GND APFI 1 Al GND AO 3 AO GND PO 24 D GND PO 25 D GND P0 26 D GND P0 27 D GND P0 28 D GND P0 29 D GND P0 30 D GND P0 31 D GND X Series User Manual Figure A 11 NI USB 6353 6363 Screw Terminal Pinout A 20 ni com Appendix A Device Specific Information B Note Refer to Table 7 10 X Series USB Screw Terminal Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help NI 6353 6363 Specifications Refer to the NI 6351 6353 Specifications for more detailed information about the NI 6353 device Refer to the NI 6361 6363 Specifications for more detailed information about the NI 6361 device NI 6353 6363 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information National Instruments A 21 X Series User Manual Appen
4. 4 62 National Instruments ix X Series User Manual Contents Chapter 5 Analog Output AO Reference Selection 2 ccsc cc0 cases tincds iri asa e a RAEE E E EAEE E ent 5 2 Minimizing Glitches on the Output Signal 5 3 Analog Output Data Generation Methods 5 3 Software Timed Generations 5 3 Hardware Timed Generations 5 3 Analog Output Triggering sssini tini eriari a eE E E E R ANa AEE 5 5 Connecting Analog Output Signals s ss 5 5 Analog Output Timing Signals ss 5 6 AO Start Trigger Signal sisi ss heat ses eines 5 7 Retriggerable Analog Output 5 7 Using a Digital Source sinus ste 5 7 Using an Analog Source ss 5 8 Routing AO Start Trigger Signal to an Output Terminal 5 8 AO Pause Trigger Signal cc sisi sise d ni 5 8 Using a Digital Source einen 5 9 Using an Analog Source ss 5 10 Routing AO Pause Trigger Signal to an Output Terminal 5 10 AO Sample Clock Signal 5 10 Using an Internal Source ss 5 10 Using an External Source ss 5 11 Routing AO Sample Clock Signal to an Output Terminal 5 11 Other Timing Requirements 5 11 AO Sample Clock Timebase Signal 5 12 Getting Started with AO Applications in Software 5 13 Chapter 6 Digital 1 0 Digital Input D
5. ee gg Se BULLE ANA TNNNAN ANA AN NNANNN oe oe ee Figure 7 15 Sample Clocked Buffered Frequency Measurement Averaging When CI Freq EnableAveraging is set to false the frequency measurement returns the frequency of the pulse just before the sample clock This single measurement is a single frequency measurement and is not an average between clocks Counter Armed 1 1 1 1 Gate o 6 14 Sample i i Clock i i i Latched l 6 Values AO A Figure 7 16 Sample Clocked Buffered Frequency Measurement Non Averaging With sample clocked frequency measurements ensure that the frequency to measure is twice as fast as the sample clock to prevent a measurement overflow National Instruments 7 17 X Series User Manual Chapter 7 Counters Hardware Timed Single Point Frequency Measurement hardware timed single point HWTSP frequency measurements can either be a single frequency measurement or an average between sample clocks Use CI Freq EnableAveraging to set the behavior For hardware timed single point the default is False Refer to the Sample Clocked Buffered Frequency Measurement section for more information Counter Armed i i i Gate
6. National Instruments Figure 5 4 Retriggerable Analog Output Using a Digital Source To use AO Start Trigger specify a source and an edge The source can be one of the following signals e A pulse initiated by host software e PFI lt 0 15 gt e RTSI lt 0 7 gt e AI Start Trigger ai StartTrigger e Al Reference Trigger ai ReferenceTrigger 5 7 X Series User Manual Chapter 5 Analog Output e PXI STAR e PXIe DSTAR lt A B gt e Counter n Internal Output e Change Detection Event e DI Start Trigger di StartTrigger e DI Reference Trigger di ReferenceTrigger e DO Start Trigger do StartTrigger The source also can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the waveform generation begins on the rising edge or falling edge of AO Start Trigger Using an Analog Source When you use an analog trigger source the waveform generation begins on the first rising edge of the Analog Comparison Event signal Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information Routing AO Start Trigger Signal to an Output Terminal You can route AO Start Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal The output is an active high pulse PFI terminals are configured as inputs by default AO Pause Trigger S
7. Sample Clock Latched Value Figure 7 17 Hardware Timed Single Point Frequency Measurement 5 Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations X Series User Manual Choosing a Method for Measuring Frequency The best method to measure frequency depends on several factors including the expected frequency of the signal to measure the desired accuracy how many counters are available and how long the measurement can take For all frequency measurement methods assume the following fx is the frequency to be measured if no error fk is the known source or gate frequency measurement time T is the time it takes to measure a single sample Divide down N is the integer to divide down measured frequency only used in large range two counters fs is the sample clock rate only used in sample clocked frequency measurements 7 18 ni com Chapter 7 Counters Here is how these variables apply to each method summarized in Table 7 2 One counter With one counter measurements a known timebase is used for the source frequency fk The measurement time is the period of the frequency to be measured or 1 fx Two counter high frequency With the two counter high frequency method the second counter provides a known measurement time The gate frequency equals 1 measurement time Two counter large
8. Source pi i TT on Hota HU Buffer af2 412 412 412 4 4 4 4 4 4 6 2 6 2 2 2 X Series User Manual Figure 7 9 Implicit Buffered Pulse Measurement Sample Clocked Buffered Pulse Measurement A sample clocked buffered pulse measurement is similar to single pulse measurement but a buffered pulse measurement takes measurements over multiple pulses correlated to a sample clock The counter performs a pulse measurement on the Gate On each sample clock edge the counter stores the high and low ticks in the FIFO of the last pulse to complete A DMA controller transfers the stored values to host memory 7 10 ni com Chapter 7 Counters Figure 7 10 shows an example of a sample clocked buffered pulse measurement Counter i S2 Armed gt _ Gate sous LU i nin Sample i l Clock HL HL Buffer 9 2 2 3 3 2 2 313 Figure 7 10 Sample Clocked Buffered Pulse Measurement Hardware Timed Single Point Pulse Measurement A hardware timed single point HWTSP pulse measurement has the same behav
9. 6 27 Figure 6 14 Case 2 X Series User Manual Chapter 6 Digital I O Figure 6 15 illustrates the difference between line and bus filtering Digital Input PO A Digital Input PO B 1A 2A 3A Filter Clock Filtered Input A kK T Filtered Input B 2A With line filtering filtered input A would ignore the glitch on digital input PO B and transition after two filter clocks 3A Filtered input A goes high when sampled high for two consecutive filter clocks and transitions on the next filter edge because digital input PO B glitches Figure 6 15 Line and Bus Filtering Watchdog Timer The watchdog timer is a software configurable feature used to set critical outputs to safe states in the event of a software failure a system crash or any other loss of communication between the application and the X Series device When the watchdog timer is enabled if the X Series device does not receive a watchdog reset software command within the time specified for the watchdog timer the outputs go to a user defined safe state and remain in that state until the watchdog timer is disarmed by the application and new values are written the device is reset or the computer is restarted The expiration signal that indicates an expired watchdog will continue to assert until the watchdog is disarmed After the watchdog timer expires the device ig
10. AIO Ov AlO gt Al GND X Series User Manual Refer to the Analog Input Terminal Configuration section for descriptions of the input modes ni com Chapter 4 Analog Input Types of Signal Sources When configuring the input channels and making signal connections first determine whether the signal sources are floating or ground referenced e Floating Signal Sources A floating signal source is not connected in any way to the building ground system and instead has an isolated ground reference point Some examples of floating signal sources are outputs of transformers thermocouples battery powered devices optical isolators and isolation amplifiers An instrument or device that has an isolated output is a floating signal source You must connect the ground reference of a floating signal to the AI ground of the device to establish a local or onboard reference for the signal Otherwise the measured input signal varies as the source floats outside the common mode input range e Ground Referenced Signal Sources A ground referenced signal source is connected in some way to the building system ground and is therefore already connected to acommon ground point with respect to the device assuming that the computer is plugged into the same power system as the source Non isolated outputs of instruments and devices that plug into the building power system fall into this category The differen
11. Hardware timed generations have several advantages over software timed generations e The time between samples can be much shorter e The timing between samples can be deterministic e Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or hardware timed single point HWTSP A buffer is a temporary storage in computer memory for to be transferred samples e Hardware timed single point HWTSP Typically HWTSP operations are used to write single samples at known time intervals While buffered operations are optimized for high throughput HWTSP operations are optimized for low latency and low jitter In addition HWTSP can notify software if it falls behind hardware These features make HWTSP ideal for real time control applications HWTSP operations in conjunction with the wait for next sample clock function provide tight synchronization between the software layer and the hardware layer Refer to the NI Developer Zone document NI DAQmx Hardware Timed Single Point Lateness Checking for more information To access this document go to ni com info and enter the Info Code daghwtsp 6 14 ni com Chapter 6 Digital I O B Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations National Instruments Buffered In a buffered generation data is moved from a PC buffer to the DAQ device s onboard FIFO using DMA before it
12. Using RTSI as Outputs X Series User Manual RTSI lt 0 7 gt are bidirectional terminals As an output you can drive any of the following signals to any RTSI terminal e Al Start Trigger ai StartTrigger e Al Reference Trigger ai ReferenceTrigger e AI Convert Clock ai ConvertClock e AI Sample Clock ai SampleClock e AT Pause Trigger ai PauseTrigger e AO Sample Clock ao SampleClock e AO Start Trigger ao StartTrigger e AO Pause Trigger ao PauseTrigger e DI Start Trigger di StartTrigger e DI Sample Clock di SampleClock e DI Pause Trigger di PauseTrigger e DI Reference Trigger di ReferenceTrigger e DO Start Trigger do StartTrigger e DO Sample Clock do SampleClock e DO Pause Trigger do PauseTrigger e 10 MHz Reference Clock e Counter n Source Gate Z Internal Output e Change Detection Event e Analog Comparison Event 9 6 ni com Chapter 9 Digital Routing and Clock Generation e FREQ OUT e PR lt 0 5 gt 3 Note Signals with a are inverted before being driven on the RTSI terminals Using RTS Terminals as Timing Input Signals You can use RTSI terminals to route external timing signals to many different X Series functions Each RTSI terminal can be routed to any of the following signals e AT Convert Clock ai ConvertClock e AI Sample Clock ai SampleClock e AI Start Trigger ai StartTrigger e Al Reference Trigger ai ReferenceTrigger e AI Pause Trigger ai PauseTri
13. e Right click the name of the device in the MAX configuration tree and select Self Calibrate from the drop down menu 3 Note You can also programmatically self calibrate your device with NI DAQmx as described in Device Calibration in the NI DAQmx Help or the LabVIEW Help X Series User Manual 1 2 ni com Chapter 1 Getting Started Getting Started with X Series USB Devices The following sections contain information about X Series USB device best practices and features USB Device Chassis Ground 3 Note NI USB 636x Mass Termination Devices X Series USB Mass Termination devices have chassis ground connection through the I O connector National Instruments NI USB 634x 635x 636x Screw Terminal Devices For EMC compliance the chassis of the X Series USB Screw Terminal device must be connected to earth ground through the chassis ground The wire should be AWG 16 or larger solid copper wire with a maximum length of 1 5 m 5 ft Attach the wire to the earth ground of the facility s power system For more information about earth ground connections refer to the KnowledgeBase document Earth Grounding for Test and Measurement Devices by going to ni com info and entering the Info Code earthground You can attach and solder a wire to the chassis ground lug of the X Series USB device as shown in Figure 1 1 The wire should be as short as possible 108 109 110 111 112 eeeee Fig
14. AI Sample Clock Timebase is not available as an output on the I O connector AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge except on 100 MHz Timebase or 20 MHz Timebase X Series User Manual 4 56 ni com Chapter 4 Analog Input Al Hold Complete Event Signal The AI Hold Complete Event ai HoldCompleteEvent signal generates a pulse after each A D conversion begins You can route AI Hold Complete Event out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal The polarity of AI Hold Complete Event is software selectable but is typically configured so that a low to high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed Al Start Trigger Signal Use the AI Start Trigger ai StartTrigger signal to begin a measurement acquisition A measurement acquisition consists of one or more samples If you do not use triggers begin a measurement with a software command Once the acquisition begins configure the acquisition to stop e When a certain number of points are sampled in finite mode e After a hardware reference trigger in finite mode e With a software command in continuous mode An acquisition that uses a start trigger but not a reference trigger is sometimes referred to as a posttriggered
15. Chapter 2 DAQ System Overview Calibration Circuitry The X Series analog inputs and outputs have calibration circuitry to correct gain and offset errors You can calibrate the device to minimize AI and AO errors caused by time and temperature drift at run time No external circuitry is necessary an internal reference ensures high accuracy and stability over time and temperature changes Factory calibration constants are permanently stored in an onboard EEPROM and cannot be modified When you self calibrate the device as described in the Device Self Calibration section of Chapter 1 Getting Started software stores new constants in a user modifiable section of the EEPROM To return a device to its initial factory calibration settings software can copy the factory calibration constants to the user modifiable section of the EEPROM Refer to the NJ DAQm x Help or the LabVIEW Help for more information about using calibration constants For a detailed calibration procedure for X Series devices refer to the B E M S X Series Calibration Procedure by clicking Manual Calibration Procedures on ni com calibration Cables and Accessories Refer to the PCI Express PXI Express and USB Mass Termination Device Cables and Accessories section for X Series PCI Express PXI Express and USB Mass Termination device cable and accessory information Refer to the USB Screw Terminal Device Accessories section for X Series USB Screw Terminal device acces
16. OUT Figure 7 32 Retriggerable Single Pulse Generation with Initial Delay on Retrigger Set to False 3 Note The minimum time between the trigger and the first active edge is two ticks of the source X Series User Manual For information about connecting counter signals refer to the Default Counter Timer Pinouts section Continuous Pulse Train Generation This function generates a train of pulses with programmable frequency and duty cycle The pulses appear on the Counter n Internal Output signal of the counter You can specify a delay from when the counter is armed to the beginning of the pulse train The delay is measured in terms of a number of active edges of the Source input You specify the high and low pulse widths of the output signal The pulse widths are also measured in terms of a number of active edges of the Source input You also can specify the active edge of the Source input rising or falling The counter can begin the pulse train generation as soon as the counter is armed or in response to a hardware Start Trigger You can route the Start Trigger to the Gate input of the counter You also can use the Gate input of the counter as a Pause Trigger if it is not used as a Start Trigger The counter pauses pulse generation when the Pause Trigger is active 7 34 ni com Chapter 7 Counters Figure 7 33 shows a continuous pulse train generation using the rising edge of Source
17. Signals with an support digital filtering Refer to the PFI Filters section of Chapter 8 PFI for more information Aggregate versus Single Channel Sample Rates Simultaneous MIO X Series devices have one ADC per channel so the single channel maximum sample rate can be achieved on each channel The maximum single channel rate is the fastest you can acquire data on the device from a single or multiple channels and still achieve accurate results 4 53 X Series User Manual Chapter 4 Analog Input X Series User Manual The total aggregate determines the maximum bus bandwidth used by the device The total aggregate sample rate is the product of the maximum sample rate for a single channel multiplied by the number of AI channels that the device support Table 4 7 shows the single channels and total aggregate rates for Simultaneous MIO X Series devices Table 4 7 Analog Input Rates for Simultaneous MIO X Series Devices Simultaneous MIO RASE TOPONI X Series Device Single Channel Total Aggregate NI 6356 1 25 MS s 10 MS s NI 6358 1 25 MS s 20 MS s NI 6366 2 MS s 16 MS s NI 6368 2 MS s 32 MS s Note On Simultaneous MIO X Series devices each channel has an ADC so each channel can be acquired at the maximum single channel rate Al Sample Clock Signal Use the AI Sample Clock ai SampleClock signal to initiate a set of measurements Your Simultaneous MIO X Series device samples the AI signals
18. With an external or internal source less than 25 MHz the device generates a delayed Source signal by delaying the Source signal by several nanoseconds The device synchronizes signals on the rising edge of the delayed Source signal and counts on the following rising edge of the source as shown in Figure 7 42 A Source Synchronize Delayed Source Count Figure 7 42 External or Internal Source Less than 25 MHz National Instruments 7 53 X Series User Manual PFI X Series devices have up to 16 Programmable Function Interface PFI signals In addition X Series devices have up to 32 lines of bidirectional DIO signals Each PFI can be individually configured as the following e A Static digital input e A Static digital output e A timing input signal for AI AO DI DO or counter timer functions e A timing output signal from AI AO DI DO or counter timer functions Each PFI input also has a programmable debouncing filter Figure 8 1 shows the circuitry of one PFI line Each PFI line is similar Signal Selectors PFI Change Detection Timing Signals Static DO Buffer ae I O Protection PFI x P1 P2 Static DI lt Direction Control To Input Timing PFI Weak Pull Down Filters National Instruments Figure 8 1 X Series PFI Circuitry 8 1 X Series User Manual Chapter 8 PFI
19. 6 1 X Series User Manual Chapter 6 Digital I O DO Waveform Generation FIFO DO Sample Clock Static DO Buffer DI Waveform Measurement FIFO DO x Direction Control Static DI I O Protection e PO x Weak Pull Down DI Sample Clock DI Change Detection A Filter Figure 6 1 X Series Digital 1 0 Circuitry The DIO terminals are named P0 lt 0 31 gt on the X Series device I O connector The voltage input and output levels and the current drive levels of the DIO lines are listed in the specifications of your device Digital Input Data Acquisition Methods When performing digital input measurements you either can perform software timed or hardware timed acquisitions Software Timed Acquisitions With a software timed acquisition software controls the rate of the acquisition Software sends a separate command to the hardware to initiate each acquisition In NI DAQmx software timed acquisitions are referred to as having on demand timing Software timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data X Series User Manual ni com Chapter 6 Digital I O Each of the X Series DIO lines can be used as a static DI or DO line You can use static DIO lines to monitor or control digital signals Each DIO ca
20. A compact modular form factor for signal conditioning modules Signal Conditioning eXtensions for Instrumentation The National Instruments product line for conditioning low level signals within an external chassis near sensors so that only high level signals are sent to DAQ devices in the noisy PC environment A device that responds to a physical stimulus heat light sound pressure motion flow and so on and produces a corresponding electrical signal Primary characteristics of sensors are sensitivity frequency range and linearity G 13 X Series User Manual Glossary signal conditioning signal source single trigger mode single buffered single ended input single ended output software applications software triggering source impedance synchronous X Series User Manual 1 Electronic equipment that makes transducer or other signals suitable in level and range to be transmitted over a distance or to interface with voltage input instruments 2 The manipulation of signals to prepare them for digitizing A generic term for any instrument in the family of signal generators When the arbitrary waveform generator goes through the staging list only once Describes a device that acquires a specified number of samples from one or more channels and returns the data when the acquisition is complete A circuit that responds to the voltage on one input terminal and ground See also differential input A c
21. C 1 transducers 2 8 trigger 11 1 analog actions 11 4 arm start 7 50 pause 7 50 PXI 9 8 PXI_STAR 9 9 Star Trigger 9 9 start 7 50 triggering 11 1 analog accuracy 11 8 analog actions 11 4 National Instruments Corporation 1 15 Index analog edge 11 5 analog edge with hysteresis 11 6 analog input MIO X Series devices 4 11 Simultaneous MIO X Series devices 4 46 analog input channels 11 4 analog types 11 5 analog window 11 7 APFI lt 0 1 gt terminals 11 3 counter 7 50 with a digital source 11 1 with an analog source 11 2 troubleshooting analog input B 1 analog output B 3 counters B 3 troubleshooting NI resources C 1 two signal edge separation measurement 7 26 buffered 7 28 single 7 27 types of analog triggers 11 5 U USB Signal Stream as a transfer method 10 2 USB X Series accessories 2 8 bulk transfers 10 2 cable strain relief 1 7 desktop use 1 5 device security 1 7 1 8 DIN rail mounting 1 6 panel mounting 1 5 security cable slot 1 7 1 8 USB cable strain relief 1 7 wall mounting 1 5 X Series User Manual Index using low impedance sources MIO X Series devices 4 7 PFI terminals as static digital I Os 8 4 as timing input signals 8 2 to export timing output signals 8 3 RTSI as outputs 9 6 terminals as timing input signals 9 7 short high quality cabling MIO X Series devices 4 7 the disk drive power connector PCI Express 3 4
22. Chapter 7 Counters Figure 7 26 shows an example of a sample clocked buffered two signal separation measurement Sample Clock AUX A GATE i Aii i A SOURCE Counter Value 1 2 3 1 2 3 1 2 3 Buffer w wj Figure 7 26 Sample Clocked Buffered Two Signal Separation Measurement Hardware Timed Single Point Two Signal Separation Measurement A hardware timed single point HWTSP two signal separation measurement has the same behavior as a sample clocked buffered two signal separation measurement Refer to the Sample Clocked Buffered Two Signal Separation Measurement section for more information Note Ifan active edge on the Gate and an active edge on the AUX does not occur between sample clocks an overrun error will occur a g Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations For information about connecting counter signals refer to the Default Counter Timer Pinouts section National Instruments 7 29 X Series User Manual Chapter 7 Counters Counter Output Applications The following sections list the various counter output applications available on X Series devices e Simple Pulse Generation e Pulse Train Generation e Frequency Generation e F
23. D a P a oo N be e N N D N w D R ny a D oo N S D nN oO oO oO wo oO D oO ao w Lu D GND D GND P0 24 P0 23 P0 31 P0 29 P0 20 P0 19 P0 18 D GND P0 26 P0 27 PO 11 PO 15 PO 10 D GND P0 13 P0 8 D GND AO GND AO GND Al GND Al 23 Al 23 Al 30 Al 22 Al GND Al 21 Al 21 Al 28 Al 20 Al SENSE 2 Al 27 Al 19 Al GND Al 18 Al 18 Al 25 Al 17 Al GND Al 16 Al 16 X Series User Manual Figure A 9 NI PCle 6353 and NI PCle PXle 6363 Pinout A 16 ni com Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DA Qmx Help or the LabVIEW Help National Instruments A 17 X Series User Manual Appendix A Device Specific Information Figure A 10 shows the pinout of the NI USB 6363 Mass Termination For a detailed description of each signal refer to the I O Connector Signal Descriptions section of Chapter 3 Connector and LED Information
24. THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Electromagnetic Compatibility Guidelines This product was tested and complies with the regulatory requirements and limits for electromagnetic compatibility EMC as stated in the product specifications These requirements and limits are designed to provide reasonable protection against harmful interference when the product is operated in its intended operational electromagnetic environment This product is intended for use in industrial locations There is no guarantee that harmful interference will not occur in a particular installation when the product is connected to a test object or if the product is used in residential areas To minimize the potential for the product to cause
25. ay Note The security cable slot on the USB device might not be compatible with all laptop lock cables Device Pinouts Refer to Appendix A Device Specific Information for X Series device pinouts Device Specifications Refer to the specifications document for your device NI 632x Specifications NI 634x Specifications NI 6351 6353 Specifications NI 6356 6358 Specifications NI 6361 6363 Specifications NI 6366 6368 Specifications X Series device documentation is available on the NI DAQ Device Document Browser or ni com manuals Device Accessories and Cables NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information X Series User Manual 1 8 ni com DAQ System Overview Figure 2 1 shows a typical DAQ system which includes sensors transducers signal conditioning devices cables that connect the various devices to the accessories the X Series device programming software and PC The following sections cover the components of a typical DAQ system a ele il I Signal Cables and DAQ DAQ Personal Computer Conditioning Accessories Hardware Software or Sensors and Ti d PXI Express ransducers Chassis Figure 2 1 Components of a Typical DAQ System DAQ Hardware DAQ hardware digitizes s
26. 4 19 ni com RSE connections using with floating signal sources MIO X Series devices 4 19 when to use with floating signal sources MIO X Series devices 4 14 when to use with ground referenced signal sources MIO X Series devices 4 21 RTSL 9 4 connector pinout 3 5 9 5 filters 9 7 using as outputs 9 6 using terminals as timing input signals 9 7 rubber feet 1 5 S sample clock edge counting 7 5 measurement 7 25 scanning speed MIO X Series devices 4 9 SCC 2 9 SCXI 2 9 self calibration 1 2 semi period measurement 7 12 implicit buffered 7 12 single 7 12 sensors 2 8 settings analog input ground reference MIO X Series devices 4 4 AO reference selection 5 2 short high quality cabling MIO X Series devices 4 7 signal conditioning 2 8 options 2 9 signal connections analog input Simultaneous MIO X Series devices 4 46 National Instruments Corporation 1 13 Index signal descriptions 3 1 signal routing RTSI bus 9 4 signal sources floating MIO X Series devices 4 13 Simultaneous MIO X Series devices 4 47 ground referenced MIO X Series devices 4 20 Simultaneous MIO X Series devices 4 47 signals AI Convert Clock 4 31 AI Convert Clock Timebase 4 34 AI Hold Complete Event 4 34 Simultaneous MIO X Series devices 4 57 AI Pause Trigger MIO X Series devices 4 38 Simultaneous MIO X Series devices 4 61 AI Reference Trigger MIO X Series devices 4 37 Simultaneous MIO X Ser
27. Analog Comparison Event PXI_STAR Ctr n Internal Output AO Sample Clock Analog Comparison __ Timebase Programmable Event e Clock 20 MHz Timebase Divider 100 kHz Timebase PXI_CLK10 Figure 5 3 Analog Output Timing Options X Series devices feature the following analog output waveform generation timing signals e AO Start Trigger Signal e AO Pause Trigger Signal X Series User Manual 5 6 ni com Chapter 5 Analog Output e AO Sample Clock Signal e AO Sample Clock Timebase Signal Signals with an support digital filtering Refer to the PFI Filters section of Chapter 8 PFI for more information AO Start Trigger Signal Use the AO Start Trigger ao StartTrigger signal to initiate a waveform generation If you do not use triggers you can begin a generation with a software command Retriggerable Analog Output The AO Start Trigger can be configured to be retriggerable The timing engine will generate the sample clock for the configured generation in response to each pulse on an AO Start Trigger signal The timing engine ignores the AO Start Trigger signal while the clock generation is in progress After the clock generation is finished the counter waits for another Start Trigger to begin another clock generation Figure 5 4 shows a retriggerable AO generation of four samples AO Start Trigger AO Sample Clock
28. National Instruments To avoid ESD damage in handling the device take the following precautions e Ground yourself with a grounding strap or by touching a grounded object e Touch the antistatic package to a metal part of your computer chassis before removing the device from the package 1 1 X Series User Manual Chapter 1 Getting Started Remove the device from the package and inspect it for loose components or any other signs of damage Notify NI if the device appears damaged in any way Do not install a damaged device in your computer or chassis Store the device in the antistatic package when the device is not in use Device Self Calibration NI recommends that you self calibrate your X Series device after installation and whenever the ambient temperature changes Self calibration should be performed after the device has warmed up for the recommended time period Refer to the device specifications to find your device warm up time This function measures the onboard reference voltage of the device and adjusts the self calibration constants to account for any errors caused by short term fluctuations in the environment You can initiate self calibration using Measurement amp Automation Explorer MAX by completing the following steps 1 Launch MAX 2 Select My System Devices and Interfaces your device 3 Initiate self calibration using one of the following methods e Click Self Calibrate in the upper right corner of MAX
29. RO 48 14 KE TERMINAL 1 TERMINAL 34 408 21 85 AO GND P0 3 47 13 D GND AO 2 2256 Al 15 GND PFI11 P2 3 46 12 D GND TERMINAL 35 ts M TERMINAL 68 AI 15 23157 Al 15 PFI 10 P2 2 45 11 PFI 0 P1 0 Al 14 GND 24 58 Al 14 D GND 44 10 PFI4 P1 1 Al 14 25 59 AI 13 GND PFI 2 P1 2 43 9 D GND Al 13 26 60 Al 13 PFI 3 P1 3 42 8 5V Al 12 GND 27 61 A112 PFI 4 P1 4 41 7 D GND Al 12 28 62 Nc PFI 13 P2 5 40 6 PFI5 P1 5 Al 11 GND 29 63 A1 11 PFI 15 P2 7 39 5 PFi6 P1 6 Al 11 30 64 Al 10 GND PFI 7 P1 7 38 4 DGND Al 10 31165 A110 PFI 8 P2 0 37 3 PFI9 P21 AI 9 GND 32 66 A19 D GND 36 2 PFI12 P24 Al 9 33 67 A18 GND D GND 35 1 PFI 14 P2 6 Al 8 34 68 Al 8 Sa AA NC No Connect NC No Connect Figure A 15 NI PXle 6358 6368 Pinout National Instruments A 27 X Series User Manual Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help NI 6358 6368 Specifications Refer to the NI 6356 6358 Specifications for more detailed information about the NI 6358 device Refer to the NI 6366 6368 Specifications for
30. Sources section for more information about differential connections X Series User Manual 4 20 ni com National Instruments Chapter 4 Analog Input When to Use Non Referenced Single Ended NRSE Connections with Ground Referenced Signal Sources Only use NRSE connections if the input signal meets the following conditions e The input signal is high level greater than 1 V e The leads connecting the signal to the device are less than 3 m 10 ft e The input signal can share a common reference point with other signals DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions In the single ended modes more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations The coupling is the result of differences in the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground Refer to the Using Non Referenced Single Ended NRSE Connections for Ground Referenced Signal Sources section for more information about NRSE connections When to Use Referenced Single Ended RSE Connections with Ground Referenced Sign
31. W waveform generation digital 6 16 signals 5 6 Web resources C 1 wiring Simultaneous MIO X Series devices 4 51 working voltage range Simultaneous MIO X Series devices 4 4 4 43 X Series User Manual 1 16 X X Series accessories and cables 1 8 accessory options 2 4 cabling options 2 4 information A 1 pinouts 1 8 specifications 1 8 xxi USB devices 1 3 X1 encoding 7 23 X2 encoding 7 24 X4 encoding 7 24 ni com
32. When a terminal is used as a timing input or output signal it is called PFI x where x is an integer from 0 to 15 When a terminal is used as a static digital input or output it is called P1 x or P2 x On the I O connector each terminal is labeled PFI x P1 x or PFI x P2 x The voltage input and output levels and the current drive levels of the PFI signals are listed in the specifications of your device Using PFI Terminals as Timing Input Signals X Series User Manual Use PFI terminals to route external timing signals to many different X Series functions Each PFI terminal can be routed to any of the following signals e NI 632x 634x 6351 6353 6361 6363 Devices AI Convert Clock ai ConvertClock e ATI Sample Clock ai SampleClock e AI Start Trigger ai StartTrigger e AT Reference Trigger ai ReferenceTrigger e AIT Pause Trigger ai PauseTrigger e AI Sample Clock Timebase ai SampleClockTimebase e AO Start Trigger ao StartTrigger e AO Sample Clock ao SampleClock e AO Sample Clock Timebase ao SampleClockTimebase e AO Pause Trigger ao PauseTrigger e Counter input signals for all counters Source Gate Aux HW_Arm A B Z e Counter n Sample Clock e DI Sample Clock di SampleClock e DI Sample Clock Timebase di SampleClockTimebase e DI Reference Trigger di ReferenceTrigger e DO Sample Clock do SampleClock Most functions allow you to configure the polarity of PFI inputs and whether the input is
33. X Series User Manual 1 6 ni com Chapter 1 Getting Started 3 Place the USB X Series device on the backpanel wall mount with the signal wires facing down and the device bottom sitting on the backpanel wall mount lip 4 While holding the USB X Series device in place attach the front bracket to the backpanel wall mount by tightening the two thumbscrews USB Device LEDs NI USB 634x 635x 636x Devices Refer to the USB Device LED Patterns section of Chapter 3 Connector and LED Information for information about the X Series USB device READY and ACTIVE LEDs USB Cable Strain Relief NI USB 634x 635x 636x Devices You can provide strain relief for the USB cable by using the jackscrew on the locking USB cable included in the X Series USB device kit to securely attach the cable to the device as shown in Figure 1 6 1 Locking USB Cable Jackscrew 2 Jackscrew Hole 3 Security Cable Slot Figure 1 6 USB Cable Strain Relief on X Series USB Devices National Instruments 1 7 X Series User Manual Chapter 1 Getting Started USB Device Security Cable Slot NI USB 634x 635x 636x Devices The security cable slot shown in Figure 1 6 allows you to attach an optional laptop lock to your X Series USB device 8 Note The security cable is designed to act as a deterrent but might not prevent the device from being mishandled or stolen For more information refer to the documentation that accompanied the security cable
34. device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an Analog Source When you use an analog trigger source the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high or vice versa Routing DI Pause Trigger Signal to an Output Terminal You can route DI Pause Trigger out to any RTSI lt 0 7 gt PFI lt 0 15 gt PXI_STAR or PXIe DSTARC terminal 3 Note Pause triggers are only sensitive to the level of the source not the edge National Instruments 6 13 X Series User Manual Chapter 6 Digital 1 0 Digital Output Data Generation Methods When performing a digital waveform operation you either can perform software timed or hardware timed generations Software Timed Generations With a software timed generation software controls the rate at which data is generated Software sends a separate command to the hardware to initiate each update In NI DAQmx software timed generations are referred to as on demand timing Software timed generations are also referred to as immediate or static operations They are typically used for writing a single value out such as a constant digital value Hardware Timed Generations X Series User Manual With a hardware timed generation a digital hardware signal controls the rate of the generation This signal can be generated internally on your device or provided externally
35. fx Source fx A A Pulse Width Width of y N Measurement Pulse fx Frequency of fx E2 7 Figure 7 13 High Frequency with Two Counters Large Range of Frequencies with Two Counters By using two counters you can accurately measure a signal that might be high or low frequency This technique is called reciprocal frequency measurement When measuring a large range of frequencies with two counters you generate a long pulse using the signal to measure You then measure the long pulse with a known timebase The X Series device can measure this long pulse more accurately than the faster input signal 3 Note Counter 0 is always paired with Counter 1 Counter 2 is always paired with Counter 3 You can route the signal to measure to the Source input of Counter 0 as shown in Figure 7 14 Assume this signal to measure has frequency fx NI DAQmx automatically configures Counter 0 to generate a single pulse that is the width of N periods of the source input signal National Instruments 7 15 X Series User Manual Chapter 7 Counters X Series User Manual Signal to Measure fx ROUTES Out Counter 0 Signal of Known Frequency fk Source Out Counter 1 Gate 0 1 2 3 N CTR_0_ SOURCE m Signal to Measure CTR_0_OUT CTR_1_GATE Interval o to Measure CTR_1_SOURCE JUUUUUUUUUUUUUUULA Figure 7 14 Large Range of Frequencies with Two Counters NI DAQmx
36. gt lt Sample 3 gt X Series User Manual Figure 4 20 Al Sample Clock and Al Convert Clock Improperly Matched Leads to Aperiodic Sampling Al Sample Clock Al Convert Clock Channel Measured 012 3 i O12 8 012 3 Sample 1 Sample 2 Sample 3 lt gt lt gt Figure 4 21 Al Sample Clock and Al Convert Clock Properly Matched Al Convert Clock Timebase Signal The AI Convert Clock Timebase ai ConvertClockTimebase signal is divided down to provide one of the possible sources for AI Convert Clock Use one of the following signals as the source of AI Convert Clock Timebase e AI Sample Clock Timebase e 100 MHz Timebase AI Convert Clock Timebase is not available as an output on the I O connector Al Hold Complete Event Signal The AI Hold Complete Event ai HoldCompleteEvent signal generates a pulse after each A D conversion begins You can route AI Hold Complete Event out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal The polarity of AI Hold Complete Event is software selectable but is typically configured so that a low to high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed 4 34 ni com Chapter 4 Analog Input Al Start Trigger Signal Use the AI Start Trigger ai StartTrigger signal
37. 0 Figure 7 2 Single Point On Demand Edge Counting You also can use a pause trigger to pause or gate the counter When the pause trigger is active the counter ignores edges on its Source input When the pause trigger is inactive the counter counts edges normally You can route the pause trigger to the Gate input of the counter You can configure the counter to pause counting when the pause trigger is high or when it is low Figure 7 3 shows an example of on demand edge counting with a pause trigger Counter Armed Pause Trigger Pause When Low rm jf LALALA LALA 0 1 2 3 4 5 SOURCE Counter Value 0 Figure 7 3 Single Point On Demand Edge Counting with Pause Trigger X Series User Manual 7 4 ni com National Instruments Chapter 7 Counters Buffered Sample Clock Edge Counting With buffered edge counting edge counting using a sample clock the counter counts the number of edges on the Source input after the counter is armed The value of the counter is sampled on each active edge of a sample clock and stored in the FIFO A DMA controller transfers the sampled values to host memory The count values returned are the cumulative counts since the counter armed event That is the sample clock does not reset the counter You can configure the counter to sample on the rising or falling edge of the sample clock Figure 7 4 shows an example of buffered edge co
38. 17 A1 4 Al 4 PFI 8 P2 0 nay A N Sie anza foo N D GND AI GND 3 I Si 49 ALGND P02 67 IN PFI 9 P2 1 Alt Alt 4l S20 A5 A 5 pos 68 IS D GND AlQ Al1 5 18 Gf 21 Al 13 Al 5 P0 4 69 IS PFI 10 P2 2 Al GND 6 Ki Si 22 A GND POS 70 SI D GND Al2 Al24 7 SI Sip 23 Ale ALE poe als PFI 11 P2 3 aioa s NIS 24 anaa po PIN D GND AIGND ofi SI 25_ AL GND PFIO P1 0 73 19 PFI 12 P2 4 Ai3 al3e 10 9 S26 A7AI7 PFI tert 74 S D GND at al3 11 IS Sip 22 AS AT pe a4 75 S PFI 13 P2 5 AIGND 12 Si 28 ALGND PFI3 P1 3 76 KS D GND AISENSE 13 KI Sj 29 APFIO PFI 4 P1 4 77 S PFI 14 P2 6 AIGND 14 S SI 90 ALGND PFI5 P1 5 78 ISI D GND AO 0 15 SI Spst Ao PFI6 P1 6 79 PFI 15 P2 7 AOGND 16 S SUS ACGND br 77P1 7 80 SI 5V A f eer Figure A 7 NI USB 6351 6361 Screw Terminal Pinout 3 Note Refer to Table 7 10 X Series USB Screw Terminal Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help National Instruments A 13 X Series User Manual Appendix A X Series User Manual Device Specific Information Figure A 8 shows the pinout of the NI USB 6361 Mass Termination For a detailed description of each signal refer to the 7 0 Connect
39. Analog Input Triggering section of Chapter 4 Analog Input e The Analog Output Triggering section of Chapter 5 Analog Output e The Counter Triggering section of Chapter 7 Counters 3 Note Not all X Series devices support analog triggering For more information about triggering compatibility refer to the specifications document for your device Triggering with a Digital Source Your DAQ device can generate a trigger on a digital signal You must specify a source and an edge The digital source can be any of the PFI RTSI or PXI_STAR signals The edge can be either the rising edge or falling edge of the digital signal A rising edge is a transition from a low logic level to a high logic level A falling edge is a high to low transition Figure 11 1 shows a falling edge trigger 5V Digital Trigger OV Falling Edge Initiates Acquisition Figure 11 1 Falling Edge Trigger National Instruments 11 1 X Series User Manual Chapter 11 Triggering You also can program your DAQ device to perform an action in response to a trigger from a digital source The action can affect the following e Analog input acquisition e Analog output generation e Counter behavior e Digital waveform acquisition and generation Triggering with an Analog Source Some X Series devices can generate a trigger on an analog signal To find your device triggering options refer to the specifications document for your device Figure
40. Appendix A Device Specific Information Figure A 3 shows the pinout of the NI USB 6341 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information nowo TTT Glia aaa 0 SJ D END Al 8 Al 0 2 GI 19 Al GND PO 1 66 S PFI 9 P2 1 ACN SS Gl 20 ars arsy E02 67 ISI DGND Al 1 Al 1 4 SI 21 Al 13 Al 5 P0 3 68 IS PFI 10 P2 2 AIQ Al1 5 SIEEN P0 4 69 IS DGND AIGND 6 SIl 23 aGtaies P25 AIS PFI 11 P2 3 Al2 Al2 7 Gl 24 Ata aie PCS 71 IS DGND AITO AlE S 25 AI GND Lor 72 PFI 12 P2 4 Al GND 9 S 26 alz alz4 PE O P1 0 73 S DGND AI3 AI 3 10 S 27 aiis aiz PELYP11 74 S PFI 13 P2 5 AI 11 AI3 11 Szamana PFI 2 P1 2 75 S DENDEN AIGND 12 SIl So Ne PFI3 P1 3 76 S PFI 14 P2 6 AISENSE 13 S ene PFI4 P1 4 77 S TEE AIGND 14 Sat 201 PFI5 P1 5 78 S PFI 15 P2 7 AO 0 15 Sas nono PFISIP1 6 79 S eee AOGND 16 PFI 7 P1 7 80 S t A NC No Connect Figure A 3 NI USB 6341 Pinout aye Note Refer to Table 7 10 X Series USB Screw Terminal Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the L
41. Checking for more information To access this document go to ni com info and enter the Info Code daghwtsp ays Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations Digital Input Triggering Digital input supports three different triggering actions e Start trigger e Reference trigger e Pause trigger Refer to the DI Start Trigger Signal DI Reference Trigger Signal and DI Pause Trigger Signal sections for information about these triggers An analog or digital trigger can initiate these actions All X Series devices support digital triggering but some do not support analog triggering To find your device triggering options refer to the specifications document for your device X Series User Manual 6 4 ni com Chapter 6 Digital I O Digital Waveform Acquisition Figure 6 2 summarizes all of the timing options provided by the digital input timing engine 100 MHz Timebase DSTAR lt A B gt PFI RTSI PXI_STAR Analog Comparison Event 20 MHz Timebase 100 kHz Timebase PXI_CLK10 DSTAR lt A B gt PFI RTSI PXI_STAR Analog Comparison Event DI Sample Clock Ctr n Internal Output DI Sample Clock Timebase Programmable e Clock Divider LT National Instruments Figure 6 2 Digital Input Timing Options You can acquire digital waveforms on the Port 0 DIO lines The DI waveform acquisiti
42. DAQ gt NI DAQmx Help If you are a new user use the Getting Started with LabVIEW manual to familiarize yourself with the LabVIEW graphical programming environment and the basic LabVIEW features you use to build data acquisition and instrument control applications Open the Getting Started with LabVIEW manual by selecting Start All Programs National Instruments LabVIEW LabVIEW Manuals or by navigating to the labview manuals directory and opening LV_Getting_Started pdf Use the LabVIEW Help available by selecting Help Search the LabVIEW Help in LabVIEW to access information about LabVIEW programming concepts step by step instructions for using LabVIEW and reference information about LabVIEW VIs functions palettes menus and tools Refer to the following locations on the Contents tab of the LabVIEW Help for information about NI DAQmx Getting Started with Lab VIEW Getting Started with DAQ Includes overview information and a tutorial to learn how to take an NI DAQmx measurement in LabVIEW using the DAQ Assistant xviii ni com LabWindows CVI About This Manual e VIand Function Reference Measurement I O VIs and Functions DAQmx Data Acquisition VIs and Functions Describes the LabVIEW NI DAQm x VIs and properties e Taking Measurements Contains the conceptual and how to information you need to acquire and analyze measurement data in LabVIEW including common measurements measurement fundamentals NI DAQmx key
43. E ane 4 35 AI Reference Trigger Signal 4 37 AT Pause Trigger Signal anne ue 4 38 Getting Started with AI Applications in Software 4 40 Analog Input on Simultaneous MIO X Series Devices 00 0 eee eeceeseeseeteeeeeeeeeneeeaes 4 41 Analog Input Terminal Configuration 4 42 Analog Input Range mnsinmitaminhens nt henri 4 42 Working Voltage Range tstitinnehintnininiieinisent 4 43 Analog Input Data Acquisition Methods 4 44 Analog Input Triggering ss 4 46 Connecting Analog Input Signals 4 46 Types of Signal Sources cess cveepdeeescauescvvessssaseds 4 47 Differential Connections for Ground Referenced Signal Sources 4 48 Differential Connections for Floating Signal Sources ssss ss1e 4 49 Field Wiring Considerations 4 51 Minimizing Drift in Differential Mode 4 51 Analog Input Timing Signals eee eee ceeesecseeeseceeceseeseeeaecseeeeeseseaeseeeaee 4 52 Aggregate versus Single Channel Sample Rates eee 4 53 AI Sample Clock Signal 4 54 AI Sample Clock Timebase Signal 4 56 AI Hold Complete Event Signal 4 57 Al Start TrgserSipnal scsi ga tet esdea een tig E ee teas 4 57 AI Reference Trigger Signal 4 59 AT Pause Trigger Signal cnieanntaisdiahintssiu 4 61 Getting Started with AI Applications in Software
44. FIFOs This feature allows the DMA controllers to combine multiple 16 bit transfers to the DAQ circuitry into a single 32 bit burst transfer on PCI Express The DMA controllers also automatically handle unaligned memory buffers on PCI Express PXI Express Programmed I O Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations Refer to the Analog Output Data Generation Methods section of Chapter 5 Analog Output for more information USB Device Data Transfer Methods The primary ways to transfer data across the USB bus are as follows X Series User Manual USB Signal Stream USB Signal Stream is a method to transfer data between the device and computer memory using USB bulk transfers without intervention of the microcontroller on the NI device NI uses USB Signal Stream hardware and software technology to achieve high throughput rates and increase system utilization in USB devices X Series USB devices have eight fully independent USB Signal Stream for high performance transfers of data blocks These channels are assigned to the first eight measurement acquisition circuits that request one Programmed I O Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in
45. For example if you configured a large range two counter measurement to use a divide down of 50 for a 50 k signal then you would get the accuracy measurement time and accuracy listed in Table 7 3 But if your signal ramped up to 5 M then with a divide down of 50 your measurement time is 0 01 ms but your error is now 0 1 The error with a sample clocked frequency measurement is not as dependent on the measured frequency so at 50 k and 5 M with a measurement time of 1 ms the error percentage is still close to 0 001 One of the disadvantages of a sample clocked frequency measurement is that the frequency to be measured must be at least twice the sample clock rate to ensure that a full period of the frequency to be measured occurs between sample clocks e Low frequency measurements with one counter is a good method for many applications However the accuracy of the measurement decreases as the frequency increases e High frequency measurements with two counters is accurate for high frequency signals However the accuracy decreases as the frequency of the signal to measure decreases At very low frequencies this method may be too inaccurate for your application Another disadvantage of this method is that it requires two counters if you cannot provide an external signal of known width An advantage of high frequency measurements with two counters is that the measurement completes in a known amount of time e Measuring a large range of freque
46. However each individual line will only wait one extra filter tick before changing This prevents a noisy line from holding a valid transition indefinitely With bus mode if all the bus line transitions become stable in less than one filter clock period and the bus period is more than two filter clock periods then all the bus lines are guaranteed to be correlated at the output of the filter as shown in the figure 6 26 ni com National Instruments Chapter 6 Digital I O The behavior for each transition can be thought of as a state machine If a line transitions and stays high for two consecutive filter clock edges then one of two options occurs e Case 1 If no transitions have occurred on the other lines the transition propagates on the second filtered clock edge as shown in Figure 6 13 Digital Input PO A Digital Input PO B Filter Clock Filtered Input A Filtered Input B Stable Stable Stable ee Figure 6 13 Case 1 e Case 2 If an additional line on the bus also has a transition during the filter clock period the change is not propagated until the next filter clock edge as shown in Figure 6 14 Digital Input PO B Filter Clock Filtered Input A Filtered Input B Digital Input PO A Not Stable Not Stable O
47. It is a first in first out FIFO memory buffer between the computer and the DACs It allows you to download the points of a waveform to your X Series device without host computer interaction National Instruments 5 1 X Series User Manual Chapter 5 Analog Output AO Sample Clock The AO Sample Clock signal reads a sample from the DAC FIFO and generates the AO voltage AO Reference Selection The AO reference selection signal allows you to change the range of the analog outputs AO Reference Selection AO reference selection allows you to set the analog output range The analog output range describes the set of voltages the device can generate The digital codes of the DAC are spread evenly across the analog output range So if the range is smaller the analog output has better resolution that is the voltage output difference between two consecutive codes is smaller Therefore the analog output is more accurate The analog output range of a device is all of the voltages between AO Reference and AO Reference The possible settings for AO reference depend on the device model For models not described below refer to the specifications for your device NI 6321 6323 634x Devices On NI 6321 6323 634x devices the AO reference is always 10 V So for NI 6321 6323 634x devices the analog output range equals 10 V NI 635x 636x Devices On NI 635x 636x devices the AO reference of each analog output AO lt 0 3 gt can
48. Referenced Signal Sources Figure 4 11 shows how to connect ground reference signal sources in NRSE mode 1 0 Connector Al lt 0 15 gt or Al lt 16 31 gt OO Ground 9 To Referenced 7 os Signal Instrumentation Source a Amplifier o So Input Multipl l nput Multiplexers y Measured Common AI SENSE Voltage Mode y ALGND or Al SENSE 2 Noise cm and Ground Potential 77 MIO X Series Device Configured in NRSE Mode Figure 4 11 Single Ended Connections for Ground Referenced Signal Sources NRSE Configuration AI lt 0 31 gt and AI SENSE must both remain within 11 V of AI GND To measure a single ended ground referenced signal source you must use the NRSE ground reference setting Connect the signal to one of AI lt 0 15 gt and connect the signal local ground reference to AI SENSE You also can connect the signal to one of AI lt 16 31 gt and connect the signal local ground reference to AI SENSE 2 AI SENSE is internally connected to the negative input of the NI PGIA Therefore the ground point of the signal connects to the negative input of the NI PGIA Any potential difference between the device ground and the signal ground appears as a common mode signal at both the positive and negative inputs of the NI PGIA and this difference is rejected by the amplifier If the input circuitry of a device were r
49. S 60 nN D 59 D a 58 N x 57 N oO 56 N D 55 N 54 NO Oo 53 52 51 er 50 oo 49 y a 48 a P 47 wo 46 N 45 44 Oo 43 42 41 40 39 38 37 36 35 sIDIoIB IG 8 AI 0 1 Al 1 GND 10 Al 2 3 Al 3 GND 4 Al 4 GND 13 Al 5 6 Al 6 gt gt gt PJ gt gt gt gt gt gt D GND PFI 0 P1 0 PFI 1 P1 1 D GND 5 V D GND PFI 5 P1 5 PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 CONNECTOR 1 Al 16 31 Sh O CONNECTOR 0 Al 0 15 TERMINAL 68 TERMINAL 34 TERMINAL 1 TERMINAL 35 t OO TERMINAL 35 TERMINAL 1 TERMINAL 34 TERMINAL 68 P0 30 P0 28 P0 25 D GND P0 22 P0 21 D GND 5V D GND P0 17 P0 16 D GND D GND 5V D GND P0 14 P0 9 D GND P0 12 APFI 1 AO 3 AO 2 31 Al 23 GND 22 Al 22 29 Al 21 GND 20 Al 20 GND 19 Al 19 26 Al 18 GND 17 Al 17 24 Al 16 gt gt gt gt gt gt gt gt gt gt gt N 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 ZlSloClm wNlolajaloalm a
50. Sample Clocked Buffered Pulse Width Measurement Hardware Timed Single Point Pulse Width Measurement A hardware timed single point HWTSP pulse width measurement has the same behavior as a sample clocked buffered pulse width measurement Note Ifa pulse does not occur between sample clocks an overrun error will occur A g Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations For information about connecting counter signals refer to the Default Counter Timer Pinouts section X Series User Manual 7 8 ni com Chapter 7 Counters Pulse Measurement Counter Armed Gate In pulse measurements the counter measures the high and low time of a pulse on its Gate input signal after the counter is armed A pulse is defined in terms of its high and low time high and low ticks or frequency and duty cycle This is similar to the pulse width measurement except that the inactive pulse is measured as well You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges occurring on the Source input between two edges of the Gate signal You can calculate the high and low time of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter Refer to the following sections for more information about X Series pulse
51. Series Interval Sampling AI Convert Clock controls the Convert Period which is determined by the following equation National Instruments 1 Convert Period Convert Rate 4 25 X Series User Manual Chapter 4 Analog Input X Series User Manual Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received A typical posttriggered DAQ sequence is shown in Figure 4 14 The sample counter is loaded with the specified number of posttrigger samples in this example five The value decrements with each pulse on AI Sample Clock until the value reaches zero and all desired samples have been acquired Al Start Trigger Al Sample Clock Al Convert Clock Sample Counter 1 4 1 38 2 1 1 QO Figure 4 14 Posttriggered Data Acquisition Example Pretriggered data acquisition allows you to view data that is acquired before the trigger of interest in addition to data acquired after the trigger Figure 4 15 shows a typical pretriggered DAQ sequence AI Start Trigger ai StartTrigger can be either a hardware or software signal If AI Start Trigger is set up to be a software start trigger an output pulse appears on the ai StartTrigger line when the acquisition begins When the AI Start Trigger pulse occurs the sample counter is loaded with the number of pretriggered samples in this example
52. Timebase also can be used as the Source input to the 32 bit general purpose counter timers The 100 kHz Timebase is generated by dividing down the 20 MHz Timebase by 200 External Reference Clock X Series User Manual The external reference clock can be used as a source for the internal timebases 100 MHz Timebase 20 MHz Timebase and 100 kHz Timebase on an X Series device By using the external reference clock you can synchronize the internal timebases to an external clock The following signals can be routed to drive the external reference clock e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXIe_CLK100 e PXI STAR e PXIe DSTAR lt A B gt The external reference clock is an input to a Phase Lock Loop PLL The PLL generates the internal timebases 9 2 ni com Chapter 9 Digital Routing and Clock Generation A Caution Do not disconnect an external reference clock once the devices have been synchronized or are used by a task Doing so may cause the device to go into an unknown state Make sure that all tasks using a reference clock are stopped before disconnecting it Enabling or disabling the PLL through the use of a reference clock affects the clock distribution to all subsystems For this reason the PLL can only be enabled or disabled when no other tasks are running in any of the device subsystems 10 MHz Reference Clock Synchronizing The 10 MHz reference clock can be used to synchronize other devices to your X Serie
53. To access this document go to ni com info and enter the Info Code daghwtsp ay Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations National Instruments 4 45 X Series User Manual Chapter 4 Analog Input Analog Input Triggering Analog input supports three different triggering actions e Start trigger e Reference trigger e Pause trigger Refer to the AI Start Trigger Signal AI Reference Trigger Signal and AI Pause Trigger Signal sections for information about these triggers An analog or digital trigger can initiate these actions All Simultaneous MIO X Series devices support digital triggering but some do not support analog triggering To find your device triggering options refer to the specifications document for your device Connecting Analog Input Signals Table 4 6 summarizes the recommended input configuration for different types of signal sources for Simultaneous MIO X Series devices Table 4 6 Simultaneous MIO X Series Analog Input Signal Configuration Input Floating Signal Sources Not Connected to Earth Ground Ground Referenced Signal Sources Examples e Ungrounded thermocouples e Signal conditioning with isolated outputs e Battery devices Example e Plug in instruments with non isolated outputs Differential DIFF AIO x Ov AlO 0 R RS AI GND
54. Two Signal Edge Separation Yes Yes Counter Input Applications The following sections list the various counter input applications available on X Series devices Counting Edges Counting Edges Pulse Width Measurement Pulse Measurement Semi Period Measurement Frequency Measurement Period Measurement Position Measurement Two Signal Edge Separation Measurement In edge counting applications the counter counts edges on its Source after the counter is armed You can configure the counter to count rising or falling edges on its Source input You also can control the direction of counting up or down as described in the Controlling the Direction of Counting section The counter values can be read on demand or with a sample clock National Instruments 7 3 X Series User Manual Chapter 7 Counters Refer to the following sections for more information about X Series edge counting options e Single Point On Demand Edge Counting e Buffered Sample Clock Edge Counting Single Point On Demand Edge Counting With single point on demand edge counting the counter counts the number of edges on the Source input after the counter is armed On demand refers to the fact that software can read the counter contents at any time without disturbing the counting process Figure 7 2 shows an example of single point edge counting Counter Armed F Fli rf 1 2 3 4 5 SOURCE Counter Value
55. Using Non Referenced Single Ended NRSE Connections for Floating Signal Sources 4 18 Using Referenced Single Ended RSE Connections for Floating Signal Sources 00 ieee eeeeseeeeeeseceeeeseeseeeseeeees 4 19 X Series User Manual viii ni com Contents Connecting Ground Referenced Signal Sources 4 20 What Are Ground Referenced Signal Sources 4 20 When to Use Differential Connections with Ground Referenced Signal Sources ec eeeseeeeseeseeeeseeeeeeeaees 4 20 When to Use Non Referenced Single Ended NRSE Connections with Ground Referenced Signal Sources 4 21 When to Use Referenced Single Ended RSE Connections with Ground Referenced Signal Sources 4 21 Using Differential Connections for Ground Referenced Signal SOULCES Les desert hg mon ul A 4 22 Using Non Referenced Single Ended NRSE Connections for Ground Referenced Signal Sources 4 23 Field Wiring Considerations s 4 24 Analog Input Timing Signals ss 4 24 Aggregate versus Single Channel Sample Rates 00 0 0 eee 4 27 AT Sample Clock Signal annees 4 28 AI Sample Clock Timebase Signal 4 30 AI Convert Clock Signal ss 4 31 AI Convert Clock Timebase Signal 0 ec eceeeeeeseeeeeeeeeeeeeesees 4 34 AI Hold Complete Event Signal 4 34 AL Start Trigger Signal sind unie
56. a common ground point with respect to the device assuming that the computer is plugged into the same power system as the source Non isolated outputs of instruments and devices that plug into the building power system fall into this category The difference in ground potential between two instruments connected to the same building power system is typically between 1 and 100 mV but the difference can be much higher if power distribution circuits are improperly connected If a grounded signal source is incorrectly measured this difference can appear as measurement error Follow the connection instructions for grounded signal sources to eliminate this ground potential difference from the measured signal When to Use Differential Connections with Ground Referenced Signal Sources Use DIFF input connections for any channel that meets any of the following conditions e The input signal is low level less than 1 V e The leads connecting the signal to the device are greater than 3 m 10 ft e The input signal requires a separate ground reference point or return signal e The signal leads travel through noisy environments e Two analog input channels AI and AI are available DIFF signal connections reduce noise pickup and increase common mode noise rejection DIFF signal connections also allow input signals to float within the common mode limits of the NI PGIA Refer to the Using Differential Connections for Ground Referenced Signal
57. acquisition Retriggerable Analog Input The AI Start Trigger can also be configured to be retriggerable The timing engine will generate the sample and convert clocks for the configured acquisition in response to each pulse on an AI Start Trigger signal The timing engine ignores the AI Start Trigger signal while the clock generation is in progress After the clock generation is finished the counter waits for another Start Trigger to begin another clock generation Figure 4 31 shows a retriggerable analog input with three AI channels and four samples per trigger Al Start Trigger i ai Sampie cio L I N ER Figure 4 31 Simultaneous MIO X Series Retriggerable Analog Input National Instruments 4 57 X Series User Manual Chapter 4 a 3 Analog Input Note Waveform information from LabVIEW will not reflect the delay between triggers They will be treated as a continuous acquisition with constant t0 and dt information Note NI USB 6356 6366 Devices Some X Series devices internally transfer data in sample pairs as opposed to single samples This implementation allows for greater data throughput However if an acquisition on these devices acquires an odd number of total samples the last sample acquired cannot be transferred To ensure this condition never occurs NI DAQmx adds a background channel for finite acquisitions that have both an odd number of channels and an odd number of samples per
58. allow for this 10 us of padding NI DAQmx chooses the conversion rate so that the AI Convert Clock pulses are evenly spaced throughout the sample To explicitly specify the conversion rate use AI Convert Clock Rate DAQmx Timing property node or function A Caution Setting the conversion rate higher than the maximum rate specified for your device will result in errors National Instruments Using an Internal Source One of the following internal signals can drive AI Convert Clock e AT Convert Clock Timebase divided down e Counter n Internal Output e Change Detection Event e Counter n Sample Clock e AO Sample Clock ao SampleClock e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock A programmable internal counter divides down the AI Convert Clock Timebase to generate AI Convert Clock The counter is started by AI Sample Clock and continues to count down to zero produces an AI Convert Clock reloads itself and repeats the process until the sample is finished It then reloads itself in preparation for the next AI Sample Clock pulse Several other internal signals can be routed to AI Convert Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information 4 31 X Series User Manual Chapter 4 Analog Input Using an External Source Use one of the following external signals as the source of AI Convert Clock e PR lt 0 15 gt e RTSI
59. amount of amplification the gain is determined by the analog input range as shown in Figure 4 2 Vins o PGIA Measured oo V Vin Voltage H V Vin Vine Vin x Gain Figure 4 2 MIO X Series Device NI PGIA Table 4 2 shows how signals are routed to the NI PGIA on MIO X Series devices Table 4 2 Signals Routed to the NI PGIA on MIO X Series Devices AI Ground Reference Signals Routed to the Positive Signals Routed to the Negative Settings Input of the NI PGIA V Input of the NI PGIA Vin RSE AI lt 0 31 gt AI GND NRSE AI lt 0 15 gt AI SENSE AI lt 16 31 gt AI SENSE 2 DIFF AI lt 0 7 gt AI lt 8 15 gt AI lt 16 23 gt AI lt 24 31 gt For differential measurements AI 0 and AI 8 are the positive and negative inputs of differential analog input channel 0 For a complete list of signal pairs that form differential input channels refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information UN Caution The maximum input voltages rating of AI signals with respect to ground and for signal pairs in differential mode with respect to each other are listed in the specifications document for your device Exceeding the maximum input voltage of AI signals distorts the measurement results Exceeding the maximum input voltage rating also can damage the device and the computer NI is not liable for any damage resulting fro
60. and destinations for the counter timer signals in NI DAQmx Refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help for more information about how to connect your signals for common counter measurements and generations X Series default PFI lines for counter functions are listed in X Series Physical Channels in the NI DAQmx Help or the LabVIEW Help Counter Triggering X Series User Manual Counters support three different triggering actions Arm Start Trigger To begin any counter input or output function you must first enable or arm the counter Software can arm a counter or configure counters to be armed on a hardware signal Software calls this hardware signal the Arm Start Trigger Internally software routes the Arm Start Trigger to the Counter n HW Arm input of the counter For counter output operations you can use it in addition to the start and pause triggers For counter input operations you can use the arm start trigger to have start trigger like behavior The arm start trigger can be used for synchronizing multiple counter input and output tasks When using an arm start trigger the arm start trigger source is routed to the Counter n HW Arm signal Start Trigger For counter output operations a start trigger can be configured to begin a finite or continuous pulse generation Once a continuous generation has triggered the pulses continue to generate until you stop the operation in software For f
61. application using the Measurement Studio Application Wizard and the DAQ Assistant refer to Walkthrough Creating a Measurement Studio NI DAQmx Application e For help with NI DAQmx methods and properties refer to NationalInstruments DAQmx Namespace NationalInstruments DAQmx ComponentModel Namespace or NI DAQmx Visual C Class Library Overview XiX X Series User Manual About This Manual e For conceptual help with NI DAQmx refer to Using the Measurement Studio NI DAQmx NET Library Using the Measurement Studio NI DAQm x Visual C Library or Developing with Measurement Studio NI DAQmx e For general help with programming in Measurement Studio refer to Getting Started with the Measurement Studio Class Libraries To create an application in Visual Basic NET Visual C or Visual C follow these general steps 1 In Visual Studio select File New Project to launch the New Project dialog box 2 Inthe Project types pane expand the Visual Basic Visual C or Visual C node depending on which language you want to create the project in and select Measurement Studio 3 Choose a project type You add DAQ tasks as a part of this step ANSI C without NI Application Software The NI DAQm x Help contains API overviews and general information about measurement concepts Select Start All Programs National Instruments NI DAQ NI DAQmx Help The NI DAQmx C Reference Help describes the NI DAQm x Library functions whi
62. are several different methods of continuous generation that control what data is written These methods are regeneration FIFO regeneration and non regeneration modes e Regeneration is the repetition of the data that is already in the buffer Standard regeneration is when data from the PC buffer is continually downloaded to the FIFO to be written out New data can be written to the PC buffer at any time without disrupting the output Use the NI DAQmx write property RegenMode to allow or not allow regeneration The NI DAQmx default is to allow regeneration e With FIFO regeneration the entire buffer is downloaded to the FIFO and regenerated from there Once the data is downloaded new data cannot be written to the FIFO To use FIFO regeneration the entire buffer must fit within the FIFO 5 4 ni com Chapter 5 Analog Output size The advantage of using FIFO regeneration is that it does not require communication with the main host memory once the operation is started thereby preventing any problems that may occur due to excessive bus traffic Use the NI DAQmx AO channel property UseOnlyOnBoardMemory to enable or disable FIFO regeneration e With non regeneration old data is not repeated New data must be continually written to the buffer If the program does not write new data to the buffer at a fast enough rate to keep up with the generation the buffer underflows and causes an error Analog Output Triggering Analog output sup
63. attributes and properties for creating applications for your device X Series devices use the NI DAQmx driver NI DAQmx includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example code to an existing application To locate LabVIEW LabWindows CVI Measurement Studio Visual Basic and ANSI C examples refer to the KnowledgeBase document Where Can I Find NI DAQmx Examples by going to ni com info and entering the Info Code dagmxexp For additional examples refer to zone ni com X Series User Manual 2 10 ni com Chapter 2 DAQ System Overview Table 2 1 lists the earliest NI DAQmx support version for each X Series device Table 2 1 X Series NI DAQmx Software Support Device NI DAQmx Version Support NI PCIe PXIe 632x 634x NI DAQmx 9 0 and later NI PCle PXIe 635 1 6353 636 1 6363 NI DAQmx 9 0 and later NI PXIe 6356 6358 6366 6368 NI DAQmx 9 0 2 and later NI USB 6361 6363 Mass Termination NI DAQmx 9 5 and later NI USB 6366 Mass Termination NI DAQmx 9 5 and later NI USB 634x 635 1 6353 6361 6363 NI DAQmx 9 2 and later Screw Terminal NI USB 6356 6366 Screw Terminal NI DAQmx 9 2 1 and later National Instruments 2 11 X Series User Manual Connector and LED Information The 7 0 Connector Signal Descriptions and 5 V Power Sou
64. be individually set to one of the following 10V SV APFI lt 0 1 gt You can connect an external signal to APFI lt 0 1 gt to provide the AO reference The AO reference can be a positive or negative voltage If AO reference is a negative voltage the polarity of the AO output is inverted The valid ranges of APFI lt 0 1 gt are listed in the device specifications You can use one of the AO lt 0 3 gt signals to be the AO reference for a different AO signal However you must externally connect this channel to APFI 0 or APFI 1 B Note When using an external reference the output signal is not calibrated in software You can generate a value and measure the voltage offset to calibrate your output in software X Series User Manual 5 2 ni com Chapter 5 Analog Output Minimizing Glitches on the Output Signal When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit of the DAC code changes You can build a lowpass deglitching filter to remove some of these glitches depending on the frequency and nature of the output signal Visit ni com support for more information about minimizing glitches Analog Output Data Generation Methods When performing an analog output operation you can perform software timed or
65. buffer using DMA before it is transferred to application memory Buffered acquisitions typically allow for much faster transfer rates than HWTSP acquisitions because data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous e Finite sample mode acquisition refers to the acquisition of a specific predetermined number of data samples Once the specified number of samples has been read in the acquisition stops If you use a reference trigger you must use finite sample mode B Note NI USB 6356 6366 Devices Some X Series devices internally transfer data in sample pairs as opposed to single samples This implementation allows for greater data throughput However if an acquisition on these devices acquires an odd number of total samples the last sample acquired cannot be transferred X Series User Manual 4 44 ni com Chapter 4 Analog Input To ensure this condition never occurs NI DAQmx adds a background channel for finite acquisitions that have both an odd number of channels and an odd number of samples per channel The background channel is also added when performing any reference triggered finite acquisition Data from the background channel is only visible when reading in RAW mode For maximum efficiency in bus bandwidth and onboard FIFO use use an even number of samples per channel or an even number of channels for
66. channel The background channel is also added when performing any reference triggered finite acquisition Data from the background channel is only visible when reading in RAW mode For maximum efficiency in bus bandwidth and onboard FIFO use use an even number of samples per channel or an even number of channels for finite acquisitions so the background channel is not added Reference triggers are not retriggerable Using a Digital Source To use AI Start Trigger with a digital source specify a source and an edge The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e Counter n Internal Output e PXI STAR e PXIe DSTAR lt A B gt The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the measurement acquisition begins on the rising edge or falling edge of AI Start Trigger Using an Analog Source When you use an analog trigger source the acquisition begins on the first rising edge of the Analog Comparison Event signal X Series User Manual 4 58 ni com Chapter 4 Analog Input Routing Al Start Trigger to an Output Terminal You can route AI Start Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal The output is an active high pulse All PFI terminals are configured as inputs by default The device also uses
67. clock signal but do not need to divide the signal then you should use DI Sample Clock rather than DI Sample Clock Timebase DI Start Trigger Signal X Series User Manual Use the DI Start Trigger di StartTrigger signal to begin a measurement acquisition A measurement acquisition consists of one or more samples If you do not use triggers begin a measurement with a software command Once the acquisition begins configure the acquisition to stop e When a certain number of points are sampled in finite mode e After a hardware reference trigger in finite mode e With a software command in continuous mode An acquisition that uses a start trigger but not a reference trigger is sometimes referred to as a posttriggered acquisition Retriggerable DI The DI Start Trigger can also be configured to be retriggerable The timing engine will generate the sample and convert clocks for the configured acquisition in response to each pulse on an DI Start Trigger signal The timing engine ignores the DI Start Trigger signal while the clock generation is in progress After the clock generation is finished the timing 6 8 ni com Chapter 6 Digital I O engine waits for another Start Trigger to begin another clock generation Figure 6 4 shows a retriggerable DI of four samples DI Start Trigger DI Sample Clock Figure 6 4 Retriggerable DI ayi Note Wave
68. conditions 4 13 X Series User Manual Chapter 4 Analog Input X Series User Manual In the single ended modes more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations The coupling is the result of differences in the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground Refer to the Using Non Referenced Single Ended NRSE Connections for Floating Signal Sources section for more information about NRSE connections When to Use Referenced Single Ended RSE Connections with Floating Signal Sources Only use RSE input connections if the input signal meets the following conditions e The input signal can share a common reference point AI GND with other signals that use RSE e The input signal is high level greater than 1 V e The leads connecting the signal to the device are less than 3 m 10 ft DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions In the single ended modes more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations The coupling i
69. connection leaves the DIFF signal path significantly off balance Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connected to ground This noise appears as a differential mode signal instead of a common mode signal and thus appears in your data In this case instead of directly connecting the negative line to AI GND connect the negative line to AI GND through a resistor that is about 100 times the equivalent source impedance The resistor puts the signal path nearly in balance so that about the same amount of noise couples onto both connections yielding better rejection of electrostatically coupled noise This configuration does not load down the source other than the very high input impedance of the NI PGIA National Instruments 4 15 X Series User Manual Chapter 4 Analog Input X Series User Manual Floating Signal Source R is about 100 times source impedance of sensor MIO X Series Device Al SR Oo Al Al SENSE Al GND Figure 4 5 Differential Connections for Floating Signal Sources with Single Bias Resistor You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND as shown in Figure 4 6 This fully balanced configuration offers slightly better noise rejection but has the disadvantage of loading the source down with th
70. consecutive filter i clocks Filtered Input Figure 8 3 Filter Example Enabling filters introduces jitter on the input signal The maximum jitter is one period of the timebase When a RTSI input is routed directly to PFI the X Series device does not use the filtered version of the input signal 8 6 ni com Chapter 8 PFI 1 0 Protection Each DIO and PFI signal is protected against overvoltage undervoltage and overcurrent conditions as well as ESD events However you should avoid these fault conditions by following these guidelines e If you configure a PFI or DIO line as an output do not connect it to any external signal source ground or power supply e Ifyou configure a PFI or DIO line as an output understand the current requirements of the load connected to these signals Do not exceed the specified current output limits of the DAQ device NI has several signal conditioning solutions for digital applications requiring high current drive e Ifyou configure a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals e Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States At system startup and reset the hardware sets all PFI and DIO lines to high impe
71. device Refer to the NJ 6361 6363 Specifications for more detailed information about the NI 6361 device NI 6351 6361 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information National Instruments A 15 X Series User Manual Appendix A Device Specific Information NI 6353 6363 The following sections contain information about the NI PCIe 6353 NI USB 6353 Screw Terminal NI PCIe PXIe 6363 NI USB 6363 Mass Termination and NI USB 6363 Screw Terminal devices NI 6353 6363 Pinout Figure A 9 shows the pinout of the NI PCIe 6353 and NI PCle PXIe 6363 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 0 Al 0 GND 9 Al 1 2 Al 2 GND 11 Al 3 SENSE 12 Al 4 5 Al 5 GND 14 Al 6 7 Al 7 GND AO GND AO GND D GND PO 0 PO 5 D GND PO 2 PO 7 P0 3 FI 11 P2 3 10 P2 2 GND 1 2 P1 2 3 P1 3 1 4 P1 4 13 P2 5 15 P2 7 FI 7 P1 7 PFI 8 P2 0 D GND D GND gt gt gt gt gt gt gt gt gt gt gt gt 7 mn 7 D Gy D EC 0 ees EU u N TI 68 w R 67 oO wo 66 ao D 65 wo 64 w 63 N 62 D 61 N
72. device ignores all AI Convert Clock pulses until it recognizes an AI Sample Clock pulse Once the device receives the correct number of AI Convert Clock pulses it ignores subsequent AI Convert Clock pulses until it receives another AI Sample Clock However after the device recognizes an AI Sample Clock pulse it causes an error if it receives an AI Sample Clock pulse before the correct number of AI Convert Clock pulses are received Figures 4 18 4 19 4 20 and 4 21 show timing sequences for a four channel acquisition using AI channels 0 1 2 and 3 and demonstrate proper and improper sequencing of AI Sample Clock and AI Convert Clock Al Sample Clock Al Convert Clock j j Channel Measured 0123 lt a gt Convert Period Figure 4 18 Scan Overrun Condition Al Sample Clock Too Fast For Convert Clock Causes an Error Al Sample Clock Al Convert Clock MUU UU IO Channel Measured 0123 Dress 0123 lt Sample 1 gt lt Sample 2 gt lt Sample 3 gt Figure 4 19 Al Convert Clock Too Fast For Al Sample Clock Al Convert Clock Pulses Are Ignored National Instruments 4 33 X Series User Manual Chapter 4 Analog Input Al Sample Clock Al Convert Clock Channel Measured O i 2 8 0 1 2 3 90 lt Sample 1 gt lt Sample 2
73. e Counter n Internal Output 4 61 X Series User Manual Chapter 4 Analog Input e Counter n Gate e AO Pause Trigger ao PauseTrigger e DI Pause Trigger di PauseTrigger e DO Pause Trigger do PauseTrigger The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an Analog Source When you use an analog trigger source the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high or vice versa Routing Al Pause Trigger Signal to an Output Terminal You can route AI Pause Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt PXI_STAR or PXIe DSTARC terminal 3 Note Pause triggers are only sensitive to the level of the source not the edge Getting Started with Al Applications in Software You can use the Simultaneous MIO X Series device in the following analog input applications e Simultaneous sampling e Single point analog input e Finite analog input e Continuous analog input You can perform these applications through DMA or programmed I O data transfer mechanisms Some of the applications also use start and reference pause triggers 3 Note For more information about programming analog input applications and triggers in software refer to the NI DAQmx Help or the LabVIEW Help in version 8 0 or later X Series User Manual Simul
74. four The value decrements with each pulse on AI Sample Clock until the value reaches zero The sample counter is then loaded with the number of posttriggered samples in this example three e O E 4 CE A UN Al Reference Trigger n a DN aiconen coe I UT Sample Counter 3 2 1 0 2 21 2 1 0 Figure 4 15 Pretriggered Data Acquisition Example 4 26 ni com National Instruments Chapter 4 Analog Input If an AI Reference Trigger ai ReferenceTrigger pulse occurs before the specified number of pretrigger samples are acquired the trigger pulse is ignored Otherwise when the AI Reference Trigger pulse occurs the sample counter value decrements until the specified number of posttrigger samples have been acquired MIO X Series devices feature the following analog input timing signals e AI Sample Clock Signal e AI Sample Clock Timebase Signal e Al Convert Clock Signal e AI Convert Clock Timebase Signal e AI Hold Complete Event Signal e AI Start Trigger Signal Al Reference Trigger Signal AI Pause Trigger Signal Signals with an support digital filtering Refer to the PFI Filters section of Chapter 8 PFI for more information Aggregate versus Single Channel Sample Rates MIO X Series devices are characterized with maximum single channel and maximum aggregate sample rates The maximum single channel rate is the fastest you c
75. impedance input with a weak pull down resistor default e An output driving a 0 e An output driving a 1 Refer to the NI DAQmx Help or the LabVIEW Help for more information about setting power up states in NI DAQmx or MAX 3 Note When using your X Series device to control an SCXI chassis DIO lines 0 1 2 and 4 are used as communication lines and must be left to power up in the default high impedance state to avoid potential damage to these signals National Instruments 6 23 X Series User Manual Chapter 6 Digital 1 0 DI Change Detection You can configure the DAQ device to detect changes on all 32 digital input lines PO P1 and P2 and all 16 PFI lines Figure 6 11 shows a block diagram of the DIO change detection circuitry Change Detection Event Figure 6 11 DI Change Detection You can enable the DIO change detection circuitry to detect rising edges falling edges or either edge individually on each DIO line The DAQ devices synchronize each DI signal to the 100 MHz Timebase and then sends the signal to the change detectors The circuitry ORs the output of all enabled change detectors from every DI signal The result of this OR is the Change Detection Event signal Change detection performs bus correlation by considering all changes within a 50 ns window one change detection event This keeps signals on the same bus synchronized in samples and prevents overruns X Series User Manual 6 24
76. instrumentation amplifier rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground shown as V in Figure 4 26 Common Mode Signal Rejection Considerations The instrumentation amplifier can reject any voltage caused by ground potential differences between the signal source and the device In addition the instrumentation amplifier can reject common mode noise pickup in the leads connecting the signal sources to the device The instrumentation amplifier can reject common mode signals as long as V and V input signals are both within the working voltage range of the device 4 48 ni com Chapter 4 Analog Input Differential Connections for Floating Signal Sources Figure 4 27 shows how to connect a floating or non referenced signal source to a channel on an Simultaneous MIO X Series device Simultaneous X Series Device AI O o Instrumentation Floating y Amplifier Signal Vs Source Alg Measured Bias m Voltage Resistors Bias Current Return Paths TN alo ano 4 AI 0 Connections Shown 1 0 Connector iL Figure 4 27 Differential Connection for Floating Signals on Simultaneous MIO X Series Devices Figure 4 27 shows bias resistors connected between AI 0 AI 0 and the floating signal source ground These resistors provide a return path for the bias current A value of 10 k
77. is written to the output lines one sample at a time Buffered generation typically allow for much faster transfer rates than non buffered acquisitions because data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode generation refers to the generation of a specific predetermined number of data samples Once the specified number of samples has been written out the generation stops Continuous generation refers to the generation of an unspecified number of samples Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation There are several different methods of continuous generation that control what data is written These methods are regeneration FIFO regeneration and non regeneration modes Regeneration is the repetition of the data that is already in the buffer Standard regeneration is when data from the PC buffer is continually downloaded to the FIFO to be written out New data can be written to the PC buffer at any time without disrupting the output Use the NI DAQmx write property regenMode to allow or not allow regeneration The NI DAQmx default is to allow regeneration With non regeneration old data is not repeated New data must be continually written to the buffer If the program does not write new data to the buffer at
78. it falls behind hardware These features make HWTSP ideal for real time control applications HWTSP operations in conjunction with the wait for next sample clock function provide tight synchronization between the software layer and the hardware layer Refer to the NI Developer Zone document NI DAQmx Hardware Timed Single Point Lateness Checking for more information To access this document go to ni com info and enter the Info Code daqhwt sp 3 Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations X Series User Manual Buffered lIn a buffered generation data is moved from a PC buffer to the DAQ device s onboard FIFO using DMA before it is written to the DACs one sample at a time Buffered generation typically allow for much faster transfer rates than non buffered acquisitions because data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode generation refers to the generation of a specific predetermined number of data samples Once the specified number of samples has been written out the generation stops Continuous generation refers to the generation of an unspecified number of samples Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation There
79. lt 4 oa Counter Value 5 X 6 X 7 7 Figure 7 18 X1 Encoding 7 23 X Series User Manual Chapter 7 Counters e X2 Encoding The same behavior holds for X2 encoding except the counter increments or decrements on each edge of channel A depending on which channel leads the other Each cycle results in two increments or decrements as shown in Figure 7 19 ChA dE ChB soal Counter Value 5X 6 X 7 X 8 XQ 9X8X7X6 X5 Figure 7 19 X2 Encoding e X4Encoding Similarly the counter increments or decrements on each edge of channels A and B for X4 encoding Whether the counter increments or decrements depends on which channel leads the other Each cycle results in four increments or decrements as shown in Figure 7 20 Ch B ChA Gr e La Counter Value 5 k a marant nanronnes X Series User Manual Figure 7 20 X4 Encoding Channel Z Behavior Some quadrature encoders have a third channel channel Z which is also referred to as the index channel A high level on channel Z causes the counter to be reloaded with a specified value in a specified phase of the quadrature cycle You can program this reload to occur in any one of the four phases in a quadrature cycle Channel Z behavior when it goes high and how long it stays high differs with quadrature encoder de
80. lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger Routing Al Convert Clock Signal to an Output Terminal You can route AI Convert Clock as an active low signal out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal All PFI terminals are configured as inputs by default Using a Delay from Sample Clock to Convert Clock When using the AI timing engine to generate your Convert Clock you also can specify a configurable delay from AI Sample Clock to the first AI Convert Clock pulse within the sample By default this delay is three ticks of AI Convert Clock Timebase Figure 4 17 shows the relationship of AI Sample Clock to AI Convert Clock Al Convert Clock Timebase Al Sample Clock Al Convert Clock lt gt q gt Delay from Convert Sample Period Clock Figure 4 17 Al Sample Clock and Al Convert Clock X Series User Manual 4 32 ni com Chapter 4 Analog Input Other Timing Requirements The sample and conversion level timing of MIO X Series devices work such that some clock signals are gated off unless the proper timing requirements are met For example the device ignores both AI Sample Clock and AI Convert Clock until it receives a valid AI Start Trigger signal Similarly the
81. of every channel in the task once for every AI Sample Clock A measurement acquisition consists of one or more samples You can specify an internal or external source for AI Sample Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of AI Sample Clock Using an Internal Source One of the following internal signals can drive AI Sample Clock e Counter n Internal Output e AI Sample Clock Timebase divided down e A pulse initiated by host software e Change Detection Event e Counter n Sample Clock e DI Sample Clock di SampleClock 4 54 ni com National Instruments Chapter 4 Analog Input e AO Sample Clock ao SampleClock e DO Sample Clock do SampleClock A programmable internal counter divides down the sample clock timebase Several other internal signals can be routed to AI Sample Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an External Source Use one of the following external signals as the source of AI Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e _ PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger Routing Al Sample Clock Signal to an Output Terminal You can route AI Sample Clock out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal This pulse is always active high All PFI terminals are configured as inputs by d
82. of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events C 2 ni com Glossary Symbol Prefix Value p pico 10 12 n nano 10 u micro 10 6 m milli 10 3 k kilo 103 M mega 106 Symbols Percent Positive of or plus Negative of or minus Plus or minus lt Less than gt Greater than lt Less than or equal to 2 Greater than or equal to Per H Degree Q Ohm National Instruments G 1 X Series User Manual Glossary A A A D AC accuracy ADE analog analog input signal analog output signal analog trigger application arm X Series User Manual Amperes the unit of electric current Analog to Digital Most often used as A D converter Alternating current A measure of the capability of an instrument or sensor to faithfully indicate the value of the measured signal This term is not related to resolution however the accuracy level can never be better than the resolution of the instrument Application development environment A signal whose amplitude can have a continuous range of values An input signal that varies smoothly over a continuous range of values rather than in discrete steps An output signal that varies smoothly over a continuous range of values rather than in discrete steps A trigger that occurs a
83. of triggering where you set the start time of an acquisition and gather data at a known position in time relative to a trigger signal Lag between making a change and the effect of the change Input Output The transfer of data to from a computer system involving communications channels operator interface devices and or data acquisition and control interfaces 1 The electrical characteristic of a circuit expressed in ohms and or capacitance inductance 2 Resistance G 8 ni com instrument driver instrumentation amplifier interface kS L LabVIEW LED lowpass filter LSB measurement measurement device National Instruments Glossary A set of high level software functions that controls a specific GPIB VXI or RS232 programmable instrument or a specific plug in DAQ device Instrument drivers are available in several forms ranging from a function callable language to a virtual instrument VI in LabVIEW A circuit whose output voltage with respect to ground is proportional to the difference between the voltages at its two inputs An instrumentation amplifier normally has high impedance differential inputs and high common mode rejection Connection between one or more of the following hardware software and the user For example hardware interfaces connect two other pieces of hardware Current output high Current output low 1 000 samples A graphical programming language Light Emitti
84. or an external source for AI AO DI or DO timing signals Routing Counter n Internal Output to an Output Terminal You can route Counter n Internal Output to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal All PFIs are set to high impedance at startup Frequency Output Signal The Frequency Output FREQ OUT signal is the output of the frequency output generator Routing Frequency Output to a Terminal You can route Frequency Output to any PFI lt 0 15 gt or PXIe DSTARC terminal All PFIs are set to high impedance at startup The FREQ OUT signal also can be routed to DO Sample Clock and DI Sample Clock Default Counter Timer Pinouts By default NI DAQmx routes the counter timer inputs and outputs to the PFI pins Refer to Table 7 9 for the default NI DAQmx counter timer outputs for PCI Express PXI Express and USB Mass Termination devices Refer to Table 7 10 for the default NI DAQmx counter timer outputs for USB Screw Terminal devices National Instruments 7 47 X Series User Manual Chapter 7 Counters X Series User Manual Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Connector 0 Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 P
85. protected against overvoltage undervoltage and overcurrent conditions as well as ESD events However you should avoid these fault conditions by following these guidelines e If you configure a PFI or DIO line as an output do not connect it to any external signal source ground or power supply e Ifyou configure a PFI or DIO line as an output understand the current requirements of the load connected to these signals Do not exceed the specified current output limits of the DAQ device NI has several signal conditioning solutions for digital applications requiring high current drive e Ifyou configure a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals e Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States At system startup and reset the hardware sets all PFI and DIO lines to high impedance inputs by default The DAQ device does not drive the signal high or low Each line has a weak pull down resistor connected to it as described in the specifications document for your device NI DAQmx supports programmable power up states for PFI and DIO lines Software can program any value at power up to the PO P1 or P2 lines The PFI and DIO lines can be set as e A high
86. range The two counter larger range measurement is the same as a one counter measurement but now the user has an integer divide down of the signal An internal timebase is still used for the source frequency fk but the divide down means that the measurement time is the period of the divided down signal or N fx where N is the divide down Sample clocked For sample clocked frequency measurements a known timebase is counted for the source frequency fk The measurement time is the period of the sample clock fs Table 7 2 Frequency Measurement Methods Two Counter High Variable Sample Clocked One Counter Frequency Large Range fk Known timebase Known timebase 1 Known timebase gating period Measurement 1 1 gating period N time fs fx fx Max fx fx fk Jx Jex ee X a frequency Hex p 7 fx fk fx fx Nx fk fx error S Max error fx fx Sk fx fx x Nx fk fx Aalto Er RP f RP S Note Accuracy equations do not take clock stability into account Refer to your device specifications for clock stability National Instruments 7 19 X Series User Manual Chapter 7 Counters Which Method Is Best This depends on the frequency to be measured the rate at which you want to monitor the frequency and the accuracy you desire Take for example measuring a 50 kHz signal Assuming that the measurement times for the sample clocked with averaging and two counter frequency measu
87. ratings which are listed in the specifications document for each X Series device can damage the DAQ device and the computer NI is not liable for any damage resulting from such signal connections National Instruments 6 29 X Series User Manual Chapter 6 Digital 1 0 Getting Started with DIO Applications in Software You can use the X Series device in the following digital I O applications e Static digital input e Static digital output e Digital waveform generation e Digital waveform acquisition e DI change detection 3 Note For more information about programming digital I O applications and triggers in software refer to the NI DAQmx Help or the LabVIEW Help X Series User Manual X Series devices use the NI DAQmx driver NI DAQmx includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example code to an existing application To locate LabVIEW LabWindows CVI Measurement Studio Visual Basic and ANSI C examples refer to the KnowledgeBase document Where Can I Find NI DAQmx Examples by going to ni com info and entering the Info Code dagmxexp For additional examples refer to zone ni com 6 30 ni com Counters X Series devices have four general purpose 32 bit counter timers and one frequency generator The general purpose counter timers can be used
88. signal connectivity options 2 9 X Series User Manual Chapter 2 DAQ System Overview System features include the following e Modular architecture Select your measurement technology on a per channel basis e Small channel systems Condition up to 16 analog input and eight digital I O lines e Low profile portable Integrates well with other laptop computer measurement technologies e Connectivity Incorporates panelette technology to offer custom TM connectivity to thermocouple BNC LEMO B Series and MIL Spec connectors 3 Note PCI Express X Series Devices PCI Express users should consider the power limits on certain SCC modules without an external power supply Refer to the specifications for your device and the PCI Express Device Disk Drive Power Connector section of Chapter 3 Connector and LED Information for information about power limits and increasing the current the device can supply on the 5 V terminal 3 Note NI6356 6358 6366 6368 Devices X Series Simultaneous MIO SMIO devices do not support SCC Programming Devices in Software National Instruments measurement devices are packaged with NI DAQmx driver software an extensive library of functions and VIs you can call from your application software such as LabVIEW or LabWindows CVI to program all the features of your NI measurement devices Driver software has an application programming interface API which is a library of VIs functions classes
89. the input range e ADC The analog to digital converter ADC digitizes the AI signal by converting the analog voltage into a digital number e Analog Input Timing Signals For information about the analog input timing signals available on Simultaneous MIO X Series devices refer to the Analog Input Timing Signals section National Instruments 4 41 X Series User Manual Chapter 4 Analog Input e AI FIFO Simultaneous MIO X Series devices can perform both single and multiple A D conversions of a fixed or infinite number of samples A large first in first out FIFO buffer holds data during A D conversions to ensure that no data is lost Simultaneous MIO X Series devices can handle multiple A D conversion operations with DMA or programmed I O Analog Input Terminal Configuration Simultaneous MIO X Series devices support only differential DIFF input mode The channels on Simultaneous MIO X Series devices are true differential inputs meaning both positive and negative inputs can carry signals of interest For more information about DIFF input refer to the Connecting Analog Input Signals section which contains diagrams showing the signal paths for DIFF input mode A Caution Exceeding the differential and common mode input ranges distorts the input signals Exceeding the maximum input voltage rating can damage the device and the computer NI is not liable for any damage resulting from such signal connections The maximum input volta
90. then routes the Counter 0 Internal Output signal to the gate of Counter 1 You can then route a signal of known frequency fk as a counter timebase to the Counter 1 Source input NI DAQmx configures Counter 1 to perform a single pulse width measurement Suppose the result is that the pulse width is J periods of the fk clock From Counter 0 the length of the pulse is N fx From Counter 1 the length of the same pulse is J fk Therefore the frequency of fx is given by fx fk NIJ Sample Clocked Buffered Frequency Measurement Sample clocked buffered point frequency measurements can either be a single frequency measurement or an average between sample clocks Use CI Freq EnableAveraging to set the behavior For buffered frequency the default is True For hardware timed single point HWTSP the default is False A sample clocked buffered frequency measurement with CI Freq EnableAveraging set to True uses the embedded counter and a sample clock to perform a frequency measurement For each sample clock period the embedded counter counts the signal to measure fx and the 7 16 ni com Chapter 7 Counters primary counter counts the internal time base of a known frequency fk Suppose T1 is the number of ticks of the unknown signal counted between sample clocks and T2 is the number of ticks counted of the known time base The frequency measured will be fx fk T1 T2
91. ticks of DO Sample Clock Timebase Figure 6 7 shows the relationship of DO Sample Clock to DO Start Trigger DO Sample Clock Timebase DO Start Trigger DO Sample Clock A Delay From Start Trigger Figure 6 7 DO Sample Clock and DO Start Trigger DO Sample Clock Timebase Signal X Series User Manual The DO Sample Clock Timebase do SampleClockTimebase signal is divided down to provide a source for DO Sample Clock You can route any of the following signals to be the DO Sample Clock Timebase signal e 100 MHz Timebase default e 20 MHz Timebase 100 kHz Timebase e PXI CLK10 e PFI lt 0 15 gt e RTSI lt 0 7 gt 6 18 ni com Chapter 6 Digital I O e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger DO Sample Clock Timebase is not available as an output on the I O connector You might use DO Sample Clock Timebase if you want to use an external sample clock signal but need to divide the signal down If you want to use an external sample clock signal but do not need to divide the signal then you should use DO Sample Clock rather than DO Sample Clock Timebase DO Start Trigger Signal Use the DO Start Trigger do StartTrigger signal to initiate a waveform generation If you do not use triggers you can begin a generation with a software command Retriggerable DO The DO Start Trigger can also be configured t
92. to begin a measurement acquisition A measurement acquisition consists of one or more samples If you do not use triggers begin a measurement with a software command Once the acquisition begins configure the acquisition to stop e When a certain number of points are sampled in finite mode e After a hardware reference trigger in finite mode e With a software command in continuous mode An acquisition that uses a start trigger but not a reference trigger is sometimes referred to as a posttriggered acquisition Retriggerable Analog Input The AI Start Trigger can also be configured to be retriggerable The timing engine will generate the sample and convert clocks for the configured acquisition in response to each pulse on an AI Start Trigger signal The timing engine ignores the AI Start Trigger signal while the clock generation is in progress After the clock generation is finished the counter waits for another Start Trigger to begin another clock generation Figure 4 22 shows a retriggerable analog input with three AI channels and four samples per trigger Al Start Trigger e m Al Sample Clock ai comen UU A UUAN TU TU TU NU Figure 4 22 Retriggerable Analog Input Note Waveform information from LabVIEW will not reflect the delay between triggers They will be treated as a continuous acquisition with constant t0 and d
93. to the DO waveform generation FIFO The DAQ device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal DO Sample Clock You can configure each DIO signal to be an input a static output or a digital waveform generation output The FIFO supports a retransmit mode In the retransmit mode after all the samples in the FIFO have been clocked out the FIFO begins outputting all of the samples again in the same order For example if the FIFO contains five samples the pattern generated consists of sample 1 2 3 4 5 1 2 3 4 5 1 and so on X Series devices feature the following DO waveform generation timing signals e DO Sample Clock Signal e DO Sample Clock Timebase Signal DO Start Trigger Signal e DO Pause Trigger Signal Signals with an support digital filtering Refer to the PFI Filters section of Chapter 8 PFI for more information 6 16 ni com Chapter 6 Digital 1 0 DO Sample Clock Signal National Instruments The device uses the DO Sample Clock do SampleClock signal to update the DO terminals with the next sample from the DO waveform generation FIFO You can specify an internal or external source for DO Sample Clock You can also specify whether the DAC update begins on the rising edge or falling edge of DO Sample Clock If the DAQ device receives a DO Sample Clock when the FIFO is empty the DAQ device reports an underflow error to the host
94. x gt must be less than 11 V If any of these conditions are exceeded the input voltage is clamped until the fault condition is removed Analog Input Ground Reference Settings X Series User Manual MIO X Series devices support the following analog input ground reference settings Differential mode In DIFF mode the MIO X Series device measures the difference in voltage between two AI signals e Referenced single ended mode In RSE mode the MIO X Series device measures the voltage of an AI signal relative to AI GND e Non referenced single ended mode In NRSE mode the MIO X Series device measures the voltage of an AI signal relative to one of the AI SENSE or AI SENSE 2 inputs The AI ground reference setting determines how you should connect your AI signals to the MIO X Series device Refer to the Connecting Analog Input Signals section for more information Ground reference settings are programmed on a per channel basis For example you might configure the device to scan 12 channels four differentially configured channels and eight single ended channels MIO X Series devices implement the different analog input ground reference settings by routing different signals to the NI PGIA The NI PGIA is a differential amplifier That is the NI PGIA amplifies or attenuates the difference in voltage between its two inputs The NI PGIA 4 4 ni com Chapter 4 Analog Input drives the ADC with this amplified voltage The
95. 0 and AI 8 are the positive and negative inputs of differential analog input channel 0 Similarly the following signal pairs also form differential input channels AI lt 1 9 gt AI lt 2 10 gt AI lt 3 11 gt AI lt 4 12 gt AI lt 5 13 gt AI lt 6 14 gt AI lt 7 15 gt AI lt 16 24 gt AI lt 17 25 gt AI lt 18 26 gt AI lt 19 27 gt AI lt 20 28 gt AI lt 21 29 gt AI lt 22 30 gt AI lt 23 31 gt Also refer to the Connecting Ground Referenced Signal Sources section of Chapter 4 Analog Input Simultaneous MIO X Series Devices For differential measurements on Simultaneous MIO X Series devices AI 0 and AI 0 are the positive and negative inputs of differential analog input channel 0 Also refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input AI SENSE AI SENSE 2 Input Analog Input Sense In NRSE mode the reference for each AI lt 0 15 gt signal is AI SENSE the reference for each AI lt 16 31 gt signal is AI SENSE 2 Also refer to the Connecting Ground Referenced Signal Sources section of Chapter 4 Analog Input AO lt 0 3 gt AO GND Output Analog Output Channels 0 to 3 These terminals supply the voltage output of AO channels 0 to 3 AO GND Analog Output Ground AO GND is the reference for AO lt 0 3 gt All three ground references AI GND AO GND and D GND are connected on the device D GND Digital Ground D GND supplies the re
96. 11 2 shows the analog trigger circuit on MIO X Series devices Analog e Input PGIA ADC Channels e Al Circuitry Analog Comparison Analog Event gt AO Circuitry Mux Trigger APFI lt 0 1 gt Detection Analog Trigger E DIO Circuitry ca Circuitry Output L gt Counter Circuitry X Series User Manual 11 2 Figure 11 2 MIO X Series Device Analog Trigger Circuit ni com Chapter 11 Triggering Figure 11 3 shows the analog trigger circuit on Simultaneous MIO X Series devices NI PGIA ADC m Al Circuitr jee Analog Comparison i P K Analog Event gt AO Circuitry Channels Mux H Trigger l Detection Analog Trigger gt DIO Circuitry 1 Circuitry Output NI PGIA ADC gt Counter Circuitry APFI lt 0 1 gt a Figure 11 3 Simultaneous MIO X Series Device Analog Trigger Circuitry You must specify a source and an analog trigger type The source can be either an APFI lt 0 1 gt terminal or an analog input channel APFI lt 0 1 gt Terminals When you use either APFI lt 0 1 gt terminal as an analog trigger you should drive the terminal with a low impedance signal source less than 1 kQ source impedance If APFI lt 0 1 gt are left unconnected they are susceptible to crosstalk from adjacent terminals which can cause false triggering Note that the APFI lt 0 1 gt terminals
97. 1514 01 not included in your X Series USB device kit Refer to Figure 1 3 1 Use three 8 32 flathead screws to attach the backpanel wall mount to the panel wall Tighten the screws with a 2 Phillips screwdriver to a torque of 1 1 N m 10 Ib in Figure 1 3 Using the USB X Series Mounting Kit on a Wall or Panel 2 Place the USB X Series device on the backpanel wall mount with the signal wires facing down and the device bottom sitting on the backpanel wall mount lip 3 While holding the USB X Series device in place attach the front bracket to the backpanel wall mount by tightening the two thumbscrews 1 5 X Series User Manual Chapter 1 Getting Started DIN Rail Mounting Complete the following steps to mount your USB X Series device to a DIN rail using the USB X Series mounting kit with DIN rail clip part number 781515 01 not included in your X Series USB device kit 1 Fasten the DIN rail clip to the back of the backpanel wall mount using a 1 Phillips screwdriver and four machine screws part number 740981 01 included in the kit as shown in Figure 1 4 Tighten the screws to a torque of 0 4 N m 3 6 Ib in Figure 1 4 Attaching the DIN Rail Clip to the Backpanel Wall Mount 2 Clip the bracket onto the DIN rail as shown in Figure 1 5 r 1 DIN Rail Clip 2 DIN Rail Spring 3 DIN Rail Figure 1 5 DIN Rail Clip Parts Locator Diagram
98. 31 Al GND 64 30 Al 11 Al 3 63 29 AI SENSE 62 28 Al 12 Al 4 61 27 Al 5 Al 5 60 26 Al GND 59 25 Al 14 Al 6 58 24 Al 7 Al 7 57 23 Al GND 56 22 AO GND 55 21 AO GND 54 20 D GND 53 19 PO 0 52 18 P0 5 51 17 D GND 50 16 P0 2 49 15 PO 7 48 14 P0 3 47 13 PFI 11 P2 3 46 12 PFI 10 P2 2 45 11 D GND 44110 PFI 2 P1 2 43 9 PFI 3 P1 3 42 8 PFI 4 P1 4 41 7 PFI 13 P2 5 40 6 PFI 15 P2 7 39 5 PFI 7 P1 7 38 4 PFI 8 P2 0 37 3 D GND 36 2 D GND 35 1 See NC No Connect CONNECTOR 0 Al 0 15 CONNECTOR 1 Al 16 31 TERMINAL 68 TERMINAL 34 TERMINAL 1 TERMINAL 35 Q s 9 TERMINAL 35 TERMINAL 1 TERMINAL 34 TERMINAL 68 P0 30 P0 28 P0 25 D GND P0 22 P0 21 D GND 5V D GND PO 17 PO 16 D GND D GND 5 V D GND PO 14 P0 9 D GND P0 12 NC AO 3 AO 2 Al 31 AI 23 AI GND Al 22 Al 22 Al 29 AI 21 Al GND Al 20 Al 20 Al GND Al 19 Al 19 Al 26 Al 18 Al GND Al 17 Al 17 Al 24 Al 16 COIN Da Rl w m a D GND D GND P0 24 P0 23 P0 31 P0 29 P0 20 P0 19 P0 18 D GND P0 26 P0 27 P0 11 P0 15 P0 10 D GND P0 13 PO 8 D GND AO GND AO GND AI GND AI 23 A AI 30 A AI GND AI 21 A AI 28 A AI SENSE 2 AI 27 A AI GND Al 18
99. 4 power up states 6 23 8 7 prescaling 7 51 programmable function interface PFD 8 1 power up states 6 23 8 7 programmed I O 10 2 programming devices in software 2 10 programming examples NI resources C 1 pulse encoders 7 25 generation for ETS 7 40 train generation 7 31 continuous 7 34 pulse width measurement implicit buffered 7 7 single 7 6 PXI and PXI Express 10 3 clock 10 3 clock and trigger signals 9 8 trigger signals 10 3 triggers 9 8 PXI Express and PXI 10 3 chassis compatibility 10 3 clock 10 3 clock and trigger signals 9 8 considerations 10 3 PXIe_CLK100 9 8 X Series User Manual 1 12 PXIe SYNC100 9 8 PXIe DSTAR lt A C gt 9 9 PXI_CLK10 9 8 PXI_STAR filters 9 9 trigger 9 9 PXIe CLK100 9 8 PXIe_SYNC100 9 8 PXIe DSTAR lt A C gt 9 9 Q quadrature encoders 7 23 R range analog input MIO X Series devices 4 2 real time system integration bus 9 4 reciprocal frequency measurement 7 15 reference clock 10 MHz 9 3 external 9 2 referenced single ended connections using with floating signal sources MIO X Series devices 4 19 when to use with floating signal sources MIO X Series devices 4 14 when to use with ground referenced signal sources MIO X Series devices 4 21 related documentation xviii retriggerable single pulse generation 7 33 routing analog comparison event to an output terminal 11 5 clock 9 1 digital 9 1 RSE configuration MIO X Series devices
100. 5 9 X Series User Manual Chapter 5 Analog Output e DI Pause Trigger di PauseTrigger e DO Pause Trigger do PauseTrigger The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the samples are paused when AO Pause Trigger is at a logic high or low level Using an Analog Source When you use an analog trigger source the samples are paused when the Analog Comparison Event signal is at a high level Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information Routing AO Pause Trigger Signal to an Output Terminal You can route AO Pause Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal AO Sample Clock Signal X Series User Manual Use the AO Sample Clock ao SampleClock signal to initiate AO samples Each sample updates the outputs of all of the DACs You can specify an internal or external source for AO Sample Clock You also can specify whether the DAC update begins on the rising edge or falling edge of AO Sample Clock Using an Internal Source One of the following internal signals can drive AO Sample Clock e AO Sample Clock Timebase divided down e Counter n Internal Output e Change Detection Event e Counter n Sample Clock e AT Convert Clock ai ConvertClock e AI Sample Clock ai SampleClock
101. A AI 25 A Al GND Al 16 A NC No Connect 23 22 21 20 19 18 17 16 X Series User Manual Figure A 4 NI PCle 6323 6343 Pinout A 8 ni com Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DA Qmx Help or the LabVIEW Help National Instruments A 9 X Series User Manual Appendix A Device Specific Information Figure A 5 shows the pinout of the NI USB 6343 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information aoao ae S H A mala Alie A1 165 saoi re a Le tae ais alo 2 al Si 8 Al4 ai 24 ai te 34 KS S A als 5 AIGNE 3 IS gt 5 NES AGND 35 IS 55 Al S Al 21 AIT Al 1 4 Al 17 Al 17 36 IS ALI Alg alt 516 S21 AMIS AIS Aras a17 37 S S53 N la 7 A
102. A 10 NI 6351 6361 A 12 accessory options A 15 cabling options A 15 PCI Express pinout A 12 PXI Express pinout A 12 specifications A 15 USB pinout A 13 A 14 A 18 A 24 NI 6353 6363 A 16 accessory options A 21 cabling options A 21 PCI Express pinout A 16 PXI Express pinout A 16 specifications A 21 USB pinout A 20 NI 6356 6366 A 22 accessory options A 26 cabling options A 26 PXI Express pinout A 22 specifications A 26 USB pinout A 25 NI 6358 6368 A 27 accessory options A 28 cabling options A 28 pinout A 27 specifications A 28 NI support and services C 1 NI DAQmx default counter terminals 7 47 device documentation browser xxi documentation xviii installation 1 1 ni com NI PGIA MIO X Series devices 4 2 Simultaneous MIO X Series devices 4 41 non buffered hardware timed acquisitions Simultaneous MIO X Series devices 4 45 non referenced single ended connections using with floating signal sources MIO X Series devices 4 18 using with ground referenced signal sources MIO X Series devices 4 23 when to use with floating signal sources MIO X Series devices 4 13 when to use with ground referenced signal sources MIO X Series devices 4 21 NRSE connections using with floating signal sources 4 18 using with ground referenced signal sources 4 23 when to use with floating signal sources 4 13 when to use with ground referenced signal sources 4 21 0 on demand acquisitions MI
103. AI Start Trigger to initiate pretriggered DAQ operations In most pretriggered applications a software trigger generates AI Start Trigger Refer to the AJ Reference Trigger Signal section for a complete description of the use of AI Start Trigger and AI Reference Trigger in a pretriggered DAQ operation Al Reference Trigger Signal Use AI Reference Trigger ai ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desired is the buffer size minus the number of pretrigger samples 3 Note NI USB 6356 6366 Devices You can select the buffer on the host or on the NI USB 6356 6366 device To enable a Reference Trigger to Onboard Memory set the AI Data Transfer Request Condition property in NI DAQmx to When Acquisition Complete Once the acquisition begins the DAQ device writes samples to the buffer After the DAQ device captures the specified number of pretrigger samples the DAQ device begins to look for the reference trigger condition If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples the DAQ device ignores the condition If the buffer becomes full the DAQ device continuously discards the oldest samples in the buffer to make space for the next samp
104. CI Express users should consider the power limits on certain SCC modules without an external power supply Refer to the specifications document for your device and the PCI Express Device Disk Drive Power Connector section of Chapter 3 Connector and LED Information for information about power limits and increasing the current the device can supply on the 5 V terminal 3 Note NI 6356 6358 6366 6368 Devices Simultaneous MIO X Series devices do not support SCC Refer to the SCC Configuration Guide available by going to ni com info and entering the Info Code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your X Series device You can use two BNC accessories with one X Series device by usin
105. Clock Timebase Signal You can route any of the following signals to be the AI Sample Clock Timebase ai SampleClockTimebase signal 100 MHz Timebase default 20 MHz Timebase 100 kHz Timebase PXI_CLK10 RTSI lt 0 7 gt PFI lt 0 15 gt PXI_STAR PXIe DSTAR lt A B gt Analog Comparison Event an analog trigger AI Sample Clock Timebase is not available as an output on the I O connector AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge except on 100 MHz Timebase or 20 MHz Timebase 4 30 ni com Chapter 4 Analog Input Al Convert Clock Signal Use the AI Convert Clock ai ConvertClock signal to initiate a single A D conversion on a single channel A sample controlled by the AI Sample Clock consists of one or more conversions You can specify either an internal or external signal as the source of AI Convert Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of AI Convert Clock With NI DAQmx the driver chooses the fastest conversion rate possible based on the speed of the A D converter and adds 10 us of padding between each channel to allow for adequate settling time This scheme enables the channels to approximate simultaneous sampling and still allow for adequate settling time If the AI Sample Clock rate is too fast to
106. DAQ X Series X Series User Manual NI 632x 634x 635x 636x Devices Fran ais Deutsch H RE ni com manuals February 2012 370784D 01 Qr NATIONAL p INSTRUMENTS Worldwide Technical Support and Product Information ni com Worldwide Offices Visit ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments Web site at ni com info and enter the Info Code feedback 2009 2012 National Instruments All rights reserved Important Information Warranty X Series devices are warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by rec
107. Developer Suite NI also offers flexible extended contract options that guarantee your SSP benefits are available without interruption for as long as you need them Visit ni com ssp for more information For information about other technical support options in your area visit ni com services or contact your local office at ni com contact e Training and Certification Visit ni com training for training and certification program information You can also register for instructor led hands on courses at locations around the world National Instruments C 1 X Series User Manual Appendix C Technical Support and Professional Services X Series User Manual e System Integration If you have time constraints limited in house technical resources or other project challenges National Instruments Alliance Partner members can help To learn more call your local NI office or visit ni com alliance Declaration of Conformity DoC A DoC is our claim of compliance with the Council of the European Communities using the manufacturer s declaration of conformity This system affords the user protection for electromagnetic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certification e Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration You also can visit the Worldwide Offices section
108. E Ne SIs arano PFI 2 P1 2 75 S DENDIS AIGND 12 PFI3 P1 3 76 KY mental of 559 Priam rf oa pares AIGND 14 PFIS5 P1 5 78 1 AO 0 15 S S D AOGND PFI6 P1 6 79 S ARE AO GND 16 K PFI7 P1 7 80 ss j A Figure A 14 NI USB 6356 6366 Screw Terminal Pinout Sy Note Refer to Table 7 10 X Series USB Screw Terminal Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help National Instruments A 25 X Series User Manual Appendix A Device Specific Information NI 6356 6366 Specifications Refer to the NI 6356 6358 Specifications for more detailed information about the NI 6356 device Refer to the NI 6366 6368 Specifications for more detailed information about the NI 6366 device NI 6356 6366 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information X Series User Manual A 26 ni com Appendix A Device Specific Information NI 6358 6368 The following sections contain information about the NI PXIe 6358 and NI PXIe 6368 devices NI 6358 6368 Pinout Figure A 15 shows the pinout of the NI PX
109. FI 2 P1 2 43 9 D GND PFI 3 P1 3 42 8 45v PFI 4 P1 4 41 7 D GND PFI 13 P2 5 40 6 PFI5 P1 5 PFI 15 P2 7 39 5 PFI6 P1 6 PFI 7 P1 7 38 4 D GND PFI 8 P2 0 37 3 PFI9 P2 1 D GND 36 2 PFI 12 P2 4 D GND PFI 14 P2 6 NC No Connect CONNECTOR 0 Al 0 7 TERMINAL 34 TERMINAL 1 TERMINAL 68 TERMINAL 35 Figure A 13 NI USB 6366 Mass Termination Pinout A 24 ni com Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help Figure A 14 shows the pinout of the NI USB 6356 6366 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information Al 0 HS i as PO 0 AS ees Al 0 2 IS PO 1 66 IS RIENG AN S 19_ Al ano EG 67 PFI 9 P2 1 NER AIX SI 20 Al 5 P03 68l S D GND aE 5 I Set als Bae sol PFI 10 P2 2 Al GND el si Si 22 A GND PO 5 70 S BIENS RSS zi Kl Sf 23 alee Baie HS PFI 11 P2 3 A SUN S x Al GND RUES 72 US TIETE Al GND AMS Shoe aiz PFIO P1 0 73 9 ANS Al 3 10 SI SI 27 NEZ PFI 1 P1 1 74 IS TE
110. FI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTR1Z 41 PFI 4 CTR1B 46 PFI 11 CTR 2 SRC 11 PFI 0 CTR 2 GATE 10 PFI 1 CTR 2 AUX 43 PFI 2 CTR 2 OUT 1 PFI 14 CTR2A 11 PFI 0 CTR2Z 10 PFI 1 CTR2B 43 PFI 2 CTR 3 SRC 6 PFI 5 CTR 3 GATE 5 PFI 6 CTR 3 AUX 38 PFI 7 CTR 3 OUT 39 PFI 15 CTR3A 6 PFI 5 CTR3Z 5 PFI 6 CTR3B 38 PFI 7 FREQ OUT 1 PFI 14 7 48 ni com National Instruments Chapter 7 Counters Table 7 10 X Series USB Screw Terminal Device Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 81 PFI 8 CTR 0 GATE 83 PFI 9 CTR 0 AUX 85 PFI 10 CTR 0 OUT 89 PFI 12 CTROA 81 PFI 8 CTROZ 83 PFI 9 CTROB 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CTRIA 76 PFI 3 CTR1Z 77 PFI 4 CTR1B 87 PFI 11 CTR 2 SRC 73 PFI 0 CTR 2 GATE 74 PFI 1 CTR 2 AUX 75 PFI 2 CTR 2 OUT 93 PFI 14 CTR2A 73 PFI 0 CTR2Z 74 PFI 1 CTR2B 75 PFI 2 CTR 3 SRC 78 PFI 5 CTR 3 GATE 79 PFI 6 CTR 3 AUX 80 PFI 7 CTR 3 OUT 95 PFI 15 CTR3 A 78 PFI 5 CTR3Z 79 PFI 6 CTR3B 80 PFI 7 FREQ OUT 93 PFI 14 7 49 X Series User Manual Chapter 7 Counters You can use these defaults or select other sources
111. For more information about programming analog output applications and triggers in software refer to the NI DAQmx Help or the LabVIEW Help National Instruments X Series devices use the NI DAQmx driver NI DAQmx includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example code to an existing application To locate LabVIEW LabWindows CVI Measurement Studio Visual Basic and ANSI C examples refer to the KnowledgeBase document Where Can I Find NI DAQmx Examples by going to ni com info and entering the Info Code daqmxexp For additional examples refer to zone ni com 5 13 X Series User Manual Digital 1 0 X Series devices contain up to 32 lines of bidirectional DIO signals on Port 0 In addition X Series devices have up to 16 PFI signals that can function as static DIO signals X Series devices support the following DIO features on Port 0 Up to 32 lines of DIO Direction and function of each terminal individually controllable Static digital input and output High speed digital waveform generation High speed digital waveform acquisition DI change detection trigger interrupt Figure 6 1 shows the circuitry of one DIO line Each DIO line is similar The following sections provide information about the various parts of the DIO circuit National Instruments
112. IEW Help Signal Conditioning Options SCXI SCX1 is a front end signal conditioning and switching system for various measurement devices including X Series devices An SCXI system consists of a rugged chassis that houses shielded signal conditioning modules that amplify filter isolate and multiplex analog signals from thermocouples or other transducers SCXI is designed for large measurement systems or systems requiring high speed acquisition 3 Note NI 6356 6358 6366 6368 Devices Simultaneous MIO SMIO X Series devices only support controlling SCXI in parallel mode National Instruments System features include the following e Modular architecture Choose your measurement technology e Expandability Expand your system to 3 072 channels e Integration Combine analog input analog output digital I O and switching into a single unified platform e High bandwidth Acquire signals at high rates e Connectivity Select from SCXI modules with thermocouple connectors or terminal blocks SCC SCC is a front end signal conditioning system for X Series plug in data acquisition devices An SCC system consists of a shielded carrier that holds up to 20 single or dual channel SCC modules for conditioning thermocouples and other transducers SCC is designed for small measurement systems where you need only a few channels of each signal type or for portable applications SCC systems also offer the most comprehensive and flexible
113. I_Trig lt 0 7 gt or PXIe DSTARC terminal All PFI terminals are configured as inputs by default DI Pause Trigger Signal You can use the DI Pause Trigger di PauseTrigger signal to pause and resume a measurement acquisition The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive You can program the active level of the pause trigger to be high or low as shown in Figure 6 6 In the figure T represents the period and A represents the unknown time between the clock pulse and the posttrigger DI Sample Clock DI Pause Trigger DI External Sample Clock DI Sample Clock DI Pause Trigger Halt Used on Internal Clock Free Running Used on External Clock X Series User Manual Figure 6 6 Halt Internal Clock and Free Running External Clock 6 12 ni com Chapter 6 Digital I O Using a Digital Source To use DI Pause Trigger specify a source and a polarity The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Counter n Internal Output e Counter n Gate e AT Pause Trigger ai PauseTrigger e AO Pause Trigger ao PauseTrigger e DO Pause Trigger do PauseTrigger The source also can be one of several other internal signals on your DAQ
114. Ie 6358 6368 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the I O Connector Signal Descriptions section of Chapter 3 Connector and LED Information per N Al 0 68 34 Al o P0 30 1 35 D GND AI 0 GND 67 33 Al 1 P0 28 2 36 D GND Al 1 66 32 Al 1 GND P0 25 3 37 Po 24 Al 2 65 31 Al 2 ana D GND 4 38 P0 23 AI 2 GND 64 30 Al 3 T g P0 22 5 39 P0 31 AI 3 63 29 Al3 GND EE 50 P0 21 6 40 Po 29 NC 62 28 Al 4 us ge D GND 7 41 Po 20 Al 4 61 27 Al4 GND 4 g 5V 8 42 Po 19 Al 5 60 26 A15 9 D GND 9 43 Po 18 AI5 GND 59 25 Al6 P0 17 1044 D GND Al 6 58 24 Al 6 GND P0 16 11 45 Po 26 Al 7 57 23 Al 7 TERMINAL 68 TA _ TERMINAL 35 D GND 12 46 P0 27 Al7 GND 56 221 AOO D GND 13 47 Po 11 AO GND 55 21 Ao 1 TERMINAL 34 TERMINAL 1 Ee 14148 Po 15 AO GND 54 20 APFIO D GND 15 49 Po 10 D GND 53 19 Po 4 P0 14 16 50 D GND P0 0 52 18 D GND P0 9 17 51 Po 13 P0 5 51 17 Po D GND 18 52 Pos D GND 50 16 Po 6 P0 12 19 53 D GND P0 2 49 15 D GND APFI 1 20 54 AO GND
115. LGND 6 IS S os 7 TES RER 38 KS X s Al 22 Al 22 Al2 Al2 7 S Al 18 Al 18 39 IS ao s NI Sr anaa As cal 18 40 N S 86 Al 30 Al 22 ACRID o IS AIRS AGAD 41 1S N 2e AIR ISSN A13 A13 10 S Al 19 Al 194 421 IS Al 14 Al 3 11 Ql S27 AS AIT Araz arta 43 I Sj 59 Al 31 Al 23 AIGND 12 Sip 28 ALGND AI GND 44 Sj 60 ALGND AISENSE 13 1 SM 29 NC AISENSE2 45 I Si 61 NC AIGND 14 8 Sip 80 ALGND AI GND 46 IS Sj 62 Al GND AO 0 15 Syst 401 AO 2 a7 Si 63 4083 Sl 32 AO GND Sl 64 AO GND AOGND 16l AOGND 48 K 1 ee po as 81 PFI 8 P2 0 pos 7a S113 PO24 82 DGND II S114 D GND PO 66 P09 ol 83 PFI 9 P2 1 Sil Gl 115 Po25 P02 67 P0 10 99 Is 84 DGND II Sl116 D GND P0 3 68 P0 11 100 S 85 PFI 10 P2 2 II S 117 Po 26 P0 4 69 P0 12 101 IS 86 D GND II Sl118 D GND P0 5 70 P0 13 102 IS 87 PFI 11 P2 3 II Site Po 27 P0 6 71 P0 14 103 IS 88 D GND N 120 D GND P0 7 72 P0 15 104 I 89 PFI 12 P2 4 X 121 P0 28 PFIO P1 0 73 P0 16 105 18 PFI 1 P1 1 74 S 90 D GND Po 17 106 I S 122 D GND PFI2 P12 75 Sjj 91_PFI 13 P2 5 poia 107 S123 Po 29 PFI 3 P1 3 76 92 D GND poto 108 I Sj 124 D GND PEPA F Gl 93 PFI 14 P2 6 po20 109 NI SI 125_Po 30 PFI 5 P1 5 78 GI 94 D GND Po 21 110 S 126 D GND PFI 6 P1 6 79 GI 95 PFI 15 P2 7 po22 111 Ki S 127_Po 31 PFI7 P1 7 80 QI 96 5V po23 112 x Sill 128 D GND NC No Connect Figure A 5 NI USB 6343 Pinout X Series User Manual A 10 ni com Appendix A Device Speci
116. MA or programmed I O Input range refers to the set of input voltages that an analog input channel can digitize with the specified accuracy The NI PGIA amplifies or attenuates the AI signal depending on the input range You can individually program the input range of each AI channel on your MIO X Series device The input range affects the resolution of the MIO X Series device for an AI channel Resolution refers to the voltage of one ADC code For example a 16 bit ADC converts analog inputs into one of 65 536 216 codes that is one of 65 536 possible digital values These values are spread fairly evenly across the input range So for an input range of 10 V to 10 V the voltage of each code of a 16 bit ADC is X Series User Manual 10V 10V 305uV 716 4 2 ni com Chapter 4 Analog Input MIO X Series devices use a calibration method that requires some codes typically about 5 of the codes to lie outside of the specified range This calibration method improves absolute accuracy but it increases the nominal resolution of input ranges by about 5 over what the formula shown above would indicate Choose an input range that matches the expected input range of your signal A large input range can accommodate a large signal variation but reduces the voltage resolution Choosing a smaller input range improves the voltage resolution but may result in the input signal going out of range For more information about set
117. NAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the sam
118. ND Al 14 AI 6 AI 7 Al 7 AI GND NC NC D GND PO 0 PO 5 D GND P0 2 PO 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 13 P2 5 PFI 15 P2 7 PFI 7 P1 7 PFI 8 P2 0 D GND D GND 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 D a 57 N EA 58 N wo 56 N D 55 D k 54 D e 53 o 52 51 me N 50 Oo 49 e a 48 a P 47 a wo 46 D 45 are 44 Oo 43 o 42 41 39 peo S 38 37 36 35 M o R Oa aQ N oo ee NC No Connect Al 8 Al O Al 1 Al 1 Al GND Al 10 Al 2 Al 3 Al 3 Al GND Al 4 Al 4 Al GND Al 13 Al 5 Al 6 Al 6 Al GND Al 15 Al 7 NC NC NC P0 4 D GND PO 1 PO 6 D GND 5 V D GND D GND PFI 0 P1 0 REIREI D GND 5V D GND PFUS P1 5 PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 TERMINAL 68 CONNECTOR 0 Al 0 15 TERMINAL 34 TERMINAL 35 TERMINAL 1 Figure A 1 NI PCle 6320 Pinout Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins fo
119. O 7 48 14 5V PO 15 48 14 5V PO 3 47 13 D GND PO 11 47 13 D GND PFI 11 P2 3 46 12 D GND P0 27 46 12 D GND PFI 10 P2 2 45 11 PFI 0 P1 0 P0 26 45 11 P0 16 D GND 44 10 PFI 1 P1 1 D GND 44 10 P0 17 PFI 2 P1 2 43 9 D GND P0 18 43 9 D GND PFI 3 P1 3 42 8 5V P0 19 42 8 5V PFI 4 P1 4 41 7 D GND P0 20 41 7 D GND PFI 13 P2 5 40 6 PFI 5 P1 5 P0 29 40 6 P0 21 PFI 15 P2 7 39 5 PFI 6 P1 6 P0 31 39 5 P0 22 PFI 7 P1 7 38 4 D GND P0 23 38 4 D GND prigp2o 37 3 PFI 9 P2 1 P0 24 37 3 P0 25 D GND 36 2 PFI 12 P2 4 D GND 36 2 P0 28 D GND 35 1 PFI 14 P2 6 D GND 35 1 Po 30 J ee CONNECTOR 0 CONNECTOR 1 Al 0 15 Al 16 31 TERMINAL 34 TERMINAL 1 TERMINAL 34 TERMINAL 1 TERMINAL 68 TERMINAL 35 TERMINAL 68 35 Figure A 10 NI USB 6363 Mass Termination Pinout X Series User Manual A 18 ni com Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DA Qmx Help or the LabVIEW Help National Instruments A 19 X Series User Manual Appendix A Device Specific Information Figure A 11 shows the pinout of the NI USB 6353 6363 Screw Terminal For a detailed description of each signal r
120. O X Series devices 4 10 Simultaneous MIO X Series devices 4 44 edge counting 7 4 timing MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 order of channels for scanning MIO X Series devices 4 7 National Instruments Corporation 1 11 Index other software installing 1 1 output signal glitches B 3 minimizing 5 3 terminal routing analog comparison events 11 5 outputs using RTSI as 9 6 overview 2 1 P pause trigger 7 50 PCI Express disk drive power connector 3 4 period measurement 7 22 PFI 8 1 connecting input signals 8 4 exporting timing output signals using PFI terminals 8 3 filters 8 5 T O protection 8 7 programmable power up states 8 7 using terminals as static digital I Os 8 4 using terminals as timing input signals 8 2 PFI terminals as static digital I Os 8 4 pin assignments See pinouts pinouts counter default 7 47 device 1 8 NI PCIe PXIe 6341 A 5 NI PCIe PXIe 6361 A 12 NI PCIe PXIe 6363 A 16 NI PCIe 6320 A 2 NI PCIe 6321 A 5 NI PCIe 6323 6343 A 8 NI PCle 635 1 6361 A 12 A 13 A 14 A 18 A 24 NI PCIe 6353 6363 A 16 NI PXIe 6356 6366 A 22 NI PXIe 6358 6368 A 27 NI USB 6343 A 10 X Series User Manual Index NI USB 635 1 6361 A 13 A 14 A 18 A 24 NI USB 6353 6363 A 20 NI USB 6356 6366 A 25 RTSI connector 3 5 9 5 pins default 7 47 position measurement 7 23 buffered 7 25 power 5 V 3 3 connector PCI Express disk drive 3
121. PFI 8 P2 0 D GND D GND we 68 ow A 67 wo wo 66 wo N 65 wo a 64 wo 62 N 63 D 61 N NI 60 D O 59 D oa 57 D aS 58 N wo 56 N N 55 N a 54 D 53 52 51 50 49 48 47 46 45 44 43 42 41 39 ae 38 37 36 35 als el te wat ae eet ak FSINJOLRIAIMIN OOS Almlal KR alalN alo Seed NC No Connect Al 8 Al O Al 1 Al 1 Al GND Al 10 Al 2 Al 3 Al 3 Al GND Al 4 Al 4 Al GND Al 13 Al 5 Al 6 Al 6 Al GND Al 15 Al 7 AO 0 AO 1 NC P0 4 D GND PO 1 PO 6 D GND 5 V D GND D GND PFI 0 P1 0 REHVE D GND 5V D GND PFI 5 P1 5 PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 TERMINAL 68 TERMINAL 35 CONNECTOR 0 Al 0 15 TERMINAL 34 TERMINAL 1 Figure A 2 NI PCle 6321 and NI PCle PXle 6341 Pinout Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help X Series User Manual A 6 ni com
122. Q to 100 kQ is usually sufficient If you do not use the resistors and the source is truly floating the source is not likely to remain within the common mode signal range of the instrumentation amplifier so the instrumentation amplifier saturates causing erroneous readings You must reference the source to the respective channel ground National Instruments 4 49 X Series User Manual Chapter 4 Analog Input X Series User Manual DC Coupled You can connect low source impedance and high source impedance DC coupled sources e Low Source Impedance You must reference the source to AI GND The easiest way to make this reference is to connect the positive side of the signal to the positive input of the instrumentation amplifier and connect the negative side of the signal to AI GND as well as to the negative input of the instrumentation amplifier without using resistors This connection works well for DC coupled sources with low source impedance less than 100 Q e High Source Impedance For larger source impedances this connection leaves the DIFF signal path significantly off balance Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connected to ground Hence this noise appears as a DIFF mode signal instead of a common mode signal and the instrumentation amplifier does not reject it In this case instead of directly connecting the negative line to AI GND connect the n
123. Source When you use an analog trigger source the acquisition stops on the first rising edge of the Analog Comparison Event signal 4 60 ni com Chapter 4 Analog Input Routing Al Reference Trigger Signal to an Output Terminal You can route AI Reference Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt PXI_Trig lt 0 7 gt or PXIe DSTARC terminal All PFI terminals are configured as inputs by default Al Pause Trigger Signal Use the AI Pause Trigger ai PauseTrigger signal to pause and resume a measurement acquisition The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive You can program the active level of the pause trigger to be high or low as shown in Figure 4 33 In the figure T represents the period and A represents the unknown time between the clock pulse and the posttrigger Al Sample Clock Al Pause Trigger Al External Sample Clock Al Sample Clock Al Pause Trigger Halt Used on Internal Clock Free Running Used on External Clock National Instruments Figure 4 33 Halt Internal Clock and Free Running External Clock Using a Digital Source To use AI Pause Trigger specify a source and a polarity The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt
124. Timed Generations ss 6 14 Digital Output Trig ering seins mienne Mania tennis des 6 16 Digital Waveform Generation ss 6 16 DO Sample Clock Signal ss 6 17 Using an Internal Source 6 17 Using an External Source 6 17 Routing DO Sample Clock to an Output Terminal 6 18 Other Timing Requirements 6 18 DO Sample Clock Timebase Signal 6 18 DO Start Trigger Signal nie Recluse 6 19 Retriggerable DOs sic trie shaadi tintin tente 6 19 Using a Digital Source 6 20 Using an Analog Source ssndsn iiaia ii 6 20 Routing DO Start Trigger Signal to an Output Terminal 6 20 DO Pause Trigger Signal isinic irer sesestess davessceestes ut 6 21 Using a Digital Source ss 6 22 Using an Analog Source sis 6 22 Routing DO Pause Trigger Signal to an Output Terminal 6 22 WO ProteCtrm sss asset maintes nn he Goad tates tel nets 6 23 Programmable Power Up States 6 23 DI Change D tection nn then ner tite rater nu tstenute tte 6 24 DI Change Detection Applications 6 25 Digital Filtering ainun aasa a Aa e tentes NT AE 6 25 Watchdog TIMER misisse nen a EER EEE RS 6 28 Connecting Digital 1 O Signals ss 6 29 Getting Started with DIO Applications in Software 6 30 National Instruments xi X Series User Manual Contents Chapter 7 Counters Counter Timmins Engine sess das a e RE e cevssdsestbecseded 7 2 Counter Input Applications soi
125. a fast enough rate to keep up with the generation the buffer underflows and causes an error With FIFO regeneration the entire buffer is downloaded to the FIFO and regenerated from there Once the data is downloaded new data cannot be written to the FIFO To use FIFO regeneration the entire buffer must fit within the FIFO size The advantage of using FIFO regeneration is that it does not require communication with the main host memory once the operation is started thereby preventing any problems that may occur due to excessive bus traffic Use the NI DAQmx DO channel property UseOnlyOnBoardMemeory to enable or disable FIFO regeneration 6 15 X Series User Manual Chapter 6 Digital I O Digital Output Triggering Digital output supports two different triggering actions e Start trigger e Pause trigger An analog or digital trigger can initiate these actions All X Series devices support digital triggering but some do not support analog triggering To find your device s triggering options refer to the specifications document for your device Refer to the DO Start Trigger Signal and DO Pause Trigger Signal sections for more information about these triggering actions Digital Waveform Generation X Series User Manual You can generate digital waveforms on the Port 0 DIO lines The DO waveform generation FIFO stores the digital samples X Series devices have a DMA controller dedicated to moving data from the system memory
126. abVIEW Help NI 6321 6341 Specifications Refer to the NI 632x Specifications for more detailed information about the NI 6321 device Refer to the M 634x Specifications for more detailed information about the NI 6341 device NI 6321 6341 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information National Instruments A 7 X Series User Manual Appendix A Device Specific Information NI 6323 6343 The following sections contain information about the NI PCIe 6323 NI PCIe 6343 and NI USB 6343 devices NI 6323 6343 Pinout Figure A 4 shows the pinout of the NI PCIe 6323 6343 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 8 Al 0 1 Al 14 GND 10 Al 2 3 AI 3 GND 4 Al 4 GND 13 Al 5 6 Al 6 GND 15 Al 7 AO 0 AO 1 NC P0 4 e Pd PJ R A A D GND PO 1 P0 6 D GND 5V D GND D GND PFI 0 P1 0 PFI 1 P1 1 D GND 5 V D GND PEISIBARS PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 poe Al 0 Al 0 68 34 Al GND 67 33 Al 9 Al 1 66 32 Al 2 Al 2 65
127. aks backward through channel 1 If the output impedance of the source connected to channel is high enough the resulting reading of channel 1 can be partially affected by the voltage on channel 0 This effect is referred to as ghosting If your source impedance is high you can decrease the scan rate to allow the NI PGIA more time to settle Another option is to use a voltage follower circuit external to your DAQ device to decrease the impedance seen by the DAQ device Refer to the KnowledgeBase document Decreasing the Source Impedance of an Analog Input Signal by going to ni com info and entering the Info Code rdbbis 2 Use Short High Quality Cabling Using short high quality cables can minimize several effects that degrade accuracy including crosstalk transmission line effects and noise The capacitance of the cable also can increase the settling time National Instruments recommends using individually shielded twisted pair wires that are 2 m or less to connect AI signals to the device Refer to the Connecting Analog Input Signals section for more information 3 Carefully Choose the Channel Scanning Order e Avoid Switching from a Large to a Small Input Range Switching from a channel with a large input range to a channel with a small input range can greatly increase the settling time National Instruments 4 7 X Series User Manual Chapter 4 Analog Input X Series User Manual Suppose a 4 V signal is connected to channe
128. al 7 47 G generations analog output data 5 3 buffered hardware timed 5 4 6 15 clock 9 1 continuous pulse train 7 34 digital waveform 6 16 frequency 7 38 hardware timed 5 3 6 14 hardware timed single point 5 3 6 4 6 14 pulse for ETS 7 40 pulse train 7 31 retriggerable single pulse 7 33 simple pulse 7 30 X Series User Manual 1 8 single pulse 7 30 single pulse with start trigger 7 31 software timed 5 3 6 14 getting started 1 1 AI applications in software MIO X Series devices 4 40 AO applications in software 5 13 DIO applications in software 6 30 ghost voltages when sampling multiple channels B 1 Ground 4 47 ground reference connections checking B 1 settings analog input MIO X Series devices 4 4 MIO X Series devices 4 2 4 4 ground referenced signal sources connecting MIO X Series devices 4 20 description MIO X Series devices 4 20 using in differential mode MIO X Series devices 4 22 using in NRSE mode MIO X Series devices 4 23 when to use in differential mode MIO X Series devices 4 20 when to use in NRSE mode MIO X Series devices 4 21 when to use in RSE mode MIO X Series devices 4 21 H hardware 2 1 hardware installation 1 1 ni com hardware timed acquisitions MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 generations 5 3 6 14 hardware timed single point acquisitions MIO X Series devices 4 11 hardware timed generations 5 3 6 4 6 14 hel
129. al Sources Do not use RSE connections with ground referenced signal sources Use NRSE or DIFF connections instead As shown in the bottom rightmost cell of Table 4 3 there can be a potential difference between AI GND and the ground of the sensor In RSE mode this ground loop causes measurement errors 4 21 X Series User Manual Chapter 4 Analog Input Using Differential Connections for Ground Referenced Signal Sources Figure 4 10 shows how to connect a ground referenced signal source to the MIO X Series device configured in differential mode 1 0 Connector Al OO So Ground A Referenced y u Instrumentation h s ols 2 Amplifier Al l 5 Measured m Voltage Common o oo z Mode V o oo Noise and om i Ground Potential 77 X ve Input Multiplexers oe Al SENSE Al GND MIO X Series Device Configured in Differential Mode Figure 4 10 Differential Connections for Ground Referenced Signal Sources With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground shown as Vem in the figure AI and AI must both remain within 11 V of AI GND X Series User Manual 4 22 ni com National Instruments Chapter 4 Analog Input Using Non Referenced Single Ended NRSE Connections for Ground
130. al trade compliance policy and how to obtain relevant HTS codes ECCNs and other import export data WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED SYSTEM FAILURES ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE RISK OF BODILY INJURY AND DEATH SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH
131. also can be used for other functions such as the AO External Reference input as described in the AO Reference Selection section of Chapter 5 Analog Output Analog Input Channels Refer to the Analog Input Channels on MIO X Series Devices or Analog Input Channels on Simultaneous MIO X Series Devices section depending on your device National Instruments 11 3 X Series User Manual Chapter 11 Triggering Analog Input Channels on MIO X Series Devices Select any analog input channel to drive the NI PGIA The NI PGIA amplifies the signal as determined by the input ground reference setting and the input range The output of the NI PGIA then drives the analog trigger detection circuit By using the NI PGIA you can trigger on very small voltage changes in the input signal When the DAQ device is waiting for an analog trigger with a AI channel as the source the AI muxes should not route different AI channels to the NI PGIA If a different channel is routed to the NI PGIA the trigger condition on the desired channel could be missed The other channels also could generate false triggers This behavior places some restrictions on using AI channels as trigger sources When you use an analog start trigger the trigger channel must be the first channel in the channel list When you use an analog reference or pause trigger and the analog channel is the source of the trigger there can be only one channel in the channel list Analog Input Chann
132. an acquire data on the device from a single channel and still achieve accurate results The maximum aggregate sample rate is the fastest you can acquire on multiple channels and still achieve accurate results For example NI 6351 devices have a single channel maximum rate of 1 25 MS s and aggregate maximum sample rate of 1 MS s so they can sample one channel at 1 25 MS s or two channels at 500 kS s per channel as shown in Table 4 4 Table 4 4 Analog Input Rates for MIO X Series Devices Analog Input Rate Multi Channel MIO X Series Device Single Channel Aggregate NI 632x 250 kS s 250 kS s NI 634x 500 kS s 500 kS s 4 27 X Series User Manual Chapter 4 Analog Input X Series User Manual Table 4 4 Analog Input Rates for MIO X Series Devices Continued Analog Input Rate Multi Channel MIO X Series Device Single Channel Aggregate NI 6351 6353 1 25 MS s 1 MS s NI 6361 6363 2 MS s 1 MS s On NI 6351 6353 636 1 6363 devices the single channel rate is higher than the aggregate rate because while the ADC can sample at that rate the PGIA cannot settle fast enough to meet accuracy specifications Note Refer to Table 4 7 for Simultaneous MIO X Series device analog input rates Al Sample Clock Signal Use the AI Sample Clock ai SampleClock signal to initiate a set of measurements Your MIO X Series device samples the AI signals of every channel in the task once for ev
133. asurement Method Comparison Measures High Measures Low Number of Number of Frequency Frequency Counters Measurements Signals Signals Method Used Returned Accurately Accurately Low frequency with 1 1 Poor Good one counter High frequency with lor2 1 Good Poor two counters Large range of 2 1 Good Good frequencies with two counters Sample clocked 1 1 Good Good averaged For information about connecting counter signals refer to the Default Counter Timer Pinouts section Period Measurement In period measurements the counter measures a period on its Gate input signal after the counter is armed You can configure the counter to measure the period between two rising edges or two falling edges of the Gate input signal You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges occurring on the Source input between the two active edges of the Gate signal X Series User Manual 7 22 ni com Chapter 7 Counters You can calculate the period of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter Period measurements return the inverse results of frequency measurements Refer to the Frequency Measurement section for more information Position Measurement National Instruments You can use the counters to perform position me
134. asurements with quadrature encoders or two pulse encoders You can measure angular position with X1 X2 and X4 angular encoders Linear position can be measured with two pulse encoders You can choose to do either a single point on demand position measurement or a buffered sample clock position measurement You must arm a counter to begin position measurements Refer to the following sections for more information about the X Series position measurement options e Measurements Using Quadrature Encoders e Measurements Using Two Pulse Encoders e Buffered Sample Clock Position Measurement Measurements Using Quadrature Encoders The counters can perform measurements of quadrature encoders that use X1 X2 or X4 encoding A quadrature encoder can have up to three channels channels A B and Z e X1 Encoding When channel A leads channel B in a quadrature cycle the counter increments When channel B leads channel A in a quadrature cycle the counter decrements The amount of increments and decrements per cycle depends on the type of encoding X1 X2 or X4 Figure 7 18 shows a quadrature cycle and the resulting increments and decrements for X1 encoding When channel A leads channel B the increment occurs on the rising edge of channel A When channel B leads channel A the decrement occurs on the falling edge of channel A ChA ChB eoe gt lt O gt
135. asures multiple intervals The counter counts the number of rising or falling edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal The counter then stores the count in the FIFO On the next active edge of the Gate signal the counter begins another measurement A DMA controller transfers the stored values to host memory Figure 7 25 shows an example of an implicit buffered two signal edge separation measurement AUX A A GATE E S k_ source _MMNNNNNNNNNN Counter Value 1 2 3 1 2 3 1 2 3 3 LE 3 3 Buffer 3 Figure 7 25 Implicit Buffered Two Signal Edge Separation Measurement Sample Clocked Buffered Two Signal Separation Measurement A sample clocked buffered two signal separation measurement is similar to single two signal separation measurement but buffered two signal separation measurement takes measurements over multiple intervals correlated to a sample clock The counter counts the number of rising or falling edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal The counter then stores the count in the FIFO on a sample clock edge On the next active edge of the Gate signal the counter begins another measurement A DMA controller transfers the stored values to host memory 7 28 ni com
136. at there is some gain error from loading down the source as shown in Figure 4 7 National Instruments 4 17 X Series User Manual Chapter 4 Analog Input X Series User Manual AC Coupling MIO X Series Device rH Al AC Coupled Floating V Signal s Source Al o Al SENSE Al GND Figure 4 7 Differential Connections for AC Coupled Floating Sources with Balanced Bias Resistors Using Non Referenced Single Ended NRSE Connections for Floating Signal Sources It is important to connect the negative lead of a floating signals source to AI GND either directly or through a resistor Otherwise the source may float out of the valid input range of the NI PGIA and the DAQ device returns erroneous data Figure 4 8 shows a floating source connected to the DAQ device in NRSE mode MIO X Series Device Al Floating Signal o Source Al SENSE R Al GND Figure 4 8 NRSE Connections for Floating Signal Sources All of the bias resistor configurations discussed in the Using Differential Connections for Floating Signal Sources section apply to the NRSE bias resistors as well Replace AI with AI SENSE in Figures 4 4 4 5 4 6 and 4 7 for configurations with zero to two bias resistors The noise rejection of NRSE mode is better than RSE mode because the AI SENSE 4 18 ni com Chapter 4 Analog Input connection is made remotely near the so
137. ata Acquisition Methods 6 2 Software Timed Acquisitions ss 6 2 Hardware Timed Acquisitions 6 3 Digital Input Trigs Cf g 2eme ne M tua e 6 4 Digital Waveform Acquisition ss 6 5 DI Sample Clock Signal ss mans ede eeeeevtees eiai 6 6 Using an Internal Source wo eee eee cece ceeeeeeeeeteeeeseeseeeseeseeeaeeseees 6 6 Using an External Source sereisas eue raes EEEE REES 6 6 Routing DI Sample Clock to an Output Terminal 6 7 Other Timing Requirements 6 7 DI Sample Clock Timebase Signal 6 7 X Series User Manual X ni com Contents DI Start Trigger Signal wkd escevseests eeii a cate at 6 8 Retriggerable DL intense eoa saben fist 6 8 Using a Digital Source ss 6 9 Using an Analog Source 4 6 10 Routing DI Start Trigger to an Output Terminal 0 0 6 10 DI Reference Trigger Signal is scscccs secsecbesdenedcobeasseescovessacensastecacescasacossescanvecde 6 10 Using a Digital Source ss 6 11 Using an Analog Source 4 4 4 6 12 Routing DI Reference Trigger Signal to an Output Terminal 6 12 DI Pause Trigger Signal 2545 ssitentiite ses aline ie 6 12 Using a Digital Source ssrin oisein 6 13 Using an Analog Source ss 6 13 Routing DI Pause Trigger Signal to an Output Terminal 0 6 13 Digital Output Data Generation Methods 6 14 Software Timed Generations 6 14 Hardware
138. ation A 14 NI USB 6366 Mass Termination A 24 RTSI 3 5 considerations for field wiring MIO X Series devices 4 24 Simultaneous MIO X Series devices 4 51 for multichannel scanning MIO X Series devices 4 6 for PXI Express 10 3 continuous pulse train generation 7 34 controller DMA 10 1 controlling counting direction 7 3 conventions used in the manual xvii counter input and output 7 47 output applications 7 30 terminals default 7 47 Counter n A signal 7 44 Counter n Aux signal 7 43 Counter n B signal 7 44 Counter n Gate signal 7 43 Counter n HW Arm signal 7 45 National Instruments Corporation l 5 Index Counter n Internal Output signal 7 47 Counter n Sample Clock signal 7 45 Counter n Source signal 7 41 Counter n TC signal 7 47 Counter n Up_Down signal 7 44 Counter n Z signal 7 44 counter signals Counter n A 7 44 Counter n Aux 7 43 Counter n B 7 44 Counter n Gate 7 43 Counter n HW Arm 7 45 Counter n Internal Output 7 47 Counter n Source 7 41 Counter n TC 7 47 Counter n Up_Down 7 44 FREQ OUT 7 47 Frequency Output 7 47 counters 7 1 cascading 7 51 connecting terminals 7 47 edge counting 7 3 generation 7 30 input applications 7 3 other features 7 51 output applications 7 30 prescaling 7 51 pulse train generation 7 31 retriggerable single pulse generation 7 33 simple pulse generation 7 30 single pulse generation 7 30 single pulse generation with start t
139. between two terminals rather than the difference between one terminal and ground Often associated with balanced input circuitry but also may be used with an unbalanced source The capability of an instrument to generate and acquire digital signals Static digital I O refers to signals where the values are set and held or rarely change Dynamic digital I O refers to digital systems where the signals are continuously changing often at multi MHz clock rates A TTL level signal having two discrete levels A high and a low level Direct Memory Access A method by which data can be transferred to from computer memory from to a device or memory on the bus while the processor does something else DMA is the fastest method of transferring data to from computer memory Performs the transfers between memory and I O devices independently of the CPU Software unique to the device or type of device and includes the set of commands the device accepts A technique that locates an edge of an analog signal such as the edge of a square wave Electrically Erasable Programmable Read Only Memory ROM that can be erased with an electrical signal and reprogrammed Some SCXI modules contain an EEPROM to store measurement correction coefficients G 6 ni com encoder external trigger FIFO filter floating floating signal sources National Instruments Glossary A device that converts linear or rotary displacement into digital o
140. buses Refer to the documentation for your chassis for details PXI_STAR Trigger In a PXI Express system the Star Trigger bus implements a dedicated trigger line between the system timing slot and the other peripheral slots The Star Trigger can be used to synchronize multiple devices or to share a common trigger signal among devices A Star Trigger controller can be installed in this system timing slot to provide trigger signals to other peripheral modules Systems that do not require this functionality can install any standard peripheral module in this system timing slot An X Series device receives the Star Trigger signal PXI_STAR from a Star Trigger controller PXI_STAR can be used as an external source for many AI AO and counter signals An X Series device is not a Star Trigger controller An X Series device can be used in the system timing slot of a PXI system but the system will not be able to use the Star Trigger feature PXI_STAR Filters You can enable a programmable debouncing filter on each PFI RTSI PXIe DSTAR or PXI_STAR signal Refer to the PFI Filters section of Chapter 8 PFI for more information PXle DSTAR lt A C gt PXI Express devices can provide high quality and high frequency point to point connections between each slot and a system timing slot These connections come in the form of three low voltage differential star triggers that create point to point high frequency connections between a PXI Expres
141. cause data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode acquisition refers to the acquisition of a specific predetermined number of data samples Once the specified number of samples has been read in the acquisition stops If you use a reference trigger you must use finite sample mode Continuous acquisition refers to the acquisition of an unspecified number of samples Instead of acquiring a set number of data samples and stopping a continuous acquisition continues until you stop the operation Continuous acquisition is also referred to as double buffered or circular buffered acquisition 4 10 ni com Chapter 4 Analog Input If data cannot be transferred across the bus fast enough the FIFO becomes full New acquisitions overwrite data in the FIFO before it can be transferred to host memory The device generates an error in this case With continuous operations if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer the buffer could reach an overflow condition causing an error to be generated e Hardware timed single point HWTSP Typically HWTSP operations are used to read single samples at known time intervals While buffered operations are optimized for high throughput HWTSP operations are optimized for low latency and low ji
142. ce in ground potential between two instruments connected to the same building power system is typically between mV and 100 mV but the difference can be much higher if power distribution circuits are improperly connected If a grounded signal source is incorrectly measured this difference can appear as measurement error Follow the connection instructions for grounded signal sources to eliminate this ground potential difference from the measured signal Isolated devices have isolated front ends that are isolated from ground reference signal sources and are not connected to building system grounds Isolated devices require the user to provide a ground reference terminal to which its input signals are referenced National Instruments 4 47 X Series User Manual Chapter 4 Analog Input Differential Connections for Ground Referenced Signal Sources Figure 4 26 shows how to connect a ground referenced signal source to a channel on an Simultaneous MIO X Series device Simultaneous X Series Device AlO Instrumentation Amplifier Ground Referenced Vs Signal t Source i AIO Measured m Voltage Common r Mode Noise V and Ground Potential TT R AIO GND 1 0 Connector V Al 0 Connections Shown X Series User Manual Figure 4 26 Differential Connection for Ground Referenced Signals on Simultaneous MIO X Series Devices With these types of connections the
143. ceessessssscscccccscecsccccecesessesesssesensneseessssessceseess 1 8 Chapter 2 DAQ System Overview DAQ Hard Ware AEA E EEEIEE ENEE EET 2 1 DAQ STE EET ETT 2 2 Calibration CITY oissescscaseesicdsceeisscassschesesuseeseees ca seziapes deveinedescasessioesdisands 2 3 Cables and Accessories PCI Express PXI Express and USB Mass Termination Device Cables and Accessorie Sian a e a u ari elia 2 3 SCXD ACCESSOIRES anti r a alone S 2 4 SCC ACCESSOTIES Lis ra a ar let ar raS 2 5 BNC ACCESSOTIES 3h sists codsoceads cacsscedsedecessessuctess covssencdeueeuensescausvercetes 2 5 Screw Terminal Accessories 2 6 REST Cables ess nanm isteea Rene a a a 2 6 Cables ssh rnstne AE en eee 2 6 Custom Cabling and Connectivity ss 2 7 USB Device Mounting Accessories USB Cable Power Supply and Ferrite ee nn ti ar a 2 7 USB Screw Terminal Device Accessories ccccccssssccceeesssseecceeessseeeeeseesaee 2 8 National Instruments vij X Series User Manual Contents Signal Conditoris nnn eiseni area EE des enads evgesevececebee weds A a 2 8 Sensors and Transducer isen irr aieri aa E E E E 2 8 Signal Conditioning Options 2 9 SOX ue nn dad n e TT on TER a 2 9 SOC nn in nn RU T nae al a ten te ent 2 9 Programming Devices in Software 2 10 Chapter 3 Connector and LED Information T O Connector Signal Descriptions 3 1 5 V POWEr SOUrCe sri rire sr nent dm M ren nier Mate enr ie aie 3 3 PCI Express Device Disk Drive Power Conne
144. cerning PXI star signal specifications and capabilities read the PXI Specification located at www pxisa org specifications An encoding technique for a rotating device where two tracks of information are placed on the device with the signals on the tracks offset by 90 from each other This makes it possible to detect the direction of the motion G 12 ni com range real time RSE RTSI bus SCC SCXI sensor National Instruments Glossary The maximum and minimum parameters between which a sensor instrument or device operates with a specified set of characteristics This may be a voltage range or a frequency range 1 Displays as it comes in no delays 2 A property of an event or system in which data is processed and acted upon as it is acquired instead of being accumulated and processed at a later time 3 Pertaining to the performance of a computation during the actual time that the related physical process transpires so results of the computation can be used in guiding the physical process Referenced Single Ended configuration AIl measurements are made with respect to a common reference measurement system or a ground Also called a grounded measurement system Real Time System Integration bus The National Instruments timing bus that connects DAQ devices directly by means of connectors on top of the devices for precise synchronization of functions Seconds Samples Signal Conditioning Carriers
145. ch you can use with National Instruments data acquisition devices to develop instrumentation acquisition and control applications Select Start All Programs National Instruments NI DAQ Text Based Code Support NI DAQm x C Reference Help NET Languages without NI Application Software X Series User Manual With the Microsoft NET Framework version 1 1 or later you can use NI DAQmx to create applications using Visual C and Visual Basic NET without Measurement Studio You need Microsoft Visual Studio NET 2003 or later for the API documentation to be installed The installed documentation contains the NI DAQmx API overview measurement tasks and concepts and function reference This help is fully integrated into the Visual Studio documentation To view the NI DAQmx NET documentation go to Start All Programs National Instruments NI DAQ Text Based Code Support NI DAQmx NET Help For function reference refer to the NationalInstruments DAQmx Namespace and NationalInstruments DAQmx ComponentModel Namespace topics For conceptual help refer to the Using the Measurement Studio NI DAQmx XX ni com About This Manual NET Library and Developing with Measurement Studio NI DAQmx sections To get to the same help topics from within Visual Studio go to Help Contents and select Measurement Studio from the Filtered By drop down list Device Documentation and Specifications The NI 632x Specifications contains all specifications
146. concepts and device considerations The Data Acquisition book of the LabWindows CVI Help contains Taking an NI DAQmx Measurement in LabWindows CVI which includes step by step instructions about creating a measurement task using the DAQ Assistant In LabWindows CVI select Help Contents then select Using LabWindows CVI Data Acquisition This book also contains information about accessing detailed information through the NJ DAQmx Help The NI DAQmx Library book of the LabWindows CVI Help contains API overviews and function reference for NI DAQmx Select Library Reference NI DAQmx Library in the LabWindows CVI Help Measurement Studio National Instruments If you program your NI DAQmx supported device in Measurement Studio using Visual C Visual C or Visual Basic NET you can interactively create channels and tasks by launching the DAQ Assistant from MAX or from within Visual Studio You can use Measurement Studio to generate the configuration code based on your task or channel Refer to the DAQ Assistant Help for additional information about generating code The NI Measurement Studio Help is fully integrated with the Microsoft Visual Studio help To view this help file in Visual Studio select Measurement Studio NI Measurement Studio Help For information related to developing with NI DAQmx refer to the following topics within the NI Measurement Studio Help e For step by step instructions on how to create an NI DAQmx
147. counter is armed A semi period is the time between any two consecutive edges on the Gate input You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges occurring on the Source input between two edges of the Gate signal You can calculate the semi period of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter Refer to the following sections for more information about X Series semi period measurement options e Single Semi Period Measurement e Implicit Buffered Semi Period Measurement Refer to the Pulse versus Semi Period Measurements section for information about the differences between semi period measurement and pulse measurement Single Semi Period Measurement Single semi period measurement is equivalent to single pulse width measurement Implicit Buffered Semi Period Measurement In implicit buffered semi period measurement on each edge of the Gate signal the counter stores the count in the FIFO A DMA controller transfers the stored values to host memory The counter begins counting when it is armed The arm usually occurs between edges on the Gate input You can select whether to read the first active low or active high semi period using the CI SemiPeriod StartingEdge property in NI DAQmx 7 12 ni com Chapter 7 Counters Figure 7 11 shows a
148. ctor ss 3 4 When to Use the Disk Drive Power Connector cccccccccceeessseceeseesseeeeeees 3 4 Disk Drive Power Connector Installation 0 cccccccccesssccceesssssceeeeeessseeeeeees 3 4 RTSI Connector Pinout iii 3 5 USB Device LED Patterns yenne aa ocre nf dites ds due ant ted sate 3 5 Chapter 4 Analog Input Analog Input on MIO X Series Devices 4 1 Analog Input Ranges cesen eeoa E rennes TI E T 4 2 Working Volt ge Range shine E E EEEE ns rent 4 4 Analog Input Ground Reference Settings 4 4 Configuring AI Ground Reference Settings in Software 0 4 6 Multichannel Scanning Considerations 4 6 Analog Input Data Acquisition Methods 0 eee eeseeseeesecseceseeneenseeneenaes 4 9 Software Timed Acquisitions 4 10 Hardware Timed Acquisitions ceceeeseeseeseeeeceseceeeeseeseeeseeseees 4 10 Analog Input Triggering ss 4 11 Connecting Analog Input Signals ss 4 11 Connecting Floating Signal Sources 4 13 What Are Floating Signal Sources 4 13 When to Use Differential Connections with Floating Signal SourceS A sr metre nn ne tn Ro nt ee 4 13 When to Use Non Referenced Single Ended NRSE Connections with Floating Signal Sources s es 4 13 When to Use Referenced Single Ended RSE Connections with Floating Signal Sources eee cece eseeeesseeeseeseeeseeeeseeeneees 4 14 Using Differential Connections for Floating Signal Sources 4 15
149. curacy of your measurements In multichannel scanning applications accuracy is affected by settling time When your MIO X Series device switches from one AI channel to another AI channel the device configures the NI PGIA with the input range of the new channel The NI PGIA then amplifies the input signal with the gain for the new input range Settling time refers to the time it takes the 4 6 ni com Chapter 4 Analog Input NI PGIA to amplify the input signal to the desired accuracy before it is sampled by the ADC The specifications document for your DAQ device lists its settling time MIO X Series devices are designed to have fast settling times However several factors can increase the settling time which decreases the accuracy of your measurements To ensure fast settling times you should do the following in order of importance 1 Use Low Impedance Sources To ensure fast settling times your signal sources should have an impedance of lt 1 KQ Large source impedances increase the settling time of the NI PGIA and so decrease the accuracy at fast scanning rates Settling times increase when scanning high impedance signals due to a phenomenon called charge injection Multiplexers contain switches usually made of switched capacitors When one of the channels for example channel 0 is selected in a multiplexer those capacitors accumulate charge When the next channel for example channel 1 is selected the accumulated charge le
150. d Counter n Source Application Purpose of Source Terminal Pulse Generation Counter Timebase One Counter Time Measurements Counter Timebase Two Counter Time Measurements Input Terminal Non Buffered Edge Counting Input Terminal Buffered Edge Counting Input Terminal Two Edge Separation Counter Timebase Routing a Signal to Counter n Source Each counter has independent input selectors for the Counter n Source signal Any of the following signals can be routed to the Counter n Source input e 100 MHz Timebase e 20 MHz Timebase e 100 kHz Timebase e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXICLKI10 e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event e Change Detection Event In addition TC or Gate from a counter can be routed to a different counter source Some of these options may not be available in some driver software Routing Counter n Source to an Output Terminal You can route Counter n Source out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal All PFIs are set to high impedance at startup 7 42 ni com Chapter 7 Counters Counter n Gate Signal The Counter n Gate signal can perform many different operations depending on the application including starting and stopping the counter and saving the counter contents Routing a Signal to Counter n Gate Each counter has independent input selectors for the Counter n Gate signal Any of the following signa
151. d divider suppose the divider is set to D In this case Frequency Output is low for D 1 2 cycles and high for D 1 2 cycles of the Frequency Output Timebase Figure 7 37 shows the output waveform of the frequency generator when the divider is set to 5 Figure 7 37 Frequency Generator Output Waveform Frequency Output can be routed out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal All PFI terminals are set to high impedance at startup The FREQ OUT signal also can be routed to many internal timing signals In software program the frequency generator as you would program one of the counters for pulse train generation For information about connecting counter signals refer to the Default Counter Timer Pinouts section Frequency Division National Instruments The counters can generate a signal with a frequency that is a fraction of an input signal This function is equivalent to continuous pulse train generation Refer to the Continuous Pulse Train Generation section for detailed information For information about connecting counter signals refer to the Default Counter Timer Pinouts section 7 39 X Series User Manual Chapter 7 Counters Pulse Generation for ETS In the equivalent time sampling ETS application the counter produces a pulse on the output a specified delay after an active edge on Gate After each active edge on Gate the counter cumulatively increments the de
152. dance inputs by default The DAQ device does not drive the signal high or low Each line has a weak pull down resistor connected to it as described in the specifications document for your device NI DAQmx supports programmable power up states for PFI and DIO lines Software can program any value at power up to the PO P1 or P2 lines The PFI and DIO lines can be set as e A high impedance input with a weak pull down resistor default e An output driving a 0 e An output driving a 1 Refer to the NI DAQmx Help or the LabVIEW Help for more information about setting power up states in NI DAQmx or MAX ay Note When using your X Series device to control an SCXI chassis DIO lines 0 1 2 and 4 are used as communication lines and must be left to power up in the default high impedance state to avoid potential damage to these signals National Instruments 8 7 X Series User Manual Digital Routing and Clock Generation The digital routing circuitry has the following main functions e Manages the flow of data between the bus interface and the acquisition generation sub systems analog input analog output digital I O and the counters The digital routing circuitry uses FIFOs if present in each sub system to ensure efficient data movement e Routes timing and control signals The acquisition generation sub systems use these signals to manage acquisitions and generations These signals can come from the following sources You
153. de to an existing application To locate LabVIEW LabWindows CVI Measurement Studio Visual Basic and ANSI C examples refer to the KnowledgeBase document Where Can I Find NI DAQmx Examples by going to ni com info and entering the Info Code daqmxexp For additional examples refer to zone ni com 4 40 ni com Chapter 4 Analog Input Analog Input on Simultaneous MIO X Series Devices Figure 4 25 shows the analog input circuitry of the Simultaneous MIO X Series devices NI PGIA ADC S 3 e AI FIFO 5 AI Data 5 OQ ADC Analog Input Timing Signals Figure 4 25 Simultaneous MIO X Series Analog Input Circuitry On Simultaneous MIO X Series devices each channel uses its own instrumentation amplifier FIFO multiplexer mux and A D converter ADC to achieve simultaneous data acquisition The main blocks featured in the Simultaneous MIO X Series device analog input circuitry are as follows e T O Connector You can connect analog input signals to the Simultaneous MIO X Series device through the I O connector Refer to Appendix A Device Specific Information for device I O connector pinouts e Instrumentation Amplifier NI PGIA The NI programmable gain instrumentation amplifier NI PGIA can amplify or attenuate an AI signal to ensure that you get the maximum resolution of the ADC The NI PGIA also allows you to select
154. devices 4 10 Simultaneous MIO X Series devices 4 44 on demand MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 software timed MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 AI Convert Clock signal 4 31 AI Convert Clock Timebase signal 4 34 AI FIFO MIO X Series devices 4 2 Simultaneous MIO X Series devices 4 42 AI Hold Complete Event signal MIO X Series devices 4 34 Simultaneous MIO X Series devices 4 57 AI Pause Trigger signal MIO X Series devices 4 38 Simultaneous MIO X Series devices 4 61 AI Reference Trigger signal MIO X Series devices 4 37 Simultaneous MIO X Series devices 4 59 AI Sample Clock signal MIO X Series devices 4 28 Simultaneous MIO X Series devices 4 54 AI Sample Clock Timebase signal MIO X Series devices 4 30 Simultaneous MIO X Series devices 4 56 X Series User Manual Index Al Start Trigger signal MIO X Series devices 4 35 Simultaneous MIO X Series devices 4 57 ai ConvertClock 4 31 ai ConvertClockTimebase 4 34 ai HoldCompleteEvent MIO X Series devices 4 34 Simultaneous MIO X Series devices 4 57 ai PauseTrigger MIO X Series devices 4 38 Simultaneous MIO X Series devices 4 61 ai ReferenceTrigger MIO X Series devices 4 37 Simultaneous MIO X Series devices 4 59 ai SampleClock MIO X Series devices 4 28 Simultaneous MIO X Series devices 4 54 ai SampleClockTimebase MIO X Series devices 4 30 Simultaneous MIO X Series devices 4 56 a
155. dix A Device Specific Information NI 6356 6366 The following sections contain information about the NI PXIe 6356 NI USB 6356 Screw Terminal NI PXIe 6366 NI USB 6366 Mass Termination and NI USB 6366 Screw Terminal devices NI 6356 6366 Pinout Figure A 12 shows the pinout of the NI PXIe 6356 6366 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information Al 0 34 Al o AI 0 GND 33 AI 1 Al 1 32 AI 1 GND Al 2 31 Al2 Al 2 GND 30 Al 3 g Al 3 29 A13 GND KE NC 28 Al 4 g Al 4 27 Al4 GND 57 Al 5 26 Al 5 ss AI 5 GND 25 Al 6 Al 6 24 Al 6 GND Al 7 23 Al 7 TERMINAL 68 TERMINAL 34 Al 7 GND 22 AO0 AO GND 21 AO1 AO GND 20 APFIO D GND 19 Po 4 P0 0 18 D GND P0 5 17 Pot D GND 16 P0 6 P0 2 15 D GND PO 7 14 145v P0 3 13 D GND PFI 11 P2 3 12 PD GND TERMINAL 35 TERMINAL 1 PFI 10 P2 2 11 PFI 0 P1 0 D GND 10 PFI4 P1 1 PFI 2 P1 2 9 D GND PFI 3 P1 3 8 5V PFI 4 P1 4 7 DGND PFI 13 P2 5 6 PFI5 P1 5 PFI 15 P2 7 5 PFI6 P1 6 PFI 7 P1 7 4 D GND PFI 8 P2 0 3 PFI 9 P2 1 D GND 2 PFI 12 P2 4 D GND 1 PFI 14 P2 6 NC No Connect Figure A 12 NI PXle 6356 6366 Pinout X Series User Manual A 22 ni co
156. documentation xviii National Instruments Corporation 1 7 Index double buffered acquisition MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 45 drivers NI resources C 1 E edge counting 7 3 buffered 7 5 on demand 7 4 sample clock 7 5 single point 7 4 edge separation measurement buffered two signal 7 28 single two signal 7 27 encoders quadrature 7 23 encoding X1 7 23 X2 7 24 X4 7 24 equivalent time sampling 7 40 examples NI resources C 1 exporting timing output signals using PFI terminals 8 3 external reference clock 9 2 external source greater than 40 MHz 7 52 less than 40 MHz 7 53 F features counter 7 51 field wiring considerations MIO X Series devices 4 24 Simultaneous MIO X Series devices 4 51 FIFO Simultaneous MIO X Series devices 4 42 filters PFI 8 5 PXI_STAR 9 9 RTSI 9 7 X Series User Manual Index floating signal sources connecting MIO X Series devices 4 13 description MIO X Series devices 4 13 using in differential mode MIO X Series devices 4 15 using in NRSE mode MIO X Series devices 4 18 using in RSE mode MIO X Series devices 4 19 when to use in differential mode MIO X Series devices 4 13 when to use in NRSE mode MIO X Series devices 4 13 when to use in RSE mode MIO X Series devices 4 14 FREQ OUT signal 7 47 frequency division 7 39 generation 7 38 generator 7 38 measurement 7 13 Frequency Output sign
157. e NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or other materials belonging to others you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction Trademarks CVI LabVIEW National Instruments NI ni com the National Instruments corporate logo and the Eagle logo are trademarks of National Instruments Corporation Refer to the Trademark Information at ni com trademarks for other National Instruments trademarks The mark LabWindows is used under a license from Microsoft Corporation Windows is a registered trademark of Microsoft Corporation in the United States and other countries Other product and company names mentioned herein are trademarks or trade names of their respective companies Members of the National Instruments Alliance Partner Program are business entities independent from National Instruments and have no agency partnership or joint venture relationship with National Instruments Patents For patents covering National Instruments products technology refer to the appropriate location Help Patents in your software the patents txt file on your media or the National Instruments Patent Notice at ni com patents Export Compliance Information Refer to the Export Compliance Information at ni com 1legal export compliance for the National Instruments glob
158. e series combination sum of the two resistors If for example the source impedance is 2 kQ and each of the two resistors is 100 kQ the resistors load down the source with 200 kQ and produce a 1 gain error 4 16 ni com Chapter 4 Analog Input Al o oO Bias Resistors o Sc o see text R oe E pa A Instrumentation igna 7 Amplifier oe Source 7 7 e Xo Al t oo Measured m Voltage so Bias oar co Return Paths 24 al So Input Multiplexers oo NY Al SENSE Al GND 1 0 Connector MIO X Series Device Configured in Differential Mode Figure 4 6 Differential Connections for Floating Signal Sources with Balanced Bias Resistors Both inputs of the NI PGIA require a DC path to ground in order for the NI PGIA to work If the source is AC coupled capacitively coupled the NI PGIA needs a resistor between the positive input and AI GND If the source has low impedance choose a resistor that is large enough not to significantly load the source but small enough not to produce significant input offset voltage as a result of input bias current typically 100 kQ to 1 MQ In this case connect the negative input directly to AI GND If the source has high output impedance balance the signal path as previously described using the same value resistor on both the positive and negative inputs be aware th
159. e the first sample clock so that you generate the number of updates defined in the multipoint write National Instruments Finite Implicit Buffered Pulse Train Generation This function generates a predetermined number of pulses with variable idle and active times Each point you write generates a single pulse The number of pairs of idle and active times pulse specifications you write determines the number of pulses generated All points are generated back to back to create a user defined pulse train 7 35 X Series User Manual Chapter 7 Counters Table 7 6 and Figure 7 34 detail a finite implicit generation of three samples Table 7 6 Finite Implicit Buffered Pulse Train Generation Sample Idle Ticks Active Ticks 1 2 2 2 3 4 3 2 2 Counter Load Values 101021032101010 SOURCE LUN UUL OUT 2 2 3 4 2 2 Counter Armed Figure 7 34 Finite Implicit Buffered Pulse Train Generation Continuous Buffered Implicit Pulse Train Generation This function generates a continuous train of pulses with variable idle and active times Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation Each point you write generates a single pulse All points are generated back to back to create a user defined pu
160. e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock 5 10 ni com Chapter 5 Analog Output A programmable internal counter divides down the AO Sample Clock Timebase signal Several other internal signals can be routed to AO Sample Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an External Source Use one of the following external signals as the source of AO Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger Routing AO Sample Clock Signal to an Output Terminal You can route AO Sample Clock as an active low signal out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal Other Timing Requirements The AO timing engine on your device internally generates AO Sample Clock unless you select some external source AO Start Trigger starts the timing engine and either the software or hardware can stop it once a finite generation completes When using the AO timing engine you also can specify a configurable delay from AO Start Trigger to the first AO Sample Clock pulse By default this delay is two ticks of AO Sample Clock Timebase National Instruments 5 11 X Series User Manual Chapter 5 Analog Output Figure 5 7 shows the relationship of AO Sample Clock to AO Start Trigger AO Sample Cloc
161. e PDFs Refer to the Adobe Systems Incorporated Web site at www adobe com to download Acrobat Reader Refer to the National Instruments Product Manuals Library at ni com manuals for updated documentation resources X Series User Manual xxii ni com Getting Started Installation X Series devices feature up to 32 analog input AI channels up to four analog output AO channels up to 48 lines of digital input output DIO and four counters This chapter provides basic information you need to get started using your X Series device Unpacking Before installing your DAQ device you must install the software you plan to use with the device 1 Installing application software Refer to the installation instructions that accompany your software 2 Installing NI DAQmx The DAQ Getting Started guides packaged with NI DAQm x and also on ni com manual1s contain step by step instructions for installing software and hardware configuring channels and tasks and getting started developing an application 3 Installing the hardware Unpack your X Series device as described in the Unpacking section The DAQ Getting Started guides describe how to install PCI Express PXI Express and USB devices as well as accessories and cables The X Series device ships in an antistatic package to prevent electrostatic discharge ESD ESD can damage several components on the device A Caution Never touch the exposed pins of connectors
162. e aaa dE Low threshold First signal must go ya below low threshold Then signal must go above high threshold before F4 Analog Comparison Event asserts Level Level Hysteresis X Series User Manual Figure 11 6 Analog Edge Triggering with Hysteresis Rising Slope Example Analog Edge Trigger with Hysteresis Falling Slope When using hysteresis with a falling slope you specify a trigger level and amount of hysteresis The low threshold is the trigger level the high threshold is the trigger level plus the hysteresis For the trigger to assert the signal must first be above the high threshold then go below the low threshold The trigger stays asserted until the signal returns above the high threshold The output of the trigger detection circuitry is the internal Analog Comparison Event signal as shown in Figure 11 7 11 6 ni com Chapter 11 Triggering First signal must go above high threshold High threshold Level Hyst i Hysteresis Level Hysteresis lt Low threshold Level fal Then signal must go below low threshold before Analog Comparison Event asserts Analog Comparison Event Figure 11 7 Analog Edge Triggering with Hysteresis Falling Slope Example e Analog Window Triggering An analog window trigger occurs when an analog signal either passes into enters or passes out of leaves a window defined by two vo
163. e sources MIO X Series devices 4 7 Measurement Studio documentation xix measurements buffered two signal edge separation 7 28 choosing frequency 7 18 frequency 7 13 implicit buffered pulse width 7 7 implicit buffered semi period 7 12 X Series User Manual Index period 7 22 position 7 23 pulse width 7 6 semi period 7 12 single pulse width 7 6 single semi period 7 12 single two signal edge separation 7 27 two signal edge separation 7 26 using quadrature encoders 7 23 using two pulse encoders 7 25 measuring high frequency with two counters 7 14 large range of frequencies using two counters 7 15 low frequency 7 13 methods data transfer 10 1 10 2 minimizing glitches on the output signal 5 3 output signal glitches B 3 voltage step between adjacent channels MIO X Series devices 4 8 multichannel scanning considerations MIO X Series devices 4 6 multiple device synchronization 9 3 mux MIO X Series devices 4 2 National Instruments support and services C 1 NET languages documentation xx NI 6320 A 2 accessory options A 4 cabling options A 4 pinout A 2 specifications A 4 NI 6321 6341 A 5 accessory options A 7 cabling options A 7 PCI Express pinout A 5 X Series User Manual 1 10 PXI Express pinout A 5 specifications A 7 USB pinout A 7 NI 6323 6343 A 8 accessory options A 11 cabling options A 11 PCI Express pinout A 8 specifications A 11 USB pinout
164. ecifies pulse specifications that are updated with each sample clock When a sample clock occurs the current pulse finishes generation and the next pulse uses the next sample specifications Frequency Generation You can generate a frequency by using a counter in pulse train generation mode or by using the frequency generator circuit as described in the Using the Frequency Generator section Using the Frequency Generator The frequency generator can output a square wave at many different frequencies The frequency generator is independent of the four general purpose 32 bit counter timer modules on X Series devices Figure 7 36 shows a block diagram of the frequency generator Frequency Output 20 MHz Timebase 2 Timebase e Frequency Generator e FREQ OUT 100 kHz Timebase e ___J LT Divisor 1 16 Figure 7 36 Frequency Generator Block Diagram The frequency generator generates the Frequency Output signal The Frequency Output signal is the Frequency Output Timebase divided by a number you select from to 16 The Frequency Output Timebase can be X Series User Manual 7 38 ni com Frequency eee Oe eee eee eae FREQ OUT 4 Divisor 5 Chapter 7 Counters either the 20 MHz Timebase the 20 MHz Timebase divided by 2 or the 100 kHz Timebase The duty cycle of Frequency Output is 50 if the divider is either or an even number For an od
165. ecify the pulse width The delay and pulse width are measured in terms of a number of active edges of the Source input After the Start Trigger signal pulses once the counter ignores the Gate input Figure 7 28 shows a generation of a pulse with a pulse delay of four and a pulse width of three using the rising edge of Source GATE Start Trigger SOURCE l OUT E Figure 7 28 Single Pulse Generation with Start Trigger Pulse Train Generation National Instruments Refer to the following sections for more information about the X Series pulse train generation options e Finite Pulse Train Generation e Retriggerable Pulse or Pulse Train Generation e Continuous Pulse Train Generation e Finite Implicit Buffered Pulse Train Generation e Continuous Buffered Implicit Pulse Train Generation e Finite Buffered Sample Clocked Pulse Train Generation e Continuous Buffered Sample Clocked Pulse Train Generation 7 31 X Series User Manual Chapter 7 Counters Finite Pulse Train Generation This function generates a train of pulses with programmable frequency and duty cycle for a predetermined number of pulses With X Series counters the primary counter generates the specified pulse train and the embedded counter counts the pulses generated by the primary counter When the embedded counter reaches the specified tick count it generates a trigger
166. ed connections for floating signal sources MIO X Series devices 4 19 RSE configuration MIO X Series devices 4 19 software 1 1 AI applications Simultaneous MIO X Series devices 4 62 configuring AI ground reference settings MIO X Series devices 4 6 programming devices 2 10 software NI resources C 1 software timed acquisitions MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 generations 5 3 6 14 specifications device 1 8 NI 6320 A 4 NI 6321 6341 A 7 NI 6323 6343 A 11 NI 6351 6361 A 15 NI 6353 6363 A 21 NI 6356 6366 A 26 NI 6358 6368 A 28 stacking 1 5 start trigger 7 50 static DIO 6 3 using PFI terminals as 8 4 strain relief 1 7 support technical C 1 switching from a large to a small input range MIO X Series devices 4 7 ni com synchronization modes 100 MHz source 7 52 external source greater than 40 MHz 7 52 external source less than 40 MHz 7 53 internal source less than 40 MHz 7 53 synchronizing multiple devices 9 3 T technical support C 1 xxii terminal configuration analog input MIO X Series devices 4 1 Simultaneous MIO X Series devices 4 41 terminals connecting counter 7 47 NI DAQm x default counter 7 47 Timebase 100 kHz 9 2 100 MHz 9 2 20 MHz 9 2 timed acquisitions MIO X Series devices 4 9 Simultaneous MIO X Series devices 4 44 timing output signals exporting using PFI terminals 8 3 training xxi training and certification NI resources
167. edge or level sensitive 8 2 ni com Chapter 8 PFI Exporting Timing Output Signals Using PFI Terminals You can route any of the following timing signals to any PFI terminal configured as an output NI 632x 634x 6351 6353 6361 6363 Devices AI Convert Clock ai ConvertClock AI Hold Complete Event ai HoldCompleteEvent AI Reference Trigger ai ReferenceTrigger AI Sample Clock ai SampleClock AI Start Trigger ai StartTrigger AI Pause Trigger ai PauseTrigger AO Sample Clock ao SampleClock AO Start Trigger ao StartTrigger AO Pause Trigger ao PauseTrigger DI Sample Clock di SampleClock DI Start Trigger di StartTrigger DI Reference Trigger di ReferenceTrigger DI Pause Trigger di PauseTrigger DO Sample Clock do SampleClock DO Start Trigger do StartTrigger DO Pause Trigger do PauseTrigger Counter n Source Counter n Gate Counter n Internal Output Counter n Sample Clock Counter n Counter n HW Arm Frequency Output PXI_STAR RTSI lt 0 7 gt Analog Comparison Event Change Detection Event Watchdog timer expired pulse 3 Note Signals with an are inverted before being driven to a terminal that is these signals are active low National Instruments 8 3 X Series User Manual Chapter 8 PFI Using PFI Terminals as Static Digital I Os Each PFI can be individually configured as a static digital input or a static digital output When a terminal is used as a static digita
168. ee eee eee 7 47 Routing Counter n Internal Output to an Output Terminal 7 47 Frequency Output Signal 7 47 Routing Frequency Output to a Terminal 7 47 Default Counter Timer Pinouts ss 7 47 Counter Trig Sern gcse issi ss sssesecsssasessessestascgesssigedsscastecdesdeasanesdysceacadseadsassgsaapeocs E Saias 7 50 National Instruments xiii X Series User Manual Contents Oth r Counter Features ins nn Mn re Ant ich ge da ARO 7 51 Cascading Counters ciinii ikainiai a n e eassa ii raa 7 51 Pr scaling isi iste talent weg ates vidios A when ttes 7 51 Synchronization Modes s s 3 seeicsesesseascessecasescsageeubascaacacasascassecsseecadeseeuaecseaes 7 52 100 MHz Source Mode si n 33 sis 3 nine tent nie A Te 7 52 External Source Greater than 25 MHz 7 52 External or Internal Source Less than 25 MHZ ccccceceeseeeeeeees 7 53 Chapter 8 PFI Using PFI Terminals as Timing Input Signals 0 0 eee cc ceeeeceeeeeteeetseeeenseeaeees 8 2 Exporting Timing Output Signals Using PFI Terminals eee eee eeeeeeeereeeees 8 3 Using PFI Terminals as Static Digital I Os ccc ee eeseseeeseeseeeescesesseeeceseseeecsseneeaes 8 4 Using PFI Terminals to Digital Detection Events 8 4 Connecting PFI Input Signal snins hais nissan 8 4 PET Filters ins nn fet Sh tea sd ash Rae nt kala Ba E AE sedans te ann lun 8 5 VO Protection annere roetes aa apea TEE sn ia AN rl Rat 8 7 Programmable Power Up States 8 7 Chapter 9 Digital Rou
169. efault Other Timing Requirements Your DAQ device only acquires data during an acquisition The device ignores AI Sample Clock when a measurement acquisition is not in progress During a measurement acquisition you can cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal A counter timing engine on your device internally generates AI Sample Clock unless you select some external source AI Start Trigger starts this counter and either software or hardware can stop it once a finite acquisition completes When using the AI timing engine you also can specify a configurable delay from AI Start Trigger to the first AI Sample Clock pulse By default this delay is set to two ticks of the AI Sample Clock Timebase signal 4 55 X Series User Manual Chapter 4 Analog Input Figure 4 30 shows the relationship of AI Sample Clock to AI Start Trigger Al Sample Clock Timebase Al Start Trigger i Al Sample Clock Delay From Start Trigger Figure 4 30 Al Sample Clock and Al Start Trigger Al Sample Clock Timebase Signal You can route any of the following signals to be the AI Sample Clock Timebase ai SampleClockTimebase signal e 100 MHz Timebase default e 20 MHz Timebase e 100 kHz Timebase e PXI CLK10 e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger
170. efer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information AI 0 AI 0 AI 8 AI 0 Al GND Al 1 Al 1 AI 9 Al 1 Al GND Al 2 Al 2 Al 10 Al 2 Al GND AIS Al3 10 AI 11 AI 3 11 AIGND 12 AISENSE 13 AIGND 14 AO 0 15 AO GND 16 J O O1 R CO ND DODODODDOODODODDO P0 0 65 PO 1 66 PO 2 67 P0 3 68 P0 4 69 P0 5 70 P0 6 71 PO 7 72 PFI 0 P1 0 73 PFI 1 P1 1 74 PFI 2 P1 2 75 PFI 3 P1 3 76 PFI 4 P1 4 77 PFI5 P1 5 78 PFI6 P1 6 79 PFI 7 P1 7 80 DODDODODOODDODODOO DODOOODODDDDODOODO DODODODOODDODDODO AI 4 AI 4 Al 12 AI 4 AI GND AI 5 Al 5 AI 13 Al 5 Al GND Al 6 AI 6 Al 14 Al 6 Al GND Al7 Al 7 Al 15 Al 7 Al GND APFI O AI GND AO 1 AO GND Al 16 Al 16 33 Al 24 Al 16 34 Al GND 35 Al 17 Al 17 36 Al 25 Al 17 37 Al GND 38 Al 18 Al 18 39 Al 26 Al 18 40 Al GND 41 Al 19 Al 19 42 Al 27 Al 19 43 Al GND 44 AISENSE2 45 Al GND 46 AO 2 47 AO GND 48 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND PFI 14 P2 6 D GND PFI 15 P2 7 5V DODODODDOODODODOO DDODDODODDODDOODOO
171. eferenced to ground as it is in the RSE ground reference setting this difference in ground potentials would appear as an error in the measured voltage 4 23 X Series User Manual Chapter 4 Analog Input Using the DAQ Assistant you can configure the channels for RSE or NRSE input modes Refer to the Configuring AI Ground Reference Settings in Software section for more information about the DAQ Assistant Field Wiring Considerations Environmental noise can seriously affect the measurement accuracy of the device if you do not take proper care when running signal wires between signal sources and the device The following recommendations apply mainly to AI signal routing to the device although they also apply to signal routing in general Minimize noise pickup and maximize measurement accuracy by taking the following precautions e Use differential analog input connections to reject common mode noise e Use individually shielded twisted pair wires to connect AI signals to the device With this type of wire the signals attached to the positive and negative input channels are twisted together and then covered with a shield You then connect this shield only at one point to the signal source ground This kind of connection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference Refer to the NI Developer Zone document Field Wiring and Noise Considerations for Analog Signals for m
172. egative line to AI GND through a resistor that is about 100 times the equivalent source impedance The resistor puts the signal path nearly in balance so that about the same amount of noise couples onto both connections yielding better rejection of electrostatically coupled noise This configuration does not load down the source other than the very high input impedance of the instrumentation amplifier You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND This fully balanced configuration offers slightly better noise rejection but has the disadvantage of loading the source down with the series combination sum of the two resistors If for example the source impedance is 2 kQ and each of the two resistors is 100 kQ the resistors load down the source with 200 KQ and produce a 1 gain error AC Coupled Both inputs of the instrumentation amplifier require a DC path to ground in order for the instrumentation amplifier to work If the source is AC coupled capacitively coupled the instrumentation amplifier needs a resistor between the positive input and AI GND If the source has low impedance choose a resistor that is large enough not to significantly load the source but small enough not to produce significant input offset voltage as a result of input bias current typically 100 kQ to 1 MQ In this case connect the negative input directly to AI GND If the source has hi
173. eipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIO
174. els on Simultaneous MIO X Series Devices With Simultaneous MIO X Series devices every AI channel drives its own NI PGIA The NI PGIA amplifies the signal as determined by the input range The output of the NI PGIA then drives the analog trigger detection circuit By using the NI PGIA you can trigger on very small voltage changes in the input signal Since channels are not multiplexed there are no restrictions on the analog input channel list order or number of channels with reference and pause triggers However the analog input channels must be in the scan list Analog Trigger Actions X Series User Manual The output of the analog trigger detection circuit is the Analog Comparison Event signal You can program your DAQ device to perform an action in response to the Analog Comparison Event signal The action can affect the following e Analog input acquisition e Analog output generation e Digital input behavior 11 4 ni com Chapter 11 Triggering e Digital output behavior e Counter behavior Routing Analog Comparison Event to an Output Terminal You can route Analog Comparison Event out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal Analog Trigger Types Configure the analog trigger circuitry to different triggering modes e Analog Edge Triggering Configure the analog trigger circuitry to detect when the analog signal is below or above a level you specify In below level analog triggering mode shown i
175. ence clock from RTSI or PFI This signal becomes the external reference clock A PLL on each device generates the internal timebases synchronous to the external reference clock Once all of the devices are using or referencing a common timebase you can synchronize operations across them by sending a common start trigger out across the RTSI or PFI bus and setting their sample clock rates to the same value With the PFI bus and the routing capabilities of X Series USB devices there are several ways to synchronize multiple devices depending on your application To synchronize multiple devices to a common timebase choose one device the initiator to generate the timebase The initiator device routes its 10 MHz reference clock to one of the PFI lt 0 15 gt signals All devices including the initiator device receive the 10 MHz reference clock from PFI This signal becomes the external reference clock A PLL on each device generates the internal timebases synchronous to the external reference clock Once all of the devices are using or referencing a common timebase you can synchronize operations across them by sending a common start trigger out across the PFI bus and setting their sample clock rates to the same value Real Time System Integration RTSI X Series User Manual Real Time System Integration RTSI is a signal bus among devices that allows you to do the following e Use a common clock or timebase to drive the timi
176. eptually a task represents a measurement or generation you want to perform See terminal count An object or region on a node through which data passes The highest value of a counter Gate hold time Gate setup time Gate pulse width The reference signals for controlling the basic accuracy of time or frequency based measurements For instruments timebase refers to the accuracy of the internal clock Output delay time A device that responds to a physical stimulus heat light sound pressure motion flow and so on and produces a corresponding electrical signal See also sensor 1 Any event that causes or starts some form of data capture 2 An external stimulus that initiates one or more instrument functions Trigger stimuli include a front panel button an external input voltage pulse or a bus trigger command The trigger may also be derived from attributes of the actual signal to be acquired such as the level and slope of the signal Source clock period Source pulse width Transistor Transistor Logic A digital circuit composed of bipolar transistors wired in a certain manner A typical medium speed digital technology Nominal TTL logic levels are 0 and 5 V G 15 X Series User Manual Glossary USB virtual channel W waveform X X Series X Series User Manual Universal Serial Bus A 480 Mbit s serial bus with up to 12 Mbps bandwidth for connecting computers to keyboards printers and othe
177. er Signal Use the AI Pause Trigger ai PauseTrigger signal to pause and resume a measurement acquisition The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive You can program the active level of the pause trigger to be high or low as shown in Figure 4 24 In the figure T represents the period and A represents the unknown time between the clock pulse and the posttrigger 4 38 ni com Chapter 4 Analog Input Al Sample Clock Al Convert Clock Al Pause Trigger Al External Sample Clock Al Sample Clock Al Convert Clock Al Pause Trigger Halt Used on Internal Clock Free Running Used on External Clock National Instruments Figure 4 24 Halt Internal Clock and Free Running External Clock Using a Digital Source To use AI Pause Trigger specify a source and a polarity The source can be any of the following signals PFI lt 0 15 gt RTSI lt 0 7 gt PXI_STAR PXIe DSTAR lt A B gt Counter n Internal Output Counter n Gate AO Pause Trigger ao PauseTrigger DO Pause Trigger do PauseTrigger DI Pause Trigger di PauseTrigger The source also can be one of several other internal signals on your DAQ device Refer to D
178. ered applications a software trigger generates DI Start Trigger Refer to the DI Reference Trigger Signal section for a complete description of the use of DI Start Trigger and DI Reference Trigger in a pretriggered DAQ operation DI Reference Trigger Signal Use the DI Reference Trigger di ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desired is the buffer size minus the number of pretrigger samples Once the acquisition begins the DAQ device writes samples to the buffer After the DAQ device captures the specified number of pretrigger samples the DAQ device begins to look for the reference trigger condition If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples the DAQ device ignores the condition If the buffer becomes full the DAQ device continuously discards the oldest samples in the buffer to make space for the next sample This data can be accessed with some limitations before the DAQ device discards it Refer to the KnowledgeBase document Can a Pretriggered Acquisition be Continuous for more information To access this KnowledgeBase go to ni com info and enter the Info Code rdcanq X Series User Manual 6 10 ni com Natio
179. ers for Board Mating Connectors by going to ni com info and entering the Info Code rdspmb USB Device Mounting Accessories USB Cable Power Supply and Ferrite NI offers a variety of products to use with USB Mass Termination X Series devices as follows e USB X Series mounting kit Part number 781514 01 e USB X Series mounting kit with DIN rail clip Part number 781515 01 e USB cable with locking screw 2 m Part number 780534 01 e Universal power supply with mini combicon connector 12 VDC 2 5 A Part number 781513 01 e EM suppression ferrites 10 2 mm length Part number 78 1233 02 National Instruments 2 7 X Series User Manual Chapter 2 DAQ System Overview USB Screw Terminal Device Accessories NI offers a variety of products to use with USB Screw Terminal X Series devices as follows e USB X Series mounting kit Part number 781514 01 e USB X Series mounting kit with DIN rail clip Part number 781515 01 e USB cable with locking screw 2 m Part number 780534 01 e Universal power supply with mini combicon connector 12 VDC 2 5 A Part number 781513 01 Signal Conditioning Many sensors and transducers require signal conditioning before a measurement system can effectively and accurately acquire the signal The front end signal conditioning system can include functions such as signal amplification attenuation filtering electrical isolation simultaneous sampling and multiplexing In additi
180. ery AI Sample Clock A measurement acquisition consists of one or more samples You can specify an internal or external source for AI Sample Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of AI Sample Clock Using an Internal Source One of the following internal signals can drive AI Sample Clock e Counter n Internal Output e AI Sample Clock Timebase divided down e A pulse initiated by host software e Change Detection Event e Counter n Sample Clock e AO Sample Clock ao SampleClock e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock A programmable internal counter divides down the sample clock timebase Several other internal signals can be routed to AI Sample Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information 4 28 ni com Chapter 4 Analog Input Using an External Source Use one of the following external signals as the source of AI Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger Routing Al Sample Clock Signal to an Output Terminal You can route AI Sample Clock out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal This pulse is always active high All PFI terminals are configured as inputs by default Other Timing Requirements Your DAQ device only acqui
181. es Not Connected to Building Ground Ground Referenced Signal Sources Examples e Ungrounded thermocouples e Signal conditioning with isolated outputs Example e Plug in instruments with non isolated outputs Single Ended NRSE Al Al SENSE GND Setting e Battery devices Differential Signal Source DAQ Device Signal Source DAQ Device Al Al t LES r ST T i Al GND A ale Non Referenced Signal Source DAQ Device Signal Source DAQ Device Al H SENSE e ZZ Z AI GND Referenced Single Ended RSE NOT RECOMMENDED Signal Source DAQ Device Signal Source DAQ Device AR Va Al GND Ground loop potential Va Vg are added to measured signal software considerations Refer to the Analog Input Ground Reference Settings section for descriptions of the RSE NRSE and DIFF modes and t Refer to the Connecting Ground Referenced Signal Sources section for more information X Series User Manual 4 12 ni com Chapter 4 Analog Input Connecting Floating Signal Sources National Instruments What Are Floating Signal Sources A floating signal source is not connected to the building ground system but has an isolated ground reference point Some examples of fl
182. es 4 15 NI DAQm x counter timer pins 7 47 using with ground referenced signal pins 7 47 sources l l desktop use 1 5 MIO X Series devices 4 22 when to use with floating signal sources MIO X Series devices 4 13 when to use with ground referenced signal sources MIO X Series devices 4 20 device information A 1 multiple synchronization 9 3 NI 6320 A 2 NI 6321 6341 A 5 NI 6323 6343 A 8 NI 6351 6361 A 12 NI 6353 6363 A 16 NI 6356 6366 A 22 NI 6358 6368 A 27 digital waveform acquisition 6 5 waveform generation 6 16 X Series User Manual l 6 ni com digital I O block diagram 6 1 circuitry 6 1 connecting signals 6 29 DI change detection 6 24 digital waveform generation 6 16 getting started with applications in software 6 30 T O protection 6 23 programmable power up states 6 23 static DIO 6 3 triggering 11 1 waveform acquisition 6 5 digital output trigger signals 6 16 triggering 6 16 digital routing 9 1 digital signals Change Detection Event 6 24 connecting 6 29 Counter n Sample Clock 7 45 DI Sample Clock 6 6 DO Sample Clock 6 17 digital source triggering 11 1 digital waveform acquisition 6 5 generation 6 16 disk drive power PCI Express 3 4 disk drive power connector PCI Express devices 3 4 DMA as a transfer method 10 1 controllers 10 1 DO Sample Clock signal 6 17 do SampleClock 6 17 documentation conventions used in manual xvii NI resources C 1 related
183. evice Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information 4 39 X Series User Manual Chapter 4 Analog Input Using an Analog Source When you use an analog trigger source the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high or vice versa Routing Al Pause Trigger Signal to an Output Terminal You can route AI Pause Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt PXI_STAR or PXIe DSTARC terminal 3 Note Pause triggers are only sensitive to the level of the source not the edge Getting Started with Al Applications in Software You can use the MIO X Series device in the following analog input applications e Single point analog input on demand e Finite analog input e Continuous analog input e Hardware timed single point You can perform these applications through DMA or programmed I O data transfer mechanisms Some of the applications also use start reference and pause triggers B Note For more information about programming analog input applications and triggers in software refer to the NJ DAQmx Help or the LabVIEW Help X Series User Manual MIO X Series devices use the NI DAQmx driver NI DAQm x includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example co
184. ference for P0 lt 0 31 gt PFI lt 0 15 gt P1 P2 and 5 V All three ground references AI GND AO GND and D GND are connected on the device PO lt 0 31 gt D GND Input or Output Port 0 Digital I O Channels 0 to 31 You can individually configure each signal as an input or output X Series User Manual 3 2 ni com Chapter 3 Connector and LED Information Table 3 1 1 0 Connector Signals Continued Signal Name Reference Direction Description APFI lt 0 1 gt AO GND Input Analog Programmable Function Interface Channels or AI GND 0 to 1 Each APFI signal can be used as AO external reference inputs for AO lt 0 3 gt or as an analog trigger input APFI lt 0 1 gt are referenced to AI GND when they are used as analog trigger inputs APFI lt 0 1 gt are referenced to AO GND when they are used as AO external offset or reference inputs These functions are not available on all devices Refer to the specifications for your device 5 V D GND Output 5 V Power Source These terminals provide a fused 5 V power source Refer to the 5 V Power Source section for more information PFI lt 0 7 gt P1 lt 0 7 gt D GND Input or Programmable Function Interface or Digital I O Channels 0 PFI lt 8 15 gt P2 lt 0 7 gt Output to 7 and Channels 8 to 15 Each of these terminals can be individually configured as a PFI terminal or a digital I O terminal As an input each PFI termi
185. fic Information B Note Refer to Table 7 10 X Series USB Screw Terminal Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help NI 6323 6343 Specifications Refer to the NI 632x Specifications for more detailed information about the NI 6323 device Refer to the M 634x Specifications for more detailed information about the NI 6343 device NI 6323 6343 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information National Instruments A 11 X Series User Manual Appendix A Device Specific Information NI 6351 6361 The following sections contain information about the NI PCIe 6351 NI USB 6351 Screw Terminal NI PCle PXIe 6361 and NI USB 6361 Screw Terminal and Mass Termination devices NI 6351 6361 Pinout Figure A 6 shows the pinout of the NI PCIe 6351 and NI PCIe PXIe 6361 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information X Series User Manual AI O AI 0 Al 8 Al 0 Al GND Al 1 Al 14 AI 9 AI 1 Al GND AI 2 Al 2 Al 10 A
186. finite acquisitions so the background channel is not added e Continuous acquisition refers to the acquisition of an unspecified number of samples Instead of acquiring a set number of data samples and stopping a continuous acquisition continues until you stop the operation Continuous acquisition is also referred to as double buffered or circular buffered acquisition If data cannot be transferred across the bus fast enough the FIFO becomes full New acquisitions overwrite data in the FIFO before it can be transferred to host memory The device generates an error in this case With continuous operations if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer the buffer could reach an overflow condition causing an error to be generated Hardware timed single point HWTSP Typically HWTSP operations are used to read single samples at known time intervals While buffered operations are optimized for high throughput HWTSP operations are optimized for low latency and low jitter In addition HWTSP can notify software if it falls behind hardware These features make HWTSP ideal for real time control applications HWTSP operations in conjunction with the wait for next sample clock function provide tight synchronization between the software layer and the hardware layer Refer to the NI Developer Zone document NJ DAQmx Hardware Timed Single Point Lateness Checking for more information
187. for many measurement and pulse generation applications Figure 7 1 shows the X Series Counter 0 and the frequency generator All four counters on X Series devices are identical Input Selection Muxes Counter 0 Counter 0 Source Counter 0 Timebase Counter 0 Gate Counter 0 Internal Output ter O A Counter 0 Aux Embedded Ctro Counter 0 HW Arm FIFO Counter 0 A Counter 0 TC mph Counter 0 Z Counter 0 B Counter 0 Up_Down Counter 0 Sample Clock Input Selection Muxes Frequency Generator Frequency Output Timebase Freq Out National Instruments Figure 7 1 X Series Counter 0 and Frequency Generator Counters have eight input signals although in most applications only a few inputs are used For information about connecting counter signals refer to the Default Counter Timer Pinouts section Each counter has a FIFO that can be used for buffered acquisition and generation Each counter also contains an embedded counter Embedded Ctrn for use in what are traditionally two counter measurements and 7 1 X Series User Manual Chapter 7 Counters generations The embedded counters cannot be programmed independent of the main counter signals from the embedded counters are not routable Counter Timing Engine Unlike analog input analog output digital input and digital output X Series counters do not have the ability to divide down a timeba
188. for the NI 6320 NI 6321 and NI 6323 MIO X Series devices The NI 634x Specifications contains all specifications for the NI 6341 and NI 6343 MIO X Series devices The NI 6351 6353 Specifications contains all specifications for the NI 6351 and NI 6353 MIO X Series devices The NI 6356 6358 Specifications contains all specifications for the NI 6356 and NI 6358 Simultaneous MIO X Series devices The NI 6361 6363 Specifications contains all specifications for the NI 6361 and NI 6363 MIO X Series devices The NI 6366 6368 Specifications contains all specifications for the NI 6366 and NI 6368 Simultaneous MIO X Series devices Documentation for supported devices and accessories including PDF and help files describing device terminals specifications features and operation are on the NI DAQmx media that includes Device Documentation Training Courses If you need more help getting started developing an application with NI products NI offers training courses To enroll in a course or obtain a detailed course outline refer to ni com training National Instruments xxi X Series User Manual About This Manual Technical Support on the Web For additional support refer to ni com support or zone ni com 3 Note You can download these documents at ni com manuals DAQ specifications and some DAQ manuals are available as PDFs You must have Adobe Acrobat Reader with Search and Accessibility 5 0 5 or later installed to view th
189. form information from LabVIEW will not reflect the delay between triggers They will be treated as a continuous acquisition with constant t0 and dt information National Instruments Reference triggers are not retriggerable Using a Digital Source To use DI Start Trigger with a digital source specify a source and an edge The source can be any of the following signals PFI lt 0 15 gt RTSI lt 0 7 gt Counter n Internal Output PXI_STAR PXIe DSTAR lt A B gt Change Detection Event AI Start Trigger ai StartTrigger AO Start Trigger ao StartTrigger DO Start Trigger do StartTrigger The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the measurement acquisition begins on the rising edge or falling edge of DI Start Trigger 6 9 X Series User Manual Chapter 6 Digital 1 0 Using an Analog Source When you use an analog trigger source the acquisition begins on the first rising or falling edge of the Analog Comparison Event signal Routing DI Start Trigger to an Output Terminal You can route DI Start Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal The output is an active high pulse All PFI terminals are configured as inputs by default The device also uses DI Start Trigger to initiate pretriggered DAQ operations In most pretrigg
190. formation about reducing glitches National Instruments How do I connect counter signals to my X Series device The Default Counter Timer Pinouts section of Chapter 7 Counters has information about counter signal connections B 3 X Series User Manual Technical Support and Professional Services Log in to your National Instruments ni com User Profile to get personalized access to your services Visit the following sections of ni com for technical support and professional services e Support Technical support at ni com support includes the following resources Self Help Technical Resources For answers and solutions visit ni com support for software drivers and updates a searchable KnowledgeBase product manuals step by step troubleshooting wizards thousands of example programs tutorials application notes instrument drivers and so on Registered users also receive access to the NI Discussion Forums at ni com forums NI Applications Engineers make sure every question submitted online receives an answer Standard Service Program Membership This program entitles members to direct access to NI Applications Engineers via phone and email for one to one technical support as well as exclusive access to eLearning training modules at ni com elearning All customers automatically receive a one year membership in the Standard Service Program SSP with the purchase of most software products and bundles including NI
191. fundamentals 4 41 overview 4 41 ni com signals 4 52 terminal configuration 4 42 timing signals 4 52 timing summary 4 52 triggering 4 46 troubleshooting B 1 analog output circuitry 5 1 connecting signals 5 5 data generation methods 5 3 fundamentals 5 1 getting started with applications in software 5 13 glitches on the output signal 5 3 reference selection 5 2 signals 5 6 AO Pause Trigger 5 8 AO Sample Clock 5 10 AO Sample Clock Timebase 5 12 AO Start Trigger 5 7 timing signals 5 6 trigger signals 5 5 triggering 5 5 troubleshooting B 3 analog source triggering 11 2 analog trigger 11 2 accuracy 11 8 actions 11 4 improving accuracy 11 8 analog window triggering 11 7 analog to digital converter MIO X Series devices 4 2 Simultaneous MIO X Series devices 4 41 ANSI C documentation xx AO FIFO 5 1 AO Pause Trigger signal 5 8 AO reference selection 5 2 AO reference selection settings 5 2 AO Sample Clock 5 2 AO Sample Clock signal 5 10 AO Sample Clock Timebase signal 5 12 National Instruments Corporation 1 3 Index AO Start Trigger signal 5 7 ao PauseTrigger 5 8 ao SampleClock 5 10 ao StartTrigger 5 7 APFI lt 0 1 gt terminals 11 3 applications counter input 7 3 counter output 7 30 edge counting 7 3 applying rubber feet 1 5 arm start trigger 7 50 avoiding scanning faster than necessary MIO X Series devices 4 9 buffered edge counting 7 5 hardware timed acquis
192. g Comparison Event may have an impact on your measurements if the trigger signal has a high slew rate If you find these conditions have a noticeable impact on your measurements you can perform software calibration on the analog trigger circuitry by configuring your task as normal and applying a known signal for your analog trigger Comparing the observed results against the expected results you can calculate the necessary offsets to apply in software to fine tune the desired triggering behavior 11 8 ni com Device Specific Information This appendix contains device pinouts specifications cable and accessory choices and other information for the following X Series devices NI 6320 NI 6321 6341 NI 6323 6343 NI 6351 6361 NI 6353 6363 NI 6356 6366 NI 6358 6368 To obtain documentation for devices not listed here refer to ni com manuals National Instruments A 1 X Series User Manual Appendix A Device Specific Information NI 6320 The following sections contain information about the NI PCIe 6320 device NI 6320 Pinout Figure A 1 shows the pinout of the NI PCIe 6320 device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information X Series User Manual A 2 ni com Appendix A Device Specific Information AI 0 Al 0 Al GND AI 9 AI 1 AI 2 Al 2 AI GND Al 11 Al 3 AI SENSE Al 12 Al 4 AI 5 AI 5 AI G
193. g both connectors National Instruments 2 5 X Series User Manual Chapter 2 DAQ System Overview Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an X Series device to a connector block such as the following e CB 68LP and CB 68LPR Unshielded connector blocks e SCC 68 1I 0 connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 Shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 Front panel mounted terminal block for X Series PXI Express devices You can use one screw terminal accessory with the signals on either connector of your X Series device You can use two screw terminal accessories with one X Series device by using both connectors RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI PCI Express devices such as X Series M Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM High performance shielded cable designed for M X Series devices It has individual bundles separating analog and digital signals Each differential analog input chan
194. ge ratings can be found in the specifications document for each Simultaneous MIO X Series device Analog Input Range X Series User Manual Input range refers to the set of input voltages that an analog input channel can digitize with the specified accuracy The NI PGIA amplifies or attenuates the AI signal depending on the input range You can individually program the input range of each AI channel on your Simultaneous MIO X Series device The input range affects the resolution of the Simultaneous MIO X Series device for an AI channel Resolution refers to the voltage of one ADC code For example a 16 bit ADC converts analog inputs into one of 65 536 216 codes that is one of 65 536 possible digital values These values are spread fairly evenly across the input range So for an input range of 10 V to 10 V the voltage of each code of a 16 bit ADC is 10V CN 305 uV 2 Simultaneous MIO X Series devices use a calibration method that requires some codes typically about 5 of the codes to lie outside of the specified range This calibration method improves absolute accuracy but it increases the nominal resolution of input ranges by about 5 over what the formula shown above would indicate 4 42 ni com Chapter 4 Analog Input Choose an input range that matches the expected input range of your signal A large input range can accommodate a large signal variation but reduces the voltage resolution Choosing a smaller input ra
195. gger Software can arm a counter or configure counters to be armed on a hardware signal Software calls this hardware signal the Arm Start Trigger Internally software routes the Arm Start Trigger to the Counter n HW Arm input of the counter Routing Signals to Counter 7 HW Arm Input Any of the following signals can be routed to the Counter n HW Arm input e RTSI lt 0 7 gt e PFI lt 0 15 gt e Al Reference Trigger ai ReferenceTrigger e AI Start Trigger ai StartTrigger e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event e Change Detection Event A counter s Internal Output can be routed to a different counter s HW Arm Some of these options may not be available in some driver software Counter n Sample Clock Signal National Instruments Use the Counter n Sample Clock CtrnSampleClock signal to perform sample clocked acquisitions and generations You can specify an internal or external source for Counter n Sample Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of Counter n Sample Clock 7 45 X Series User Manual Chapter 7 Counters X Series User Manual If the DAQ device receives a Counter n Sample Clock when the FIFO is full it reports an overflow error to the host software Using an Internal Source To use Counter n Sample Clock with an internal source specify the signal source and the polarity of the signal The source can be any of
196. gger e AI Sample Clock Timebase ai SampleClockTimebase e AO Start Trigger ao StartTrigger e AO Sample Clock ao SampleClock e AO Sample Clock Timebase ao SampleClockTimebase e AO Pause Trigger ao PauseTrigger e Counter input signals for all counters Source Gate Aux HW_Arm A B or Z e DI Sample Clock di SampleClock e DI Start Trigger di StartTrigger e DI Pause Trigger di PauseTrigger e DI Reference Trigger di ReferenceTrigger e DO Sample Clock do SampleClock e DO Sample Clock Timebase do SampleClockTimebase Most functions allow you to configure the polarity of RTSI inputs and whether the input is edge or level sensitive RTSI Filters You can enable a programmable debouncing filter on each PFI RTSL or PXI_STAR signal Refer to the PFI Filters section of Chapter 8 PFI for more information National Instruments 9 7 X Series User Manual Chapter 9 Digital Routing and Clock Generation PXI and PXI Express Clock and Trigger Signals PXle_CLK100 PXle_SYNC100 PXI_CLK10 PXI and PXI Express clock and trigger signals are only available on PXI Express devices PXIe CLK100 is a common low skew 100 MHz reference clock for synchronization of multiple modules in a PXI Express measurement or control system The PXIe backplane is responsible for generating PXIe_CLK100 independently to each peripheral slot in a PXI Express chassis For more information refer to the PXI Express Specification at
197. gh output impedance balance the signal path as previously described using the same value resistor on both the positive and negative inputs be aware that there is some gain error from loading down the source 4 50 ni com Chapter 4 Analog Input Field Wiring Considerations National Instruments Environmental noise can seriously affect the measurement accuracy of the Simultaneous MIO X Series device if you do not take proper care when running signal wires between signal sources and the device The following recommendations apply mainly to AI signal routing although they also apply to signal routing in general Minimize noise pickup and maximize measurement accuracy by taking the following precautions e Use individually shielded twisted pair wires to connect AI signals to the device With this type of wire the signals attached to the AI and AlI inputs are twisted together and then covered with a shield You then connect this shield only at one point to the signal source ground This kind of connection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference e Route signals to the device carefully Keep cabling away from noise sources The most common noise source in a PCI DAQ system is the video monitor Separate the monitor from the analog signals as far as possible e Separate the signal lines of the Simultaneous MIO X Series device from high current or high voltage line
198. hardware timed generations Software Timed Generations With a software timed generation software controls the rate at which data is generated Software sends a separate command to the hardware to initiate each DAC conversion In NI DAQmx software timed generations are referred to as on demand timing Software timed generations are also referred to as immediate or static operations They are typically used for writing a single value out such as a constant DC voltage Hardware Timed Generations National Instruments With a hardware timed generation a digital hardware signal controls the rate of the generation This signal can be generated internally on your device or provided externally Hardware timed generations have several advantages over software timed generations e The time between samples can be much shorter e The timing between samples can be deterministic e Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or hardware timed single point HWTSP A buffer is a temporary storage in computer memory for to be transferred samples e Hardware timed single point HWTSP Typically HWTSP operations are used to write single samples at known time intervals While buffered operations are optimized for high throughput HWTSP 5 3 X Series User Manual Chapter 5 Analog Output operations are optimized for low latency and low jitter In addition HWTSP can notify software if
199. he keyboard sections of code programming examples and syntax examples This font is also used for the proper names of disk drives paths directories programs subprograms subroutines device names functions operations variables filenames and extensions Text in this font denotes a specific platform and indicates that the text following it applies only to that platform xvii X Series User Manual About This Manual Related Documentation Each application software package and driver includes information about writing applications for taking measurements and controlling measurement devices The following references to documents assume you have NI DAQmx 9 2 or later and where applicable version 8 5 or later of the NI application software NI DAQmx for Windows LabVIEW X Series User Manual The DAQ Getting Started guides packaged with NI DAQmx describe how to install your NI DAQmx for Windows software how to install your NI DAQmx supported DAQ device and how to confirm that your device is operating properly The NI DAQ Readme lists which devices ADEs and NI application software are supported by this version of NI DAQ Select Start All Programs National Instruments NI DAQ NI DAQ Readme The NI DAQmx Help contains general information about measurement concepts key NI DAQmx concepts and common applications that are applicable to all programming environments Select Start All Programs National Instruments gt NI
200. i StartTrigger MIO X Series devices 4 35 Simultaneous MIO X Series devices 4 57 analog comparison event routing 11 5 comparison event signal 11 4 edge triggering 11 5 with hysteresis 11 6 trigger actions 11 4 trigger types 11 5 triggering 11 2 analog input channels 11 4 charge injection B 1 crosstalk when sampling multiple channels B 1 differential troubleshooting B 1 ghost voltages when sampling multiple channels B 1 X Series User Manual MIO X Series devices 4 1 AI Convert Clock 4 31 AI Convert Clock Timebase 4 34 AI Hold Complete Event 4 34 AI Pause Trigger 4 38 AI Reference Trigger 4 37 AI Sample Clock 4 28 AI Sample Clock Timebase 4 30 AI Start Trigger 4 35 channels sampling with AI Sample Clock and AI Convert Clock B 2 circuitry 4 1 connecting 4 11 connecting signals 4 11 connecting through I O connector 4 1 data acquisition methods 4 9 getting started with applications in software 4 40 ground reference settings 4 2 MUX 4 2 range 4 2 sampling channels with AI Sample Clock and AI Convert Clock B 2 signals 4 24 timing signals 4 24 triggering 4 11 Simultaneous MIO X Series devices AI Hold Complete Event 4 57 AI Pause Trigger 4 61 AI Reference Trigger 4 59 AI Sample Clock 4 54 AI Sample Clock Timebase 4 56 circuitry 4 41 connecting signals 4 46 connecting through I O connector 4 4 data acquisitions 4 44 methods 4 44
201. idth are measured in terms of a number of active edges of the Source input The initial delay can be applied to only the first trigger or to all triggers using the CO EnablelnitalDelayOnRetrigger property The default for a single pulse is True while the default for finite pulse trains is False The counter ignores the Gate input while a pulse generation is in progress After the pulse generation is finished the counter waits for another Start Trigger signal to begin another pulse generation For retriggered pulse generation pause triggers are not allowed since the pause trigger also uses the gate input Figure 7 31 shows a generation of two pulses with a pulse delay of five and a pulse width of three using the rising edge of Source with CO EnablelnitalDelayOnRetrigger set to the default True Counter Load Values 43210210 43210210 GATE Start Trigger UN source LL OUT Figure 7 31 Retriggerable Single Pulse Generation with Initial Delay on Retrigger 7 33 X Series User Manual Chapter 7 Counters Figure 7 32 shows the same pulse train with CO EnableInitalDelayOnRetrigger set to the default False Counter Load Values 43210210 43210210 GATE Start Trigger E SOURCE
202. ies devices 4 59 AI Sample Clock MIO X Series devices 4 28 Simultaneous MIO X Series devices 4 54 AI Sample Clock Timebase MIO X Series devices 4 30 Simultaneous MIO X Series devices 4 56 Al Start Trigger MIO X Series devices 4 35 Simultaneous MIO X Series devices 4 57 analog input MIO X Series devices 4 24 Simultaneous MIO X Series devices 4 52 X Series User Manual X Series User Manual Index analog output 5 6 AO Pause Trigger 5 8 AO Sample Clock 5 10 AO Sample Clock Timebase 5 12 AO Start Trigger 5 7 Change Detection Event 6 24 connecting analog input MIO X Series devices 4 11 connecting analog output 5 5 connecting counter B 3 connecting digital I O 6 29 connecting PFI input 8 4 Counter n A 7 44 Counter n Aux 7 43 Counter n B 7 44 Counter n Gate 7 43 Counter n HW Arm 7 45 Counter n Internal Output 7 47 Counter n Sample Clock 7 45 Counter n Source 7 41 Counter n TC 7 47 Counter n Up_Down 7 44 Counter n Z 7 44 counters 7 41 DI Sample Clock 6 6 DO Sample Clock 6 17 exporting timing output using PFI terminals 8 3 FREQ OUT 7 47 Frequency Output 7 47 minimizing output glitches B 3 output minimizing glitches on 5 3 simple pulse generation 7 30 single point edge counting 7 4 pulse generation 7 30 retriggerable 7 33 with start trigger 7 31 pulse width measurement 7 6 l 14 semi period measurement 7 12 two signal edge separation measurement 7 27 single end
203. ifferent counter s Aux A counter s own gate can also be routed to its Aux input Some of these options may not be available in some driver software Counter n A Counter n B and Counter n Z Signals Counter n B can control the direction of counting in edge counting applications Use the A B and Z inputs to each counter when measuring quadrature encoders or measuring two pulse encoders Routing Signals to A B and Z Counter Inputs Each counter has independent input selectors for each of the A B and Z inputs Any of the following signals can be routed to each input e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event Routing Counter n Z Signal to an Output Terminal You can route Counter n Z out to any RTSI lt 0 7 gt terminal Counter n Up_Down Signal Counter n Up_Down is another name for the Counter n B signal X Series User Manual 7 44 ni com Chapter 7 Counters Counter n HW Arm Signal The Counter n HW Arm signal enables a counter to begin an input or output function To begin any counter input or output function you must first enable or arm the counter In some applications such as a buffered edge count the counter begins counting when it is armed In other applications such as single pulse width measurement the counter begins waiting for the Gate signal when it is armed Counter output operations can use the arm signal in addition to a start tri
204. igger measurement second gate measurement or A to B measurement Refer to the following sections for more information about the X Series edge separation measurement options e Single Two Signal Edge Separation Measurement e Implicit Buffered Two Signal Edge Separation Measurement e Sample Clocked Buffered Two Signal Separation Measurement e Hardware Timed Single Point Two Signal Separation Measurement Single Two Signal Edge Separation Measurement With single two signal edge separation measurement the counter counts the number of rising or falling edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal The counter then stores the count in the FIFO and ignores other edges on its inputs Software then reads the stored count Figure 7 24 shows an example of a single two signal edge separation measurement Counter Armed i r amp Measured Interval AUX 4 GATE i y SOURCE i Counter Value 0 0 00 1 2 3 4 5 6 7 8 8 8 Latched Value 8 Figure 7 24 Single Two Signal Edge Separation Measurement 7 27 X Series User Manual Chapter 7 Counters X Series User Manual Implicit Buffered Two Signal Edge Separation Measurement Implicit buffered and single two signal edge separation measurements are similar but implicit buffered measurement me
205. ignal X Series User Manual Use the AO Pause Trigger ao PauseTrigger signal to mask off samples in a DAQ sequence That is when AO Pause Trigger is active no samples occur AO Pause Trigger does not stop a sample that is in progress The pause does not take effect until the beginning of the next sample When you generate analog output signals the generation pauses as soon as the pause trigger is asserted If the source of your sample clock is the 5 8 ni com National Instruments Chapter 5 Analog Output onboard clock the generation resumes as soon as the pause trigger is deasserted as shown in Figure 5 5 Pause Trigger Sample Clock Figure 5 5 AO Pause Trigger with the Onboard Clock Source If you are using any signal other than the onboard clock as the source of your sample clock the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received as shown in Figure 5 6 Pause Trigger rr ae Sample Clock i i Figure 5 6 AO PauseTrigger with Other Signal Source Using a Digital Source To use AO Pause Trigger specify a source and a polarity The source can be one of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Counter n Internal Output e Counter n Gate e AT Pause Trigger ai PauseTrigger
206. ignals performs D A conversions to generate analog output signals and measures and controls digital I O signals Figure 2 2 features components common to all X Series devices National Instruments 2 1 X Series User Manual Chapter 2 DAQ System Overview Analog Input Analog Output g Digital 2 Routing Bus 5 Digital 1 0 and Clock Interface Bus Generation Counters RTSI PFI Figure 2 2 General X Series Block Diagram DAQ STC3 The DAQ STC3 and DAQ 6202 implement a high performance digital engine for X Series data acquisition hardware Some key features of this engine include the following e Flexible AI and AO sample and convert timing e Many triggering modes e Independent AI AO DI DO and counter FIFOs e Generation and routing of RTSI signals for multi device synchronization e Generation and routing of internal and external timing signals e Four flexible 32 bit counter timer modules with hardware gating e Digital waveform acquisition and generation e Static DIO signals e True 5 V high current drive DO e DI change detection e DO watchdog timers e PLL for clock synchronization e Seamless interface to signal conditioning accessories e PCI Express PXI Express interface Independent scatter gather DMA controllers for all acquisition and generation functions X Series User Manual 2 2 ni com
207. illator to generate the filter clock The following is an example of low to high transitions of the input signal High to low transitions work similarly Assume that an input terminal has been low for a long time The input terminal then changes from low to high but glitches several times When the filter clock has sampled the signal high on N consecutive edges the low to high transition is propagated to the rest of the circuit The value of N depends on the filter setting refer to Table 8 1 National Instruments 8 5 X Series User Manual Chapter 8 PFI Table 8 1 Filters N Filter Clocks Pulse Width Pulse Width Needed to Guaranteed to Guaranteed to Filter Setting Filter Clock Pass Signal Pass Filter Not Pass Filter None Pe 90 ns 100 MHz 9 90 ns 80 ns short 5 12 us 100 MHz 512 5 12 us 5 11 us medium 2 56 ms 100 kHz 256 2 56 ms 2 55 ms high Custom User N N timebase N 1 timebase configurable The filter setting for each input can be configured independently On power up the filters are disabled Figure 8 3 shows an example of a low to high transition on an input that has a custom filter set to N 5 RTSI PFI or PXI_STAR Terminal Filtered input goes high when terminal X Series User Manual 1 3 4 1 2 3 4 5 is sampled high on Filter Clock five
208. ing power source ppm pretriggering pulse pulse width PXI Express PXI_STAR Q quadrature encoder X Series User Manual Programmable Function Interface Programmable Gain Instrumentation Amplifier See channel A specification prepared by Microsoft Intel and other PC related companies that result in PCs with plug in devices that can be fully configured in software without jumpers or switches on the devices The technique used on a DAQ device to acquire a programmed number of samples after trigger conditions are met An instrument that provides one or more sources of AC or DC power Also known as power supply Parts per million The technique used on a DAQ device to keep a continuous buffer filled with data so that when the trigger conditions are met the sample includes the data leading up to the trigger condition A signal whose amplitude deviates from zero for a short period of time The time from the rising to the falling slope of a pulse at 50 amplitude PCI Express eXtensions for Instrumentation The PXI implementation of PCI Express a scalable full simplex serial bus standard that operates at 2 5 Gbps and offers both asynchronous and isochronous data transfers A special set of trigger lines in the PXI backplane for high accuracy device synchronization with minimal latencies on each PXI slot Only devices in the PXI Star controller Slot 2 can set signal on this line For additional information con
209. ing Frequency s s s 7 18 Period Measurement 2 525 nin iaa E 7 22 Position Measurement instant hisser ia 7 23 Measurements Using Quadrature Encoders 7 23 Measurements Using Two Pulse Encoders 7 25 Buffered Sample Clock Position Measurement 7 25 Hardware Timed Single Point Position Measurement 7 26 Two Signal Edge Separation Measurement 7 26 Single Two Signal Edge Separation Measurement 7 27 Implicit Buffered Two Signal Edge Separation Measurement 7 28 Sample Clocked Buffered Two Signal Separation Measurement 7 28 Hardware Timed Single Point Two Signal Separation Me sur ment ss sitter ein ossa Teosa I ESERI ETE oani 7 29 X Series User Manual xii ni com Contents Counter Output Applications sise 7 30 Simple Pulse Generation tint capdessdascansoedoastapaeise 7 30 Single Pulse Generation 7 30 Single Pulse Generation with Start Trigger 7 31 Pulse Train Generation issus nuisible i 7 31 Finite Pulse Train Generation 7 32 Retriggerable Pulse or Pulse Train Generation 7 33 Continuous Pulse Train Generation cece eeeeseeseeeeeteeeeeenees 7 34 Buffered Pulse Train Generation 7 35 Finite Implicit Buffered Pulse Train Generation 00 0 0 eee 7 35 Continuous Buffered Im
210. inite generations the specified number of pulses is generated and the generation stops unless you use the retriggerable attribute When you use this attribute subsequent start triggers cause the generation to restart When using a start trigger the start trigger source is routed to the Counter n Gate signal input of the counter Counter input operations can use the arm start trigger to have start trigger like behavior Pause Trigger You can use pause triggers in edge counting and continuous pulse generation applications For edge counting acquisitions the counter stops counting edges while the external trigger signal is low and resumes when the signal goes high or vice versa For continuous pulse generations the counter stops generating pulses while the external trigger signal is low and resumes when the signal goes high or vice versa When using a pause trigger the pause trigger source is routed to the Counter n Gate signal input of the counter 7 50 ni com Chapter 7 Counters Other Counter Features The following sections list the other counter features available on X Series devices Cascading Counters Prescaling National Instruments You can internally route the Counter n Internal Output and Counter n TC signals of each counter to the Gate inputs of the other counter By cascading two counters together you can effectively create a 64 bit counter By cascading counters you also can enable other applications F
211. interference to radio and television reception or to experience unacceptable performance degradation install and use this product in strict accordance with the instructions in the product documentation Furthermore any changes or modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules A Caution To ensure the specified EMC performance operate this product only with shielded cables and accessories Contents About This Manual CONVENTIONS en eee en aoe RE esd ee ee A nn xvii Related Documentation ssssssseseeeeeererersssssssesessrerererererrrrssssssssssseertttteteteeeeesssssssessseet xviii Chapter 1 Getting Started Installation 538 a a seach es sede Met a a a E eect isk 1 1 Unpaekih Srni sasani E E te A E A An Dep ER 1 1 Device Self Calibration ara a a E A E A EEE A EEE 1 2 Getting Started with X Series USB Devices 1 3 USB Device Chassis Ground rss 1 3 Ferrit Istallation 228 hu nn Sn RE Re Ne avian See 1 4 Mounting X Series USB Devices 1 5 Panel Wall Months nnden vise 1 5 DIN Rail Mounin issoro sn nn he nets 1 6 USB Devre LEEDS LR RIRE ERA tev nthe Ses 1 7 USB Cable Strain Relief uen ee ED ERA 1 7 USB Device Security Cable Slot 1 8 D vic PinOuts ss see Rs Ce de a eue le a el Dv ave 1 8 D vic Speciticationss ssisstunisstanis see A Ea Ea ETE Eies 1 8 Device Accessories and Cables ccccccc
212. ior as a sample clocked buffered pulse measurement iy Note Ifa pulse does not occur between sample clocks an overrun error will occur ay Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations National Instruments For information about connecting counter signals refer to the Default Counter Timer Pinouts section Pulse versus Semi Period Measurements In hardware pulse measurement and semi period are the same measurement Both measure the high and low times of a pulse The functional difference between the two measurements is how the data is returned In a semi period measurement each high or low time is considered one point of data and returned in units of seconds or ticks In a pulse measurement each pair of high and low times is considered one point of data and returned as a paired sample in units of frequency and duty cycle high and low time or high and low ticks When reading data 10 points ina semi period measurement will get an array of five high times and five low times When you read 10 points in a pulse measurement you get an array of 10 pairs of high and low times 7 11 X Series User Manual Chapter 7 Counters Also pulse measurements support sample clock timing while semi period measurements do not Semi Period Measurement X Series User Manual In semi period measurements the counter measures a semi period on its Gate input signal after the
213. iption of the use of AI Start Trigger and AI Reference Trigger in a pretriggered DAQ operation X Series User Manual 4 36 ni com National Instruments Chapter 4 Analog Input Al Reference Trigger Signal Use AI Reference Trigger ai ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desired is the buffer size minus the number of pretrigger samples Once the acquisition begins the DAQ device writes samples to the buffer After the DAQ device captures the specified number of pretrigger samples the DAQ device begins to look for the reference trigger condition If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples the DAQ device ignores the condition If the buffer becomes full the DAQ device continuously discards the oldest samples in the buffer to make space for the next sample This data can be accessed with some limitations before the DAQ device discards it Refer to the KnowledgeBase document Can a Pretriggered Acquisition be Continuous for more information To access this KnowledgeBase go to ni com info and enter the Info Code rdcanq When the reference trigger occurs the DAQ device continues to write samples to the buffer unti
214. ircuit whose output signal is present between one output terminal and ground The programs that run on your computer and perform a specific user oriented function such as accounting program development measurement or data acquisition In contrast operating system functions basically perform the generic housekeeping of the machine which is independent of any specific application Operating system functions include the saving of data file system handling of multiple programs at the same time multi tasking network interconnection printing and keyboard user interface interaction A method of triggering in which you simulate an analog trigger using software Also called conditional retrieval A parameter of signal sources that reflects current driving ability of voltage sources lower is better and the voltage driving ability of current sources higher is better 1 Hardware A property of an event that is synchronized to a reference clock 2 Software A property of a function that begins an operation and returns only when the operation is complete A synchronous process is therefore locked and no other processes can run during this time G 14 ni com task TC terminal terminal count tgn tgs tgw timebase tout transducer trigger National Instruments Glossary In NI DAQmx a collection of one or more channels timing and triggering and other properties that apply to the task itself Conc
215. itions MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 44 hardware timed generations 5 4 6 15 position measurement 7 25 two signal edge separation measurement 7 28 bus interface 10 1 RTSI 9 4 C cable management 1 5 cables 2 4 2 7 2 8 choosing for your device 1 8 custom 2 7 NI 6320 A 4 NI 6321 6341 A 7 NI 6323 6343 A 11 NI 6351 6361 A 15 NI 6353 6363 A 21 X Series User Manual Index NI 6356 6366 A 26 NI 6358 6368 A 28 X Series devices 2 4 calibration 1 2 circuitry 2 3 calibration certificate NI resources C 2 cascading counters 7 51 Change Detection Event signal 6 24 channel scanning order MIO X Series devices 4 7 Z behavior 7 24 channels analog input 11 4 sampling with AI Sample Clock and AI Convert Clock B 2 charge injection B 1 choosing frequency measurement 7 18 circular buffered acquisition MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 45 clock 10 MHz reference 9 3 external reference 9 2 generation 9 1 PXI PXI Express and trigger signals 9 8 routing 9 1 common mode input range Simultaneous MIO X Series devices 4 42 noise differential ground referenced signals Simultaneous MIO X Series devices 4 48 differential non referenced or floating signals Simultaneous MIO X Series devices 4 50 differential signals Simultaneous MIO X Series devices 4 48 X Series User Manual signal rejection conside
216. k Timebase AO Start Trigger AO Sample Clock Delay From Start Trigger Figure 5 7 AO Sample Clock and AO Start Trigger AO Sample Clock Timebase Signal X Series User Manual The AO Sample Clock Timebase ao SampleClockTimebase signal is divided down to provide a source for AO Sample Clock You can route any of the following signals to be the AO Sample Clock Timebase signal e 100 MHz Timebase default e 20 MHz Timebase e 100 kHz Timebase e PXI CLK10 e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger AO Sample Clock Timebase is not available as an output on the I O connector You might use AO Sample Clock Timebase if you want to use an external sample clock signal but need to divide the signal down If you want to use an external sample clock signal but do not need to divide the signal then you should use AO Sample Clock rather than AO Sample Clock Timebase 5 12 ni com Chapter 5 Analog Output Getting Started with AO Applications in Software You can use an X Series device in the following analog output applications e Single point on demand generation e Finite generation e Continuous generation e Waveform generation You can perform these generations through programmed I O or DMA data transfer mechanisms Some of the applications also use start triggers and pause triggers 3 Note
217. l 0 and a mV signal is connected to channel 1 The input range for channel 0 is 10 V to 10 V and the input range of channel 1 is 200 mV to 200 mV When the multiplexer switches from channel 0 to channel 1 the input to the NI PGIA switches from 4 V to 1 mV The approximately 4 V step from 4 V to 1 mV is 1 000 of the new full scale range For a 16 bit device to settle within 0 0015 15 ppm or 1 LSB of the 200 mV full scale range on channel 1 the input circuitry must settle to within 0 000031 0 31 ppm or 1 50 LSB of the 10 V range Some devices can take many microseconds for the circuitry to settle this much To avoid this effect you should arrange your channel scanning order so that transitions from large to small input ranges are infrequent In general you do not need this extra settling time when the NI PGIA is switching from a small input range to a larger input range Insert Grounded Channel between Signal Channels Another technique to improve settling time is to connect an input channel to ground Then insert this channel in the scan list between two of your signal channels The input range of the grounded channel should match the input range of the signal after the grounded channel in the scan list Consider again the example above where a 4 V signal is connected to channel 0 and a 1 mV signal is connected to channel 1 Suppose the input range for channel 0 is 10 V to 10 V and the input range of channel 1 is 200 mV
218. l 2 AI GND Al 3 AI 3 amp Al 11 AL 3 Al GND 0 AI SENSE AI 4 Al 44 Zz Al 12 Al 4 AI GND 6 Al 5 AI 5 Al 13 Al 5 Al GND AI 6 Al 6 Al 14 Al 6 Al GND Al 7 Al 7 Al 15 Al 7 TERMINAL 68 TERMINAL 34 AI GND AO 0 AO GND AO 1 AO GND APFI O D GND P0 4 P0 0 D GND P0 5 PO 1 D GND P0 6 P0 2 D GND PO 7 5V Per 1 P2 3 E RE TERMINAL 35 TERMINAL 1 PFI 10 P2 2 PFI 0 P1 0 D GND PFI 1 P1 1 PFI 2 P1 2 D GND PFI 3 P1 3 45 V PFI 4 P1 4 D GND PFI 13 P2 5 PFI 5 P1 5 PFI 15 P2 7 PFI 6 P1 6 PFI 7 P1 7 D GND PFI 8 P2 0 PFI 9 P2 1 D GND PFI 12 P2 4 D GND PFI 14 P2 6 Figure A 6 NI PCle 6351 and NI PCle PXle 6361 Pinout A 12 ni com Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help Figure A 7 shows the pinout of the NI USB 635 1 6361 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information SJ
219. l input or output it is called P1 x or P2 x On the I O connector each terminal is labeled PFI x P1 x or PFI x P2 x In addition X Series devices have up to 32 lines of bidirectional DIO signals Using PFI Terminals to Digital Detection Events Each PFI can be configured to detect digital changes The values on the PFI lines cannot be read in a hardware timed task but they can be used to fire the change detection event For example if you wanted to do change detection on eight timed DIO lines but wanted to ensure that the value of the lines was updated every second independent of the eight lines changing you could set a PFI line up for change detection and connect a 1 Hz signal to it Connecting PFI Input Signals X Series User Manual All PFI input connections are referenced to D GND Figure 8 2 shows this reference and how to connect an external PFI 0 source and an external PFI 2 source to two PFI terminals 8 4 ni com Chapter 8 PFI PFI 0 PFI2 PFI 0 PFI 2 Source Source D GND 1 0 Connector X Series Device Figure 8 2 PFI Input Signal Connections PFI Filters You can enable a programmable debouncing filter on each PFI RTSI PXI_STAR or PXIe DSTAR lt A B gt signal When the filters are enabled your device samples the input on each rising edge of a filter clock X Series devices use an onboard osc
220. l the buffer contains the number of posttrigger samples desired Figure 4 23 shows the final buffer Reference Trigger Pretrigger Samples Posttrigger Samples l l T Complete Buffer Figure 4 23 Reference Trigger Final Buffer 4 37 X Series User Manual Chapter 4 Analog Input X Series User Manual Using a Digital Source To use AI Reference Trigger with a digital source specify a source and an edge The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Change Detection Event e Counter n Internal Output e DI Reference Trigger di ReferenceTrigger e DO Start Trigger do StartTrigger e AO Start Trigger ao StartTrigger The source also can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger Using an Analog Source When you use an analog trigger source the acquisition stops on the first rising edge of the Analog Comparison Event signal Routing Al Reference Trigger Signal to an Output Terminal You can route AI Reference Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt PXI_Trig lt 0 7 gt or PXIe DSTARC terminal All PFI terminals are configured as inputs by default Al Pause Trigg
221. lay between the Gate and the pulse on the output by a specified amount Thus the delay between the Gate and the pulse produced successively increases The increase in the delay value can be between 0 and 255 For instance if you specify the increment to be 10 the delay between the active Gate edge and the pulse on the output increases by 10 every time a new pulse is generated Suppose you program your counter to generate pulses with a delay of 100 and pulse width of 200 each time it receives a trigger Furthermore suppose you specify the delay increment to be 10 On the first trigger your pulse delay will be 100 on the second it will be 110 on the third it will be 120 the process will repeat in this manner until the counter is disarmed The counter ignores any Gate edge that is received while the pulse triggered by the previous Gate edge is in progress The waveform thus produced at the counter s output can be used to provide timing for undersampling applications where a digitizing system can sample repetitive waveforms that are higher in frequency than the Nyquist frequency of the system Figure 7 38 shows an example of pulse generation for ETS the delay from the trigger to the pulse increases after each subsequent Gate active edge GATE j OT an f OUT f D1 D2 D1 AD D3 D1 2AD Figure 7 38 Pulse Generation for ETS For information about connecting counter signals refer
222. le This data can be accessed with some limitations before the DAQ device discards it Refer to the KnowledgeBase document Can a Pretriggered Acquisition be Continuous for more information To access this KnowledgeBase go to ni com info and enter the Info Code rdcanq National Instruments 4 59 X Series User Manual Chapter 4 Analog Input X Series User Manual When the reference trigger occurs the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired Figure 4 32 shows the final buffer Reference Trigger Pretrigger Samples Posttrigger Samples l l T Complete Buffer Figure 4 32 Reference Trigger Final Buffer Using a Digital Source To use AI Reference Trigger with a digital source specify a source and an edge The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Change Detection Event e Counter n Internal Output e DI Reference Trigger di ReferenceTrigger e AO Start Trigger ao StartTrigger e DO Start Trigger do StartTrigger The source also can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger Using an Analog
223. lk is due to sampling among multiple channels at various gains In this situation the settling times can increase For more information about charge injection and sampling channels at different gains refer to the Multichannel Scanning Considerations section of Chapter 4 Analog Input I am using my device in differential analog input ground reference mode and I have connected a differential input signal but my readings are random and drift rapidly What is wrong In DIFF mode if the readings from the DAQ device are random and drift rapidly you should check the ground reference connections The signal can be referenced to a level that is considered floating with reference to the device ground reference Even if you are in DIFF mode you must still reference the signal to the same ground level as the device reference There are various methods of achieving this reference while maintaining a high B 1 X Series User Manual Appendix B Troubleshooting X Series User Manual common mode rejection ratio CMRR These methods are outlined in the Connecting Analog Input Signals section of Chapter 4 Analog Input AI GND is an AI common signal that routes directly to the ground connection point on the devices You can use this signal if you need a general analog ground connection point to the device Refer to the When to Use Differential Connections with Ground Referenced Signal Sources section of Chapter 4 Analog Input for more information H
224. ls can be routed to the Counter n Gate input e RTSI lt 0 7 gt e PFI lt 0 15 gt e Al Reference Trigger ai ReferenceTrigger e AI Start Trigger ai StartTrigger e AO Sample Clock ao SampleClock e DI Sample Clock di SampleClock e DI Reference Trigger di ReferenceTrigger e DO Sample Clock do SampleClock e PXI STAR e PXIe DSTAR lt A B gt e Change Detection Event e Analog Comparison Event In addition a counter s Internal Output or Source can be routed to a different counter s gate Some of these options may not be available in some driver software Routing Counter n Gate to an Output Terminal You can route Counter n Gate out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal All PFIs are set to high impedance at startup Counter n Aux Signal The Counter n Aux signal indicates the first edge in a two signal edge separation measurement National Instruments 7 43 X Series User Manual Chapter 7 Counters Routing a Signal to Counter n Aux Each counter has independent input selectors for the Counter n Aux signal Any of the following signals can be routed to the Counter n Aux input e RTSI lt 0 7 gt e PFI lt 0 15 gt e Al Reference Trigger ai ReferenceTrigger e Al Start Trigger ai StartTrigger e PXI STAR e __ PXIe DSTAR lt A B gt e Analog Comparison Event e Change Detection Event In addition a counter s Internal Output Gate or Source can be routed to a d
225. lse train Finite Buffered Sample Clocked Pulse Train Generation This function generates a predetermined number of pulse train updates Each point you write defines pulse specifications that are updated with each sample clock When a sample clock occurs the current pulse idle followed by active finishes generation and the next pulse updates with the next sample specifications B Note When the last sample is generated the pulse train continues to generate with these specifications until the task is stopped X Series User Manual 7 36 ni com Chapter 7 Table 7 7 and Figure 7 35 detail a finite sample clocked generation of three samples where the pulse specifications from the create channel are two ticks idle two ticks active and three ticks initial delay Table 7 7 Finite Buffered Sample Clocked Pulse Train Generation Counters Sample Idle Ticks Active Ticks 1 3 3 2 2 2 3 3 3 Counter Armed Sample Clock Counter LgadValues OT 0 Tog T Re QUE EEE MG SL Ae ee QE g Source i Out 3 2 2 2 3 3 3 3 2 2 3 3 National Instruments Figure 7 35 Finite Buffered Sample Clocked Pulse Train Generation There are several different methods of conti
226. ltage levels Specify the levels by setting the window Top value and the window Bottom value Figure 11 8 demonstrates a trigger that asserts when the signal enters the window Bottom wont PS PR Analog Comparison Event Figure 11 8 Analog Window Triggering Mode Entering Window National Instruments 11 7 X Series User Manual Chapter 11 Triggering Analog frigger Accuracy X Series User Manual The analog trigger circuitry compares the voltage of the trigger source to the output of programmable trigger DACs When you configure the level or the high and low limits in window trigger mode the device adjusts the output of the trigger DACs Refer to the specifications document for your device to find the accuracy or resolution of these DACs which also shows the accuracy or resolution of analog triggers To improve accuracy do the following Use an AI channel with a small input range instead of APFI lt 0 1 gt as your trigger source The DAQ device does not amplify the APFI lt 0 1 gt signals When using an AI channel the NI PGIA amplifies the AI channel signal before driving the analog trigger circuitry If you configure the AI channel to have a small input range you can trigger on very small voltage changes in the input signal Software calibrate the analog trigger circuitry The propagation delay from when a valid trigger condition is met to when the analog trigger circuitry emits the Analo
227. m Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DA Qmx Help or the LabVIEW Help National Instruments A 23 X Series User Manual Appendix A Device Specific Information X Series User Manual Figure A 13 shows the pinout of the NI USB 6366 Mass Termination For a detailed description of each signal refer to the I O Connector Signal Descriptions section of Chapter 3 Connector and LED Information a AI 0 68 34 Alo AI 0 GND 67 33 AI 1 AI 1 66 32 AI 1 GND Al 2 65 31 Al2 AI 2 GND 64 30 Al 3 Al 3 63 29 AI 3 GND NC 62 28 Al 4 Al 4 61 27 Al 4 GND Al 5 60 26 A15 AI 5 GND 59 25 Al 6 AI 6 58 24 Al6 GND Al 7 57 23 Al7 Al 7 GND 56 2211 Aoo AO GND 55 21 AO1 AO GND 54 20 APFI 0 D GND 53 19 P0 4 P0 0 52 18 D GND P0 5 51 17 Po D GND 50 16 Po 6 P0 2 49 15 D GND P0 7 48 14 45v P0 3 47 13 D GND PFI11 P2 3 46 12 D GND PFI 10 P2 2 45 11 PFIO P1 0 D GND 44 10 PFI1 P1 1 P
228. m low to high but glitches several times When the filter clock has sampled the signal high on two consecutive edges and the signal remained stable in between the low to high transition is propagated to the rest of the circuit National Instruments 6 25 X Series User Manual Chapter 6 Digital I O Table 6 1 Filters Pulse Width Guaranteed Pulse Width Guaranteed Filter Setting Filter Clock to Pass Filter to Not Pass Filter Short 12 5 MHz 160 ns 80 ns Medium 195 3125 kHz 10 24 us 5 12 us High 390 625 Hz 5 12 ms 2 56 ms None The filter setting for each input can be configured independently On power up the filters are disabled Figure 6 12 shows an example of a low to high transition on an input Digital Input PO x il 1 1 4 1 2 1 2 Filter Clock Filtered Input X Series User Manual Figure 6 12 Input Low to High Transition When multiple lines are configured with the same filter settings they are considered a bus There are two filtering modes for use with multiple lines line filtering and bus filtering With line filtering each line transitions independently of the other lines in the bus and acts like the behavior described above With bus filtering if any one line in the bus has jitter then all lines in the bus will hold state until the bus becomes stable
229. m such signal connections National Instruments 4 5 X Series User Manual Chapter 4 Analog Input AI ground reference setting is sometimes referred to as AI terminal configuration Configuring Al Ground Reference Settings in Software You can program channels on an MIO X Series device to acquire with different ground references To enable multimode scanning in LabVIEW use NI DAQmx Create Virtual Channel vi of the NI DAQmx API You must use a new VI for each channel or group of channels configured in a different input mode In Figure 4 3 channel 0 is configured in differential mode and channel is configured in RSE mode Differential Y DAGmx Devifait nnn Al Voltage AI Voltage fg Devi aid gt Figure 4 3 Enabling Multimode Scanning in LabVIEW To configure the input mode of your voltage measurement using the DAQ Assistant use the Terminal Configuration drop down list Refer to the DAQ Assistant Help for more information about the DAQ Assistant To configure the input mode of your voltage measurement using the NI DAQmx C API set the terminalConfig property Refer to the NI DAQmx C Reference Help for more information Multichannel Scanning Considerations X Series User Manual MIO X Series devices can scan multiple channels at high rates and digitize the signals accurately However you should consider several issues when designing your measurement system to ensure the high ac
230. measurement options e Single Pulse Measurement e Implicit Buffered Pulse Measurement e Sample Clocked Buffered Pulse Measurement e Hardware Timed Single Point Pulse Measurement Single Pulse Measurement Single on demand pulse measurement is equivalent to two single pulse width measurements on the high H and low L ticks of a pulse as shown in Figure 7 8 Source Latched Value National Instruments Figure 7 8 Single On Demand Pulse Measurement 7 9 X Series User Manual Chapter 7 Counters Implicit Buffered Pulse Measurement In an implicit buffered pulse measurement on each edge of the Gate signal the counter stores the count in the FIFO A DMA controller transfers the stored values to host memory The counter begins counting when it is armed The arm usually occurs between edges on the Gate input but the counting does not start until the desired edge You can select whether to read the high pulse or low pulse first using the StartingEdge property in NI DAQmx Figure 7 9 shows an example of an implicit buffered pulse measurement Counter Armed Gate
231. more detailed information about the NI 6368 device NI 6358 6368 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information X Series User Manual A 28 ni com Troubleshooting Analog Input This section contains common questions about X Series devices If your questions are not answered here refer to ni com support National Instruments I am seeing crosstalk or ghost voltages when sampling multiple channels What does this mean You may be experiencing a phenomenon called charge injection which occurs when you sample a series of high output impedance sources with a multiplexer Multiplexers contain switches usually made of switched capacitors When a channel for example AI 0 is selected in a multiplexer those capacitors accumulate charge When the next channel for example AI 1 is selected the accumulated current or charge leaks backward through channel 1 If the output impedance of the source connected to AI 1 is high enough the resulting reading can somewhat affect the voltage in AI 0 To circumvent this problem use a voltage follower that has operational amplifiers op amps with unity gain for each high impedance source before connecting to an X Series device Otherwise you must decrease the sample rate for each channel Another common cause of channel crossta
232. mpleClock e DO Sample Clock do SampleClock e AI Sample Clock ai SampleClock e AT Convert Clock ai ConvertClock e AO Sample Clock ao SampleClock e Counter n Sample Clock e Counter n Internal Output e Frequency Output e DI Change Detection output Several other internal signals can be routed to DI Sample Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an External Source You can route any of the following signals as DI Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger You can sample data on the rising or falling edge of DI Sample Clock 6 6 ni com Chapter 6 Digital I O Routing DI Sample Clock to an Output Terminal You can route DI Sample Clock out to any PFI lt 0 15 gt terminal The PFI circuitry inverts the polarity of DI Sample Clock before driving the PFI terminal Other Timing Requirements Your DAQ device only acquires data during an acquisition The device ignores DI Sample Clock when a measurement acquisition is not in progress During a measurement acquisition you can cause your DAQ device to ignore DI Sample Clock using the DI Pause Trigger signal The DI timing engine on your device internally generates DI Sample Clock unless you select some external source DI Start Trigger starts this timing engine and either software or hard
233. n be individually configured as a digital input DD or digital output DO All samples of static DI lines and updates of static DO lines are software timed Hardware Timed Acquisitions National Instruments With hardware timed acquisitions a digital hardware signal di SampleClock controls the rate of the acquisition This signal can be generated internally on your device or provided externally Hardware timed acquisitions have several advantages over software timed acquisitions e The time between samples can be much shorter e The timing between samples is deterministic e Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or hardware timed single point A buffer is a temporary storage in computer memory for to be transferred samples Buffered Data is moved from the DAQ device s onboard FIFO memory to a PC buffer using DMA before it is transferred to application memory Buffered acquisitions typically allow for much faster transfer rates than non buffered acquisitions because data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode acquisition refers to the acquisition of a specific predetermined number of data samples Once the specified number of samples has been read in the acquisition stops If you use a reference trigge
234. n Figure 11 4 the trigger is generated when the signal value is less than Level Analog Comparison Event Figure 11 4 Below Level Analog Triggering Mode In above level analog triggering mode shown in Figure 11 5 the trigger is generated when the signal value is greater than Level Analog Comparison Event Figure 11 5 Above Level Analog Triggering Mode National Instruments 11 5 X Series User Manual Chapter 11 Triggering Analog Edge Triggering with Hysteresis Hysteresis adds a programmable voltage region above or below the trigger level that an input signal must pass through before the DAQ device recognizes a trigger condition and is often used to reduce false triggering due to noise or jitter in the signal Analog Edge Trigger with Hysteresis Rising Slope When using hysteresis with a rising slope you specify a trigger level and amount of hysteresis The high threshold is the trigger level the low threshold is the trigger level minus the hysteresis For the trigger to assert the signal must first be below the low threshold then go above the high threshold The trigger stays asserted until the signal returns below the low threshold The output of the trigger detection circuitry is the internal Analog Comparison Event signal as shown in Figure 11 6 Hysteresis Analog Comparison Event Wares an a ae re FENTE High threshold D C
235. n example of an implicit buffered semi period measurement Counter Starting Armed Edge Gate source LALA ALAA LEE LAL 1 23 1 Counter Value 0 318 4 Buffer Figure 7 11 Implicit Buffered Semi Period Measurement For information about connecting counter signals refer to the Default Counter Timer Pinouts section Frequency Measurement National Instruments You can use the counters to measure frequency in several different ways Refer to the following sections for information about X Series frequency measurement options e Low Frequency with One Counter e High Frequency with Two Counters e Large Range of Frequencies with Two Counters e Sample Clocked Buffered Frequency Measurement e Hardware Timed Single Point Frequency Measurement Low Frequency with One Counter For low frequency measurements with one counter you measure one period of your signal using a known timebase You can route the signal to measure fx to the Gate of a counter You can route a known timebase fk to the Source of the counter The known timebase can be an onboard timebase such as 100 MHz Timebase 20 MHz Timebase or 100 kHz Timebase or any other signal with a known rate 7 13 X Series User Manual Chapter 7 3 Counters You can configure the counter to measure one period of the gate signal The frequency of fx is the inve
236. nal Instruments Chapter 6 Digital I O When the reference trigger occurs the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired Figure 6 5 shows the final buffer Reference Trigger Pretrigger Samples Posttrigger Samples T Complete Buffer Figure 6 5 Reference Trigger Final Buffer Using a Digital Source To use DI Reference Trigger with a digital source specify a source and an edge The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Change Detection Event e Counter n Internal Output e AT Reference Trigger ai ReferenceTrigger e AO Start Trigger ao StartTrigger e DO Start Trigger do StartTrigger The source also can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the measurement acquisition stops on the rising or falling edge or falling edge of DI Reference Trigger 6 11 X Series User Manual Chapter 6 Digital I O Using an Analog Source When you use an analog trigger source the acquisition stops on the first rising edge of the Analog Comparison Event signal Routing DI Reference Trigger Signal to an Output Terminal You can route DI Reference Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt PX
237. nal can be used to supply an external source for AI AO DI and DO timing signals or counter timer inputs As a PFI output you can route many different internal AI AO DI or DO timing signals to each PFI terminal You also can route the counter timer outputs to each PFI terminal As a Port or Port 2 digital I O signal you can individually configure each signal as an input or output NC No connect Do not connect signals to these terminals Though AI GND AO GND and D GND are connected on the X Series device they are connected by small traces to reduce crosstalk between subsystems Each ground has a slight difference in potential 5 V Power Source The 5 V terminals on the I O connector supply 5 V referenced to D GND Use these terminals to power external circuitry Caution Never connect the 5 V power terminals to analog or digital ground or to any other voltage source on the X Series device or any other device Doing so can damage the device and the computer NI is not liable for damage resulting from such a connection The power rating on most devices is 4 75 VDC to 5 25 VDC at 1 A Refer to the specifications document for your device to obtain the device power rating National Instruments 3 3 X Series User Manual Chapter 3 Connector and LED Information B Note PCI Express X Series Devices PCI Express X Series devices supply less than 1 A of 5 V power unless you use the di
238. nalog Input for information about how to select accessories for your X Series device This section describes some cable and accessory options for X Series devices with one or two 68 pin connectors Refer to ni com for other accessory options including new devices SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your X Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable B Note NI 6356 6358 6366 6368 Devices Simultaneous MIO SMIO X Series devices only support controlling SCXI in parallel mode Use Connector 0 of your X Series device to control SCXI in parallel and multiplexed mode NI DAQmx only supports SCXI in parallel mode on Connector 1 3 Note When using Connector 1 in parallel mode with SCXI modules that support track and hold you must programmatically disable track and hold Refer to the SCXI Advisor available by going to ni com info and entering the Info Code rdscad for more information X Series User Manual 2 4 ni com Chapter 2 DAQ System Overview SCC Accessories SCC provides portable modular signal conditioning to your DAQ system Use an SHC68 68 EPM shielded cable to connect your X Series device to an SCC module carrier such as the following e SC 2345 e SC 2350 e SCC 68 You can use either connector on MIO X Series devices to control an SCC module carrier with NI DAQmx 3 Note P
239. nary number Also used to denote the amount of memory required to store one byte of data Bayonet Neill Concelman A type of coaxial connector used in situations requiring shielded cable for signal connections and or controlled impedance applications 1 Temporary storage for acquired or generated data 2 A memory device that stores intermediate data between two devices The group of electrical conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected Examples of PC buses are the PCI AT ISA and EISA bus Celsius The process of determining the accuracy of an instrument In a formal sense calibration establishes the relationship of an instrument s measurement to the value provided by a standard When that relationship is known the instrument may then be adjusted calibrated for best accuracy A precise traceable signal source used to calibrate instruments Process of extending the counting range of a counter chip by connecting to the next higher counter G 3 X Series User Manual Glossary channel clock CMOS CMRR common mode rejection common mode signal connector convert rate count counter counter timer X Series User Manual Pin or wire lead to which you apply or from which you read the analog or digital signal Analog signals can be single ended or differential For digital signals you group chan
240. ncies with two counters measures high and low frequency signals accurately However it requires two counters and it has a variable sample time and variable error dependent on the input signal e Again the measurement time for the one counter measurement is lowest but the accuracy is lower Note that the accuracy and measurement time of the sample clocked and two counter large range are the same The advantage of the sample clocked method is that even when the frequency to measure changes the measurement time and error does not For example if you configured a large range two counter measurement to use a divide down of 50 for a 50 kHz signal then you would get the accuracy measurement time and accuracy listed in table 7 3 But if your signal ramped up to 5 MHz then with a divide down of 50 your measurement time would be 0 01 ms but your error would now be 0 001 The error with a sample 7 21 X Series User Manual Chapter 7 Counters clocked frequency measurement is not dependent on the measured frequency so at 50 kHz and 5 MHz with a measurement time of 1 ms the error will still be 0 001 One of the disadvantages of a sample clocked frequency measurement is that the frequency to be measured must be at least twice the sample clock rate to ensure that a full period of the frequency to be measured occurs between sample clocks Table 7 5 summarizes some of the differences in methods of measuring frequency Table 7 5 Frequency Me
241. ne reisiin aE r E AENEA EEE 7 3 Counting Edges sssrini eaea pE a k aE iaaa raano hespa 7 3 Single Point On Demand Edge Counting 00 0 eee eeeeeeeees 7 4 Buffered Sample Clock Edge Counting 7 5 Controlling the Direction of Counting 7 5 Pulse Width Measurement 7 6 Single Pulse Width Measurement 7 6 Implicit Buffered Pulse Width Measurement 7 7 Sample Clocked Buffered Pulse Width Measurement 7 8 Hardware Timed Single Point Pulse Width Measurement 7 8 Pulse Measurement snina nn e REE EE Ea EEE EREA 7 9 Single Pulse Measurement 7 9 Implicit Buffered Pulse Measurement 7 10 Sample Clocked Buffered Pulse Measurement 0 ee eeeeeeeeees 7 10 Hardware Timed Single Point Pulse Measurement 7 11 Pulse versus Semi Period Measurement 0 0 0 0 eseeeeeseeseeeeereeee 7 11 Semi Period Measurement 7 12 Single Semi Period Measurement 7 12 Implicit Buffered Semi Period Measurement 7 12 Frequency Measurement raren a rss inertie foresterie 7 13 Low Frequency with One Counter 7 13 High Frequency with Two Counters 0 cece eeeeseeseeeeeeeseeeaeees 7 14 Large Range of Frequencies with Two Counters 0 00 7 15 Sample Clocked Buffered Frequency Measurement 7 16 Hardware Timed Single Point Frequency Measurement 7 18 Choosing a Method for Measur
242. nel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable 1 TB 2706 uses Connector 0 of your PXI Express device After a TB 2706 is installed Connector 1 cannot be used 2 NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with X Series devices X Series User Manual 2 6 ni com Chapter 2 DAQ System Overview Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 NI offers cables and accessories for many applications However if you want to develop your own cable adhere to the following guidelines for best results e For AI signals use shielded twisted pair wires for each AI pair of differential inputs Connect the shield for each signal pair to the ground reference at the source e Route the analog lines separately from the digital lines e When using a cable shield use separate shields for the analog and digital sections of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals For more information about the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufactur
243. nels to form ports Ports usually consist of either four or eight digital channels Hardware component that controls timing for reading from or writing to groups Complementary metal oxide semiconductor Common mode rejection ratio A measure of the ability of a differential amplifier to reject interference from a common mode signal usually expressed in decibels dB The ability of an electronic system to cancel any electronic noise pick up that is common to both the positive and negative polarities of the input leads to the instrument front end Common mode rejection is only a relevant specification for systems having a balanced or differential input 1 Any voltage present at the instrumentation amplifier inputs with respect to amplifier ground 2 The signal relative to the instrument chassis or computer s ground of the signals from a differential input This is often a noise signal such as 50 or 60 Hz hum 1 A device that provides electrical connection 2 A fixture either male or female attached to a cable or chassis for quickly making and breaking one or more circuits A symbol that connects points on a flowchart Reciprocal of the interchannel delay The number of events such as zero crossings pulses or cycles 1 Software A memory location used to store a count of certain occurrences 2 Hardware A circuit that counts events When it refers to an instrument it refers to a frequency counter A circuit
244. ng Diode A semiconductor light source A filter that passes signals below a cutoff frequency while blocking signals above that frequency Least Significant Bit The quantitative determination of a physical characteristic In practice measurement is the conversion of a physical quantity or observation to a domain where a human being or computer can determine the value DAQ devices such as the X Series multifunction I O MIO devices SCXI signal conditioning modules and switch modules G 9 X Series User Manual Glossary MHz MIO MITE module monotonicity multichannel multifunction DAQ multiplex mux X Series User Manual Megahertz A unit of frequency 1 MHz 10 Hz 1 000 000 Hz Multifunction I O DAQ module Designates a family of data acquisition products that have multiple analog input channels digital I O channels timing and optionally analog output channels An MIO product can be considered a miniature mixed signal tester due to its broad range of signal types and flexibility Also known as multifunction DAQ MXI Interface To Everything A custom ASIC designed by National Instruments that implements the PCI bus interface The MITE supports bus mastering for high speed data transfers over the PCI bus A board assembly and its associated mechanical parts front panel optional shields and so on A module contains everything required to occupy one or more slots in a mainframe SCXI and PXI de
245. ng engine on multiple devices e Share trigger signals between devices Many National Instruments DAQ motion vision and CAN devices support RTSI In a PCI Express system the RTSI bus consists of the RTSI bus interface and a ribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ vision motion or CAN devices in the computer 9 4 ni com Chapter 9 Digital Routing and Clock Generation In a PXI Express system the RTSI bus is replaced by the PXI and PXI Express trigger signals on the PXI Express backplane This bus can route timing and trigger signals between several functions on as many as seven DAQ devices in the system USB devices do not support the RTSI bus RTSI Connector Pinout NI PCle 632x 634x 635x 636x Devices Figure 9 2 shows the RTSI connector pinout and Table 9 1 describes the RTSI signals Terminal 33 Terminal 1 Figure 9 2 PCI Express X Series Device RTSI Pinout Table 9 1 RTSI Signals RTSI Bus Signal Terminal RTSI 7 34 RTSI 6 32 RTSI 5 30 RTSI 4 28 RTSI 3 26 National Instruments 9 5 X Series User Manual Chapter 9 Digital Routing and Clock Generation Table 9 1 RTSI Signals Continued RTSI Bus Signal Terminal RTSI 2 24 RTSI 1 22 RTSIO 20 Not Connected Do not connect 1 18 signals to these terminals D GND 19 21 23 25 27 29 31 33
246. nge improves the voltage resolution but may result in the input signal going out of range For more information about setting ranges refer to the NI DA Qmx Help or the LabVIEW Help Table 4 5 shows the input ranges and resolutions supported by the Simultaneous MIO X Series device family Table 4 5 Simultaneous MIO X Series Device Input Range and Nominal Resolution Simultaneous MIO Nominal Resolution Assuming X Series Device Input Range 5 Over Range NI 6356 6358 6366 6368 10 V to 10 V 320 uV 5 V to5 V 160 uV 2 V to2 V 64 uV 1 Vto1 V 32 uV Working Voltage Range National Instruments On most Simultaneous MIO X Series devices the PGIA operates normally by amplifying signals of interest while rejecting common mode signals under the following three conditions e The common mode voltage V m which is equivalent to subtracting AI lt 0 x gt GND from AI lt 0 x gt must be less than 10 V This Vem is a constant for all range selections e The signal voltage V which is equivalent to subtracting AI lt 0 x gt from AI lt 0 x gt must be less than or equal to the range selection of the given channel If V is greater than the range selected the signal clips and information are lost e The total working voltage of the positive input which is equivalent to Vem V or subtracting AI lt 0 x gt GND from AI lt 0 x gt must be less than 11 V If any of these conditions a
247. ni com Chapter 6 Digital I O The Change Detection Event signal can do the following e Drive any RTSI lt 0 7 gt PFI lt 0 15 gt or PXI_STAR signal e Drive the DO Sample Clock or DI Sample Clock e Generate an interrupt The Change Detection Event signal also can be used to detect changes on digital output events DI Change Detection Applications The DIO change detection circuitry can interrupt a user program when one of several DIO signals changes state You also can use the output of the DIO change detection circuitry to trigger a DI or counter acquisition on the logical OR of several digital signals To trigger on a single digital signal refer to the Triggering with a Digital Source section of Chapter 11 Triggering By routing the Change Detection Event signal to a counter you also can capture the relative time between bus changes You also can use the Change Detection Event signal to trigger DO or counter generations Digital Filtering You can enable a programmable debouncing filter on each digital line on Port 0 When the filters are enabled your device samples the input on each rising edge of a filter clock X Series devices divide down the onboard 100 MHz or 100 kHz clocks to generate the filter clock The following is an example of low to high transitions of the input signal High to low transitions work similarly Assume that an input terminal has been low for a long time The input terminal then changes fro
248. nores any digital writes until the watchdog timer is disarmed 3 Note When the watchdog timer is enabled and the computer enters a fault condition ports that are set to tri state remain tri stated and do not go to user defined safe states X Series User Manual 6 28 ni com Chapter 6 Digital I O You can set the watchdog timer timeout period to specify the amount of time that must elapse before the watchdog timer expires The counter on the watchdog timer is configurable up to 232 1 x 8 ns approximately 34 seconds before it expires A watchdog timer can be set for all DIO and PFI lines Connecting Digital 1 0 Signals The DIO signals PO lt 0 31 gt P1 lt 0 7 gt and P2 lt 0 7 gt are referenced to D GND You can individually program each line as an input or output Figure 6 16 shows P1 lt 0 3 gt configured for digital input and P1 lt 4 7 gt configured for digital output Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 6 16 ie De pl sw TTL Signal 5 V M gt Switch y P D GND 1 0 Connector X Series Device Figure 6 16 Digital 1 0 Connections A Caution Exceeding the maximum input voltage
249. ns for data transfer are DMA and programmed I O For programmed I O transfers the CPU in the PC reads data from the DAQ device whenever the CPU receives a software signal to acquire a single data point DMA transfers use a DMA controller instead of the CPU to move acquired data from the device into computer memory Even though high speed data transfers can occur with programmed I O transfers they require the use of the CPU to transfer data DMA transfers are able to acquire data at high speeds and keep the CPU free for performing other tasks at the same time Decibel The unit for expressing a logarithmic measure of the ratio of two signal levels dB 20log10 V1 V2 for signals in volts G 5 X Series User Manual Glossary DC device DIFF differential input digital I O digital trigger DMA DMA controller chip driver E edge detection EEPROM X Series User Manual Direct current although the term speaks of current many different types of DC measurements are made including DC Voltage DC current and DC power An electronic board that performs general analog or digital I O functions on one or multiple channels connected to a PC through a bus or I O port such as PCI PXI Ethernet USB or serial Differential mode An analog input mode consisting of two terminals both of which are isolated from computer ground whose difference is measured An input circuit that actively responds to the difference
250. nt will be accurate even if the counter is armed while a pulse train is in progress If a counter is armed while the pulse is in the active state it will wait for the next transition to the active state to begin the measurement Refer to the following sections for more information about X Series pulse width measurement options e Single Pulse Width Measurement e Implicit Buffered Pulse Width Measurement e Sample Clocked Buffered Pulse Width Measurement e Hardware Timed Single Point Pulse Width Measurement Single Pulse Width Measurement With single pulse width measurement the counter counts the number of edges on the Source input while the Gate input remains active When the Gate input goes inactive the counter stores the count in the FIFO and ignores other edges on the Gate and Source inputs Software then reads the stored count X Series User Manual 7 6 ni com Chapter 7 Counters Figure 7 5 shows an example of a single pulse width measurement GATE SOURCE A Counter Value 0 Latched Value 2 ND Hseseseleceees Figure 7 5 Single Pulse Width Measurement Implicit Buffered Pulse Width Measurement An implicit buffered pulse width measurement is similar to single pulse width measurement but buffered pulse width measurement takes measurements over multiple pulses The counter counts the number of edges on the Source input while the Gate inpu
251. nuous generation that control what data is written These methods are regeneration FIFO regeneration and non regeneration modes Regeneration is the repetition of the data that is already in the buffer Standard regeneration is when data from the PC buffer is continually downloaded to the FIFO to be written out New data can be written to the PC buffer at any time without disrupting the output With FIFO regeneration the entire buffer is downloaded to the FIFO and regenerated from there Once the data is downloaded new data cannot be written to the FIFO To use FIFO regeneration the entire buffer must fit within the FIFO size The advantage of using FIFO regeneration is that it does not require communication with the main host memory once the operation is started thereby preventing any problems that may occur due to excessive bus traffic 7 37 X Series User Manual Chapter 7 Counters With non regeneration old data will not be repeated New data must be continually written to the buffer If the program does not write new data to the buffer at a fast enough rate to keep up with the generation the buffer will underflow and cause an error Continuous Buffered Sample Clocked Pulse Train Generation This function generates a continuous train of pulses with variable idle and active times Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation Each point you write sp
252. o be retriggerable The timing engine will generate the sample clocks for the configured generation in response to each pulse on a DO Start Trigger signal The timing engine ignores the DO Start Trigger signal while the clock generation is in progress After the clock generation is finished the timing engine waits for another start trigger to begin another clock generation Figure 6 8 shows a retriggerable DO of four samples DO Start Trigger DO Sample Clock National Instruments Figure 6 8 Retriggerable DO 6 19 X Series User Manual Chapter 6 Digital I O X Series User Manual Using a Digital Source To use DO Start Trigger specify a source and an edge The source can be one of the following signals e A pulse initiated by host software e PFI lt 0 15 gt e RTSI lt 0 7 gt e Al Reference Trigger ai ReferenceTrigger e Al Start Trigger ai StartTrigger e AO Start Trigger ao StartTrigger e Counter n Internal Output e DI Start Trigger di StartTrigger e DI Reference Trigger di ReferenceTrigger e Change Detection Event e PXI STAR e PXIe DSTAR lt A B gt The source also can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the waveform generation begins on the rising edge or falling edge of DO S
253. oating signal sources are outputs of transformers thermocouples battery powered devices optical isolators and isolation amplifiers An instrument or device that has an isolated output is a floating signal source When to Use Differential Connections with Floating Signal Sources Use DIFF input connections for any channel that meets any of the following conditions e The input signal is low level less than 1 V e The leads connecting the signal to the device are greater than 3 m 10 ft e The input signal requires a separate ground reference point or return signal e The signal leads travel through noisy environments e Two analog input channels AI and AI are available for the signal DIFF signal connections reduce noise pickup and increase common mode noise rejection DIFF signal connections also allow input signals to float within the common mode limits of the NI PGIA Refer to the Using Differential Connections for Floating Signal Sources section for more information about differential connections When to Use Non Referenced Single Ended NRSE Connections with Floating Signal Sources Only use NRSE input connections if the input signal meets the following conditions e The input signal is high level greater than 1 V e The leads connecting the signal to the device are less than 3 m 10 ft DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding
254. on many transducers require excitation currents or voltages bridge completion linearization or high amplification for proper and accurate operation Therefore most computer based measurement systems include some form of signal conditioning in addition to plug in data acquisition DAQ devices Sensors and Transducers Sensors can generate electrical signals to measure physical phenomena such as temperature force sound or light Some commonly used sensors are strain gauges thermocouples thermistors angular encoders linear encoders and resistance temperature detectors RTDs To measure signals from these various transducers you must convert them into a form that a DAQ device can accept For example the output voltage of most thermocouples is very small and susceptible to noise Therefore you may need to amplify or filter the thermocouple output before digitizing it The manipulation of signals to prepare them for digitizing is called signal conditioning X Series User Manual 2 8 ni com Chapter 2 DAQ System Overview For more information about sensors refer to the following documents e For general information about sensors visit ni com sensors e Ifyou are using LabVIEW refer to the LabVIEW Help by selecting Help Search the LabVIEW Help in LabVIEW and then navigate to the Taking Measurements book on the Contents tab e Ifyou are using other application software refer to Common Sensors in the NI DAQmx Help or the LabV
255. on FIFO stores the digital samples X Series devices have a DMA controller dedicated to moving data from the DI waveform acquisition FIFO to system memory The DAQ device samples the DIO lines on each rising or falling edge of a clock signal DI Sample Clock You can configure each DIO line to be an output a static input or a digital waveform acquisition input X Series devices feature the following digital input timing signals DI Sample Clock Signal DI Sample Clock Timebase Signal DI Start Trigger Signal DI Reference Trigger Signal DI Pause Trigger Signal Signals with an support digital filtering Refer to the PFI Filters section of Chapter 8 PFI for more information 6 5 X Series User Manual Chapter 6 Digital 1 0 DI Sample Clock Signal X Series User Manual The device uses the DI Sample Clock di SampleClock signal to sample the Port 0 terminals and store the result in the DI waveform acquisition FIFO You can specify an internal or external source for DI Sample Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of DI Sample Clock If the DAQ device receives a DI Sample Clock when the FIFO is full it reports an overflow error to the host software Using an Internal Source To use DI Sample Clock with an internal source specify the signal source and the polarity of the signal The source can be any of the following signals e DI Sample Clock di Sa
256. or Signal Descriptions section of Chapter 3 Connector and LED Information eo Al 0 Al 0 AI 8 Al 0 AI GND Al 1 Al 1 AI 9 Al 1 Al GND Al 2 Al 2 Al 10 Al 2 AI GND Al 3 Al 3 Al 11 Al 3 AI GND Al SENSE Al 4 Al 4 Al 12 Al 4 Al GND Al 5 Al 5 Al 13 Al 5 Al GND Al 6 Al 6 Al 14 Al 6 Al GND AI 7 Al 7 Al 15 Al 7 AI GND AO 0 AO GND AO 1 AO GND APFI 0 D GND P0 4 P0 0 D GND P0 5 P0 1 D GND P0 6 P0 2 D GND PO 7 5V P0 3 D GND PFI 11 P2 3 D GND PFI 10 P2 2 PFI 0 P1 0 D GND PFI 1 P1 1 PFI 2 P1 2 D GND PFI 3 P1 3 5V PFI 4 P1 4 D GND PFI 13 P2 5 PFI 5 P1 5 PFI 15 P2 7 PFI 6 P1 6 PFI 7 P1 7 D GND PFI 8 P2 0 PFI 9 P2 1 D GND PFI 12 P2 4 D GND PFI 14 P2 6 CONNECTOR 0 Al 0 15 TERMINAL 34 TERMINAL 1 TERMINAL 68 TERMINAL 35 Figure A 8 NI USB 6361 Mass Termination Pinout A 14 ni com Appendix A Device Specific Information B Note Refer to Table 7 9 X Series PCI Express PXI Express USB Mass Termination Device Default NI DAQmx Counter Timer Pins for a list of the default NI DAQmx counter timer pins for this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help NI 6351 6361 Specifications Refer to the NI 6351 6353 Specifications for more detailed information about the NI 6351
257. or example to improve the accuracy of frequency measurements use reciprocal frequency measurement as described in the Large Range of Frequencies with Two Counters section Prescaling allows the counter to count a signal that is faster than the maximum timebase of the counter X Series devices offer 8X and 2X prescaling on each counter prescaling can be disabled Each prescaler consists of a small simple counter that counts to eight or two and rolls over This counter can run faster than the larger counters which simply count the rollovers of this smaller counter Thus the prescaler acts as a frequency divider on the Source and puts out a frequency that is one eighth or one half of what it is accepting External Signal Prescaler Rollover Used as Source by Counter Counter Value 0 X 1 Figure 7 39 Prescaling Prescaling is intended to be used for frequency measurement where the measurement is made on a continuous repetitive signal The prescaling counter cannot be read therefore you cannot determine how many edges have occurred since the previous rollover Prescaling can be used for event counting provided it is acceptable to have an error of up to seven or one ticks Prescaling can be used when the counter Source is an external signal Prescaling is not available if the counter Source is one of the internal
258. ore information To access this document go to ni com info and enter the Info Code rdfwn3 Analog Input Timing Signals In order to provide all of the timing functionality described throughout this section MIO X Series devices have a flexible timing engine Figure 4 12 summarizes all of the timing options provided by the analog input timing engine Also refer to the Clock Routing section of Chapter 9 Digital Routing and Clock Generation X Series User Manual 4 24 ni com Chapter 4 Analog Input PFI RTSI el PFI RTSI PXI_STAR 100 kHz Timebase PXI_CLK10 PXI_STAR Analog Comparison Event Al Sample Clock Analog Comparison Ctr n Internal Output P Event Al Sample Clock SW Pulse 20 MHz Timebase Timebase Programmable o Clock 100 MHz Timebase LT Divider PFI RTSI PXI_STAR Analog Comparison Event Al Convert Clock Ctr n Internal Output Al Convert Clock Timebase Programmable e Clock Divider Figure 4 12 Analog Input Timing Options MIO X Series devices use AI Sample Clock ai SampleClock and AI Convert Clock ai ConvertClock to perform interval sampling As Figure 4 13 shows AI Sample Clock controls the sample period which is determined by the following equation 1 Sample Period Sample Rate Channel 0 i Channel 1 Convert Period lt Sample Period gt Figure 4 13 MIO X
259. ow can I use the AI Sample Clock and AI Convert Clock signals on an MIO X Series device to sample the AI channel s MIO X Series devices use AI Sample Clock ai SampleClock and AI Convert Clock ai ConvertClock to perform interval sampling As Figure B 1 shows AI Sample Clock controls the sample period which is determined by the following equation 1 sample period sample rate Channel 0 Channel 1 lt Convert Period lt a Sample Period gt Figure B 1 Al Sample Clock and Al Convert Clock AI Convert Clock controls the convert period which is determined by the following equation 1 convert period convert rate This method allows multiple channels to be sampled relatively quickly in relationship to the overall sample rate providing a nearly simultaneous effect with a fixed delay between channels B 2 ni com Analog Output Appendix B Troubleshooting Counters I am seeing glitches on the output signal How can I minimize it When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit of the DAC code changes You can build a lowpass deglitching filter to remove some of these glitches depending on the frequency and nature of the output signal Visit ni com support for more in
260. p technical support C 1 hysteresis analog edge triggering with 11 6 T O connector 3 1 NI PCIe PXIe 6341 pinout A 5 NI PCIe PXIe 6361 pinout A 12 NI PCIe PXIe 6363 pinout A 16 NI PCIe 6320 pinout A 2 NI PCIe 6321 pinout A 5 NI PCIe 6323 6343 pinout A 8 NI PCIe 6351 pinout A 12 NI PCIe 6353 pinout A 16 NI PXIe 6356 6366 pinout A 22 NI PXIe 6358 6368 pinout A 27 NI USB 6341 Screw Terminal pinout A 7 NI USB 6343 pinout A 10 NI USB 6343 Screw Terminal pinout A 10 NI USB 635 1 6361 Mass Termination pinout A 14 NI USB 6351 6361 pinout A 18 A 24 NI USB 635 1 6361 Screw Terminal pinout A 13 NI USB 6353 6363 pinout A 20 NI USB 6356 6366 pinout A 25 T O protection 6 23 8 7 National Instruments Corporation 1 9 Index implicit buffered pulse width measurement 7 7 semi period measurement 7 12 improving analog trigger accuracy 11 8 input signals using PFI terminals as 8 2 using RTSI terminals as 9 7 insertion of grounded channels between signal channels MIO X Series devices 4 8 installation hardware 1 1 NI DAQ 1 1 other software 1 1 instrument drivers NI resources C 1 instrumentation amplifier MIO X Series devices 4 2 Simultaneous MIO X Series devices 4 41 interface bus 10 1 internal source less than 40 MHz 7 53 K KnowledgeBase C 1 L LabVIEW documentation xviii LabWindows CVI documentation xix LED patterns USB devices 3 5 low impedanc
261. plicit Pulse Train Generation 0 7 36 Finite Buffered Sample Clocked Pulse Train Generation 7 36 Continuous Buffered Sample Clocked Pulse Train Generation 7 38 Frequency G n ration ss minis uentite ii hessnsiteteei tisane 7 38 Using the Frequency Generator 7 38 Frequency Division nissan tissue seus nesses die 7 39 Pulse Generation for ETS 7 40 Counter Timing Signals siiis ss scdessts ae aa rr E E 7 41 Counter n Source Signal anni Sanaa a a RE EEEa 7 41 Routing a Signal to Counter n Source 7 42 Routing Counter n Source to an Output Terminal 0 0 7 42 Counter n Gate Signal is sirena eisoes ios r aa ris SE SER RE Saioa 7 43 Routing a Signal to Counter n Gate 7 43 Routing Counter n Gate to an Output Terminal 7 43 Counter AUX Signalaren isdie eni nos ea seta eii i lean 7 43 Routing a Signal to Counter n AUX 7 44 Counter n A Counter n B and Counter n Z Signals ceeeeeeeesceereeeeeeenees 7 44 Routing Signals to A B and Z Counter Inputs 0 00 7 44 Routing Counter n Z Signal to an Output Terminal 7 44 Counter n Up_Down Signal sise 7 44 Counter n HW Arm Signal 7 45 Routing Signals to Counter n HW Arm Input 7 45 Counter n Sample Clock Signal 7 45 Using an Internal Source 7 46 Using an External Source 7 46 Routing Counter n Sample Clock to an Output Terminal 7 46 Counter n Internal Output and Counter n TC Signals 0 e
262. ports two different triggering actions e Start trigger e Pause trigger An analog or digital trigger can initiate these actions All X Series devices support digital triggering but some do not support analog triggering To find your device s triggering options refer to the specifications document for your device Refer to the AO Start Trigger Signal and AO Pause Trigger Signal sections for more information about these triggering actions Connecting Analog Output Signals AO lt 0 3 gt are the voltage output signals for analog output channels 0 1 2 and 3 AO GND is the ground reference for AO lt 0 3 gt Figure 5 2 shows how to make analog output connections to the device National Instruments 5 5 X Series User Manual Chapter 5 Analog Output Analog Output Channels Analog Output Channels 7e pes Channel 0 A02 Channel 2 BR Load V OUT Load 3 V V Load v out Load tho AG Channel 1 AOS lt Channel 3 Connector 0 Al 0 15 X Series Device Connector 1 Al 16 31 X Series Device Figure 5 2 Analog Output Connections Analog Output Timing Signals Figure 5 3 summarizes all of the timing options provided by the analog output timing engine 100 MHz Timebase DSTAR lt A B gt PFI RTS DSTAR lt A B gt Stier AO Sample Clock PFI RTSI
263. pplications using fewer functions and VIs than earlier versions of NI DAQ See instrumentation amplifier Signal sources with voltage signals that are not connected to an absolute reference or system ground Also called floating signal sources Some common example of non referenced signal sources are batteries transformers or thermocouples Non Referenced Single Ended mode All measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground The unwanted DC voltage due to amplifier offset voltages added to a signal A high performance expansion bus architecture originally developed by Intel to replace PCI PCI Express offers a theoretical maximum transfer rate that is dependent upon lane width A x1 link theoretically provides 250 MB s in each direction to and from the device Once overhead is accounted for a x1 link can provide approximately 200 MB s of input capability and 200 MB s of output capability Increasing the number of lanes in a link increases maximum throughput by approximately the same factor The period of a signal most often measured from one zero crossing to the next zero crossing of the same slope The period of a signal is the reciprocal of its frequency in Hz Period is designated by the symbol T G 11 X Series User Manual Glossary PFI PGIA physical channel Plug and Play devices posttrigger
264. press PXI Express Device Data Transfer Methods 10 1 USB Device Data Transfer Methods 10 2 PXI Express Considerations is sccsssciecacssceseess Savssvaevesssuesusescapcansstassevecaces ses aasstascavsets 10 3 PXI and PXI Express Clock and Trigger Signals 10 3 PXLEX Press he eine dt ee een ean E sens 10 3 Chapter 11 Triggering Triggering with a Digital Source ss 11 1 Triggering with an Analog Source 11 2 APFE lt 0 1 gt Terminals enean an i a aani ei des lens eee 11 3 Analog Input Channels ss 11 3 Analog Input Channels on MIO X Series Devices 11 4 Analog Input Channels on Simultaneous MIO X Series Devices 11 4 Analog Trigger Actions oere eeir eh nina hrs ts 11 4 Routing Analog Comparison Event to an Output Terminal 11 5 Analog Treger Types es sess din RS sada event nee Made does 11 5 Analog Trigger ACCUTACY tn siti A ner Maid aie Gia ean ees 11 8 Appendix A Device Specific Information NI 6320 ne TE nn EA EEE DT oy dee diesen de TT ed nee A 2 NL 6321 6034 ana NN ne in dan tel A 5 NL6323 03 43C deres nn ne OE E en A ref koe cate A 8 NL 6351 6361 tela an ines ee RATE A ie te A 12 INT 6353 0303 AEE EE ated E E oss an2 2 SE E E A E A 16 NI 6356 6306 55 558 Sie ai ie ae ade addin AAE EAER R ai A 22 INE6358 6308 inane e e e a ae N T A EEA A 27 Appendix B Troubleshooting Appendix C Technical Support and Professional Services National Instruments XV X Series User Manual Conten
265. r peripheral devices USB 2 0 retains compatibility with the original USB specification Common mode voltage Ground loop voltage Volts input high Volts input low Volts in Measured voltage Volts output high Volts output low Volts out Signal source voltage See channel 1 The plot of the instantaneous amplitude of a signal as a function of time 2 Multiple voltage readings taken at a specific sampling rate An architecture for instrumentation class multichannel data acquisition devices based on the earlier M Series architecture with added new features G 16 ni com Index Symbols 5 V power source 3 3 Numerics 10 MHz reference clock 9 3 100 kHz Timebase 9 2 100 MHz source mode 7 52 Timebase 9 2 20 MHz Timebase 9 2 A A D converter MIO X Series devices 4 2 AC coupling connections Simultaneous MIO X Series devices 4 49 accessories 2 4 2 7 2 8 choosing for your device 1 8 field wiring considerations Simultaneous MIO X Series devices 4 51 NI 6320 A 4 NI 6321 6341 A 7 NI 6323 6343 A 11 NI 6351 6361 A 15 NI 6353 6363 A 21 NI 6356 6366 A 26 NI 6358 6368 A 28 accuracy analog triggers 11 8 acquisitions circular buffered MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 45 digital waveform 6 5 National Instruments Corporation l 1 double buffered MIO X Series devices 4 10 Simultaneous MIO X Series devices 4 45 hardware timed MIO X Series
266. r you must use finite sample mode Continuous acquisition refers to the acquisition of an unspecified number of samples Instead of acquiring a set number of data samples and stopping a continuous acquisition continues until you stop the operation Continuous acquisition is also referred to as double buffered or circular buffered acquisition If data cannot be transferred across the bus fast enough the FIFO becomes full New acquisitions will overwrite data in the FIFO before it can be transferred to host memory The device generates 6 3 X Series User Manual Chapter 6 Digital I O an error in this case With continuous operations if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer the buffer could reach an overflow condition causing an error to be generated e Hardware timed single point HWTSP Typically HWTSP operations are used to read single samples at known time intervals While buffered operations are optimized for high throughput HWTSP operations are optimized for low latency and low jitter In addition HWTSP can notify software if it falls behind hardware These features make HWTSP ideal for real time control applications HWTSP operations in conjunction with the wait for next sample clock function provide tight synchronization between the software layer and the hardware layer Refer to the NI Developer Zone document NI DAQmx Hardware Timed Single Point Lateness
267. r X Series device Other devices in your system through RTSI User input through the PFI terminals User input through the PXI_STAR terminal e Routes and generates the main clock signals for the X Series device Clock Routing Figure 9 1 shows the clock routing circuitry of an X Series device ee ET 10 M A To RTSI lt 0 7 gt MHz Output Selectors Oscillator External N 100 MHz Le RTSI lt 0 7 gt Reference Timebase PXle_CLK100 Clock PLL 20 MHz PXI_STAR 3 Timebase PFI 100 kHz PXle DSTAR lt A B gt 200 F Timebase Figure 9 1 X Series Clock Routing Circuitry National Instruments 9 1 X Series User Manual Chapter 9 Digital Routing and Clock Generation 100 MHz Timebase 20 MHz Timebase 100 kHz Timebase The 100 MHz Timebase can be used as the timebase for all internal subsystems The 100 MHz Timebase is generated from the following sources e Onboard oscillator e External signal by using the external reference clock The 20 MHz Timebase can be used to generate many of the AI and AO timing signals The 20 MHz Timebase also can be used as the Source input to the 32 bit general purpose counter timers The 20 MHz Timebase is generated by dividing down the 100 MHz Timebase The 100 kHz Timebase can be used to generate many of the AI and AO timing signals The 100 kHz
268. r pulse signals The most popular type of encoder is the optical encoder which uses a rotating disk with alternating opaque areas a light source and a photodetector A voltage pulse from an external source that causes a DAQ operation to begin First In First Out memory buffer A data buffering technique that functions like a shift register where the oldest values first in come out first Many DAQ products and instruments use FIFOs to buffer digital data from an A D converter or to buffer the data before or after bus transmission The first data stored is the first data sent to the acceptor FIFOs are often used on DAQ devices to temporarily store incoming or outgoing data until that data can be retrieved or output For example an analog input FIFO stores the results of A D conversions until the data can be retrieved into system memory a process that often requires programming the DMA controller This process can take several milliseconds in some cases During this time data accumulates in the FIFO for future retrieval With a larger FIFO longer latencies can be tolerated In the case of analog output a FIFO permits faster update rates because the waveform data can be stored on the FIFO ahead of time This again reduces the effect of latencies associated with getting the data from system memory to the DAQ device A physical device or digital algorithm that selectively removes noise from a signal or emphasizes certain frequency range
269. r this device For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help National Instruments A 3 X Series User Manual Appendix A Device Specific Information NI 6320 Specifications Refer to the NI 632x Specifications for more detailed information about the NI 6320 device NI 6320 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device Refer to the Cables and Accessories section of Chapter 2 DAQ System Overview for more information X Series User Manual A 4 ni com Appendix A Device Specific Information NI 6321 6341 The following sections contain information about the NI PCIe 6321 NI PCle PXIe 6341 and NI USB 6341 devices NI 6321 6341 Pinouts Figure A 2 shows the pinout of the NI PCIe 6321 and NI PCIe PXIe 6341 devices For a detailed description of each signal refer to the I O Connector Signal Descriptions section of Chapter 3 Connector and LED Information National Instruments A 5 X Series User Manual Appendix A Device Specific Information AI 0 Al 0 Al GND AI 9 Al 1 Al 2 Al 2 Al GND Al 11 Al 3 Al SENSE Al 12 Al 4 AI 5 Al 5 Al GND Al 14 Al 6 AI 7 Al 7 Al GND AO GND AO GND D GND PO 0 PO 5 D GND PO 2 PO 7 PO 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 13 P2 5 PFI 15 P2 7 PFI 7 P1 7
270. rations differential ground referenced signals Simultaneous MIO X Series devices 4 48 configuring AI ground reference settings in software MIO X Series devices 4 6 Simultaneous MIO X Series devices 4 62 connecting analog input signals MIO X Series devices 4 11 analog output signals 5 5 counter signals B 3 digital I O signals 6 29 floating signal sources MIO X Series devices 4 13 ground referenced signal sources MIO X Series devices 4 20 PFI input signals 8 4 connecting signals analog input Simultaneous MIO X Series devices 4 46 connections differential for floating signal sources MIO X Series devices 4 19 differential for ground referenced signal sources Simultaneous MIO X Series devices 4 48 for floating signal sources Simultaneous MIO X Series devices 4 49 single ended for floating signal sources MIO X Series devices 4 19 single ended RSE configuration MIO X Series devices 4 19 connector information 3 1 NI PCIe PXIe 6341 A 5 NI PCIe PXIe 6361 A 12 ni com NI PCIe PXIe 6363 A 16 NI PCIe 6320 A 2 NI PCIe 6321 A 5 NI PCIe 6323 6343 A 8 NI PCIe 6351 A 12 NI PCIe 6353 Screw Terminal A 16 NI PXIe 6356 6366 A 22 NI PXIe 6358 6368 A 27 NI USB 6341 Screw Terminal A 7 NI USB 6343 A 10 NI USB 635 1 6361 Screw Terminal A 13 NI USB 6353 Mass Termination A 18 NI USB 6353 6363 Screw Terminal A 20 NI USB 6356 6366 Screw Terminal A 25 NI USB 6361 Mass Termin
271. rce sections contain information about X Series connector signals and power Refer to Appendix A Device Specific Information for device I O connector pinouts The PCI Express Device Disk Drive Power Connector and RTSI Connector Pinout sections refer to X Series PCI Express device power and the RTSI connector on PCI Express devices The USB Device LED Patterns section refers to the X Series USB device READY and ACTIVE LEDs 1 0 Connector Signal Descriptions Table 3 1 describes the signals found on the I O connectors Not all signals are available on all devices National Instruments 3 1 X Series User Manual Chapter 3 Connector and LED Information Table 3 1 1 0 Connector Signals Signal Name Reference Direction Description AI GND Analog Input Ground These terminals are the reference point for single ended AI measurements in RSE mode and the bias current return point for DIFF measurements All three ground references AI GND AO GND and D GND are connected on the device AI lt 0 31 gt Varies Input Analog Input Channels 0 to 31 MIO X Series Devices For single ended measurements each signal is an analog input voltage channel In RSE mode AI GND is the reference for these signals In NRSE mode the reference for each AI lt 0 15 gt signal is AI SENSE the reference for each AI lt 16 31 gt signal is AI SENSE 2 For differential measurements on MIO X Series devices AI
272. rdware timed single point HWTSP position measurement has the same behavior as a buffered sample clock position measurement i Note NI USB 634x 635x 636x Devices X Series USB devices do not support hardware timed single point HWTSP operations For information about connecting counter signals refer to the Default Counter Timer Pinouts section Two Signal Edge Separation Measurement Two signal edge separation measurement is similar to pulse width measurement except that there are two measurement signals Aux and Gate An active edge on the Aux input starts the counting and an active edge on the Gate input stops the counting You must arm a counter to begin a two edge separation measurement After the counter has been armed and an active edge occurs on the Aux input the counter counts the number of rising or falling edges on the Source The counter ignores additional edges on the Aux input X Series User Manual 7 26 ni com National Instruments Chapter 7 Counters The counter stops counting upon receiving an active edge on the Gate input The counter stores the count in the FIFO You can configure the rising or falling edge of the Aux input to be the active edge You can configure the rising or falling edge of the Gate input to be the active edge Use this type of measurement to count events or measure the time that occurs between edges on two signals This type of measurement is sometimes referred to as start stop tr
273. re accurate the final result However you may choose to decrease the number of points you average and slow down the scanning rate Suppose you want to sample 10 channels over a period of 20 ms and average the results You could acquire 500 points from each channel at a scan rate of 250 kS s Another method would be to acquire 1 000 points from each channel at a scan rate of 500 kS s Both methods take the same amount of time Doubling the number of samples averaged from 500 to 1 000 decreases the effect of noise by a factor of 1 4 the square root of 2 However doubling the number of samples in this example decreases the time the NI PGIA has to settle from 4 us to 2 Us In some cases the slower scan rate system returns more accurate results e Example 2 TIf the time relationship between channels is not critical you can sample from the same channel multiple times and scan less frequently For example suppose an application requires averaging 100 points from channel 0 and averaging 100 points from channel 1 You could alternate reading between channels that is read one point from channel 0 then one point from channel 1 and so on You also could read all 100 points from channel 0 then read 100 points from channel 1 The second method switches between channels much less often and is affected much less by settling time Analog Input Data Acquisition Methods When performing analog input measurements you either can perform software
274. re exceeded the input voltage is clamped until the fault condition is removed 4 43 X Series User Manual Chapter 4 Analog Input Analog Input Data Acquisition Methods When performing analog input measurements you either can perform software timed or hardware timed acquisitions e Software timed acquisitions With a software timed acquisition software controls the rate of the acquisition Software sends a separate command to the hardware to initiate each ADC conversion In NI DAQmx software timed acquisitions are referred to as having on demand timing Software timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data e Hardware timed acquisitions With hardware timed acquisitions a digital hardware signal AI Sample Clock controls the rate of the acquisition This signal can be generated internally on your device or provided externally Hardware timed acquisitions have several advantages over software timed acquisitions The time between samples can be much shorter The timing between samples is deterministic Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or hardware timed single point HWTSP A buffer is a temporary storage in computer memory for to be transferred samples Buffered In a buffered acquisition data is moved from the DAQ device s onboard FIFO memory to a PC
275. rements are configured the same Table 7 3 summarizes the results Table 7 3 50 kHz Frequency Measurement Methods Two Counter Sample Variable Clocked One Counter High Frequency Large Range fx 50 000 50 000 50 000 50 000 fk 100 M 100 M 1 000 100 M Measurement time mS 1 02 1 1 N 50 Max frequency error 512 25 1 000 5 Hz Max error 00102 05 2 001 From this you can see that while the measurement time for one counter is shorter the accuracy is best in the sample clocked and two counter large range measurements For another example Table 7 4 shows the results for 5 MHz Table 7 4 5 MHz Frequency Measurement Methods Two Counter Sample Variable Clocked One Counter High Frequency Large Range fx 5M 5M 5M 5M fk 100 M 100 M 1 000 100 M Measurement time mS 1 0002 1 1 N 5 000 Max Frequency error 50 01 263 k 1 000 50 Hz Max Error 001 5 26 02 001 X Series User Manual 7 20 ni com National Instruments Chapter 7 Counters Again the measurement time for the one counter measurement is lowest but the accuracy is lower Note that the accuracy and measurement time of the sample clocked and two counter large range are almost the same The advantage of the sample clocked method is that even when the frequency to measure changes the measurement time does not and error percentage varies little
276. requency Division e Pulse Generation for ETS Simple Pulse Generation Refer to the following sections for more information about the X Series simple pulse generation options e Single Pulse Generation e Single Pulse Generation with Start Trigger Single Pulse Generation The counter can output a single pulse The pulse appears on the Counter n Internal Output signal of the counter You can specify a delay from when the counter is armed to the beginning of the pulse The delay is measured in terms of a number of active edges of the Source input You can specify a pulse width The pulse width is also measured in terms of a number of active edges of the Source input You also can specify the active edge of the Source input rising or falling Figure 7 27 shows a generation of a pulse with a pulse delay of four and a pulse width of three using the rising edge of Source Counter Armed SOURCE PUU UOL LI L Figure 7 27 Single Pulse Generation X Series User Manual 7 30 ni com Chapter 7 Counters Single Pulse Generation with Start Trigger The counter can output a single pulse in response to one pulse on a hardware Start Trigger signal The pulse appears on the Counter n Internal Output signal of the counter You can route the Start Trigger signal to the Gate input of the counter You can specify a delay from the Start Trigger to the beginning of the pulse You also can sp
277. res data during an acquisition The device ignores AI Sample Clock when a measurement acquisition is not in progress During a measurement acquisition you can cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal A counter timing engine on your device internally generates AI Sample Clock unless you select some external source AI Start Trigger starts this counter and either software or hardware can stop it once a finite acquisition completes When using the AI timing engine you also can specify a configurable delay from AI Start Trigger to the first AI Sample Clock pulse By default this delay is set to two ticks of the AI Sample Clock Timebase signal When using an externally generated AI Sample Clock you must ensure the clock signal is consistent with respect to the timing requirements of AI Convert Clock Failure to do so may result in a scan overrun and will cause an error Refer to the AJ Convert Clock Signal section for more information about the timing requirements between AI Convert Clock and AI Sample Clock National Instruments 4 29 X Series User Manual Chapter 4 Analog Input X Series User Manual Figure 4 16 shows the relationship of AI Sample Clock to AI Start Trigger Al Sample Clock Timebase Al Start Trigger Al Sample Clock Delay From Start Trigger Figure 4 16 Al Sample Clock and Al Start Trigger Al Sample
278. rigger 7 31 synchronization modes 7 52 timing signals 7 41 triggering 7 50 troubleshooting B 3 counting edges 7 3 crosstalk when sampling multiple channels B 1 X Series User Manual Index CtrnSampleClock 7 45 pinouts 1 8 custom cabling 2 7 self calibration 1 2 specifications 1 8 DI change detection 6 24 D DI Sample Clock signal 6 6 DACs 5 1 di SampleClock 6 6 DAQ diagnostic tools NI resources C 1 hardware 2 1 DIFF connections system 2 1 using with floating signal sources MIO X DAQ 6202 2 2 Series devices 4 15 DAQ STC3 2 2 using with ground referenced signal data sources MIO X Series devices 4 22 acquisition methods when to use with floating signal sources Simultaneous MIO X Series devices MIO X Series devices 4 13 4 44 when to use with ground referenced generation methods 5 3 signal sources MIO X Series devices transfer methods 4 20 DMA 10 1 differential analog input troubleshooting B 1 programmed I O 10 2 differential connections USB Signal Stream 10 2 for ground referenced signal sources data acquisition methods Simultaneous MIO X Series devices MIO X Series devices 4 9 4 48 Simultaneous MIO X Series devices 4 44 for non referenced or floating signal DC coupling connections Simultaneous MIO NE X Series devices 4 49 Simultaneous MIO X Series devices Declaration of Conformity NI resources C 2 4 49 default using with floating signal sources counter terminals 7 47 MIO X Series devic
279. rse of the period Figure 7 12 illustrates this method e Interval Measured gt fx M fx Gate 1 2 3 ie sia N fk Source fk A Single Period Period of fx N_ Measurement fk fk Frequency of fx N Figure 7 12 Low Frequency with One Counter High Frequency with Two Counters For high frequency measurements with two counters you measure one pulse of a known width using your signal and derive the frequency of your signal from the result Note Counter 0 is always paired with Counter 1 Counter 2 is always paired with Counter 3 X Series User Manual In this method you route a pulse of known duration T to the Gate of a counter You can generate the pulse using a second counter You also can generate the pulse externally and connect it to a PFI or RTSI terminal You only need to use one counter if you generate the pulse externally Route the signal to measure fx to the Source of the counter Configure the counter for a single pulse width measurement If you measure the width of pulse T to be N periods of fx the frequency of fx is N T 7 14 ni com Chapter 7 Counters Figure 7 13 illustrates this method Another option is to measure the width of a known period instead of a known pulse e Width of Pulse T gt Pulse _ Pulse Gate 1 2 N
280. s These lines can induce currents in or voltages on the signal lines of the Simultaneous MIO X Series device if they run in close parallel paths To reduce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other e Do not run signal lines through conduits that also contain power lines e Protect signal lines from magnetic fields caused by electric motors welding equipment breakers or transformers by running them through special metal conduits Refer to the NI Developer Zone document Field Wiring and Noise Considerations for Analog Signals for more information Minimizing Drift in Differential Mode If the readings from the DAQ device are random and drift rapidly you should check the ground reference connections The signal can be referenced to a level that is considered floating with reference to the device ground reference Even though you are in DIFF mode you must still reference the signal to the same ground level as the device reference There are various methods of achieving this reference while maintaining a high 4 51 X Series User Manual Chapter 4 Analog Input common mode rejection ratio CMRR These methods are outlined in the Connecting Analog Input Signals section AI GND is an AI common signal that routes directly to the ground connection point on the devices You can use this signal if you need a general analog ground connec
281. s and de emphasizes others Electronic filters include lowpass band pass and highpass types Digital filters can operate on numeric data to perform equivalent operations on digitized analog data or to enhance video images The condition where a common mode voltage exists or may exist between earth ground and the instrument or circuit of interest Neither the high nor the low side of a circuit is at earth potential Signal sources with voltage signals that are not connected to an absolute reference of system ground Also called non referenced signal sources Some common examples of floating signal sources are batteries transformers and thermocouples G 7 X Series User Manual Glossary frequency ft function glitch ground H hardware triggering hysteresis VO impedance X Series User Manual The number of alternating signals that occur per unit time Feet 1 A built in execution element comparable to an operator function or statement in a conventional language 2 A set of software instructions executed by a single line of code that may have input and or output parameters and returns a value when executed An unwanted signal excursion of short duration that is usually unavoidable 1 A pin 2 An electrically neutral wire that has the same potential as the surrounding earth Normally a noncurrent carrying circuit intended for safety 3 A common reference point for an electrical system A form
282. s device The 10 MHz reference clock can be routed to the RTSI lt 0 7 gt or PFI lt 0 15 gt terminals Other devices connected to the RTSI bus can use this signal as a clock input The 10 MHz reference clock is generated by dividing down the onboard oscillator Multiple Devices Refer to the following sections for information about synchronizing multiple X Series devices PXI Express Devices On PXI Express systems you can synchronize devices to PXIe CLK100 In this application the PXI Express chassis acts as the initiator Each PXI Express module routes PXIe_CLK100 to its external reference clock Another option in PXI Express systems is to use PXI_STAR The Star Trigger controller device acts as the initiator and drives PXI_STAR with a clock signal Each target device routes PXI_STAR to its external reference clock PCI Express Devices National Instruments With the RTSI and PFI buses and the routing capabilities of X Series PCI Express devices there are several ways to synchronize multiple devices depending on your application To synchronize multiple devices to a common timebase choose one device the initiator to generate the timebase The initiator device routes its 10 MHz reference clock to one of the RTSI lt 0 7 gt or PFI lt 0 15 gt signals 9 3 X Series User Manual Chapter 9 Digital Routing and Clock Generation USB Devices All devices including the initiator device receive the 10 MHz refer
283. s devices feature up to 32 analog input AI channels up to four analog output AO channels up to 48 lines of digital input output DIO and four counters lt gt bold italic monospace Platform National Instruments The following conventions are used in this manual Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name for example AO lt 3 0 gt The symbol leads you through nested menu items and dialog box options to a final action The sequence Options Settings General directs you to pull down the Options menu select the Settings item and select General from the last dialog box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Electromagnetic Compatibility for information about precautions to take Bold text denotes items that you must select or click in the software such as menu items and dialog box options Bold text also denotes parameter names Italic text denotes variables emphasis a cross reference or an introduction to a key concept Italic text also denotes text that is a placeholder for a word or value that you must supply Text in this font denotes text or characters that you should enter from t
284. s system timing module and a peripheral device Using multiple connections enable you to create more applications because of the increased routing capabilities National Instruments 9 9 X Series User Manual Chapter 9 Digital Routing and Clock Generation Table 9 2 describes the three differential star DSTAR lines and how they are used Table 9 2 PXle DSTAR Line Descriptions Trigger Line Purpose PXIe_DSTARA Distributes high speed high quality clock signals from the system timing slot to the peripherals input PXIe_DSTARB Distributes high speed high quality trigger signals from the system timing slot to the peripherals input PXIe_DSTARC Sends high speed high quality trigger or clock signals from the peripherals to the system timing slot output The DSTAR lines are only available for PXI Express devices when used with a PXI Express system timing module For more information refer to the PXI Express Specification at www pxisa org X Series User Manual 9 10 ni com Bus Interface The bus interface circuitry of X Series devices efficiently moves data between host memory and the measurement and acquisition circuits X Series devices are available for the following platforms PCI Express PXI Express USB Data Transfer Methods Refer to the following sections for information about bus interface data transfer methods for X Series devices PCI Express PXI Express Device Data Tran
285. s the result of differences in the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground Refer to the Using Referenced Single Ended RSE Connections for Floating Signal Sources section for more information about RSE connections 4 14 ni com Chapter 4 Analog Input Using Differential Connections for Floating Signal Sources It is important to connect the negative lead of a floating source to AI GND either directly or through a bias resistor Otherwise the source may float out of the maximum working voltage range of the NI PGIA and the DAQ device returns erroneous data The easiest way to reference the source to AI GND is to connect the positive side of the signal to AI and connect the negative side of the signal to AI GND as well as to AI without using resistors This connection works well for DC coupled sources with low source impedance less than 100 Q MIO X Series Device Al Floating Signal v Source a o Al Inpedance Al GND Figure 4 4 Differential Connections for Floating Signal Sources without Bias Resistors However for larger source impedances this
286. se to produce an internal counter sample clock For sample clocked operations an external signal must be provided to supply a clock source The source can be any of the following signals e AI Sample Clock e Al Start Trigger e AI Reference Trigger e AO Sample Clock e DI Sample Clock e DI Start Trigger e DO Sample Clock e CTR z Internal Output e Freq Out e PFI lt 0 15 gt e PXI Trig lt 0 7 gt e PXIe DSTAR lt A B gt e Change Detection Event e Analog Comparison Event Not all timed counter operations require a sample clock For example a simple buffered pulse width measurement latches in data on each edge of a pulse For this measurement the measured signal determines when data is latched in These operations are referred to as implicit timed operations However many of the same measurements can be clocked at an interval with a sample clock These are referred to as sample clocked operations Table 7 1 shows the different options for the different measurements 3 Note All hardware timed single point HWTSP operations are sample clocked X Series User Manual 7 2 ni com Chapter 7 Counters Table 7 1 Counter Timing Measurements Sample Clocked Timing Measurement Implicit Timing Support Support Buffered Edge Count No Yes Buffered Pulse Width Yes Yes Buffered Pulse Yes Yes Buffered Semi Period Yes No Buffered Frequency Yes Yes Buffered Period Yes Yes Buffered Position No Yes Buffered
287. set up to be a software start trigger an output pulse appears on the ai StartTrigger line when the acquisition begins When the AI Start Trigger pulse occurs the sample counter is loaded with the number of pretrigger samples in this example four The value decrements with each pulse on AI Sample Clock until the value reaches zero The sample 4 52 ni com Chapter 4 Analog Input counter is then loaded with the number of posttrigger samples in this example three Al Start Trigger i i i i i Al Reference Trigger Don t Care Al Sample Clock i i A i i i i Sample Counter 3 12 14 10 12 12 12 14 10 National Instruments Figure 4 29 Typical Pretriggered DAQ Sequence If an AI Reference Trigger ai ReferenceTrigger pulse occurs before the specified number of pretrigger samples are acquired the trigger pulse is ignored Otherwise when the AI Reference Trigger pulse occurs the sample counter value decrements until the specified number of posttrigger samples have been acquired For more information about start and reference triggers refer to the Analog Input Triggering section Simultaneous MIO X Series devices feature the following analog input timing signals e Al Sample Clock Signal e AI Sample Clock Timebase Signal e AI Hold Complete Event Signal e AI Start Trigger Signal e AI Reference Trigger Signal e AI Pause Trigger Signal
288. sfer Methods The primary ways to transfer data across the PCI Express bus are as follows National Instruments Direct Memory Access DMA DMaA is a method to transfer data between the device and computer memory without the involvement of the CPU This method makes DMA the fastest available data transfer method NI uses DMA hardware and software technology to achieve high throughput rates and increase system utilization DMA is the default method of data transfer for PCI Express and PXI Express devices NI PCI Express X Series and PXI Express devices have eight fully independent DMA controllers for high performance transfers of data blocks One DMA controller is available for each measurement and acquisition block Analog input Analog output Counter 0 Counter 1 Counter 2 Counter 3 10 1 X Series User Manual Chapter 10 Bus Interface Digital waveform generation digital output Digital waveform acquisition digital input Each DMA controller channel contains a FIFO and independent processes for filling and emptying the FIFO This allows the buses involved in the transfer to operate independently for maximum performance Data is transferred simultaneously between the ports The DMA controller supports burst transfers to and from the FIFO Each DMA controller supports several features to optimize PCI Express PXI Express bus utilization The DMA controllers pack and unpack data through the
289. shown in Figure 7 22 ChA ChB gt lt f EN Counter Value 2 3 X 4 5 X 4 X 3 Figure 7 22 Measurements Using Two Pulse Encoders For information about connecting counter signals refer to the Default Counter Timer Pinouts section Buffered Sample Clock Position Measurement With buffered position measurement position measurement using a sample clock the counter increments based on the encoding used after the counter is armed The value of the counter is sampled on each active edge of a sample clock A DMA controller transfers the sampled values to host memory The count values returned are the cumulative counts since the National Instruments 7 25 X Series User Manual Chapter 7 Counters counter armed event that is the sample clock does not reset the counter You can route the counter sample clock to the Gate input of the counter You can configure the counter to sample on the rising or falling edge of the sample clock Figure 7 23 shows an example of a buffered X1 position measurement Counter Sample Clock Armed Sample on Rising Edge ChA ChB Count las 0 gt lt x X Buffer Figure 7 23 Buffered Position Measurement Hardware Timed Single Point Position Measurement A ha
290. signs You must refer to the documentation for your quadrature encoder to obtain timing of channel Z with respect to channels A and B You must then ensure that channel Z is high during at least a portion of the phase you specify for reload For instance in Figure 7 21 channel Z is never high when channel A is high and channel B is low Thus the reload must occur in some other phase In Figure 7 21 the reload phase is when both channel A and channel B are low The reload occurs when this phase is true and channel Z is high Incrementing and decrementing takes priority over reloading Thus when 7 24 ni com Chapter 7 Counters the channel B goes low to enter the reload phase the increment occurs first The reload occurs within one maximum timebase period after the reload phase becomes true After the reload occurs the counter continues to count as before The figure illustrates channel Z reload with X4 decoding ChA _ fF e ChB ChZ Max Timebase Counter Value 5 6 X 7 ot ay aX a Y4 Oo NW gt ou ou Figure 7 21 Channel Z Reload with X4 Decoding Measurements Using Two Pulse Encoders The counter supports two pulse encoders that have two channels channels A and B The counter increments on each rising edge of channel A The counter decrements on each rising edge of channel B as
291. sk drive power connector on the device as shown in Figure 3 1 3 Note The power available on the disk drive power connectors in a computer can vary For example consider using a disk drive power connector that is not in the same power chain as the hard drive X Series User Manual 3 4 ni com Chapter 3 Connector and LED Information 1 Device Disk Drive Power Connector 2 PC Disk Drive Power Connector Figure 3 1 Connecting to the Disk Drive Power Connector 4 Replace the computer cover and plug in and power on the computer RTSI Connector Pinout NI PCle 632x 634x 635x 636x Devices Refer to the RTSI Connector Pinout section of Chapter 9 Digital Routing and Clock Generation for information about the RTSI connector on PCI Express X Series devices USB Device LED Patterns NI USB 634x 635x 636x Devices X Series USB devices have LEDs labeled ACTIVE and READY The ACTIVE LED indicates activity over the bus The READY LED indicates whether or not the device is configured Table 3 2 shows the behavior of the LEDs Table 3 2 LED Patterns ACTIVE READY LED LED USB Device State Off Off The device is not powered or not connected to the host computer or the host computer does not have the correct version of NI DAQmx Refer to Table 2 1 X Series NI DAQmx Software Support for the NI DAQmx support information for your device Off On The device is configured but there is no activity o
292. sk drive power connector Refer to the PCI Express Device Disk Drive Power Connector section for more information PCI Express Device Disk Drive Power Connector NI PCle 632x 634x 635x 636x Devices The disk drive power connector is a four pin hard drive connector on PCI Express devices that when connected increases the current the device can supply on the 5 V terminal When to Use the Disk Drive Power Connector PCI Express X Series devices without the disk drive power connector installed perform identically to other X Series devices for most applications and with most accessories For most applications it is not necessary to install the disk drive power connector However you should install the disk drive power connector in either of the following situations e You need more power than listed in the device specifications e You are using an SCC accessory without an external power supply such as the SC 2345 Refer to the specifications document for your device for more information about PCI Express power requirements and current limits Disk Drive Power Connector Installation Before installing the disk drive power connector you must install and set up the PCI Express X Series device as described in the DAQ Getting Started guides Complete the following steps to install the disk drive power connector 1 Power off and unplug the computer 2 Remove the computer cover 3 Attach the PC disk drive power connector to the di
293. software Using an Internal Source One of the following internal signals can drive DO Sample Clock e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock e AI Sample Clock ai SampleClock e AT Convert Clock ai ConvertClock e AO Sample Clock ao SampleClock e Counter n Sample Clock e Counter n Internal Output e Frequency Output e DI Change Detection output Several other internal signals can be routed to DO Sample Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an External Source Use one of the following external signals as the source of DO Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger 6 17 X Series User Manual Chapter 6 Digital I O Routing DO Sample Clock to an Output Terminal You can route DO Sample Clock as an active low signal out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal Other Timing Requirements The DO timing engine on your device internally generates DO Sample Clock unless you select some external source DO Start Trigger starts the timing engine and either the software or hardware can stop it once a finite generation completes When using the DO timing engine you also can specify a configurable delay from DO Start Trigger to the first DO Sample Clock pulse By default this delay is two
294. sory information PCI Express PXI Express and USB Mass Termination Device Cables and Accessories A National Instruments Caution For compliance with Electromagnetic Compatibility EMC requirements this product must be operated with shielded cables and accessories If unshielded cables or accessories are used the EMC specifications are no longer guaranteed unless all unshielded cables and or accessories are installed in a shielded enclosure with properly designed and shielded input output ports 2 3 X Series User Manual Chapter 2 DAQ System Overview NI offers a variety of products to use with X Series PCI Express PXI Express and USB Mass Termination devices including cables connector blocks and other accessories as follows e Shielded cables and cable assemblies and unshielded ribbon cables and cable assemblies e Screw terminal connector blocks shielded and unshielded e RTSI bus cables e SCXI modules and accessories for isolating amplifying exciting and multiplexing signals with SCXI you can condition and acquire up to 3 072 channels e Low channel count signal conditioning modules devices and accessories including conditioning for strain gauges and RTDs simultaneous sample and hold circuitry and relays For more specific information about these products refer to ni com Refer to the Custom Cabling and Connectivity section of this chapter and the Field Wiring Considerations section of Chapter 4 A
295. sserted and another edge of the sample clock is received as shown in Figure 6 10 Pause Trigger Jo Sample Clock Figure 6 10 DO Pause Trigger with Other Signal Source 6 21 X Series User Manual Chapter 6 Digital I O Using a Digital Source To use DO Pause Trigger specify a source and a polarity The source can be one of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXISTAR e PXTe DSTAR lt A B gt e Counter n Internal Output e Counter n Gate e Al Pause Trigger ai PauseTrigger e AO Pause Trigger ao PauseTrigger e DI Pause Trigger di PauseTrigger The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the samples are paused when DO Pause Trigger is at a logic high or low level Using an Analog Source When you use an analog trigger source the samples are paused when the Analog Comparison Event signal is at a high level Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information Routing DO Pause Trigger Signal to an Output Terminal You can route DO Pause Trigger out to any RTSI lt 0 7 gt PFI lt 0 15 gt or PXIe DSTARC terminal X Series User Manual 6 22 ni com Chapter 6 Digital I O 1 0 Protection Each DIO and PFI signal is
296. t a user selected point on an incoming analog signal Triggering can be set to occur at a specific level on either an increasing or a decreasing signal positive or negative slope Analog triggering can be implemented either in software or in hardware When implemented in software LabVIEW all data is collected transferred into system memory and analyzed for the trigger condition When analog triggering is implemented in hardware no data is transferred to system memory until the trigger condition has occurred A software program that creates an end user function The process of getting an instrument ready to perform a function For example the trigger circuitry of a digitizer is armed meaning that it is ready to start acquiring data when an appropriate trigger condition is met G 2 ni com ASIC asynchronous BNC buffer bus buses C C calibration calibrator cascading National Instruments Glossary Application specific integrated circuit A proprietary semiconductor component designed and manufactured to perform a set of specific functions for a specific customer 1 Hardware A property of an event that occurs at an arbitrary time without synchronization to a reference clock 2 Software A property of a function that begins an operation and returns prior to the completion or termination of the operation Bit One binary digit either 0 or 1 Byte Eight related bits of data an eight bit bi
297. t information Reference triggers are not retriggerable National Instruments 4 35 X Series User Manual Chapter 4 Analog Input Using a Digital Source To use AI Start Trigger with a digital source specify a source and an edge The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e Counter n Internal Output e PXI STAR e PXIe DSTAR lt A B gt e Change Detection Event e AO Start Trigger ao StartTrigger e DI Start Trigger di StartTrigger e DO Start Trigger do StartTrigger The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information You also can specify whether the measurement acquisition begins on the rising edge or falling edge of AI Start Trigger Using an Analog Source When you use an analog trigger source the acquisition begins on the first rising edge of the Analog Comparison Event signal Routing Al Start Trigger to an Output Terminal You can route AI Start Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal The output is an active high pulse All PFI terminals are configured as inputs by default The device also uses AI Start Trigger to initiate pretriggered DAQ operations In most pretriggered applications a software trigger generates Al Start Trigger Refer to the AJ Reference Trigger Signal section for a complete descr
298. t remains active On each trailing edge of the Gate signal the counter stores the count in the counter FIFO DMA controller transfers the stored values to host memory Figure 7 6 shows an example of an implicit buffered pulse width measurement GATE SOURCE Counter Value Buffer N National Instruments Figure 7 6 Implicit Buffered Pulse Width Measurement X Series User Manual Chapter 7 Counters Sample Clocked Buffered Pulse Width Measurement A Sample Clocked Buffered pulse width measurement is similar to single pulse width measurement but buffered pulse width measurement takes measurements over multiple pulses correlated to a sample clock The counter counts the number of edges on the Source input while the Gate input remains active On each sample clock edge the counter stores the count in the FIFO of the last pulse width to complete A DMA controller transfers the stored values to host memory Figure 7 7 shows an example of a sample clocked buffered pulse width measurement Gate l l Source M Li 2 2 14 2 2 13 Sample Clock eef Buffer i 4 i i g 3 Figure 7 7
299. taneous MIO X Series devices use the NI DAQm x driver NI DAQmx includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example code to an existing application 4 62 ni com Chapter 4 Analog Input To locate LabVIEW LabWindows CVI Measurement Studio Visual Basic and ANSI C examples refer to the KnowledgeBase document Where Can I Find NI DAQmx Examples by going to ni com info and entering the Info Code dagmxexp For additional examples refer to zone ni com National Instruments 4 63 X Series User Manual Analog Output Many X Series devices have analog output functionality X Series devices that support analog output have either two or four AO channels that are controlled by a single clock and are capable of waveform generation Refer to Appendix A Device Specific Information for information about the capabilities of your device Figure 5 1 shows the analog output circuitry of X Series devices AO FIFO AO Data AO Sample Clock AO Reference Select Figure 5 1 X Series Analog Output Circuitry The main blocks featured in the X Series analog output circuitry are as follows e DACs Digital to analog converters DACs convert digital codes to analog voltages e AO FIFO The AO FIFO enables analog output waveform generation
300. tart Trigger Using an Analog Source When you use an analog trigger source the waveform generation begins on the first rising or falling edge of the Analog Comparison Event signal Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information Routing DO Start Trigger Signal to an Output Terminal You can route DO Start Trigger out to any PFI lt 0 15 gt RTSI lt 0 7 gt or PXIe DSTARC terminal The output is an active high pulse PFI terminals are configured as inputs by default 6 20 ni com Chapter 6 Digital I O DO Pause Trigger Signal National Instruments Use the DO Pause Trigger do PauseTrigger signal to mask off samples in a DAQ sequence That is when DO Pause Trigger is active no samples occur DO Pause Trigger does not stop a sample that is in progress The pause does not take effect until the beginning of the next sample When you generate digital output signals the generation pauses as soon as the pause trigger is asserted If the source of your sample clock is the onboard clock the generation resumes as soon as the pause trigger is deasserted as shown in Figure 6 9 Pause Trigger Sample Clock Figure 6 9 DO Pause Trigger with the Onboard Clock Source If you are using any signal other than the onboard clock as the source of your sample clock the generation resumes as soon as the pause trigger is dea
301. that counts external pulses or clock pulses timing G 4 ni com DAC DAQ DAQ device DAQ STC3 data acquisition data transfer dB National Instruments Glossary Digital to Analog Converter An electronic device often an integrated circuit that converts a digital number into a corresponding analog voltage or current In the instrumentation world DACs can be used to generate arbitrary waveform shapes defined by the software algorithm that computes the digital data pattern which is fed to the DAC 1 Data acquisition The process of collecting and measuring electrical signals from sensors transducers and test probes or fixtures and inputting them to a computer for processing 2 Data acquisition The process of collecting and measuring the same kinds of electrical signals with A D and or DIO devices plugged into a computer and possibly generating control signals with D A and or DIO devices in the same computer A device that acquires or generates data and can contain multiple channels and conversion devices DAQ devices include plug in devices PCMCIA cards and DAQPad devices which connect to a computer USB port SCXI modules are considered DAQ devices Third generation data acquisition system timing controller chip The general concept of acquiring data as in begin data acquisition or data acquisition and control See also DAQ A technique for moving digital data from one system to another Optio
302. that stops the primary counter generation Enablex Ctrx Counter Armed Source LL NAN 1 te 1 3 Figure 7 29 Finite Pulse Train Generation Four Ticks Initial Delay Four Pulses In Legacy Mode this counter operation requires two counters and does not use the embedded counter For example to generate four pulses on Counter 0 Counter 0 generates the pulse train which is gated by the paired second counter The paired counter Counter 1 generates a pulse of desired width Note Counter 0 is always paired with Counter 1 Counter 2 is always paired with Counter 3 X Series User Manual The routing is done internally Figure 7 30 shows an example finite pulse train timing diagram Counter 1 Paired Counter Counter 0 Generation Complete Figure 7 30 Finite Pulse Train Timing in Legacy Mode 7 32 ni com National Instruments Chapter 7 Counters Retriggerable Pulse or Pulse Train Generation The counter can output a single pulse or multiple pulses in response to each pulse on a hardware Start Trigger signal The generated pulses appear on the Counter n Internal Output signal of the counter You can route the Start Trigger signal to the Gate input of the counter You can specify a delay from the Start Trigger to the beginning of each pulse You also can specify the pulse width The delay and pulse w
303. the following signals e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock e AI Sample Clock ai SampleClock e AI Convert Clock ai ConvertClock e AO Sample Clock ao SampleClock e DI Change Detection output Several other internal signals can be routed to Counter n Sample Clock through internal routes Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help for more information Using an External Source You can route any of the following signals as Counter n Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event You can sample data on the rising or falling edge of Counter n Sample Clock Routing Counter n Sample Clock to an Output Terminal You can route Counter n Sample Clock out to any PFI lt 0 15 gt terminal The PFI circuitry inverts the polarity of Counter n Sample Clock before driving the PFI terminal 7 46 ni com Chapter 7 Counters Counter n Internal Output and Counter n TC Signals The Counter n Internal Output signal changes in response to Counter n TC The two software selectable output options are pulse output on TC and toggle output on TC The output polarity is software selectable for both options With pulse or pulse train generation tasks the counter drives the pulse s on the Counter n Internal Output signal The Counter n Internal Output signal can be internally routed to be a counter timer input
304. the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations Refer to the Analog Output Data Generation Methods section of Chapter 5 Analog Output for more information 10 2 ni com Chapter 10 Bus Interface PXI Express Considerations PXI clock and trigger signals are only available on PXI Express devices PXI and PXI Express Clock and Trigger Signals PXI Express National Instruments Refer to the PXI_CLK10 PXI Triggers PXI_STAR Trigger PXI_STAR Filters PXIe DSTAR lt A C gt PXIe_CLK100 and PXIe_SYNC100 sections of Chapter 9 Digital Routing and Clock Generation for more information about PXI and PXI Express clock and trigger signals X Series PXI Express devices can be installed in any PXI Express slot in PXI Express chassis PXI Express specifications are developed by the PXI System Alliance www pxisa org 10 3 X Series User Manual Triggering A trigger is a signal that causes an action such as starting or stopping the acquisition of data When you configure a trigger you must decide how you want to produce the trigger and the action you want the trigger to cause All X Series devices support internal software triggering as well as external digital triggering Some devices also support analog triggering For information about the different actions triggers can perform for each sub system of the device refer to the following sections e The
305. timebases 100MHzTimebase 20MHzTimebase or 100kHzTimebase 7 51 X Series User Manual Chapter 7 Counters Synchronization Modes The 32 bit counter counts up or down synchronously with the Source signal The Gate signal and other counter inputs are asynchronous to the Source signal so X Series devices synchronize these signals before presenting them to the internal counter Depending on how you configure your device X Series devices use one of three synchronization methods e 100 MHz Source Mode e External Source Greater than 25 MHz e External or Internal Source Less than 25 MHz 100 MHz Source Mode In 100 MHz source mode the device synchronizes signals on the rising edge of the source and counts on the third rising edge of the source Edges are pipelined so no counts are lost as shown in Figure 7 40 100 MHz Source Synchronize Count Figure 7 40 100 MHz Source Mode External Source Greater than 25 MHz With an external source greater than 25 MHz the device synchronizes signals on the rising edge of the source and counts on the third rising edge of the source Edges are pipelined so no counts are lost as shown in Figure 7 41 External Source gt 25 MHz A A Synchronize Count Figure 7 41 External Source Greater than 25 MHz X Series User Manual 7 52 ni com Chapter 7 Counters External or Internal Source Less than 25 MHz
306. timed or hardware timed acquisitions National Instruments 4 9 X Series User Manual Chapter 4 Analog Input X Series User Manual Software Timed Acquisitions With a software timed acquisition software controls the rate of the acquisition Software sends a separate command to the hardware to initiate each ADC conversion In NI DAQm x software timed acquisitions are referred to as having on demand timing Software timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data Hardware Timed Acquisitions With hardware timed acquisitions a digital hardware signal AI Sample Clock controls the rate of the acquisition This signal can be generated internally on your device or provided externally Hardware timed acquisitions have several advantages over software timed acquisitions e The time between samples can be much shorter e The timing between samples is deterministic e Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or hardware timed single point HWTSP A buffer is a temporary storage in computer memory for to be transferred samples e Buffered In a buffered acquisition data is moved from the DAQ device s onboard FIFO memory to a PC buffer using DMA before it is transferred to application memory Buffered acquisitions typically allow for much faster transfer rates than HWTSP acquisitions be
307. ting and Clock Generation Clock ROUSE 2 rte int dE bese ie eons ne R nie a en dits 9 1 100 MHZ TimebDase 2 Sentence ied Pen ee shine eaten 9 2 20 MH27 Time basen a uses Anetta dite kins cil dae a 9 2 100 KZ Tim base 528 restes ln nn n net tease 9 2 External Reference Clock eh thon eva fan nus 9 2 10 MHz Reference Clock is nement een een 9 3 Synchronizing Multiple Devices ss 9 3 PX Express Devices Dinde E E EERE EROE AOTAN EELE ES 9 3 PCLEXpress Devices E wen aan ina E 9 3 USB DEVICES s cisciretiagetsts ER Sa Aetna neo es A oleh teat 9 4 Real Time System Integration RTSI ss 9 4 RESI Connector Pinout A bone Lan TERES 9 5 Using REST as Outputs tn in nn nn rte ets 9 6 Using RTSI Terminals as Timing Input Signals eee eee eeeeereeeees 9 7 RUSE Pulters cect acini aii E a a TRS teen tee 9 7 PXI and PXI Express Clock and Trigger Signals 9 8 PXTe CLK OO Hire nn ee ne ete SN ta ie aed aed 9 8 PXI SYNCIOO fic pais oie ens evi ven main ete eis aes 9 8 PXRISCLK IO ait Sends toh oa Sn et Lae id Hagen bode edad 9 8 POTTS SOLS se heera o ler Dessus dis ro Map dents donnee tecuteveees 9 8 PXT STAR THS oem nier ne Re Mer Men ne 9 9 X Series User Manual xiv ni com Contents PXT STAR Filters is nadie casas nde den hag clawed are tend abil 9 9 PXIe DSTAR lt A CS inter catenins Hated Mad 9 9 Chapter 10 Bus Interface Data Transfer Methods use min ut nie fovea sabes austerrectabeestbeecteatens 10 1 PCI Ex
308. ting ranges refer to the NI DA Qmx Help or the LabVIEW Help Table 4 1 shows the input ranges and resolutions supported by each MIO X Series device Table 4 1 MIO X Series Device Input Range and Nominal Resolution Nominal Resolution Assuming MIO X Series Device Input Range 5 Over Range NI 632x 634x 10 V to 10 V 320 uV 5 V to5 V 160 uV 1VtolV 32 uV 200 mV to 200 mV 6 4 uV NI 635 1 6353 636 1 6363 10 V to 10 V 320 uV 5 V to5 V 160 uV 2 V to2 V 64 uV 1VtolV 32 uV 500 mV to 500 mV 16 uV 200 mV to 200 mV 6 4 uV 100 mV to 100 mV 3 2 UV National Instruments 4 3 X Series User Manual Chapter 4 Analog Input Working Voltage Range On most MIO X Series devices the PGIA operates normally by amplifying signals of interest while rejecting common mode signals under the following three conditions e The common mode voltage V m which is equivalent to subtracting AI lt 0 x gt GND from AI lt 0 x gt must be less than 10 V This Vem 18S a constant for all range selections e The signal voltage V which is equivalent to subtracting AI lt 0 x gt from AI lt 0 x gt must be less than or equal to the range selection of the given channel If V is greater than the range selected the signal clips and information are lost e The total working voltage of the positive input which is equivalent to Vem Vs or subtracting AI GND from AI lt 0
309. tion point to the device Analog Input Timing Signals X Series User Manual In order to provide all of the timing functionality described throughout this section Simultaneous MIO X Series devices have a flexible timing engine Refer to the Clock Routing section of Chapter 9 Digital Routing and Clock Generation Simultaneous MIO X Series devices use AI Sample Clock ai SampleClock to perform simultaneous sampling on all active analog channels Since there is one ADC per channel AI Sample Clock controls the sample period on all the channels in the task An acquisition with posttrigger data allows you to view data that is acquired after a trigger event is received A typical posttrigger DAQ sequence is shown in Figure 4 28 The sample counter is loaded with the specified number of posttrigger samples in this example five The value decrements with each pulse on AI Sample Clock until the value reaches zero and all desired samples have been acquired Al Start Trigger Al Sample Clock Sample Counter 4 3 12 1 0 Figure 4 28 Typical Posttriggered DAQ Sequence An acquisition with pretrigger data allows you to view data that is acquired before the trigger of interest in addition to data acquired after the trigger Figure 4 29 shows a typical pretrigger DAQ sequence The AI Start Trigger signal ai StartTrigger can be either a hardware or software signal If AI Start Trigger is
310. to 200 mV You can connect channel 2 to AI GND or you can use the internal ground refer to Internal Channels in the NI DAQmx Help Set the input range of channel 2 to 200 mV to 200 mV to match channel 1 Then scan channels in the order 0 2 1 Inserting a grounded channel between signal channels improves settling time because the NI PGIA adjusts to the new input range setting faster when the input is grounded Minimize Voltage Step between Adjacent Channels When scanning between channels that have the same input range the settling time increases with the voltage step between the channels If you know the expected input range of your signals you can group signals with similar expected ranges together in your scan list 4 8 ni com Chapter 4 Analog Input For example suppose all channels in a system use a 5 V to 5 V input range The signals on channels 0 2 and 4 vary between 4 3 V and 5 V The signals on channels 1 3 and 5 vary between 4 V and 0 V Scanning channels in the order 0 2 4 1 3 5 produces more accurate results than scanning channels in the order 0 1 2 3 4 5 4 Avoid Scanning Faster Than Necessary Designing your system to scan at slower speeds gives the NI PGIA more time to settle to a more accurate level Here are two examples to consider e Example 1 Averaging many AI samples can increase the accuracy of the reading by decreasing noise effects In general the more points you average the mo
311. to the Default Counter Timer Pinouts section X Series User Manual 7 40 ni com Chapter 7 Counters Counter Timing Signals X Series devices feature the following counter timing signals e Counter n Source Signal e Counter n Gate Signal e Counter n Aux Signal e Counter n Signal e Counter n B Signal e Counter n Z Signal e Counter n Up_Down Signal e Counter n HW Arm Signal e Counter n Sample Clock Signal e Counter n Internal Output Signal e Counter n TC Signal e Frequency Output Signal iS Note All counter timing signals can be filtered Refer to the PFI Filters section of Chapter 8 PFI for more information In this section n refers to the X Series Counter 0 1 2 or 3 For example Counter n Source refers to four signals Counter 0 Source the source input to Counter 0 Counter 1 Source the source input to Counter 1 Counter 2 Source the source input to Counter 2 or Counter 3 Source the source input to Counter 3 Each of these signals supports digital filtering Refer to the PFI Filters section of Chapter 8 PFI for more information Counter n Source Signal The selected edge of the Counter n Source signal increments and decrements the counter value depending on the application the counter is performing Table 7 8 lists how this terminal is used in various applications National Instruments 7 41 X Series User Manual Chapter 7 Counters X Series User Manual Table 7 8 Counter Applications an
312. ts Glossary Index Device Pinouts Figure A 1 NI PCIe 6320 Pinout ss A 3 Figure A 2 NI PCIe 6321 and NI PCle PXIe 6341 Pinout eee A 6 Figure A 3 NI USB 6341 Pinout ss A 7 Figure A 4 NI PCIe 6323 6343 Pinout 0 0 eee eseeseesecesecseceseeeeeseceeeseeseeeaeesees A 8 Figure A 5 NI USB 6343 Pinout ss A 10 Figure A 6 NI PCIe 6351 and NI PCIe PXIe 6361 Pinout eee A 12 Figure A 7 NI USB 6351 6361 Screw Terminal Pinout ee eects A 13 Figure A 8 NI USB 6361 Mass Termination Pinout A 14 Figure A 9 NI PCIe 6353 and NI PCIe PXIe 6363 Pinout A 16 Figure A 10 NI USB 6363 Mass Termination Pinout A 18 Figure A 11 NI USB 6353 6363 Screw Terminal Pinout eee eeeeeereeeees A 20 Figure A 12 NI PXIe 6356 6366 Pinout ee eee eeceseeeceeeceeeeseseeeeseseseeseesaeesees A 22 Figure A 13 NI USB 6366 Mass Termination Pinout A 24 Figure A 14 NI USB 6356 6366 Screw Terminal Pinout eee eee eeeeeeeeees A 25 Figure A 15 NI PXTe 6358 6368 Pinout eee eee eeeeseeeeeeseceeeeseeeeeesesneeeeeeneesees A 27 X Series User Manual xvi ni com About This Manual Conventions The X Series User Manual contains information about using the National Instruments X Series data acquisition DAQ devices with NI DAQmx 9 5 and later X Serie
313. tter In addition HWTSP can notify software if it falls behind hardware These features make HWTSP ideal for real time control applications HWTSP operations in conjunction with the wait for next sample clock function provide tight synchronization between the software layer and the hardware layer Refer to the NI Developer Zone document NI DAQmx Hardware Timed Single Point Lateness Checking for more information To access this document go to ni com info and enter the Info Code daghwt sp 3 Note NI USB 634x 6351 6353 6361 6363 Devices X Series USB devices do not support hardware timed single point HWTSP operations Analog Input Triggering Analog input supports three different triggering actions e Start trigger e Reference trigger e Pause trigger Refer to the AI Start Trigger Signal AI Reference Trigger Signal and AI Pause Trigger Signal sections for information about these triggers An analog or digital trigger can initiate these actions All MIO X Series devices support digital triggering but some do not support analog triggering To find your device triggering options refer to the specifications document for your device Connecting Analog Input Signals Table 4 3 summarizes the recommended input configuration for both types of signal sources National Instruments 4 11 X Series User Manual Chapter 4 Analog Input Table 4 3 MIO X Series Analog Input Configuration AI Ground Reference Floating Signal Sourc
314. ual Chapter 4 Analog Input Analog Input Range Mux Each MIO X Series device has one analog to digital converter ADC The multiplexers mux route one AI channel at a time to the ADC through the NI PGIA Ground Reference Settings The analog input ground reference settings circuitry selects between differential referenced single ended and non referenced single ended input modes Each AI channel can use a different mode Instrumentation Amplifier NI PGIA The NI programmable gain instrumentation amplifier NI PGIA is a measurement and instrument class amplifier that minimizes settling times for all input ranges The NI PGIA can amplify or attenuate an AI signal to ensure that you use the maximum resolution of the ADC MIO X Series devices use the NI PGIA to deliver high accuracy even when sampling multiple channels with small input ranges at fast rates MIO X Series devices can sample channels in any order and you can individually program each channel in a sample with a different input range A D Converter The analog to digital converter ADC digitizes the AI signal by converting the analog voltage into a digital number AI FIFO MIO X Series devices can perform both single and multiple A D conversions of a fixed or infinite number of samples A large first in first out FIFO buffer holds data during AI acquisitions to ensure that no data is lost MIO X Series devices can handle multiple A D conversion operations with D
315. unting Notice that counting begins when the counter is armed which occurs before the first active edge on Sample Clock Counter Armed Sample Clock Sample on Rising Edge i source _F1 IL ALL ALL AT ET Counter Value 0 i 1 2 8 ojj N Buffer Figure 7 4 Buffered Sample Clock Edge Counting Controlling the Direction of Counting In edge counting applications the counter can count up or down You can configure the counter to do the following e Always count up e Always count down e Count up when the Counter 0 B input is high count down when it is low For information about connecting counter signals refer to the Default Counter Timer Pinouts section 7 5 X Series User Manual Chapter 7 Counters Pulse Width Measurement In pulse width measurements the counter measures the width of a pulse on its Gate input signal You can configure the counter to measure the width of high pulses or low pulses on the Gate signal You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges on the Source signal while the pulse on the Gate signal is active You can calculate the pulse width by multiplying the period of the Source signal by the number of edges returned by the counter A pulse width measureme
316. urce However the noise rejection of NRSE mode is worse than DIFF mode because the AI SENSE connection is shared with all channels rather than being cabled in a twisted pair with the AI signal Using the DAQ Assistant you can configure the channels for RSE or NRSE input modes Refer to the Configuring AI Ground Reference Settings in Software section for more information about the DAQ Assistant Using Referenced Single Ended RSE Connections for Floating Signal Sources Figure 4 9 shows how to connect a floating signal source to the MIO X Series device configured for RSE mode Al lt 0 31 gt O D so E E Programmable Gain Floating Instrumentation Signal a th PA Amplifier Source Input Multiplexers sasira u o AI SENSE m Voltage h Al GND V Selected Channel in RSE Configuration 1 0 Connector Figure 4 9 RSE Connections for Floating Signal Sources Using the DAQ Assistant you can configure the channels for RSE or NRSE input modes Refer to the Configuring AI Ground Reference Settings in Software section for more information about the DAQ Assistant National Instruments 4 19 X Series User Manual Chapter 4 Analog Input Connecting Ground Referenced Signal Sources What Are Ground Referenced Signal Sources A ground referenced signal source is a signal source connected to the building system ground It is already connected to
317. ure 1 1 Grounding an NI USB 634x 635x 636x Screw Terminal Device through the Chassis Ground Lug 1 3 X Series User Manual Chapter 1 Getting Started Ferrite Installation NI USB 636x Mass Termination Devices To ensure the specified EMC performance for radiated RF emissions of the NI USB 636x Mass Termination device install the included snap on ferrite bead onto the power cable as shown in Figure 1 2 Ensure that the ferrite bead is as close to the end of the power cable as practical Install the snap on ferrite bead by opening the housing and looping the power cable once through the center of the ferrite Close the ferrite bead until the locking tabs engage securely You can order additional EMI suppression ferrites 10 2 mm length part number 781233 02 from NI 1 Power Cable 3 NI USB 636x Mass Termination Device 2 Ferrite Figure 1 2 Installing a Ferrite on an NI USB 636x Mass Termination Device X Series User Manual 1 4 ni com Chapter 1 Getting Started Mounting X Series USB Devices National Instruments NI USB 634x 635x 636x Devices You can use your X Series USB device on a desktop mount it to a wall or panel as described in the Panel Wall Mounting section or mount it to a standard DIN rail as described in the DIN Rail Mounting section Panel Wall Mounting Complete the following steps to mount your USB X Series device to a wall or panel using the USB X Series mounting kit part number 78
318. ver the bus On On The device is configured and there is activity over the bus Blinking On National Instruments 3 5 X Series User Manual Analog Input Refer to one of the following sections depending on your device e Analog Input on MIO X Series Devices NI 632x 634x 635 1 6353 6361 6363 devices can be configured for single ended and differential analog input measurements e Analog Input on Simultaneous MIO X Series Devices NI 6356 6358 6366 6368 devices can be configured for differential analog input simultaneous sampled measurements Analog Input on MIO X Series Devices Figure 4 1 shows the analog input circuitry of MIO X Series devices o 2 DIFF RSE Cc yi E 5 or NRSE NI PGIA ADC Al FIFO Al Data O O Al SENSE Input Range Al GND Selection X Al Terminal Configuration Selection Figure 4 1 MIO X Series Analog Input Circuitry The main blocks featured in the MIO X Series device analog input circuitry are as follows e T O Connector You can connect analog input signals to the MIO X Series device through the I O connector The proper way to connect analog input signals depends on the analog input ground reference settings described in the Analog Input Ground Reference Settings section Also refer to Appendix A Device Specific Information for device I O connector pinouts National Instruments 4 1 X Series User Man
319. vices are modules A characteristic of a DAC in which the analog output always increases as the values of the digital code input to it increase Pertaining to a radio communication system that operates on more than one channel at the same time The individual channels might contain identical information or they might contain different signals See MIO To assign more than one signal to a channel See also mux Multiplexer A set of semiconductor or electromechanical switches arranged to select one of many inputs to a single output The majority of DAQ cards have a multiplexer on the input which permits the selection of one of many channels at a time A switching device with multiple inputs that sequentially connects each of its inputs to its output typically at high speeds in order to measure several signals with a single analog input channel G 10 ni com NI NI DAQmx NI PGIA non referenced signal sources NRSE offset P PCI Express period National Instruments Glossary National Instruments The latest NI DAQ driver with new VIs functions and development tools for controlling measurement devices The advantages of NI DAQmx over Traditional NI DAQ Legacy include the DAQ Assistant for configuring channels and measurement tasks for your device for use in LabVIEW LabWindows CVI and Measurement Studio increased performance such as faster single point analog I O and a simpler API for creating DAQ a
320. ware can stop it once a finite acquisition completes When using the DI timing engine you also can specify a configurable delay from DI Start Trigger to the first DI Sample Clock pulse By default this delay is set to two ticks of the DI Sample Clock Timebase signal DI Sample Clock Timebase DI Start Trigger DI Sample Clock Delay From Start Trigger Figure 6 3 DI Sample Clock and DI Start Trigger DI Sample Clock Timebase Signal You can route any of the following signals to be the DI Sample Clock Timebase di SampleClockTimebase signal e 100 MHz Timebase default e 20 MHz Timebase e 100 kHz Timebase National Instruments 6 7 X Series User Manual Chapter 6 Digital 1 0 e PXI CLKI0 e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXI STAR e PXIe DSTAR lt A B gt e Analog Comparison Event an analog trigger Refer to the Routing Table in MAX for all additional routable signals DI Sample Clock Timebase is not available as an output on the I O connector DI Sample Clock Timebase is divided down to provide one of the possible sources for DI Sample Clock You can configure the polarity selection for DI Sample Clock Timebase as either rising or falling edge except for the 100 MHz Timebase or 20 MHz Timebase You might use DI Sample Clock Timebase if you want to use an external sample clock signal but need to divide the signal down If you want to use an external sample
321. www pxisa org PXIe_SYNC100 is a common low skew 10 MHz reference clock with a 10 duty cycle for synchronization of multiple modules in a PXI Express measurement or control system This signal is used to accurately synchronize modules using PXIe_CLK100 along with those using PXI_CLK10 The PXI Express backplane is responsible for generating PXIe_SYNC100 independently to each peripheral slot in a PXI Express chassis For more information refer to the PXI Express Specification at www pxisa org PXI_CLK10 is a common low skew 10 MHz reference clock for synchronization of multiple modules in a PXI measurement or control system The PXI backplane is responsible for generating PXI_CLK10 independently to each peripheral slot in a PXI chassis i Note PXI_CLK10 cannot be used as a reference clock for X Series devices PXI Triggers X Series User Manual A PXI chassis provides eight bused trigger lines to each module in a system Triggers may be passed from one module to another allowing precisely timed responses to asynchronous external events that are being monitored or controlled Triggers can be used to synchronize the operation of several different PXI peripheral modules On X Series devices the eight PXI trigger signals are synonymous with RTSI lt 0 7 gt 9 8 ni com Chapter 9 Digital Routing and Clock Generation Note that in a PXI chassis with more than eight slots the PXI trigger lines may be divided into multiple independent

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