EDP-CM-LPC1113 CPU Module User Manual Version 1.00
Contents
1. Break Out Base Board Signal Name EDPCON1 EDPCON2 Connector HCSO 53854 HCS1 55856 HCS2 57 amp 58 HCS3 59 amp 60 HPSEN 51852 HRD 45 amp 46 P603 26 P603 27 HVVR 47 amp 48 WRH 49 amp 50 P603 47 P603 47 P603 47 P603 47 P603 48 P603 48 P603 48 P603 48 P603 44 P603 44 P603 44 P603 42 P603 45 P603 45 P603 45 AO ADO 41 amp 42 A1_AD1 39 amp 40 A2_AD2 37 amp 38 A3_AD3 35 amp 36 A4_AD4 33 amp 34 A5 AD5 318 32 A6 AD6 29 amp 30 A7_AD7 27 amp 28 A8_AD8 25 amp 26 A9_AD9 23 amp 24 A10_AD10 21 amp 22 A11_AD11 19 amp 20 A12_AD12 17 amp 18 A13_AD13 15 amp 16 A14_AD14 13 amp 14 A15_AD15 11 amp 12 ALE 43 amp 44 P601 6 ANO 3 P603 2 AN1 4 P603 6 AN2 5 P603 1 AN3 6 P603 5 AN4 7 P602 2 AN5 8 P602 4 AN6 9 P602 1 AN7 10 P602 3 AN8 11 P601 2 AN9 12 P601 4 AN10 13 P601 1 Electrocomponents plc Page 8 AN11 14 P601 3 AN12 15 P603 4 AN13 16 P602 6 AN14 17 P603 3 AN15 18 P602 5 ASCO RX TTL 89 P602 30 ASCO TX TTL 91 P602 31 ASC1 RX TTL 93 P602 32 ASC1 RX TTL ASCO DSR 99 P602 35 ASC1 TX TIL 95 P602 33 ASC1 TX TTL ASCO DTR 97 P602 34 CANO RX 61 amp 62 CANO_TX 63 amp 64 CAN1 RX 121 P602 46 CAN2. SPI SSC MRST MISO 94 P601 34 SPI_SSC_MTSR_MOSI 96 P601 35 P603 39 P603 38 P603 37 P603 36 P601 P601 P603 43 P603 43 P603 43 Note This spread sheet is derived from the Pin Allocation Spreadsheet for this CPU Module The user manual for the base board also contains details of the back plane signals and the pin outs 2 5 Mapping Aid GPI014 MCIPVVR 4 45 JPlO1 5 HRTS CT32B0 CAPO lt EVMS GP1047 EVM3 GPIO43 1P435 a P _5 RTS X GPI012 MCICMD 23 _ PlOO_7 HCTS E 3 EVM9 GPI055 1P436 EVM2_GPI041_CAPADC a 2 GP1010 MCICLX 11 p027 12 Pio2 8 Be ASC1 TX TIL E EVM7_GPIO51 ano L RE 40 Pio1_4 AD5 CT32B1_MAT3 WAKEUP EL Es sn 42 Pion 11 AD7 P An12 gt z JASCO_RX_TTL gt JP440 C ANG gt a6 _ Plo1_6 RXD CT32B0_MATO ana 3 1 VCC CM asco TX TIL 1P439 di EVGO GPIO40 ay 47 _ p1017 TXD CT3280 MATL 1 4 Ploo_1 CLKOUT CT3280_MAT2 ANAS JP409 1 MOTORPOH 1 Pl02 6 lt gt EVG1 GPl042 EES CRE 36 P103_0 0TR ies CPU DACO0 GPl
3. JP410 2 1 MOTORHO_ENCO JP410 2 3 Default PIO3_2 DCD JP412 2 1 MOTORPOL JP412 2 3 Default PIO3_3 RI JP413 2 1 MOTORH1_ENC1 JP413 2 3 Default PIO3 4 JP435 2 3 GPI012 MCI CMD JP435 2 1 Default PIO3 5 JP433 2 3 GPIO2 MCI DATO JP433 2 1 Default ALL Not Connected Options As the circuit board for the LPC1113 is also used for higher pin count MCU such as LPC2368 and LPC1768 there are some configurations options that are not used These are shown on the circuit schematic but do not have any relevance for this LPC1113 module as the pins are not connected These jumper options are detailed below JP401 2 1 Default AN2 JP401 2 3 AN10 JP402 2 1 Default AN1 JP402 2 3 AN9 JP404 2 1 Default AN5 JP404 2 3 AN13 JP408 2 1 Default AN3 JP408 2 4 AN11 JP408 2 3 CPU DACOO GPIO17 JP414 2 1 MOTORH2_ENC2 Electrocomponents plc Page 15 JP414 2 3 Default MOTORP1H JP415 2 3 Default JP415 2 1 JP416 2 1 MOTORP1L JP416 2 3 Default JP419 2 1 CANO_TX JP419 2 4 Default CANO TX LOCAL JP419 2 3 I2C GENO SDA JP420 2 1 CANO RX JP420 2 4 Default CANO RX LOCAL JP420 2 3 I2C GENO SCL JP423 2 1 Default IRQ GPIO16 CNTRL I2C INT JP423 2 3 IRQ GPIO18 I2C GENO INT
4. 11 PIO2 7 2 Link options EVM2 GPIO41 CAPADC 2 Link options GPIO10_MCICLK 17 PIO1 9 CT16B1 MATO 3 link options GPI09_12S_RX_WS 3 link options EVM1_GPIO23 3 link options CPU_DACOO_GPIO17 14 PIOO_3 2 link option GPIO7_I2S_RX_CLK 2 Link options EVMO_GPIO21 47 PIO1_7 TXD CT32B0_MAT1 3 Link options ASCO_TX_TTL 3 link options AN7 3 link options AN15 46 PIO1 6 RXD CT32B0 MATO 3 Link options ASCO_RX_TTL 3 link options AN6 3 link options AN14 Electrocomponents plc Page 5 2 2 Resources Used Available by LPC1113 Resources Used Available to LPC1113 ANO AN4 AN6 AN7 AN8 AN12 AN14 AN15 ASCO_TX_TTL ASCO_RX_TTL ASC1_TX_TTL ASC1_RX_TTL ASC1 TX TTL ASCO DTR CAN1 RX CNTRL I2C SCL CNTRL I2C SDA CPU DACOO GPI017 CPU DAC01 GPI019 EVGO GPIO40 EVG1 GPIO42 EVG2_GPI044 EVG3 GPIO46 EVG4 GPIO48 EVG5 GPIO50 EVG6 GPIO52 EVG7 GPIO54 EVG8 GPIO56 EVG9 GPIO57 EVG10 GPIO58 EVG11 GPIO59 EVG12_GPIO60 EVG13_GPIO61 EVG17_GPIO65 EVG18 GPIO66 EVG19_GPIO67 EVMO GPIO21 EVM1 GPIO23 EVM2 GPIO41 CAPADC EVM3 GPIO43 EVM4 GPIO45 EVM5 GPIO47 EVM6_GPI049 EVM7 GPIO51 EVM8 GPIO53 EVM9 GPIO55 GPI00 GPIO1 GPIO2 MCIDATO GPIO7 125 RX CLX GPIO9 125 RX VVS GPI010_MCICLK GP1012_MCICMD GPI014_MCIPWR Electrocomponents plc Page 6 MOTORPOH MOTORPOL MOTORHO ENCO MOTORH1 EN
5. check the software to see if the baud rate has been changed Some of the provided software may includes 5 1 RSEDP_Test_Suite This software exercises the NXP LPC1113 MCU peripherals including the on board ADC PWM output input capture I2C and 1 0 The software also allows you to exercise the basic Application Modules which are the Communication Module the Digital 1 0 Module and the Analogue Module A suite of drivers and test menus are provided to fully exercise all the hardware on these boards 5 2 MC1 Test Suite This is similar to the RSEDP Test Suite but the test menus provided are for the MC1 Brushed DC Motor Drive Application Module The motors are nominally 12V brushed DC motors running in a full H bridge configuration The test suite allovvs you to accelerate the motor change its direction turn the brake on and off as well as allowing the monitoring of motor current DC link voltage and tacho feedback signals The MC1 motor drive module also has many external inputs for limit switch detection and conditioning of motor related stimuli The provided software library will therefore allow you to fully exercise your motor Electrocomponents plc Page 17 5 3 MC2 Test Suite This is similar to the MC1 test suite but for brushless DC AC motors The softvvare assumes you have an MC2 motor drive module fitted and you want to communicate to it via I2C packets This set of software therefore allows you communicate with the MC2
6. exercise each of the modules independently of the others This therefore provides working example of the code which will allow students and users to cut and paste various sections into their own applications Each Applications Module has its own collection of header files which provides the support for the functions that control it Each module has its own set of high level functions that can be called to operate and control the hardware This makes life a lot easier for the user who can then spend most of his time working at the higher level application layer The software has been packed up as several ZIP file which can be downloaded and unpacked Most of the projects have been written for the Keil uVision environment The majority of the applications written use the serial comm channel ASCO for outputting data to a terminal emulator With this in mind a serial terminal emulation program should be used to read traffic outputted from the RS EDP platform Hyper Terminal is included in windows as part of the Windows Operating system but this does not work reliability With this in mind it may be worth looking at other terminal emulator especially if they are to be used with USB RS232 converters The terminal emulator should be set up for 115 200 baud 8 data bits no stop bit no parity No flow control The default jumper options for JP439 and JP430 should be left in place to ensure serial traffic is routed to the communication module Always
7. 017 g JP412 24 PIO2_9 MOTORPOL EVG2_GPI044 RES 43 pio3_2 oco C 1429 CPU DACO01 GPl019 25 Po io EVG3_GPIO46 MOTORP2H JPA RS 10 Pioo 2 SSELO CT1680 CAPO 1P428 man O amp PIO2_2 DCD MISO1 22 JP418 EVG19 GPIO67 MOTORP2L 27 __ pioo_8 misoo cr1680_MaTo EVG18 GPI066 m JP407 EVG5_GPI050 30 Pioa 10 AD6 CT1681 MAT1 EvG8 GPIO56 JP411 EMG_TRAP EVGO0 GPIO40 c 2 88 _ fpio2 3 Rymosi m EVG11_GPIO59 JP421 Pioo 2 fploz o orr sseLt MOTORHO ENCO JEMO a 0 DTR s EVG6_GPIO52 37 PI03_1 0SR EvG10_GP1058 JP422 GR 31 Ploz_11 Scko IMOTORH1 ENC1 a n all ES EVG7_GPIO54 EVG13 GPl061 68 J03 3 RI 1PASB GPIO7_12S_RX_CLK d 14 003 EVMO_GPIO21 EvM6 GPl049 on GPIO2 MCIDATO E M JP437 GPIO9_12S_RX_WS re 1P434 17 PPlO1 9 CT1681 MATO EVM1_GP1023 9 Plo1 8 cT1681_caPo CPU DACO0 GPl017 gt b Pos ionali 1434 _5 no USB functionality 22 Pl00 6 scx0 ASC1 RX TIL E 19 PI02 4 no USB functionality EVM8 GPIO53 CNTRL I2 SCL lt lis oo asc e 1P426 ASC1 TX TIL ASCO DTR 13 PlO2_1 DSR SCK1 CNTRL 12 SDA E ns _ fioo 5 50A CANL RX Electrocomponents plc Page 11 3 Solder Link Options Many of the options for the Command Module board require a solder bridge to be made or a track to be cut The CM board has been designed to be configured in the most popular setting by using a small track between the options which will require cutting
8. 1 TX 123 P602 47 CANHO 89 amp 90 P603 40 CANLO 91 amp 92 P603 41 CNTRL_I2C_SCL 79 amp 80 P603 35 CNTRL_I2C_SDA 77 amp 78 P603 34 CNTRL_SPI_ CS_NSS 75 amp 76 P603 33 CNTRL_SPI_CLK 69 amp 70 P603 30 CNTRL_SPI_MRST 71 amp 72 P603 31 CNTRL_SPI_MTSR 73 amp 74 P603 32 CPU DACOO GPIO17 38 P603 CPU DACO1 GPI019 40 P601 EMG TRAP 114 P601 44 ETH LNX LED 111 P602 41 ETH RX 109 P602 40 ETH RX LED 113 P602 42 ETH_RX 107 P602 39 ETH_SPD_LED 145 P602 43 ETH TX 105 P602 38 ETH_TX 103 P602 37 EVGO_GPIO40 61 P602 16 EVG1_GPI042 63 P602 17 EVG2_GPI044 65 P602 18 EVG3_GPI046 67 P602 19 EVG4_GPI048 69 P602 20 EVG5_GPIO50 71 P602 21 EVG6 GPIO52 73 P602 22 EVG7_GPIO54 75 P602 23 EVG8_GPIO56 77 P602 24 EVG9 GPIO57 78 P601 26 EVG10 GPIO58 79 P602 25 EVG11 GPIO59 80 P601 27 EVG12 GPIO60 81 P602 26 EVG13 GPIO61 82 P601 28 EVG14_GPIO62 83 P602 27 EVG15_GPIO63 84 P601 29 EVG16_GPIO64 85 P602 28 EVG17 GPIO65 86 P601 30 EVG18_GPIO66 87 P602 29 EVG19_GPIO67 88 P601 31 EVG20_GPIO69_ASCO_RTS 92 P601 33 EVMO_GPIO21 42 P601 EVM1 GPIO23 44 P601 EVM2 GPIO41 CAPADC 62 P601 18 EVM3 GPIO43 64 P601 19 EVM4 GPIO45 66 P601 20 EVM5_GPIO47 68 P601 21 EVM6_GPIO49 70 P601 22 Electrocomponents plc Page 9 EVM7 GPIO51 72 P601 23 EVM8 GPIO53 74 P601 24
9. C1 MOTORP2H MOTORP2L EMG TRAP Local User LED1 2 3 Alphabetical Listing of MCU Pins Pin Alphabetic Listing of Available 1 0 3 HRESET PIOO O 4 PIOO_1 CLKOUT CT32B0_MAT2 10 PIOO_2 SSELO CT16B0_CAPO 14 PIOO 3 15 PIOO 4 SCL 16 PIOO 5 SDA 22 PIOO_6 SCKO 23 PIOO_7 CTS 27 PIOO 8 MISO0 CT16BO MATO 40 PIO1_4 AD5 CT32B1_MAT3 WAKEUP 45 PIO1_5 RTS CT32B0_CAPO 46 PIO1_6 RXD CT32B0_MATO 47 PIO1_7 TXD CT32B0_MAT1 9 PIO1_8 CT16B1_CAPO 17 PIO1 9 CT16B1 MATO 30 PIO1 10 AD6 CT16B1 MAT1 42 PIO1 11 AD7 2 PIO2_O DTR SSEL1 13 PIO2_1 DSR SCK1 26 PIO2_2 DCD MISO1 38 PIO2_3 RI MOSI1 19 PIO2_4 20 PIO2 5 1 PIO2 6 11 PIO2 7 12 PIO2 8 24 PIO2 9 25 PIO2 10 31 PIO2_11 SCK0 36 PIO3_O DTR 37 PIO3_1 DSR 43 PIO3_2 DCD 48 PIO3_3 RI 18 PIO3 4 21 PIO3 5 29 SWCLK PIOO_10 SCKO CT16BO_MAT2 32 TDI PIOO_11 ADCO CT32B0_MAT3 34 amp 28 TDO PIO1 1 AD2 CT32B1 MATO amp PIOO_9 MOSIO CT16BO_MAT1 33 amp 39 TMS PIO1 O AD1 CT32B1 CAPO 8 SVVDIO PIO1 3 AD4 CT32B1 MAT2 35 TRST PIO1 2 AD3 CT32B1 MAT1 44 VDDCORE 8 VDDIO 5 VSSIO 41 VSSIO 6 XTALIN Electrocomponents plc Page 7 7 XTALOUT 2 4 Backplane Base Board Signals
10. EVM9 GPIO55 76 P601 25 EVM10 GPI068 ASCO CTS 90 P601 32 GPIOO 21 P603 13 GPIO1 22 P603 15 GPIO2 MCI DATO 23 P603 14 GPIO3 24 P603 16 GPIO4 MCI DAT1 25 P603 17 GPIO5_12S_TX_WS 26 P603 19 GPIO6 MCI DAT2 27 P603 18 GPIO7 I2S RX CLX 28 P603 20 GPIO8 MCI DAT3 29 P603 22 GPIO9 12S RX VVS 30 P603 21 GPIO10 MCI CLX 31 P603 23 GPIO11 12S RX SDA 32 P603 24 GPIO12 MCI CMD 33 GPIO13 12S TX CLR 34 P603 25 GPI014_MCI_PWR 35 P603 12 GPI015_12S_TX_SDA 36 P603 GPIO24 AD7 45 P602 GPIO25 AD15 46 P601 10 GPIO26 AD6 47 P602 9 GPIO27 AD14 48 P601 11 GPIO28 AD5 49 P602 10 GPIO29 AD13 50 P601 12 GPIO30 AD4 51 P602 11 GPIO31 ADI2 52 P601 13 GPIO32 AD3 53 P602 12 GPIO33 AD11 54 P601 14 GPIO34 AD2 55 P602 13 GPIO35 AD10 56 P601 15 GPIO36_AD1 57 P602 14 GPIO37 AD9 58 P601 16 GPI038_ADO 59 P602 15 GPI039_AD8 60 P601 17 I2C GENO SCL 7 amp 8 P603 29 I2C GENO SDA 5 amp 6 P603 28 12C_GEN1_SCL 119 P602 45 12C_GEN1_SDA lily P602 44 IRQ_GPIO16_CNTRL_I2C_INT 37 P603 11 IRQ GPIO18 I2C GENO INT 39 P603 10 IRQ GPIO20 I2C GEN1 INT 41 P603 IRQ GPIO22 12C INT 43 P602 MOTOR TCO FB 122 P601 48 MOTORHO ENCO 116 P601 45 MOTORH1 ENC1 118 P601 46 MOTORH2 ENC2 120 P601 47 MOTORPOH 102 P601 38 MOTORPOL 100 P601 37 MOTORP1H 106 P601 40 MOTORP1L 104 P601 39 MOTORP2H 110 P601 42 MOTORP2L 108 P601 41 MOTORPWM 412 P601 43 P603 46 P603 46 P603 46 P603 46 SPI SSC HCS NSS 101 P602 36 SPI_SSC_CLK 98 P601 36 Electrocomponents plc Page 10
11. JP424 2 1 Default ASC1_RX_TTL JP424 2 3 JP425 2 1 Default ASC1_TX_TTL JP425 2 3 CAN1_TX JP427 2 1 MOTOR_TCO_FB JP427 2 3 Default User LEDO 4 Zero Ohm Links CAN Load Resistor JP501 This link when inserted includes a 120 ohm resistor across CANHO and CANLO The default is connected This option is irrelevant as the LPC1113 does not a CAN peripheral This jumper is provided for the LPC1768 LPC2368 variants of the Command Module which have a CAN transceiver fitted AN_REF R101 This zero ohm link when inserted provides a 3 3V reference for the EDP platform The 3 3V used is the local supply voltage derived from a local voltage regulator This link should be used in the absence of a 3 3V voltage reference voltage provided by the Analogue Module when fitted The default position is not connected AGND amp VAGND R102 This link when inserted provides a way of connecting the VAGND to the SGND This is the default position The two grounds alternatively can be connected to each other on the analogue module or on the base board Electrocomponents plc Page 16 5 Software Support The NXP Command Module for the RS EDP platform is supported by all of the necessary software drivers to make driving of the platform very easy All the low level support for the devices controlled by I2C for example have been written as well as a test menu to
12. R JP434 2 1 Default PIO1_9 CT16B1_MATO JP437 2 3 GPIO9_12S_RX_WS JP437 2 1 Default EVM1 GPIO23 JP437 2 4 CPU DACOO GPI017 Note CPU_DACOO_GPIO17 is also available on JP430 PIO2 9 PIO1 10 AD6 CT16B1 MAT1 JP407 2 1 Default JP407 2 3 JP407 2 4 Note EVGO_GPIO40 is also available on JP406 PIOO 1 Electrocomponents plc Page 13 PIO1 11 AD7 JP405 2 1 Default AN4 JP405 2 3 AN12 Port PIO2 Options PIO2_0 DTR SSEL1 JP421 2 1 Default JP421 2 3 PIO2_1 DSR SCK1 JP426 2 1 Default ASC1_TX_TTL_ASCO_DTR JP426 2 3 CAN1_RX PIO2_2 DCD SISO1 JP428 2 1 Default JP428 2 3 PIO2_3 RI MOSI1 JP411 2 1 EMG_TRAP JP411 2 3 Default PIO2_7 JP436 2 3 GPIO10_MCI_CLK JP436 2 1 Default PIO2_8 JP432 2 3 ASC1_TX_TTL JP432 2 1 Default PIO2_9 JP430 2 3 CPU_DACO0_GPIO17 JP430 2 1 Default Note CPU_DACOO_GPIO17 is also available on JP437 PIO1_9 PIO2_10 JP429 2 3 CPU_DACO1_GPIO19 JP429 2 1 Default PIO2_11 SCKO JP422 2 1 Default JP422 2 3 Il Electrocomponents plc Page 14 Port PIO3 Options PIO3 0 HDTR JP409 2 1 MOTORPOH JP409 2 3 Default PIO3_1 DSR
13. RS EDP CM LPC1113 CPU Module User Manual Version 1 00 Electrocomponents plc Page 1 Contents 1 2 2 1 2 2 2 3 2 4 2 5 3 4 5 5 1 5 2 Introduction 3 Pin Allocation 4 Allocation of MCU pins to backplane functions eeeooeoee 4 Resources Used Available by LPC1113 eneee 6 Alphabetical Listing of MCU Pins 7 Backplane Base Board Signals 8 Mapping Aid aiia item tl nt A nei eels 11 Solder Link Options 12 Zero Ohm Links 16 Software Support 17 RSEDP Test Suite i325 tia a aci binant 17 MG1 Test Suite vc ac ia ii te 17 MG2 Teste SU ide do ni fend 18 Electrocomponents plc Page 2 1 Introduction The RS EDP platform is a system has been designed to utilise many different manufacturers microprocessors To support NXP range or ARM Cortex MCU s a single Command Module CM has been designed to accommodate four different device types These are LPC2368 ARM7 LPC1768 Cortex M3 LPC1343 Cortex M3 and LPC1113 Cortex MO Each of the boards comes with its own suite of software to fully exercise the RS EDP Application Modules and the peripherals available on the MCU device In an RS EDP system there is usually one Command Module CPU Module CM and one or more Applications Modules AM plugged in to the Base Board BB These NXP modules have been designed as the Command Module for the system The Command Module in a system d
14. VG9_GPIO57 37 PIO3_1 DSR 2 link options MOTORHO_ENCO 2 link options EVG10_GPIO58 38 PIO2_3 RI MOSI1 2 link options EMG_TRAP 2 link options EVG11_GPIO59 43 PIO3_2 DCD 2 link options MOTORPOL 2 link options EVG12_GPIO60 48 PI03_3 RI 2 link options MOTORH1 ENC1 2 link options EVG13_GPIO61 41 VSSIO 44 VDDCORE 45 PIO1_5 RTS CT32B0_CAPO EVM5_GPIO47 10 PIOO_2 SSELO CT16B0_CAPO 2 link options MOTORP2H 2 link options EVG17_GPIO65 27 PIOO 8 MISO0 CT16B0 MATO 2 link options MOTORP2L Electrocomponents plc Page 4 2 link options EVG18 GPI066 2 PIO2 O HDTR SSEL1 2 link options GPIOO 2 link options EVG6_GPIO52 31 PIO2_11 SCK0 2 link options GPIO1 2 link options EVG7_GPIO54 13 PIO2_1 DSR SCK1 2 link options ASC1_TX_TTL_ASCO_DTR 2 link options CAN1 RX 26 PIO2_2 DCD MISO1 2 link option EVG4 GPI048 2 link option EVG19 GPI067 25 PIO2 10 2 link option CPU_DACO1_GPI019 2 link option EVG3_GPI046 24 PIO2_9 2 link option CPU DACOO GPIO17 2 link option EVG2 GPI044 23 PIOO_7 CTS EVM9 GPIO55 22 PIOO_6 SCKO 2 link options ASC1_RX_TTL 2 Link options EVM8_GPIO53 12 PIO2 8 2 link options ASC1_TX_TTL 2 Link options EVM7_GPIO51 21 PIO3 5 2 Link options EVM6 GPI049 2 Link options GPIO2 MCIDATO 9 PIO1 8 CT16B1 CAPO 2 Link options EVM4 GPIO45 2 Link options GPI014 MCIPVVR 18 PIO3 4 2 Link options EVM3 GPI043 2 Link options GPIO12 MCICMD
15. backplane As the same PCB is used for variants of LPC processor some of the mapping may appear a little strange For example this device has no CAN but is allocated some CAN resource on the backplane This is because other NXP variants do have a CAN controller on board and the mapping is done to accommodate this other device RS EDP BASE BOARD LPC1113FBD48 Comment mapping Pin Name of function used on PIC Name 348 TDO PI01_1 AD2 CT32B1_MATO amp 28 PIOO 9 MOSIO CT16BO MAT1 JTAG interface on LPC module 32 TDI PIOO_11 ADCO CT32B0_MAT3 JTAG interface on LPC module 338 TMS PIO1_0 AD1 CT32B1_CAPO amp 39 SVVDIO PIO1 3 AD4 CT32B1 MAT2 JTAG interface on LPC module 35 TRST PIO1 2 AD3 CT32B1 MAT1 JTAG interface on LPC module 29 SWCLK PIOO_10 SCKO CT16BO_MAT2 JTAG interface on LPC module 40 PIO1_4 AD5 CT32B1_MAT3 WAKEUP 2 link options ANO 2 link options AN8 3 l RESET P100_0 po I 42 PIO1 11 AD7 2 link options AN4 2 link options AN12 6 XTALIN 7 XTALOUT 15 PIOO_4 SCL CNTRL_I2C_SCL 16 PIOO_5 SDA CNTRL_I2C_SDA 1 PIO2 6 EVG1 GPI042 4 PIOO_1 CLKOUT CT32B0_MAT2 2 link options EVGO_GPI040 2 Link options User LED1 8 VDDIO 20 PIO2 5 19 PIO2 4 5 VSSIO 30 PIO1 10 AD6 CT16B1 MAT1 3 link options EVG5_GPIO50 3 link options EVG8_GPIO56 3 link options EVGO_GPIO40 36 PIO3_0 DTR 2 link options MOTORPOH 2 link options E
16. ictates whether the whole system is a 3 3V one or a 5 0V one All of these modules use a 3 3V microprocessor and consequently the I O is mostly 3 3V also To tell the rest of the system the Command Module is a 3 3V one not a 5 0V one the Vcc_CM line on the base board is connected to 3 3V by the tracking on the Command Module board This Vcc_CM is used as a reference by the other modules such as the analogue module to limit the output voltage to 3 3V The command voltage line is also used by the RESET circuit as the voltage reference to pull up to after the reset line has been asserted low The CPU Module maps the 1 0 of the NXP MCU on the board to the backplane of the RS EDP system As there are quite a few dual function pins on the NXP processors and hence several link options have been made to accommodate the various options the user may wish to use Extensive use of the I2C capability is used to communicate to the application modules in the system Electrocomponents plc Page 3 2 Pin Allocation 2 1 Allocation of MCU pins to backplane functions The CM has been mapped to the backplane to maximise the functionality of the system and the AMs A document called a Pin Allocation Spreadsheet exists which details the mapping of the pins to the backplane The details of this mapping are detailed below Below are detailed the pin number of the MCU the pin name a comment on its usage and the signals name to which it is allocated on the
17. motor drive module across the 12C backplane network present in the RSEDP system You can have up to three MC2 motor drives fitted and this suite of software allows you to communicate with all of them Electrocomponents plc Page 18
18. on the backplane This option is irrelevant as the LPC1113 does not a VBAT terminal This jumper is provided for the LPC1768 LPC2368 variants of the Command Module Port PI00 Options PIOO_1 CLKOUT CT32B0_MAT2 JP406 2 1 JP406 2 3 Default User LED1 Selecting JP406 position 2 3 allows use of the on board user led LED1 D401 Note EVGO_GPIO40 is also available on JP407 PIO1 10 PIOO 2 SSEL0 CT16B0 CAPO JP417 2 1 MOTORP2H JP417 2 3 Default Electrocomponents plc Page 12 PIOO 3 JP438 2 3 JP438 2 1 Default PIOO_6 SCKO JP431 2 3 ASC1 RX TTL JP431 2 1 Default PIOO_8 MISO0 CT16B0_MATO JP418 2 1 MOTORP2L JP418 2 3 Default Port PIO1 Options PIO1_4 AD5 CT32B1_MAT3 WAKEUP JP403 2 1 Default ANO JP403 2 3 AN8 PIO1 6 RXD CT32B0 MATO JP440 2 1 Default ASCO RX TTL JP440 2 4 AN6 JP440 2 3 AN14 Position 2 1 is the main RS232 UART channel Incoming logic level receive traffic is routed from the Communication Module PIO1 7 TXD CT32BO MAT1 JP439 2 1 Default ASCO_TX_TTL JP439 2 4 AN7 JP439 2 3 AN15 Position 2 1 is the main RS232 UART channel Outgoing logic level transmit traffic is routed to the Communication Module where it is translated into RS232 RS485 logic levels PIO1_8 CT16B1_CAPO JP434 2 3 GPIO14 MCI PVV
19. with a sharp knife before making the alternate connection options A documents called a Mapping Aid exist to help explain the resources available on the MCU and how it can interface with the other modules within the system An extract from it is in the section above The options are as follows VDDA JP201 1 2 VDDA on the MCU is connected to 3 3V JP201 2 3 VDDA on the MCU is connected to AN_REF on the backplane The LPC1113 does not use this VDDA reference so the jumper setting is irrelevant This function is provided for the LPC1768 and LPC2368 variants of this CM VDDA is the power supply voltage to the on board ADC circuitry Using a lower noise AN_REF signal will yield better results The AN_REF signal is usually provided by a stable voltage reference source present on the Analogue Module Vref JP202 1 2 VREF on the MCU is connected to 3 3V JP202 2 3 VREF on the MCU is connected to AN_REF on the backplane The LPC1113 does not use this Vref signal This function is provided for the LPC1768 and LPC2368 variants of this CM This is the voltage reference that is used to measure the analogue input voltages against An AN_REF signal will provide better results than the 3 3V signal The AN_REF signal is usually provided by a stable voltage reference source present on the Analogue Module VBAT JP203 1 2 VBAT onthe MCU is connected to 3 3V JP203 2 3 VREF on the MCU is connected to 3V3_BATT
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