Manual - ICP DAS
Contents
1. 2 2 3 Encoder 24 bit Value Read address 0 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnA7 EnA6 EnA5 EnA4 EnA3 EnA2 EnAl EnAO Read Address 1 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnAl15 EnAl4 EnAl3 EnAl2 EnAll EnA10 EnA9 EnA8 Read address 2 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnA 23 EnA 22 J EnA 21 EnA 20 EnAl9 EnAI8 EnAl7 EnAl6 24 bit encoderl gt EnA23 EnA0 EnA23 is MSB EnA0 is LSB When program read address 0 the EnA23 EnA8 will also be latched The correct codes to read 24 bit encoder value are given as follows read encl unsigned long enc1 unsigned int HighByte MiddleByte LowByte Check LowByte inportb 0 latch MiddleByte amp HighByte MiddleByte inportb 1 HighByte inportb 2 encl long HighByte lt lt 16 MiddleByte lt lt 8 LowByte e Write any value to address 0 will clear EnA23 Outportb 0 0 clear EnA23 EnAQ to 0 EnA0 to 0 as follows X702 X703 User s Manual Nov 2004 Rev 1 0 2 2 4 Encoder2 24 bit Value Read address 4 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnB7 EnB6 EnB5 EnB4 EnB3 EnB2 EnB1 EnBO Read Address 5 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnB15 EnB14 EnB13 EnB12 EnBll EnB10 EnB9 EnB8 Read address 6 Bit7 Bit6 Bit5 Bitd Bi2. External 5V Single ended input 2500V isolation e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e If A B Z signals of encoder3 are active low the XOR3 bit must be set to 1 for internal active high logic e If A B Z signals of encoder3 are active high the XOR3 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to all A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XOR2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 16 59 1 2 12V Encoder Signal The internal logic of X702 X703 is designed for 5V logic A current limit resistor must be added to X702 X703 for 12V encoder The signal wiring diagram are given in Sec 1 2 1 Sec 1 2 4 as follows Differential Section Input 1 21 Single end Section Input 1 2 2 12V Encoder Differential Section Input 1 2 4 Single end Section INput X702 X703 User s Manual Nov 2004 Rev 1 0 e 17 59 1 2 1 X702 Differential Encoder Ext 12V Encoder 12V GND 12V GND Power Supply External 5V Differential input 2500V isolation e Note some current limit resistors 1K 1 4W must be added as above diagram e The isolation voltage of photo couple is 2500V Assu
3. Press 1 aes Press ds User set XOR2 1 Press ds ser set XOR3 1 Press Any Key to Stop N U N ra ex 7188XW 1 26 COM2 115200 N 8 1 FC 0 CTS 0 DIR E W32 PINGPROG 7188E C iDEk 17188e gt i7188e gt 17188e gt x703xor CH or 1 CH or 1 gt CH or 1 Z1B1 1 000D gt Z1B1 1 000D gt Z1Bifi 000 gt Z1B1 1 666 gt Z1B1 1 66 gt Z1B1 1 0D00D gt Z1Bifi 000D gt Z1B1 1 666 gt Z1B1 1 66 gt Z1B1 1 666 gt Z1B1 1 000D gt Z1B1 1 666 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 608 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 608 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 608 gt CROR3S 1 Z3Z3 3 000 gt CROR3S 1 Z3Z3A3 608 gt CROR3 1 Z3Z3 3 000 gt CROR3 1 Z3Z3A3 000 gt CROR3S 1 Z3Z3A3 000 gt CROR3S 1 Z3Z3A3 000 gt CROR3 1 Z3Z3A3 000 gt CROR3 1 Z3Z3A3 000 gt CROR3S 1 Z3Z3 3 000 gt CROR3S 1 Z3Z3A3 000 gt CROR3 1 Z3Z3A3 608 gt CROR3S 1 Z3Z3 3 000 gt KXXKKKKKK KKK KXXKKKKKK KKK Initial 0 Initial 0 Initial 0 X702 X703 User s Manual Nov 2004 Rev 1 0 55 59 3 2 2 oo Al OY HE RR Main program 2 MAIN C Project file 2 X702RENC PRJ MAIN C is similar to Sec 3 1 2 Run X703RENC EXE Press dm User set XOR1 1 Press dm User set counting model cw ccw
4. Cmode3 3 enc3 fffffc gt Cmode3 3 enc3 fffffc gt Cmode3 3 enc3 ffffFFh gt Cmode3 3 enc3 fffFFh gt Cmode3 3 enc3 fffFFhb gt Cmode3 3 enc3 fffffa gt d Cmode3 3 enc3 fffffa gt d Down counting Read to 0 4 8 will latch the high bytes of encoder 1 2 3 as follows read encl unsigned long enc1 unsigned int HighByte MiddleByte LowByte Check LowByte inportb 0 latch MiddleByte amp HighByte MiddleByte inportb 1 HighByte inportb 2 enc1 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte read enc2 unsigned long enc2 unsigned int HighByte MiddleByte LowByte Check LowByte inportb 4 latch MiddleByte amp HighByte MiddleByte inportb 5 HighByte inportb 6 enc2 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte read_enc3 unsigned long enc3 unsigned int HighByte MiddleByte LowByte Check LowByte inportb 8 latch MiddleByte amp HighByte MiddleByte inportb 9 HighB yte inportb 10 enc3 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte X702 X703 User s Manual Nov 2004 Rev 1 0 57 59 3 2 3 Z interrupt Demo X703INT EXE oo HON Du T DU ME Main program 2 MAIN C Interrupt service routine gt INT C Project file gt X703INT PRJ MAIN C amp INT C are similar to Sec 3 1 3 Z1 gt to intO of 7188Xb or 7188EX Z2 gt to intl of 7188XB or 7188EX Z3 gt to int4 of 7188XB or 7188EX Run X703
5. Read Encoder Demo X703RENC EXE Press ds User set XOR2 1 Press gn User set counting mode cw ccw Press dn User set XOR3 1 Press dn User set counting mode3 cw ccw Press Any Key to Stop cx 7188XW 1 26 COM2 115200 N 8 1 FC 0 CTS 0 DIR E W32 PINGPRC i7188E gt x 3renc exe Ad or 1 gt 7 stop 1 cw ccw 2 pule dir 3 a b gt s D stop 1i cwccw 2 pule dir 3 a b 1 stop 1 cw ccw 2 pule dir 3 a b gt modei 3 enci1 gt modei 3 enci gt modei 3 enci 1 gt modei 3 enci 1 gt modei 3 enci 2 gt modei 3 enci1 2 gt modei 3 enci 2 gt modei 3 enci 3 gt modei 3 enci 3 gt modei 3 enci1 4 gt modei 3 enci1 4 gt modei 3 enci 5 gt modei 3 enci 5 gt modei1 3 enc1 5 gt lt modei 3 enci1 6 gt modei 3 enci 6 gt i7188E gt C mode2 3 enc2 B C mode2 3 enc2 B mode2 3 enc2 1 gt Cmode2 3 enc2 1 gt Cmode2 3 enc2 2 gt Cmode2 3 enc2 2 gt Cmode2 3 enc2 2 gt mode2 3 enc2 3 Cmode2 3 enc2 3 gt C mode2 3 enc2 4 Cmode2 3 enc2 4 gt Cmode2 3 enc2 5 gt Cmode2 3 enc2 5 gt mode2 3 enc2 5 C mode2 3 enc2 6 Cmode2 3 enc2 6 gt Up counting X702 X703 User s Manual Nov 2004 Rev 1 0 Cmode3 3 enc3 gt Cmode3 3 enc3 6 gt C mode3 3 enc3a ffffff C mode3 3 enc3 ffffff Cmode3 3 enc3 fffffe gt d Cmode3 3 enc3 fffffe gt Cmode3 3 enc3 fffffe gt d Cmode3 3 enc3 fffFFd gt Cmode3 3 enc3 fffFFd gt
6. The X702 X703 is the 2 axis 3 axis expansion board designed for encoder applications The specifications of X702 X703 are given as follows EN Support 7188XB or 7188EX X702 2 axis encoder counter gt X703 3 axis encoder counter 3 24 bit encoder counter 4 Encoder counting mode Quadrant CW CCW Pulse Direction 5 Maximum counting rate IMHz 6 Encoder Input X702 Al A1 B1 B1 Z1 Z1 A2 A2 B2 B2 Z2 Z2 X703 A 1 B1 Z1 A2 B2 Z2 A3 B3 Z3 7 Input Level Input 5V Logic High 3 5 5V Logic Low 0 2 0V Input 12V with external resistor 1K ohm 1 4W Logic High 5 12V Logic Low 0 2 0V Input 24V with external resistor 2K ohm 1 2W Logic High 7 24V Logic Low 0 2 0V 8 A B Z signal isolation voltage 2500V optical isolation 9 Built in isolated voltage output 5V 100mA max 1000V isolation 10 Built in XOR logic for active high or active low encoder input X702 X703 User s Manual Nov 2004 Rev 1 0 4 59 The block diagram of X702 with differential encoder is given as follows VO Expansion Bus 1000V Isolation INTO INT1 1000V Isolation Power 5V 100mA max H 7188XB or 7188EX 24 bit Encoder Counter VO Expansion Bus e X702 can be plugged into 7188XB or 7188EX e X702 equips a isolated 5V power for 5V encoder Refer to Sec 1 2 for 12V encoder amp Sec 1 3 for 24V encoder Al A1 B1 B1 Z1 Z1 is for encoderl and A2 A2 B2 B2 Z2 Z2 is for encoder2
7. unsigned long far IntVect unsigned long far OL void interrupt IntOIsr void read_encl amp EncLatch1 lt Encoder latched by Z1 outpw INT_EOI EOITYPE_INTO void Install IntOIsr void OldIntVectO IntVect Ox0C save old ISR IntVect Ox0C unsigned lone Int0Isr install new ISR outpw INT_MASK inpw INT MASK amp Oxffef enable INT 0 void RestoreIntOIsr void if OldIntVect0 IntVect OxO0C OldIntVect0 restore OLD ISR outpw INT_MASK inpw UINT_MASK I0x0010 disable INT 0 void interrupt Int1Isr void read_enc2 amp EncLatch2 lt 4 Encoder latched by 73 outpw ONT EOLEOITYPE INT1 X702 X703 User s Manual Nov 2004 Rev 1 0 e 53 59 void InstallInt1Isr void OldIntVect1 IntVect Ox0D save old ISR IntVect OxOD unsigned long lntllsr install new ISR outpw INT_MASK inpwUNT_MASK amp Oxffdf enable INT 1 void RestoreInt1Isr void if OldIntVect1 IntVect OxOD OldIntVect1 restore OLD ISR outpw INT_MASK inpwUNT_MASK I0x0020 disable INT 1 1 Run X702INT EXE 2 Press ds User set XOR1 1 3 Press dn User set counting model cw ccw 4 Press Qm User set XOR2 1 5 Press Qm User set counting mode cw ccw 6 Press Any Key to Stop cx 7188XW 1 26 COM2 115200 H 8 1 FC 0 CTS 0 DIR E W32 PINGPROG 7188E i7188e gt i7188e gt x762 int xori CH or modei XOP2 mode2 Cmodei 3 enci 8 gt lt model 3 enc1 1 gt lt model
8. void interrupt Int4Isr void read_enc3 amp EncLatch3 outpw INT EOLEOITYPE INT4 void InstallInt4Isr void OldIntVectO IntVect 0x 10 save old ISR IntVect 0x10 unsigned long Intdlsr install new ISR outpw INT_MASK inpw INT MASK amp Oxfeff enable INT 4 void RestoreInt4Isr void if OldIntVect4 IntVect Ox10 OldIntVect4 restore OLD ISR outpw INT_MASK inpw UINT_MASK I0x0100 disable INT 4 X702 X703 User s Manual Nov 2004 Rev 1 0 59 59
9. CROR2 1 Z2B2A2 666 gt 1B1A1 666 gt CROR2 1 Z2B2 82 000 gt Z1B1 1 666 gt CROR2 1 Z2B2A2 668 gt be ka ON KEESSIER CROR2 1 Z2B2 02 000 gt Z1B1 1 000D gt CROR2 1 Z2B2A2 000 gt Z1B1 1 666 gt CROR2Z 1 Z2B2 02 000 gt 1 241Bi1A1 6866 gt CROR2 1 Z2B2A2 668 gt Initial 0 Initial 0 X702 X703 User s Manual Nov 2004 Rev 1 0 46 59 3 1 2 Read Encoder Demo X702RENC EXE Main program gt MAIN C Project file gt X702RENC PRJ include lt stdio h gt include lt stdlib h gt include lib 7188E h int xor1 xor2 model mode 2 unsigned long Enc Val1 EncVal2 main Print nxorl 0 or 1 xorl Getch 0 if xorl xorl 1 try againl Print nmodel 0 stop 1 cw ccw 2 pule dir 3 a b mode 1 Getch switch model case 0 break stop case l xorl 0x02 break cw ccw case 2 xorl 0x04 break pulse dir case 3 xorl 0x06 break a b default goto try againl Print nxor2 0 or 1 xor2 Getch 0 if xor2 xor2 1 try_again2 Print nmode2 0 stop 1 cw ccw 2 pule dir 3 a b mode2 Getch switch mode2 case 0 break stop case l xor2 0x02 break A cw ccw case 2 xor2 0x04 break pulse dir Set XOR2 amp Counting Mode2 case 3 xor2 0x06 break A a b default goto try again2 X702 X703 User s Manual Nov 2004 Rev 1 0 47 59 outportb 3 x
10. Int_5V 14 1 1 7 X703 Differential Encoder Ext_5V 15 1 1 8 X703 Single ended Encoder Ext_5V 16 LZ ESA Encoder MONA EES ee eae eae 17 1 2 1 X702 Differential Encoder Ext_12V 18 1 2 2 X702 Single ended Encoder Ext 12V 19 12 3 X703 Differential Encoder Ext_12V 20 1 2 4 X703 Single ended Encoder Ext 12V 21 1 3 24V Encoder Signal aasan ee sege ee ees s 22 1 3 1 X702 Differential Encoder Ext_24V 23 1 3 2 X702 Single ended Encoder Ext 24V 24 1 3 3 X703 Differential Encoder Ext_24V 25 1 3 4 X703 Single ended Encoder Ext_24V 26 1 4 Mixed Ee EE 27 1 5 Encoder Counting Mode 29 1 6 XOR Control rs ae e e N Aa E ey pad 30 VO CONTROL REGISTER 33 2 1 VO Control Registers of X702 33 2 1 1 Set Encoder Counting Mode 34 Ad 1 2 Read A B Z amp Enco
11. These signals are connected to photo couple devices for signal isolation e The internal logic is active high e The Z1 after XOR1 logic is connected to int of I O Expansion Bus The Z2 after XOR2 logic is connected to intl of I O Expansion Bus Both intO amp intl are initial low amp active high Refer to Sec 3 1 3 for more information For differential encoder A1 A1 B14 B1 Z1 Z1 are active high XOR1 XOR2 must be set to 1 e Reter to Sec 1 1 1 Sec 1 1 3 Sec 1 2 1 Sec 1 3 1 for more information about this configuration X702 differential encoder X702 X703 User s Manual Nov 2004 Rev 1 0 5 59 The block diagram of X702 with single ended encoder is given as follows I O Expansion Bus 1000V Isolation INTO INT1 INT4 H 7188XB or 7188EX 24 bit Encoder Counter I O Expansion Bus For single ended encoder If A B Z is active low XOR1 XOR2 must be set to 1 If A B Z is active high XOR1 XOR2 must be set to 0 e Refer to Sec 1 1 2 Sec 1 1 4 Sec 1 2 2 Sec 1 3 2 for more information about this configuration X702 single ended encoder X702 X703 User s Manual Nov 2004 Rev 1 0 6 59 The block diagram of X703 is given as follows VO Expansion Bus 1000V Isolation INTO INT1 INT4 1000V Isolation Power 5V 10OmA max 7188XB or 7188EX 24 bit Encoder Counter e X703 can be plugged into 7188XB or 7188EX e X703 equips a isolated 5V power for 5V encoder Refer
12. 3 enc1 1 gt lt model 3 enc1 1 gt Cmodei 3 enci 2 gt modei 3 enci 2 gt Cmodei 3 enci 3 gt modei 3 enci 3 gt Cmodei 3 enc1 3 gt Cmodei 3 enc1i 4 gt modei 3 enci 4 gt modei 3 enci 5 gt Cmodei 3 enci 5 gt Cmodei 3 enci 6 gt Cmodei 3 enci 6 gt CH or Up counting f gt T stop 1 cw ccw 2 pule dir 3 a b gt a b gt if stop 1 cw ccw 2 pule dir 3 a hb gt Cmode2 3 enc2 gt CLatchi 6 Latch2 6 gt Cmode2 3 enc2 fffFFF gt CLatchi 6 Latch2 6 gt Cmode2 3 enc2 ffffFFF gt CLatchi 6 Latch2 6 gt Cmode2 3 enc2 ffffFF gt CLatchi 6 Latch2 6 gt Cmode2 3 enc2 fffffe gt CLatchi G6 Latch2 6 gt mode2 3 enc2 fffffe gt CLatchi 2 Latch2 fffffe gt d Cmode2 3 enc2 ffffFd gt CLatchi 3 Latch2 fffffFd gt Cmode2 3 enc2 ffffFFd gt CLatchi 3 Latch2 fffffFd gt C mode2 3 enc2 fffffd Latchi 3 Latch2 fffffd Cmode2 3 enc2 ffffFco gt CLatchi 3 Latch2 ffffFd gt Cmode2 3 enc2 ffffFco gt CLatchi 3 Latch2 ffffFd gt Cmode2 3 enc2 ffffFb gt CLatchi 3 Latch2 fffFFd gt Cmode2 3 enc2 ffffFb gt CLatchi 3 Latch2 fffFFd gt mode2 3 enc2 fffffa gt CLatchi 3 Latch2 fffffFd gt Cmode2 3 enc2 fffffa gt CLatchi 3 Latch2 fffFFd gt Down counting Latch by Io Latch by Intl X702 X703 User s Manual Nov 2004 Rev 1 0 3 2 X703 Demo Program 3 2 1 Read A B Z Demo X703XOR EXE Main program 2 MAIN C Project file gt X702XOR PRJ e MAIN C is similar to Sec 3 1 1 Run X703XOR EXE
13. Bit5 Bitd Bit3 Bit2 Bitl BitO ENB7 ENB6 ENBS ENB4 ENB3 ENB2 ENB1 ENBO Read address 5 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO ENB15 ENB14 ENBI13 ENBI12 ENBI1 ENBIO ENB9 ENBS Read address 6 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO ENB 23 ENB 22 ENB21 JENB20 ENBI19 ENBIS ENBI7 ENBI6 24 bit encoder2 gt EnB23 EnB0 EnB23 is MSB EnB0 is LSB When program read address 4 the ENB15 ENB8 will also be latched but ENB23 ENB 16 will not be latched The correct codes to read 24 bit encoder2 value are given as follows read_enc2 unsigned long enc2 unsigned int HighByte MiddleByte LowByte Check HighByte inportb 6 no latch try_again2 LowByte inportb 4 latch MiddleByte MiddleB yte inportb 5 Check inportb 6 no latch if Check HighByte HighByte is changed HighByte Check goto try again 2 enc2 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte e Write any value to address 4 will clear EnB23 EnB0 to 0 as follows Outportb 0 0 clear EnB23 EnBO to 0 X702 X703 User s Manual Nov 2004 Rev 1 0 2 2 VO Control Registers of X703 VO Address Read Write 0 Read bit7 bit0 of encoder1 Clear encoder Sec 2 2 3 Sec 2 2 3 1 Read bit15 bit8 of encoder1 N A Sec 2 2 3 latch by read 0 2 Read bit23 bit16 of encoder1 N A Sec 2 2 3 latch by rea
14. CTS 0 DIR E i7188e gt run x 02renc xori or 1 1 cw ccw 2 pule dir 3 a hb gt modei stop xor2 or 1 mode2 stop 1 cw ccwu 2 pule dir 3 a h gt modei 3 enci1 6 gt Cmodei 3 enci gt modei 3 enci1 gt Cmodei 3 enc1 gt Cmodei 3 enc1i 1 gt modei1 3 enci 1 gt modei 3 enci 1 gt modei 3 enc1i 1 gt Cmodei 3 enci 1 gt modei 3 enc1 2 gt modei1 3 enc1 2 gt modei 3 enci1 2 gt modei 3 enci1 2 gt Cmodei 3 enci 2 gt modei 3 enci1 3 gt modei1 3 enci 3 gt modei 3 enci 3 gt i7188e gt Up counting mode2 3 enc2 gt mode2 3 enc2 B C mode2 3 enc2 B Cmode2 3 enc2 gt Cmode2 3 enc2 ffffFF gt C mode2 3 enc2 ffffff C mode2 3 enc2 ffffff C mode2 3 enc2 ffffff C mode2 3 enc2 ffffff Cmode2 3 enc2 fffffe gt Cmode2 3 enc2 fffffe gt Cmode2 3 enc2 fffffe gt Cmode2 3 enc2 fffffe gt Cmode2 3 enc2 fffffe gt Cmode2 3 enc2 ffffFd gt mode2 3 enc2 fffffd Cmode2 3 enc2 fffFFd gt User set XOR1 1 User set counting model cw ccw User set XOR2 1 User set counting mode2 cw ccw Down counting Initial count 0 X702 X703 User s Manual Nov 2004 Rev 1 0 3 1 3 Z Interrupt Demo X702INT EXE Main program 2 MAIN C Interrupt service routine gt INT C Project file 2 X702INT PRJ Z1 gt to int0 of 7188Xb or 7188EX Z2 gt to intl of 7188XB or 7188EX The main c is given as follows include l
15. Z3Z3A3 000 gt CRORZS 1 Z3Z3 3 000 gt CRORS 1 Z3Z3A3 000 gt CROR3 1 Z3Z3A3 608 gt CRORZS 1 Z3Z3A3 000 gt CROR3 1 Z3Z3 3 D00 gt CROR3S 1 Z3Z3A3 000 gt CROR3 1 Z3Z3A3 000 gt CROR3S 1 Z3Z3 3 000 gt XX XX 33 X X X KKK XX XX X3 X X 2 KK Initial 0 Initial 0 Initial 0 Note user can set XOR1 XOR2 XOR3 to 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 or 1 1 1 The key point is gt all ABZ signals must be initial 0 amp active high X702 X703 User s Manual Nov 2004 Rev 1 0 32 59 2 VO Control Register 2 1 VO Control Registers of X702 VO Address Read Write 0 Read bit7 bit0 of encoderl Clear encoder1 Sec 2 1 3 Sec 2 1 3 1 Read bit15 bit8 of encoder1 N A Sec 2 1 3 atch by read 0 2 Read bit23 bit16 of encoder1 Clear encoder2 Sec 2 1 3 no latch Sec 2 1 4 3 Read A B Z amp encoderl counting Set encoder counting mode mode Sec 2 1 2 Sec 2 1 1 4 Read bit7 bit0 of encoder2 N A Sec 2 1 4 5 Read bit15 bit8 of encoder2 N A Sec 2 1 4 latch by read 4 6 Read bit23 bit16 of encoder2 N A Sec 2 1 4 no latch 7 Read A B Z E encoder2 counting Set encoder2 counting mode mode Sec 2 1 2 Sec 2 1 1 X702 X703 User s Manual Nov 2004 Rev 1 0 2 1 1 Set Encoder Counting Mode Write address 3 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bitl BitO 0 0 0 0 0 MIA MIB X
16. isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e The XOR3 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to all A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XOR2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 25 59 1 3 4 X703 Single ended Encoder Ext 24V 24V GND Supply External 24V Single ended input 2500V isolation D U LU U LU U U LU U LU U U U LU U U LU U LU U LU U LU U U U U U LU U LU U LU U U U U LU U U U e Note some current limit resistors 2K 1 2W must be added as above diagram e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e If A B Z signals of encoder3 are active low the XOR3 bit must be set to 1 for internal active high logic e If A B Z signals of encoder3 are active high the XOR3 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to all A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XO
17. 1 2 select inverse logic of A2 B2 Z2 XOR3 07 select normal logic of A3 B3 Z3 XOR3 1 2 select inverse logic of A3 B3 Z3 MxA MxB 0 0 gt stop mode no counting MxA MxB 0 1 gt select CW CCW counting mode MxA MxB 1 0 gt select Pulse Direction counting mode MXA MxB 1 1 gt select quadrant counting mode Refer to Sec 1 5 for more information about CW CCW Pulse Direction amp quadrant counting mode e Reter to Sec 1 6 for more information about XOR1 XOR2 amp XOR3 X702 X703 User s Manual Nov 2004 Rev 1 0 39 59 2 2 2 Read A B Z amp Encoder Counting Mode Read address 3 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bu Bu 0 0 Z1 B1 Al MIA MIB XORI Read address 7 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bu Bu 0 0 Z2 B2 A2 M2A M2B XOR2 Read address 11 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bu Bu 0 0 Z3 B3 A3 M3A M3B XOR3 e Z1 B1 A1 is the logic status after XOR1 must be active high e Z2 B2 A2 is the logic status after XOR2 must be active high e Z3 B3 A3 is the logic status after XOR3 must be active high e Reter to Sec 2 2 1 for more information about MxA MxB XORx Refer to Sec 1 5 for more information about CW CCW Pulse Direction amp quadrant counting mode e Reter to Sec 1 6 for more information about XOR1 XOR2 amp XOR3 X702 X703 User s Manual Nov 2004 Rev 1 0
18. 1B1A1 AAA Z1B1 1 000 gt Z1B1 1 000 gt zl Z1BiA1 668 gt Z1B1A1 AAA Z1B1 1 666 gt 1 Z1B1 1 000 gt Z2B282 48 Z2B2A2 000 gt Z2B2A2 000 gt Z2B2A2 000 gt Z2B2A2 000 gt Z2B282 48 Z2B2A2 666 gt Z2B282 48 Z2B2A2 000 gt Z2B282 48 Z2B282 48 Z2B2A2 668 gt Z2B2A2 000 gt Initial 0 Initial 0 Note user can set XOR1 XOR2 to 0 0 0 1 1 0 or 1 1 The key point is gt all ABZ signals must be initial 0 amp active high X702 X703 User s Manual Nov 2004 Rev 1 0 31 59 Run X703XOR EXE Press ds ser set XOR1 1 Press Q Uscr set XOR2 1 Press ds ser set XOR3 1 Press Any Key to Stop Ln A U N ra ex 7188X W 1 26 COM2 115200 N 8 1 FC 0 CTS 0 DIR E AWW32VPINGPROGA7188E CADEM i7188e gt i7188e gt i7188e gt x 783xor CH or 1 CH or 1 CH or 1 Z1BifAi 66 gt Z1B1 1 666 gt Z1Bifi 66 gt Z1B1 1 666 gt Z1B1 1 000 gt Z1B1 1 666 gt Z1Bifi 000D gt Z1B1 1 666 gt Z1B1 1 000 gt Z1B1 1 666 gt Z1Bifi 000 gt Z1B1 1 000 gt CROR2 1 Z2B2 02 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2 02 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2 02 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 000 gt CROR2 1 Z2B2A2 608 gt CROR3S 1 Z3Z3 3 000 gt CROR3S 1 Z3Z3A3 000 gt CROR3 1 Z3Z3 3 000 gt CRORZS 1
19. INT EXE Press ds User set XOR1 1 Press ds User set counting model cw ccw Press ds User set XOR2 1 Press dn User set counting mode cw ccw Press dn User set XOR3 1 Press dn User set counting mode3 cw ccw Press Any Key to Stop cx 7188XW 1 26 COM2 115200 N 8 1 FC 0 CTS 0 DIR E W 324 17188E gt x 3 int xori lt A or 1 gt model stop 1 cw ccw 2 pule dir 3 a hb gt xor2 B or 1 mode2 stop 1 cw ccw 2 pule dir 3 a h gt xor3 or 1 mode3 stop 1 cw ccw 2 pule dir 3 a hb gt enci 2 3 6 60 6 gt CLatch1 2 3 6 6 gt Latchi1 2 3 6 0 gt Latchi1 2 3 6 6 6 gt Latchi1 2 3 6 6 gt Latch1 2 3 2 2 f f fffe gt CLatch1 2 3 2 2 f f fffe gt CLatchi 2 3 3 3 fffffd gt Latchi1 2 3 3 3 f f fffd gt CLatch1 2 3 3 3 f f fffd gt Latch1 2 3 3 3 f fffd gt Latch1 2 3 3 3 f f fffd gt Latchi1 2 3 3 3 f f fffd gt i7188E gt Encoder 1 2 3 Latch encoders by Z1 Z2 Z3 X702 X703 User s Manual Nov 2004 Rev 1 0 58 59 The interrupt service routines for Z3 are given as follows define EOITYPE_INTO 0x0c define EOITYPE_INT1 0x0d define EOITYPE_INT4 0x10 define INT_EOI Oxff22 End of interrupt register define INT_MASK Oxff28 Interrupt mask register unsigned long EncLatch1 EncLatch2 EncLatch3 unsigned long OldIntVectO 0 OldIntVect1 0 OldIntVect4 0 unsigned long far IntVect unsigned long far 0L
20. ORI Write address 7 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bitl BitO 0 0 0 0 0 M2A M2B XOR2 MIA MIB amp XORI for encoder 1 M2A M2B amp XOR2 for encoder 2 XORI 0 gt selectthe normal logic of A1 B1 Z1 XORI 1 gt select the inverse logic of A1 B1 Z1 XOR2 07 select normal logic of A2 B2 Z2 XOR2 1 2 select inverse logic of A2 B2 Z2 MxA MxB 0 0 gt stop mode no counting MxA MxB 0 1 2 select CW CCW counting mode MxA MxB 1 0 gt select Pulse Direction counting mode MXA MxB 1 1 gt select quadrant counting mode Refer to Sec 1 5 for more information about CW CCW Pulse Direction amp quadrant counting mode e Refer to Sec 1 6 for more information about XORI E XOR2 X702 X703 User s Manual Nov 2004 Rev 1 0 34 59 2 1 2 Read A B Z amp Encoder Counting Mode Read address 3 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bu Bu 0 0 Z1 B1 Al MIA MIB XORI Read address 7 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bu Bu 0 0 Z2 B2 A2 M2A M2B XOR2 e Z1 B1 A1 is the logic status after XOR1 must be active high e Z2 B2 A2 is the logic status after XOR2 must be active high e Reter to Sec 2 1 1 for more information about MxA MxB XORx Refer to Sec 1 5 for more information about CW CCW Pulse Direction amp quadrant counting mode Refer to Sec 1 6 for more information about XORI XOR2 amp XO
21. R2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 26 59 1 4 Mixed Configuration power can be internal 5 V external 5V extern 12V or external 24V encoder signal can be single ended or differential e Any different type of encoders can used together as follows Encoder2 There are two different type of encoders used in this configuration Encoderl is a 24V amp differential type encoder Encoder2 is a 5V amp single ended type encoder XORI must be set to 1 for internal active high logic If A B Z signals of encoder2 are active low the XOR2 bit must be set to 1 for internal active high logic e If A B Z signals of encoder2 are active high the XOR2 bit must be set to 0 for internal active high logic X702 X703 User s Manual Nov 2004 Rev 1 0 27 59 2K 1 2W 2K 1 2W 2K 1 2W 2K 1 2W There are three different type of encoders used in this configuration Encoder is a 24V amp differential type encoder Encoder2 is a 12V amp single ended type encoder Encoder3 is a5V amp single ended type encoder XORI must be set to 1 for internal active high logic If A B Z signals of encoder2 are active low the XOR2 bit must be set to 1 for internal active high logic If A B Z signals of encoder2 are active high the XOR2 bit must be set to 0 for internal active high logic If A B Z signals of encoder3 are active low the XOR3 bit must be set to 1 for internal active high
22. R3 X702 X703 User s Manual Nov 2004 Rev 1 0 2 1 3 Encoder1 24 bit Value Read address 0 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO ENA7 ENA6 EN AS ENA4 ENA3 ENA2 ENA1 ENAO Read Address 1 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO ENAI5 ENAlI4 ENAI13 ENA12 ENAII ENAI1O ENA9 ENAS Read address 2 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO ENA23 ENA 22 JENA21 J ENA20 ENAI19 ENAI8 ENAI7 ENAI16 24 bit encoderl gt EnA23 EnA0 EnA23 is MSB EnA0 is LSB When program read address 0 the ENA15 ENA8 will also be latched but ENA23 ENA16 will not be latched The correct codes to read 24 bit encoder1 value are given as follows read encl unsigned long enc1 unsigned int HighByte MiddleByte LowByte Check HighByte inportb 2 no latch try_again LowByte inportb 0 latch MiddleByte MiddleByte inportb 1 Check inportb 2 no latch if Check HighByte HighByte is changed HighByte Check goto try_again encl ong HighByte lt lt 16 MiddleByte lt lt 8 LowByte e Write any value to address 0 will clear EnA23 EnA0 to 0 as follows Outportb 0 0 clear EnA23 En AO to 0 X702 X703 User s Manual Nov 2004 Rev 1 0 2 1 4 Encoder2 24 bit Value Read address 4 Bit7 Bit6
23. U LU U U U U LU U LU U LU U U U U U U U LU U U U U U U U LU U U a A A amp A e External 12V Differential input 2500V isolation e Note some current limit resistors 1K 1 4W must be added as above diagram e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V The XOR3 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to all A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XOR2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 20 59 1 2 4 X703 Single ended Encoder Ext 12V 12V GND Supply D U LU U LU U U LU U LU U U U LU U U LU U LU U LU U LU U U U U U LU U LU U LU U U U U LU U U U External 12 V Single ended input 2500V isolation e Note some current limit resistors 1K 1 4W must be added as above diagram e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e If A B Z signals of encoder3 are active low the XOR3 bit must be set to 1 for intern
24. X702 X703 Hardware User s Manual Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser Warning ICP DAS assume no liability for damages consequent to the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use nor for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 2003 by ICP DAS All rights are reserved Trademark The names used for identification only maybe registered trademarks of their respective companies X702 X703 User s Manual Nov 2004 Rev 1 0 1 59 Table of Contents 1 GENERAL INTRODUCTION 4 1 1 5V Encoder Signal Wiring EES 8 1 1 1 X702 Differential Encoder amp Int_5V 9 1 1 2 X702 Single ended Encoder Int_5V 10 1 1 3 X702 Differential Encoder Ext_5V 11 1 1 4 X702 Single ended Encoder Ext_5V 12 1 1 5 X703 Differential Encoder Int_5V 13 1 1 6 X703 Single ended Encoder
25. al active high logic e If A B Z signals of encoder3 are active high the XOR3 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to all A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XOR2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 21 59 1 3 24V Encoder Signal The internal logic of X702 X703 is designed for 5V logic A current limit resistor must be added to X702 X703 for 24V encoder The signal wiring diagram are given in Sec 1 3 1 Sec 1 3 4 as follows Differential Section Input 1 3 1 Single end Section Input 1 3 2 24V Encoder Differential Section Input 1 3 4 Single end Input X702 X703 User s Manual Nov 2004 Rev 1 0 22 59 1 3 1 X702 Differential Encoder Ext 24V Encoder 24V GND 24V GND Power Supply External 24V Differential input 2500V isolation e Note some current limit resistors 2K 1 2W must be added as above diagram e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e The XOR2 bit must be set to 1 for internal active high logic e The XORI will apply to all A B Z signals of encoder and XOR2 will apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 fo
26. d 0 3 Read A B Z amp encoder counting Set encoder counting mode mode Sec 2 2 2 Sec 2 2 1 4 Read bit7 bit0 of encoder2 Clear encoder2 Sec 2 2 4 Sec 2 2 4 5 Read bit15 bit8 of encoder2 N A Sec 2 2 4 latch by read 4 6 Read bit23 bit16 of encoder2 N A Sec 2 2 4 latch by read 4 7 Read A B Z amp encoder2 counting Set encoder2 counting m mode mode Sec 2 2 2 Sec 2 2 1 8 Read bit7 but of encoder3 Clear encoder3 Sec 2 2 5 Sec 2 2 5 9 Read bit15 bit8 of encoder3 N A Sec 2 2 5 latch by read 8 10 Read bit23 bit16 of encoder3 N A Sec 2 2 5 latch by read 8 11 Read A B Z amp encoder3 counting Set encoder3 counting mode mode Sec 2 2 2 Sec 2 2 1 12 N A N A 13 N A N A 14 N A N A 15 N A N A X702 X703 User s Manual Nov 2004 Rev 1 0 38 59 2 2 1 Set Encoder Counting Mode Write address 3 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bitl BitO 0 0 0 0 0 MIA MIB XORI Write address 7 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bitl BitO 0 0 0 0 0 M2A M2B XOR2 Write address 11 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bu BitO 0 0 0 0 0 M3A M3B XOR3 MIA MIB amp XORI for encoder 1 e M2A M2B amp XOR2 for encoder 2 e M2A M2B E XOR2 for encoder 2 XORI 02 selectthe normal logic of A1 B1 Z1 XORI1 1 2 select the inverse logic of A1 B1 Z1 XOR2 07 select normal logic of A2 B2 Z2 XOR2
27. de2 x enc2 lx xorl EncVal1 xor2 EncVal2 Print Latch1 lx Latch2 lx EncLatch1 EncLatch2 DelayMs 100 u Show values latched by Z1 amp Z2 X702 X703 User s Manual Nov 2004 Rev 1 0 51 59 read encl unsigned long enc1 unsigned int HighByte MiddleByte LowByte Check HighByte inportb 2 no latch try again LowByte inportb 0 latch MiddleByte MiddleByte inportb 1 Check inportb 2 no latch if Check HighByte HighByte is changed HighByte Check goto try_again enc1 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte read_enc2 unsigned long enc2 unsigned int HighByte MiddleByte LowByte Check unsigned long enc HighByte inportb 6 no latch try_again LowByte inportb 4 latch MiddleByte MiddleByte inportb 5 Check inportb 6 no latch if Check HighByte HighByte is changed HighByte Check goto try_again enc2 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte X702 X703 User s Manual Nov 2004 Rev 1 0 52 59 The int c is given as follows include lt stdio h gt include lt stdlib h gt include lib 7188e h define EOITYPE_INTO 0x0c define EOITYPE_INTI 0x0d define INT_EOI Oxff22 End of interrupt register define INT_MASK Oxff28 Interrupt mask register unsigned long EncLatch1 EncLatch2 unsigned long OldIntVectO 0 OldIntVect1 0 OldIntVect4 0
28. der Counting Mode 35 2 1 3 Encoderl 24 bit values si SE EE amu ee EE 36 2 1 4 Encoder 24 bit Value ii EE ede aie bel cme Gites 37 2 2 UO Control Registers of X703 38 Seck Set Encoder Counting Mode ss ese se ee SE ge 39 ER Read A B Z amp Encoder Counting Mode 40 22 95 Bricoderl 24 bit ValUE s sa sasana anush sends acne 41 2 2 4 Encoder2 24 bit Value sss sees eee eee 42 As Encoders 24 bit Value sa 2 EE her ee Belted de en eo 43 X702 X703 User s Manual Nov 2004 Rev 1 0 2 59 3 SOFTWARE EXAMPLES 44 Sal 3 2 X102 Ie TOP ROS CANN st n eat ape ah test ete Nae EE tas eat Ee 45 3 1 1 Read A B Z Demo X702XOR EXE 45 3 1 2 Read Encoder Demo X702RENC EXE 47 3 1 3 Z Interrupt Demo X7021NT EXE 50 X103 Demo ProOgralfliiu asan sare eee gee N Vata RE eia 55 3 2 1 Read A B Z Demo X703XOR EXE 55 3 2 2 Read Encoder Demo X703RENC EXE 56 323 Z Interrupt Demo X703INT EXE 58 X702 X703 User s Manual Nov 2004 Rev 1 0 3 59 1 QGeneral Introduction
29. ib 7188E h int xorl xor2 main Print nxorl 0 or 1 xorl Getch 0 if xor1 xorl 1 Print nxor2 0 or 1 xor2 Getch 0 if xor2 xor2 1 outportb 3 xor1 set xorl amp counting model stop outportb 7 xor2 set xor2 amp counting mode2 stop for if Kbhit Set Xor amp Counting Mode Getch return show_abz DelayMs 100 show_abz Read ABZ status int zbal zba2 1 zbal inport 3 read ABZ status amp counting mode of encoder1 zba2 inport 7 read ABZ status amp counting mode of encoder2 X702 X703 User s Manual Nov 2004 Rev 1 0 45 59 Print n XOR1 d Z1B1A1 xor1 for G 0 i lt 3 i if zbal amp 0x20 Print 1 else Print 0 zbal zbal lt lt 1 Show ABZ status Print XOR2 d Z2B2A2 xor2 for G 0 i lt 3 i if zba2 amp 0x20 Print 1 else Print 0 zba2 zba2 lt lt 1 Print 1 Run X702XOR EXE 2 Press Qp User set XOR1 1 3 Press ds User set XOR2 1 4 Press Any Key to Stop cx 7188XW 1 26 COM2 115200 N 8 1 FC 0 CTS 0 DIR E i7188e gt x702xor OH or 12 OH or 1 AN GEE ip CKOR2 1 Z2B2A2 868 gt Z1B1 1 000D gt CROR2 1 Z2B282 000 gt MAN GEED C ROR2 1 Z2B2 082 000 gt ah 666 gt CROR2 1 Z2B282 000 gt Z1B1 1 D00D CKOR2 1 Z2B2 82 0D00D gt 1B1A1 666 gt CROR2 1 Z2B2A2 666 gt Z1B1 1 000D gt
30. internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to all A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XOR2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 14 59 1 1 7 X703 Differential Encoder Ext 5V 5V GND 5V GND Power Supply LU U LU U U U U U LU U U LU U LU U LU U LU U LU U U LU U LU U U U U U LU U LU U U U LU U LU _ External 5V Differential input 2500V isolation e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V The XOR3 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to all A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XOR2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 15 59 1 1 8 X703 Single ended Encoder Ext DN 5V GND 5V GND Supply D U U LU U U U LU U LU U U LU U LU U LU U LU U U LU U LU U U U LU U LU U LU U LU U U U U U LU U U
31. ll apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 for XOR1 XOR 2 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 10 59 1 1 3 X702 Differential Encoder Ext 5V Encoder 5V GND 5V GND Power Supply External 5V Differential input 2500V isolation e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e The XOR2 bit must be set to 1 for internal active high logic e The XORI will apply to all A B Z signals of encoder and XOR2 will apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 for XOR1 XOR 2 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 11 59 1 1 4 X702 Single ended Encoder Ext 5V Encoder 5V GND llass lU External 5V Single ended input 2500 V isolation e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e If A B Z signals of encoder2 are active low the XOR2 bit must be set to 1 for internal active high logic e If A B Z signals of encoder2 are active high the XOR2 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoder and XOR2 will apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 for XOR1 XOR 2 cont
32. logic If A B Z signals of encoder3 are active high the XOR3 bit must be set to 0 for internal active high logic X702 X703 User s Manual Nov 2004 Rev 1 0 28 59 1 5 Encoder Counting Mode The internal counting logic is active high Refer to Sec 1 6 to use XOR control bits for active high logic There are 3 different counting modes given as follows CW CCW Counting Mode A gt CW B2CCW a TA ess CCW Ecnoder Value Pulse Direction Counting Mode A gt Pulse B2Direction Direction oO ET Ecnoder Value 0 1 2 1 0 1 Ouadrant Counting Mode A gt A BOB X702 X703 User s Manual Nov 2004 Rev 1 0 29 59 1 6 XOR Control The expected waveform of internal logic is active high as given in Sec 1 5 User can use XOR control bits to select the proper waveform as follows Case 1 differential input of X702 set XOR 1 X702 X703 User s Manual Nov 2004 Rev 1 0 e 30 59 The demo program X702XOR EXE is design for X702 and X703XOR EXE is designed for X703 User can run X702XOR EXE or X703XOR EXE first to check the initial value must be 0 as follows Run X702XOR EXE lt Q se set XOR1 1 lt Q User set XOR2 1 Press Any Key to Stop Press 1 Press 1 AE cx 7188XW 1 26 COM2 115200 N 8 1 FC 0 CTS 0 DIR E 17188e gt x7 82xor CH CH or 1 gt or 1 gt AN GEE ip Z1B1A1 AAA Z1B1 1 000 gt Z1B1 1 000 gt Z1B1A1 AAR Z1B1 1 000 gt Z
33. me the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e The XOR2 bit must be set to 1 for internal active high logic e The XORI will apply to all A B Z signals of encoder and XOR2 will apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 for XOR1 XOR 2 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 18 59 1 2 2 X702 Single ended Encoder Ext 12V Encoder 1K 1 4W B 1K 1 4W A 12V GND 12V GND Power hoe eI Supply External 12V Single ended input 2500V isolation Note some current limit resistors 1K 1 4W must be added as above diagram e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e If A B Z signals of encoder2 are active low the XOR2 bit must be set to 1 for internal active high logic e If A B Z signals of encoder2 are active high the XOR2 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoder and XOR2 will apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 for XOR1 XOR2 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 19 59 1 2 3 X703 Differential Encoder Ext 12V 12V GND 12V GND Power Supply LU U U U U U LU U U U LU U U U LU U LU
34. or1 set xorl amp counting model outportb 7 xor2 set xor2 amp counting mode2 outportb 0 0 A clear encoderl to 0 Clear encoderl amp encoder2 outportb 4 0 clear encoder2 to 0 for if Kbhit Getch return read_enc1 amp EncVal1 read_enc2 amp EncVal2 Print n mode 1 x enc 1 lx mode2 x enc2 l1x xor1 EncVal1 xor2 Enc Val2 DelayMs 100 read_encl unsigned long enc1 unsigned int HighByte MiddleByte LowByte Check HighByte inportb 2 no latch try_again LowByte inportb 0 latch MiddleByte MiddleByte inportb 1 Check inportb 2 A no latch if Check HighByte HighByte is changed HighByte Check goto try_again enc1 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte Get 24 bit encoder1 X702 X703 User s Manual Nov 2004 Rev 1 0 48 59 read enc2 unsigned long enc2 unsigned int HighByte MiddleByte LowByte Check HighByte inportb 6 try_again LowByte inportb 4 MiddleByte inportb 5 no latch latch MiddleByte Check inportb 6 no latch if Check HighByte HighByte is changed HighByte Check goto try_again enc2 ong HighByte lt lt 16 MiddleByte lt lt 8 LowByte Get 24 bit encoder2 Run X702RENC EXE ON E ID EE Press 1 E Press 1 Ss Press 1 Gs Press 1 a Press Any Key to Stop cx 7188XW 1 26 COM2 115200 N 8 1 FC 0
35. r XOR1 XOR 2 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 23 59 1 3 2 X702 Single ended Encoder Ext 24V Encoder 2K 1 2W B 2K 1 2W A 24V GND 24V GND Power Supply External 24V Single ended input 2500V isolation e Note some current limit resistors 2K 1 2W must be added as above diagram e The isolation voltage of photo couple is 2500V Assume the isolation voltage of above power supply is greater than 2500V the isolation voltage of this configuration will be 2500V e If A B Z signals of encoder2 are active low the XOR2 bit must be set to 1 for internal active high logic e If A B Z signals of encoder2 are active high the XOR2 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoder1 and XOR2 will apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 for XOR1 XOR2 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 24 59 1 3 3 X703 Differential Encoder Ext 24V 24V GND 24V GND Power Supply LU U U U LU U LU U U U U U LU U LU U LU U LU U U U LU U U LU U LU U U U U LU U U U LU U U U U U U U U LU U External 24V Differential input 2500V isolation eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeed e Note some current limit resistors 2K 1 2W must be added as above diagram e The isolation voltage of photo couple is 2500V Assume the
36. rol bits X702 X703 User s Manual Nov 2004 Rev 1 0 12 59 1 1 5 X703 Differential Encoder Int DN Encoder Internal 5V Differential input 1000V isolation U LU U U U LU U U U U 1 U LU U LU U U U U LU U U LU U LU U U U U U U U U LU U LU U U LU U LU eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeg e The isolation voltage of 5V power is 1000V So the isolation voltage of this configuration is also 1000V The XOR3 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoderl XOR2 will apply to all A B Z signals of encoder2 and XOR3 will apply to A B Z signals of encoder3 Refer to Sec 2 2 1 for XOR1 XOR2 XOR3 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 13 59 1 1 6 X703 Single ended Encoder Int 5V Encoder Internal 5V Single ended input 1000V isolation eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeed LU U LU U U U U U LU U U LU U LU U LU U LU U LU U U LU U LU U U U U U U LU U U U LU U LU e The isolation voltage of 5V power is 1000V So the isolation voltage of this configuration is also 1000V e If A B Z signals of encoder3 are active low the XOR3 bit must be set to 1 for internal active high logic e If A B Z signals of encoder3 are active high the XOR3 bit must be set to 0 for
37. t stdio h gt include lt stdlib h gt include lib 7188E h int xor xor2 model mode 2 unsigned long Enc Val1 EncVal2 extern unsigned long EncLatch1 EncLatch2 defined in int c main Print nxorl 0 or 1 xorl Getch 0 if xorl xorl 1 try againl Print nmode1 0 stop 1 cw ccw 2 pule dir 3 a b model Getch switch model1 case 0 break stop case 1 xorl 0x02 break cw ccw case 2 xorl 0x04 break pulse dir case 3 xorl 0x06 break A a b default goto try againl X702 X703 User s Manual Nov 2004 Rev 1 0 50 59 Print nxor2 0 or 1 xor2 Getch 0 if xor2 xor2 1 try_again2 Print nmode2 O stop 1 cw ccw 2 pule dir 3 a b mode2 Getch switch mode2 case 0 break stop case xor2 0x02 break cw ccw case 2 xor2 0x04 break A pulse dir case 3 xor2 0x06 break A a b default goto try_again2 outportb 3 xor1 set xorl amp counting model outportb 7 xor2 set xor2 amp counting mode2 outportb 0 0 A clear encoderl to 0 outportb 4 0 clear encoder2 to 0 InstallIntOIsr Q i i i nstallIntOIsr Install interrupt service routine for Z1 amp Z2 InstallInt1Isr Q for if Kbhit RestoreIntOIsrQ RestoreInt1IsrQ Getch return read encl amp EncVall read enc2 amp EncVal2 Print n mode 1 x enc1 lx mo
38. t3 Bit2 Bitl BitO EnB23 EnB22 EnB21 EnB20 EnB19 EnB18 EnB17 EnB16 24 bit encoder2 gt EnB23 EnBO EnB23 is MSB EnB0 is LSB When program read address 4 the EnB23 EnB8 will also be latched The correct codes to read 24 bit encoder value are given as follows read_enc2 unsigned long enc2 unsigned int HighByte MiddleByte LowByte Check LowByte inportb 4 latch MiddleByte amp HighByte MiddleByte inportb 5 HighByte inportb 6 encl long HighByte lt lt 16 MiddleByte lt lt 8 LowByte e Write any value to address 4 will clear EnB23 Outportb 4 0 clear EnB23 EnBO to 0 nb to 0 as follows X702 X703 User s Manual Nov 2004 Rev 1 0 2 2 5 Encoder3 24 bit Value Read address 8 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnC7 EnC6 EnC5 EnC4 EnC3 EnC2 EnCl EnCo Read Address 9 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnC15 EnCl4 EnC13 EnC12 EnCll EnC10 TEnC9 EnCS Read address 10 Bit7 Bit6 Bit5 Bitd Bit3 Bit2 Bitl BitO EnC23 EnC22 Fonc EnC20 EnCI19 EnC18 EnC17 EnC16 24 bit encoder3 gt EnC23 EnC0 EnC23 is MSB EnC0 is LSB When program read address 8 the EnC23 EnC8 will also be latched The correct codes to read 24 bit encoder value are given as follows read_enc3 unsigned long enc3 unsigned int HighB
39. tial Section INput Internal 5V Section 1 1 2 Single end Input Section TAS X702 Differential Input External 5V Section 4414 Single end Input 5V Encoder Section TEAS Differential Input Internal 5V Single end Section Input 1 1 6 Differential Section Input X703 P N External 5V Single end Section Input LLB X702 X703 User s Manual Nov 2004 Rev 1 0 8 59 1 1 1 X702 Differential Encoder amp Int DV Encoder Internal 5V Differential input 1000V isolation e The isolation voltage of 5V power is 1000V So the isolation voltage of this configuration is also 1000V e The XOR2 bit must be set to 1 for internal active high logic e The XORI will apply to all A B Z signals of encoder and XOR2 will apply to all A B Z signals of encoder2 Refer to Sec 2 1 1 for XOR1I XOR2 control bits X702 X703 User s Manual Nov 2004 Rev 1 0 9 59 1 1 2 X702 Single ended Encoder Int 5V Encoder Internal 5V Single ended input 1000V isolation e The isolation voltage of 5V power is 1000V So the isolation voltage of this configuration is also 1000V e If A B Z signals of encoder2 are active low the XOR2 bit must be set to 1 for internal active high logic e If A B Z signals of encoder2 are active high the XOR2 bit must be set to 0 for internal active high logic e The XORI will apply to all A B Z signals of encoder and XOR2 wi
40. to Sec 1 2 for 12V encoder amp Sec 1 3 for 24V encoder e VCOM1 A1 B1 Z1 is for encoderl VCOM2 A2 B2 Z2 is for encoder2 and VCOM3 A3 B3 Z3 is for encoder3 These signals are connected to photo couple devices for signal isolation e The internal logic is active high If VCOM1 A1 B1 Z1 is active high XOR1 must be set to 0 If VCOM1 A1 B1 Z1 is active low XOR1 must be set to 1 If VCOM2 A2 B2 Z2 is active high XOR2 must be set to 0 If VCOM2 A2 B2 Z2 is active low XOR2 must be set to 1 If VCOM3 A3 B3 Z3 is active high XOR3 must be set to 0 If VCOM3 A3 B3 Z3 is active low XOR3 must be set to 1 e The Z1 after XOR1 logic is connected to mu of I O Expansion Bus The Z2 after XOR2 logic is connected to intl of I O Expansion Bus The Z3 after XOR3 logic is connected to intl of I O Expansion Bus Refer to Sec 3 2 3 for more information X702 X703 User s Manual Nov 2004 Rev 1 0 7 59 5V Encoder Signal Wiring User can use internal 5V or external 5V to drive 5V encoder It is recommended to use Internal 5V for 5V encoder The isolation voltage of internal 5V power is 1000V and the isolation voltage of photo couple is 2500V Using internal 5V power the system isolation voltage will be 1000V This configuration can fit most of applications User can use external 5V power supply to increase the system isolation voltage to 2500V The signal wiring diagram are given in Sec 1 1 1 Sec 1 1 8 as follows Differen
41. yte MiddleByte LowByte Check LowByte inportb 8 MiddleByte inportb 9 HighB yte inportb 10 enc3 long HighByte lt lt 16 MiddleByte lt lt 8 LowByte latch MiddleByte amp HighByte e Write any value to address 8 will clear EnC23 EnC0 to 0 as follows Outportb 8 0 clear EnC23 EnCO to 0 X702 X703 User s Manual Nov 2004 Rev 1 0 3 Software Examples The demo program of X702 X703 are given in the companion CD as follows Lib X107 Fr X702XOR X702 Loen CD WNapdos 7188e MiniOS7 demo BC loexpbus Shavers a Loaec X703INT X608 Watchdog User s manual CD Napdos 7188x manual hardware x702x703 pdf User can download these demo programs from our web site as follows Lib X107 i X702XOR xro xT02RENC en tp icpdas com pub cd 8000cd JI b X702INT Web site napdos 7188e minios7 demo bc sa pia X703XOR X703 XZOSRENC X703INT X608 Watchdog User smanual ftp icpdas com pub cd 8000cd napdos 7188x hardware X702X703 pdf All demo program are coded as follows e Using BC Large model e Using 7188EL LIB Main program 2 MAIN C One project file for BC e One execution file X702 X703 User s Manual Nov 2004 Rev 1 0 44 59 3 1 X702 Demo Program 3 1 1 Read A B Z Demo X702XOR EXE Main program 2 MAIN C Project file gt X702XOR PRJ include lt stdio h gt include lt stdlib h gt include l
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