pif - Raspberry Pi FPGA Board
Contents
1. Initial entry 01 Jul 13 te non common definitions to personalise the pif implementations library ieee use ieee std logic 1164 all package pifcfg is pif1200 7000 41h 42h A B constant PIF_ID std logic _vector 7 downto 0 constant X02 DENSITY string XAI SES a 200 Rar end package pifcfg package body pifcfg is end package body pifcfg Additional constants and functions can be added as a design requires Usually the simplest practice is to define a constant in pifcfg vhd and use the constant to determine properties in a lower module For instance a lower level module could include something like function myParameter density string return integer is begin if density 1200L then return 1 flasher else return 3 end if end Overall configuration definitions and useful constants are defined in the defs module pifdefs vhd in the common directory A small snip of this file is library ieee use ieee std logic 1164 all use ieee numeric std all library work use work pifcfg all package defs is save lots of typing subtype slv2 is std logic vector 1 downto 0 subtype slv3 is std_logic_vector 2 downto 0 subtype slv4 is std_logic_vector 3 downto 0 subtype slv5 is std_logic_vector 4 downto 0 subtype slv6 is std_logic_vector 5 downto 0 subtype slv7 is std_logic_vector 6 downto 0 subtype slv8 is std_logic_vector 7 downto 0 subtype slv16 is std_logic_vector 15 downto 0 subt2. 13 pifload py e the content of the HTML that is generated is governed by index html layout html header html and footer htm in the templates directory e the appearance of the HTML is governed by style css in the static directory Make sure you have loaded the flashct configuration in your pif board for example via this command line 14 ri sai pa ata p31 3etqGna etoz gt anz c l BZOEE LPZBTaONW In normal usage Schematic Schematic ANM eno raD wszta aezia wezla aeza xmpa azzia wpa wzzia astia wetia alta witta astia wstia wind aztia wind wztia atria WItia sola vota asta vera asIa vsa wind agta widd yota ITId avia ITId vria BaTId aeta SaTiad veta ANmMenone ptorap zeorap fzorab Iasis astaa Nns vetaa aleasa wieaa astaa wseaa atesa attaa wtesaa a6zaa wezaa aszaa vozaa wind aezaa wina wezaa aetaa vetaa xwwa astaa xwmDa v taa aectaa wetaa osias aztaa wind vztaa asaa veaa asaa NIrasso vosa araa vraa aLvorTana ra4a Id LOIA TAD aND 8014 029 WIDS TTOIA szora AND pzora ezora GND stora OSIN 6OIA ISOW OTOTa EAE zzora tz zora LtOIA stora ax GND PTOIA AXL OxwID voIra GAND OAS OAS oIms tora ovas oora EAE aastTia wzaa aastia azaa rTa weua rra acua Dvaa wsua asua wLua alua weua asua witaa atta wind witaa wind aztaa wstua astaa wotua astua witua a taa wetua getua wtzaa atza
3. 92 FPGA pin 94 OSD INID UI AI WIN BE FPGA pin 98 oO FPGA pin 100 m m Ground m N FPGA pin 105 m w FPGA pin 107 Dimensions Test Points There is one test point on a pif board e TP1 is connected to GP5 on the MCP23008 and to PROGn on the FPGA pin 119 Dimensions e Length 48 3mm 1 9 inch e Width 38 1mm 1 5 inch e Thickness standard 1 6mm PCB plus 1 3mm components plus the Raspberry Pi connector e Weight almost nothing Firmware Firmware These example VHDL firmware programs are supplied with a pif board 1 flasher vhd is a simple program that alternately flashes the red and green LEDs 2 flashctl vhd also flashes the LEDs but in this case the flash pattern can be controlled by an external computer Directory Structure e firmware e 1200 e flasher e flashctl e 7000 e flasher e flashctl common There are separate directory trees for a pif 1200 and a pif 7000 With one exception see the Configuration section HDL code is in the common directory It could be a useful precaution to hide or rename the directory for the board you do not have For instance if you have a pif 1200 you could rename the 7000 directory to 7000x Configuration Designs are configured for the XO2 1200HC and the XO2 7000HC FPGAs via the pifcfg package in pifcfg vhd files in the 1200 and 7000 directories For example pifcfg vhd 1200 version
4. from the flasher build where the LEDs light up in antiphase to the flashct configuration where the LEDs light up in phase The Software page shows you how to enable I2C and SPI access on your Raspberry Pi and how to download the software Then change to the software directory and load the flashct configuration If you have a pif 1200 the command line is feudo python pifload py firmware 1200 flashctl syn pif flashctl jed If you have a pif 7000 the command line is Hardware Hardware w E336755 8 lt c Bugblat U2 R2 ust BG J4 32 D E p gl e a Ete E R3 B aa Oa Da SPI Bus Functional Description The key components of the Bugblat pif board are e XO2 a Lattice Semiconductor MachXO2 FPGA details at Lattice e MCP23008 a Microchip I2C port expander details at Microchip A pif 1200 uses an XO2 1200HC FPGA and a pif 7000 uses an XO2 7000HC FPGA The 1200HC FPGA contains 1280 four input lookup tables LUTs the 7OOOHC FPGA contains 6864 LUTs The 7000HC part also has more on chip memory and a second PLL More LUTs means that a more complex design can be fitted into the FPGA The MCP23008 is an 8 bit I O expander that sits on the Raspberry Pi s I2C bus and drives the XO2 s control pins The Raspberry Pi expansion bus does not have an abundance of pins so it makes sense to control low activity pins in this way The MCP23008 drives the following XO2 pins Connectors e JTAGENn Thi
5. on chip flash memory which includes e user flash memory UFM e configuration logic flash memory e an interface to dynamic PLL settings e an interface to the on chip power controller The EFB is exhaustively documented in the XO2 handbook which can be dowloaded from the Lattice web site Our i2c stream is connected to the EFB s primary i2c core The other side of the the EFB presents a Wishbone interface to FPGA internal logic and that is the interface we use to control our logic The Wishbone interface is easily handled by a state machine as seen in pifwb vhd This state machine listens to events on the Wishbone interface and generates a minimal internal address and data bus Here is the definition of the incoming address and data bus extracted from pifdefs vhd type XIrec is record write data for regs PWr boolean registered single clock write strobe PRWA TXA registered incoming addr bus PRdFinished boolean registered in clock PRDn goes off PRdSubA TXSubA read sub address PD TwrData registered incoming data bus end record XIrec pifctl vhd listens to this bus writes values into registers and reads values from registers Here is an example of writing to a register on a pif board 1 the Raspberry Pi executes an i2c write to send the data over i2c to the FPGA s EFB 2 the FPGA state machine detects data available on the Wishbone interface reads in the data and generates a write strobe 3 p
6. DL files to JEDEC bit streams There are many paths for injecting the JEDEC data into a pif FPGA but the documentation can be confusing The official route is via the isoUFW and ispVM system Since a pif board is a single chip system we can use a simple solution the Lattice Diamond JEDEC can be loaded directly into a pif FPGA via the pifload py script 10 Software Software The software supplied with a pif board supports e finding the pif board in your system e loading a configuration into the pif board e interacting with the pif board via a web HTML front end Low level functions are supplied as C C programs high level functions are in Python Raspberry Pi Setup Setting up your Raspberry Pi for GPIO access I2C and SPI is covered by many articles on the web so we will only give a brief summary for the Raspberry Pi Model B Check on the net if you have a Model A Provided you have etc modprobe d raspi blacklist conf you will need to remove the I2C and SPI blacklisting Start up an editor for instance nano sudo nano etc modprobe d raspi blacklist conf then comment out these lines by putting a at the start of each line blacklist spi bcm2708 blacklist i2c bcm2708 Add the I2C kernel modules by editing etc modules sudo nano etc modules and insert two lines at the end of the file i2c bcm2708 i2c dev then reboot sudo reboot Download the i2ctools utility sudo apt get install python smbus sudo apt get i
7. a wezua gezaa wezaa 4L01d taD 8014 089 szora aND tzora ezora anp storia stora axa PTOIA AXL aND oas oas PzOTAD ecorap BtOTaD PTOIA asia wot a gotLa VITLA attLa OaL DvTLA IaL artLa wstia astia XDL DLTLA SAL GLTLA wIDd vetLa wind setia Tos otzLa was azziLa wszia aszila NHEOVLO DLTIa nbodd dLzLa vazia asza VEELA aEELA WSELa aSseLa NLINI O9ELa BNOd astLa anD wins ttora OSIW 60I4a ISsOW OTOTa EAE zzora tz 4zota 4tora aNnp owID Pola omDs tora owas oora LZOIGD LTOTaD Note that there are three Do Not Fit sites on the board e R1 and R2 will accept 0402 components and could be used for pullups to 3 3V these sites should not be populated the Raspberry Pi provides I2C pullups e U4 will accept a DFN8 package typically a CAT34C02 I2C EEPROM 15 Legal Stuff Legal Stuff This is a board for inquisitive minds with a basic understanding of electronics You know what that means Since the board is not a completed product it may not meet all the regulatory and safety compliance standards which may normally be associated with similar items You assume full responsibility to determine and or assure compliance with any such standards and related certifications as may be applicable You will employ reasonable safeguards to ensure that your use of the the board will not result in any property damage or injury or death even if the the board should fail to perfo
8. ce ID 012bd043 device is an X02 7000HC pifload py This program takes a configuration JEDEC file as input It then 1 searches for a pif board 2 clears the pif s FPGA flash memory 3 loads the new configuration data into the flash memory 4 reinitializes the FPGA For example with this command line sudo python pifload py pif flasher jed this is the output from a run on my computer the line starting programming has been shortened Configuration file is pif flasher jed Using pif library version libpif Aug 2 2013 12 36 53 X02 Device ID 012bd043 device is an X02 7000HC X02 Trace ID 00 44 30 96 43 04 22 09 X02 usercode from Flash 00 00 00 00 X02 usercode from SRAM 50 49 46 30 JEDEC file is pif _flasher jed starting to read JEDEC file first configuration data line 23 last configuration data line 1591 1569 frames finished reading JEDEC file erasing configuration flash erased programming configuration flash 4 programmed transferring configuration finished pifweb py This program implements browser control of the flashctl configuration in a pif board You need to have installed Aaron Swartz web py script sudo apt get install python webpy There are several parts e pifweb py uses web py to e start a web server e serve up the application web page e listen for GET and POST commands from the web page e communicate with the pif board e send replies to the web page
9. ifctl vhd or other application logic detects the write strobe checks for an address match and loads the data into an internal register So where does the internal address come from This design splits incoming bytes into a two bit type field and a six bit data field The type field can indicate an A byte or a D byte If it is an A byte the data field is loaded into an address register with the six bit field allowing up to 64 addresses If it is a D byte the six bit data field and a write strobe go out over the internal data bus Reading from a register is simpler Read data is always eight bits there is no need for an address field in readback data The address register is loaded just the same as for a write A read subaddress is cleared to zero at the same time the address is written The subaddress is incremented with every read Assuming the address has already been loaded here is an example of reading from a register on a pif board 1 the Raspberry Pi executes an i2c read of the FPGA s EFB 2 the FPGA state machine detects data required on the Wishbone interface It writes the register data to the wishbone interface generates a read finished internal strobe and increments the subaddress 3 the Raspberry Pi picks up the data from i2c Simulating Most of the design time with HDLs is spent in a simulator flashctl_tb in the common directory is a simulation testbed Compiling Compiling The Lattice Diamond system compiles H
10. ndicated by a square pad The pin numbering scheme is the same as for J1 Pin Definition 1 3 3V output 100mA maximum on the 3 3V pins together 2 5V output from the Pi 3 I2C SDA FPGA pin 125 and J1 pin 3 4 5V output from the Pi 5 I2C SCL FPGA pin 126 and J1 pin 5 6 Ground 7 XCLK FPGA pin 34 8 X1014 FPGA pin 33 9 Ground 10 XIO15 FPGA pin 28 11 XIO17 FPGA pin 26 12 XIO18 FPGA pin 24 13 XIO27 FPGA pin 22 14 Ground 15 XIO22 FPGA pin 21 Connectors 16 XIO23 FPGA pin 14 17 3 3V output 100mA maximum on the 3 3V pins together 18 XIO24 FPGA pin 12 19 SPI MOSI FPGA pin 71 and J1 pin 19 20 Ground 21 SPI MISO FPGA pin 45 and J1 pin 21 22 XIO25 FPGA pin 10 23 SPI SCLK FPGA pin 44 and J1 pin 23 24 XCEO FPGA pin 6 25 Ground 26 XCE1 FPGA pin 4 J3 8 pin single row expansion connector Pin 1 is indicated by a square pad Pin Definition 1 FPGA pin 38 2 FPGA pin 42 3 FPGA pin 47 4 FPGA pin 49 5 Ground 6 FPGA pin 59 7 FPGA pin 61 8 FPGA pin 65 J4 13 pin single row expansion connector Pin 1 is indicated by a square pad gr e 5 Definition FPGA pin 74 FPGA pin 76 FPGA pin 82 FPGA pin 84 Ground 3 3V output 100mA maximum on the 3 3V pins together FPGA pin
11. nstall i2c tools and check that the pi board is visible sudo i2cdetect y 1 With the pif flasher configuration loaded you should see this 0123 45 67 8 9 a bede i f 00 ee ae 10 ee ee 20 20 ee 30 lt we ee 40 lt ne 50 ee 60 lt ee ee 70 And with the pif_flashct configuration loaded you should see this 0 1 2 3 4 5 67 8 9 abcdef 00 Se s5 Se S29 S53 95 ee Se se Se oo oe ee 11 Software Installation Biiwdes e me ge Sats Gare SCh arti Gs ae ng ST BO ee ee Nan teeee eco eet teres eee ee eee Wee i eee ee eee a 20h is the I2C address for the pif s MCP23008 40h is the XO2 s I2C configuration address 41h is the XO2 s I2C user level slave address and 43h is the XO2 s I2C state machine reset address The standard pif software reloads the XO2 FPGA configuration flash via an SPI configuration port but the I2C configuration port is still active until it is explicitly disabled Software Installation The software can be downloaded from http www bugblat com products pif pif zip Midori the default browser on Raspbian will download to your home directory Alternatively you can download a Git repo https github com bugblat pif Direct
12. nt to the traditional numbering scheme for integrated circuits The I2C bus runs from the Raspberry Pi to the FPGA and the MCP23008 and also to matching pins on J3 The 12C lines SCL and SDA are pulled up on the Raspberry Pi board The FPGA can also be configured to source a secondary I2C bus The SPI bus runs from the Raspberry Pi to the FPGA and to matching pins on J3 The Raspberry Pi sources two SPI Slave Select signals CEO is connected to the FPGA Sn pin and is the SPI select signal for configuration CE1 is connected to FPGA pad 3 and is the SPI select signal for user logic Pin Definition 1 no connection 2 5V input from the Pi 3 I2C SDA FPGA pin 125 and J2 pin 3 4 5V input from the Pi 5 I2C SCL FPGA pin 126 and J2 pin 5 Connectors 6 Ground 7 Raspberry Pi clock FPGA pin 128 8 GPIO14 FPGA pin 32 9 Ground 10 GPIO15 FPGA pin 27 11 GPIO17 FPGA pin 25 12 GPIO18 FPGA pin 23 13 GPIO27 FPGA pin 20 14 Ground 15 GPIO22 FPGA pin 19 16 GPIO23 FPGA pin 13 17 no connection 18 GPIO24 FPGA pin 11 19 SPI MOSI FPGA pin 71 and J2 pin 19 20 Ground 21 SPI MISO FPGA pin 45 and J2 pin 21 22 GPIO25 FPGA pin 9 23 SPI SCK FPGA pin 44 and J2 pin 23 24 SPI CEO FPGA pin 70 25 Ground 26 SPI CE1 FPGA pin 3 J2 26 pin dual row expansion connector Pin 1 is i
13. ory Structure e src e static e templates C C shared library To control your pif board you need to e access the Raspberry Pi SPI and I2C pins e control the pif s onboard MCP23008 e control the pif s FPGA To ease this task we provide shared library libpif so libpif is written in C with a C wrapper so that it can interface easily to scripting languages such as Python The source files are in the src directory The interface is defined in the pifwrap h file For SPI and I2C access on the Raspberry Pi we use Mike McCauley s BCM2835 GPIO library To compile and install libpif so you need to change to the software src directory and enter the usual recipe make sudo make install The software src directory includes a precompiled libpif so file you can run the Python software even if the compiler tools for C C are missing from your system You still need to run the install step sudo make install if you use the precompiled libpif so We use the ctypes package for the interface between libpif so and Python scripts Python Programs All the Python programs are provided as uncompiled files Because they access SPI and I2C GPIO pins they must be run with root priviledges most easily via the sudo command For example sudo python piffind py piffind py This program scans the SPI bus Here is the output from a run on my computer 12 pifload py Using pif library version libpif Aug 2 2013 12 36 53 X02 Devi
14. pif Raspberry Pi FPGA Board version 1 0 Copyright 2013 Bugblat Ltd October 03 2013 Contents Quick Start Software Confidence Test Hardware Block Diagram Functional Description Power Connectors J1 26 pin dual row Raspberry Pi connector J2 26 pin dual row expansion connector J3 8 pin single row expansion connector J4 13 pin single row expansion connector Test Points Dimensions Firmware Directory Structure Configuration flasher flashctl Simulating Compiling Software Raspberry Pi Setup Software Installation Directory Structure C C shared library Python Programs piffind py pifload py pifweb py Schematic Legal Stuff The Design O MOON NN DOD TD UU RAU UU NNNDGe Ff e e e e RP RP RP RP PP RP PP RP pp nA UW WWNN NN YN LF FY OO Quick Start Quick Start cc Bugblat Q J4 J2 3 i peer S te Beu ad 5 sa O AN om E R UET Gia EJ ge os i gaa ba L a Zd w H Mii IH HIS i Hl 336755 M2 94V 0 R2 This is the documentation for Bugblat s Raspberry Pi FPGA board the pif board Your pif board comes with a small application already installed it flashes the onboard LEDs in antiphase So all you need to do is plug your pif board into your Pi and the LEDs should start doing what LEDs do best Software Confidence Test You can verify the software by flipping the pif board s configuration firmware
15. rm as described or expected The Design The design materials referred to in this document are not supported and do not constitute a reference design To the extent permitted by applicable law there is no warranty for the design materials Except when otherwise stated in writing the copyright holders and or other parties provide the design materials as is without warranty of any kind either expressed or implied including but not limited to the implied warranties of merchantability and fitness for a particular purpose The entire risk as to the quality and performance of the design materials is with you Should the design materials prove defective you assume the cost of all necessary servicing repair or correction This board was designed as an evaluation and development tool It was not designed with any other application in mind As such these design materials may or may not be suitable for any other purposes If any design material is used it becomes your responsibility as to whether it meets your specific needs or the needs of your specific applications and the design material may require changes to meet your requirements 16
16. s pin lets your application use the XO2 JTAG port pins when it is high reverting the pins to JTAG usage when it is low e JTAG I O four pins e the FPGA PROGn INITn and DONE pins Pin Function Connection 9 GPO FPGA pin 137 TDO 10 GP1 FPGA pin 136 TDI 11 GP2 FPGA pin 131 TCK 12 GP3 FPGA pin 130 TMS 13 GP4 FPGA pin 120 JTAGENn 14 GP5 FPGA pin 119 PROGn and test point TP1 15 GP6 FPGA pin 110 INITn 16 GP7 FPGA pin 109 DONE Power The XO2 runs at 3 3V provided by an on board regulator connected to the Raspberry Pi s 5V pins There is no connection to the Raspberry Pi s low current 3 3V pins Regulated 3 3V is also routed to J2 but should only be used for minimal loads For higher loads the raw 5V from the Raspberry Pi connector is fed out to J2 and you can use this to derive more current at 3 3V But notice and this is very important that the pins on the XO2 can tolerate 3 3V only XO2 I O pins can not tolerate 5V So the standard hookup is this e 5V comes in from the Raspberry Pi an on board regulator drops the 5V to 3 3V e both the 5V and the 3 3V are fed to expansion connector pins Connectors J1 26 pin dual row Raspberry Pi connector Pin 1 is indicated by a square pad As is standard this connector has 13 rows with two pins in each row The pins in the first row are numbered 1 and 2 the pins in the second row are numbered 3 and 4 and so on This is differe
17. ype slv32 is std_logic_vector 31 downto 0 these constants are defined in outer pifcfg files constant ID std logic vector 7 downto 0 constant DEVICE DENSITY string PIF ID X02 DENSITY I2C interface constant A ADDR 1 slv2 00 constant D ADDR 1 Slw2 s Bloke constant I2C TYPE BITS integer 2 constant I2C DATA BITS integer 6 pif lpf in the common directory is shared by all designs In the main it defines the pinout of the FPGA flasher flasher is a straightforward design It uses the FPGA s built in oscillator to drive PWM patterns to the on board red and green LEDs The LEDs are driven in antiphase The built in oscillator can be set to a variety of frequencies We choose 26 6MHz a frequency which is useful in more complex designs flasher vhd is a wrapper the main work is done in piffla vhd flashctl flashctl is more complex than flasher it can be controlled from the Raspberry Pi As before piffla vhd generates antiphase LED pulses However the pulse stream fed to the FPGA I Os is controlled by a register that can be written to or read from via the I2C bus This is how it works The i2c stream from the Raspberry Pi is wired up to a hard coded embedded function block EFB in the FPGA The FPGA EFB implements e two i2c cores a primary core and a secondary core Simulating e one SPI core e one 16 bit timer counter e an interface to
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