XWAY™ PHY11G (PEF 7071) Version 1.3/1.4/1.5 Ethernet Interface
Contents
1. XWAY PHY Ethernet Physical Layer Devices Ethernet Interface Circuit Design for XWAY PHY11G PEF 7071 Version 1 3 1 4 1 5 Application Note Revision 1 4 2014 02 10 Confidential Distribution with NDA by Marketing only Edition 2014 02 10 Published by Lantiq Deutschland GmbH Lilienthalstra e 15 85579 Neubiberg Germany 2014 Lantiq Deutschland GmbH All Rights Reserved Legal Disclaimer The information given in this document is confidential SUCH INFORMATION SHALL IN NO EVENT BE REGARDED AS A GUARANTEE OF CONDITIONS OR CHARACTERISTICS WITH RESPECT TO ANY VALUES STATED AS TYPICAL AS WELL AS EXAMPLES OR HINTS PROVIDED HEREIN INCLUDING THOSE RELATED TO USE AND OR IMPLEMENTATION OR APPLICATION OF COMPONENTS LANTIQ DEUTSCHLAND GMBH LANTIQ HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND INCLUDING WITHOUT LIMITATION WARRANTIES OF NON INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY IN PARTICULAR THOSE VALUES EXAMPLES OR HINTS ARE NO WARRANTIES OF A CERTAIN FUNCTIONALITY CONDITION OR QUALITY OF THE LANTIQ COMPONENT AND ALWAYS HAVE TO BE VERIFIED IN THE TARGET APPLICATION The information in this document is subject to regular updates and or corrections via errata sheet s or new revisions It is only valid as updated and or corrected Once a new revision or errata sheet is available it can be downloaded from Lantiq s Competence Center www lantiq com contact lanti2. R520 R527 e Figure 3 Use of Pin Strapping Configuration to select RGMII Mode For details on the value and type of components required for soft pin strapping configuration refer to the Bill of Materials The values mentioned there 11 KQ are for the configuration chosen for this implementation for other configurations options please refer to the User s Manuals 1 2 and 3 Application Note 10 Revision 1 4 2014 02 10 XWAY PHY11G PEF 7071 Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Ag Lantiq Confidential Circuit Block Details 3 3 Power Supply Domains Figure 4 shows the capacitor components required at the Vopp Vopr and Vppy power supply inputs 3V3 VDDR2 VDDP2 3V3 VDDR2 The voltage supply at VDDR2 and C434 C435 VDDH2 can be 2 5 V or 3 3 V This e figure shows the 3 3 V option VDDH2 GND VDDP2 VDDH2 C436 C438 C439 C440 C441 C442 C443 C444 ig I I 0 I N Q oO XWAY PHY11G PEF 7071 Figure 4 Provision of Vppp Voor and Vppy Power Domains The XWAY PHY11G includes an internal DC DC switching regulator for providing the Vppc and Vpp domains with 1 0 V However it also provides the option to disable this switching regulator and provide these domains using an external 1 0 V source Application Note 11 Revision 1 4 2014 02 10 fer L XWAY PHY1
3. 10 100 1000 Mbit s Confidential Circuit Block Details 3 4 Crystal Clock Source A 25 MHz crystal can be used to clock the XWAY PHY11G Figure 7 shows the components required for this configuration option U35 XWAY PHY11G PEF 7071 Figure 7 Circuitry for Connection of Crystal Clock For details on the value and type of components required to connect a crystal clock refer to the Bill of Materials Application Note 14 Revision 1 4 2014 02 10 u Lanr q XWAY PHY11G PEF 7071 Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Bill of Materials 4 Bill of Materials Details of components used in the circuit are given below The manufacturers are shown only for illustration equivalent components may be employed Table 1 Bill of Materials Component Description Value Package Manufacturer Information C434 C438 C439 Ceramic Chip 100 nF c0402 TDK Corporation C440 C441 C442 Capacitor 16 V X7R C443 C447 C449 10 C450 C451 C435 C436 C444 Ceramic Chip 10 uF c0805 TDK Corporation C446 C448 Capacitors 16 V X5R 10 T1 1000BASE T 7490200136 Wurth Elektronik LAN Transformer GmbH amp Co KG J1 RJ45 Single Port 615008143521 Wurth Elektronik Sheilded Connector GmbH amp Co KG LED1 SMD LED 0805 yellow LED 0805 LEDO805AC Wurth Elektronik GmbH amp Co KG LED2 SMD LED 0805 gree
4. Ceramic Chip 330 pF C0402 TDK Corporation Capacitor 50 V NPO 5 C493 Ceramic Chip 22 UF C1206 TDK Corporation Capacitor 10 V Y5V 80 20 R586 Resistor 5 0 063 W 5 1 Q R0402 Yageo Corporation Y6 DIP HC49S 15 ppm 25 MHz Crystal TXC Co Limited 20 pF Application Note 16 Revision 1 4 2014 02 10 foe L XWAY PHY11G PEF 7071 En ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential List of Preferred Transformers Modules 5 List of Preferred Transformers Modules Here is an indicative list of transformers which have been shown to give the performance that is required of the device It is not an exhaustive list For the parameter values that need to be met by the transformer for optimal performance please refer to Chapter 6 of the User s Manuals 1 2 and 3 The following parts have been measured and tested with our chipsets and seen with good performance Table 2 List of Recommended Transformers Part No Type Manufacturer 7490200136 Single 10 100 1000BASE T Wurth Elektronik GmbH amp Co KG H5004NL Single 10 100 1000BASE T Pulse Corporation LAN3241 Single 10 100 1000BASE T LinkCom Manufacturing Co Ltd LAN3482 Dual 10 100 1000BASE T LinkCom Manufacturing Co Ltd Literature References 1 XWAY PHY11G PEF 7071 Version 1 5 User s Manual Hardware Description Revision 2 0 2 XWAY PHY11G PEF 7071 Version 1 4 User s Manual Hardware Description
5. Figure 1 In particular it covers the following aspects of configuring the XWAY PHY11G PEF 7071 as a single Ethernet port e Twisted Pair Interface via RJ45 Connector Pin Strapping Configuration Power Supply Domains e Crystal Clock Source 3 1 Twisted Pair Interface via RJ45 Connector Figure 2 shows the circuitry for connecting the TPI pins of the XWAY PHY11G to a single port Gigabit Ethernet RJ45 connector module of type JKO 0193NL manufactured by Pulse Electronics This particular type of integrated connector module includes the required transformer circuitry as well Calibration resistors are required to be connected between the wires of twisted pair port C and ground These should be placed nearby XWAY PHY11G device and must have 1 accuracy LEDs connected to the LED 2 0 pins can display information on the status of the ethernet connection like speed operating mode etc U35 Transformer P AP 7 7 m 1 TPIAN i 2 p P BP 5 a TPIBN 4 e y TPIcP ur 7 7 TPICN p 7 r TPIDP n j 10 TPIDN is XWAY PHY11G g g 22 PEF 7071 7490200136 GND saa ws TT LED2 R487 gt c l CAS GND LED2 X LEDO R489 LED1 2 l Figure 2 Configuration of Single Port RJ45 Connect
6. Using External Low Voltage Power Supply 13 Circuitry for Connection of Crystal Clock 0 0 ce eee 14 Application Note 5 Revision 1 4 2014 02 10 XWAY PHY11G PEF 7071 iir Lantiq Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Overview 1 Overview This application note describes the circuitry and minimum components required to configure a functional Ethernet PHY port using the Lantiq XWAY PHY11G PEF 7071 Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Of the many schematic choices and interface configurations that can be build using this device this document shows only a copper application where the MAC interface is RGMII For other possible application interface choices please refer to the corresponding User s Manuals 1 2 and 3 Attention The application note is not valid for the XWAY PHY11G PEF 7072 device Application Note 6 Revision 1 4 2014 02 10 L XWAY PHY11G PEF 7071 ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Ethernet Port Configuration Circuit 2 Ethernet Port Configuration Circuit Figure 1 shows an overall schematic for configuration of an Ethernet PHY port using the XWAY PHY11G r I VDDP VDDR and VDDH Power i l Domains i l U35 Al 7 a Ai 30 p A 2 r gt gt l 26 27 l TPIAP TPIAN K
7. 1G PEF 7071 Z AANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Circuit Block Details Figure 5 shows the circuitry required when the internal DC DC switching regulator is used Components R586 C494 L10 C479 and C493 are required for this option U35 XWAY PHY11G PEF 7071 VDDL2 La ee Salz as VDDC2 L10 C479 C493 u 7 C448 C449 C450 ADORA C494 Lll F 7 9894 gt Figure 5 Provision of Vppc and Vpp Power Domains Using Integrated DC DC Regulator Application Note 12 Revision 1 4 2014 02 10 fer L XWAY PHY11G PEF 7071 Z ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Circuit Block Details Figure 6 shows the option where an external power supply is used for the 1 0 V voltage domains In this case components R586 C494 L10 C479 and C493 are not required but the REGO pin must be shorted to the VDDR pin 1V U35 I VDDL2 VDDC2 XWAY PHY11G PEF 7071 VDDL2 C446 C447 VDDC2 T VDDR2 Figure 6 Provision of Vppc and Vpp Power Domains Using External Low Voltage Power Supply For details on the value and type of components required for provision of power supply domains refer to the Bill of Materials Application Note 13 Revision 1 4 2014 02 10 fer L XWAY PHY11G PEF 7071 Z ANTIQ Single Port Gigabit Ethernet PHY
8. Revision 1 0 3 XWAY PHY11G PEF 7071 Version 1 3 User s Manual Hardware Description Revision 1 5 Application Note 17 Revision 1 4 2014 02 10 www lantiq com Published by Lantiq Deutschland GmbH
9. ale y Wwistea Pair TPIBP TPIBN A Interface and TPICP TPICN KA Pin Strapping 3334 Configuration TPIDP TPIDN MAC ae i LED 2 0 KALL RGMIIO_RXD3 1 RXD3 RGMII_RXD3 EN ER nn ee 1 RGMIIO_RXD2 2 RXD2 RGMII_RXD2 To Ke RGMIIO_RXD1 4 RXD1 RGMII_RXD1 ms 2 JTAG Interface i RGMIIO_RXDO gt RXDO RGMII_RXDO KL RGMIIO_RXCLK SIRXCLKIRCMILRXC RGMIIO_RXCTL RX_CTL RGMII_RX_CTL R607 VDDP2 RGMIIO_TXCLK R606 9J TX_CLK RGMII_TXC 15 2 RGMIIO_TXCTL R181 gt TX_CTL RGMII_TX_CTL ml 10 6 RGMIIO_TXD3 gt TXD3 RGMII_TXD3 ae POR _IN RGMIIO_TXD2 Y TXD2 RGMII_TXD2 R481 VDDP2 RP601 12 RGMIIO_TXD1 TXD1 RGMII_TXD1 ne ER 1 RGMIIO_TXDO 1 TXDO RGMII_TXDO Sl Crystal Clock I XTAL2 A CLKOUT GO_25M_OUT XWAY PHY11G PEF 7071 MDC I MDC 43 VDDP2 R584 lt GPHYO_INT lt GND ent ee ee ge A 1 VDDL VDDC and REGO I Power Domains Figure 1 Configuration of Ethernet PHY Port with XWAY PHY11G Application Note 7 Revision 1 4 2014 02 10 Ps L XWAY PHY11G PEF 7071 En ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Ethernet Port Configuration Circuit In Figure 1 the following points are to be taken into consideration The circuitry for connecting a single port connector to the TPI is described in Chapter 3 1 e In this application note RGMII mode is chosen to connect to the MAC The pin strap
10. and updated the manufacturer 17 Table 2 List of Recommended Transformers Moved the details of Wurth Elektronik GmbH amp Co KG to first row Trademarks of Lantiq CONVERGATE COSIC DUALFALC DUSLIC ELIC EPIC FALC GEMINAX ISAC IWORX OCTALFALC OCTAT QUADFALC SCOUT SEROCCO SICOFI SLIC SMINT SOCRATES VINAX VINETIC XWAY Other Trademarks ARM Bluetooth of Bluetooth SIG Inc CAT iq of DECT Forum eCosCentric eCos and eCosPro of eCosCentric Limited EPCOS of Epcos AG HYPERTERMINAL of Hilgraeve Incorporated IEC of Commission Electrotechnique Internationale IQfact and IQmax of LitePoint Corporation ITrDA of Infrared Data Association Corporation ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION MATLAB of MathWorks Inc NUCLEUS of Mentor Graphics Corporation Linux of Linus Torvalds MIPS of MIPS Technologies Inc USA muRata of MURATA MANUFACTURING CO SOLARIS of Sun Microsystems Inc Samtec of Samtec Inc TEAKLITE of CEVA Inc TEKTRONIX of Tektronix Inc UNIX of X Open Company Limited VERILOG PALLADIUM of Cadence Design Systems Inc VxWorks WIND RIVER of WIND RIVER SYSTEMS All other trademarks are the property of their respective owners Last Trademarks Update 2013 09 20 Application Note 3 Revision 1 4 2014 02 10 fer L XWAY PHY11G PEF 7071 E
11. n LED 0805 LEDO805AC Wurth Elektronik GmbH amp Co KG R487 R489 Resistor 5 0 1 W 150 Q0 R0603 Yageo Corporation R514 R527 R520 Resistor 0 625 W 11 KQ 1 R0402 Yageo Corporation R481 Chip Resistor CROW 4 7 KQ R0603 Vishay Intertechnology Inc R502 R503 Resistor 0 0625 W 16 KQ 1 R0402 Yageo Corporation R584 R607 Resistor 5 10 KQ R 0402 Yageo Corporation 0 063 W R608 Resistor 5 1 5 KQ R0402 Yageo Corporation 0 063 W RP601 Resistor 5 0 06 W 168 Q R 8P4R 0402 Yageo Corporation Array 8P4R R181 Resistor 5 330 R0402 Yageo Corporation 0 063 W U35 XWAY PHY11G PEF 7071 PG VQFN 48 Lantiq R606 Resistor 0 0625 W 75 Q 1 R0402 Yageo Corporation C426 C425 Ceramic Chip 33 pF C0402 TDK Corporation Capacitor 50 V NPO 5 R1 R2 R3 R4 Resistor 5 750 R0603 Yageo Corporation C1 Ceramic Chip 1 nF C1808 Holy Stone Capacitor 3 kV X7R Enterprise 10 C620 Electrolytic 10 V 10 uF Through hole TDK Corporation Application Note 15 Revision 1 4 2014 02 10 Confidential Table 1 Ag Lantiq XWAY PHY11G PEF 7071 Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Bill of Materials cont d Bill of Materials Component Description Value Package Information Manufacturer Required compone nts if the internal DC DC regulator is used L10 Inductor SMD 4 7 pH L WIC 453232F Wurth Elektronik 315 mA 10 1812 GmbH amp Co KG Wound C479 C494
12. n ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Table of Contents Table of Contents 3 1 3 2 3 3 3 4 Table f G ntenlts 22 0 02 en ae a a ae wah E A cre A ee 4 List f Figures cocida a a HR Inn 5 OVGIVIEW 266 05 22 00 a ee ee 6 Ethernet Port Configuration Circuit 0 00 euere 7 Circuit Block Details ooo car u ok De a a a a Da a a 9 Twisted Pair Interface via RJ45 Connector 22mm nme 9 Pin Strapping Configuration 0 0 0 0 nennen 10 Power Supply Domains 2 2 naseeeenen een eee 11 Crystal Clock Source 2 22 n arai anna een 14 Bill Of Materials its a ee ea na ee 15 List of Preferred Transformers Modules 2 22 comme 17 Literature Referentes o u Saved aeons as ansehen 17 Application Note 4 Revision 1 4 2014 02 10 zer L XWAY PHY11G PEF 7071 En ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential List of Figures List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Configuration of Ethernet PHY Port with XWAY PHY11G ooo 7 Configuration of Single Port RJ45 Connector for TPI 1 2 0 0 00 aaae 9 Use of Pin Strapping Configuration to select RGMII Mode anaana 10 Provision of Vopp Vopr and Vppp Power Domains auauua aaa aaaeeeaa 11 Provision of Vppc and Vpp Power Domains Using Integrated DC DC Regulator 12 Provision of Vppc and Vpp Power Domains
13. or for TPI Application Note 9 Revision 1 4 2014 02 10 fee L XWAY PHY11G PEF 7071 En ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Circuit Block Details Note 1 The requirement to leave the center taps of the transformer on the chip side floating as well as unconnected to each other must be followed 2 However for improving EMI performance of the system center taps of the transformers can be grounded with capacitors with value not exceeding 68 pF 3 The 16 kQ high precision 1 accuracy calibration resistors are required on the line side independent of whether the C and D pairs are being used or not in the application for ethernet connectivity 3 2 Pin Strapping Configuration The soft pin strapping configuration is done by means of resistors and capacitors connected to the LED 2 0 pins of the XWAY PHY11G The values of these resistors and capacitors are used to determine the different setup values for different modes of operation For the scope of this application note the soft pin strapping configuration selects RGMII mode to connect the XWAY PHY11G to the MAC device For a list of all possible pin strapping choices and their implications refer to the User s Manuals 1 2 and 3 Figure 3 shows the soft pin strapping configuration for RGMII mode In this configuration all the vectors on the LED 2 0 pins are set to 000 U35 XWAY PHY11G SEI PEF 7071 gt
14. ping configuration for selecting this mode is shown in Chapter 3 2 The components needed for provision of power domains is described in Chapter 3 3 including the option to use the XWAY PHY11G s internal DC DC switching regulator or not The circuitry for connecting a 25 MHz crystal clock source is described in Chapter 3 4 e The MDIO pins MDIO MDC and MDINT need to be driven with a compliant device The JTAG pins of the XWAY PHY11G TDO TDI TMS and TCK are not functionally required but can be connected to a header for test boundary scan purposes if required The JTAG interface is deactivated in this schematic by pulling up the TCK pin e Interrupt is configured as active low The I C interface is meant for connecting to an external EEPROM However it is unused in this schematic This is indicated by tying the SDA pin to ground e Figure 3 shows the pin strapping configuration for choosing the following options RGMII mode to connect to the MAC MDIO address 0 Copper flow During auto negotiation advertise 10 100 1000 Mbit s in both full and half duplex RGMII Transmit timing skew is set to 1 5 ns Application Note 8 Revision 1 4 2014 02 10 SER L XWAY PHY11G PEF 7071 En ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential Circuit Block Details 3 Circuit Block Details This chapter gives more details on the implementation of circuit blocks shown in the overall schematic in
15. q Any user of this document must ensure that they only use the latest update and or corrected revision LANTIQ HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND INCLUDING WITHOUT LIMITATION WARRANTIES OF NON INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY WITH RESPECT TO PREVIOUS REVISIONS OF THIS DOCUMENT ONCE AN UPDATE OR ERRATA SHEET IS AVAILABLE Information For further information on technology delivery terms and conditions and prices please contact the nearest Lantiq office www lantiq com Warning Lantiq components must not be used in life support devices or systems Life support devices or systems are those systems intended to be implanted in the human body or to support and or maintain and sustain and or protect human life If they fail it is reasonable to assume that the health of the user or other persons may be endangered zer L XWAY PHY11G PEF 7071 Z ANTIQ Single Port Gigabit Ethernet PHY 10 100 1000 Mbit s Confidential XWAY PHY Ethernet Physical Layer Devices Confidential Revision History Revision 1 4 2014 02 10 Previous Revision Revision 1 3 2014 01 14 Page Subjects major changes since last revision 9 Figure 2 Configuration of Single Port RJ45 Connector for TPI Split the transformer and connector in the schematic diagram 15 Table 1 Bill of Materials Updated the components used based on credit card sized demo board schematic diagram
Download Pdf Manuals
Related Search