RTE-V831-TP
Contents
1. m e e Lm e O sss emewmenemwren m w m 0 m ow o nn r Manufacturer KEL Models 8830E 026 170S straight 8830E 026 170L right angle 8831E 026 170L right angle fixing hardware attached Wire length Keep the wire from V831 2 to the connector as short as possible gt gt 100 mm or shorter is recommended 14 RTE V831 TP Hardware User s Manual Layout of the connectors on the board The figure below shows the physical layout of the connectors on the board 4010 B2 A2 t B1 A1 lt Polarity indication Board end Top View Note When actually arranging the pins design them according to the connector dimensional information RTE V831 TP Hardware User s Manual 12 EXT CONNECTOR The specifications of the EXT connector are given below Factory Use Output Must be left unconnected EXIO Input External input signal 0 pulled up with a 1 kQ resistor Edge detectable Factory Use Output Must be left unconnected External input signal 1 pulled up with a 1 kQ resistor ee teat ra pind ia rede Eee e 0 Notes 1 The inputs to EXIO EXI1 EXI2 and EXI3 are at 5V TTL level The TRG signal is an open collector signal pulled up with a 1 kQ resistor EXIO can be specified as a trace trigger EXIO to EXI3 are recorded in memory as trace information Be Oth Pin arrangement2. RTE V831 TP Hardware User s Manual 3 HARDWARE SPECIFICATIONS Emulation Emulation functions Operating frequency V831 100 MHz max V832 143MHz max JTAG N Wire Interface Break functions H W break points execution addresses S W break points Breaks that can be set using access events 100 Step breaks Supported Manual breaks Supported Trace functions 4 bits 4 bits x 128K words 1 Trace data bus Trace memory Trigger that can be set using an execution address Start that can be set using an execution address Stop that can be set using an execution address 1 only V832 0 1FFFFh 66 MHz max Trace delay Trace clock Data trace conditions Disassembled trace data display function Provided ROM emulation functions 4MB 50 ns Memory capacity Access time Number of ROMs that can be emulated DIP 32pin ROM 8 bit ROM DIP 40 42pin ROM 16 bit ROM 2 max Types of ROMs that can be emulated DIP 32 ROM probe 1M 2M 4M 8M 27C010 020 040 080 DIP 40 ROM probe 1M 2M 4M 27C1028 2048 4096 DIP 42 ROM probe 8M 16M 27C8000 16000 Bus width specification bits 8 16 32 Target ROM capacity bits 512K 1M 2M 4M 8M 16M 1 Pin mask functions 2 INTO0 03 10 13 NMI RESET HLDRQ 1 An 8 bit ROM probe supports ROMs of up to 8M bits 2 Depends on the CPU specifications 3 x Host system and interface Target host machine PC 9800 Series and DOS V PCs Debugger GHS Multi Window
3. 2 Turn on the power to RTE V831 TP Connect the dedicated AC adapter to the power jack of RTE V831 TP 3 Turn on the power to the user system 4 Start the debugger Powering off Quit the debugger Turn off the power to the user system Turn off the power to RTE V831 TP Disconnect the AC adapter from RTE V831 TP Turn off the power to the host system GN Do not turn on the power to the user system before powering on RTE V831 TP Doing so may cause a malfunction RTE V831 TP Hardware User s Manual 9 RTE FOR WIN32 This chapter describes the setting of RTE for WINS32 with the focus on the aspects specific to RTE V831 TP Starting ChkRTE32 exe Start ChkRTE32 exe after RTE V831 TP has been connected to the user system and the power to all the devices is on When RTE V831 TP is installed for the first time ChkRTE32 exe must be started once to select RTE Selecting RTE gt Set the Setup dialog box of ChkRTE32 exe as follows Setup RTE Products LX Setup RTE RTE 831 ind Me Host Card i O Port 2 0200h Reset Select V831 TP or V832 TP in RTE section Function test If RTE V831 TP is properly connected to the user system and capable of debugging the following dialog box appears upon the normal completion of the function test In this state control from the debugger is possible RTE for Windows xX RTE functional test RTE functional test comple
4. JEXT pin arrangement Applicable connector XG4M 1031 manufactured by Omron Corporation or equivalent 16 RTE V831 TP Hardware User s Manual 13 ROM PROBE SPECIFICATIONS DIP 32 ROM probe The DIP 32 ROM probe supports the following two pin arrangements The arrangement to support is determined with the jumper on JP1 JP1 1 2 jumpered A19 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 AO DO D1 D2 GND JP1 jumpered The labels at the end are marked and ROM at the factory If you purchase another DIP 32 ROM probe replace the labels with those supplied to distinguish it from the first one as shown in the figure below ROM1 gt ROM3 ROM gt ROM4 17 RTE V831 TP Hardware User s Manual DIP 40 ROM probe The DIP 40 ROM probe supports the following pin arrangement DIP 42 ROM probe The DIP 42 ROM probe supports the following pin arrangement The label at the end is labeled ROM1 or ROMe at the factory If you purchase another DIP 40 ROM or DIP 42 ROM probe replace the label with that supplied to distinguish it from the first one as shown in the figure below ROM1 gt ROM2 18 RTE V831 TP Hardware User s Manual 14 PRECAUTIONS This chapter provides precautionary information on the use of RTE V831 TP Precautions related to operation 1 Do not turn on the power to the user system while the power to RTE V831 TP is off Doing so can caus
5. for connecting to the user system used for debugging Probe for ROM emulation RTE V831 TP Hardware User s Manual 5 COMPONENT NAMES AND FUNCTIONS This chapter shows the appearance of RTE V831 TP as well as the names and functions of its components ROM USER POWER LED 4 N Wire connector ROM 1 connector PC host system connector Power jack ROM 2 connector EXT connector Power LED DCU USER POWER LED Power jack This is a connector for the power supply Power is supplied by inserting the plug of the supplied power supply into the jack Q Do not connect any device other than the supplied AC adapter RTE PS01 to the power jack PC host connector HOST This connector is used for connecting RTE V831 TP to the PC host system The host system interface cable is connected to this connector EXT connector EXT This connector is used for external signal input and internal signal output N Wire connector N Wire connector JDCU1 This connector is used for connecting RTE V831 TP to the user system via N Wire ROM emulator connector 1 ROM 1 connector JROM1 This is connector No 1 for connecting RTE V831 TP to the user system to emulate ROMs ROM emulator connector 2 ROM 2 connector JROM2 This is connector No 2 for connecting RTE V831 TP to the user system to emulate ROMs Power LED POWER This LED lights steadily while the power to RTE V831 TP is on DCU user system power LED DCU USER POWER LED DCU PO
6. processor V831 2 By controlling the debugging control circuit DCU incorporated into the processor from the outside RTE V831 TP enables highly transparent emulation on the board The debugger may be Multi developed by GHS or PARTNER developed by Naito Densei Machida Mfg Co Ltd both of which operate under Windows 95 The host system may be either a PC 9800 series or DOSN machine The PC and RTE V831 TP can be connected using a dedicated PCMCIA card host card designed for a bus LAN BOX etc depending on the environment This product comes with the following components First check that none of the components are missing 1 RTE V831 TP 1 2 RTE for Win32 Setup Disk 1 3 User s manual 1 4 N Wire cable 1 5 Power supply RTE PSO1 5V 2A 1 The following are required to use RTE V831 TP although they are not supplied with the product 6 ROM emulator probes Must be obtained as required Three types of probe are available DIP 32 ROM probe DIP 40 ROM probe DIP 42 ROM probe 7 Host interface lt One of the following is required gt One of the following is required PC card interface kit PC 9800 Series DeskTop PC interface kit DOS V DeskTop PC interface kit e LAN BOX 8 Debugger Either is required e GHS Multi PARTNER Win RTE V831 TP Hardware User s Manual 2 MAIN FEATURES High level language debuggers Both Multi and PARTNER are high performance high level language debuggers that enab
7. 1 10 INITIALIZATION 12 ervicomimand sc ee uet tee Eee E E EE ERE MI enu 12 COMMANA uod ed Dove rea cete aeu aad A ede e D Pe ae ee A 13 11 1 5 14 Pir arrangement tables scsi ooi oto teet Deest erect t toss mede te tede tenerse modes Qs 14 CONNECTIONS ciae ect e ue d e dum aderit ete d 14 AIC METRE UM 14 Layout of the connectors on the 15 12 16 13 ROM PROBE SPECIFICATIONS 17 1 2 HE 17 DIP 40 ROMIDEOD6 eerte rete tte ee onec noU rose DEED IM d 18 DIP 42 ROM Probes Tron Em 18 145 PRECAUTIONS N E E LE T 19 Precautions related to operation 19 Precautions related to FUNCTIONS eee ect cette teeta eee nennen nmm nnne nnne nennen nnns 19 RTE V831 TP Hardware User s Manual 1 OVERVIEW RealTimeEvaluator V831 TP hereinafter referred to as RTE V831 TP is an in circuit emulator for NEC s RISC
8. RTE V831 TP Hardware User s Manual RealTimeEvaluator RTE V831 TP Hardware User s Manual CONTENTS DOVER VIEW noe 2 2 Biwuuiicmme 3 3 HARDWARE SPECIFICATIONS 4 Emulation ER 4 Host system and interface o t d et teh e 4 4 SYSTEM CONFIGURATION 0 jcoc eccdcescccedeeceevedecsesesdecsevecceczessscuegeesscuegecpaceegeevadtapecvaceezeenececsexecceeyeszacs 5 5 COMPONENT NAMES AND FUNCTIONS eeeeeeeeeee saeeeeeeeeeeeeeaaseeeeeesseeeaaseseeeeeeeeeeaaeeseeees 6 6 INSTALLATION PROCEDURE una racc m anie sm aane du aane cu auae ca 8 CONNECTION TO THE USER SYSTEM 9 Connection with the N Wire cable sseesseeeennnnmm nennen nennen nn nnne nennen nnns 9 Gontnection with a ROM probe err TRECE DIE IE EIDEM 9 Note on the DIP 32 ROM ennt rnnnen nennen nnne rne 9 8 POWERING ON AND OFF raae aaro 10 uod snomo pe EE 10 Powering Off 3 tte tita etn de teme temen n e d mni et deines 10 9 2 11 Starting GhKRTES2 exe 8 38 td o gd e epa ette tastes 1
9. Specify the number of data bits of the ROM to be emulated Either 8 bits or 16 bits can be specified If a DIP 32 ROM probe is used choose rom8 if a DIP 40 42 ROM probe is used choose rom16 bus8 bus16 bus32 Specify the ROM bus size in the system to be emulated 8 bits 16 bits or 32 bits can be specified lt Function gt The rom command sets the ROM emulation environment Enter only the parameters that need to be changed Parameters may be entered in any order If the same parameter is entered twice only the last entry is valid The initial value of LENGTH is 0 not used lt Examples gt rom C0000 40000 1m rom16 bus16 The 256K bytes 40000 of the 27C1048 16 bit ROM with a size of 1M bits starting at 0xc0000 are emulated Consequently two 16 bit ROMs are emulated rom fff80000 80000 2m rom rom16 bus32 The 512K bytes 80000 of the 27c2048 16 bit ROM with a size of 2M bits starting at Oxfff80000 are emulated Consequently two 16 bit ROMs are emulated lt Note gt Access to the range specified by the rom command results in direct access to internal emulation memory Access to addresses outside the range is performed via the processor bus RTE V831 TP Hardware User s Manual 11 INTERFACE SPECIFICATIONS This chapter describes the specifications of the connectors used for control that are required for the user system Pin arrangement table w s wa e o out snes str foment m ow
10. WER This LED lights steadily while the power to the user system connected with the N Wire connector is on RTE V831 TP Hardware User s Manual ROM user system power LEDs ROM USER POWER LEDs ROM POWER 1 2 3 4 These LEDs light steadily while the power to the power pins of the ROM sockets connected with the ROM emulator connectors is on The four LEDs have the following meanings If an 8 bit ROM probe is used LED1 to LED4 correspond to sockets ROM1 to ROMA at the end of ROM probes and light steadily when the power to the power pins of the sockets is on If a 16 bit ROM probe is used LED1 and LED2 light steadily at the same time while The power to ROM socket 1 connected with connector ROM 1 is on LED3 and LED4 light steadily at the same time while The power to ROM socket 2 connected with connector ROM 2 is on RTE V831 TP Hardware User s Manual 6 INSTALLATION PROCEDURE This chapter describes the procedure for installing RTE V831 TP 1 Mount the interface card Note For information refer to the manual provided with the interface card Install RTE for WIN32 Note For information refer to the manual provided with RTE for WIN32 At this point do not start CHKRTE32 EXE Connect RTE V831 TP Connect RTE V831 TP to the host interface card or LAN BOX using the host system interface cable Make the AC adapter ready for connection Connect RTE V831 TP to the user system Note For details see Chapte
11. d Jint 10 11 12 13 This parameter specifies that pins int10 to int13 are to be masked Enter if they are not to be masked jtag 12 25 This parameter specifies the JTAG clock for N Wire Usually use jtag25 Function The env command sets the emulation environment Enter only the parameters that need to be changed Parameters may be entered in any order If the same parameter is entered twice the last entry of the parameter is valid The initial values are as follows CPU Settings Auto Run ON auto JTAGCLOCK 25 MHz jtag25 Signals Mask INTOO NO MASK lintOO INTO1 NO MASK lintO1 INTO2 NO MASK lint02 INTO3 NO MASK lintO3 INT10 NO MASK lint10 INT11 NO MASK lint11 INT12 NO MASK lint12 INT13 NO MASK lint13 NMI NO MASK nmi RESET NO MASK reset HLDRQ NO MASK hldrg lt Example gt env reset nmi RESET is masked while NMI is not RTE V831 TP Hardware User s Manual rom command Format rom ADDRESS LENGTH B12k 1m 2m 4m 8m 16m rom8 rom16 bus8 bus16 Parameters ADDRESS LENGTH ADDRESS Lowest address of the ROM to be emulated An error occurs if it does not match a ROM boundary LENGTH Number of bytes of the ROM to be emulated Must be specified in boundary units of 16 bytes 512k 1m 2m 4m 8m 16m Specify the bit size of the ROM to be emulated Sizes from 512K bits to 16M bits can be specified For the 27C1028 for example specify 1M bits rom8 rom16
12. e a malfunction 2 RTE V831 TP externally controls the debugging control circuit built into V831 2 Consequently RTE V831 TP does not operate correctly unless the following conditions are satisfied RTE V831 TP is properly connected to the user system using the N Wire cable The power to the user system is on so that V831 2 can run correctly Precautions related to functions 1 The disassembly and display of real time trace data is performed by reading the contents of memory at the point the trace display command is issued according to the branching information received from V831 2 Consequently the disassembly and display of the program located in RAM of the user system is not correct if changes including erroneous writing due to a runaway CPU are made after program execution In addition branching information may not be analyzed correctly because not all branching information may be output RTE V831 TP Hardware User s Manual Revision History Rev 1 0 December 9 1997 1 edition Rev 2 0 Jun 15 1998 Added V832 information RTE V831 TP Hardware User s Manual M781MNLO2 Date of preparation Jun 15 1998 Rev2 0 20
13. e user system side connect ROM1 ROM2 ROMS and ROMA to the ROM sockets with the lowest second lowest second highest and highest addresses respectively if an 8 bit bus is used If a 16 bit bus is used connect ROM1 ROM2 to the ROM sockets corresponding to DO D7 D8 D15 of the lower addresses and ROM3 ROM4 to the ROM sockets corresponding to DO D7 D8 15 of the higher addresses DIP 40 ROM and DIP 42 ROM probes These probes enable the emulation of up to two 16 bit ROMs On the RTE V831 TP side connect a probe labeled ROM1 to JROM1 and a probe labeled ROM2 to JROM2 On the user system side connect a probe labeled ROM1 to the ROM socket with the lower address and a probe labeled ROM to the ROM socket with the higher address if a 16 bit bus is used When connecting probes to ROM sockets pay careful attention to the ROM orientation The dot mark indicates pin 1 Note on the DIP 32 ROM probe For 32 pin ROMs of 1MB or greater there are two possible pin assignment schemes Set the jumper on the board for the ROM cable according to the ROM being used OE 24 pin A16 2 pin 1 2 Jumpered factory setting OE 2pin A16 24 pin 2 3 Jumpered RTE V831 TP Hardware User s Manual 8 POWERING ON AND OFF The procedures for powering the system on and off are described below Complete all the steps in the installation procedure such as cable connection before powering the system on Powering on 1 Turn on the power to the host system
14. le program execution break point setting variable inspection and other operations to be performed at the source level E nnection RTE V831 TP provides debugging capabilities equivalent to those of conventional in circuit emulators with the user system connected to the designated connector and the processor mounted on the board Highly transparent emulation By controlling the debugging control circuit DCU incorporated into V831 2 from the outside RTE V831 TP provides highly transparent emulation eliminating the problems associated with electrical interfaces ROM emulation RTE V831 TP incorporates up to 4MB of emulation memory for emulating ROMs ROM probes for packages with 32 to 42 pins are available All probes are options Real time trace RTE V831 TP enables real time trace which is useful for debugging built in systems This capability uses a technique in which trace information conforming to the N Wire specifications is recorded into memory and supports trace clocks with frequencies of up to 66 MHz Communication with the host system via a dedicated card or LAN BOX Three types of cards and LAN BOX are available The PC card is of Type Il as defined in version 2 1 of the PCMCIA specifications version 4 2 of the JEIDA specification and is for note type PCs The host card is for desktop PCs equipped with the PC 9800 C bus or DOS V ISA bus e LAN BOX is connected via a LAN and is a 10Base T interface
15. r 7 Turn on the power Note For details see Chapter 8 Set RTE for WIN32 Start CHKRTES2 EXE and set the necessary parameters For details refer to the manual provided with RTE for WIN32 or see Chapter 9 of this manual Install the debugger Note For information refer to the manual provided with the debugger The following figure shows how the devices are connected N Wire connector ROM socket V831 ESCOCGESESESEJEJE SEI IE User system Cs os User system connection cable N Wire amp ROM cable AC adapter RTE xxxx TP RTE V831 TP Hardware User s Manual 7 CONNECTION TO THE USER SYSTEM The procedure for connecting RTE V831 TP to the user system is described below Connection with the N Wire cable Connect the JDCU1 connector of RTE V831 TP to the user system using the N Wire cable supplied with RTE V831 TP Connection with a ROM probe Connect the JROM1 or JROM2 connector of RTE V831 TP to the ROM socket of the user system using a ROM probe of a type appropriate for the ROM of the user system ROM probes are options Three types of ROM probe are available lt DIP 32 ROM probe gt This probe allows emulation of up to four 8 bit ROMs On the RTE V831 TP side connect a probe labeled ROM1 and ROM 2 to JROM1 and a probe labeled ROMS and ROMA to JROM2 On th
16. s 95 Partner Win Interface card Type II version 2 1 of the PCMCIA specifications version 4 2 of the JEIDA specification or later PC 9800 C bus PC AT ISA bus and PCI bus or LAN BOX Power supply AC adapter in 100 V out 5 V 2A RTE V831 TP 4 SYSTEM CONFIGURATION Hardware User s Manual The following figure shows the configuration of a system in which RTE V831 TP is used Windows95 Windows NT lt GHS Multi Qv PARTNER Win Note type PC with a PC Card slot GHS multi PARTNER Win PC PC 9800 Series PC interface card PC AT interface card PC Card interface Host system interface cable AC adapter RTE xxxx TP N Wire cable ROM probe PC 9800 Series PC interface card AC adapter power Host system rd interface cable ace ed supplied with the RTE xxxx TP interface card N Wire cable for user system connection PC Card interface ROM probe for user system connection High level language debuggers for RTE V831 TP PC capable of running Windows 95 Card supporting the PC 9800 C bus Card supporting the PC AT ISA bus Type Il card version 2 1 of the PCMCIA specifications version 4 2 of the JEIDA specification or later Cable for connecting RTE V831 TP to the host card Dedicated power supply RTE V831 TP Cable
17. ted successfully If an error occurs during the test the N Wire cable is not properly connected Check its connection Perform the ChkRTE32 exe function test after the RTE V831 TP has been connected to the user system and the power to all the devices has been turned on RTE V831 TP Hardware User s Manual 10 INITIALIZATION COMMANDS Before debugging can be started initialization is required The following explains initialization using the appropriate internal commands If the debugger offers a means of initialization they may be used instead See Appendix A for an explanation of starting the internal commands and an explanation of the other internal commands nv mman Format env Jauto reset int 00 01 02 03 int 10 11 12 13 jtag 25 12 Parameters Jauto If a break point is encountered during execution the break point causes a temporary break Choose Auto to automatically perform the subsequent execution Choose auto to suppress it reset This parameter specifies whether the RESET pin is to be masked Enter if itis not to be masked This parameter specifies whether the NMI is to be masked Enter if itis not to be masked hidra This parameter specifies whether the HLDRQ pin is to be masked Enter if it is not to be masked Jint 00 01 02 03 This parameter specifies that pins INTOO to INTO3 are to be masked Enter if they are not to be maske
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