Quality Assurance Test Procedure For Telescope
Contents
1. 26 15 4 Commercial test cables An assortment of standard test leads is required to complete the signal connections between test points and meters etc The following table lists a number of such leads that might be required AAN EA A re ar EA 272. value in the table 7 1 6 Connect the voltmeter terminal to pin 31 of connector 17 and the terminal to pin 32 Record its value Verify that all voltages are within the specified limits Turn off the power supply P0396 Table 1 Para Probe Point Signal Upper Actual N Name Limit Value Volts Volts 7 0 1 Pin 12 11 5 V supply 4 94V 5 06V Pin 31 30 Connector 17 15 V 14 8V 15 2V Pin 12 11 supply Pin 12 13 supply Pin 31 30 supply Pin 31 32 supply 8 0 Data Acquisition Checkout 8 1 With no Engineering Unit or Detector connected to the GSE Connector 15 and Connector 17 open turn on the power supply From the SQUID directory on the computer run squid exe From the command menu note the display GP B SQUID and TELESCOPE Testing Vx x Record the SQUID program version number Version No Go to the Global Enable menu and enable all A side commands and telemetry Return to the main menu ESC Enter the command menu Select TRE X 8 2 Connect XPSIGLO to XPSIGHI shorted with a BNC cable Monitor the voltages on the telemetry display Read and record the voltage reading for XPSIG Table 2 Actual Initials Value amp Volts Date XPSIGHI XPSIG 0 01V 0 01V XPSIGLO 8 3 1 With no Engineering Unit connected to the GSE Connect the voltage calibrator to the voltage inputs on the breakout panel labeled XPSIGHI and XPSIGLO Set the voltage calibrator to 9 990 volts Ve
3. the negative Lead CLAMP CLAMP Command Data Bit Address 16 bits ON LAA A A E E EA E EA EE Set the CLAMP command to the settings in the table Verify the binary values of the SERIAL DATA signal for the CLAMP command correspond to the command sent High Low Byte CLAM sane NEGATIVE on amp date CLAMP Goins D Decimal ee eee o e i e e a A LAA O A O 128128 soson J 240 240 roroa J Teo 255955 rereh S Teo 0wW owwa PT 15 P0396 9 9 6 Gain and Photo Diode Bias Control Checkout The BIAS command controls the photodiode cathode bias voltage DAC and the programmable gain in the signal chain The photodiode bias voltage is controlled by bits 0 7 of the BIAS command word The direction gain is controlled by bits 8 11 GNSETO 3 The direction gain is controlled by bits 12 15 GNSET4 7 Lead BIAS BIAS Command Data Address dir gain dir gain photodiode cathode bias PEA 1 7 GNSET 0 3 DETBS 0 7 ie a A NADA Set the BIAS command for the values of gain settings in the table and verify the binary data in the SERIAL DATA As in the table in operation use the same for each direction ae o Char BIAS oes ar POSITIVE oe amp date BIAS COMMAND Decimal Hex di5 d2 di a8 CT A a SPS P8800 AE RL A E O MEE 6 gt gt gt S E MVE NA AA owwa T Set the BIAS command for the values of photodiode bias DAC settings in the table and verify the binary data
4. the window cursors on the first group and in the window mode verify that the serial data starts with 1 followed by the three bit address of the first group 001 Verify the address word of each of the six groups COMMAND GROUPS ADDRESS Leading Bits Verification Observed TRE X CONTROL 1 1001 yes___ no TRE X DTEMP 2 1010 yes _ no___ TRE X HEATER o o o i 10 P0396 9 9 1 CONTROL COMMAND Checkout The CONTROL command field specifies the TRE axis operating state Set the CONTROL command word as specified and verify the serial data at the X axis Data Enable matches the command set The binary and hex form of the command is displayed on the computer TRE command display Lead CONTROL CONTROL Command Data Address D12 D11 D10 D9 D8 D7 DS D D3 D2 D1 DO 1 o fo 1 TX XT XT CO INH INH INV INV CTR LO CHA AM AM AM AM AM LD SIG CY GA RST LHE WG NLC UX UX UX UX UX ON C T T AIN K A4 A3 A2 A1 AO 9 9 1 Set the CONTROL word to 0000h Verify that all bits in the COMMAND data are low 9 9 2 Set the CONTROL word to 1000h Verify that bit 12 is high COLDON bit high to Enable detector power 9 9 3 Set the CONTROL word to 0800h Verify that bit 11 is high INHSIG bit high to 9 9 3 Set the CONTROL word to 0400h Verify that bit 10 is high INHCYC bit high to inhibit the FETRST and AMPGAT pulses 9 9 4 Set the CONTROL word to 0200h Verify that bit 9 is high UNVGA
5. 9 4 ATC Strobe Signal Connect the ATC Strobe signal on the breakout panel to the oscilloscope and trigger on that signal or the DAC Strobe signal Verify that the pulse period is 100ms 10hz and the amplitude of the ATC strobe is approx 5V and the pulse width to be approx 58 US Waveform is as described yes___no___ 9 5 9 6 9 7 9 8 P0396 DAC Strobe Connect the DAC Strobe signal on the breakout panel to the oscilloscope and trigger on the ATC Strobe Verify that the frequency of the waveform is approx 2 2 kHz Waveform is as described yes___no___ 68 kHz clk The rising edge to rising edge of the 68 2 kHz clock determines the bit data in the SERIAL DATA stream The data is clocked in on the falling edge Connect the 68 kHz clk signal on the breakout panel to the oscilloscope and trigger on the ATC Strobe Verify that the frequency of the waveform is approx 68 2 kHz Waveform is as described yes___no__ X Command Data Enable Go to the command group menu select the TRE X command group The X Data Enable signal gates the serial data in the six TRE X commands There are six corresponding pulses on the X DATA ENABLE signal Connect the X Data Enable signal on the breakout panel to the oscilloscope and trigger on the ATC Strobe The X Data Enable goes true on a rising of the 68 2kHz clock and remains true for 20 cycles Then it goes false on the rising edge of the next clock cycle Verify that there are six pu
6. MS 1 Dewar Rackqual Testaid Stanford LMMS 1 Voltage Calibrator Datel DVC 8500 or equivalent 1 Precision Multimeter HP 3458A or equivalent 1 Voltmeter Fluke 87 or equivalent 1 Digital Oscilloscope 1 Tektronics TDS 420A or equivalent 1 Precision Function Generator_ Wavetek Model 144 or equivalent 1 Calibration Check to ensure the test equipment is calibrated prior to start of test Record the calibration due dates in the List of Equipment para 13 0 Power Level Checkout For the GSE Rack checkout disconnect the Engineering Unit from the GSE connector 15 and connector 17 open and disconnect any Detector connected to the GSE Turn the power supply on AC power switch 5v switch and 15v switch 7 1 1 Connect the voltmeter terminal to pin 12 of connector 15 and the terminal to pin 11 Record the value in table 1 below 7 1 2 Connect the voltmeter terminal to pin 31 of connector 15 and the terminal to pin 30 Record its value in the table Verify that the voltages are within the specified limits 7 1 3 Connect the voltmeter terminal to pin 12 of connector 17 and the terminal to pin 11 Record the value in table 1 below 7 1 4 Connect the voltmeter terminal to pin 12 of connector 17 and the terminal to pin 13 Record its value in the table 7 1 5 Connect the voltmeter terminal to pin 31 of connector 17 and the terminal to pin 30 Record its
7. P0396 Relativity Mission Gravity Probe B Telescope Readout Electronics P0396 Quality Assurance Test Procedure For Telescope Readout Electronics TRE Ground Support Equipment Rack GSE January 24 2010 Prepared and Approved by Approval Robert Fujimoto REE Paul Ehrensberger TRE Manager Approval Approval Bob Farley REE Ben Taller QA Approval John Turneaure Hardware Manager P0396 Contents 1 0 General Description cas 2 2 0 Reference Documents sss esse eee 2 SA IC NON 2 4 0 General Requirements onner ieii erini i i i 2 5 0 Safety Security Requirements sss eee eee eee eee 3 6 0 Hardware Under Test sss 3 7 0Power Level Check erica 4 8 0 Data Acquisition Checkout sss sees 5 9 0 Diertal Signal Checkout ilatina Serao 8 1 0 General Description 2 0 3 0 4 0 This document is the Quality Assurance Test Procedure for the Telescope Readout Electronics GROUND SUPPORT EQUIPMENT GSE The purpose of the QA test is to provide traceability to test results performed on the FWD TRE electronics and the Detector Package Assembly DPA Reference Documentation Functional Test Procedure For Fwd Flight Unit Subassemblies dated 09 February 1998 LMMS Handbook on ESD LMMS F03581 Test Location Telescope Electronics Development Lab Cedar Hall Stanford University Stanford CA General Requirements 4 1 Test will be performed under the environmental conditions existing in Cedar Hall 4 2 A
8. T bit high to invert AMPGAT 9 9 5 Set the CONTROL word to 0100h Verify that bit 8 is high UNVRST bit high to invert FETRST 9 9 6 Return the CONTROL word to 0000h 9 9 1 1 CLEAR NONE 0000 y 9 9 1 2 COLDON 12 1000 y y arr 9 9 1 4 INHCYC 0400 ee E 9 9 1 5 INVGAT oe 0200 9 9 1 6 INVRST 0100 A TE y es no es no es no no es no es no es no 11 P0396 Verify the Analog Multiplexer Sequencer control Set the CONTROL word to 0020h Monitored Channel Lock true Verify that bit 5 is high CHANLCK high to load AMUX channel data and hold multiplexer counter 9 9 1 8 Set the CONTROL word to 0021h to select monitored channel 1 Verify bit O and bit 8 MUXAO is high Verify Monitored Channel selections using CONTROL word SELECTED CHANNEL Come MUXA 0 4 12 P0396 9 9 2 Temperature Control Checkout When the CNTRLHET bit is high the heater control voltage is controlled automatically with the closed loop control Set the CONTROL word 0080h Verify that bit 7 on the CONTROL word is high yes__no__ L _ The temperature setting for the automatic control is controlled by the temperature control DAC The temperature control DAC is set with the DTEMP command Lead DTEMP DTEMP Command Data Bit Address 16 bits SER E E Braet Sa E E E T T EE Set the DTEMP value with the DTEMP command to the values in the table Verify the binary data in the SERIAL DATA Temperature EEE DTEMP Command Dat
9. XTERNAL EXPANSION BOARD NOT INSTALLED Click on Show Board s Switch Settings to see a picture of the board and verify each of the switch settings Press any key to return to the menu then press Esc twice and exit the program 15 1 1 0 CALIBRATING THE BOARD A calibration sticker indicating when the board was last calibrated is located on the back of the computer If this sticker is not there of if it has been one year or longer since the last calibration date the board should be recalibrated by following the steps below For additional information see the Computer Boards Inc CIO DAS 1400 User s Manual Revision 3 June 1994 pages 8 12 15 1 1 1 Tools and Equipment Required Screwdriver Philips and flat head Plastic Pot adjustment screwdriver 22 Gauge Wire with 40 Mil sockets on one end 5 pieces min High precision digital volt meter Voltage calibrator 15 1 1 2 Remove Computer from Rack 23 P0396 In order to calibrate the board the cover will have to be removed from the computer for access to adjustment trimpots Turn the power off of the computer disconnect all cables from it and remove the computer from the rack mount 15 1 1 3 Reconnect Computer for Calibration Reconnect the computer and all peripherals with the cover off Do not connect the data acquisition and interface card cables connectors 2 amp 8 at this time Run the Instacal program by changing to the c cb directory and type lt Instacal gt
10. a initial amp date Setting Command Decimal Hex bil b8 b7 b4 b3 b0 1 1686 os T T Teo 2058 os8R 3855 oom G____ gt 405 orh 0 ssh PT 13 P0396 9 9 4 Heater Voltage Control Checkout The heater current is controlled by the DAC in the heater control loop When the CTRLHET bit is low the heater voltage can be commanded to a fixed value Set the CONTROL command 0000h Verify that bit 7 of the CONTROL word is low yes__ _no___ oo o The fixed value of heater voltage is set by the HEAT command Lead HEAT HEAT Command Data Bit Address 16 bits DOE EA ESO E A E E O E A A EE EE O E Set the HEAT command to the command setting in the table and verify the binary pattern in the serial data waveform Heater HEATER HEATER Command Data initial amp date Setting Command b11 b8 b7 b4 b3 bo CT ooon gt aa E E CA MAA IE a Me o AM ME 2056 gosh 8855 HE T Y AMO E 4057 e CM CA AE AAA E 504 3000 o li MEE A 14 P0396 9 9 5 Clamp Voltage Control Checkout During every 100ms period the feedback capacitor of the input charge amplifier is discharged and reset to an initial value for the new cycle The value at which it is set is controlled by the CLAMP command The CLAMP command data controls the voltage DACs for both the positive and negative channels The high byte of the 16 data bits controls the positive channel and the low byte controls
11. at the DOS prompt The Installation and Calibration menu should appear 15 1 1 4 Calibrating the Analog Inputs The A D board is calibrated by shorting together the appropriate pins on the external D connector and adjusting trimpots for offset and gain There are three trimpots requiring adjustment to calibrate the analog inputs of the CIO DAS 1402 16 board These are the AMP INPUT ADJUST AMP OUTPUT ADJUST and GAIN ADJUST Page through the menu choosing Calibrate Board 0 10 Volts A picture of the A D board should appear with instructions on the screen below Also the center potentiometer labeled Amp Output should be blinking If one of the other potentiometers are blinking you passed the first one s by pressing a key too soon Press a key until you get back to the menu and start over With the Amp Output Pot blinking short pins 18 19 amp 37 together Adjust this Pot until the source and target count are equal When they are you will see OK displayed in the graph on top of the board Press a key to go to the next step The Pot to the right labeled Amp Input should now be blinking With pins 18 19 amp 37 still shorted adjust this Pot until the graph reads OK Press a key to continue For the last step you will need a high precision voltage source and a high precision digital multimeter accurate to within 100uV Note before performing this step the program may be displaying 9 998169 volts in the instructions which is incorr
12. connecting and disconnecting cable connectors 5 3 Examine all mating connectors before attempting to mate them and remove any foreign particles Look for any damaged pins or sockets Ensure that key ways are aligned Do not force the coupling action if excessive resistance is encountered 5 4 Protect all electrical connectors with Connector Savers or plastic caps when the connectors are not mated 5 5 Care in handling electronic equipment shall be taken in accordance with the LMMS Handbook on Electrostatic Discharge LMSC F03581 to prevent damage caused by electrostatic discharge Hardware Under Test The hardware under test will consist of the Telescope Readout Electronics TRE Ground Support Equipment GSE Test Rack The following items comprise the GSE Support Rack Name Description Manufacturer Model No Part No Rack Mount Oscilloscope Tektronix TAS220 or TDS220 Rack Mount Computer with Rack Mount PC 500 1 Custom SRE Emulator Board Stanford LMMS 8A01271 amp A D Converter Board Computer Boards CIO DAS1402 Rack Mount Monitor amp Keyboard Custom Test Cables Stanford LMMS 8A01272 Rack Mount Power Supply Stanford LMMS SQUID exe V3 51 or Higher The following support equipment is required for QA Calibration of the GSE Name Description Manufacturer Model No Part No 6 3 7 0 P0396 TRE Engineering Unit Stanford LMMS TRE Detector Simulator Stanford LMMS TRE Rev C Detector in LN Stanford LM
13. ect Remove the shorting pins used in the previous step from the board Apply 9 999695 volts to A D channel O lead to pin 37 lead to pins 18 and 19 The Pot labeled A D Gain should be blinking Adjust this Pot until the source and target count are equal When they are the graph will read OK Remove the connections to the A D board and press a key to return to the menu The calibration is completed Choose exit from the menu to end the program 15 1 1 5 Reinstall the Computer from Rack Turn the power off of the computer reinstall the cover on the computer Reconnect all cables from it and reinstall the computer into the rack mount 24 15 2 TRE Test Rack Breakout Panel P0396 BNC connectors allow access to 5 volt clock waveforms and analog signal outputs Cre 68KHz CLK X Data Enable 2 DAC Strobe Serial DATA Y Data Enable ATC Strobe 25 ESOO XPSIGHI XNSIGHI XHNSHI oe XPSIGLO XNSIGLO XHNSLO Cy oe YPSIGHI YNSIGHI YHNSHI Oe 10 YPSIGLO YNSIGLO YHNSLO Eng Data Chanels reakout Panel 15 3 TRE Support Rack Layout Monitor ACER Oscilloscope Tektronix TAS220 M M 0 O OOO OS Breakout Panel 9900 o o o Le T o e 0 O OO O Key board Connector 15 Connector 17 Vv_ 7 Digital M7 analog O O O 000 Power supply O O O
14. ent follows Re Run Documentation table Make copies of the List of Equipment Table as required 14 0 Data Sheets Data sheets follow List of Equipment table 19 P0396 P0396 RE Run Documentation TP Page TP Para Retest Nof orno PR wot tite Comments 20 P0396 List of Equipment digo ds Cal Due Date 21 15 Appendices 15 1 A D Board Calibration Procedure 15 2 TRE Test Rack Breakout Panel 15 3 TRE Support Rack Layout 15 4 Commercial test cables 22 P0396 P0396 15 1 A D CALIBRATION PROCEDURE 15 1 0 1 Running the INSTACAL Program The Instacal program is used to install calibrate and test the CIO DAS 1402 16 A D board Run this program by going to the c cb directory in DOS and type lt instacal gt The installation menu should appear Go to Install and verify that Board 0 is ClIO DAS1402 16 and Boards 1 4 are not installed Do not quit the program at this time 15 1 0 2 CIO DAS 1402 16 A D BOARD SETTINGS The following are jumper and switch settings used on the A D board These can be verified in the instacal program Click on board 0 under the install menu and verify that the settings are as shown below BOARD TYPE CIO DAS1402 16 BASE ADDRESS 340H INTERRUPT LEVEL 7 DMA LEVEL 1 CLOCK SPEED 10MHz NUMBER OF CHANNELS 8 DIFFERENTIAL WAIT STATE DISABLED A D RANGE BIPOLAR TRIGGER EDGE RISING COUNTER 0 SOURCE E
15. in the SERIAL DATA DAC BIAS Photodiode DAC OK initial amp date value COMMAND Decimal Hex b7 b0 OO AE CUT o FRE FS A ee oon CT gt A ll MEA oosoH ft sora 16 P0396 9 9 7 OFFSET Command Checkout The POSITIVE direction OFFSET DAC is controlled by the high byte in the OFFSET command word and the NEGATIVE direction OFFSET DAC is controlled bye the low byte of the OFFSET command word OFFSET OFFSET Command Data Address 16 bits TAA L L LGA ALA AAA TSTST Set the OFFSET command word to the values in the table and verify binary data in SERIAL DATA AE A O High Low Byte OFFSET POSITIVE NEGATIVE OK initial amp date E comman oae OE Re Decimal Hex b7 b4 b3 b0 b7b4 b3 b0 gt ESSE a E AA A A MEM Sa a a gt AE AS MES EA mar wra op jaa E 1 a a MUA NA AS O A E Gers 9 2240401 1 SBRO OHS gt es le o ME A 255955 rereh 0W os _ ll laa 17 P0396 11 0 Completion of Procedure The results obtained in the performance of this test procedure are acceptable Test Engineer Date REE Date IDTL Leader Date This is to certify that the information obtained under this test procedure is as represented and the documentation is completed and correct Product Assurance Date 18 12 0 Re Run Documentation Table on next page Make copies of the Re Run Documentation Table as required 13 0 List of Equipment List of Equipm
16. lses each with a pulse width of approx 293u5 Waveform is as described yes___no__ Y Command Data Enable Go to the command group menu select the TRE Y command group The Y Data Enable signal gates the serial data in the six TRE Y commands There are six corresponding pulses on the Y DATA ENABLE signal Connect the Y Data Enable signal on the breakout panel to the oscilloscope and trigger on the ATC Strobe Verify that there are six pulses each with a pulse width of approx 293u5 Waveform is as described yes no P0396 9 9 0 Serial Data From the main menu of the SQUID test program select Commands then TRE X ENABLE each of the X axis command groups The six commands Control Etemp Heat Clamp Bias and Offsets should be displayed on the computer screen The command parameter is displayed underneath in hex format The binary format also displayedwill aid in interpreting the serial data waveforms Set the oscilloscope to observe the six X axis enable pulses and the serial data which corresponds to each of the six command groups Connect the Serial Data signal on the break out panel to the oscilloscope channel 1 and trigger on the ATC Strobe A digital oscilloscope is required for this measurement Connect the X Data Enable of the breakout panel to channel 2 The serial data consists of a 20 bit word defined bye the high X Data Enable signal with the following format Leadin mmand Command Data Address 16 bits Set
17. ny red lines to the procedure shall require the approval and initial of the Stanford QA and RE 4 3 In order to expedite test operations unless specifically noted the sequence in which major sections or subsections are performed may be altered at the discretion of the REE or his representative Rationale must be documented and initialed by REE 4 4 PA or their representative shall be present to witness and verify the test is performed as described in the test procedure and stamp each page of the procedure as it progresses Notify Quality Assurance Engineering at least 48 hrs prior to the start of testing In the event of a failure during the execution of testing Quality Assurance shall be contacted Any red lines made to this procedure shall be initialed by a program QA Engineer prior to his her final sign off 4 5 Initial and date the appropriate space in the test data sheet to verify each task has been accomplished 5 0 6 0 6 1 6 2 P0396 4 6 Serial numbers of test equipment used during this test shall be recorded in the List of Equipment log sheet 4 7 Test operators shall read this procedure in its entirety and resolve any apparent ambiguities prior to beginning this test Safety Security Requirements 5 1 Standard safety practices to insure safety to personal an and prevent damage to equipment shall be observed during performance of this test 5 2 Ensure that power is removed from cable assemblies before
18. rify the setting using a calibrated voltmeter Monitor the corresponding reading on the telemetry page and record the value Repeat the voltage input and measure for each input designated in table 3 Monitor and record the corresponding values from the telemetry display P0396 8 3 2 Reverse the input polarity and repeat the readings Table 3 Para Input Output Actual No Signal Signal imi imi Value XPSIGLO XNSIGLO XHNSLO ee T a er PEA XPSIGHI XPSIG 9 99V 10 00V XPSIGLO XNSIGLO XHNSLO 8 4 1 Return to the command menu Select TRE Y Repeat the voltage input and measure for each input designated in table 3 Monitor and record voltages on the corresponding values on the telemetry display 8 4 2 Reverse the input polarity and repeat the readings Table 4 Para Input Output Actual No Signal Signal imi imi Value YPSIGLO YNSIGLO YHNSLO YPSIGHI YPSIG 9 99V 10 00V YPSIGLO YNSIGLO YHNSLO SP e A pedo EA 8 5 If any readings from para 8 0 are out of range perform the calibration procedure in Appendix A then repeat section 8 0 P0396 8 6 Turn off the power supply Disconnect the cables to the breakout panel P0396 9 0 Digital Signals Checkout Turn on the computer and run the program squid exe from the c squid directory in DOS Go to the Global Enable menu and enable all side A commands and telemetry Turn on the power supply and the oscilloscope 9 1 Clock Level Verification Connect
19. the oscilloscope in the test rack to be triggered by the rising edge of the ATC strobe with the time base set to 1ms per division Using a Microtip test probe connected to the oscilloscope input through a banana to BNC adapter verify that the voltage levels of the clock waveforms on the following pins of connector 15 are between zero volts and 4 volts Low 0 2 0 4V and High 3 9 0 4V All pins are OK 9 2 Source Impedance Verification Use the RACKQUAL test aid that contains a 1 5K resistor to verify the 7 est Aid to Verity Source Impedance of y source impedance of the clock lines Connect the test aid to the Digital Lines from TRE Test Rack oscilloscope using a BNC cable Connect the black banana jack on the test boxto the black banana jack on the test rack Red BNC 5 volt power supply lowest panel on the test rack Connect the 1 50K Microtip test probe to the red banana jack on the test aid Probe the same pins of connector 15 and verify that the clock levels now swing Go Banana Jack A between zero and 1 8 volts Low 0 16 0 2V and High 1 74 0 2V Each clock line should have a series resistor of the same size as the test box hence the voltage measured is half of the open circuit voltage 2 4 5 7 8 aS 16 17 18 EN EEA ry DE CS E E Sl Se All pins are OK Monitor the voltage waveforms on the breakout panel use a digital oscilloscope window capability for the following measurements
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