ncv8842pwgevb - ON Semiconductor
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1. 42 DEMONSTRATION CIRCUIT 7 V 16 V 2 5 V 55 V ond 5 0 v 8 1 0 5 3 3V 2 5 SHDNB SYNC GND PHONE 1 800 282 9855 waww onsemi com Figure 12 Top Silk http onsemi com 7 NCV8842PWGEVB DFN EVALUATION CIRCUIT INFORMATION VIN GND 6V 16V C4 C2 GND Vout 3 3V SHDN L1 SYNC GND Figure 13 NCV8842 Evaluation Board DFN Package TP5 VIN D1 BOOST Vin Q Vi TP4 Li 27uH Um V Vout 2 R1 C6 D2 330uF 205 3nF C4 l 100uF bx R2 GND 6 GND TP1 TP2 SHDNB SYNC GND Figure 14 Application Diagram http onsemi com 8 8842 Table 5 BILL OF MATERIALS Teoreme weve 1 Cem http onsemi com 9 NCV8842PWGEVB DRAWING OF LAYERS DFN Figure 15 Top Copper Figure 16 Bottom Copper DEMONSTRATION CIRCUIT RoHS Compliant 8842 8845 J2 5 16 105 5 6 1 0A 8 PHONE 1 800 282 9855 www onsemi com ON Semiconductor Figure 17 Top Silk http onsemi com 10 8842 2 is a trademark of Switch Power Inc ON Semiconductor and 0 registered trademarks Semiconductor Components Industries LLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the sui2. NCV8842PWGEVB NCV8842 Buck Regulator 7 0 V 16 V to 5 0V 3 3V and 2 5 V o 1 0A Evaluation Board User s Manual Description The NCV8842 Evaluation Boards provide a convenient way to implement and evaluate a complete practical buck regulator design No additional components are required other than the DC input source and load Separate boards are available for the SOIC 16 and DFN 18 versions of the device The SOIC 16 board has an input voltage range of 7 V 16 V and includes jumpers to set the DC output voltage to 2 5 V 3 3 V or 5 0 V The DEN 18 board has an input voltage range of 6 V 16 V and is preset for a nominal output voltage of 3 3 V Both boards include SHDNB and SYNC terminals for logic on off control of the regulator and synchronization of the internal controller to a external frequency source instead of the internal 170 kHz oscillator 42 DEMONSTRATION CIRCUIT ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL Features V Control Method for Uncomplicated Loop Compensation Fast Transient Response and Reduced Board Area A Total of 12 Components Including the IC to Realize a Complete Buck Regulator Shutdown Terminal to Disable the Output and Provide a Low Current Drain Standby Mode Sync Terminal to Permit Controller Synchronization to an External Source 1 5 A Peak Inductor Current Cycle by Cycle Frequency Foldback Current Limiter Soft Start Function to Reduce Inrush C
3. ection document number NCV8842 D available through the Literature Distribution Center or via our website at http www onsemi com http onsemi com 3 OUTPUT VOLTAGE NCV8842PWGEVB TYPICAL PERFORMANCE CHARACTERISTICS 9 10 11 12 13 14 INPUT VOLTAGE Figure 3 Line Regulation EFFICIENCY 15 16 0 http onsemi com 4 0 2 0 4 0 6 0 8 OUTPUT CURRENT A Figure 4 Efficiency vs Output Current 8842 J ripple Vripyle 72 1 11 4 2006 Chi 5 00 100 2 0045 Chi 7 Aug 2006 14 20 13 Figure 5 Continuous Mode Operation Figure 6 Discontinuous Mode Operation Vsw 1 08 NND BE AU MEAT Chi 100 Ms 00gs Chd 240mV 8 Aug 2006 Chi Toy 2 amp M5S 00gs Chd X 240mV s Aug 2006 WO 1 00 VON ship WE 1 00 VON Figure 7 300 mA to 1 0 Load Step 3 3 Figure 8 1 0 A to 300 mA Load Release 3 3 V 3 lout 3 Vout 3 34 Chi 10 0VCh2 100mV amp 20 0 5 240mV s Aug 2006 Figure 9 Overall 600 mA Load Response http onsemi com 5 8842 Table 4 BILL OF MATERIALS omma 3 http onsemi com 6 NCV8842PWGEVB DRAWINGS OF LAYERS Figure 10 Top Copper Figure 11 Bottom Copper
4. egarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT American Technical Support 800 282 9855 Toll Free Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada P O Box 5163 Denver Colorado 80217 USA Europe Middle East and Africa Technical Support Order Literature http www onsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421 33 790 2910 Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center For additional information please contact your local Email orderlit onsemi com Phone 81 3 5817 1050 Sales Representative EVBUM2118 D
5. generates a voltage higher than the output voltage to drive the base of the internal NPN power switch When the internal power switch is Off pin Vsw of the NCV8842 goes negative to sustain the current in 11 through Schottky diode D2 Diode D1 is forward biased and charges to approximately the output voltage When the internal power switch turns on Vsw is driven high forcing the voltage at BOOST to be the sum of the instantaneous voltage at Vsw plus the charge across C1 D1 is now reverse biased and the energy stored in is used to bias the output stage 2 Soft Start The soft start is implemented on the pin During the startup the limited source current 25 of the error amplifier charges the pin capacitor The rising slope of the Vc pin voltage clamps the duty cycle through the PWM comparator The Vc pin voltage eventually settles down to a voltage roughly equal to the reference voltage 1 27 V Therefore the startup time can be easily calculated 3 Feedback Network V control relies on the output ripple to provide pulse width modulation When the output ripple is inadequate pulse skipping or instability may be observed Adding a capacitor in parallel with R1 provides a low impedance pass for the output ripple Therefore the output ripple is not attenuated by the resistor divider The use of this capacitor is optional Please see data sheet for more description on regulator operation and component sel
6. pecified Output Voltage 4 d 9 e LI meme a m Input Voltage O S o f 39 Y Sync and Shutdown e Finan Shawn _ stem OOo M General Efficiency 100 mA 77 5 1 0 A 83 a pull up resistor is employed the shutdown current is increased drastically http onsemi com 2 8842 SHUTDOWN D1 R5 R6 10k C1 Vout 11 1 uF Vin 27 BR3 BR2 R2 127 NC YN eee C3 R4 R3 lt R1 100 uF 374 205 124 p NC Cc NC NcL sepe in G Vfb ND NCV8842 5 0 1 uF 0 1 uF 330 uF Figure 2 Application Diagram Operation Guidelines 1 Connect a DC input voltage within the range of 7 0 V to 16 V between the board terminals Vyn and GND 2 Connect a load impedance between terminals Vour and GND 3 To force the regulator into Shutdown sleep mode connect the SHDNB terminal to a positive DC voltage of 0 3 V or less or connect it directly to GND 4 If synchronization to an external frequency source is desired connect the SYNC terminal to a pulse source with positive amplitude 1 V to 7 V relative to GND Sync pulse duty cycle may vary from 10 to 90 Theory Of Operation 1 Boost Circuit The Boost circuit comprised of D1 and
7. tability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent r
8. urrent 87 Efficiency at 1 A Load Current 5 V Output Line Regulation Better Than 0 0246 Load Regulation Better Than 0 2 I6 V TO 2 5 V A3 ana BaN e io A BR2 VIN C3 C2 oh 1 GND a GND SHDN L1 SINC PHONE P Semiconductor www onssri sorn GND Figure 1 NCV8842 Evaluation Board SOIC Package Semiconductor Components Industries LLC 2012 1 Publication Order Number May 2012 Rev 3 EVBUM2118 D 8842 Table 1 ABSOLUTE MAXIMUM RATINGS Stresses exceeding Maximum Ratings may damage the board Maximum Ratings are stress ratings only Functional operation above the Recommended Operating Conditions is not implied Table 2 NCV8842 SOIC EVALUATION BOARD USER TERMINALS Positive DC input voltage 7 V to 16 V Common power negative signal return Regulated DC output voltage Shutdown bar signal Leave open or drive high for normal operation drive low to force the regulator into sleep shutdown mode SYNC Input signal to synchronize to converter oscillator to a higher external frequency source Leave open if unused BR1 BR2 BR3 Bridges jumpers for programming the regulated output voltage to one of three levels Always bridge one pair of terminals Terminals bridged VOUT BR1 2 5 V BR2 3 3 V BR3 5 0 V Table 3 ELECTRICAL CHARACTERISTICS TA 25 C 7 0 V lt Vin 16V 0 1 A lt lour lt 1 0 A unless otherwise s
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