3-Phase BLDC/PMSM Low Voltage Power Stage User Manual Page
Contents
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3. 2BEMF C 3 3V 50 05V 51K 3 6k 3 3V 36 025V 35 7k 3 6k 3 3V 18 298V 16k 3 6k Freescale Semiconductor Design Consideration 3 5 Phase current sensing Phase currents are sampled by sensing resistors R30 R31 R32 in Figure 3 5 and amplified in the US U6 AD8656 operational amplifiers All amplifiers are used as a differential for phase current sensing With R41 R43 R39 RAA the gain is given by R39 _ RAI The gain of these operational amplifiers are 11 with a 1 65 V offset The output voltage is shifted up by 1 65 V VREF to accommodate positive and negative current swings A 150 mV voltage drop across the sense resistor corresponds to a measured current range of 10Amps The outputs from opams I A I B I C are connected to the UND connector pins 23 24 25 through RC filters R13 C24 The shunt resistor is represented by a 0 015 resistance Cyntec SMD the same shunt resistor is used for DC bus current measurement 3 Phase Current Sensing R74 cas 22UF D 5 I R41 C45 AGND 0 1UF TP2 TPAD_050 3 0K C46 al 47PF AGND 4 DIA C47 R43 T aver sense APS VA 3 0K R44 AK ENT AGND 33k AD8656 Decoupling capacitors C44 C45 Place as close as possible to V pin Figure 3 5 Phase current sensing circuit 3 6 Power supplies and voltage reference The 3 phase BLDC PMSM low voltage power stage contains devices that require various volt
4. SUIS uiojs S 4992 AO NEO AE 2122598144 eDejs Jomod aseyd nou 3nduj 93N soc uS MON sngod sod soa E 5d e liso snaoa ano m gus Mano OPAZL E TRAS We anov n NSN Nov opync e E SAEI Banner 1nO OO esee 20 JEE IS Jeer NIS Ze6ee OS EGEE LNOS zesse X10S Jeer DES Jeer So 6 SO ze6ee L Jeer LSH Jeer INI 6 INI 2 6 E Na 6 Na zesse snsod sng9q 1 sngod A sngod A VI VI gi gi ST oui v oZ VOZ oz HZ 9 92 392 v 4W38 vanag H awas H8 awaa 9 299 9 Aug 1NOO Zeg du vus IN WMd LV WMd av Md av Md 18 Wuel 18 Wuel 99 WMd 99 Md 19 WMd 19 WMd 82 NMd 97 WMd Jamod Ajddns Jamod pue nouo Indu Figure 4 1 Schematic Block diagram 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 4 18 Electrical Characteristics s P z res ZE 0 Nenigeg een eeg 9 LLL9Z 4dS 410d LLI9Z HOS EN EH E mann wouroog eng ponouddy Ajddns 1emod pue 3jn94 9 3nduj eem oa em obed Mg ue LEGEEDIN UM Sd Ud HOA MOT VOL nann nea zop Bumesg subo X end TONI doa OS AEN opene uaqum sseudxo ou jnoym ped ur O ejom ur eanenugui 10 jusuunooid USS Ep Doten 104 pasn eq ou ius pue DEU GEESS 0 uyoudoid LONEULQUI surequoo xuoumnoop i JOPNPUCOIIES ejeoseai4
5. 33937 CS g cs PHASEC in zc c 33937 SI T 20 SI PHASEB 4 Ze B 33937 SCL 374 SCLK PHASEA ZC_A 33937_S RE so 53 R36 25 NC6 Ce 33937 AMP N A SCH AMP N NC5 z6 33937 AMP P AMP P NCA ag DNP 0 28 NOS Fax D di NC2 F NC R37 3 3VAdc 24 AMP OUT 57 33937 AMP OUT OC OUT o 33937 OC OUT DNP PCZ33937AEK Populate R35 R36 R37 or R77 R78 GND C Les B_LSS A LsS Figure 3 3 MC33937A circuit Back EMF signals Back EMF signals are included to support sensorless algorithms for BLDC motors and dead time distortion correction for a sinusoidal motor Figure 3 4 shows circuitry for phase A the raw phase voltage is scaled down by a voltage divider consisting of R55 R67 or R70 and R60 Output from this divider produces a a back EMF sense voltage BEMF A The resistor values are chosen so that a 50 05 V 36 025 V or 18 298 V of phase voltage corresponds to a 3 3 V ADC input range The BEMF A BEMF B BEMF C signals are directly connected to the UNI3 interface pins 38 39 40 PA HSS gt Back EMF voltage sensing BEMF A BEMF B R62 3 3V 50 05V 51k 3 6k 3 3V 50 05V 51k 3 6k E 3 6K 3 3V 36 025V 35 7k 3 6k 3 3V 36 025V 35 7k 3 6k 3 3V 18 298V 16kK 3 6k 3 3V 18 298V 16k 3 6k AGND AGND AGND Figure 3 4 Back EMF Sensing Phase A B C 3 Phase BLDC PMSM Low Voltage Power Stage Revision R70 R71 TRY R57 R72 16 0K TP6 16 0K TPAD 050 51 1K 16 0KP8 DNP TPAD 050 DNP DNPTPAD 050
6. connectors J6 J7 and J8 Table 2 3 contains pin assignments Table 2 3 Motor Connector signal description Pin Signal name Description J6 Phase A Supplies power to motor phase A J7 Phase B Supplies power to motor phase B J8 Phase C Supplies power to motor phase C 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 2 9 Interface Description 2 5 Braking chopper connector J5 The braking resistor can be joined to connector J5 This is located on the left top corner of the board Table 2 4 Brake resistor connector signal description Pin Signal name Description 1 Brake res Brake resistor negative terminal 2 Brake res Brake resistor positive terminal 3 Phase BLDC PMSM Low Voltage Power Stage Revision 2 10 Freescale Semiconductor Design Consideration Chapter 3 Design Consideration The 3 phase BLDC PMSM low voltage power stage demonstrates the ability of Freescale microcontrollers and DSCs to control various electrical motors and for easy SW development In addition to the hardware needed to run a motor a variety of feedback signals that facilitate control algorithm development are provided A set of schematics for the drive is explained in the following section 3 1 3 phase power bridge The power stage is configured as a 3 phase power bridge with MOSFET output transistors It is simplified considerably by an integrated gate dr
7. Braking chopper connector ak oaa dures duds Pd a Sad E do RR d aed 10 Chapter 3 Design Consideration 3 1 3 phase power bridge nk qu ana dd a odd du OX tet EE DO EE cede E CR IO RR Sl 11 3 2 DC Bus voltage and current feedback NES ce eee ei ddan NEE NR ER EN EK EN a 12 3 3 Over current under voltage and other safety functions 13 34 Back EMF signals EE 14 do Phase culrent sensing iaa d elite 6s EAER hee OER ER RE dd 15 3 6 Power supplies and voltage reference 15 Br Bake chopper NOUN q Se ne de da A E OR Y EEN 16 Chapter 4 Electrical Characteristics Freescale Semiconductor 1 Freescale Semiconductor Introduction Chapter 1 Introduction Freescale s embedded motion control series 3 Phase BLDC PMSM Low Voltage Power Stage is an 8 V 50 V 10 Amps surface mounted power stage In combination with one of the embedded motion control series controller boards it provides a software development platform that allows algorithms to be written and tested without the need to design and build a power stage It supports speed and position sensing based on Hall sensors resolver sensors encoder sensors and back electromotive force BackEMF signals for sensorless control The 3 Phase BLDC PMSM Low Voltage Power Stage has an over current protection It is independent of the control board when you choose the internal MC33937A DC bus operational amplifier with an over current compar
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9. 3 Phase BLDC PMSM Low Voltage Power Stage User Guide Devices Supported MC33937A Document Number 3PHLVPSUG Revision O 07 2012 4 xX A K freescale Freescale Semiconductor Petr Konvicny Freescale Semiconductor Roznov Czech System Center About This Book This document describes the 3 Phase BLDC PMSM Low Voltage Power Stage targeted for rapid development of motor control applications To locate any published updates for this document refer to the Freescale websaite at http www freescale com Revision History Table i Revision History Revision ua Page Date level Description number s 08 2012 0 Initial release 30 Documentation The MC33937A documentation is available at the Freescale web site http www freescale com as follows e Data sheet MC33937A modules in detail e Product briefs device overview e Application notes address specific design issues MC33937A Controller Board Revision Freescale Semiconductor MC33937A Controller Board Revision Freescale Semiconductor Chapter 1 Introduction Ri PR EE dA A EE Reb RANA 3 1 2 Board architecture ss 224 SE dec pd me See da 3 Chapter 2 Interface Description AT Poro DU au BETA a cae baked 625 ci sds ada a dd e ded 7 22 UNIS IMENICE J d ana en a Ch ER ALI CE a Eod 7 23 MC33937A Interface J4 sus srs ade scr REOR RR E DA DD e eco 9 24 Motor connector J6 DRA ass beh AER EORR ON ROO ooa EE a di 9 2 5
10. Analogue Output Range Vout 0 3 3 V Bus Current Sense Voltage Visns 165 mV A Bus Current Sense Offset VISNSOFF 1 65 V Bus Voltage Sense Voltage 12 V range Vous 5 3564 5 4445 5 5342 VN 24 V range 10 7203 10 9167 11 117 48 V range 14 8861 15 1667 15 4529 Phase A B C Current Sense Voltage VIASNS 165 mV A Phase A B C Current Sense Offset VIASNSOFF 1 65 V Power MOSFET On Resistance Rps oN 22 5 28 5 mo Continuous Output Current Tc 25 C Ip E 35 Pulsed Output Current lpm 140 A Total Power Dissipation per MOSFET 2 Pp TBD Required Deadtime torr 77 ns _ measured at 12 V power supply 2 The values are measured at 25 C Values may differ for other temperatures 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 4 17 Electrical Characteristics p 1 jeeus ZLOZ Z0 ege Aepsmu 9180 9 L119 4dS dQd ZL197 H9S Ww lt Jenolddy gt ney JeQUINN juewno0q ezis pe ouddy weBelp 4901 naine ned ep eBeg q ume1q LEGCEOIN YUM Sd UE HOA MOT VOL Auojuoy ned opt fume1q ueubiseg X tand On dog uopeoyisse d Jojinpuoojuies ejeosee o uoissiuued Ueu sseidxe eu oun ped u JO ejouw u eunjoejnueuu 10 jueureun2oud uBisep BuueeuiBue 10 pesn eq jou IEUS pue 10jonpuoorulegs 915759914 0 iejeudoud uoreuuojur surgjuoo jueunoop SI allandey y28z9 uejsoupes pod AOUZOH 19957 6001 alen 1
11. Consideration DC BUS Voltage Sensing DCB POSY R66 16 0K TP1 DNP TPAD 050 51k 3 6k i 35 7k 3 6k 16k 3 6k DC BUS Current Sensing 1 2k 12PF R46 DNP DNP NI 33k C49 mossa nae KEND GAVE TP4 _DCBUS_N gt gt ANS x TPAD 050 3 0K C51 33937 AMP N o R V U7A 33937 AMP OUT 47PF d 2 NA AGND 4 5 d dd gt DCBUS C53 T Y V AD8656 R50 47PF 33937_AMP_P E DCBUS P DNA Done capacitor ces i to V pin 30K ass ace as close as possible to V p e 1 65Vref AGND 33k Figure 3 2 DC Bus current and voltage sensing 3 3 Over current under voltage and other safety functions The MC33937A provides over current and under voltage functions The amplified DC Bus current signal is filtered to remove spikes and then it is internally fed into the MC33937 over current comparator input The OC comparator threshold level is adjusted by external trimmer R38 and filtered by C43 This signal is connected to the MC33937 pin 28 OC TH Therefore when DC bus current exceeds the adjusted threshold level all six bridge transistors are switched off After a fault state has been detected all six gate drivers are off until the fault state is cleared by the SPI command or RESET pin The under voltage function is implemented internally The IC guarantees that the output FETs are turned off in the absence of Vpp or Vpwr by means of the Hold off circuit When Vpp is less than ab
12. PHLVPSUG Rev 0 07 2012 2 o efe freescale
13. RR 8 Glide Populate R35 R36 R37 or R77 R78 GND gt LSS des RSS Figure 1 2 3 phase BLDC PMSM low voltage power stage block location 3 Phase BLDC PMSM Low Voltage Power Stage Revision ar IRFRS40Z R32 0018 Freescale Semiconductor Introduction 3 Phase BLDC PMSM Low Voltage Power Stage Revision 1 6 Freescale Semiconductor Interface Description Chapter 2 Interface Description Inputs and outputs are located on eight connectors and headers available on the board Two power supply connectors J1 and J2 e Three pin motor connector J6 J7 J8 e Two pin brake connector J5 e 40 pin UND connector J3 e 10 pin MC33937 interface connector J4 Pin descriptions for each connector and header are identified in the following information Table 2 1 shows the pin assignments and signal descriptions for the UNI3 interface connector J3 The 3 Phase BLDC PMSM Low Voltage Power Stage contains several connectors and headers that serve for connecting the power supply for motor phases connections and other functions The input power supply attached to inputs J1 and J2 must be in the range 8 V 50 V DC The output for the motor is executed by the connectors J6 J7 and J8 For more details see Section 2 4 Motor connector J6 J7 J8 Each connector and header is labelled on the top side of the board 2 1 Power Supply J1 and J2 The 3 Phase BLDC PMSM Low Voltage Power Stage board can be supplied by eithe
14. age levels of 12 V 5 V and 3 3 V 3 6 1 Input power supply The DC bus can be supplied from two input connectors J1 and J2 The DC bus has reverse polarity protection The MC33937 driver is supplied from a SEPIC DC DC converter that delivers a constant output voltage of 12 V across the entire input voltage range 8 V to 50 V The 5 V and 3 3 V power supplies are taken from 12 V source 3 6 2 12 V power supply The constant 12 V supply voltage for the wide input voltage range 6 V to 50 V is provided by the SEPIC converter This topology delivers a constant output voltage when the input voltage is below or above the 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 3 15 Design Consideration nominal output voltage It is suitable for this input voltage range The LM5022 is a high voltage low side N channel MOSFET controller The output voltage regulation is based on current mode control It includes a start up regulator that operates over a wide input range of 6 V to 60V an error amplifier precision reference line under voltage lockout cycle by cycle current limit slope compensation soft start external synchronization capability and thermal shutdown The switching frequency has been setup to 500 kHz 3 6 3 5 V power supply The 5 V voltage level is generated by the step down DC DC converter LM2694 This circuit delivers up to 600 mA peak output current The switching frequency is adjust
15. ator You must therefore be careful when you drive low impedance motors The current measuring circuitry is setup for 10 Amps full scale At ambient temperature 25 C the board remains within thermal limits when operating with output currents of up to 10 Amps continuous RMS Input connections are made via the 40 pin and 10 pin ribbon cable connectors J3 and J4 Pin assignments for the input connector are illustrated in Section 2 2 UNI3 Interface J3 Power connections to the motor are made on the 3 way connectors J6 Phase A J7 Phase B and J8 Phase C The input voltage requirements are met by a power supply of 8 V 50 V The voltage should be within these limits The board sustains a voltage of at least 8 V with a maximum of 58 V The input power is supplied by means of the 2 1 mm jack connector J2 or clamp connector J1 The following is summary of the information required to use the 3 Phase BLDC PMSM Low Voltage For design information see Section Chapter 3 Design Consideration 1 1 Features The 3 phase low voltage power stage features are e MC33937A MOSFET pre driver Motor control interface UNI 3 MC33937A pre driver Braking chopper circuit Phase and DC Bus voltage and current sensing circuits e DC Bus over current protection 12 Vdc 5 Vdc DC DC converters 1 2 Board architecture The 3 phase low voltage power stage contains basic building blocks See Figure 1 1 3 Phase BLDC PMSM Low Voltage Power S
16. ed to 500 kHz More information is available in the converter datasheet 3 6 4 3 3 V power supply An important voltage level for this board is 3 3 V This is obtained from the MC33269D linear voltage regulator which is able to deliver up to 800 mA The 43 3 V level is used to supply the on board analogue devices 3 6 5 1 65 V voltage reference The 1 65 V reference is generated from the 3 3 V level by a resistors divider and an impedance isolator This reference shifts all current sensing output signals by 1 65 V 3 7 Brake choppper circuit The brake chopper circuit is included to control the operation of losing the energy from the motor through regenerative braking to an external brake resistor There is only a power switch with a pre driver and a freewheeling diode populated on the board An external brake resistor must connected through the two pin connector J5 3 Phase BLDC PMSM Low Voltage Power Stage Revision 3 16 Freescale Semiconductor Electrical Characteristics Chapter 4 Electrical Characteristics The electrical characteristics in Table 4 1 apply to an operation at 25 C Table 4 1 Electrical Characteristics Characteristic Symbol Minimum Type Maximum Units Power supply Voltage Vpc 8 12 24 42 58 V Quiescent Current loc TBD mA Min Logic 1 Input Voltage Vu mA Max Logic 0 Input Voltage Vu mA Input Logic Resistance Rin 4 7 kQ
17. fferent applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective owners Freescale Semiconductor Inc 2012 All rights reserved 3
18. ge corresponds to Vppr at output V DCBUS This output signal is connected to the UNI3 connector pin 21 Figure 4 2 shows the circuitry supporting DC bus current sensing The DC bus current is sampled by shunt resistor R33 The voltage drop for this resistor can be amplified by either the MC33937 internal amplifier or an AD8656 operational amplifier if populated Both amplifiers are used as a differential amplifier for DC bus current sensing With R46 R52 and R48 R50 the gain is given by _ R46 Rag The output voltage is shifted up by 1 65V VREF to accommodate positive and negative current swings A 150mV voltage drop across the sense resistor corresponds to a measured current range of 10 Amps If you use the MC33937 for current measurement the I DCBUS signal is internally connected to the over current comparator and provides an over current triggering function A discussion about over current limiting follows in section 3 3 The DC bus current may be measured by an AD8656 To use this option the zero resistors R35 R36 and R37 cannot be populated MC33937 operational amplifier inputs must be grounded to avoid incorrect OC output behavior The output from opam I DCBUS is joined to the UNI3 connector pin 22 The shunt resistor is represented by a 0 015 O resistance Cyntec SMD the same type as the phase current measurement resistors 3 Phase BLDC PMSM Low Voltage Power Stage Revision 3 12 Freescale Semiconductor Design
19. ic 3ph power bridge with dr 3 Phase BLDC PMSM Low Voltage Power Stage Revision 4 21 Freescale Semiconductor Electrical Characteristics V e v D E S p S was SUE 20 Menge Aepeinyi as 2 LLISC 3dS 40d LLI9Z H9S ev fanny Aen sequnyjueunsog eg pencuddy synoujo Bujsues Bojeuy FT ea ed DPYAC EC Owner na L 6 2IN UM Sd Ud 30A MOT VOL Aoauoy ned epi Bug seuBseg anov X land ON E gees Ae get ava JOPNPUCOIUSS geseid uoissiuued Vent sseudxo eu jnouj ped ui JO ejouw ur eanjoejnueur JO jueueunooad ubisep Dita oup auov gt Vi 104 pesn oq ou ius pue DEU Sie au 0 DEE LONEULQUI SUJEJUOO oeur edp ei s landes tez uejsoupe pod AOUZON 19957 S E 6001 ent 9 295991 ee est d anueg WajsKs 42829 le IPAGI L S eBejoA indino INGE EIER EEN een iz Aq pepinip si aBeyoa Ajddns Bojeuy ps JSPIAp sue AFEAL AR6Z 81 D ACE AFEMI AS6Z 8L iner AFEAL AB6Z 8L DALE yee M9 EPIL SE ASZO IE ALE MI9 EPIL SE AGZO 9E ALE 9 EPIL SE ASZO 9E ALE H9 EMLS AS0OSOAECE wee AFEALS AS0 0S ACE Genis AG00S D AE PIAS zou esa 0t Sanaa lt sanas lt Y dan 080 QvdLdNG pa 0S0 Yd dNG 8dM0 9L 0S0 QVdl wat 9dl x09 us ddl WW ole q K ssH od amp SSH ad SSH vd Buisuas eBeyoA JWI x eg kaad kn d TE uid 0 ejqssod se asop se 80814 Lid id M 8 9 Joyoedeo Buidnoseq dg s
20. iver that has several safety features Figure 3 1 shows a schematic of the 3 phase power bridge The pre driver inputs are 3 3 V compatible A Freescale MC33937 pre driver provides a supply voltage for the low and high side MOSFET gates The MC33937 also provides the MOSFETS and application protection It integrates an under voltage hold off desaturation phase comparators and over current protection circuits The dead time insertion can be configured using SPI The default dead time value is typically 15 us The low and high side drivers are capable of providing a typical current of 1 Amp This gate drive current may be limited by an external resistor to achieve a good trade off between the efficiency and EMC compliance of the application Dee soe y Dea FOR oca meo pe M MM KK Y sg 232 n c e our 3 ty xs e E sur T mn 11 o Popetste ROS RIG RIT or RTT E Figure 3 1 3 phase power bridge 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 3 11 Design Consideration 3 2 DC Bus voltage and current feedback Figure 3 2 shows the circuity that provides feedback signals proportional to DC bus voltage and current Bus voltage is scaled down by a voltage divider consisting of R40 R42 The populated resistor values are chosen in such way that a 50 05 V 36 025 V or 18 298 V DC bus volta
21. ort Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com Asia Pacific Freescale Semiconductor China Ltd Exchange Building 23F No 118 Jianguo Road Chaoyang District Beijing 100022 China 86 10 5879 8000 support asia freescale com Freescale Semiconductor Literature Distribution Center 1 800 441 2447 or 1 303 675 2140 Fax 1 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in di
22. out 3 0 V or Vpw r is lower than the typically 8 0 V a small current source pulls all output gate drive pins low and if set an interrupt is generated The MC33937A safety functions keep the driver operating properly and within safety limits It has a thermal warning feature If the IC temperature rises above 170 C on one of three individual thermal warning circuits then an interrupt is generated if set The IC has other safety functions such as desaturation detection phase error framing error write error after a lock and exiting RESET AII these features can be configured through the SPI interface to trigger interrupts 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 3 13 Design Consideration A detailed description is available in the driver datasheet 3 4 DCB POS VLS o car c32 ess om cos 636 a al 22UF OAUF 22UF O1UF 22UF O1UF GND 325 gage SND zee Sore 17 g 9 INT rs MF A__ gt 33937 INT gt 48 PA BOOT Far 3 PA HS G Hg PA HSG a ENI PA HS S ge Spase 33937_EN gt EN2 PA_LS_G CAD nase SPA L 33937 RST gt Sy RST PB BOOT E PC BOOT 47 42 PB HS G La PB HSG PWM_AT gt 151 PA HS PB HS S Hg PB HSS PWM BI gt 551 PB HS PB_LS_G r B_LSG PWM CT gt PC HS 38 ll H D
23. r using the 2 1 mm DC power plug J2 or connector J1 The board provides 12 V 5 V and 3 3 V for board logic and analogue circuits and for controllers boards connected through UNI 3 interface The board is designed to operate in the voltage range from 8 V 50 V The board is protected against a reverse battery 2 2 UNI3 Interface J3 The Unified Interface Version 3 UNI 3 defines the interface between the 3 Phase BLDC PMSM Low Voltage Power Stage and the dedicated controller board The list of UNI 3 signals is as follows e Control signals PWM phase A B C top and bottom switches control Braking chopper control signal Power Factor Correction PFC e Monitor signals DC bus voltage DC bus current 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 2 7 Interface Description Phase B C current Zero cross signals Back EMF phase A B C Temperature monitoring Power Supply 12 V Serial line A bidirectional communication line between the Controller Board and Power Stage Table 2 1 defines the UNI 3 pin out Table 2 1 UNI 3 signal description Interface Pin Signal Name MCU Signal Description Direction 1 PWM AT Phase A top switch control H gt Turn OFF Digital input 3 PWM_AB Phase A bottom switch control H gt Turn ON Digital input 5 PWM_BT Phase B
24. tage Revision Freescale Semiconductor 1 3 Introduction Braking chopper Power Ta P Bridge FREE III MOSFET pre driver Power Input D DC Link Connector connector Voltage and Current sensing interface E So 85 e o gt Figure 1 1 3 Phase BLDC PMSM Low Voltage Power Stage controller board block diagram The board is supplied by VBAT voltage in the range of 8 V 50 V 3 Phase BLDC PMSM Low Voltage Power Stage Revision 1 4 Freescale Semiconductor Introduction oce pos Des POS Dc8 POST 34 wier Ri E D 2 wes ME Lid ee Lk sl e R oe 68 0UF 680UF L 4 comze pio E a PRO ar ar MBRI20LSFTIG RISE ST ET A I sense_APK sense CPC R20 BRAKE_GATE Gs aos a7 a IRFRS4OZ isca I sense Late D DCB ME lt TA dn DCB NEG i i 4 re que Lx prus P Z DCBUS N pos pos us Y 6 en NS Leu IR cos zu 226 our 22u T ovr saag 4 la LL I w TB Les g 55 8 a age 70 ia sent 3 Ls EUIGD S si 7 SONS 24 Scu so 25 A Rs nos 33037_AMP_N Ras gie L E See H Nes S PEL com SE Ni E ek ANA A R37 a au our BE anse awe our rs D man OC OUT T 33937 OC OUT 10K Rre g 888253 ES a 8 652888 amp a ak Temara oe d ser E
25. top switch control H gt Turn OFF Digital input 7 PWM BB Phase B bottom switch control H gt Turn ON Digital input 9 PWM CT Phase C top switch control H gt Turn OFF Digital input 11 PWM CB Phase C bottom switch control H gt Turn ON Digital input 2 4 5 8 10 ia E E a side only E 12 13 GND_D Digital power supply ground 14 15 5 V DC 5 V digital power supply 17 18 AGND Analog power supply ground 19 12 15 V DC Analog power supply 16 20 27 28 37 NC Not connected 21 VpcBus DC bus voltage sensing 0 V 3 3 V Analog output 22 IpcBus DC bus current sensing OV 3 3V Analog output 23 la Phase A current sensing 0 3 3 V Analog output 24 lg Phase B current sensing 0 3 3 V 25 lc Phase C current sensing 0 3 3 V 26 TEMP Analog temperature 0 V 3 3 V Analog output 29 BRAKE_CONT DC bus brake control Digital input 30 SERIAL Serial interface Dig bidirectional 31 PFC Power factor correction PWM Digital input 32 PFCEN Power factor correction enable Digital input 33 PFCZC Power factor correction Zero cross Digital output 34 ZCA Phase A Back EMF zero crossing Digital output 35 ZCB Phase B Back EMF zero crossing Digital output 36 ZCC Phase C Back EMF zero crossing Digital output 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor Interface Description Table 2 1 UNI 3 signal description continued
26. ues uid A 0 ejgissod se esoj se 2081 979 Joyoedeo Buijdnooeq Kd sneod i d dW Jeer zen A gt sma anov SIR Addy S ANO dWv Lesee wa geg ug esues i par aver Zu sngod i 9 d NAN d ne 199 SS 924 poo wer Buisues jusuno sna 9A D I es Zen uid A 0 e qissod se asson se 8981 rm SVO rt Sioyoedeo Bujdnooeq av esuos EI E vt 86781 ACE ASZO 9E ACE i AG0 06 ACE anro GNOY NY sa Sta a sngodA rq 099 924 669 SLU 850 LU ZSI ELU sjejndod jou oq 090 avd dNG i 40 9L sou sod eoa Buisuas eBeyoA SNA 20 aNG dNa ddl WL YN Buisuas juauind eseud S ts Ing circul Analogue sensi Ic 5 Schemat Figure 4 3 Phase BLDC PMSM Low Voltage Power Stage Revision Freescale Semiconductor 4 22 Freescale Semiconductor 23 How to Reach Us Home Page www freescale com Web Support http www freescale com support USA Europe or Locations Not Listed Freescale Semiconductor Inc Technical Information Center EL516 2100 East Elliot Road Tempe Arizona 85284 1 800 521 6274 or 1 480 768 2130 www freescale com support Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French www freescale com supp
27. w Voltage Power Stage Revision Freescale Semiconductor 4 20 Electrical Characteristics V e v D E s P p as SUE 20 Menge Aepeinyi as 9 LLI9Z 3dS 404 LLI9Z HOS ev enaddy gt auo SR LEN Joqumwiueumoog eng ponouddy e i desi NOUS JeALIp UNA SB pq A ude A ron ano BLU LLY 10 LeU 9EY SEU eendod eod ouen ned omy Beg Ag msg re x L 6 2IN UM Sd Ud 30A MOT VOL Awoauoy med anro op Bana ees E leege ls wee P X iad oni O4 See Ae VAVLEGEEZOd JOPNPUCOUES ejeosean4 m 239300 g opene usyum sseudxo eu nou ped UI O giou ur ainjoejnuew 10 juewe nooud Ve D se S arose o z M 104 pesn eq jou US pue Jopnpucoiures ejeoseeu 0 Kieyeudaid uogeuucjur sureuoo jueunoop St dNa 555628 an E V cet 0 Di seu andey pezo urersoupesi pod Aouzo 19997 9 22S98 U U a NE Tel AGRIC uo tato Ls 6001 SW ez s vc SR Bes wien anuag wajsAs 42929 e SIS ana EE ON dva S G AV 2 dd esce SEN on ye Nay 2666 ano Es seu e emer voz vasvHd nos Jeer Ee gr SESvHa IS 28688 EK LE 23SVHd SE OST IAC SS o WMA re tooo SS d SE s SH dd Ba sno Da vem OSH od rai PM 8 91 E osi aa ansto uo ar ST Ed E Ma alvo awa S mo IT vita Luc axivua SSH 847 t is SSH Bd Www OSH BK E zp 9 SH 8d a Jon on ee Wen zeocc Pe SS OST Wa EE op STIVA DER ano ano SSH Vay e SI OSH va S SH 9 SH Vd d La m Pu Es zt a DH o anglo geo b E HS
28. zo uenigej Aepsmu ewg 9 LLI9t 1dS Ad LLL92 HOS vv lt leno1ddy gt ney JequinN jusundog ezis penouddy S9EH9JUI INN AUDIAUOY ed ent ebed Aq umeig 6 OIN UM Sd Ud HOA MOT VOL Awonuoy ned ep Bumeig zeubiseq X and Hora E dog TUONBIYISSEIO dYOI JOJoNnpuod as ejeoseei 4 J uoissiuued uapum SseJdxe eu Ou ped ui JO S OYM ui enjoejnueui Jo jueureunooud ubisep BuueeuiBu 104 pesn eq jou Eus pue Jojonpuosiwes ejeoseai 0 Aiejeudoud UOREULIOQUI surgjuoo justundop SI ajqndey y9 z9 urejsoupes pod AOUZOM 19957 6001 efew t 91ju82 uio s S 99773 JO0j2npuoovuJes 9 E2S904J 2 2 QNS aNov NOV e SXc YOH OO OO NIS Z 6 MOS ZE6E INL 2 6 90 ZEGE OO O LE6 NOS JEE La Jeer 3 LE6 aNov Ko OO ko eo f OO vr OZXZ NO9 laol ov OO 8 OO lt Fanas C E SIE vana 29 VO 9 OO ve OO ZE OO LC gt No zeng 0 OO 8c OO 9c OO ve OO Es snaod ce OO o1 M Isngod PAZ 07 OO SL OO lt opas pex IPAGE OL OO FL OO ZL OO 2 WMd OL OO L9 NMd OO 9 WMd OO ld WMd OO IV INMd la lele OO er LY WMd Figure 4 3 Schematic UNI 3 Interface 3 Phase BLDC PMSM Lo
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