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Modicon Ladder Logic Block Library User Guide Volume 1

1. Format Repeat contents of the parentheses e g 2 4X I5 says repeat 4X I5 Specifier two times Field width None Prefix 1 255 Input format Repeat format specifiers in parentheses the number of times specified by the prefix Output format Repeat format specifiers in parentheses the number of times specified by the prefix Format Integer e g 15 specifies five integer characters peores Field width 1 8 characters Prefix 1 99 Input format Accepts ASCII characters 0 9 If the field width is not satisfied the most significant characters in the field are padded with zeros Output format Outputs ASCII characters O 9 If the field width is not satisfied the most significant characters in the field are padded with zeros The overflow field consists of asterisks Format Leading zeros e g 1 5 specifies five leading zeros SPECIMEN L Field width 1 8 characters Prefix 1 99 Input format Accepts ASCII characters 0 9 If the field width is not satisfied the most significant characters in the field are padded with zeros Output format Outputs ASCII characters O 9 If the field width is not satisfied the most significant characters in the field are padded with zeros The overflow field consists of asterisks Format Alphanumeric e g A27 specifies 27 alphanumeric characters no suffix allowed SDBCHIEE A Field width None defaults to
2. At a Glance Introduction This chapter describes the instruction CHS What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 158 Representation CHS Configure Hot Standby 159 Detailed Description 160 043505766 4 2006 157 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CHS Configure Hot Standby Short Description Function Description Note This instruction is only available if you have unpacked and installed the DX Loadables For further information see p 101 The logic in the CHS loadable is the engine that drives the Hot Standby capability in a Quantum PLC system Unlike the HSBY instruction the use of the CHS instruction in the ladder logic program is optional However the loadable software itself must be installed in the Quantum PLC in order for a Hot Standby system to be implemented 158 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CHS Configure Hot Standby Representation CHS Configure Hot Standby Symbol Representation of the instruction CONTROL INPUT F ACTIVE command register COMMAND REGISTER L ERROR non transfer area ENABLE NON Pul CONFIG EXT PRESENT TRANSFER AREA Length 4 8000 registers length Parameter Description of the in
3. Topic Page Closed Loop Control Analog Values 72 PCFL Subfunctions 73 A PID Example 77 PID2 Level Control Example 80 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 71 Closed Loop Control Analog Values Closed Loop Control Analog Values General Definition of Set Point and Process Variable An analog closed loop control system is one in which the deviation from an ideal process condition is measured analyzed and adjusted in an attempt to obtain and maintain zero error in the process condition Provided with the Enhanced Instruction Setis a proportional integral derivative function block called PID2 which allows you to establish closed loop or negative feedback control in ladder logic The desired zero error control point which you will define in the PID2 block is called the set point SP The conditional measurement taken against SP is called the process variable PV The difference between the SP and the PV is the deviation or error E E is fed into a control calculation that produces a manipulated variable Mv used to adjust the process so that PV SP and therefore E 0 Control End Device x Output PV Process Process Transmitter PV Input Control a iL Calculation SP 72 This document provided by Barr Thorp
4. 558 Representation GM92 Gas Flow Function Block 559 Parameter Description Inputs GM92 Gas Flow Function Block 561 Parameter Description Outputs GM92 Gas Flow Function Block 568 Parameter Description Optional Outputs GM92 Gas Flow Function Block 569 G392 AGA 3 1992 Gas Flow Function Block 571 Short Description G392 Gas Flow Function Block 572 Representation G392 Gas Flow Function Block 2 0055 573 Parameter Description Inputs G392 Gas Flow Function Block 575 Parameter Description Outputs G392 Gas Flow Function Block 580 Parameter Description Optional Outputs G392 Gas Flow Function Block 581 HLTH History and Status Matrices 583 Short Descriptions 2 4 0 23 3 Y noe Sor se oae Rod Ce euo id Sheed NAN 584 Representation HLTH System Health 2 02002 eee 585 Parameter Description 00 00 cee eee 586 Parameter Description Top Node History Matrix 587 Parameter Description Middle Node Status Matrix 592 Parameter Description Bottom Node Length 20 005 596 xiv This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 92 HSBY Hot Standby Llellle l s 597 Short Description HSBY Hot Standby
5. Symbol Representation of the instruction CONTROL INPUT 4 ACTIVE source First register or discrete address of matrix destination First register or discrete address of matrix COMP Length 1 to 100 registers 16 to 1600 bits length Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates the complement operation source Ox 1x 3x 4x ANY BIT First reference in the source matrix top node which contains the original bit pattern before the complement operation destination Ox 4x ANY BIT First reference in the destination middle node matrix where the complemented bit pattern will be posted length INT UINT Matrix length range 1 100 bottom node Top output Ox None Echoes state of the top input 043505766 4 2006 181 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMP Complement a Matrix A COMP When contact 10001 passes power the bit pattern in the source matrix registers Example 40600 and 40601 is complemented then the complemented bit pattern is posted in the destination matrix registers 40602 and 40603 The original bit pattern is maintained in the source matrix source matrix 40600 1111111100000000 40601 1111111100000000 Complemented destination matrix 40602 000000011111111 40603 0000000011111111 10001 182 043505766 4
6. 0c eee eee 475 WRITE ASCII Message Subfunction 2 a 479 GET DATA Subfunction 3 seresa ate lese 480 PUT DATA Subfunction 4 ee 482 ABORT Middle Input ON eren 486 Run Time EMOS ois acces Biden ko Re rp ee NG Rab RR EEG XE nG 487 Chapter 82 EUCA Engineering Unit Conversion and Alarms 489 Short Description sno t mand Re a e Ea NIRA ad RR RR eR DAL 490 Representation EUCA Engineering Unit and Alarm 491 Parameter Description 0 0000 en 492 EXGIMNDICS AA PAA eee Gees 494 Part IV Instruction Descriptions F to N 501 Chapter 83 FIN Firstin 2x20 388 ex or Y En ER AGER Pu E wd 503 Short Description see 504 Representation FIN Firstin 0 505 Parameter Description es 506 Chapter 84 FOUT First Out 20 00 cee ees 507 Short Bee P EE 508 Representation FOUT First Qut 00 000 c eee ee eee 509 Parameter Description 000 0 eee ee eee 511 Chapter 85 FTOI Floating Point to Integer 513 Short Description cette 514 Representation FTOI Floating Point to Integer Conversion 515 xiii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 86 Chapter 87 Chapter 88 Chapter 89 Chapter 90 Chapter 91 GD92 Gas Flow Function Block 517 Short Description GD92 Ga
7. 1061 Short Descppliolgsss x ead yeu petet bakas TANA Pe ews o3 eas RUE PG 1062 Representation T1MS One Millisecond Timer 1063 EXAMpIG cem rss AGANG KA BATA NA AK A pee AA e 1064 Chapter 170 TBLK Table to Block 20 cece eee eee eee 1067 Short Description 0 000 ee eee 1068 Representation TBLK Table to Block Move a 1069 Parameter Description eee 1071 xxiii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 171 Chapter 172 Chapter 173 Chapter 174 Chapter 175 Chapter 176 Chapter 177 Chapter 178 Chapter 179 Chapter 180 TEST Test of 2 Values lllus 1073 Short Descriptio s sss spese nee 1074 Representation TEST Test of 2 Values 0 0 00 0000 c ee eee 1075 UCTR Up Counter lllsssseeees 1077 Short Description 0 2 0 0 see 1078 Representation UCTR Up Counter 0 00000 e eee eee 1079 VMER VVERead eee eee 1081 Short Description VMER VME Read 0020000 cece eee 1082 Representation VMER VME Read 2000 0c eee eee eee 1083 Parameter Description VMER VME Read 000000e 1084 VMEW VME Write 2 02 eee ees 1085 Short Description VMEW VME Write 2 elles 1086 Representation VMEW VME Write llli 1087 Parameter Description
8. 20 e eee 115 Chapter 16 AND Logical And a ama kA oir rur rmm 117 Short Description eee 118 Representation AND Logical And 0 119 Parameter Description ee 121 Chapter 17 BCD Binary to Binary Code 123 Short Description else 124 Representation BCD Binary Coded Decimal Conversion 125 Chapter 18 BLKM Block Move 0000 cee eee e eee e eens 127 Short DescriDtlOn x oa kad mg eme Rodeo RE Pe D boi ER Sce dete 128 Representation BLKM Block Move 0 2 129 Chapter 19 BLKT Block to Table lllessss 131 Short Description ie ees eem ta NG LAG mp ab NABA RENA NG Un 132 Representation BLKT Block to Table Move a 133 Parameter Description isses 134 Chapter 20 BMDI Block Move with Interrupts Disabled 135 Short Description BMDI Block Move Interrupts Disabled 136 Representation BMDI Block Move Interrupts Disabled 137 Chapter 21 BROT Bit Rotate cocer e e nhan 139 Short Description nee 140 Representation BROT Bit Rotate 0000 141 Parameter Description llle ee 142 V This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 22 Chapter 23 Chapter 24 Chapter 25 Chapter 26 Chapter 27 Chapter 28 Chapter 29 Chapter 30
9. WARNING Overriding of any disabled coils within a destination matrix without enabling them BROT will override any disabled coils within a destination matrix without enabling them This can cause injury if a coil has been disabled for repair or maintenance if BROT unexpectedly changes the coil s state Failure to follow this instruction can result in death serious injury or equipment damage 140 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BROT Bit Rotate Representation BROT Bit Rotate Symbol Representation of the instruction CONTROL INPUT 4 ACTIVE source matrix DIRECTION LEFT RIGHT I SENSE BIT ON OFF destination matrix SHIFT ROTATE 4 BROT Length 1 100 registers 16 1600 bits length Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON shifts bit pattern in source matrix by one Middle input Ox 1x None ON shift left OFF shift right Bottom input Ox 1x None OFF exit bit falls out of the destination matrix ON exit bit wraps to start of the destination matrix source matrix Ox 1x 3x 4x ANY BIT First reference in the source top node matrix i e in the matrix that will have its bit pattern shifted destination matrix Ox 4x ANY BIT First
10. cece eee eee 1029 Short Description SWAP VME Bit Swap 2 0020000 1030 Representation SWAP VME Bit Swap annann nenne 1031 Chapter 163 TTR Table to Register eee eee eee 1033 Short Description TTR Table to Register AA 1034 Representation TTR Table to Register a 1035 Chapter 164 T R Table to Register sse 1037 Short Description mysa kaaa paa e ee ot AG WX EX OC OR UE Re GRE d 1038 Representation T gt R Table to Register Move 1039 Parameter Description ee 1041 Chapter 165 T gt T Table to Table lllllles 1043 Short Description le 1044 Representation T gt T Table to Table Move 05 1045 Parameter Description en 1047 Chapter 166 T 01 Timer One Hundredth Second Timer 1049 Short Description le 1050 Representation T 01 One Hundredth of a Second Timer 1051 Chapter 167 TO0 1 Timer One Tenth Second Timer 1053 Short Descriptor srera msns taa KAG YU de Foxx pa hs wee we d 1054 Representation TO 1 One Tenth of a Second Timer 1055 Chapter 168 11 0 Timer One Second Timer 1057 Short Description re 1058 Representation T1 0 One Second Timer sls 1059 Chapter 169 T1MS Timer One Millisecond Timer
11. Closed Loop Control Analog Values aa PCFL Subfunctions ere A PID Example ses RR kA RE RE KAG See eee dE PID2 Level Control Example lesen Formatting Messages for ASCII READ WRIT Operations Formatting Messages for ASCII READ WRIT Operations Format SpeciflerS is sisse d bk GANG ha toes REA REX YR RR ta Rcs Special Set up Considerations for Control Monitor signals Formal 22s eere s RE GRAN chat cheeks BES See NEL ERU RE HEY ol Res Contacts sc EGO bc E ERE A RR we ROC A EUER we RR EER C ROC CR RR Re Interconnects Shorts res interrupt Handling 2 22 moga rrt EE een te Subroutine Handling 22202 cece eee eee This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 12 Installation of DX Loadables 101 Part Iil Instruction Descriptions A to D 103 Chapter 13 1X3X Input Simulation lllluss 105 Short Description 1X3X Input Simulation a 106 Representation 1X3X Input Simulation eee 107 Chapter 14 AD16 Ad 16 Bil ua n o Rm RR ER RE 109 Short Description nee 110 Representation AD16 16 bit Addition 0 0 0 0 eee eee 111 Chapter 15 ADD Addition KARERA Rr Rond RR RR Seeman ease 113 Short Description llli see 114 Representation ADD Single Precision Add
12. Local DFBs Local link Local macros Local network nodes Located variable Local DFBs are only available in a single Concept project and are contained in the DFB directory under the project directory The local network link is the network which links the local nodes with other nodes either directly or via a bus amplifier Local Macros are only available in a single Concept project and are contained in the DFB directory under the project directory The local node is the one which is projected evenly Located variables are assigned a state RAM address reference addresses Ox 1x 3x 4x The value of these variables is saved in the state RAM and can be altered online with the reference data editor These variables can be addressed by symbolic names or the reference addresses Collective PLC inputs and outputs are connected to the state RAM The program access to the peripheral signals which are connected to the PLC appears only via located variables PLC access from external sides via Modbus or Modbus plus interfaces i e from visualizing systems are likewise possible via located variables xliv 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary M Macro Macros are created with help from the software Concept DFB Macros function to duplicate frequently used sections and networks including the logic variables and variable declaration
13. Subroutine Handling JSR LAB The example below shows a series of three user logic networks the last of which is Method used for an up counting subroutine Segment 32 has been removed from the order of solve table in the segment scheduler Scheduled Logic Flow Segment 001 Network 00001 Subroutine Segment E Segment 032 Network 00001 pu i LAB 40256 40256 RET 00001 00001 Network 00002 mem ET 00001 40256 4 00001 A ADD SUB 10001 JSR 40256 40256 lm 00001 40256 L 00010 l SUB 00001 40999 JSR S 00001 Segment 002 N Network 00001 N e e e 043505766 4 2006 99 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Subroutine Handling When input 100001 to the JSR block in network 2 of segment 1 transitions from OFF to ON the logic scan jumps to subroutine 1 in network 1 of segment 32 The subroutine will internally loop on itself ten times counted by the ADD block The first nine loops end with the JSR block in the subroutine network 1 of segment 32 sending the scan backto the LAB block Upon completion of the tenth loop the RET block sends the logic scan back to the scheduled logic at the JSR node in network 2 of segment 1 100 043505766 4 2006 This document provided by Barr Thorp Electric Co In
14. Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates the CALL Bottom input Ox 1x None The input to the bottom node is used with an immediate DX function to keep scanning the instruction regardless of the state of the top input A list of the codes their names and their function is detailed in the table below named Immediate DX Functions value top node Ox 3x INT UINT The top node is used to specify the function code to be executed It may be entered explicitly as a constant or as a value in a 4xxxx holding register The codes fall into two ranges e Othrough 499 are for user definable DXs e 500 through 9999 are for system DXs Both User definable and System definable codes apply to both immediate and deferred Both User definable and System definable are provided by Schneider Electric register middle node 4x INT UINT The 4xxxx register in the middle node is the first in a block of registers to be passed to the Copro for processing length bottom node INT UINT The number of registers in the block is defined in the bottom node Top output Ox None ON when the function completes successfully Bottom output Ox None The output from the bottom node will go ON if an error is detected in the function 146 043505766 4 2006 This document provided by Ba
15. Distinctions are made between local and global macros Macros have the following properties e Macros can only be created in the programming languages FBD and LD e Macros only contain one single section e Macros can contain any complex section e From a program technical point of view there is no differentiation between an instanced macro i e a macro inserted into a section and a conventionally created macro e Calling up DFBs in a macro e Variable declaration e Use of macro own data structures e Automatic acceptance of the variables declared in the macro e Initial value for variables e Multiple instancing of a macro in the whole program with different variables e The section name the variable name and the data structure name can contain up to 10 different exchange markings 0 to Q9 MMI Man Machine Interface Multi element Variables one of which is assigned a Derived data type defined with STRUCT or variables ARRAY Distinctions are made between Field variables and structured variables 043505766 4 2006 xlv This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Network Network node Node address A network is the connection of devices to a common data path which communicate with each other via a common protocol A node is a device with an address 164 on the Modbus Plus network The node address serves a unique identifier for the network in the rou
16. 043505766 4 2006 53 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Equation Network Content The content of the equation network is in the form result algebraic expression where the result is a variable contained in 1 or 2 4x registers It may be a signed or unsigned 16 bit short integer a signed or unsigned 32 bit long integer or a floating point number algebraic a syntactically correct construction of variable and or constant data standard expression is algebraic operators and or functions Parentheses can be used to define the order in which the expression is evaluated and indicate arguments to functions within the expression Equation An equation network can contain a maximum of 81 words which are used according Network Size to the following rules Each Consumes enabling input 1 word normally open or normally closed contact 1 word horizontal short used as input no words output coil 1 word 16 bit register and or discrete reference 1 word opertaor in the equation window 1 word function in the equation window 1 word short integer 1 word floating point or long constant 2 words open closed parenthetical pair 2 words 54 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Mathematical Equations
17. Gain reduction XD SP X Gain reduction zone not used Proportional The following equat ions are valid Calculations Condition Requirement Proportional bit ON Equation YP KPx XD YP 0 Integral The following equations are valid ealculauon Equation Condition Requirement Integral bit ON YI YI Kpx 2t XD 1 XD g TI 2 YI 20 74 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Closed Loop Control Analog Values Derivative Calculation The following equations are valid Equation Condition Requirement DXD X_1 X Base derivative or PV DXD XD X 1 YD TDI x YD 4 TD x KP x DXD At TDI Derivative bit ON YD 0 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 75 Closed Loop Control Analog Values Structure Diagram Anti Windup Reset CONTROL DEVIATION gt p 8 PROPORTIONAL GAIN SET POINT 1 SP 0 i b 4 i 1 1 s INTEGRAL ON E 00 i l GAIN i 0 1 Fa 1 1 1 po 1 o a c CONTROL i INPUT 1 1 DERIVATIVE ON e 1 Ln 1 X n 0 i MOON Mee EC EE 0 base Derivative on XD 1
18. Matrix Length Bottom Node The pointer register entered in the middle node must be a 4x holding register It is the pointer to matrix b the other matrix to be compared The first register in matrix b is the next contiguous 4x register following the pointer register The value stored inside the pointer register increments with each bit position in the two matrices that is being compared As bit position 1 in matrix a and matrix b is compared the pointer register contains a value of 1 as bit position 2 in the matrices are compared the pointer value increments to 2 etc When the outputs signal a miscompare you can check the accumulated count in the pointer register to determine the bit position in the matrices of the miscompare The integer value entered in the bottom node specifies a length of the two matrices i e the number of registers or 16 bit words in each matrix Matrix a and matrix b have the same length The matrix length can range from 1 100 i e a length of 2 indicates that matrix a and matrix b contain 32 bits 170 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils 27 At A Glance Introduction This chapter describes the instruction element Coils What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description Coils 172 General Usage Guidelines Coils 173 0
19. 1 block 128k bytes The number of blocks are dependent on the memory size of the PCMCIA card e g O 31 Max for a 4Meg PCMCIA card Third implied Offset Particular range of bytes located within a particular block Byte Address on the PCMCIA card within the Block Range 1 128k bytes Fourth implied Count Number of 4x registers to be written or read to the PCMCIA card Range O 100 Note PCMCIA Flash Card address are address on a Window Offset basis Windows have a set size of 128k bytes 65 535 words 16 bit values No Write or Read operation can cross the boundary from one window to the next Therefore offset third implied register plus length fourth implied register must always be less or equal to 128k bytes 65 535 words 226 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DLOG Data Logging for PCMCIA Read Write Support Data Area The 4x register entered in the middle node is the first register in a contiguous block Middle Node of 4x word registers that the DLOG instruction will use for the source or destination of the operation specified in the top node s control block Operation State Ram Reference Function Write 4x Source Address Read 4x Destination Address Erase Block none None Erase Card none None Length The integer value entered in the bottom node is the length of
20. CALL Activate Immediate or Deferred DX Function 143 Short Description CALL Activate Immediate or Deferred DX Function 144 Representation CALL Activate Immediate DX Function 145 Representation CALL Activate Deferred DX Function 148 CANT Interpret Coils Contacts Timers Counters and the SUB Block eeeeeeells s 151 Short Description CANT Interpret Coils Contacts Timers Counters and the SUB Block RR IRR RS 152 Representation CANT Interpret Coils Contacts Timers Counters and the SUB Block 20 RR RR RI 153 Parameter Description CANT Interpret Coils Contacts Timers Counters and the SUB Block eese 154 CHS Configure Hot Standby 157 Short Description 0 0 0 es 158 Representation CHS Configure Hot Standby 00055 159 Detailed Description 0 00006 ee 160 CRSM Check Sum xen x RREEERE EANU Ress as vs 163 Short Description s maa pe eon ri Re mdr een AKNG Mad RET DE WAG 164 Representation CKSM Checksum 2 2 2 2 165 Parameter Description nnana ens 166 CMPR Compare Register eeees 167 Short Description es 168 Representation CMPR Logical Compare aa 169 Parameter Description eere 170 CONS 634010 WwUOm 171 Short Description Coils 0000 cee 172 General Usage Guidelin
21. Chapter 109 MRTM Multi Register Transfer Module Short Description eh Representation MRTM Multi Register Transfer Module Parameter Description nnana ees xvi This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 110 MSPX Seriplex eeeeeeeellee 697 Short Description MSPX Seriplex 00 e eee eee 698 Representation MSPX Seriplex 000 c cece eee 699 Chapter 111 MSTR Master 0 200 c cece ees 701 Short Description ccc ses 703 984LL MSTR Function Block 0 00 eee 704 Parameter Description 0 cece eee 707 Write MSTR Operation 000 00 cece tenes 711 READ MSTR Operation 0 0000 eee eee 713 Get Local Statistics MSTR Operation 2c eeeaee 715 Clear Local Statistics MSTR Operation 0000 c eee aes 717 Write Global Data MSTR Operation 0c eee eee eee 719 Read Global Data MSTR Operation eee enn 720 Get Remote Statistics MSTR Operation Aa 721 Clear Remote Statistics MSTR Operation a 723 Peer Cop Health MSTR Operation elles 725 Reset Option Module MSTR Qperation a 728 Read CTE Config Extension Table MSTR Operation 729 Write CTE Config Extension Table MSTR Operation 731 Modbus Plus Ne
22. Chapter 42 Chapter 43 Chapter 44 Chapter 45 Chapter 46 Chapter 47 DV16 Divide 16 Bit loser rr IRA 243 Short DESENDUO i duse Had hor d rrr e rsi rep ERE PERES nee Or L PR ee 244 Representation DV16 16 bit Division liliis 245 Example e RR RR oe eee Sees See Peden dee eee eae ees 247 Instruction Descriptions E 249 EARS Event Alarm Recording System 251 Short Description EARS Event Alarm Recording System 252 Representation EARS Event Alarm Recording System 253 Parameter Description EARS Event Alarm Recording System 255 EMTH Extended Math Ls 259 Short Description llis 260 Representation EMTH Extended Math Functions 5 261 Parameter Description res 262 Floating Point EMTH Functi0ons 0 ce ee 264 EMTH ADDDP Double Precision Addition 265 Short Description llli 266 Representation EMTH ADDDP Double Precision Math Addition 267 Parameter Description sirisser raas eene 269 EMTH ADDFP Floating Point Addition 271 Short Description 0 0 0 0 teens 272 Representation EMTH ADDFP Floating Point Math Addition 273 Parameter Description 000 0c cece eee 274 EMTH ADDIF Integer Floating Point Addition 275 Shert DesceriptiOn ue em E
23. Convert Outputs to Values in the O through 4095 Range eee eee 801 Parameter Description 00 000 c eee 802 PCFL AVER Average Weighted Inputs Calculate 803 Short Description 0 0 00 804 Representation PCFL AVER Average Weighted Inputs 805 Parameter Description ses 806 PCFL CALC Calculated preset formula 809 Short Description les 810 Representation PCFL CALC Calculate Present Formula 811 Parameter Description ene 812 xviii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 125 PCFL DELAY Time Delay Queue 815 Short Description ssaa betsiin cc nes 816 Representation PCFL DELY Time Delay Queue 817 Parameter Description l l en 818 Chapter 126 PCFL EQN Formatted Equation Calculator 821 Short Description nee 822 Representation PCFL EQN Formatted Equation Calculator 823 Parameter Description ee 824 Chapter 127 PCFL INTEG Integrate Input at Specified Interval 827 Short DescripliON sex xo ord e X UR ER e De ee E PE a RN 828 Representation PCFL INTG Integrate Input at Specified Interval 829 Parameter Description es 830 Chapter 128 PCFL KPID Comprehensive ISA Non Interacting PID 831 Shon IDSSChIPUON ss oa x 3
24. Inc 800 473 9123 www barr thorp com Chapter 71 Chapter 72 Chapter 73 Chapter 74 Chapter 75 Chapter 76 Chapter 77 Chapter 78 EMTH POW Raising a Floating Point Number to an Integer Power sees 417 Shon Description sericis rna Rd gone Dee BNG wars ea Rim Oa ware DANG 418 Representation EMTH POW Raising a Floating Point Number to an Integer Power eee eee eee 419 Parameter Description e 421 EMTH SINE Floating Point Sine of an Angle in Radians leesess 423 Short Description ee 424 Representation EMTH SINE Floating Point Math Sine of an Angle in Radians llis 425 Parameter Description 2 427 EMTH SQRFP Floating Point Square Root 429 Short Description 0 20 es 430 Representation EMTH SQRFP Square Root 0 005 431 Parameter Description 0 000 tee 433 EMTH SQRT Floating Point Square Root 435 Short Description es 436 Representation EMTH SQRT Square Root anaa nanana anann 437 Parameter Description nnana naana 439 EMTH SQRTP Process Square Root 441 Short Description 25 easa ser Rd ROSA ANA pra PAA ae a a ata a ons ann PANA AS 442 Representation EMTH SQRTP Double Precision Math Process Square Root les 443 Parameter Description eere 445 Example mr 446 EMTH SUBDP Double
25. PROPORTION ON 1 base Derivative on X a pos 7 uL Y 7 7 7 Anti Windup Limits page ING A HIGH CONTROL T Da Manual OUTPUT b Automatic sk fp Halt Y n P l D LOW DERVATIVE TD Contributions c SUMMING JUNCTION MODE SELECT 76 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Closed Loop Control Analog Values A PID Example Description This example illustrates how a typical PID loop could be configured using PCFL function PID The calculation begins with the AIN function which takes raw input simulated to cause the output to run between approximately 20 and 22 when the engineering unit scale is set to O 100 LL984 Ladder Diagram 3 AIN LKUP RAMP MODE PID AOUT 900100 To 1 000100 400185 400100 400120 400160 400190 400200 400250 PCFL PCFL PCFL PCFL PCFL PCFL 14 39 14 8 44 9 400112 J 400157 jao0172 laoo196 400242 400120 400200 4oo190 400206 400250 BLKM BLKM BLKM BLKM BLKM 2 2 2 2 2 The process variable over time should look something like this Process Variable Value 22 20 Time 043505766 4 2006 77 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr tho
26. binary to BCD 123 COS 64 COSD 64 Counters Timers T 01 Timer 1049 TO 1 Timer 1053 T1 0 Timer 1057 T1MS Timer 1061 UCTR 1077 Counters Timers DCTR 203 creating equation network 52 D data mathematical equation 56 data conversions equation network 66 Data Logging for PCMCIA Read Write Support 223 DCTR 203 Derivative Rate Calculation over a Specified Time 883 DIOH 207 discrete reference mathematical equation 56 Distributed I O Health 207 DIV 217 Divide 217 Divide 16 Bit 243 DLOG 223 Double Precision Addition 265 Double Precision Division 347 Double Precision Multiplication 395 Double Precision Subtraction 447 Down Counter 203 DRUM 237 DRUM Sequencer 237 DV16 243 lv 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index E EMTH 259 EMTH Subfunction EMTH ADDDP 265 EMTH ADDFP 271 275 EMTH ANLOG 279 EMTH ARCOS 285 EMTH ARSIN 291 EMTH ARTAN 295 EMTH CHSIN 301 EMTH CMPFP 307 EMTH CMPIF 313 EMTH CNVDR 319 EMTH CNVFI 325 EMTH CNVIF 331 EMTH CNVRD 337 EMTH COS 343 EMTH DIVDP 347 EMTH DIVFI 353 EMTH DIVFP 357 EMTH DIVIF 361 EMTH ERLOG 365 EMTH EXP 371 EMTH LNFP 377 EMTH LOG 383 EMTH LOGFP 389 EMTH MULDP 395 EMTH MULFP 401 EMTH MULIF 405 EMTH PI 411 EMTH POW 417 EMTH SINE 423 EMTH SQRFP 429 EMTH SQRT 435 EMTH SQRTP 441 EMTH SUBDP 447 EMTH SUBFI 453 EMTH SUBFP
27. data block 4x INT UINT The middle node contains the first middle node 4xxxx register of the data block a table where variable message data is placed In a read operation the data block is a destination table In a write operation the data block is a source table 043505766 4 2006 177 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMM ASCII Communications Function Parameters State RAM Reference Data Type Meaning 3 through 255 length INT UINT The integer value entered in the bottom node bottom node specifies the length which is the number of registers in the data block The length can range from for one scan Top output Ox None Echoes the state of the top input Middle output Ox None ON error detected for one scan Bottom output Ox None ON operation complete Register This table details the register usage for the top node Usage Table Register Usage 4xxxx 0 Operation Code 4xxxx 1 Error Status 4xxxx 2 Number of data fields provided expected 4xxxx 3 Number of data fields processed 4xxxx 4 Reserved 4xxxx 5 Port Number 1 for local 2 for child 1 3 for child 2 etc 4xxxx 6 Reserved 4xxxx 7 Reserved 4xxxx 8 Reserved 4xxxx 9 Active Status Timer 178 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800
28. immediate and deferred Both User definable and System definable are provided by Schneider Electric register 4x INT UINT The 4xxxx register in the middle node middle node is the first in a block of registers to be passed to the Copro for processing length INT UINT The number of registers in the block is bottom node defined in the bottom node Top output Ox None ON when the function completes successfully Middle output Ox None The output from the middle node which is used only with deferred DX functions goes ON to indicate that the function s in process Bottom output Ox None The output from the bottom node will go ON if an error is detected in the function 043505766 4 2006 149 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate DX Function Deferred DX This table lists the Deferred DX Functions Funetons Name Code Function f config 500 Obtain Copro configuration data fd dbwr 501 Write Copro register database from PLC f d dbrd 502 Read Copro register database from PLC f dgets 515 Issue dgets on comm line f dputs 516 Issue dputs on comm line f sprintf 518 Generate a character string f sscanf 519 Interpret a character string f egets 520 IEEE 488 gets function f eputs 521 IEEE 488 puts function f ectl 522 IEEE 488 error control function 150 043505766 4 2006 This document provided b
29. in Radians 343 Floating Point Divided by Integer 353 Floating Point Division 357 Floating Point Error Report Log 365 Floating Point Exponential Function 371 Floating Point Multiplication 401 Floating Point Natural Logarithm 377 Floating Point Sine of an Angle in Radians 423 Floating Point Square Root 429 435 Floating Point Subtraction 457 Floating Point Tangent of an Angle in Radians 465 Floating Point to Integer 513 Floating Point to Integer Conversion 325 floating point variable 56 Formatted Equation Calculator 821 Formatting Messages 83 Four Station Ratio Controller 887 FOUT 507 FTOI 513 function ABS 64 ARCCOS 64 ARCSIN 64 ARCTAN 64 argument 64 argument limits 65 COS 64 COSD 64 entering in equation network 64 EXP 64 FIX 64 FLOAT 64 LN 64 LOG 64 SIN 64 SIND 64 SQRT 64 TAN 64 TAND 64 G group expressions in nested layers of parentheses equation network 51 H History and Status Matrices 583 HLTH 583 horizontal open equation network 53 horizontal short equation network 53 Hot standby CHS 157 043505766 4 2006 lix This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index IBKR 603 IBKW 607 ICMP 611 ID 617 IE 621 IMIO 625 Immediate I O 625 IMOD 631 Indirect Block Read 603 Indirect Block Write 607 infix notation equation network 52 Input Compare 611 Input Selection 897 Installation o
30. is converted to computer usable OP codes during the download process the Op codes are decoded in the CPU and acted upon by the controllers firmware functions to implement the desired control Each instruction is composed of an operation nodes required for the operation and in and outputs Parameter Parameter assignment with the instruction DV16 as an example Assignment Instruction Inputs Operation Nodes Outputs Top input Top output Middle input middle node Middle output Bottom input DV16 Bottom output bottom node 043505766 4 2006 35 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instructions Operation The operation determines which functionality is to be executed by the instruction e g shift register conversion operations Nodes In The nodes and in and outputs determines what the operation will be executed with and Outputs 36 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Groups At a Glance Introduction In this chapter you will find an overview of the instruction groups What s in this This chapter contains the following topics Chapter Topic Page Instruction Groups 38 ASCII Functions 39 Counters and Timers Instructions 40 Fa
31. of the boolean An absolute value operation does not change the data type of the result Attempting to find the absolute value of a boolean argument produces an error A floating point result is always produced by an EXP LN LOG SQRT SIN COS TAN SIND COSD TAND ARCSIN ARCCOS or ARCTAN function If the original argument was not a floating point number it will be promoted to one assuming a signed number without checking for overflow The exception is an original boolean argument which will produce an error with any of these functions A boolean boolean operation is an OR operation A boolean boolean operation is an XOR operation 66 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Boolean boolean boolean boolean and boolean boolean operations are AND operations A boolean assignment 2 to a signed or unsigned number produces a signed or unsigned O or 1 A boolean assignment to a floating point number produces a floating point 0 0 or 1 0 A long short signed unsigned number assignment 2 to a short unsigned number produces a result in the range O 65 535 Overflow is set if the result is 5 65 535 A long short signed unsigned number assignment 2 to a short signed number produces a result in the range 32 768 32 767 Overflow is set if the result is 5 32 767 or 32 768 A floating point number assignment to a
32. preceded by signs Single underline signs _ between figures are not significant Example 16 F F or 16 FF decimal 255 16 E_0 or 16 E0 decimal 224 Base 8 literals function as the input of whole number values in the octal system The base must be denoted by the prefix 3 63kg The values may not be preceded by signs Single underline signs _ between figures are not significant Example 8 3_1111 or 84377 decimal 255 8 34_1111 or 84340 decimal 224 Base 2 literals function as the input of whole number values in the dual system The base must be denoted by the prefix 0 91kg The values may not be preceded by signs Single underline signs _ between figures are not significant Example 2 1111_1111 or 2 11111111 decimal 255 2 1110 1111 or 2 11100000 decimal 224 Connections between outputs and inputs of FFBs of data type BOOL A data element which is made up from one or more bits BOOL stands for the data type Boolean The length of the data elements is 1 bit in the memory contained in 1 byte The range of values for variables of this type is 0 FALSE and 1 TRUE 043505766 4 2006 xxxiii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Bridge A bridge serves to connect networks It enables communication between nodes on the two networks Each network has its own token rotation sequence the token is not deployed via bridges
33. programming application which establishes a vertical and horizontal grid in which the programming objects are arranged The logic is powered from the left side of the grid and by connecting activated objects the electricity flows from left to right Landscape format means that the page is wider than it is long when looking at the printed text Each basic element in one of the IEC programming languages e g a Step in SFC a Function block item in FBD or the Start value of a variable Collection of software objects which are provided for reuse when programming new projects or even when building new libraries Examples are the Elementary function block types libraries EFB libraries can be subdivided into Groups Literals serve to directly supply values to inputs of FFBs transition conditions etc These values cannot be overwritten by the program logic write protected In this way generic and standardized literals are differentiated Furthermore literals serve to assign a Constant a value or a Variable an Initial value The input appears as Base 2 literal Base 8 literal Base 16 literal Integer literal Real literal or Real literal with exponent Local derived data types are only available in a single Concept project and its local DFBs and are contained in the DFB directory under the project directory 043505766 4 2006 xliii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary
34. 1 Prefix 1 99 Input format Accepts any 8 bit character except reserved delimiters such as CR LF ESC BKSPC DEL Output format Outputs any 8 bit character 86 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Formatting Messages for ASCII READ WRIT Operations Format Octal e g 02 specifies two octal characters speciiaro Field width 1 6 characters Prefix 1 99 Input format Accepts ASCII characters O 7 If the field width is not satisfied the most significant characters are padded with zeros Output format Outputs ASCII characters O 7 If the field width is not satisfied the most significant characters are padded with zeros No overflow indicators Format Binary e g 34 specifies four binary characters Spsetiars Field width 1 16 characters Prefix 1 99 Input format Accepts ASCII characters 0 and 1 If the field width is not satisfied the most significant characters are padded with zeros Output format Outputs ASCII characters O and 1 If the field width is not satisfied the most significant characters are padded with zeros No overflow indicators Format Hexadecimal e g H2 specifies two hex characters Speers Field width 1 4 characters Prefix 1 99 Input format Accepts ASCII characters O 9 and A F If the field width is
35. 2 represents the unsigned 16 bit integer value 135 Exponential notation is particularly useful for very large integers 58 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Mathematical Operations in Equation Networks Mathematical The following table lists the mathematical operations you can include in Operations your equation Type Operator Result Assignment operator Assignment The assignment operator is used to assign a storage place for the results of the equation All equations will use the assignment operator The format is ADDRESS EXPRESSION Where ADDRESS is a valid register address and EXPRESSION is a valid value or expression assigned to the address Unary operator Negation The result is 1 Unary means single so unary operators are times the value used on only one value The unary operatoris Ones complement This works placed just before the value or expression to on the binary representation which it is applied For example 30002 returns of a value all 1s are changed 1 times the number stored at address 30002 to Os and vice versa Exponentiation operator A Exponentiation Takes values to a specified power 40001 3 returns the integer value stored at 40001 taken to the third power Arithmetic operator Multiplication These require two values one before and
36. 3 prm Beeps bes 3 TA Fae fee NE 832 Representation PCFL KPID Comprehensive ISA Non Interacting Proportional Integral Derivative 0 0 a 833 Parameter Description 0 000 cee ee eee 834 Chapter 129 PCFL LIMIT Limiter for the Pv Lss 837 Short Description s i raara 0000 eee ees 838 Representation PCFL LIMIT Limiter for the P v 839 Parameter Description lille 840 Chapter 130 PCFL LIMV Velocity Limiter for Changes in the Pv 841 Short Description nes 842 Representation PCFL LIMV Velocity Limiter for Changes in the P v 843 Parameter Description liliis ee 844 Chapter 131 PCFL LKUP Look up Table 845 Short Description 0 nee 846 Representation PCFL LKUP Look up Table 847 Parameter Description lille 848 Chapter 132 PCFL LLAG First order Lead Lag Filter 851 Shot Descriptio PP 852 Representation PCFL LLAG First Order Lead Lag Filter 853 Parameter Description lille ee 854 Chapter 133 PCFL MODE Put Input in Auto or Manual Mode 855 Short Description nee 856 Representation PCFL MODE Put Input in Auto or Manual Mode 857 Parameter Description saa a ered eee PAA SEES RT E n cR ERE RU d 858 Xix This document provided by Barr Thorp Electric Co Inc 800 473 9123 www
37. 4x 7 are set aside in the configuration to store TOD information The block of registers is implemented as follows For example if you configured register 40500 for your TOD clock set the bits appropriately as shown above then read the clock values at 9 25 30 on Tuesday July 16 1991 the register values displayed in decimal format would read Register Definition 400500 0110000000000000 400501 3 decimal 400502 7 decimal 400503 16 decimal 400504 91 decimal 400505 9 decimal 400506 25 decimal 400507 30 decimal 043505766 4 2006 23 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC Data Type Format Default Setting Notes and Exceptions of coils Even multiple of 16 16 of discrete inputs Even multiple of 16 16 of register outputs 01 of register inputs 01 of I O drops Up to 32 depending 01 Used only when I O is on PLC type configured in drops of I O modules Up to 1024 00 Not displayed by editor depending on the used by system to cal PLC type culate I O map words of logic segments Generally equal to 00 Add one additional seg the of drops ment for subroutines of I O channels Even number from 02 Used only when I O is 02 to 32 configured in channels Memory Size PLC dependent PLC dependent Modbus
38. 4x registers Data Type Variable Type Words Consumed Registers Consumed Boolean Ox or 1x One N A Unsigned 16 bit variable 3x or 4x One One Signed 16 bit variable 3x or 4x One One Unsigned long 32 bit 3x or 4x One Two variable Signed long 32 bit variable 3x or 4x One Two Floating point variable 3x or 4x One Two Note When contiguous 3x or 4x registers are used for 32 bit long integers the value still consumes only one word in the equation network Note When 3x or 4x registers are used for a floating point number the value requires one word for complete definition 56 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Equation Networks Entering Variable When entering a Ox or 1x references as a discrete variable in an equation network Data in an the reference is assumed to be boolean and you do not need to append the suffix Equation B to the reference Thus the entires 000010 and 000010B are equivalent Network No other suffixes are legal with a Ox or 1x reference When you enter a 3x or 4x register in an equation network the following rules apply If you enter a register then without a suffix it is assumed to represent a signed 16 bit integer variable You do not need to append the suffix S to the reference Thus the entries 400023 and 4000238 are equivalent w
39. 9999 a 0 value is returned Max 999 16 bit Max 9999 24 bit Max 65535 PLC See availability list above Bottom output Ox None ON value 2 0 220 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIV Divide Example Quotient of The state of the middle input indicates whether the remainder will be expressed as Instruction DIV a decimal or as a fraction For example if value 1 8 and value 2 3 the decimal remainder middle input ON is 6666 the fractional remainder middle input OFF is 2 043505766 4 2006 221 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIV Divide 222 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DLOG Data Logging for PCMCIA Read Write Support 37 At a Glance Introduction This chapter describes the instruction DLOG What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 224 Representation DLOG 225 Parameter Description 226 Run Time Error Handling 228 043505766 4 2006 223 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DLOG Data Logging for PCMCIA Read Write Support Short Description Function Description Note This instruction is only available with the PLC fam
40. BYTE BYTE stands for the data type Bit sequence 8 The input appears as Base 2 literal Base 8 literal or Base 1 16 literal The length of the data element is 8 bit A numerical range of values cannot be assigned to this data type C Cache The cache is a temporary memory for cut or copied objects These objects can be inserted into sections The old content in the cache is overwritten for each new Cut or Copy Call up The operation by which the execution of an operation is initiated Coil A coil is a LD element which transfers without alteration the status of the horizontal Compact format 4 1 Connection Constants Contact link on the left side to the horizontal link on the right side In this way the status is saved in the associated Variable direct address The first figure the Reference is separated from the following address with a colon where the leading zero are not entered in the address A check or flow of data connection between graphic objects e g steps in the SFC editor Function blocks in the FBD editor within a section is graphically shown as a line Constants are Unlocated variables which are assigned a value that cannot be altered from the program logic write protected A contact is a LD element which transfers a horizontal connection status onto the right side This status is from the Boolean AND operation of the horizontal connection status on the left side with the status of the associat
41. Content Content Comments Numeric Meaning 400100 Scaled PV mm PID2 writes this 400101 2000 Scaled SP mm Set to 2000 mm half full initially 400102 0000 Loop output O PID2 writes this keep it set to O to be safe 4095 400103 3500 Alarm High Set If the level rises above 3500 mm coil 000102 Point mm goes ON 400104 1000 Alarm Low Set If the level drops below 1000 mm coil 000103 Point mm goes ON 400105 0100 PB 36 The actual value depends on the process dynamics 043505766 4 2006 81 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Closed Loop Control Analog Values Register Content Content Comments Numeric Meaning 400106 0500 Integral constant The actual value depends on the process 5 00 repeats dynamics min 400107 0000 Rate time Setting this to O turns off the derivative mode constant per min 400108 0000 Bias 0 4095 This is set to O since we have an integral term 400109 4095 High windup limit Normally set to the maximum 0 4095 400110 0000 Low windup limit Normally set to the minimum 0 4095 400111 4000 High engineering The scaled value of the process variable when range mm the raw input is at 4095 400112 0000 Low engineering The scaled value of the process variable when range mm the raw input is at O 400113 Raw analog A copy of the input from the analog input module mea
42. D E SINE F where A B C D E and F are either constants or registers Note This equation was the only ladder logic loaded to the Quantum PLCs for the benchmark tests The graph below shows the scan times for the 3 PLCs Notice that EMTH performance on the CPU113 and CPU213 is identical this is because EMTH does not utilize the math coprocessor available on the CPU213 Equation network performance which does not use a math coprocessor when it is available improves by 1596 in the CPU213 over the CPU113 E No Logic E EMTH Logic Equation Network 0 CPU1130x CPU21304 CPU42402 Note The equation network approach provides a more accurate result than the interpolated math implemented in EMTH operations Note Equation network operations yield even better performance versus EMTH operations as the equations become more complex 043505766 4 2006 69 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks 70 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Closed Loop Control Analog Values At a Glance Introduction What s in this Chapter In this chapter you will find general information about configuring closed loop control and using analog values This chapter contains the following topics
43. Differences in PLCs without a Math Coprocessor 68 Benchmark Performance 69 043505766 4 2006 51 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Equation Network Structure Overview An equation network provides an easy way to program complex math functions with values stored in register locations Equations in an equation network are presented in a regular left to right format technically known as infix notation You program equation networks and set its enable contact and output coil s in the Equation Network Editor Equation networks were introduced in Quantum Rev 2 controllers not all controllers support equation networks The easiest way to see if your controller supports equation networks is by trying to create a new one if your controller doesn t support it the equation network option on the right click Insert menu won t be available Note Controllers do not allow blank equation networks Since ProWORX 32 allows blank equation networks please note that they will not be saved to the controller Creating an Equation Network Step Action 1 In the Network Navigator panel click the network where you want to insert the equation network 2 Right click in the logic editor and click Insert Equation Network An equation network occupies a whole network regardless of the contents of the equatio
44. Electric Co Inc 800 473 9123 www barr thorp com DIOH Distributed I O Health Short Description Function The DIOH instruction lets you retrieve health data from a specified group of drops Description on the distributed I O network It accesses the DIO health status table where health data for modules in up to 189 distributed drops is stored 208 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIOH Distributed I O Health Representation DIOH Distributed I O Health Symbol Representation of the instruction CONTROL INPUT DIO Health Table Number of Drops 1 64 r ACTIVE source destination ERROR DIOH 1 64 043505766 4 2006 209 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIOH Distributed I O Health Parameter Description of the instruction s parameters D ription SEDIBUS Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates the retrieval of the specified status words from the DIO health table into the destination table source top node INT UINT The source value entered in the top node is a four digit constant in the form xxyy where e xxis a decimal value in the range 00 16 indicating the slot number in which the relevant DIO processor resides The value 00 can always be u
45. IE Interrupt Enable 0 00 624 Chapter 98 IMIO Immediate I O lllllless 625 Short Description IMIO Immediate I O 0 000002 eee eee 626 Representation IMIO Immediate I O 0c eee eee 627 Parameter Description IMIO Immediate I O 2 2 0 0 0 ce eee 628 Run Time Error Handling IMIO Immediate l O a 630 Chapter 99 IMOD Interrupt Module Instruction 631 Short Description IMOD Interrupt Module lisse 632 Representation IMOD Interrupt Module liliis ellen 633 Parameter Description IMOD Interrupt Module 635 Chapter 100 ITMR Interrupt Timer 0000 ee eee eee eee 639 Short Description ITMR Interval Timer Interrupt 640 Representation ITMR Interval Timer Interrupt 0000 641 Parameter Description ITMR Interval Timer Interrupt 643 XV This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 101 ITOF Integer to Floating Point Short Description saa is exte YG oe ck Po ence a Rx RD EUR Ks Representation ITOF integer to Floating Point Conversion Chapter 102 JSR Jump to Subroutine llllu ss Short Description es Representation JSR Jump to Subroutine 2 2022 Chapter 103 LAB Label for a Subr
46. IMPLIED REGISTER COUNT LENGTH 1 result count o IMPLIED REGISTER COUNT 0 CKSM SELECT 2 CKSM Length 1 255 registers length Parameter Description of the instruction s parameters Basenpuon Parameters State RAM Data Type Meaning Reference Top input Ox 1x None Initiates checksum calculation of source table For expanded and detailed information please see p 166 Middle input Ox 1x None CKSM select 1 For expanded and detailed information please see p 166 Bottom input Ox 1x None CKSM select 2 For expanded and detailed information please see p 166 source 4x INT UINT First holding register in the source table The top node checksum calculation is performed on the registers in this table result count 4x INT UINT First of two contiguous registers middle node For expanded and detailed information please see p 166 length INT Number of 4x registers in the source table bottom node range 1 255 Top output Ox None ON Checksum calculation successful Middle output Ox None ON implied register count gt length or implied register count 0 043505766 4 2006 165 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CKSM Check Sum Parameter Description Inputs The states of the inputs indicate the type of checksum calculation to be performed CKSM Calculation Top Input Middle Input Bottom Input Straight Check ON
47. Inc 800 473 9123 www barr thorp com Closed Loop Control Analog Values The process simulator is comprised of two LLAG functions that act as a filter and input to a DELAY queue that is also a PCFL function block This arrangement is the equivalent of a second order process with dead time The solution intervals for the LLAG filters do not affect the process dynamics and were chosen to give fast updates The solution interval for the DELAY queue is set at 1000 ms with a delay of 5 intervals i e 5 s The LLAG filters each have lead terms of 4 s and lag terms of 10 s The gain for each is 1 0 In process control terms the transfer function can be expressed as 5S 48 1 48 De SPS 0S DIOS 1 The AOUT function is used only to convert the simulated process output control value into a range of 0 4 095 which simulates a field device This integer signal is used as the process input in the first network PID Parameters The PID controller is tuned to control this process at 20 0 using the Ziegler Nichols tuning method The resulting controller gain is 2 16 equivalent to a proportional band of 46 3 The integral time is set at 12 5 s repeat 4 8 repeats min The derivative time is initially 3 s then reduced to 0 3 s to de emphasize the derivative effect An AOUT function is used after the PID It conditions the PID control output by scaling the signal back to an integer for use as the control value The enti
48. KAKA tende au Ta KANA ened 987 Short Description es 988 Representation SRCH Search 00 eee 989 Parameter DeSCrPUON seners s rame eR sha bees E erus ena ee 991 STAT Status pan mh seat U PP texas cots 993 Short Description es 994 Representation STAT Status 2 0 2 0 lese 995 Parameter Description ess 996 Description of the Status Table 000 eee 997 Controller Status Words 1 11 for Quantum and Momentum 1001 O Module Health Status Words 12 20 for Momentum 1006 O Module Health Status Words 12 171 for Quantum 1008 Communication Status Words 172 277 for Quantum 1010 Controller Status Words 1 11 for TSX Compact and Atrium 1016 O Module Health Status Words 12 15 for TSX Compact 1019 Global Health and Communications Retry Status Words 182 184 for TSX Compact 0A aa 1020 xxii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 160 SU16 Subtract 16 Bit LLlll 1021 Short Description 2 3 ek eee px Wan bie Ra Exo URL 1022 Representation SU16 16 bit Subtraction 4 1023 Chapter 161 SUB Subtraction 0 000 eee 1025 Short Description isses hh hh 1026 Representation SUB Subtraction 00 cc ee eee 1027 Chapter 162 SWAP VME Bit Swap
49. Mode Instruction block sets the current count e Set Mode User sets the counter timer 043505766 4 2006 199 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Counter Timer and Interrupt Function 200 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DCTR Down Counter 33 At a Glance Introduction This chapter describes the instruction DCTR What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 204 Representation DCTR Down Counter 205 043505766 4 2006 203 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DCTR Down Counter Short Description Function The DCTR instruction counts control input transitions from OFF to ON down from a Description counter preset value to zero 204 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DCTR Down Counter Representation DCTR Down Counter Symbol Representation of the instruction CONTROL OUTPUT CONDITION Preset Vall pui DCTR count zero Max 999 16 bit PLC poses Max 9999 24 bit PLC Max 65535 PLC ENABLE RESET 1 perg OUTPUT CONDITION count zero count Available on the following e E685 785 PLCs e L
50. OFF ON Binary Addition Check ON ON ON CRC 16 ON ON OFF LRC ON OFF OFF Result Count The 4x register entered in the middle node is the first of two contiguous 4x registers Middle Node Register Content Displayed Stores the result of the checksum calculation First implied Posts a value that specifies the number of registers selected from the source table as input to the calculation The value posted in the implied register must be lt length of source table 166 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CMPR Compare Register 26 At a Glance Introduction This chapter describes the instruction CMPR What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 168 Representation CMPR Logical Compare 169 Parameter Description 170 043505766 4 2006 167 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CMPR Compare Register Short Description Function The CMPR instruction compares the bit pattern in matrix a against the bit pattern in Description matrix b for miscompares In a single scan the two matrices are compared bit position by bit position until a miscompare is found or the end of the matrices is reached without miscompares 168 043505766 4 2006 This document provided by Barr Thorp E
51. Optional method for setting up a Quantum hot 3 standby back 3 CALL Supports 984 Coprocessor option module applications 3 MBUS PEER For initiating message transactions on a 3 Modbus Il network ESI Optional instruction in Quantum PLCs that supports the 3 140 ESI 062 10 Quantum ASCII module FNxx A three node template for creating custom loadable 3 instructions via Assembly or C source code DRUM ICMP Supports sequence control application logic in some 3 PLC models that do not have the built in SCIF instruction MATH Support some square root logarithm and double 3 DMATH precision math functions in PLCs that cannot support the Enhanced Math library EARS Supports an event alarm recording system by tracking 3 events alarms and reporting time stamped messages EUCA Performs an engineering unit conversion algorithm 3 HLTH Detects changes in the I O system and reports 3 problems on an exception only basis 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview 14 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Memory Allocation in a PLC At a Glance Overview This chapter discusses memory allocation in a PLC What s in this This chapter contains the following topics 2 Chapter Topic Page User Memory 16 State RAM Val
52. Rung 1 Hi Byte node state Lo Byte node type opcode from node database 4x 07 Rung 1 Contact number 1 based 4x 08 Rung 2 Refer to 4x 06 4x 09 Rung 2 Refer to 4x 07 4x 10 Rung 3 Refer to 4x 06 4x 11 Rung 3 Refer to 4x 07 4x 12 Rung 4 Refer to 4x 06 4x 13 Rung 4 Refer to 4x 07 4x 14 Rung 5 Refer to 4x 06 4x 15 Rung 5 Refer to 4x 07 4x 16 Rung 6 Refer to 4x 06 4x 17 Rung 6 Refer to 4x 07 4x 18 Rung 7 Refer to 4x 06 4x 19 Rung 7 Refer to 4x 07 154 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CANT Interpret Coils Contacts Timers Counters and the SUB Programming Each network can only contain one COIL and one CANT block which must be located in Column 10 Row 5 Column 9 of the BOTTOM rung contains the Power Input for the triggers Action Contacts to the CANT block which will provide more space for your ladder logic programming Note This is not at the top of the block as it usually is with DX blocks In any of the available row positions 5 6 or 7 you may have up to 3 triggers which must be a transitional type of either P or N The CANT block node number will default to 22 hexadecimal and not be changed Ladder Ladder Node Setup Node Setup Col 10 e e pe Ten unique setup registers start Row 6 JP Common output register JP block
53. Runtime Error Handling lile 330 ix This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 55 Chapter 56 Chapter 57 Chapter 58 Chapter 59 Chapter 60 Chapter 61 Chapter 62 EMTH CNVIF Integer to Floating Point Conversion 331 SHOM DESETIPLON ss xu eer es xr aeree pa ya on Ee nero ex EU RU XX 332 Representation EMTH CNVIF Integer to Floating Point Conversion 333 Parameter Description eee 335 Runtime Error Handling 0 00 e ee eee ee 336 EMTH CNVRD Floating Point Conversion of Radians to DegreesS 00 eee eee eee eee 337 Short Description 2 0 0 0 eee ee 338 Representation EMTH CNVRD Conversion of Radians to Degrees 339 Parameter Description 0 000 cc ee 341 EMTH COS Floating Point Cosine of an Angle in Radians eee ee eee 343 Short Description 20 00 cee eee 344 Representation EMTH COS Cosine of an Angle in Radians 345 Parameter Description 0 0 00 0c eee 346 EMTH DIVDP Double Precision Division 347 Shon Description an a sesasi Peor erm Rr oc e OR RETE RE ae Yee aes na 348 Representation EMTH DIVDP Double Precision Math Division 349 Parameter Description ell 351 Runtime Error Handling sise neiise daa at hak eee 352 EMTH DIVFI Floating Point Divided by Integer 353 Short De
54. Series PLCs value 1 value 2 SUCCESSFUL COMPLETION QUOTIENT gt 9999 Max 999 16 bit Max 9999 24 bit Max 65535 PLC DIV result remainder MIDDLE VALUE 0 043505766 4 2006 219 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIV Divide Parameter Description of the instruction s parameters Description Parameters State RAM Data Type Meaning Reference Top input 0x 1x None ON value 1 divided by value 2 Middle input Ox 1x None ON decimal remainder OFF z fraction remainder value 1 3x 4x INT UINT Dividend can be displayed explicitly as an top node integer range 1 9999 or stored in two contiguous registers displayed for high order half implied for low order half Max 999 16 bit Max 9999 24 bit Max 65535 PLC See availability list above value 2 3x 4x INT UINT Divisor can be displayed explicitly as an integer middle node range 1 9999 or stored in a register Max 999 16 bit Max 9999 24 bit Max 65535 PLC See availability list above result 4x INT UINT First of two contiguous holding registers remainder displayed result of division bottom node implied remainder either a decimal or a fraction depending on the state of middle input Top output Ox None ON division successful Middle output Ox None ON overflow if result
55. Simulation Representation 1X3X Input Simulation Symbol Parameter Description Representation of the instruction CONTROL INPUT ACTIVE destination table Source table Table length 1 100 Description of the instruction s parameters Parameters State RAM Reference Data Type Meaning Top input Ox 1x None destination table 1x 3x INT top node source table 4x INT Contains source to be middle node moved to destination length INT Length NNN if 3X bottom node Length 16 if 4x Top output Ox None Passes power when top input receives power 043505766 4 2006 107 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 1X3X Input Simulation 108 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AD16 Ad 16 Bit 14 At a Glance Introduction This chapter describes the instruction AD16 What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 110 Representation AD16 16 bit Addition 111 043505766 4 2006 109 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AD16 Ad 16 Bit Short Description Function The AD16 instruction performs signed or unsigned 16 bit addition on value 1 its top Description node and value 2 its middle
56. These listed keywords cannot be used for any other purpose i e not as variable names section names item names etc xlii 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Ladder Diagram LD Ladder Logic 984 LL Landscape format Language element Library Literals Local derived data types Ladder Diagram is a graphic programming language according to IEC1131 which optically orientates itself to the rung of a relay ladder diagram In the terms Ladder Logic and Ladder Diagram the word Ladder refers to execution In contrast to a diagram a ladder logic is used by engineers to draw up a circuit with assistance from electrical symbols which should chart the cycle of events and not the existing wires which connect the parts together A usual user interface for controlling the action by automated devices permits ladder logic interfaces so that when implementing a control system engineers do not have to learn any new programming languages with which they are not conversant The structure of the actual ladder logic enables electrical elements to be linked in a way that generates a control output which is dependant upon a configured flow of power through the electrical objects used which displays the previously demanded condition of a physical electric appliance In simple form the user interface is one of the video displays used by the PLC
57. Top output Ox None ON operation successful Middle Ox None ON an operand out of range output Bottom Ox None On operand 2 is O output 236 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DRUM DRUM Sequencer 39 At a Glance Introduction This chapter describes the instruction DRUM What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 238 Representation DRUM 239 Parameter Description 241 043505766 4 2006 237 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DRUM DRUM Sequencer Short Description Function Description Note This instruction is only available if you have unpacked and installed the DX Loadables For further information see p 101 The DRUM instruction operates on a table of 4x registers containing data representing each step in a sequence The number of registers associated with this step data table depends on the number of steps required in the sequence You can pre allocate registers to store data for each step in the sequence thereby allowing you to add future sequencer steps without having to modify application logic DRUM incorporates an output mask that allows you to selectively mask bits in the register data before writing it to coils This is particularly useful when all physical sequencer
58. WRIT Operations Format Specifiers Format Specifier Format Specifier Format Specifier Format Specifier x ASCII return CR and linefeed LF Field width None defaults to 1 Prefix None defaults to 1 Input format Outputs CR LF no ASCII characters accepted Output format Outputs CR LF Enclosure for octal control code Field width Three digits enclosed in double quotes Prefix None Input format Accepts three octal control characters Output format Outputs three octal control characters Enclosure for ASCII text characters Field width 1 128 characters Prefix None defaults to 1 Input format Inputs number of upper and or lower case printable characters specified by the field width Output format Outputs number of upper and or lower case printable characters specified by the field width Space indicator e g 14x indicates 14 spaces left open from the point where the specifier occurs Field width None defaults to 1 Prefix 1 99 spaces Input format Inputs specified number of spaces Output format Outputs specified number of spaces 043505766 4 2006 85 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Formatting Messages for ASCII READ WRIT Operations
59. a directional Link U UDEFB User defined elementary functions function blocks Functions or Function blocks which were created in the programming language C and are available in Concept Libraries UDINT UDINT stands for the data type unsigned double integer The input appears as Integer literal Base 2 literal Base 8 literal or Base 16 literal The length of the data element is 32 bit The value range for variables of this type stretches from 0 to 2exp 32 1 UINT UINT stands for the data type unsigned integer The input appears as Integer literal Base 2 literal Base 8 literal or Base 16 literal The length of the data element is 16 bit The value range for variables of this type stretches from O to 2exp16 1 Unlocated Unlocated variables are not assigned any state RAM addresses They therefore do variable not occupy any state RAM addresses The value of these variables is saved in the system and can be altered with the reference data editor These variables are only addressed by symbolic names Signals requiring no peripheral access e g intermediate results system tags etc should primarily be declared as unlocated variables 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Variables Vertical format Variables function as a data exchange within sections between several sections and between the Program and the PLC Variables consist of at lea
60. are found Bottom output 0x None Echoes state of top input 043505766 4 2006 215 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DISA Disabled Discrete Monitor 216 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIV Divide 36 At a Glance Introduction This chapter describes the instruction DIV What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 218 Representation DIV Single Precision Division 219 Example 221 043505766 4 2006 217 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIV Divide Short Description Function The DIV instruction divides unsigned value 1 its top node by unsigned value 2 its Description middle node and posts the quotient and remainder in two contiguous holding registers in the bottom node 218 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIV Divide Representation DIV Single Precision Division Symbol Representation of the instruction CONTROL INPUT Dividend Max 999 16 bit Max 9999 24 bit Max 65535 PLC DEC REMAIN Divisor Max 999 16 bit Max 9999 24 bit Max 65535 PLC Available on the following e E685 785 PLCs e L785 PLCs e Quantum
61. argument limits 65 COS 64 COSD 64 entering in equation network 64 equation network 64 EXP 64 FIX 64 FLOAT 64 LN 64 LOG 64 SIN 64 SIND 64 SQRT 64 TAN 64 TAND 64 mathematical operation arithmetic operator 59 assignment operator 59 bitwise operator 59 conditional operator 59 equation network 59 exponentiation operator 59 parentheses 59 relational operator 59 unary operator 59 043505766 4 2006 Ixiii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index Matrix AND 117 BROT 139 CMPR 167 COMP 179 MBIT 677 NBIT 755 NCBT 759 763 OR 775 RBIT 933 SBIT 965 SENS 975 XOR 1145 MBIT 677 MBUS 681 MBUS Transaction 681 Miscellaneous CKSM 163 DLOG 223 EMTH 259 EMTH ADDDP 265 EMTH ADDFP 271 EMTH ADDIF 275 EMTH ANLOG 279 EMTH ARCOS 285 343 EMTH ARSIN 291 EMTH ARTAN 295 EMTH CHSIN 301 EMTH CMPFP 307 EMTH CMPIF 313 EMTH CNVDR 319 EMTH CNVFI 325 EMTH CNVIF 331 EMTH CNVRD 337 EMTH DIVDP 347 EMTH DIVFI 353 EMTH DIVFP 357 EMTH DIVIF 361 EMTH ERLOG 365 EMTH EXP 371 EMTH LNFP 377 EMTH LOG 383 EMTH LOGFP 389 EMTH MULDP 395 EMTH MULFP 401 EMTH MULIF 405 EMTH PI 411 EMTH POW 417 EMTH SINE 423 EMTH SQRFP 429 EMTH SQRT 435 EMTH SQRTP 441 EMTH SUBDP 447 EMTH SUBFI 453 EMTH SUBFP 457 EMTH SUBIF 461 EMTH TAN 465 LOAD 657 MSTR 701 SAVE 961 SCIF 969 XMRD 1133
62. by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com xxvi This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Safety Information AA NOTICE PLEASE NOTE Read these instructions carefully and look at the equipment to become familiar with the device before trying to install operate or maintain it The following special messages may appear throughout this documentation or on the equipment to warn of potential hazards or to call attention to information that clarifies or simplifies a procedure The addition of this symbol to a Danger or Warning safety label indicates A that an electrical hazard exists which will result in personal injury if the instructions are not followed This is the safety alert symbol It is used to alert you to potential personal injury hazards Obey all safety messages that follow this symbol to avoid possible injury or death A DANGER DANGER indicates an imminently hazardous situation which if not avoided will result in death or serious injury A WARNING WARNING indicates a potentially hazardous situation which if not avoided can result in death serious injury or equipment damage A CAUTION CAUTION indicates a potentially hazardous situation which if not avoided can result in injury or equipment damage Electrical equipment should be installed operated serviced and maintained only by qualified pe
63. case If the value of EN is 1 when the FFB is called up the algorithms defined by the FFB are executed After the error free execution of the algorithms the ENO value is automatically set to 1 If an error occurs during the execution of the algorithm ENO is automatically set to 0 The output behavior of the FFB depends whether the FFBs are called up without EN ENO or with EN 1 If the EN ENO display is enabled the EN input must be active Otherwise the FFB is not executed The projection of EN and ENO is enabled disabled in the block properties dialog box The dialog box is called up via the menu commands Objects Properties or via a double click on the FFB When processing a FFB or a Step an error is detected e g unauthorized input value or a time error an error message appears which can be viewed with the menu command Online Event display With FFBs the ENO output is set to O The process by which a value for a Function or for the outputs of a Function block during the Program execution is transmitted Expressions consist of operators and operands 043505766 4 2006 xxxvii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary FFB functions function blocks Field variables FIR filter Formal parameters Function FUNC Function block Collective term for EFB elementary functions function blocks and DFB derived function blocks Var
64. decimal point The values may be preceded by the signs Single underline signs _ between figures are not significant Example 12 0 0 0 40 456 3 14159 26 Real literal with Real literals with exponent function as the input of real values in the decimal system exponent Real literals with exponent are denoted by the input of the decimal point The exponent sets the key potency by which the preceding number is multiplied to get to the value to be displayed The basis may be preceded by a negative sign The exponent may be preceded by a positive or negative sign Single underline signs between figures are not significant Only between numbers not before or after the decimal poiont and not before or after E E or E Example 1 34E 12 or 1 34e 12 1 0E 6 or 1 0e 6 1 234E6 or 1 234e6 Reference Each direct address is a reference which starts with an ID specifying whether it concerns an input or an output and whether it concerns a bit or a word References which start with the code 6 display the register in the extended memory of the state RAM Ox area Discrete outputs 1x area Input bits 3x area Input words 4x area Output bits Marker words 6x area Register in the extended memory xlviii 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Register in the extended memory 6x reference RIO Remote I O RP PR
65. difference OPERAND 1 OPERAND 2 232 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math Parameter Description Subtraction Description of the instruction s parameters for the Subtraction operation Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON subtracts operand 2 from operand 1 and posts difference in designated registers operand 1 top node 4x INT UINT The first of two contiguous 4xxxx registers is entered in the top node The second 4xxxx register is implied Operand 1 is stored here Each register holds a value in the range 0000 through 99989 for a combined double precision value in the range 0 through 99 999 999 The high order half of operand 1 is stored in the displayed register and the low order half is stored in the implied register operand 2 difference middle node 4x INT UINT The first of six contiguous 4xxxx registers is entered in the middle node The remaining five registers are implied e The displayed register and the first implied register store the high order and low order halves of operand 2 respectively for a combined double precision value in the range O through 99 999 999 e The value stored in the second implied register indicates whether an overflow condition exists a value of 1 overflow e The third and
66. eighty Ox references and five words for eighty 1x references you have used words 0001 0010 in state RAM Words 0011 0016 are then left empty so that the first 3x reference begins at word 0017 20 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC Minimum A minimum configuration consists of the following allocations in state RAM Ha Reference Type Minimum Words Minimum Words Minimum Bits Minimum Bits for Modsoft for P190 for Modsoft for discretes Discrete out OX 3 1 48 16 Discrete in 1x 1 1 16 16 Register in 3x 1 1 Register out 4x 1 1 History and For each word allocated to discrete references two additional words are allocated Disable Bits for in the history disable tables These tables follow the state RAM table on page F in Discrete system memory They are generated from the bottom up in the following manner References Word 0001 Output History Bits Input DISABLE Bits marisa 043505766 4 2006 21 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC The Configuration Table Overview Assigning a Battery Coil Assigning Timer Register The configuration table is one of the key pieces of overhead contained in system memory It comprises 128 consecutive words and provides a means of accessing infor
67. hold a number of 10 ms clock cycles TOD Clock A 4x register the first of NONE eight reserved for time of day values Battery Coil A Ox reference reflecting 00000 Oncea battery coil is placed the status of battery backup system 00000 in a Configuration Table it cannot be removed Loadable Instructions Install Loadable PROCEED or CANCEL Various controllers support different kinds of loadable instruction sets Make sure that your loadables and controller are compatible Delete Loadable s DELETE ALL DELETE ONE or CANCEL Various controllers support different kinds of loadable instruction sets Make sure that your loadables and controller are compatible Writing Configurator Data to System Memory Write data as specified PROCEED or CANCEL NONE PROCEED will overwrite any previous Table data 043505766 4 2006 25 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC The I O Map Table Overview Determining the Size of the I O Map Table Writing Data to the I O Map Just as a PLC needs to be physically linked to I O modules in order to become a working control system the references in user logic need to be linked in the system architecture to the signals received from the input modules and sent to the output modules The I O map table provides that link The
68. in smaller scale PLCs e g the Micro PLCs a battery is available as an option In the case of the Micro PLCs where the battery is an option an area in its Flash memory is available for backing up user logic Flash is a standard feature on the Micros 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC State RAM Values Overview Referencing System for Inputs and Outputs As part of your PLC s configuration process you specify a certain number of discrete outputs or coils discrete inputs input registers and output holding registers available for application control These inputs and outputs are placed in a table of 16 bit words in an area of system memory called state RAM The system uses a reference numbering system to identify the various types of inputs and outputs Each reference number has a leading digit that identifies its data type discrete input discrete output register input register output followed by a string of digits indicating its unique location in state RAM Reference Indicator Reference Type Meaning Ox discrete output or coil Can be used to drive a real output through an output module or to set one or more internal coils in state RAM The state of a coil can be used to drive multiple contacts 1x discrete input Can be used to drive contacts in the logic program Its ON OFF
69. in the implied register 234 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math Parameters State RAM Data Type Meaning Reference operand 2 4x INT UINT The first of six contiguous 4xxxx registers is product entered in the middle middle node node The remaining five registers are implied e The displayed register and the first implied register store the high order and low order halves of operand 2 respectively for a combined double precision value in the range 0 through 99 999 999 e The last four implied registers store the double precision product in the range 0 through 9 999 999 999 999 999 Top output Ox None ON operation successful Middle Ox None ON operand out of range output Symbol Representation of the instruction for the Division operation Division CONTROL INPUT OPERATION SUCCESS operand 1 REMAINDER ERROR operand 2 quotient DIVIDE BY 0 ATTEMPT ED 043505766 4 2006 235 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math Parameter Description of the instruction s parameters for the Division operation Description Division Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON operand 1 divided by operand 2 an
70. in the logic program When the middle input is ON the value in the pointer register is frozen while the BLKT operation continues This causes new data being copied to the destination to overwrite the block data copied on the previous scan When the bottom input is ON the value in the pointer register is reset to zero This causes the BLKT operation to copy source data into the first block of registers in the destination table The 4x register entered in the middle node is the pointer to the destination table The first register in the destination table is the next contiguous register after the pointer e g if the pointer register is 400107 then the first register in the destination table is 400108 Note The destination table is segmented into a series of register blocks each of which is the same length as the source block Therefore the size of the destination table is a multiple of the length of the source block but its overall size is not specifically defined in the instruction If left uncontrolled the destination table could consume all the 4x registers available in the PLC configuration The value stored in the pointer register indicates where in the destination table the source data will begin to be copied This value specifies the block number within the destination table 134 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BMDI Block Mov
71. is to maintain a constant level in the separator The phases must be separated before processing separation is the role of the inlet separator PV 1 If the level controller LC 1 fails to perform its job the inlet separator could fill causing liquids to get into the gas stream this could severely damage devices such as gas compressors 80 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Closed Loop Control Analog Values Ladder Logic The level is controlled by device LC 1 a Quantum controller connected to an analog Diagram input module P 1 is connected to an analog output module We can implement the control loop with the following 984 ladder logic 300001 400102 0 0 SUB SUB 400113 400500 1H 400100 000101 O 400200 009105 PID2 O 000103 30 The first SUB block is used to move the analog input from LT 1 to the PID2 analog input register 40113 The second SUB block is used to move the PID2 output Mv to the I O mapped output I P 1 Coil 00101 is used to change the loop from AUTO to MANUAL mode if desired For AUTO mode it should be ON Register Content Specify the set point in mm for input scaling E U The full input range will be O 4000 mm for O 4095 raw analog Specify the register content of the top node in the PID2 block as follows Register
72. long short signed unsigned number will be truncated A floating point number assignment 2 to a short unsigned number produces a result in the range O 65 535 Overflow is set if the result is 5 65 535 A floating point number assignment to a short signed number produces a result in the range 32 768 32 767 Overflow is set if the result is 5 32 767 or 32 768 A floating point number assignment to a long unsigned number produces a result in the range O 4 294 967 295 Overflow is set if the result is 5 4 294 967 295 A floating point number assignment to a long signed number produces a result in the range 2 147 483 648 2 147 483 647 Overflow is set if the result is gt 2 147 483 647 or 2 147 483 648 043505766 4 2006 67 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Roundoff Differences in PLCs without a Math Coprocessor Overview Equation networks can be executed by Quantum PLCs like the 140 CPU 424 02 and 140 CPU 213 04 which have on board math coprocessors as well as by the 140 CPU 113 02 and 03 PLCs which do not have math coprocessors Quantum PLCs without math coprocessors use a 32 bit processing mechanism within the PLC itself to handle floating point calculations and they can produce results that are less accurate than those produced by the 80 bit math coprocessor Differences in accuracy can be noticed starting in t
73. not satisfied the most significant characters are padded with zeros Output format Outputs ASCII characters O 9 and A F If the field width is not satisfied the most significant characters are padded with zeros No overflow indicators 043505766 4 2006 87 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Formatting Messages for ASCII READ WRIT Operations Special Set up Considerations for Control Monitor Signals Format General To control and monitor the signals used in the messaging communication specify code 1002 in the first register of the control block the register displayed in the top node Via this format you can control the RTS and CTS lines on the port used for messaging Note In this format only the local port can be used for messaging i e a parent PLC cannot monitor or control the signals on a child port Therefore the port number specified in the fifth implied node of the control block must always be 1 The first three registers in the data block the displayed register and the first and second implied registers in the middle node have predetermined content Register Content Displayed Stores the control mask word First implied Stores the control data word Second implied Stores the status word These three data block registers are required for t
74. one Division after the operator These values can be any valid Addition expression For example 4 40003 results in four multiplied by the value stored at address Subtraction 40003 043505766 4 2006 59 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Type Operator Result Bitwise operator amp AND The single bit result of Bitwise operators work on binary base 2 an AND operation is only true representations of values 1 if both bits are set to 1 OR The single bit result of an e Inthe case of AND OR and XOR the o OR operation is true 1 if computer applies the operator to each digit in either bit is set to 1 The result the two values 010 XOR 011 2 XOR 3 in is false 0 only if both bits are decimal numbers results in 001 1 in set to 0 decimal T A XOR Short for Exclusive OR e Inthe case of shifting operators the RN The single bit result of an XOR computer shifts all digits in the binary bois operation is false 0 if both representation of the number the given M bits are the same true 1 number of places to the left or right Digits on f otherwise one side of the number are lost and zeros fill in the blanks on the other side For example lt lt Left Shift The result of for 8 bit numbers 77 2 means 01001101 40001 lt lt 2 is the binary shifted left two digits The binary re
75. reference in the destination middle node matrix i e in the matrix that shows the shifted bit pattern length bottom node Ox INT UINT Matrix length range 1 100 Top output Ox None Echoes state of the top input Middle output Ox None OFF exit bit is O ON exit bit is 1 043505766 4 2006 141 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BROT Bit Rotate Parameter Description Matrix Length The integer value entered in the bottom node specifies the matrix length i e the Bottom Node number of registers or 16 bit words in each of the two matrices The source matrix and destination matrix have the same length The matrix length can range from 1 100 e g a matrix length of 100 indicates 1600 bit locations Result of the The middle output indicates the sense of the bit that exits the source matrix the Shift Middle leftmost or rightmost bit as a result of the shift Output 142 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate Immediate or Deferred DX Function 22 AT A GLANCE Introduction This chapter describes the instruction CALL What s in this This chapter contains the following topics hapter chapte Topic Page Short Description CALL Activate Immediate or Deferred DX Function 144 Representation CALL Activate Immediate DX Func
76. registers following OP2 Registers not used by the chosen math function may be used for other purposes e The Subtract Function uses the outputs to indicate the result of comparison between Operands OP1 and OP2 230 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math Representation DMTH Double Precision Math Addition Subtraction Multiplication and Division Explanation of This section describes the Addition Subtraction Multiplication and Division This Section operations which are the four operations performed by the instruction DMTH Each operations has a Symbol which is a graphical representation of the instruction and a Parameter Description which is a table format representation of the instruction Symbol Representation of the instruction for the Addition operation Addition CONTROL INPUT OPERATION SUCCESSFUL operand 1 ERROR operand 2 and sum Parameter Description of the instruction s parameters for the Addition operation Description Addition Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON adds operands and posts sum in designated registers operand 1 4x INT UINT The first of two contiguous 4xxxx top node registers is entered in the top node The second 4xxxx register is implied Operand 1 is stored here Each register holds a value in the range
77. step name functions as the unique flag of a step in a Program organization unit The step name is automatically generated but can be edited The step name must be unique throughout the whole program organization unit otherwise an Error message appears The automatically generated step name always has the structure S n m S Step n Section number number running m Number of steps in the section number running ST is a text language according to IEC 1131 in which operations e g call up of Function blocks and Functions conditional execution of instructions repetition of instructions etc are displayed through instructions Variables one of which is assigned a Derived data type defined with STRUCT structure A structure is a collection of data elements with generally differing data types Elementary data types and or derived data types In Quantum control devices Concept closes the mounting on the I O population SY MAX I O modules for RIO control via the Quantum PLC with on The SY MAX remote subrack has a remote I O adapter in slot 1 which communicates via a Modicon 5908 R I O system The SY MAX I O modules are performed when highlighting and including in the I O population of the Concept configuration Graphic display of various objects in Windows e g drives user programs and Document windows Template data file Concept EFB TIME Time span literals The template data file is an ASCII data file with a l
78. the address for that coil blank or erase one already typed in That coil will not be included in the equation network Error Coil Messages g Error Message Meaning Invalid operation An internal error generated by the math coprocessor Overflow A value is too large to be represented in its specified data type Underflow A number is too small to be represented in FP format for floating point data only Divide by 0 The variable constant or result of a function directly to the right of a operator has a value of zero Invalid operation Occurs when a boolean value is entered in an argument to a function with boolean data Setting up an An equation network s enable contact when set activates the equation network If Enable Contact an enable contact passes current the equation network will be solved You change settings for the enable contact in the Enable Editor display To select a type for the enable contact select the symbol of the enable contact that corresponds with your chosen type An enable contact can be a normally open contact normally closed contact horizontal short or a horizontal open To select a register address for the enable contact in the Enable Contact address field type the direct address in X Y numeric format or symbolic address for the enable contact coil This field is only available if the enable contact type is a normally open or normally closed contact
79. the data area i e the Bottom Node maximum number of words registers allowed in a transfer to from the PCMCIA flash card The length can range from 0 100 043505766 4 2006 227 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DLOG Data Logging for PCMCIA Read Write Support Run Time Error Handling Error Codes The displayed register of the control block contains the following DLOG errors in Hex code Error Code in Hex Content 1 The count parameter of the control block the DLOG block length during a WRITE operation 01 PCMCIA card operation failed when intially started write read erase PCMCIA card operation failed during execution write read erase 228 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math 38 At a Glance Introduction This chapter describes the four double precision math operations executed by the instruction DMTH The four operations are Addition Subtraction Multiplication and Division What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description DMTH Double Precision Math Addition Subtraction 230 Multiplication and Division Representation DMTH Double Precision Math Addition Subtraction 231 Multiplication and Division 043505766
80. token ring For example if you are interested in retrieving drop status starting at distributed drop 1 on a network being handled by a DIO processor in slot 3 enter 0301 in the top node Length of The integer value entered in the bottom node specifies the length i e the number of Destination 4x registers in the destination table The length is in the range 1 64 Table Bottom Node Note If you specify a length that excedes the number of drops available the instruction will return status information only for the drops available For example if you specify the 63rd drop number yy in the top node register and then request a length of 5 the instruction will give you only two registers the 63rd and 64th drop status words in the destination table 043505766 4 2006 211 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIOH Distributed I O Health 212 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DISA Disabled Discrete Monitor 35 At A Glance Introduction This chapter describes the instruction DISA What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description DISA Disabled Discrete Monitor 214 Representation DISA Disabled Discrete Monitor 215 043505766 4 2006 213 This document provided by Barr Tho
81. value is e 01 if the other PLC is in OFFLINE mode e 10if other PLC is running in primary mode e 11ifother PLC is running in standby mode 15 16 The 2 bit value is e 01 if this PLC is in OFFLINE mode e 10if this PLC is running in primary mode e 11 if this PLC is running in standby mode 162 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CKSM Check Sum 25 At a Glance Introduction This chapter describes the instruction CKSM What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 164 Representation CKSM Checksum 165 Parameter Description 166 043505766 4 2006 163 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CKSM Check Sum Short Description Function Several PLCs that do not support Modbus Plus come with a standard checksum Description CKSM instruction CKSM has the same opcode as the MSTR instruction and is not provided in executive firmware for PLCs that support Modbus Plus 164 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CKSM Check Sum Representation CKSM Checksum Symbol Representation of the instruction CONTROL IN CHECKSUM COMPLETED PUT source CKSM SELECT
82. your ladder logic Functions program With a 16 bit node 11 bits are available as state RAM pointers giving you a total addressing capability of 2048 words The maximum number of configurable registers in most 16 bit machines is 1920 with the balance occupied by up to 128 words 2048 bits of discrete reference disable and history bits An exception is the 984 680 685 PLCs which have an extended registers option that supports 4096 registers in state RAM With a 24 bit node 16 bits are available as state RAM pointers The maximum number of configurable registers in a 24 bit machine is 9999 Opcodes are generally expressed by their hex values Opcode Definition 00 Beginning of a column in a network 01 Beginning of a column in a network 02 Beginning of a column in a network 03 Beginning of a column in a network 04 Start of a network 05 I O exchange End of Logic 06 Null Element 07 Horizontal short 08 N O contact 28 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes Opcode Definition 09 N C contact 0A P T contact 0B N T contact 0C Normal coil OD Memory retentive latched coil OE Constant quantity skip function OF Register quantity skip function 10 Constant value storage 11 Register refe
83. 00 473 9123 43 www barr thorp com Instruction Groups Format This part of the group provides the following instructions Conversion Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium BCD Conversion from binary to yes yes yes yes binary code or binary code to binary FTOI Conversion from floating yes yes yes yes point to integer ITOF Conversion from i yes yes yes yes nteger to floating point 44 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Groups Matrix Instructions Matrix Instructions A matrix is a sequence of data bits formed by consecutive 16 bit words or registers derived from tables DX matrix functions operate on bit patterns within tables Just as with move instructions the minimum table length is 1 and the maximum table length depends on the type of instruction you use and on the size of the CPU 24 bit in your PLC Groups of 16 discretes can also be placed in tables The reference number used is the first discrete in the group and the other 15 are implied The number of the first discrete must be of the first of 16 type 000001 100001 000017 100017 000033 1000353 etc This group provides the following instructions Instruction Meaning Available at PLC family Quantum Com
84. 0000 through 99989 for a combined double precision value in the range 0 through 99 999 999 The high order half of operand 1 is stored in the displayed register and the low order half is stored in the implied register 043505766 4 2006 231 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math Parameters State RAM Reference Data Type Meaning operand 2 4x INT UINT The first of six contiguous 4x registers is and sum entered in the middle node middle The remaining five registers are node implied e The displayed register and the first implied register store the high order and low order halves of operand 2 respectively for a combined double precision value in the range O through 99 999 999 e The value stored in the second implied register indicates whether an overflow condition exists a value of 1 overflow e The third and fourth implied registers store the high order and low order halves of the double precision sum respectively e The fifth implied register is not used in the calculation but must exist in state RAM Top output Ox None ON operation successful Middle Ox None On operand out of range or invalid output Symbol Representation of the instruction for the Subtraction operation Subtraction CONTROL INPUT OPERAND 1 gt OPERAND 2 operand 1 OPERAND 1 OPERAND 2 operand 2
85. 0001U 300003U 300004 300005 300003U 300005 300006 where the sum of the values in registers 300001 and 300003 is ANDed with the logical OR of the values in registers 300002 and 300004 4 400001 300001U lt 300002U 300004U amp 300001U 300003U 300004 300005 This expression is evaluted by ORing the values in registers 300002 and 300004 then ANDing the result with the value in register 300001 and finally adding the value in register 300003 When multiple levels of parenthetical data are nested in an expression the most deeply nested parenthetical data is evaluated first An equation network permits up to 10 nested levels of parentheses in an expression For example the order in which the second expression above is evaluated can be seen more clearly when parentheses are used 300002U gt 300003U amp 300004U 300005U 300006F 300007F 300008 300009 Equation network will echo back to you the expression as you enter it It does not prevent you from entering additional levels of parentheses even when they may not be necessary to make the expression syntactically correct For example in the expression 300004U 300005U 300006U equation network maintains the four nested level of parentheses in the expression even when only one set of parentheses may be needed Note The expression must have an equal and balanced number of open and clo
86. 003UL calculates the cosine of a long 32 bit unsigned integer value stored at address 40003 e 1 35E 4F is the floating point value of 0 000145 given in exponential notation e HEIGHTL is a symbol of the name HEIGHT representing the address of a long 32 bit signed integer e 40001 indicates that the result of the calculation is to be stored in register address 40001 as a 16 bit signed integer GHT L 043505766 4 2006 55 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Variable Data Everything to the right of the assignment operator also constitutes an expression An expression is any part of an equation that can be evaluated to a single value This can be a single constant or register address or a complete mathematical operation For example 35 is an expression as are LOG 10 and 40002U COS 40003UL Complex expressions can contain other expressions within them as in 3 40002U COS 40003UL For the most part any operator or function can be performed on any expression no matter how complex Note It is good programming practice to enclose all expressions in parentheses even when they re not actually needed This makes the equation easier to read and ensures that operations in an equation are solved in the correct order Variable data within an equation network can be in Ox and 1x discrete references and in 3x and
87. 043505766 81 a bra Sch nd of neider Electric Modicon Ladder Logic Block Library User Guide Volume 1 840 USE 101 00 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Table of Contents Part Chapter 1 Chapter 2 Chapter 3 Chapter 4 Safety Information oorr IRR xxvii About the BOOK saaan Naka ERRRRERRRBEIR E E RET xxix General Information 0000 ee eee eee eee 1 Ladder Logic Overview esses 3 Segments and Networks in Ladder Logic eee eee eee 4 How a PLC Solves Ladder Logic 2 42 kaa mas eo RR RR enu E RR ERE ERE 7 Ladder Logic Elements and Instructions naaa 8 Memory Allocation in a PLC 15 User Memory hh he m run 16 slate BAM Values scis RR RERES RE TEPEIRFE REID EESA RR RAYS 18 State PANU SUUCING napa THA EE prar Ee pre RS teu E LPS PERAS DEEP PS 20 The Configuration Table ives ccna cate ae deeded EROR KAG LENA Kh Bleed ace 22 The VO Map Table ii 23 mna dav idee veda Ra ERA ERR RR GG Phe ERR nasa 26 Ladder Logic Opcodes seeds eee ete eens 27 Translating Ladder Logic Elements in the System Memory Database 28 Translating DX Instructions in the System Memory Database 30 Opcode Defaults for Loadables llle 33 ling og r
88. 061 One Second Timer 1057 One Tenth Second Timer 1053 operator combinations equation network 66 operator precedence equation network 62 OR 775 output coil equation network 53 P parentheses entering in equation network 63 equation network 51 nested 63 nested layer 51 using in equation network 63 PCFL 781 PCFL Subfunctions General 73 PCFL AIN 787 PCFL ALARM 793 043505766 4 2006 Ixv This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index PCFL AOUT 799 PCFL AVER 803 PCFL CALC 809 PCFL DELAY 815 PCFL EQN 821 PCFL INTEG 827 PCFL KPID 831 PCFL LIMIT 837 PCFL LIMV 841 PCFL LKUP 845 PCFL LLAG 851 PCFL MODE 855 PCFL ONOFF 859 PCFL PI 865 PCFL PID 871 PCFL RAMP 877 PCFL RATE 883 PCFL RATIO 887 PCFL RMPLN 893 PCFL SEL 897 PCFL Subfunction PCFL AIN 787 PCFL ALARM 793 PCFL AOUT 799 PCFL AVER 803 PCFL CALC 809 PCFL DELAY 815 PCFL EQN 821 PCFL INTEG 827 PCFL KPID 831 PCFL LIMIT 837 PCFL LIMV 841 PCFL LKUP 845 PCFL LLAG 851 PCFL MODE 855 PCFL ONOFF 859 PCFL PI 865 PCFL PID 871 PCFL RAMP 877 PCFL RATE 883 PCFL RATIO 887 PCFL RMPLN 893 PCFL SEL 897 PCFL TOTAL 903 PCFL TOTAL 903 PEER 909 PEER Transaction 909 PID Algorithms 871 PID Example 77 PID2 913 PID2 Level Control Example 80 PLCs roundoff differences 68 scan time 69 precedence equation network 62 Process Control Function Libra
89. 10 blocks each block containing five consecutive 4x registers The address of the first block in the explicit address table begins with the 4x register immediately following the address assigned to the timer register Therefore when you assign the timer register you must choose a 4x register address that has the next 5 50 registers free for this kind of application 22 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC Time of Day When a 4x holding register assignment is made in the configurator for the time of Clock day TOD clock that register and the next seven consecutive registers 4x 4x 7 are set aside in the configuration to store TOD information The block of registers is implemented as follows Register Definition 4X The control register 1 error 1 all clock values have been set 1 clock values are being read 1 clock values are being set 4X41 Day of the week Sunday 1 Monday 2 etc 4x 2 Month of the year Jan 1 Feb 2 etc 4x 3 Day of the month 1 31 4x44 Year 00 99 4x5 Hour in military time 0 23 4x 6 Minute 0 59 4x 7 Second 0 59 When a 4x holding register assignment is made in the configurator for the time of day TOD clock that register and the next seven consecutive registers 4x
90. 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMP Complement a Matrix Parameter Description Matrix Length The integer value entered in the bottom node specifies a matrix length i e the Bottom Node number of registers or 16 bit words in the matrices Matrix length can range from 1 100 A length of 2 indicates that 32 bits in each matrix will be complemented 043505766 4 2006 183 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMP Complement a Matrix 184 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Contacts 30 At A Glance Introduction This chapter describes the instruction element Contacts What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description Contacts 186 Representation Contacts 187 043505766 4 2006 185 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Contacts Short Description Contacts Function Contacts are used to pass or inhibit power flow in a ladder logic program Description 186 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Contacts Representation Contacts Function They are discrete which means each consumes one O poin
91. 23 www barr thorp com Equation Networks Operator Precedence following examples In a string of data types and operators the order or precedence in the expression determines the order in which operations will be evaluated Review the Equation Comments 1 400001 300001F 300002F 300003 300004 amp 300005 300006 300007 300008 The operations in the first argument of the conditional expression are evaluated from left to right in the order they appear First the value in register 300001 is raised to the power of the value in register 300002 then multiplied by the value in register 300003 That result is added to the value in register 300004 then logically ANDed with the value in register 300005 and compared with the value in register 300006 If the comparison is true the second argument in the conditional expression is executed and the value in register 300007 is copied to register 400001 If the comparison is false the third argument in the conditional expression is executed and the value in register 300008 is copied to register 400001 400001 300002U gt 300003U amp 300004U 300005F 300006F 300007U 300008 300009 Operator precedence forces the opposite effect on the first argument of the conditional expression Here the first operation to be evaluated is the exponentiation of the value in register 300006 by the value in register 300007 followed by mul
92. 4 2006 ADD Addition 15 At a Glance Introduction This chapter describes the instruction ADD What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 114 Representation ADD Single Precision Add 115 043505766 4 2006 113 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com ADD Addition Short Description Function The ADD instruction adds unsigned value 1 its top node to unsigned value 2 its Description middle node and stores the sum in a holding register in the bottom node 114 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com ADD Addition Representation ADD Single Precision Add Symbol Parameter Description CONTROL INPUT Max Values 999 16 Bit PLC 9999 24 Bit PLC 65535 785L PLC Representation of the instruction value 1 value 2 ADD sum OVER FLOW sum gt 999 16 Bit PLC sum 9999 24 Bit PLC 65535 785L PLC Description of the instruction s parameters Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON add value 1 and value 2 value 1 3x 4x INT UINT sum 999 16 Bit PLC top node sum 9999 24 Bit PLC 65535 785L PLC value 2 3x 4x INT UINT sum 999 16 Bit PLC middle node sum 99
93. 4 2006 229 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math Short Description DMTH Double Precision Math Addition Subtraction Multiplication and Division Function The Double Precision Math DMTH instruction performs double precision addition Description subtraction multiplication or division set by bottom node DMTH uses 2 registers appended together to form one operand Each DMTH instruction operates on the same two operands e OP1 4x 4x 1 top node e OP2 4y 4y 1 middle node Function Codes The DMTH instruction performs any one of four possible double precision math operations DMTH performs the operation by calling a function To call the desired function enter a function code in the bottom node Function codes range from 1 4 Code DMTH Function Function Performed Result Registers 1 Double Precision Addition Add OP1 OP 2 4y 3 4y 4 2 Double Precision Subtraction Subtract OP1 OP 2 4y 2 4y 3 3 Double Precision Multiply OP 1 OP 2 4y 2 4y 3 Multiplication 4y 4 4y 5 4 Double Precision Division Divide OP1 OP 2 4y 2 4y 3 quotient 4y 4 4y 5 remainder Notes e Fornumbers spread over more than one register the least significant 4 digits are stored in the highest holding register e Results flags and remainders are stored in the
94. 43505766 4 2006 161 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CHS Configure Hot Standby Parameter The 4x register entered in the middle node is the first register in the nontransfer area Description of state RAM The nontransfer area must contain at least four registers the first Nontransfer Area three of which have a predefined usage Middle Node Register Content Displayed and first implied Reverse transfer registers for passing information from the standby to the primary PLC Second implied CHS status register The content of the remaining registers is application specific the length is defined in the parameter length bottom node The 4x registers in the nontransfer area are never transferred from the primary to the standby PLC during the logic scans One reason for scheduling additional registers in the nontransfer area is to reduce the impact of state RAM transfer on the total system scan time CHS Status Usage of status word Register 1172 3 445 6 17 8 91 10 11 12 13 14 15 16 Bit Function 1 1 the top output is ON indicating Hot Standby system is active 2 1 the middle output is ON indicating an error condition 3 10 Not used 11 0 PLC switch is set to A 1 PLC switch is set to B 12 0 PLC logic is matched 1 there is a logic mismatch 13 14 The 2 bit
95. 43505766 4 2006 171 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils Short Description Coils Function Description Coil Types A coil is a discrete output that is turned ON and OFF by power flow in the logic program A single coil is tied to a Oxxxx reference in the PLC s state RAM Because output values are updated in state RAM by the PLC a coil may be used internally in the logic program or externally via the I O map to a discrete output unit in the control System When a coil is ON it either passes power to a discrete output circuit or changes the state of an internal relay contact in state RAM There are two types of coils e Normal coil A normal or non retentive or normal coil looses state when power to controller is lost When power is removed from a PLC a normal coil will be turned OFF Once power is restored the coil will always be in the OFF state on the first logic scan e Memory retentive or latched coil M or L A memory retentive or latched coil does NOT loose state when power to controller is lost If a memory retentive or latched coil is ON at the time a PLC loses power the coil will come back up in an ON state when power is restored The coil will maintain that ON state for the first logic scan and then the logic program will take control Coils are referenced as Oxxxx They may be disabled and forced ON or OFF Disabling a coil stops the use
96. 457 EMTH SUBIF 461 EMTH TAN 465 EMTH ADDDP 265 EMTH ADDFP 271 EMTH ADDIF 275 EMTH ANLOG 279 EMTH ARCOS 285 EMTH ARSIN 291 EMTH ARTAN 295 EMTH CHSIN 301 EMTH CMPFP 307 EMTH CMPIF 313 EMTH CNVDR 319 EMTH CNVFI 325 EMTH CNVIF 331 EMTH CNVRD 337 EMTH COS 343 EMTH DIVDP 347 EMTH DIVFI 353 EMTH DIVFP 357 EMTH DIVIF 361 EMTH ERLOG 365 EMTH EXP 371 EMTH LNFP 377 EMTH LOG 383 EMTH LOGFP 389 EMTHMULDP 395 EMTH MULFP 401 EMTH MULIF 405 EMTH PI 411 EMTH POW 417 EMTH SINE 423 EMTH SQRFP 429 EMTH SQRT 435 EMTH SQRTP 441 EMTH SUBDP 447 EMTH SUBFI 453 EMTH SUBFP 457 EMTH SUBIF 461 EMTH TAN 465 enable contact horizontal open 53 horizontal short 53 normally closed 53 normally open 53 Engineering Unit Conversion and Alarms 489 043505766 4 2006 lvii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index equation network ABS 64 algebraic expression 54 algebraic notation 51 ARCCOS 64 ARCSIN 64 ARCTAN 64 argument 64 argument limits 65 arithmetic operator 59 assignment operator 59 benchmark performance 69 bitwise operator 59 conditional expression 51 61 conditional operator 59 constant 51 content 54 COS 64 COSD 64 creating 52 data conversions 66 enable contact 53 entering function 64 entering parentheses 63 EXP 64 exponentiation operator 59 FIX 64 FLOAT 64 group expressions in nested layer
97. 473 9123 www barr thorp com COMP Complement a Matrix 29 At a Glance Introduction This chapter describes the instruction COMP What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 180 Representation COMP Logical Compliment 181 Parameter Description 183 043505766 4 2006 179 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMP Complement a Matrix Short Description Function The COMP instruction complements the bit pattern i e changes all O s to 1 s and all Description 1 s to O s of a source matrix then copies the complemented bit pattern into a destination matrix The entire COMP operation is accomplished in one scan WARNING Overriding of any disabled coils in the destination matrix without enabling them COMP will override any disabled coils in the destination matrix without enabling them This can cause injury if a coil has been disabled for repair or maintenance because the coil s state can be changed by the COMP operation Failure to follow this instruction can result in death serious injury or equipment damage 180 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMP Complement a Matrix Representation COMP Logical Compliment
98. 55 ms These latency times assume only one interrupt at a time Interrupt The PLC uses the following rules to choose which interrupt handler to execute in the Priorities event that multiple interrupts are received simultaneously e An interrupt generated by an interrupt module has a higher priority than an interrupt generated by a timer e Interrupts from modules in lower slots of the local backplane have priority over interrupts from modules in the higher slots If the PLC is executing an interrupt handler subroutine when a higher priority interrupt is received the current interrupt handler is completed before the new interrupt handler is begun 043505766 4 2006 97 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Interrupt Handling Instructions that Cannot Be Used in an Interrupt Handler Interrupt with BMDI ID IE The following nonreenterant ladder logic instructions cannot be used inside an interrupt handler subroutine e MSTR READ WRIT PCFL EMTH T1 0 TO 1 T 01 and T1MS timers will not set error bit 2 timer results invalid equation networks e user loadables will not set error bit 2 If any of these instructions are placed in an interrupt handler the subroutine will be aborted the error output on the ITMR or IMOD instruction that generated the interrupt will go ON and bit 2 in the status register will be set Three interrupt mask unmask contro
99. 6 Representation RTU Remote Terminal Unit 000055 957 xxi This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 152 Chapter 153 Chapter 154 Chapter 155 Chapter 156 Chapter 157 Chapter 158 Chapter 159 SAVE Save Flash 1 562020 20 noram gm n odi e s 961 Short Description ise Cena a ry th eee ed Xr ee eO RR xc ED LR es 962 Representation SAVE Save 0 eller 963 Parameter Description 0002 ee ee 964 SBIT Sel Bib i628 co eed cb vad eie Tap KG wh TG AS ce 965 Short Description eee eee 966 Representation SBIT Set Bit llle es 967 SCIF Sequential Control Interfaces 969 Short Description es 970 Representation SCIF Sequential Control Interface 971 Parameter Description nnana eee 973 SENS CONSE 22222 2 553 KAKA 4 378 DBA 00 32 D 43 8 d MAA 975 Shon Description x29 kakang sk eo eranl Jang E T Rape NG Ka ipa sane e x deas 976 Representation SENS Logical Bit Sense aaa 977 Parameter Description nnana ees 978 SHOS AAP PA ERAP 979 Short Description Shorts 000 cee 980 Representation Shorts 00 00 cece eee eee 981 SKP Skipping Networks Ll ls 983 Short Description SKP Skipping Networks a 984 Representation SKP Skipping Networks a 985 SRCH Search La nam
100. 785 PLCs e Quantum Series PLCs Parameter Description of the instruction s parameters Descripuon Parameters State RAM Reference Data Type Meaning Top input Ox 1x None OFF 5 ON initiates the counter operation Bottom input Ox 1x None OFF accumulated count is reset to preset value ON counter accumulating counter 3x 4x INT UINT Preset value can be displayed preset explicitly as an integer range top node 1 65 535 or stored in a register Preset Value Max 999 16 bit PLC Max 9999 24 bit PLC Max 65535 PLC accumulated 4x INT UINT Count value actual value which count decrements by one on each transition bottom from OFF to ON of the top input until it node reaches zero Top output Ox None ON accumulated count 0 Bottom Ox None ON accumulated count gt 0 output 043505766 4 2006 205 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DCTR Down Counter 206 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIOH Distributed I O Health 34 At a Glance Introduction This chapter describes the instruction DIOH What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 208 Representation DIOH Distributed I O Health 209 Parameter Description 211 043505766 4 2006 207 This document provided by Barr Thorp
101. 883 PCFL RATIO 887 PCFL RMPLN 893 PCFL SEL 897 PCFL TOTAL 903 PEER 909 PID2 913 R gt T 929 RBIT 933 READ 937 RET 943 SAVE 961 SBIT 965 SCIF 969 SENS 975 SRCH 987 STAT 993 SU16 1021 SUB 1025 Subroutine Handling 99 T 01 Timer 1049 T gt R 1037 T gt T 1043 TO 1 Timer 1053 T1 0 Timer 1057 T1MS Timer 1061 TBLK 1067 TEST 1073 UCTR 1077 WRIT 1091 XMRD 1133 XMWT 1139 XOR 1145 LN 64 LOAD 657 Load Flash 657 Load the Floating Point Value of Pi 411 lxii 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index Loadable DX CHS 157 DRUM 237 ESI 469 EUCA 489 HLTH 583 ICMP 611 Installation 101 MAP 3 661 MBUS 681 MRTM 691 NOL 767 PEER 909 LOG 64 Logarithmic Ramp to Set Point 893 logic editor equation network 51 52 Logical And 117 logical expression equation network 51 Logical OR 775 Look up Table 845 LSB least significant byte constant data 57 MAP 3 661 MAP Transaction 661 Master 701 Math AD16 109 ADD 113 BCD 123 DIV 217 DV16 243 FTOI 513 ITOF 645 MU16 747 MUL 751 SU16 1021 SUB 1025 TEST 1073 math coprocessor roundoff differences 68 math operator equation network 51 mathematical equation constant data 57 exponential notation 58 values and data types 55 mathematical function ABS 64 ARCCOS 64 ARCSIN 64 ARCTAN 64 argument 64
102. 99 24 Bit PLC 65535 785L PLC sum 4x INT UINT Sum bottom node Top output Ox None ON overflow in the sum sum gt 999 in 16 bit PLC sum 9999 in 24 bit PLC 65535 in 785L PLC 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 115 www barr thorp com ADD Addition 116 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AND Logical And 16 At a Glance Introduction This chapter describes the instruction AND What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 118 Representation AND Logical And 119 Parameter Description 121 043505766 4 2006 117 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AND Logical And Short Description Function Description The AND instruction performs a Boolean AND operation on the bit patterns in the source and destination matrices The ANDed bit pattern is then posted in the destination matrix overwriting its previous contents source A Ga bits a LY LY UY AND ys bits destination AND AND WARNING Overriding of any disabled coils within the destination matrix without enabling them AND will overrid
103. Block move with interrupts yes yes no yes disabled ID Disable interrupt yes yes no yes IE Enable interrupt yes yes no yes IMIO Immediate I O instruction yes yes no yes IMOD Interrupt module instruction yes no no yes ITMR Interval timer interrupt no yes no yes For more information see p 97 extension Note The fast I O instructions are only available after configuring a CPU without 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 41 Instruction Groups Loadable DX Loadable DX This group provides the following instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium CHS Hot standby Quantum yes no no no DRUM DRUM sequenzer yes yes no yes ESI Support of the ESI module yes no no no 140 ESI 062 10 EUCA Engineering unit conversion yes yes no yes and alarms HLTH History and status matrices yes yes no yes ICMP Input comparison yes yes no yes MAP3 MAP 3 Transaction no no no no MBUS MBUS Transaction no no no no MRTM Multi register transfer yes yes no yes module NOL Transfer to from the NOL yes no no no Module PEER PEER Transaction no no no no XMIT RS 232 Master Mode yes yes yes no For more information see p 101 42 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Inst
104. Block to Table Representation BLKT Block to Table Move Symbol Representation of the instruction CONTROL INPUT 4 t MOVE COMPLETE Source block HOLD POINTER 4 ERROR pointer RESET POINTER 4 BLKT Length 1 100 registers block I h 16 1600 bits ANG Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates the DX move middle input Ox 1x None ON hold pointer bottom input Ox 1x None ON reset pointer to zero source block 4x BYTE First holding register in the block of top node WORD contiguous registers whose content will be copied to a block of registers in the destination table pointer 4x BYTE Pointer to the destination table middle node WORD block length INT UINT Block length number of 4x bottom node registers of the source block and of the destination block Range 1 100 Top output Ox None ON operation successful Middle output Ox None ON error move not possible 043505766 4 2006 133 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKT Block to Table Parameter Description Middle and Bottom Input Pointer Middle Node The middle and bottom input can be used to control the pointer so that source data is not copied into registers that are needed for other purposes
105. D Extended Memory Read 1135 Parameter Description rA 1136 xxiv This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 181 XMWT Extended Memory Write 1139 Short Descriptions ss xeu es rr Ier ex ce d Re oe a Ra wey ee bE 1140 Representation XMWT Extended Memory Write 1141 Parameter Description ne 1142 Chapter 182 XOR Exclusive OR 2 cece eee eee 1145 Short Description 0 0002 cee eee 1146 Representation XOR Boolean Exclusive Or a 1147 Parameter Description llle 1149 Appendices UBE riw wx EUER PA AL E RO 1151 Optimizing RIO Performance with the Segment Scheduler 1151 Appendix A AppendixA 22222 2na 1153 Optimizing RIO Peformance with the Segment Scheduler 1153 Sem Diigo zu sura soos ieu raus ate AP AA 1154 How to Measure Scan Time elles 1158 Maximizing Throughput RII 1159 Order of Solve eee nn 1161 Using Segment Scheduler to Improve Critical 1 O Throughput 1162 Using Segment Scheduler to Improve System Performance 1164 Using Segment Scheduler to Improve Communication Port Servicing 1165 Sweep Functi0ons eee 1166 GlOSSSIV osse kx ERE AP RE ae REED EE xxxi Indek AREAS UE o Ruhe AA EE dia a a lv XXV This document provided
106. DP 265 EMTH ADDFP 271 EMTH ADDIF 275 EMTH ANLOG 279 EMTH ARCOS 285 EMTH ARSIN 291 EMTH ARTAN 295 EMTH CHSIN 301 EMTH CMPFP 307 EMTH CMPIF 313 EMTH CNVDR 319 EMTH CNVFI 325 EMTH CNVIF 331 EMTH CNVRD 337 EMTH COS 343 EMTH DIVDP 347 EMTH DIVFI 353 EMTH DIVFP 357 EMTH DIVIF 361 EMTH ERLOG 365 EMTH EXP 371 EMTH LNFP 377 EMTH LOG 383 EMTH LOGFP 389 EMTH MULDP 395 EMTH MULFP 401 EMTH MULIF 405 EMTH PI 411 EMTH POW 417 EMTH SINE 423 EMTH SQRFP 429 EMTH SQRT 435 EMTH SQRTP 441 EMTH SUBDP 447 EMTH SUBFI 453 EMTH SUBFP 457 EMTH SUBIF 461 EMTH TAN 465 ESI 469 EUCA 489 FIN 503 Formatting Messages for ASCII READ 043505766 4 2006 Ixi This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index WRIT Operations 83 FOUT 507 FTOI 513 HLTH 583 IBKR 603 IBKW 607 ICMP 611 ID 617 IE 621 IMIO 625 IMOD 631 Interrupt Handling 97 ITMR 639 ITOF 645 JSR 649 LAB 653 LOAD 657 MAP 3 661 MBIT 677 MBUS 681 MRTM 691 MSTR 701 MU16 747 MUL 751 NBIT 755 NCBT 759 NOBT 763 NOL 767 OR 775 PCFL 781 PCFL AIN 787 PCFL ALARM 793 PCFL AOUT 799 PCFL AVER 803 PCFL CALC 809 PCFL DELAY 815 PCFL EQN 821 PCFL INTEG 827 PCFL KPID 831 PCFL LIMIT 837 PCFL LIMV 841 PCFL LKUP 845 PCFL LLAG 851 PCFL MODE 855 PCFL ONOFF 859 PCFL PI 865 PCFL PID 871 PCFL RAMP 877 PCFL RATE
107. Each section has its own Document window in Concept For reasons of clarity it is recommended to subdivide a very large section into several small ones The scroll bar serves to assist scrolling in a section The first figure the Reference is separated from the ensuing five figure address by a colon 043505766 4 2006 Xlix This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Sequence language SFC Serial ports Source code data file Concept EFB Standard format 400001 Standardized literals State RAM Statement ST Status bits Step The SFC Language elements enable the subdivision of a PLC program organiza tional unit in a number of Steps and Transitions which are connected horizontally by aligned Connections A number of actions belong to each step and a transition condition is linked to a transition With serial ports COM the information is transferred bit by bit The source code data file is a usual C source file After execution of the menu command Library Generate data files this file contains an EFB code framework in which a specific code must be entered for the selected EFB To do this click on the menu command Objects Source The five figure address is located directly after the first figure the reference If the data type for the literal is to be automatically determined use the following construction Data type name
108. Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Closed Loop Control Analog Values PCFL Subfunctions General Advanced Calculations Signal Processing Regulatory Control Explanation of The PCFL instruction gives you access to a library of process control functions utilizing analog values PCFL operations fall into three major categories e Advanced Calculations e Signal Processing e Regulatory Control Advanced calculations are used for general mathematical purposes and are not limited to process control applications With advanced calculations you can create custom signal processing algorithms derive states of the controlled process derive statistical measures of the process etc Simple math routines have already been offered in the EMTH instruction The calculation capability included in PCFL is a textual equation calculator for writing custom equations instead of programming a series of math operations one by one Signal processing functions are used to manipulate process and derived process signals They can do this in a variety of ways they linearize filter delay and otherwise modify a signal This category would include functions such as an Analog Input Output Limiters Lead Lag and Ramp generators Regulatory functions perform closed loop control in a variety of applications Typically this is a PID proportional integral derivative negative feedback control loop T
109. FP value 3 402823 x 1038 43 402823 x 1038 ARCCOS FP value 1 00000 1 00000 ARCSIN FP value 1 00000 1 00000 ARCTAN FP value 3 402823 x 1038 3 402823 x 1038 COS FP value 3 402823 x 1038 3 402823 x 1038 COSD FP value 3 224671 x 104 3 224671 x 104 EXP FP value 87 33655 88 72284 FIX FP value 2 147484 x 109 2 147484 x 109 FLOAT FP value 3 402823 x 1038 43 402823 x 1038 LN FP value 0 3 402823 x 1038 LOG FP value 0 3 402823 x 1038 SIN FP value 3 402823 x 1038 43 402823 x 1038 SIND FP value 1 724705 x 104 41 724705 x 104 SQRT FP value 0 3 402823 x 1038 TAN FP value 3 402823 x 1038 3 402823 x 1038 not p 2 x n where n is an integer value TAND FP value 1 351511 x 104 41 351511 x 104 not 90 x n where n is an integer value 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 65 Equation Networks Data Conversions in an Equation Network Mixed Data In an equation network some combinations of operators will convert the value of an Types in an operand from 1 data type to another The following set of rules applies to mixed data Equation types in an equation network Network e All 16 bit signed and unsigned numbers are automatically promoted to 32 bits before an operation In an operation between signed and unsigned numbers the unsigned number is assumed to be sig
110. I O map directs data flow between the input output signals and the user logic program it tells the PLC how to implement inputs in user logic and provides a pathway down which to send signals to the output modules The I O map table which is stored on page 0 in system memory consumes a large but not predetermined amount of system overhead lts length is a function of the number of discrete and register I O points your system has implemented and is defined by the type of I O modules you specify in the configuration table The minimum allowable size of the I O map table is nine words With your programming panel software you can access a I O map editor that allows you to define e the number of drops in the remote I O system e the number of discretes registers that may be used for input and output e the number type and slot location of the I O modules in the drop e the reference numbers that link the discrete registers to the I O modules e drop hold up time for each I O drop e ASCII messaging port addresses if used for any drop 26 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes At a Glance Overview This chapter discusses Ladder Logic opcodes What s in this This chapter contains the following topics 2 Chapter Topic Page Translating Ladder Logic Elements in the System Memory Database 28 Translating D
111. ICMP instruction How to Handle Opcode 7 l 7 Operations Note No two instructions with the same opcode can coexist on a PLC The easiest way to stay out of trouble is to never employ two loadables with conflicting opcodes in your user logic If you are using MODSOFT panel software it allows you to change the opcodes for loadable instructions The lodutil utility in the Modicon Custom Loadable Software package SW AP98 GDA also allows you to change loadable opcodes If you modify any loadables so that their opcodes are different from the ones shown in this chapter you must use caution when porting user logic to or from your controller The opcode conflicts that can result may hang up the target controller or cause the wrong function blocks to be executed in ladder logic Failure to follow this instruction can result in death serious injury or equipment damage 043505766 4 2006 33 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes 34 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Instructions Parameter Assignment of Instuctions General Programming for electrical controls involves a user who implements Operational Coded instructions in the form of visual objects organized in a recognizable ladder form The program objects designed at the user level
112. Ixiv This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Index XMWT 1139 mixed data types equation network 66 Modbus Functions 1099 Modbus Plus MSTR 701 Modbus Plus Network Statistics MSTR 732 Modify Bit 677 Move BLKM 127 BLKT 131 FIN 503 FOUT 507 IBKR 603 IBKW 607 R gt T 929 SRCH 987 T gt R 1037 T gt T 1043 TBLK 1067 MRTM 691 MSTR 701 Clear Local Statistics 716 Clear Remote Statistics 722 CTE Error Codes for SY MAX and TCP IP Ethernet 746 Get Local Statistics 714 Get Remote Statistics 720 Modbus Plus and SY MAX Ethernet Error Codes 739 Modbus Plus Network Statistics 732 Peer Cop Health 724 Read CTE Config Extension Table 728 Read Global Data 719 Reset Option Module 727 SY MAX specific Error Codes 741 TCP IP Ethernet Error Codes 743 TCP IP Ethernet Statistics 737 Write CTE Config Extension Table 730 Write Global Data 718 MU16 747 MUL 751 Multiply 751 Multiply 16 Bit 747 Multi Register Transfer Module 691 N NBIT 755 NCBT 759 nested layer parentheses 51 nested parentheses equation network 63 Network Option Module for Lonworks 767 NOBT 763 NOL 767 Normally Closed Bit 759 normally closed contact equation network 53 Normally Open Bit 763 normally open contact equation network 53 O ON OFF Values for Deadband 859 One Hundredth Second Timer 1049 One Millisecond Timer 1
113. Literal value Example INT 15 Data type Integer value 15 BYTE 00001111 data type Byte value 00001111 REAL 23 0 Data type Real value 23 0 For the assignment of REAL data types there is also the possibility to enter the value in the following way 23 0 Entering a comma will automatically assign the data type REAL The state RAM is the storage for all sizes which are addressed in the user program via References Direct display For example input bits discretes input words and discrete words are located in the state RAM Instructions are commands of the ST programming language Instructions must be terminated with semicolons Several instructions separated by semi colons can occupy the same line There is a status bit for every node with a global input or specific input output of Peer Cop data If a defined group of data was successfully transferred within the set time out the corresponding status bit is set to 1 Alternatively this bit is set to O and all data belonging to this group of 0 is deleted SFC Language element Situations in which the Program behavior follows in relation to the inputs and outputs of the same operations which are defined by the associated actions of the step 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Step name Structured text ST Structured variables SY MAX Symbol Icon The
114. Middle Node 0 043505766 4 2006 245 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DV16 Divide 16 Bit Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON enables value 1 value 2 Middle input Ox 1x None OFF decimal remainder ON fractional remainder Bottom input Ox 1x None ON signed operation OFF unsigned operation value 1 3x 4x INT UINT Dividend can be displayed top node explicitly as an integer range 1 65 535 or stored in two contiguous registers displayed for high order half implied for low order half value 2 3x 4x INT UINT Divisor can be displayed middle node explicitly as an integer range 1 65 535 enter e g 65535 or stored in a register quotient Ax INT UINT First of two contiguous holding bottom node registers displayed result of division implied remainder either a decimal or a fraction depending on the state of middle input Top output Ox None ON Divide operation completed successfully Middle output Ox None ON overflow quotient 65 535 in unsigned operation 82 768 quotient 32 767 in signed operation Bottom output Ox None ON value 2 0 246 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr
115. ND X Sine of X degrees SQRT X Square root of X TAN X Tangent of X radians TAND X Tangent of X degrees Entering A function must be entered with its argument in the following form in the equation Functions in an network expression Equation function name argument Network where the function name is one of those listed in the table above and the argument is entered in parentheses immediately after the function name The argument may be entered as e one or more unary operations e one or more exponential operations e one or more multiplication division operations e oneo or more addition subtraction operations e one or more logical operations e one or more relational operations e any legal combination of the above operations 64 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks For example if you want to calculate the absolute value of the sine of the number in FP register 400025 and place the result in FP register 400015 enter the following in the equation network 400015F ABS SIN 400025F See p 59 for more details about these operations Limits on the The argument to a function in an equation network is resolved to a floating ponit FP Argument to a number The FP value must be in the following range depending on the type of Function function Function Argument Range ABS
116. OFIBUS RTU mode Rum time error Note The x which comes after the first figure of each reference type represents a five figure storage location in the application data store i e if the reference 400201 signifies a 16 bit output or marker word in the address 201 of the State RAM 6x references are marker words in the extended memory of the PLC Only LL984 user programs and CPU 213 04 or CPU 424 02 can be used Remote I O provides a physical location of the I O coordinate setting device in relation to the processor to be controlled Remote inputs outputs are connected to the consumer control via a wired communication cable RP Remote Peripheral Remote Terminal Unit The RTU mode is used for communication between the PLC and an IBM compatible personal computer RTU works with 8 data bits Error which occurs during program processing on the PLC with SFC objects i e steps or FFBs These are for example over runs of value ranges with figures or time errors with steps SA85 module Section Separator format 4 00001 The SA85 module is a Modbus Plus adapter for an IBM AT or compatible computer A section can be used for example to describe the functioning method of a technological unit such as a motor A Program or DFB consist of one or more sections Sections can be programmed with the IEC programming languages FBD and SFC Only one of the named programming languages can be used within a section
117. PCFL INTEGFL 827 PID2 913 STAT 993 SQRT 64 SRCH 987 STAT 993 Status 993 SU16 1021 SUB 1025 Subroutine Handling 99 Subtract 16 Bit 1021 Subtraction 1025 Support of the ESI Module 469 043505766 4 2006 Ixvii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index T T 01 Timer 1049 T gt R 1037 T gt T 1043 T0 1 Timer 1053 T1 0 Timer 1057 T1MS Timer 1061 Table to Block 1067 Table to Register 1037 Table to Table 1043 TAN 64 TAND 64 TBLK 1067 TCP IP Ethernet Statistics MSTR 737 TEST 1073 Test of 2 Values 1073 Time Delay Queue 815 Totalizer for Metering Flow 903 U UCTR 1077 unary operator 59 unsigned 16 bit variable 56 unsigned long 32 bit variable 56 Up Counter 1077 V values and data types mathematical equation 55 variable equation network 51 variable data mathematical equation 56 Velocity Limiter for Changes in the Pv 841 W word maximum in an equation network 54 words consumed constant data 57 mathematical equation 56 WRIT 1091 Write 1091 MSTR 710 X XMRD 1133 XMWT 1139 XOR 1145 Ixviii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006
118. Precision Subtraction 447 Short Description AA AA 448 Representation EMTH SUBDP Double Precision Math Subtraction 449 Parameter Description ee 451 EMTH SUBFI Floating Point Integer Subtraction 453 Short Description 2 2 0 0 eee 454 Representation EMTH SUBFI Floating Point minus Integer 455 Parameter Descriptio siegi sc she ed ba te aes ede Rer Rake ead Pee ds 456 EMTH SUBFP Floating Point Subtraction 457 Short Description eh 458 Representation EMTH SUBFP Floating Point Subtraction 459 Parameter Description nnana ees 460 xii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 79 EMTH SUBIF Integer Floating Point Subtraction 461 Short Description sire iia aaa RR 9h nn 462 Representation EMTH SUBIF Integer minus Floating Point 463 Parameter Description ee 464 Chapter 80 EMTH TAN Floating Point Tangent of an Angle in Radians 465 Short Description nes 466 Representation EMTH TAN Tangent of an Angle in Radians 467 Parameter Description ee 468 Chapter 81 ESI Support of the ESI Module 469 Short Description 0 nee 470 Representation han 471 Parameter Description illie 472 READ ASCII Message Subfunction 1
119. RS 232 Port Parameters Communication Mode ASCII or RTU RTU Notes Baud Rate 50 75 110 134 5 150 9600 300 600 1200 1800 2000 2400 3600 4800 7200 9600 19200 Parity ON OFF EVEN ODD ON EVEN Stop bit s 1or2 2 Device address 001 247 001 Delay time in ms 10 20 representing 01 10 ms Modbus port delay times 10 20 ms are implemented only in the 984A B X PLCs ASCII Message Table of messages Up to 9999 00 If your PLC doesn t support remote O it cannot support ASCII devices exception The Micros Size of Decimal 0 difference 00 message area between memory size 32K or 64K and system overhead of ASCII ports Two per drop up to 32 00 24 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC ASCII port Baud 1200 parameters Parity ON EVEN of stop bits 01 of data bits per character 08 Presence of a keyboard NONE ASCII input A 4x value representing NONE Only a 984B PLC supports simple the first of 32 registers ASCII input for simple ASCII input ASCII output A 4x value representing NONE Only a 984A and 984B PLC the first of 32 registers supports simple ASCII output for simple ASCII output Special Functions Skip Functions Allowed YES NO No Timer Register A 4x register set aside to NONE
120. TIO Four Station Ratio Controller 889 Parameter Description ene 890 PCFL RMPLN Logarithmic Ramp to Set Point 893 Short Description 0 0 ce hh hh Rh hes 894 Representation PCFL RMPLN Logarithmic Ramp to Set Point 895 Parameter Description nnana ess 896 PCFL SEL Input Selection 897 Short Deseriptioli xus se oe KA PA AG nee oe RAHA AG 898 Representation PCFL SEL High Low Average Input Selection 899 Parameter Description ee 900 PCFL TOTAL Totalizer for Metering Flow 903 Short Description n nsaan len 904 Representation PCFL TOTAL Totalizer for Metering Flow 905 Parameter Description eene 906 XX This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 143 PEER PEER Transaction llul 909 Short DescriptiolT su xke omes cn e e ROT RR NG ee UR OR OR 910 Representation PEER Modbus II Identical Transfer 911 Parameter Description 0 00 00 cece eee 912 Chapter 144 PID2 Proportional Integral Derivative 913 Short Description 0000 ee eee 914 Representation PID2 Proportional Integral Derivative 915 Detailed Description eh 916 Parameter Description llle 919 Rani TIME EMOS CPP 924 Part VI Instruction De
121. VMEW VME Write 2000005 1089 WRIT Write 62 6 soc orum Em ERREUR eure 1091 Short Description lt 6 aa me p sastrae coos Casa eee ee aE a 1092 Representation WRIT Write ASCII Port 022200000 1093 Parameter Description liliis 1094 XMIT Transmit 2000 eee es 1097 General Description XMIT Transmit llle 1098 XMIT Modbus Functions eene 1099 XMIT Communication Block 1105 Short Description XMIT Communication Block lille 1106 Representation XMIT Communication Block 00 0a 1107 Parameter Description Middle Node Communication Control Table 1109 Parameter Description XMIT Communication Block 1114 Parameter Description XMIT Communications Block 1116 XMIT Port Status Block 1117 Short Description XMIT Port Status Block 0 000005 1118 Representation XMIT Port Status Block 0 0 1119 Parameter Description Middle Node XMIT Conversion Block 1121 XMIT Conversion Block eeell l 1125 Short Description XMIT Conversion Block aaa 1126 Representation XMIT Conversion Block a 1127 Parameter Description XMIT Conversion Block 000005 1129 XMRD Extended Memory Read 1133 Short Description ne 2 0 0 0 see 1134 Representation XMR
122. X Instructions in the System Memory Database 30 Opcode Defaults for Loadables 33 043505766 4 2006 27 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes Translating Ladder Logic Elements in the System Memory Database Overview A PLC automatically translates symbolic ladder elements and function blocks into database nodes that are stored on page 0 in system memory A node in ladder logic is a 16 or 24 bit word an element such as a contact translates into one database node while an instruction such as an ADD block translates into three database nodes The database format differs for 16 bit and 24 bit nodes 16 bit Node Format x x x x x BBA 24 bit Node Format x x x x x x x x T The five most significant bits in a 16 bit node and the eight most significant bits in a 24 bit node the x bits are reserved for opcodes An opcode defines the type of functional element associated with the node for example the code 01000 specifies that the node is a normally open contact and the code 11010 specifies that the node is the third of three nodes in a multiplication function block Translating When the system is translating standard ladder logic elements and non DX function Logic Elements blocks it uses the remaining y and z bits as pointers to register or bit locations in and Non DX State RAM associated with the discretes or registers used in
123. anced called up several times The function counter serves as a unique identifier for the function in a Program or DFB The function counter cannot be edited and is automatically assigned The function counter always has the structure n m n Section number number running m Number of the FFB object in the section number running G Generic data type Generic literal Global derived data types Global DFBs Global macros Groups EFBs A Data type which stands in for several other data types If the Data type of a literal is not relevant simply enter the value for the literal In this case Concept automatically assigns the literal to a suitable data type Global Derived data types are available in every Concept project and are contained in the DFB directory directly under the Concept directory Global DFBs are available in every Concept project and are contained in the DFB directory directly under the Concept directory Global Macros are available in every Concept project and are contained in the DFB directory directly under the Concept directory Some EFB libraries e g the IEC library are subdivided into groups This facilitates the search for FFBs especially in extensive libraries 043505766 4 2006 XXXIX This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary O component list IEC 61131 3 IEC format QW1 IEC name conventions identifie
124. ation specific registers bottom used in the step data table range 1 node 999 Length Max 255 16 bit PLC Max 999 24 bit PLC Max 65535 PLC Top output Ox None Echoes state of the top input Middle Ox None ON step pointer value length output Bottom Ox None ON Error output 240 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DRUM DRUM Sequencer Parameter Description Step Pointer Top Node Step Data Table Middle Node The 4x register entered in the top node stores the current step number The value in this register is referenced by the DRUM instruction each time it is solved If the middle input to the block is ON the contents of the register in the top node are incremented to the next step in the sequence before the block is solved The 4x register entered in the middle node is the first register in a table of step data information The first six registers in the step data table hold constant and variable data required to solve the block Register Name Content Displayed masked output Loaded by DRUM each time the block is solved contains data the contents of the current step data register masked with the outputmask register First implied current step Loaded by DRUM each time the block is solved contains data data from the step pointer causes the block logic to automatically calculate register offset
125. ations With this interface the user i e the DDE client can not only read data from the extended monitor DDE server but also write data onto the PLC via the server Data can therefore be altered directly in the PLC while it monitors and analyzes the results When using this interface the user is able to make their own Graphic Tool Face Plate or Tuning Tool and integrate this into the system The tools can be written in any DDE supporting language e g Visual Basic and Visual C The tools are called up when the one of the buttons in the dialog box extended monitor uses Concept Graphic Tool Signals of a projection can be displayed as timing diagrams via the DDE connection between Concept and Concept Graphic Tool 043505766 4 2006 XXXV This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Decentral Network DIO Declaration Definition data file Concept EFB Derived data type Derived Function Block DFB DINT Direct display A remote programming in Modbus Plus network enables maximum data transfer performance and no specific requests on the links The programming of a remote net is easy To set up the net no additional ladder diagram logic is needed Via corresponding entries into the Peer Cop processor all data transfer requests are met Mechanism for determining the definition of a Language element A declaration normally covers the connection of an Ide
126. ayout information for the Concept FBD editor and the parameters for code generation TIME stands for the data type Time span The input appears as Time span literal The length of the data element is 32 bit The value range for variables of this type stretches from O to 2exp 32 1 The unit for the data type TIME is 1 ms Permitted units for time spans TIME are days D hours H minutes M seconds S and milliseconds MS or a combination thereof The time span must be denoted by the prefix tz T2 time or TIME An overrun of the highest ranking unit is permitted i e the input T 25H15M is permitted 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Example t 14MS T 14 7S time 18M TIME 19 9H t 20 4D T 25H15M time 5D14H12M18S3 5MS Token The network Token controls the temporary property of the transfer rights via a single node The token runs through the node in a circulating rising address sequence All nodes track the Token run through and can contain all possible data sent with it Traffic Cop The Traffic Cop is a component list which is compiled from the user component list The Traffic Cop is managed in the PLC and in addition contains the user component list e g Status information of the I O stations and modules Transition The condition with which the control of one or more Previous steps transfers to one or more ensuing steps along
127. barr thorp com Chapter 134 Chapter 135 Chapter 136 Chapter 137 Chapter 138 Chapter 139 Chapter 140 Chapter 141 Chapter 142 PCFL ONOFF ON OFF Values for Deadband 859 Short Descriptio smua sok chs ek Pero nn RO p RR bs RR Yea ek es 860 Representation PCFL ONOFF Specifies ON OFF Values for Deadband 0c eee 861 Parameter Description eee 862 PCFL PI ISA Non Interacting Pl 865 Short Description 0 0 0 eh 866 Representation PCFL PI 000 eee eee 867 Parameter Description 2l 868 PCFL PID PID Algorithms Lees 871 Short Description 20 en 872 Representation PCFL PID Algorithms 0000 eee eee 873 Parameter Description 0 0002 ee 874 PCFL RAMP Ramp to Set Point at a Constant Rate 877 Short Description 0 0 0 0 es 878 Representation PCFL RAMP Ramp to Set Point at Constant Rate 879 Parameter Description nnana 000 c eee eee 880 PCFL RATE Derivative Rate Calculation over a Specified Timeme Lll 883 Short Description 2 0 0 0 0 eee ee 884 Representation PCFL RATE Derivative Rate Calculation Over a Specified Time 0c cee eee ee 885 Parameter Description 0000 ee 886 PCFL RATIO Four Station Ratio Controller 887 Short Description 2 2 0 0 eee 888 Representation PCFL RA
128. bits 3 Each Ox or 1x value implemented in user logic is represented by one bit in a word in state RAM by a bit in a word in the history table and by a bit in a word in the DISABLE table In other words for every discrete word in the state RAM table there is one corresponding word in the history table and one corresponding word in the DISABLE table Counter input states for the previous scan are represented on page F in an up counter down counter history table Each counter register is represented by a single bit in a word in the table a value of 1 indicates that the top input was ON in the last scan and a value of 0 indicates that the top input was OFF in the last scan 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC State RAM Structure Overview Words are entered into the state RAM table from the top down in the following order Word 0001 Always begins on a 16 word boundary Always begins on a 16 word boundary Coil History Discrete DISABLE Word 2048 Discrete references come before registers the Ox words first followed by the 1x words The discrete references are stored in words containing 16 contiguous discrete references The register values follow the discrete words Blocks of 3x and 4x register values must each begin at a word that is a multiple of 16 For example if you allocate five words for
129. c 800 473 9123 www barr thorp com Installation of DX Loadables 12 Installation of DX Loadables Howtoinstallthe The DX loadable instructions are only available if you have installed them With the DX Loadables installation of the Concept software DX loadables are located on your hard disk Now you have to unpack and install the loadables you want to use as follows Step Action 1 With the menu command Project Configurator you open the configurator With configure Loadables you open the dialog box Loadables Press the command button Unpack to open the standard Windows dialog box Unpack Loadable File where the multifile loadables DX loadables can be selected Select the loadable file you need click the button Ox and it is inserted into the list box Available Now press the command button 1nstall to install the loadable selected in the list box Available The installed loadable will be displayed in the list box Installed Press the command button Edit to open the dialog box Loadable Instruction Configuration Change the opcode if necessary or accept the default You can assign an opcode to the loadable in the list box Opcode in order to enable user program access through this code An opcode that is already assigned to a loadable will be identified by a Click the button OK Click the button OK in the dialog box Loadables Configuration loadables count is adj
130. contains the following topics 2 Chapter Topic Page Formatting Messages for ASCII READ WRIT Operations 84 Format Specifiers 85 Special Set up Considerations for Control Monitor Signals Format 88 043505766 4 2006 83 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Formatting Messages for ASCII READ WRIT Operations Formatting Messages for ASCII READ WRIT Operations General The ASCII messages used in the READ and WRIT instructions can be created via your panel software using the format specifiers described below Format specifiers are character symbols that indicate e The ASCII characters used in the message e Register content displayed in ASCII character format e Register content displayed in hexadecimal format e Register content displayed in integer format e Subroutine calls to execute other message formats Overview Format The following format specifiers can be used Specifiers Specifier Meaning ASCII return CR and linefeed LF om Enclosure for octal control code S Enclosure for ASCII text characters X Space indicator Repeat contents of the parentheses H Integer Leading zeros Alphanumeric Octal Binary m Ujol nm t Hexadecimal 84 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Formatting Messages for ASCII READ
131. cycle Program organization unit Programming device Programming redundancy system Hot Standby Project Project data bank Prototype data file Concept EFB The peer processor processes the token run and the flow of data between the Modbus Plus network and the PLC application logic Programmable controller The uppermost Program organization unit A program is closed and loaded onto a single PLC A program cycle consists of reading in the inputs processing the program logic and the output of the outputs A Function a Function block or a Program This term can refer to either a Type or an Item Hardware and software which supports programming configuring testing implementing and error searching in PLC applications as well as in remote system applications to enable source documentation and archiving The programming device could also be used for process visualization A redundancy system consists of two identically configured PLC devices which communicate with each other via redundancy processors In the case of the primary PLC failing the secondary PLC takes over the control checks Under normal conditions the secondary PLC does not take over any controlling functions but instead checks the status information to detect mistakes General identification of the uppermost level of a software tree structure which specifies the parent project name of a PLC application After specifying the project name the syst
132. d NOBT Uses a register to represent 16 bits as N O contacts 2 NCBT Uses a register to represent 16 bits as N C contacts 2 NBIT Uses an output register to represent 2 16 bits as normal coils SBIT Latches a bit in an output register to remain ON 2 RBIT Clears a bit that has been set via the SBIT instruction 2 Other Math Instructions Instruction Definition Nodes Consumed AD16 Signed unsigned 16 bit addition 3 SU16 Signed unsigned 16 bit subtraction 3 TEST Compares the magnitudes of the values in the top and 3 middle nodes MU16 Signed unsigned 16 bit multiplication 3 DV16 Signed unsigned 16 bit division 3 ITOF Signed unsigned integer to floating point conversion 3 FTOI Floating point to signed unsigned integer conversion 3 EMTH Performs 38 math operations including floating point 3 math operations and extra integer math operations such as square root BCD Converts binary values to BCD values and BCD values 3 to binary values 10 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Ladder Logic Overview Instruction Definition Nodes Consumed Equation Network Uses an entire ladder logic network as an editing environment where a user can enter equations in a standard syntax 77 Interrupt Instructions Instruction Definition Nodes Consumed ITMR Defines an in
133. d in a 984 Hot Standby system This method is particularly useful if you are porting Hot Standby code from a 984 application to a Quantum application The structure of the CHS instruction is almost exactly the same as the HSBY instruction You simply remove the HSBY instruction from the 984 ladder logic and replace it with a CHS instruction in the Quantum logic If you are using the CHS instruction in ladder logic the only difference between it and the HSBY instruction is the use of the bottom output This output senses whether or not method 2 has been used If the Hot Standby configuration extension screens have been used to define the Hot Standby configuration the configuration parameters in the screens will override any different parameters defined by the CHS instruction at system startup For detailes discussion of the issues related to the configuration extension capabilities of a Quantum Hot Standby system refer to the Modicon Quantum Hot Standby System Planning and Installation Guide When the CHS instruction is inserted in ladder logic to control the Hot Standby configuration parameters its top input must be connected directly to the power rail by a horizontal short No control logic such as contacts should be placed between the rail and the input to the top node WARNING Erratic behavior in the Hot Standby system Although it is legal to enable and disable the nontransfer area while the Hot Standby system is runni
134. d result posted in designated registers Middle input Ox 1x None ON decimal remainder OFF fractional remainder operand 1 4x INT UINT The first of two contiguous 4xxxx registers is entered in the top top node node The second 4xxxx register is implied Operand 1 is stored here The second 4x register is implied Each register holds a value in the range 0000 through 9999 for a combined double precision value in the range 0 through 99 999 999 The high order half of operand 1 is stored in the displayed register and the low order half is stored in the implied register operand 2 4x INT UINT The first of six contiguous 4x registers is entered in the middle quotient node remainder The remaining five registers are implied middle e The displayed register and the first implied register store the node high order and low order halves of operand 2 respectively for a combined double precision value in the range 0 through 99 999 999 Note Since division by O is illegal a O value causes an error an error trapping routine sets the remaining middle node registers to 0000 and turns the bottom output ON e The second and third implied registers store an eight digit quotient e The fourth and fifth implied registers store the remainder If the remainder is expressed as a fraction it is eight digits long and both registers are used if the remainder is expressed as a decimal it is four digits long and only the fourth implied register is used
135. ded by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Entering Constant Data in an Equation Network Exponential Notation A constant is prefaced with a sign and appended with a data type suffix See p 55 All constant values are in decimal format Hexadecimal values are not allowed in ProWORX If you enter a constant in an equation network without a suffix it is assumed to a signed short integer For example the entries 3574 and 3574S are equivalent A boolean constant must have the suffix B The only two valid boolean constants are 0B and 1B No other values are legal boolean constants Floating point numbers are normally specified in exponential notation as in 1 34E 4 This represents 1 35 times 10 to the 4th power or 1 35 times 0 0001 Thus we would shift the decimal place four places to the left to get 0 000135 The 4 part is called the exponent note the preceding E and can be a positive or negative number In the Equation Network Editor you must also indicate e That these numbers are constants and e Their data types For example integers or floating point numbers The default data type is unsigned 16 bit integer So since the above value is a fraction and therefore must be a floating point number it would have to appear as 1 35E 4F With no data type suffix numbers in exponential notation are assumed to be integers For example 1 35E
136. describes the instruction BCD What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 124 Representation BCD Binary Coded Decimal Conversion 125 043505766 4 2006 123 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BCD Binary to Binary Code Short Description Function The BCD instruction can be used to convert a binary value to a binary coded decimal Description BCD value or a BCD value to a binary value The type of conversion to be performed is controlled by the state of the bottom input 124 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BCD Binary to Binary Code Representation BCD Binary Coded Decimal Conversion Symbol Parameter Description Representation of the instruction CONTROL INPUT ACTIVE Source register destination register BINARY BCD ERROR On BCD to Binary Off Binary to BCD Description of the instruction s parameters Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON enable conversion Bottom input Ox 1x None ON BCD binary conversion OFF binary BCD conversion source 3x 4x INT UINT Source register where the numerical register value to be converted is stored top node destination 4x INT UINT Destination register where the register converted n
137. destination is specified as a constant which implies a Oxxxx For example 00032 implies 12 coils with 00032 Important Care should be taken when converting register data to discretes as coils may inadvertently be activated Note Available only on the 984 351 and 984 455 PLCs 190 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CONV Convert Data Representation CONV Convert Data Symbol Representation of the instruction CONTROL INPUT COMPLETE source CONVERSION CONV ON Binary register OFF BCD Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates specified operation Bottom input Ox 1x None ON Binary OFF BCD source 4x INT UINT Converts content of register top node register 3x INT UINT bottom node Top output Ox None Operation Successful 043505766 4 2006 191 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CONV Convert Data 192 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Counter Timer and Interrupt Function 32 At A Glance Introduction This chapter describes the CTIF instruction What s in this T
138. e 1 Ladder Logic Overview 3 2 Memory Allocation in a PLC 15 3 Ladder Logic Opcodes 27 4 Instructions 35 5 Instruction Groups 37 6 Equation Networks 51 7 Closed Loop Control Analog Values 71 8 Formatting Messages for ASCII READ WRIT Operations 83 9 Coils Contacts and Interconnects 91 10 Interrupt Handling 97 11 Subroutine Handling 99 12 Installation of DX Loadables 101 043505766 4 2006 1 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com General Information 2 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview At a Glance Overview This chapter provides an overview of the Ladder Logic programming language What s in this This chapter contains the following topics 2 Chapters Topic Page Segments and Networks in Ladder Logic How a PLC Solves Ladder Logic Ladder Logic Elements and Instructions 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview Segments and Networks in Ladder Logic Overview A Ladder Logic Network Ladder Logic is an easy to use graphical programming language that implements relay equivalent symbology Its major components are single node elements and multi node instructions These components are programmed into networks which are ladder logic constructs of a prese
139. e with Interrupts Disabled 20 At a Glance Introduction This chapter describes the instruction BMDI What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description BMDI Block Move Interrupts Disabled 136 Representation BMDI Block Move Interrupts Disabled 137 043505766 4 2006 135 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BMDI Block Move with Interrupts Disabled Short Description BMDI Block Move Interrupts Disabled Function The BMDI instruction masks the interrupt initiates a block move BLKM operation Description then unmasks the interrupts 136 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BMDI Block Move with Interrupts Disabled Representation BMDI Block Move Interrupts Disabled Symbol Representation of the instruction CONTROL INPUT 4 ACTIVE source Table of 16 bit locations or table of registers destination Table of 16 bit locations or table of registers BMDI Length 1 100 registers 16 1600 bits table length Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON masks interrupt initiates a block move then unmasks the interrupts source table Ox 1
140. e 1 0 status of input bits is controlled via the process data which reaches the CPU from an entry device Note The x which comes after the first figure of the reference type represents a five figure storage location in the application data store i e if the reference 100201 signifies an input bit in the address 201 of the State RAM When calling up a FFB the associated Argument is transferred xl 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Input words 3x references Instantiation Instruction IL Instruction LL984 Instruction list IL INT Integer literals INTERBUS PCP An input word contains information which come from an external source and are represented by a 16 bit figure A 3x register can also contain 16 sequential input bits which were read into the register in binary or BCD binary coded decimal format Note The x which comes after the first figure of the reference type represents a five figure storage location in the user data store i e if the reference 300201 signifies a 16 bit input word in the address 201 of the State RAM The generation of an Item Instructions are commands of the IL programming language Each operation begins on a new line and is succeeded by an operator with modifier if needed and if necessary for each relevant operation by one or more operands If several operands ar
141. e any disabled coils within the destination matrix without enabling them This can cause personal injury if a coil has disabled an operation for maintenance or repair because the coil s state can be changed by the AND operation Failure to follow this instruction can result in death serious injury or equipment damage 118 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AND Logical And Representation AND Logical And Symbol Parameter Description Representation of the instruction CONTROL iNPUT ACTIVE Source matrix destination matrix Length 1 100 registers 16 to 1600 bits Description of the instruction s parameters Parameters State RAM Reference Data Type Meaning Top input Ox 1x None Initiates AND source matrix Ox 1x 3x 4x BOOL First reference in the source top node WORD matrix destination matrix Ox 4x BOOL First reference in the middle node WORD destination matrix length INT UINT Matrix length range 1 bottom node 100 Top output Ox None Echoes state of the top input 043505766 4 2006 119 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AND Logical And An AND Example When contact 10001 passes power the source matrix formed by the bit pattern in registers 40600 and 40601 is ANDed with the destination matrix form
142. e used they are separated by commas A tag can stand before the instruction which is followed by a colon The commentary must if available be the last element in the line When programming electric controllers the task of implementing operational coded instructions in the form of picture objects which are divided into recognizable contact forms must be executed The designed program objects are on the user level converted to computer useable OP codes during the loading process The OP codes are deciphered in the CPU and processed by the controller s firmware functions so that the desired controller is implemented IL is a text language according to IEC 1131 in which operations e g conditional unconditional call up of Function blocks and Functions conditional unconditional jumps etc are displayed through instructions INT stands for the data type whole number The input appears as Integer literal Base 2 literal Base 8 literal or Base 16 literal The length of the data element is 16 bit The range of values for variables of this data type is from 2 exp 15 to 2 exp 15 1 Integer literals function as the input of whole number values in the decimal system The values may be preceded by the signs Single underline signs _ between figures are not significant Example 12 0 123 456 986 To use the INTERBUS PCP channel and the INTERBUS process data preprocessing PDP the new I O station type INTERBUS PCP is
143. eath serious injury or equipment damage 128 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKM Block Move Representation BLKM Block Move Symbol Representation of the instruction CONTROL INPUT ACTIVE source Table of 16 bit locations or table of registers destination Table of 16 bit locations or table of registers BLKM Length 1 100 registers 16 1600 bits table length Parameter Description of the instruction s parameters Descripron Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates block move source table Ox 1x 3x 4x ANY BIT Source table that will have its contents top node copied in the block move destination Ox 4x ANY BIT Destination table where the contents table of the source table will be copied in middle node the block move table length INT UINT Table size number of registers or 16 bottom node bit words for both the source and destination tables they are of equal length Range 1 100 Top output Ox None Echoes the state of the top input 043505766 4 2006 129 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKM Block Move 130 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKT Block to Tab
144. ed Variables direct Address A contact does not alter the value of the associated variables direct address Xxxiv 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary D Data transfer Settings which determine how information from the programming device is settings transferred to the PLC Data types The overview shows the hierarchy of data types as they are used with inputs and outputs of Functions and Function blocks Generic data types are denoted by the prefix ANY e ANY ELEM e ANY NUM ANY REAL REAL ANY INT DINT INT UDINT UINT e ANY BIT BOOL BYTE WORD e TIME e System data types IEC extensions e Derived from ANY data types DCP I O station With a Distributed Control Processor D908 a remote network can be set up with a parent PLC When using a D908 with remote PLC the parent PLC views the remote PLC as a remote I O station The D908 and the remote PLC communicate via the system bus which results in high performance with minimum effect on the cycle time The data exchange between the D908 and the parent PLC takes place at 1 5 Megabits per second via the remote I O bus A parent PLC can support up to 31 Address 2 32 D908 processors DDE Dynamic The DDE interface enables a dynamic data exchange between two programs under Data Exchange Windows The DDE interface can be used in the extended monitor to call up its own display applic
145. ed by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Descriptions A to D Chapter Chapter Name Page 34 DIOH Distributed I O Health 207 35 DISA Disabled Discrete Monitor 213 36 DIV Divide 217 37 DLOG Data Logging for PCMCIA Read Write Support 223 38 DMTH Double Precision Math 229 39 DRUM DRUM Sequencer 237 40 DV16 Divide 16 Bit 243 104 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 1X3X Input Simulation 13 At A Glance Introduction This chapter describes the instruction 1X3X What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 1X3X Input Simulation 106 Representation 1X3X Input Simulation 107 043505766 4 2006 105 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 1X3X Input Simulation Short Description 1X3X Input Simulation Function The Input Simulation instruction provides a simple method to simulate 1xxxx and Description 3xxx input data values This block is similar to a Block Move the BLKM instruction When the Control Input receives power the source table is copied to the destination input table 106 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 1X3X Input
146. ed by the bit pattern in registers 40604 and 40605 The ANDed bits are then copied into registers 40604 and 40605 overwriting the previous bit pattern in the destination matrix source matrix 40600 1111111100000000 40601 1111111100000000 10001 Original destination matrix 40604 1111111111111111 40605 0000000000000000 ANDed destination matrix 40604 1111111100000000 40605 0000000000000000 Note If you want to retain the original destination bit pattern of registers 40604 and 40605 copy the information into another table using the BLKM instruction before performing the AND operation 120 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AND Logical And Parameter Description Matrix Length The integer entered in the bottom node specifies the matrix length i e the number Bottom Node of registers or 16 bit words in the two matrices The matrix length can be in the range 1 100 A length of 2 indicates that 32 bits in each matrix will be ANDed 043505766 4 2006 121 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AND Logical And 122 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BCD Binary to Binary Code 17 At a Glance Introduction This chapter
147. ee ee eee 598 Representation HSBY Hot Standby 2 0002 e eee eee eee 599 Parameter Description Top Node HSBY Hot Standby 601 Parameter Description Middle Node HSBY Hot Standby 602 Chapter 93 IBKR Indirect Block Read 00000ee cece eens 603 Short Description 0 0 0000 eee 604 Representation IBKR Indirect Block Read 0002022 eee 605 Chapter 94 IBKW Indirect Block Write 000 cece eens 607 Short Description s s x acer acm ORE ERU TR Seb PO RO nh ee T e s 608 Representation IBKW Indirect Block Write a 609 Chapter 95 ICMP Input Compare 0 cee eee e eens 611 Short DESEripliONn s 1a dore one Pana vad eau oe ea mw NG Sooo See 612 Representation ICMP Input Compare 0c eee eee 613 Parameter Description 0000 eee 614 Cascaded DRUM ICMP Blocks 000 cee eee eee 616 Chapter 96 ID Interrupt Disable 000 cece eee eee 617 Short Description ID Interrupt Disable 202 020005 618 Representation ID Interrupt Disable 000002 e eee ee eee 619 Parameter Description ID Interrupt Disable 2005 620 Chapter 97 IE Interrupt Enable 2 0 cece eee eee 621 Short Description IE Interrupt Enable 200200 00 ee 622 Representation IE Interrupt Enable 0 000 eee ee 623 Parameter Description
148. em configuration and control program can be saved under this name All data which results during the creation of the configuration and the program belongs to this parent project for this special automation General identification for the complete set of programming and configuring information in the Project data bank which displays the source code that describes the automation of a system The data bank in the Programming device which contains the projection information for a Project The prototype data file contains all prototypes of the assigned functions Further if available a type definition of the internal status structure is given 043505766 4 2006 xlvii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary REAL REAL stands for the data type real The input appears as Real literal or as Real literal with exponent The length of the data element is 32 bit The value range for variables of this data type reaches from 8 43E 37 to 3 36E 38 Note Depending on the mathematic processor type of the CPU various areas within this valid value range cannot be represented This is valid for values nearing ZERO and for values nearing INFINITY In these cases a number value is not shown in animation instead NAN Not A Number oder INF INFinite Real literal Real literals function as the input of real values in the decimal system Real literals are denoted by the input of the
149. em memory and an interface module at the Remote I O drops For further information see p 83 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Groups Counters and Timers Instructions Counters and Timers Instructions The table shows the counters and timers instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium UCTR Counts up from 0 to a preset yes yes yes yes value DCTR Counts down from a preset yes yes yes yes value to O T1 0 Timer that increments in yes yes yes yes seconds TO 1 Timer that increments in yes yes yes yes tenths of a second T 01 Timer that increments in yes yes yes yes hundredths of a second T1MS Timer that increments in yes yes yes yes one millisecond See note Note The T1MS instruction is available only on the B984 102 the Micro 311 411 512 and 612 and the Quantum 424 02 40 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Instruction Groups Fast I O Instructions Fast I O Instructions The following instructions are designed for a variety of functions known generally as fast I O updating Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium BMDI
150. en the PLC loses power the coil will come back up in the same state for one scan when the PLC s power is restored To define a discrete reference for the coil select it in the editor and click to open a dialog box called Retentative coil latch Symbol AD 043505766 4 2006 93 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils Contacts and Interconnects Contacts Definition of Contacts Contact Normally Open Contact Normally Closed Contact Pos Contacts are used to pass or inhibit power flow in a ladder logic program They are discrete i e each consumes one I O point in ladder logic A single contact can be tied to a Ox or 1x reference number in the PLC s state RAM in which case each contact consumes one node in a ladder network Four kinds of contacts are available e normally open N O contacts e normally closed N C contacts e positive transitional P T contacts e negative transitional N T contacts A normally open NO contact passes power when it is ON To define a discrete reference for the NO contact select it in the editor and click to open a dialog called Normally open contact Symbol 4r A normally closed NC contact passes power when it is OFF To define a discrete reference for the NC contact double ckick on it in the ladder node to open a dialog called Normally closed contact Symbol Ve A positive transi
151. es Coils ellen 173 COMM ASCII Communications Function 175 Short Description COMM ASCII Communications Block 176 Representation COMM ASCII Communications Function 177 COMP Complement a Matrix s 179 Short Descriptio i c hate EU rw e DIDA i weed ble ELERE DD 180 Representation COMP Logical Compliment aeaa 181 Parameter Description nnana ees 183 CONACS MN 185 Short Description Contacts lesse 186 Representation Contacts 0 0 000 eese 187 vi This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 31 CONV Convert Data eerlees 189 Short Description CONV Convert Data a 190 Representation CONV Convert Data 191 Chapter 32 CTIF Counter Timer and Interrupt Function 193 Short Description CTIF Counter Timer and Interrupt Function 194 Representation CTIF Counter Timer Interrupt Function 195 Parameter Description CTIF Register Usage Table Top Node 196 Chapter 33 DCTR Down Counter eeerre en 203 Short Description eee 204 Representation DCTR Down Counter a a aussa ce eee 205 Chapter 34 DIOH Distributed I O Health 207 Short Description nee 208 Representation DIOH Distributed I O Healt
152. es yes LAB Label for a subroutine yes yes yes yes RET Return from a subroutine yes yes yes yes SKPC Skip constant yes yes yes yes SKPR Skip register yes yes yes yes The SKP instruction is a standard instruction in all PLCs It should be used with caution 48 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Groups Special Instructions Special Instructions These instructions are used in special situations to measure statistical events on the overall logic system or create special loop control situations This group provides the following instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium DIOH Distributed I O health yes no no yes PCFL Process control function yes yes no yes library PID2 Proportional integral derivative yes yes yes yes STAT Status yes yes yes yes 043505766 4 2006 49 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Groups Coils Contacts and Interconnects Coils Contacts and Interconnects Coils contacts and interconnects are available at all PLC families normal coil memory retentive or latched coil normally open N O contact normally closed N C contact positive transitional P T contact negative transitional N T contact h
153. expanded and detailed information please see p 226 data area 4x INT UINT First 4x register in a data area used for the middle node source or destination of the specified operation For expanded and detailed information please see p 227 length INT UINT Maximum number of registers reserved for the bottom node data area range O 100 Top output Ox None Echoes state of the top input Middle output Ox None ON error during DLOG operation operation terminated unsuccessfully Bottom output Ox None ON DLOG operation finishes successfully operation successful 043505766 4 2006 225 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DLOG Data Logging for PCMCIA Read Write Support Parameter Description Control Block The 4x register entered in the top node is the first of five contiguous registers in the Top Node DLOG control block The control block defines the function of the DLOG command the PCMCIA flash card window and offset a return status word and a data word count value Register Function Content Displayed Error Status Displays DLOG errors in HEX values First implied Operation Type 1 Write to PCMCIA Card 2 Read to PCMCIA Card 3 Erase One Block 4 Erase Entire Card Content Second Window This register identifies a particular block PCMCIA implied Block Identifier memory window located on the PCMCIA card
154. f DX Loadables 101 Instruction Coils Contacts and Interconnects 91 Instruction Groups 37 ASCII Communication Instructions 39 Coils Contacts and Interconnects 50 Counters and Timers Instructions 40 Fast I O Instructions 41 Loadable DX 42 Math Instructions 43 Matrix Instructions 45 Miscellaneous 46 Move Instructions 47 Overview 38 Skips Specials 48 Special Instructions 49 Integer Floating Point Subtraction 461 Integer Floating Point Addition 275 Integer Divided by Floating Point 361 Integer to Floating Point 645 Integer x Floating Point Multiplication 405 Integer Floating Point Comparison 313 Integer to Floating Point Conversion 331 Integrate Input at Specified Interval 827 Interconnects 91 Interrupt Disable 617 Interrupt Enable 621 Interrupt Handling 97 Interrupt Module Instruction 631 Interrupt Timer 639 ISA Non Interacting PI 865 ITMR 639 ITOF 645 J JSR 649 Jump to Subroutine 649 L LAB 653 Label for a Subroutine 653 Limiter for the Pv 837 Ix This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Index LL984 AD16 109 ADD 113 AND 117 BCD 123 BLKM 127 BLKT 131 BMDI 135 BROT 139 CHS 157 CKSM 163 Closed Loop Control Analog Values 71 CMPR 167 Coils Contacts and Interconnects 91 COMP 179 DCTR 203 DIOH 207 DIV 217 DLOG 223 DRUM 237 DV16 243 EMTH 259 EMTH ADD
155. fourth implied registers store the high order and low order halves of the double precision sum respectively e The fifth implied register is not used in the calculation but must exist in state RAM Top output None ON operand 1 operand 2 Middle output Ox None ON operand 1 operand 2 Bottom output Ox None ON operand 1 lt operand 2 043505766 4 2006 233 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DMTH Double Precision Math Symbol Representation of the instruction for the Multiplication operation Multiplication CONTROL INPUT ON OPERATION SUCCESSFUL operand 1 ERROR operand 2 product Parameter Description of the instruction s parameters for the Multiplication operation Description Multiplication Parameters State RAM Data Type Meaning Reference Top input Ox 1x None ON operand 1 x operand 2 and product posted in designated registers operandi 4x INT UINT The first of two contiguous 4xxxx registers is top node entered in the top node The second 4xxxx register is implied Operand 1 is stored here The second 4x register is implied Each register holds a value in the range 0000 through 9999 for a combined double precision value in the range 0 through 99 999 999 The high order half of operand 1 is stored in the displayed register and the low order half is stored
156. gnment of configured memory can be directly and indirectly derived from the physical memory Document A window within an Application window Several document windows can be opened window at the same time in an application window However only one document window can be active Document windows in Concept are for example sections the message window the reference data editor and the PLC configuration Dummy An empty data file which consists of a text header with general file information i e author date of creation EFB identifier etc The user must complete this dummy file with additional entries xxxvi 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary DX Zoom This property enables connection to a programming object to observe and if necessary change its data value E Elementary Identifier for Functions or Function blocks whose type definitions are not formulated functions in one of the IEC languages i e whose bodies for example cannot be modified with function blocks EFB EN ENO Enable Error display Error Evaluation Expression the DFB Editor Concept DFB EFB types are programmed in C and mounted via Libraries in precompiled form If the value of EN is O when the FFB is called up the algorithms defined by the FFB are not executed and all outputs contain the previous value The value of ENO is automatically set to O in this
157. gram For larger applications such as multi drop remote I O applications several segments may be programmed As arule in RIO configurations the number of segments in the program equals the number of I O drops you may want to use more segments than drops but never fewer segments than drops Segments are numbered 1 n up to a maximum of 32 in the order they are created by the programmer You may modify the order in which segments are solved with the segment scheduler an editor available with your panel software that allows you to adjust the order of solve table in system memory Refer to Appendix A for a description of how to improve system performance via the segment scheduler With some PLCs you may also create an unscheduled segment that contains one or more ladder logic subroutines which can be called from the scheduled segments via the JSR function 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview How a PLC Solves Ladder Logic Overview The PLC scans the ladder logic program sequentially in the following order e Segments are scanned according to the way they are scheduled in an order of solve table known as the segment scheduler The segment scheduler can be customized during system configuration or it can default to a standard scanning sequence segment 1 followed by segment 2 followed by segment 3 etc e Networks in each segment are
158. h lille 209 Parameter Description l l en 211 Chapter 35 DISA Disabled Discrete Monitor 213 Short Description DISA Disabled Discrete Monitor 214 Representation DISA Disabled Discrete Monitor 215 Chapter 36 DIV Divide 2 2a KB oe Re RELLRRRERRPEEEAREEERO EGER 217 Short DescriptlOn x i ed rr RE EE ERE REPE IE EUR RES 218 Representation DIV Single Precision Division a 219 Example errire pa rb RR RR EEE ETUR DR ERRARE EF GE ERE EE 221 Chapter 37 DLOG Data Logging for PCMCIA Read Write Support 223 Short Description eee 224 Representation DLOG 0 000 ees 225 Parameter Description llli en 226 Run Time Error Handling llle 228 Chapter 38 DMTH Double Precision Math 229 Short Description DMTH Double Precision Math Addition Subtraction Multiplication and Division 230 Representation DMTH Double Precision Math Addition Subtraction Multiplication and Division 231 Chapter 39 DRUM DRUM Sequencer 0000e cece eens 237 Short Description 0 0 0 000 ce ee tees 238 Representation DRUM 0 0 0 eee eens 239 Parameter Description 000 ee 241 vii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 40 Part Ill Chapter 41
159. he PID functions in PCFL offer varying degrees of functionality Function PID has the same general functionality as the PID2 instruction but uses floating point math and represents some options differently PID is beneficial in cases where PID2 is not suitable because of numerical concerns such as round off Meaning of formula elements in the following formulas Formula Formula elements Meaning Elements Y Manipulated variable output YP Proportional part of the calculation YI Integral part of the calculation YD Derivative part of the calculation Bias Constant added to input BT Bumpless transfer register SP Set point 043505766 4 2006 73 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Closed Loop Control Analog Values Formula elements Meaning KP Proportional gain Dt Time since last solve TI Integral time constant TD Derivative time constant TD1 Derivative time lag XD Error term deviation XD 1 Previous error term Process input X 1 Previous process input General The following general equations are valid Equations Equation Condition Requirement Y YP YI YD BIAS Integral bit ON Y YP YD BIAS BT Integral bit OFF Vue vey low High low limits with YP YI YD f XD XD SP X GRZ x 1 KGRZ
160. he sixth position to the right of the decimal point For example the 140 CPU 424 02 and 213 04 will calculate the equation 401010F SIN 45 and produces the result 0 8509035 whereas the 140 CPU 113 02 03 will handle the same equation and produce the result 0 8509022 For applications that require accuracy beyond the 5th decimal position a Quantum PLC with a math coprocessor is recommended Generally if your application does not require this kind of accuracy a PLC without a math coprocessor may be acceptable Another potential consideration is the effect of less accurate calculation on a truncated result For example a PLC with a math coprocessor will calculate the tangent of 225 degrees 401015F TAND 225 as 1 whereas a PLC without a math coprocessor will produce the result 0 999991 If we were to assign the TAND operation to a non floating point register equation network will truncate the result so that 401040 TAND 225 will produce a result of 1 when the math coprocessor is used but a result of 0 when the coprocessor is not used 68 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Benchmark Performance Benchmark Benchmark tests were performed on 3 Quantum PLCs CPU113 CPU213 and Performance CPU424 solving the same equation with an equation network operation and EMTH ladder logic operations The equation was A B C
161. his chapter contains the following topics Spent Topic Page Short Description CTIF Counter Timer and Interrupt Function 194 Representation CTIF Counter Timer Interrupt Function 195 Parameter Description CTIF Register Usage Table Top Node 196 043505766 4 2006 193 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Counter Timer and Interrupt Function Short Description CTIF Counter Timer and Interrupt Function Function The CTIF block is used by a parent PLC to access child functions over an I O Description expansion bus The Parent function block will complete in the same scan If multiple blocks exist the last one executed will be used The CTIF instruction is used with the Micro PLCs to set up the inputs for hard wired interrupt and or hard wired counter timer operations This instruction always starts and finishes in the same scan The CTIF instruction is a configuration operation tool for Modicon Micro PLCs that contain hardware interrupts all models except the 110CPU311 Models The actual counter timer and interrupts are in the PLC hardware and the CTIF instruction is what is used to set up this hardware Note The Counter Timer Interrupt function CTIF is only available on Micro 31 1 411 512 and 612 controllers 194 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Cou
162. his format and therefore the allowable range for the length value specified in the bottom node is 3 255 Control Usage of word Mask Word 1 2 13 4 5 6 748 9 10 11 12 13 14 15 16 Bit Function 1 1 port can be taken 0 port cannot be taken 2 15 Not used 16 1 control RTS 0 do not control RTS 88 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Formatting Messages for ASCII READ WRIT Operations Control Data Word Status Word Usage of word 1 2 3 4 5 6 74 8 9 10 11 12 13 14 15 16 Bit Function 1 1 take port 0 return port 2 15 Not used 16 1 activate RTS 0 deactivate RTS Usage of word 1 172 3 4 5 6 7 48 9 10 11 12 13 14 15 16 Bit Function 1 1 port taken 2 1 port ACTIVE as Modbus slave 3 13 Not used 14 1 2 DSR ON 15 12 CTS ON 16 1 2 RTS ON 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 89 Formatting Messages for ASCII READ WRIT Operations 90 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Coils Contacts and Interconnects 9 At a Glance Introduction In this chapter you will find i
163. iables one of which is assigned with the assistance of the key word ARRAY field a defined Derived data type A field is a collection of data elements of the same Data type Finite Impulse Response Filter Input Output parameters which are used within the logic of a FFB and led out of the FFB as inputs outputs A Program organization unit which exactly supplies a data element when executing A function has no internal status information Multiple call ups of the same function with the same input parameter values always supply the same output values Details of the graphic form of function call up can be found in the definition Function block Item In contrast to the call up of function blocks the function call ups only have one unnamed output whose name is the name of the function itself In FBD each call up is denoted by a unique number over the graphic block this number is automatically generated and cannot be altered A function block is a Program organization unit which correspondingly calculates item FB the functionality values defined in the function block type description for the output and internal variables when it is called up as a certain item All output values and internal variables of a certain function block item remain as a call up of the function block until the next Multiple call up of the same function block item with the same arguments Input parameter values supply generally supply the same output va
164. ified block of data 3 FIN Specifies first entry in a FIFO queue 3 FOUT Specifies first entry out of a FIFO queue 3 SRCH Performs a table search 3 STAT Displays status registers from status 1 table in system memory DX Matrix Instructions Instruction Definition Nodes Consumed AND Logically ANDs two matrices 3 OR Does logical inclusive OR of two matrices 3 XOR Does logical exclusive OR of two matrices 3 3 COMP Performs logical complement of values in a matrix 3 CMPR Logically compares values in two matrices 3 MBIT Logical bit modify 3 043505766 4 2006 9 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview Built in Ladder Logic Instruction for Select PLCs Instruction Definition Nodes Consumed SENS Logical bit sense 3 BROT Logical bit rotate 3 Skip Node Instruction Instruction Definition Nodes Consumed SKP Skips a specified number of networks in a ladder logic program Some ladder logic instructions are standard built in to some PLCs but unavailable in others For example PLCs with the Modbus Plus communication capability built in it are shipped with an MSTR instruction in the firmware while PLCs that cannot operate on Modbus Plus do not support this instruction Here is a list of these select built in instruction Bit Manipulation Instructions Instruction Definition Nodes Consume
165. ily TSX Compact PCMCIA read and write support consists of a configuration extension to be implemented using a DLOG instruction The DLOG instruction provides the facility for an application to copy data to a PCMCIA flash card copy data from a PCMCIA flash card erase individual memory blocks on a PCMCIA flash card and to erase an entire PCMCIA flash card The data format and the frequency of data storage are controlled by the application Note The DLOG instruction will only operate with PCMCIA linear flash cards that use AMD flash devices 224 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DLOG Data Logging for PCMCIA Read Write Support Representation DLOG Symbol Representation of the instruction CONTROL INPUT ACTIVE control block TERMINATE ACTIVE OPERATION TERMINATED DLOG OPERATION data area UNSUCCESSFULLY OPERATION SUCCESS DLOG FUL length Parameter Description of the instruction s parameters Description Parameters State RAM Data Type Meaning Reference Top input Ox 1x None ON DLOG operation enabled it should remain ON until the operation has completed successfully or an error has occurred Middle input Ox 1x None ON stops the currently active operation control block 4x INT UINT First of five contiguous registers in the DLOG top node control block For
166. in Equation Networks Equation Format Equation Values and Data Types Equation elements appear in specific formats Operations and functions each have their own format Also for each value you must specify what kind of value it is register address constant or symbol and its data type signed integer unsigned integer etc Each value can refer to a constant register address or symbol The Equation Network Editor determines which data type the value is based on the following format Format Meaning Example Default no sign or single quotes Register address 40001 Prefixed by Constant 123 Enclosed in single quotes Symbol HEIGHT The actual data type of a value is determined by its suffix as shown in the following table Suffix Data Type Applies to B Boolean binary Constants 1x or Ox U 16 bit unsigned short integer Constants 3x or 4x S Signed short integer Constants 3x or 4x L 32 bit signed long integer Constants 3x or 4x UL 32 bit unsigned long integer Constants 3x or 4x F 32 bit floating point number Constants 3x or 4x Typically you d first indicate the register address where the calculated result is to be stored followed by an equal sign the assignment operator followed by the calculation itself For example 40001 40002U COS 40003UL 1 35E 4F HE e 40002U is an address of a 16 bit unsigned integer e COS 40
167. isters required in the step data table is the length 6 The length must be greater or equal to the value placed in the steps used register in the middle node 242 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DV16 Divide 16 Bit 40 At a Glance Introduction This chapter describes the instruction DV16 What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 244 Representation DV16 16 bit Division 245 Example 247 043505766 4 2006 243 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DV16 Divide 16 Bit Short Description Function The DV16 instruction performs a signed or unsigned division on the 16 bit values in Description the top and middle nodes value 1 value 2 then posts the quotient and remainder in two contiguous 4x holding registers in the bottom node 244 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DV16 Divide 16 Bit Representation DV16 16 bit Division Symbol Representation of the instruction CONTROL INPUT 4 value 1 ON fractional remainder 4 OFF decimal remainder value 2 SIGNED 4 DV16 quotient r SUCCESSFUL COMPLETION L OVERFLOW unsigned 65535 signed gt 32767 or lt 32767 ERROR
168. ith the suffix U e g 300004U you indicate that a single register containing an unsigned 16 bit integer variable is used with the suffix L you indicate that two contiguous registers containing a signed 32 bit long integer variable are used e g 400012L implies that register 400013 is also used with the suffix UL you indicate that two contiguous registers containing an unsigned 32 bit long integer variable are used e g 300006UL imples that register 300007 is also used with the suffix F you indicate that two contiguous registers containing a floating point variable are used e g 400101F implies that register 400102 is also used Note You cannot append a 3x or 4x register with the suffix B Constant Data Constants can also be used to specify data in an equation network Long 32 bit constants and floating point constants always require two words The least significant byte LSB is always in the first of the two words Both words must have the same data type Data Type Words Consumed Valid Range of Values Boolean One 0 1 Signed 16 bit constant One 32 768 432 767 Unsigned 16 bit constant One 0 65 535 Signed long 32 bit constant Two 2 x 109 2 x 109 Unsigned long 32 bit constant Two 0 4 294 967 295 Floating point constant Two 8 43 x 1037 lt Ixl lt 3 402 x 1038 043505766 4 2006 57 This document provi
169. ity of the first of three arguments in a conditional expression and execute it by copying the value from either the second or third argument in the conditional expression to the result register If the expression being evaluated contains only some combination of unary exponentiation mathematical and or logical bitwise operators it is treated as a single argument and is solved via single expression For example in the equation 400001 16 42 5 7 the square of 16 256 minus 5 251 is multiplied by 7 and the result 1 757 is copied to register 400001 If you use one or more of the six relational operators shown in the previous table you create the first of three arguments that comprise a conditional expression The conditional operators must be used to create then else arguments in the expression and conditional expression is used to execute the result For example in the equation 400001 400002 gt 100 300001 300002 the value in register 400002 is evaluated to see if it is greater than or equal to 100 This is the first argument in the conditional expression If the value is greater than or equal to 100 the second argument is executed and the value in register 300001 is copied to register 400001 It is less than 100 the third argument is executed and the value in register 300002 is copied to register 400001 043505766 4 2006 61 This document provided by Barr Thorp Electric Co Inc 800 473 91
170. ives you the status for the Get Mode operation When you 4x12 Usage configure the register you need to consider both how the bits will be used Bit Usage and the results of the ON OFF Combinations Here is a graphic demonstrating the Bit Usage for the third register 4x42 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 198 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Counter Timer and Interrupt Function The following table describes Bit Usage and ON OFF Combinations for bits 1 through 16 for the third register 4x42 Bit Usage No subroutine for Interrupt 3 No subroutine for Interrupt 2 No subroutine for Interrupt 1 AJOI NJ No subroutine for timer counter interrupt 5 9 Reserved 10 Interrupt 3 0 Disabled 1 Enabled 11 Interrupt 2 0 Disabled 1 Enabled 12 Interrupt 1 0 Disabled 1 Enabled 13 Interrupt serve for time counter input 0 Disabled 1 Enabled 14 Auto restart operation 0 Disabled 1 Enabled 15 Counter timer operation 0 Stopped 1 Started 16 0 Counter Mode 1 Timer Mode Fourth Register The fourth register marks the current count value of the timer counter interrupt 4x43 Usage The count value can be set either by the instruction block set automatically or by the user e Get
171. k eed dex e Ro KAPA eae Kaha CX ee Ce 276 Representation EMTH ADDIF Integer Floating Point Addition 277 Parameter Description eese 278 EMTH ANLOG Base 10 Antilogarithm 279 Short Description erre 280 Representation EMTH ANLOG integer Base 10 Antilogarithm 281 Parameter Description erre 283 EMTH ARCOS Floating Point Arc Cosine of an Angle in Radians elee 285 Short Description se ox au mm UY me ge xA ei ea Ee XC RR een ena ds 286 Representation EMTH ARCOS Floating Point Math Arc Cosine of an Angle in Radians a 287 Parameter Description erre 289 viii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 48 EMTH ARSIN Floating Point Arcsine of an Angle in Radians 291 Short Descriptio lt s ani siaa ne 292 Representation EMTH ARSIN Arcsine of an Angle in Radians 0 000 c eee ee eee 293 Parameter Description llli ee 294 Chapter 49 EMTH ARTAN Floating Point Arc Tangent of an Angle in Radians 295 Short Description 00 ce tenes 296 Representation Floating Point Math Arc Tangent of an Angle in Radians 0 002 cece eee eens 297 Parameter Description 0 000 eee eee 299 Chapter 50 EMTH CHSIN Changing the Sign of a Floa
172. l instructions are available to help protect data in both the normal scheduled ladder logic and the unscheduled interrupt handling subroutine logic These are the Interrupt Disable ID instruction the Interrupt Enable IE instruction and the Block Move with Interrupts Disabled BMDI instruction An interrupt that is executed in the timeframe after an ID instruction has been solved and before the next IE instruction has been solved is buffered The execution of a buffered interrupt takes place at the time the IE instruction is solved If two or more interrupts of the same type occur between the ID IE solve the mask interrupt overrun error bit is set and the subroutine initiated by the interrupts is executed only one time The BMDI instruction can be used to mask both a timer generated and local I O generated interrupts perform a single block data move then unmask the interrupts It allows for the exchange of a block of data either within the subroutine or at one or more places in the scheduled logic program BMDI instructions can be used to reduce the time between the disable and enable of interrupts For example BMDI instructions can be used to protect the data used by the interrupt handler when the data is updated or read by Modbus Modbus Plus Peer Cop or Distributed I O DIO 98 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Subroutine Handling 11
173. le 19 At a Glance Introduction This chapter describes the instruction BLKT What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 132 Representation BLKT Block to Table Move 133 Parameter Description 134 043505766 4 2006 131 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKT Block to Table Short Description Function Description The BLKT block to table instruction combines the functions of R T and BLKM in a single instruction In one scan it can copy data from a source block to a destination block in a table The source block is of a fixed length The block within the table is of the same length but the overall length of the table is limited only by the number of registers in your system configuration A WARNING All the 4x registers in your PLC can be corrupted with data copied from the source block BLKT is a powerful instruction that can corrupt all the 4x registers in your PLC with data copied from the source block You should use external logic in conjunction with the middle or bottom input to confine the value in the pointer to a safe range Failure to follow this instruction can result in death serious injury or equipment damage 132 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKT
174. lectric Co Inc 800 473 9123 www barr thorp com CMPR Compare Register Representation CMPR Logical Compare Symbol Representation of the instruction CONTROL INPUT 4 ACTIVE i matrix a First register or discrete address of matrix RESET POINTER MISCOMPARE pointer register matrix b STATE OF MISCOMPARE CMPR Length 1 to 100 registers 16 to 1600 bits length Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input 0x 1x None ON initiates compare operation Middle input 0x 1x None OFF restart at last miscompare ON restart at the beginning matrix a Ox 1x 3x 4x ANY BIT First reference in matrix a one of the top node two matrices to be compared pointer register 4x WORD Pointer to matrix b the first register middle node in matrix b is the next contiguous 4x register following the pointer register length INT UINT Matrix length range 1 100 bottom node Top output Ox None Echoes state of the top input Middle output Ox None ON miscompare detected Bottom output Ox None ON miscompared bit in matrix a is 1 OFF miscompared bit in matrix a is 0 043505766 4 2006 169 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CMPR Compare Register Parameter Description Pointer Register Middle Node
175. led into the Concept configurator This I O station type is assigned fixed to the INTERBUS connection module 180 CRP 660 01 The 180 CRP 660 01 differs from the 180 CRP 660 00 only by a clearly larger I O area in the state RAM of the controller 043505766 4 2006 xli This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Item name An Identifier which belongs to a certain Function block item The item name serves as a unique identifier for the function block in a program organization unit The item name is automatically generated but can be edited The item name must be unique throughout the Program organization unit and no distinction is made between upper lower case If the given name already exists a warning is given and another name must be selected The item name must conform to the IEC name conventions otherwise an error message appears The automatically generated instance name always has the structure FBl n m FBI Function block item n Section number number running m Number of the FFB object in the section number running Jump Element of the SFC language Jumps are used to jump over areas of the chain Key words Key words are unique combinations of figures which are used as special syntactic elements as is defined in appendix B of the IEC 1131 3 All key words which are used in the IEC 1131 3 and in Concept are listed in appendix C of the IEC 1131 3
176. lication window corresponds to a Project Synonymous with Actual parameters American Standard Code for Information Interchange The ASCII mode is used for communication with various host devices ASCII works with 7 data bits The PC based controller is located on a standard AT board and can be operated within a host computer in an ISA bus slot The module occupies a motherboard requires SA85 driver with two slots for PC104 daughter boards From this a PC104 daughter board is used as a CPU and the others for INTERBUS control xxxii 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Back up data file Concept EFB Base 16 literals Base 8 literal Basis 2 literals Binary connections Bit sequence BOOL The back up file is a copy of the last Source files The name of this back up file is backup c it is accepted that there are no more than 100 copies of the source files The first back up file is called backupOO c If changes have been made on the Definition file which do not create any changes to the interface in the EFB there is no need to create a back up file by editing the source files Objects Source If a back up file can be assigned the name of the source file can be given Base 16 literals function as the input of whole number values in the hexadecimal system The base must be denoted by the prefix 164 The values may not be
177. ls whether those coils are disabled or not and this recognition causes the logic to respond accordingly maybe producing unexpected and undesirable effects If you are expecting a disabled coil to remain disabled in the DX function your application may experience unexpected and undesirable effects Forcing Most panel software also provides FORCE ON and FORCE OFF capabilities When Discretes a coil or discrete input is disabled you can change its state from OFF to ON with ON and OFF FORCE ON and from ON to OFF with FORCE OFF When a coil or discrete input is enabled it cannot be forced ON or OFF 043505766 4 2006 173 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils 174 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMM ASCII Communications Function 2 8 At A Glance Introduction This chapter describes the COMM instruction What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description COMM ASCII Communications Block 176 Representation COMM ASCII Communications Function 177 043505766 4 2006 175 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMM ASCII Communications Function Short Description COMM ASCII Communications Block Function The ASCII Communications F
178. ls displayed differently according to user preference The first example shows the coils displayed in their logic solve positions and the second example shows the coils displayed in expanded positions IH HO 10032 10033 00101 10034 00102 Coils Displayed in Logic solve Positions ir 10032 10033 00101 4 10034 00102 LLL 4 00103 Coils Displayed in Expanded Positions Although the coil expansion display shows the coils in the 11th column they are solved in their real logic solve position Coil 00103 is solved immediately after contact 10034 and coil 00102 is solved immediately after contact 10033 in both examples above Coil 00101 is always the last coil solved in the network 043505766 4 2006 5 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview Ladder Logic Segments Because the structure of a network is fixed the logic program generally overlaps into multiple networks A group of contiguous networks performing a task or subtask in the application program is called a segment There is no prescribed limit on the number of networks that can be placed in a segment size is limited only by the amount of UserMemory available and by the maximum amount of PLC scan time 250 ms For small ladder logic applications a single segment may be sufficient to store the whole pro
179. lue s Each function block item is displayed graphically by a rectangular block symbol The name of the function block type is located on the top center within the rectangle The name of the function block item is located also at the top but on the outside of the rectangle An instance is automatically generated when creating which can however be altered manually if required Inputs are displayed on the left side and outputs on the right of the block The names of the formal input output parameters are displayed within the rectangle in the corresponding places The above description of the graphic presentation is principally applicable to Function call ups and to DFB call ups Differences are described in the corresponding definitions xxxviii 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Function block dialog FBD Function block type Function counter One or more sections which contain graphically displayed networks from Functions Function blocks and Connections A language element consisting of 1 the definition of a data structure subdivided into input output and internal variables 2 A set of operations which is used with the elements of the data structure when a function block type instance is called up This set of operations can be formulated either in one of the IEC languages DFB type or in C EFB type A function block type can be inst
180. mation defining your control system capabilities and your user logic program With your programming panel software you can access the configurator editor which allows you to specify the configuration parameters such as those shown on the following page for your control system When a PLC s memory is empty in a state called DIM AWARENESS you are not able to write a I O map or a user logic program Therefore the first programming task you must undertake with a new PLC is to write a valid configuration table using your configurator editor A Ox coil can be set aside in the configuration to reflect the current status of the PLC s battery backup system If this coil has been set and is queried it displays a discrete value of either O indicating that the battery system is healthy or 1 indicating the battery system is not healthy A 4x register can be set aside in the configuration as a synchronization timer It stores a count of clock cycles in 10 ms increments If this register is set and queried it displays a free running value that ranges from 0000 to FFFF hex with wrap around to 0000 Note If you are doing explicit address routing in bridge mode on a Modbus Plus network the location of the explicit address table in the configuration is dependent on the timer register address i e a timer register must be assigned in order to create the explicit address table The explicit address table can consist of from 0
181. n network Using the Equation Network Step Action 1 Enter the equation 2 Inthe Properties panel click the Input Type field and select an input type from the list In the Input Offset field enter the input reference Set the register address for the output coils You can enter either the direct address in X Y numeric format or a symbolic address You can also insert addresses from the Symbols panel Used Register Address table and the Descriptor Summary See below for coil descriptions 5 To enter an equation into the network e Click the ellipsis box in the Equation field Or e Double click anywhere in the Equation Network Editor 52 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Coil Descriptions Enter a Ox reference Coil Description Solved OK Solved OK is set when the equation is being solved without errors Coil Result 0 is set when the equation result is less than zero Coil Result 0 is set when the equation result is equal to zero Coil Result 0 is set when the equation result is greater than zero Error Coil The error coil is set when errors have occurred while solving the equation While online if the error coil receives power an error message will appear under the coil describing the error see p 53 Note If you don t want to use a particular output coil leave
182. ne per row When a coil is placed in a row no other logic elements or instruction nodes can appear to the right of the coil s logic solve position in the row Coils are the only ladder logic elements that can be inserted in column 11 of a network To define a discrete reference for the coil select it in the editor and click to open a dialog box called Coil Symbol o WARNING Forcing of Coils When a discrete input 1x is disabled signals from its associated input field device have no control over its ON OFF state When a discrete output 0x is disabled the PLC s logic scan has no control over the ON OFF state of the output When a discrete input or output has been disabled you can change its current ON OFF state with the Force command There is an important exception when you disable coils Data move and data matrix instructions that use coils in their destination node recognize the current ON OFF state of all coils in that node whether they are disabled or not If you are expecting a disabled coil to remain disabled in such an instruction you may cause unexpected or undesirable effects in your application When a coil or relay contact has been disabled you can change its state using the Force ON or Force OFF command If a coil or relay is enabled it cannot be forced Failure to follow this instruction can result in death serious injury or equipment damage If a retentive latched coil is energized wh
183. ned without checking for overflow An operation involving a boolean and any other data type uses the other data type and assigns a value of 1 or 0 to the boolean An operation between floating point numbers and signed or unsigned numbers automatically promotes the long integer to floating point and assumes assigned number without checking for overflow An operation involving a bitwise logical AND OR or XOR does not check data types and automatically assumes unsigned numbers A bitwise logical AND OR or XOR operation with a boolean argument results in a O false or a OXFFFFFFFF true The unary NOT ONE s complement operation does not operate on floating point numbers and treats signed numbers as if they were unsigned In a shift forward or shift back operation the number by which the argument is being shifted is always treated as a positive integer between O 32 If the value of the by number 32 it is automatically ANDed with Ox1f to make it 32 Signed numbers are shifted arithmetically and unsigned numbers are shifted logically A floating point number that is shifted becomes useless since its data type remains unchanged Attempting to shift a boolean argument produces an error The unary negation of an unsigned number produces that number s 2 s complement The unary negation of a signed or floating point number changes the sign of the number The unary negation of a boolean operator results in a change of true false state
184. network and uses a word of memory in the PLC Symbol A vertical short connects contacts or nodes in an instruction positioned one above the other in a column Vertical shorts can also connect inputs or outputs in an instruction to create either or conditions When two contacts are connected by a vertical short power is passed when one or both contacts receive power The vertical short is unique in two ways e t can coexist in a network node with another element or nodal value e t does not consume any PLC memory Symbol 96 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Interrupt Handling 10 Interrupt Handling Interrupt related The interrupt related instructions operate with minimum processing overhead The Performance performance of interrupt related instructions is especially critical Using a interval timer interrupt ITMR instruction adds about 696 to the scan time of the scheduled ladder logic this increase does not include the time required to execute the interrupt handler subroutine associated with the interrupt Interrupt The following table shows the minimum and maximum interrupt latency times you Latency Time can expect ITMR overhead No work to do 60 ms ms Response time Minimum 98 ms Maximum during logic solve and Modbus command reception 400 ms Total overhead not counting normal logic solve time 1
185. nformation about Coils Contacts and Interconnects also called Shorts Details of all the elements in the Ladder Logic Instruction Set appear in an alphabetical listing What s in this This chapter contains the following topics Chapter Topic Page Coils 92 Contacts 94 Interconnects Shorts 96 043505766 4 2006 91 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils Contacts and Interconnects Coils Definition A coil is a discrete output that is turned ON and OFF by power flow in the logic of Coils program A single coil is tied to a Ox reference in the PLC s state RAM Because output values are updated in state RAM by the PLC a coil may be used internally in the logic program or externally via the I O map to a discrete output unit in the control System When a coil is ON it either passes power to a discrete output circuit or changes the state of an internal relay contact in state RAM There are two types of coils e A normal coil e A memory retentive or latched coil 92 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils Contacts and Interconnects Normal Coil Retentive Coil A normal coil is a discrete output shown as a Ox reference A normal coil is ON or OFF depending on power flow in the program A ladder logic network can contain up to seven coils no more than o
186. ng we strongly discourage this practice It can lead to erratic behavior in the Hot Standby system Failure to follow this instruction can result in death serious injury or equipment damage 160 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CHS Configure Hot Standby Parameter The 4x register entered in the top node is the Hot Standby command register eight Description bits in this register are used to configure and control Hot Standby system Command parameters Register Usage of command word Top Node 11213 14 5 6 718 9 10 11 12 13 14 15 16 Bit Function 1 5 Not used 6 0 2 swap Modbus port 3 address during switchover 1 no swap 7 0 2 swap Modbus port 2 address during switchover 1 no swap 8 0 swap Modbus port 1 address during switchover 1 no swap 9 11 Not used 12 0 allow exec upgrade only after application stops 1 allow the upgrade without stopping the application 13 0 force standby offline if there is a logic mismatch 1 do not force 14 0 controller B is in OFFLINE mode 1 controller B is in RUN 15 0 controller A is in OFFLINE mode 1 controller A is in RUN 16 0 disable keyswitch override 1 enable the override Note The Hot Standby command register must be outside of the nontransfer area of state RAM 0
187. node then posts the sum in a 4x holding register in the bottom node 110 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AD16 Ad 16 Bit Representation AD16 16 bit Addition Symbol Representation of the instruction CONTROL INPUT 4 SUCCESSFUL COMPLETION value 1 Max Value 65535 value 2 Max Value 65535 SIGNED VALUE AD16 OVERFLOW unsigned 65535 signed 32767 or lt 32768 sum Parameter Description of the instruction s parameters Description Parameters State RAM Data Type Meaning Reference Top input Ox 1x None ON add value 1 and value 2 Bottom input Ox 1x None ON signed operation OFF unsigned operation value 1 3x 4x INT UINT Addend can be displayed explicitly as an top node integer range 1 65 535 or stored ina register value 2 3x 4x INT UINT Addend can be displayed explicitly as an middle node integer range 1 65 535 or stored ina register sum 4x INT UINT Sum of 16 bit addition bottom node Top output Ox None ON successful completion of the operation Bottom output Ox None ON overflow in the sum 043505766 4 2006 111 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com AD16 Ad 16 Bit 112 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766
188. nstructions Move Instructions This group provides the following instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium BLKM Block move yes yes yes yes BLKT Table to block move yes yes yes yes FIN First in yes yes yes yes FOUT First out yes yes yes yes IBKR Indirect block read yes yes no yes IBKW Indirect block write yes yes no yes RoT Register to tabel move yes yes yes yes SRCH Search table yes yes yes yes TOR Table to register move yes yes yes yes ToT Table to table move yes yes yes yes TBLK Table to block move yes yes yes yes 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 47 Instruction Groups Skips Specials Skips Specials DANGER Inputs and outputs that normally effect control may be unintentionally skipped or not skipped SKP is a dangerous instruction that should be used carefully If inputs and outputs that normally effect control are unintentionally skipped or not skipped the result can create hazardous conditions for personnel and application equipment Failure to follow this instruction will result in death or serious injury This group provides the following instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium JSR Jump to subroutine yes yes y
189. nt provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate DX Function Representation CALL Activate Deferred DX Function Overview The content in this section applies specifically to the Deferred DX function of the CALL instruction Symbol Representation of the instruction for a Deferred DX CALL CONTROL INPUT COMPLETE function code DEFERRED DX MODE ACTIVE SELECTED source table ERROR Length 1 255 CALL length 148 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate DX Function Parameter Description of the instruction s parameters for a Deferred DX CALL Besenpian Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates the CALL Middle input Ox 1x None The instruction calls a deferred DX when the input to the middle node is enabled A list of the codes their names and their function is detailed in the table below named Deferred DX Functions value Ox 3x INT UINT The top node is used to specify the top node function code to be executed It may be entered explicitly as a constant or as a value in a 4xxxx holding register The codes fall into two ranges e Othrough 499 are for user definable DXs e 500 through 9999 are for System DXs Both User definable and System definable codes apply to both
190. nter Timer and Interrupt Function Representation CTIF Counter Timer Interrupt Function Symbol Representation of the instruction CONTROL INPUT ACTIVE register ERROR CTIF Range 1 5 drop number Parameter Description of the instruction s parameters Description Sep Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON initiates specified operation register 4x INT The 4xxxx register entered in the top top node node is the first of four contiguous holding registers in the CTIF parameter block For expanded and detailed information about the four registers please see p 196 drop number INT The integer value entered in the bottom node bottom node indicates the drop number where the operation will be performed The drop number is in the range of 1 through 5 Top output Ox None Echoes state of the top input Bottom output Ox None Error 043505766 4 2006 195 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Counter Timer and Interrupt Function Parameter Description CTIF Register Usage Table Top Node Overview of The top node holds four contiguous registers 4x through 4x43 This section Section describes how those registers are used and configured in the top node First Register The first register 4x gives you information either about the type of error generated 4x Usage or abou
191. ntifier with a language element and the assignment of attributes such as Data types and algorithms The definition file contains general descriptive information about the selected FFB and its formal parameters Derived data types are types of data which are derived from the Elementary data types and or other derived data types The definition of the derived data types appears in the data type editor in Concept Distinctions are made between global data types and local data types A derived function block represents the Call up of a derived function block type Details of the graphic form of call up can be found in the definition Function block Item Contrary to calling up EFB types calling up DFB types is denoted by double vertical lines on the left and right side of the rectangular block symbol The body of a derived function block type is designed using FBD language but only in the current version of the programming system Other IEC languages cannot yet be used for defining DFB types nor can derived functions be defined in the current version Distinctions are made between local and global DFBs DINT stands for the data type double integer The input appears as Integer literal Base 2 literal Base 8 literal or Base 16 literal The length of the data element is 32 bit The range of values for variables of this data type is from 2 exp 31 to 2 exp 31 1 A method of displaying variables in the PLC program from which the assi
192. of either 16 bit or 24 bit memory to uniquely identify each node in an application program Contacts and coils each occupy one node and therefore one word Instructions which usually comprise two or three nodes require two or three words respectively Other elements that control program scanning three words respectively Other elements that control program scanning start of a network SON beginning of a column BOC and horizontal shorts use one word of user logic memory as well SON BOC BOC BOC Note Vertical shorts do not consume any words of user memory System overhead refers to the contents of a set of tables where the system s size structure and status are defined Some overhead tables have a predetermined amount of memory allocated to them The configuration table for example contains 128 words and the order of solve table the segment scheduler contains 129 words Other tables such as the I O map a ka traffic cop can consume a large amount of memory but its size is not predetermined Optional pieces of system overhead e g the loadable table the ASCII message area the configuration extension table may or may not consume memory depending on the requirements of your application User memory is stored in CMOS RAM In the event that power is lost CMOS RAM is backed up by a long life typically 12 month battery In many PLC models the battery is a standard part of the hardware package
193. orizontal short vertical short 50 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Equation Networks At a Glance Overview Equation network is a departure from standard ladder logic Instead of using a two or three high function block configuration this instruction takes a ladder logic network and uses it as an editor where you can compose a complex equation using algebraic notation It allows you to use standard math operators such as as well as conditional and logical expressions It also lets you specify variables and constants as necessary and group expressions in nested layers of parentheses The power of an equation network is its ability to deal with complexity in a clear and efficient way An equation composed in a single equation network might require many networks of standard ladder logic to produce the same result An equation network can also be read and understood by other users without the need for detailed annotation as is often required when standard ladder logic is used for complex calculations What s in this This chapter contains the following topics 2 Chapter Topic Page Equation Network Structure 52 Mathematical Equations in Equation Networks 55 Mathematical Operations in Equation Networks 59 Mathematical Functions in Equation Networks 64 Data Conversions in an Equation Network 66 Roundoff
194. otation equation network 51 Analog Input 787 Analog Output 799 Analog Values 71 AND 117 ARCCOS 64 ARCSIN 64 ARCTAN 64 argument equation network 64 limits 65 arithmetic operator 59 ASCII Functions READ 937 WRIT 1091 assignment operator 59 Average Weighted Inputs Calculate 803 Base 10 Antilogarithm 279 Base 10 Logarithm 383 BCD 123 benchmark performance equation network 69 Binary to Binary Code 123 Bit Control 755 Bit pattern comparison CMPR 167 Bit Rotate 139 bitwise operator 59 BLKM 127 BLKT 131 Block Move 127 Block Move with Interrupts Disabled 135 Block to Table 131 BMDI 135 boolean 56 BROT 139 C Calculated preset formula 809 Central Alarm Handler 793 Changing the Sign of a Floating Point Number 301 Check Sum 163 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index CHS 157 CKSM 163 Closed Loop Control 71 CMPR 167 coil equation network 53 error messages 53 Coils 91 Communications MSTR 701 COMP 179 Compare Register 167 Complement a Matrix 179 Comprehensive ISA Non Interacting PID 831 conditional expression equation network 51 61 conditional operator 59 Configure Hot Standby 157 constant equation network 51 constant data floating point 57 long 32 bit 57 LSB least signifcant byte 57 mathematical equation 57 Contacts 91 Convertion BCD to binary 123
195. outine ee Shon Descriptions iac aa ksar a aA In SERE ee heise Representation LAB Label 0 0 ccc eee eens Parameter Description 00000 cee Chapter 104 LOAD Load Flash 000 cence eee eee eee Short Description n sanaaa 002 eee Representation LOAD Load 0 0 e ects Parameter Description 00 000 c ce ee Chapter 105 MAP 3 MAP Transaction llle Short Description seeker bue hk mehr re oem RR E ed eee do es Representation MAP 3 Map Transaction lille aaa Parameter Description ees Chapter 106 MATH Integer Operations lls e Short Description MATH Integer Operations Decimal Square Root Process Square Root Logarithm base 10 and Antilogarithm base 10 Representation MATH Integer Operations Decimal Square Root Process Square Root Logarithm base 10 and Antilogarithm base 10 Chapter 107 MBIT Modify Bit 2 000 e eee eee Short DESCPION 0 sa xoc tase ai ora Ra ol ode Spe da PG PG Representation MBIT Logical Bit Modify a Parameter Description nnana ers Chapter 108 MBUS MBUS Transaction Shon Description T Representation MBUS Modbus II Transfer 020000005 Parameter Description ee The MBUS Get Statistics Function 020 0000 ee eee
196. outputs are not contiguous on the output module Masked bits are not altered by the DRUM instruction and may be used by logic unrelated to the sequencer 238 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DRUM DRUM Sequencer Representation DRUM Symbol Representation of the instruction CONTROL INPUT Current Step Number NEXT STEP RESET Length Max 255 16 bit PLC Max 999 24 bit PLC Max 65535 PLC step pointer step data table DRUM length r ACTIVE LAST STEP ERROR Available on the following e E685 785 PLCs e L785 PLCs e Quantum Series PLCs 043505766 4 2006 239 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DRUM DRUM Sequencer Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input 0x 1x None ON initiates DRUM sequencer Middle input Ox 1x None ON step pointer increments to next step Bottom input Ox 1x None ON reset step pointer to O step pointer 4x INT UINT Current step number top node step data 4x INT UINT First register in a table of step data table information For expanded and detailed middle information please see p 241 node length INT UINT Number of applic
197. ovided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes How XandZBits In the 24 bit CPUs the three most significant x bits are used to incicate the type of are Used in 24 DX function The z bits which simply echo the three most significant x bits may be Bit Nodes ignored in the 24 bit nodes CG 1 iTi o o DT TT TTT Tf 0 0 0 R gt T 0 0 0 0 0 1 T R 0 0 1 0 10 TsT 0 1 0 0 1 1 BLKM 0 1 1 1 0 0 FIN 1 0 O 1 0 1 FOUT 1 0 1 1 1 0 SRCH 1 1 0 1 1 1 STAT 1 1 1 0 0 0 AND 0 0 O 0 0 1 OR 0 0 1 0 1 0 CMPR 0 1 0 0 1 1 SENS 0 1 1 1 0 0 MBIT 1 0 0 1 0 1 COMP 1 0 1 1 1 0 XOR 1 1 0 1 1 1 BROT 1 1 1 0 0 0 READ 0 0 0 0 0 1 WRIT 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 For Loadable Options 1 0 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1 043505766 4 2006 31 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes Opcodes for Papal Opcode Definition 1c R gt T instruction 3C T gt R instruction 5C T gt T instruction 7C BLKM instruction 9C FIN Instruction BC FOUT Instruction DC SRCH Instruction FC STAT Instruction 20 DIOH Instruction 1D AND Instruction 3D OR Instruction 5D CMPR Instruction 7D SENS Instruction 9D MBIT Instruction BD COMP Instruction DD XOR Instruction FD BROT Instruction 1E READ Instruction 3E WRIT Instr
198. pact Momentum Atrium AND Logical AND yes yes yes yes BROT Bit rotate yes yes yes yes CMPR Compare register yes yes yes yes COMP Complement a matrix yes yes yes yes MBIT Modify bit yes yes yes yes NBIT Bit control yes yes no yes NCBT Normally open bit yes yes no yes NOBT Normally closed bit yes yes no yes OR Logical OR yes yes yes yes RBIT Reset bit yes yes no yes SBIT Set bit yes yes no yes SENS Sense yes yes yes yes XOR Exclusive OR yes yes yes yes 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 45 Instruction Groups Miscellaneous Miscellaneous This group provides the following instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium CKSM Check sum yes yes yes yes DLOG Data Logging for PCMCIA no yes no no Read Write Support EMTH Extended Math Functions yes yes yes yes LOAD Load flash yes yes yes no CPU CCC 434 12 960 x0 534 14 only 980 x0 only MSTR Master yes yes yes yes SAVE Save flash yes yes yes no CPU CCC 434 12 960 x0 534 14 only 980 x0 only SCIF Sequential control yes yes no yes interfaces XMRD Extended memory read yes no no yes XMWT Extended memory write yes no no yes 46 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Groups Move I
199. perations 3 CRC 16 LRC straight CKSM and binary add MSTR Specifies a function from a menu of networking operations 3 PID2 Performs proportional integral derivative calculations for 3 closed loop control PCFL Accesses advanced functions from a process 3 control library TBLK Moves a block of data from a table to another 3 specified block area BLKT Moves a block of registers to specified locations in a table 3 SCIF Provides tenor drum sequencer functionality and the 3 ability to do input comparisons within the application program T1MS A timer that increments in milliseconds 3 IKBR Performs an indirect block read operation i e copies 3 specified registers to a working block of holding registers IBKW Performs an indirect block write operation i e 3 copies registers from a working block to individual register locations 12 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Ladder Logic Overview Other instructions are available for specific PLCs as loabable functions Loadables support optional software development products that can be purchased for special applications The loadable instructions may be used only with specific PLC models Loadable instructions include Instruction Definition Nodes Consumed HSBY Sets up a 984 hot standby back up PLC that takes 3 control of the application if the primary PLC goes down CHS
200. r IIR filter Initial step starting step Initial value Input bits 1x references Input parameters Input The I O and expert assemblies of the various CPUs are configured in the I O component list International norm Programmable controllers part 3 Programming languages In the place of the address stands an IEC identifier followed by a five figure address e 0x12345 212345 e 1x12345 96112345 e 9 63x12345 WIW12345 e 4x12345 QW12345 An identifier is a sequence of letters figures and underscores which must start with a letter or underscores e g name of a function block type of an item or section Letters from national sets of characters e g 6 U 6 can be used taken from project and DFB names Underscores are significant in identifiers e g A BCD and AB CD are interpreted as different identifiers Several leading and multiple underscores are not authorized consecutively Identifiers are not permitted to contain space characters Upper and or lower case is not significant e g ABCD and abcd are interpreted as the same identifier Identifiers are not permitted to be Key words Infinite Impulse Response Filter The first step in a chain In each chain an initial step must be defined The chain is started with the initial step when first called up The allocated value of one of the variables when starting the program The value assignment appears in the form of a Literal Th
201. r Description lille Chapter 65 EMTH LOG Base 10 Logarithm Short Description ses Representation EMTH LOG Integer Math Base 10 Logarithm Parameter Description ee Chapter 66 EMTH LOGFP Floating Point Common Logarithm Short Description eee ee Representation EMTH LOGFP Common Logarithm Parameter Description illie Chapter 67 EMTH MULDP Double Precision Multiplication Short Description oia ee da aina a a ata aea a aa aia e teens Representation EMTH MULDP Double Precision Math Multiplication nnana aaaeeeaa Parameter Description llle en Chapter 68 EMTH MULFP Floating Point Multiplication Short Description sse ssrbsst nes Representation EMTH MULFP Floating Point Multiplication Parameter Description eee Chapter 69 EMTH MULIF Integer x Floating Point Multiplication Short Description 000 cc eee ee Representation EMTH MULIF Integer Multiplied by Floating Point Parameter Description 00 cece eee Chapter 70 EMTH PI Load the Floating Point Value of Pi Short Description 00 000 Representation EMTH PI Floating Point Math Load the Floating Point Value of PI eee eee eee Parameter Description l l This document provided by Barr Thorp Electric Co
202. r programmed logic from changing the state of the coil Note Disabled Coils used as destinations in DX function blocks may have their state overwritten by the function 172 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils General Usage Guidelines Coils Overview Enable Disable Capabilities for Discrete Values Once a Ox reference number has been assigned to a coil it cannot be assigned to any other coils in the logic program An Ox reference number can be referenced to any number of relay contacts which can then be controlled via the state of the coil with same reference number Most panel software packages have a feature called tracing with which you can locate the positions in ladder logic of the contacts controlled by a coil Refer to your software user manual for more details Via panel software you may disable a logic coil or a discrete input in your logic program A disable condition will cause the following e Input field device to have no control over its assigned 1x logic e Logic to have no control over the disable 9x value Memory protection in the PLC must be OFF before you disable or enable a coil or a discrete input Note There is an important exception that you need to be aware of when disabling coils Data transfer functions allow coils in their destination nodes to recognize the current ON OFF state of ALL coi
203. re control loop is preceded by a 0 1 s timer The target solution interval for the entire loop is 1 s and the full solve is 1 s However the nontime dependent functions that are used AIN LKUP MODE and AOUT do not need to be solved every scan To reduce the scan time impact these functions are scheduled to solve less frequently The example has a loop solve every 3 s reducing the average scan time dramatically Note It is still important to be aware of the maximum scan impact When programming other loops you will not want all of the loops to solve on the same scan 043505766 4 2006 79 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Closed Loop Control Analog Values PID2 Level Control Example Description Here is a simplified P amp I diagram for an inlet separator in a gas processing plant There is a two phase inlet stream liquid and gas Blowdown vent p x Inlet Vent Plant Inlet FCV Inlet Block p 1 xti G PV 1 OL Condensate 5 LT 1 4 20 mA level transmitter l P 1 4 20 mA current to pneumatic converter LV 1 control valve fail CLOSED LSH 1 high level switch normally closed LSL 1 low level switch normally open LC 1 level controller P 1 Mv to control the flow into tank T 1 The liquid is dumped from the tank to maintain a constant level The control objective
204. rence 12 Discrete group reference 13 DCTR instruction 14 UCTR instruction 15 T1 0 instruction 16 TO 1 instruction 17 T 01 instruction 18 ADD instruction 19 SUB instruction 1A MULT instruction 1B DIV instruction 31 AD16 instruction 32 SU16 instruction 33 MU16 instruction 34 DV16 instruction 35 TEST instruction 36 ITOF instruction 37 FTOI instruction 5E PID2 instruction 7F EMTH instruction 9F BLKT instruction BE LAB instruction BF CKSM or MSTR instruction DE DMTH or JSR instruction DF TBLK instruction FE RET instruction 043505766 4 2006 29 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes Translating DX Instructions in the System Memory Database How X and When you are using a 16 bit CPU you are left with only four more x bit combinations Zbits areusedin 111000 11101 11110 and 11111 with which to express opcodes for the DX 16 bit nodes instructions To gain the necessary bit values the system uses the three least significant Z bits along with the x bits to express the opcodes 0 00 ResT 0 0 1 T gt R 0 1 0 z TST 0 1 1 BLKM 1 0 0 FIN 1 0 1 FOUT 1 1 0 SRCH 1 1 1 SAT bE po ET TTT TTT Ieee 0 0 0 AND 0 0 1 OR 0 1 0 CMPR 0 1 1 SENS 1 0 0 MBIT 1 0 1 COMP 1 1 0 XOR 1 1 1 BROT 0 0 0 READ 0 0 1 WRIT 0 1 0 0 1 1 For Loadable Options 1 0 0 1 0 1 1 1 0 1 1 1 30 043505766 4 2006 This document pr
205. ric Co Inc 800 473 9123 www barr thorp com Contacts 188 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CONV Convert Data 31 At A Glance Introduction This chapter describes the instruction CONV What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description CONV Convert Data 190 Representation CONV Convert Data 191 043505766 4 2006 189 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CONV Convert Data Short Description CONV Convert Data Function The Convert block is a 484 replacement instruction and itis one of four replacement instructions The CONV block is used to convert e Discrete data to a holding register e Holding register data to discrete data The conversion can be either e Binary to binary e BCD to binary discrete to register e Binary to BCD register to discrete This block uses 12 bits in 12 bits out but if the conversion is straight binary to binary bits 11 and 12 are forced off In converting discretes to a holding register the source is specified as a constant which implies a 1xxxx and the destination is specified as a constant which implies a 4xxxx for example 00049 implies 40049 In converting a register to output discretes the source is specified as a holding register 4xxxx and the
206. riptiOD 7 oce ono Fas ee P dodo XC Eee ea OR xo DERI OUR 764 Representation NOBT Bit Normally Open rnae 765 NOL Network Option Module for Lonworks 767 Short Description es 768 Representation NOL Network Option Module for Lonworks 769 Detailed Description rh 770 Instruction Descriptions O to Q 773 OR Logical OR 24 amp ens nahawa usce Rmus na AA a deus dE 775 Short Description ees 776 Representation OR Logical Or 4 777 Parameter DESCrPUON ss 192 24 sor grade er xr RAD e BA dee eee bam LNAG 779 PCFL Process Control Function Library 781 Short Description isa ama RR a anara AE a a LG NAKAKA APA WANG 782 Representation PCFL Process Control Function Library 783 Parameter Description nnana eA 784 PCFL AIN Analog Input eee eee e eee 787 Short Descfiptiort 3 exu sek eee BABALA Poe i ee Pia paaa bid 788 Representation PCFL AIN Convert Inputs to Scaled Engineering Units 0 200 e eee eee eee eee 789 Parameter Description 000 cee 790 PCFL ALARM Central Alarm Handler 793 Shon DESCMPUOM PM Em 794 Representation PCFL ALRM Central Alarm Handler for a P v Input 795 Parameter Description l l 796 PCFL AOUT Analog Output L sse 799 Short Description 20 20 len 800 Representation PCFL AOUT
207. rp Electric Co Inc 800 473 9123 www barr thorp com DISA Disabled Discrete Monitor Short Description DISA Disabled Discrete Monitor Function The Disabled Discrete Monitor DISA is a loadable function an instruction that monitors disabled coils and inputs Therefore DISA monitors the disabled states of all Oxxxx and 1xxxx addresses 214 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DISA Disabled Discrete Monitor Representation DISA Disabled Discrete Monitor Symbol Representation of the instruction CONTROL INPUT DISABLED COILS DISABLED INPUTS inputs ACTIVE Length 1 100 regusters Note The NSUP loadable must be loaded prior to loading the DISA loadable Parameter Description of the instruction s parameters DesenpHon Parameters State RAM Data Type Meaning Reference Top input Ox 1x None Disabled coils table coils 4x INT UINT Number of disabled coils found even if 5 NNN top node 4x INT UINT Address of disabled coil found inputs 4y INT UINT Number of disabled input discretes found even middle node if 2 NNN 4y INT UINT Address of disabled discrete found length INT UINT Passes power when top input receives power bottom node Top output 0x None ON if disabled coils are found Middle output Ox None ON if disabled inputs
208. rp com Closed Loop Control Analog Values Main PID The AIN output is block moved to the LKUP function which is used to scale the input Ladder Logic readings the result is an ideal linear signal 7 Points Defined In Look Up table 100 80 60 50 40 20 Linearized Signal xa Actual Input 20 40 50 60 80 100 Input signal We do this because the input sensor is not likely to produce highly linear The look up table output is block moved to the PID function RAMP is used to control the rise or fall of the set point for the PID controller with regard to the rate of ramp and the solution interval In this example the set point is established in another logic section to simulate a remote setting The MODE function is placed after the RAMP So that we can switch between the RAMP generated set point or a manual value Simulated The PID function is actually controlling the process simulated by this logic value in Process 400100 878 Dec O 3 LLAG LLAG DELAY AOUT 000103 To 000103 400188 400260 400280 400300 400340 PCFL PCFL PCFL PCFL 20 20 32 9 400242 400278 400298 400330 400348 000103 400260 400280 400300 400340 400100 BLKM BLKM BLKM BLKM BLKM 1 1 1 1 1 78 043505766 4 2006 This document provided by Barr Thorp Electric Co
209. rr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate DX Function Immediate DX Functions This table lists the Immediate DX Functions Name Code Function f config 500 Obtain Copro configuration data f 2md fl 501 Convert a two register long integer to 64 bit floating point f fl 2md 502 Convert floating point to two register long integer f 4md fl 503 Convert a four register long integer to floating point f fl 4md 504 Convert floating point to four register long integer f 1md fl 505 Convert a one register long integer to floating point f fl 1m 506 Convert floating point to one register long integer f exp 507 Exponential function f log 508 Natural logarithm f log10 509 Base 10 logarithm f pow 510 Raise to a power f sqrt 511 Square root f cos 512 Cosine f sin 513 Sine f tan 514 Tangent f atan 515 Arc tangent x f atan2 516 Arc tangent y x f asin 517 Arc sine f acos 518 Arc cosine f add 519 Add f sub 520 Subtract f mult 521 Multiply f div 522 Divide f deg rad 523 Convert degrees to radians f rad deg 524 Convert radians to degrees f swap 525 Swap byte positions within a register f comp 526 Floating point compare f dbwrite 527 Write Copro register database from PLC f dbread 528 Read Copro register database from PLC 043505766 4 2006 147 This docume
210. rrrrrm 35 Parameter Assignment of Instuctions esee 35 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 5 Chapter 6 Chapter 7 Chapter 8 Chapter 9 Chapter 10 Chapter 11 Instruction GroupS an Instruction Groups rne ASCII Functions lese RR RR RR eR RR arra Counters and Timers Instructions cece eee ee eee eee Fast I O Instructions sceo nem Rm RE Rem mE irae id mGa wed Loadable DX ala mem eura Rx NYA SE E hhmm da EORR d Math Instructions 2s x ccu exem INANOD NGALANG he x abe Red Matrix IristructloriS ii 2d a NO AD AA RECEN IE E Rer EUR eben Miscellaneous eee RR RRRRRRRIRRRRR RR c Rc rs Move Instr ctloris 222 cse mx ba ted rane ane tx a es acier LAG ap ERE ENG SKIPS Special Sirnea Ta oe dann drei nai Delete ee oak ae AS satin ce have eel NG Special Instructions es Coils Contacts and Interconnects l l n Equation Networks sseeeeeeeees Equation Network Structure lesse Mathematical Equations in Equation Networks anaana Mathematical Operations in Equation Networks 0020000 Mathematical Functions in Equation Networks essen Data Conversions in an Equation Network a Roundoff Differences in PLCs without a Math Coprocessor Benchmark Performance 2 ln Closed Loop Control Analog Values
211. rsonnel No responsibility is assumed by Schneider Electric for any consequences arising out of the use of this material 2006 Schneider Electric All Rights Reserved 043505766 4 2006 xxvii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Safety Information xxviii 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com About the Book At a Glance Document Scope This documentation will help you configure LL 984 instructions to any controller using ProWorx NxT ProWorx 32 or Modbus Plus Examples in this book are used with ProWorx 32 For LL 984 using Concept software see Concept Block Library LL984 840USE49600 Validity Note The data and illustrations found in this book are not binding We reserve the right to modify our products in line with our policy of continuous product development The information in this document is subject to change without notice and should not be construed as a commitment by Schneider Electric Related Documents Title of Documentation Reference Number Concept Block Library LL 984 840 USE 496 043505766 4 2006 Xxix This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com About the Book Product Related Warnings User Comments Schneider Electric assumes no responsibility for any errors that may appear in this documen
212. ruction Groups Math Instructions Math Instructions Integer Based Instructions Comparable Instructions Two groups of instructions that support basic math operations are available The first group comprises four integer based instructions ADD SUB MUL and DIV The second group contains five comparable instructions AD16 SU16 TEST MU16 and DV16 that support signed and unsigned 16 bit math calculations and comparisons Three additional instructions ITOF FTOI and BCD are provided to convert the formats of numerical values from integer to floating point floating point to integer binary to BCD and BCD to binary Conversion operations are usful in expanded math This part of the group provides the following instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium ADD Addition yes yes yes yes DIV Division yes yes yes yes MUL Multiplication yes yes yes yes SUB Subtraction yes yes yes yes This part of the group provides the following instructions Instruction Meaning Available at PLC family Quantum Compact Momentum Atrium AD16 Add 16 bit yes yes yes yes DV16 Divide 16 bit yes yes yes yes MU16 Multiply 16 bit yes yes yes yes SU16 Subtract 16 bit yes yes yes yes TEST Test of 2 values yes yes yes yes 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 8
213. ry 781 Process Square Root 441 Process Variable 72 Proportional Integral Derivative 913 Put Input in Auto or Manual Mode 855 Q Quantum PLCs roundoff differences 68 R R T 929 Raising a Floating Point Number to an Integer Power 417 Ramp to Set Point at a Constant Rate 877 RBIT 933 READ 937 MSTR 712 Read 937 READ WRIT Operations 83 Register to Table 929 registers consumed mathematical equation 56 Regulatory Control 782 relational operator 59 Reset Bit 933 result equation network 54 RET 943 Return from a Subroutine 943 roundoff differences equation network 68 Ixvi 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index S SAVE 961 Save Flash 961 SBIT 965 SCIF 969 Search 987 SENS 975 Sense 975 Sequential Control Interfaces 969 Set Bit 965 Set Point Vaiable 72 signed 16 bit variable 56 signed long 32 bit variable 56 SIN 64 SIND 64 single expression equation network 61 Skips Specials RET 943 Skips Specials JSR 649 LAB 653 Special DIOH 207 PCFL 781 PCFL 799 PCFL AIN 787 PCFL ALARM 793 PCFL AVER 803 PCFL CALC 809 PCFL DELAY 815 PCFL EQN 821 PCFL KPID 831 PCFL LIMIT 837 PCFL LIMV 841 PCFL LKUP 845 PCFL LLAG 851 PCFL MODE 855 PCFL ONOFF 859 PCFL PI 865 PCFL PID 871 PCFL RAMP 877 PCFL RATE 883 PCFL RATIO 887 PCFL RMPLN 893 PCFL SEL 897 PCFL TOTAL 903 PC
214. s Flow Function Block 518 Representation GD92 Gas Flow Function Block 519 Parameter Description Inputs GD92 Gas Flow Function Block 521 Parameter Description Outputs GD92 Gas Flow Function Block 528 Parameter Description Optional Outputs GD92 Gas Flow Function BIOGK cocos owe o PERRA CEPR DR EK E REF 529 GFNX AGA 3 85 and NX19 68 Gas Flow Function Block 531 Short Description GFNX Gas Flow Function Block 532 Representation GFNX Gas Flow Function Block 533 Parameter Description Inputs GFNX Gas Flow Function Block 535 Parameter Description Outputs GFNX Gas Flow Function Block 542 Parameter Description Optional Outputs GFNX Gas Flow Function Block 0 2 2 lee 543 GG92 AGA 3 1992 Gross Method Gas Flow Function Block Le 545 Short Description GG92 Gas Flow Function Block 546 Representation GG92 Gas Flow Function Block 2 5 547 Parameter Description Inputs GG92 Gas Flow Function Block 549 Parameter Description Outputs GG92 Gas Flow Function Block 555 Parameter Description Optional Outputs GG92 Gas Flow Function Block 556 GM92 AGA 3 and 8 1992 Detail Method Gas Flow Function Block LL 557 Short Description GM92 Gas Flow Function Block
215. s of parentheses 51 LN 64 LOG 64 logic editor 51 logical expression 51 math operator 51 mathematical 55 mathematical function 64 mathematical operation 59 nested parentheses 63 operator precedence 62 output coil 53 overview 51 parentheses 59 63 relational operator 59 result 54 roundoff differences 68 SIN 64 SIND 64 single expression 61 size 54 SQRT 64 TAN 64 TAND 64 unary operator 59 variable 51 words consumed 54 ESI 469 EUCA 489 Exclusive OR 1145 EXP 64 exponential notation mathematical equation 58 exponentiation operator 59 expression equation network 61 Extended Math 259 Extended Memory Read 1133 Extended Memory Write 1139 Iviii 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index F Fast I O Instructions BMDI 135 ID 617 IE 621 IMIO 625 IMOD 631 ITMR 639 FIN 503 First In 503 First Out 507 First order Lead Lag Filter 851 FIX 64 FLOAT 64 Floating Point Integer Subtraction 453 Floating Point Addition 271 Floating Point Arc Cosine of an Angle in Radians 285 Floating Point Arc Tangent of an Angle in Radians 295 Floating Point Arcsine of an Angle in Radians 291 Floating Point Common Logarithm 389 Floating Point Comparison 307 Floating Point Conversion of Degrees to Radians 319 Floating Point Conversion of Radians to Degrees 337 Floating Point Cosine of an Angle
216. s when accessing step data in the step data table Second output mask Loaded by user before using the block DRUM will not alter implied output mask contents during logic solve contains a mask to be applied to the data for each sequencer step Third implied machine ID Identifies DRUM ICMP blocks belonging to a specific number machine configuration value range O 9 999 0 block not configured all blocks belonging to same machine configuration have the same machine ID number Fourth profile ID Identifies profile data currently loaded to the sequencer implied number value range O 9 999 0 block not configured all blocks with the same machine ID number must have the same profile ID number Fifth implied steps used Loaded by user before using the block DRUM will not alter steps used contents during logic solve contains between 1 999 for 24 bit CPUs specifying the actual number of steps to be solved the number must be greater or less than the table length in the bottom node The remaining registers contain data for each step in the sequence 043505766 4 2006 241 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DRUM DRUM Sequencer Length The integer value entered in the bottom node is the length i e the number of Bottom Node application specific registers used in the step data table The length can range from 1 999 in a 24 bit CPU The total number of reg
217. scanned contiguously e Nodes within each network are scanned top to bottom left to right Segment 1 Network 1 k Segment Network 2 Segment Boundary Segment 2 Network 3 Last Network in Last Scheduled Segment The PLC begins solving logic in the network at the top of the leftmost column and proceeds down then moves to the top of the next column and proceeds down as shown in the illustration Each node is solved in the order it is encountered in the logic scan Power flow within the network is down each column from left to right never from bottom to top and never from right to left 043505766 4 2006 7 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview Ladder Logic Elements and Instructions Overview There is a core set of ladder logic elements contacts coils vertical and horizontal shorts and instructions built into all PLC firmware packages Additional instructions are available for specific PLC types as either built in or loadable instructions This section provides a brief list of the available instructions and their functions a detailed description of all instruction including the PLC models they are available on is provided in later chapters of this book Standard Ladder Logic Elements Symbol Definition Nodes Consumed m A normally open N O contact 1 VW A normally closed N C contact it A po
218. scripliODi cse Ir se hin UA X Y aie bees ov amare at Rare NG LG 354 Representation EMTH DIVFI Floating Point Divided by Integer 355 Parameter Description ees 356 EMTH DIVFP Floating Point Division 357 Short Description ren 358 Representation EMTH DIVFP Floating Point Division 359 Parameter Descriptio era sc grat a eee RATE Rene EE hem Cae Pg 360 EMTH DIVIF Integer Divided by Floating Point 361 Short Description eh 362 Representation EMTH DIVIF Integer Divided by Floating Point 363 Parameter Description eA 364 EMTH ERLOG Floating Point Error Report Log 365 Short DESENPUON OPEP 366 Representation EMTH ERLOG Floating Point Math Error Report Eog s dsj uim md tere mk ALA ee gn m Na eis Sea ei E eje 367 Parameter Description naaa ees 369 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 63 EMTH EXP Floating Point Exponential Function Short Description ssaa fes eor pama ee xc o rmn ae or NG ex eio yea bs Representation EMTH EXP Floating Point Math Exponential F nctlon x uu iren rn hme ete Rn Rm de ERR tw dake Parameter Description ee Chapter 64 EMTH LNFP Floating Point Natural Logarithm Short Description see Representation EMTH LNFP Natural Logarithm Paramete
219. scriptions R to Z 927 Chapter 145 R T Register to Table sess 929 Short Description nee 930 Representation R T Register to Table Move 931 Parameter Description illie 932 Chapter 146 RBIT Reset Bit cee ees 933 Short Description nee 934 Representation RBIT Reset Bit 00 cee eee 935 Chapter 147 READ Read 000 eee eee eee eee 937 Short Description sedate sa renda d kaau ima Da Ea aae a Poa i 938 Representation READ Read ASCII Port elles 939 Parameter Description liliis 940 Chapter 148 RET Return from a Subroutine LL 943 Short Description s snes sk s exo eon Pd nha be ES Ka FIR sc XO EORR 944 Representation RET Return to Scheduled Logic 945 Chapter 149 RTTI Register to Input Table 947 Short Description RTTI Register to Input Table 948 Representation RTTI Register to Input Table 949 Chapter 150 RTTO Register to Output Table 951 Short Description RTTO Register to Output Table 952 Representation RTTO Register to Output Table 953 Chapter 151 RTU Remote Terminal Unit Lss 955 Short Description RTU Remote Terminal Unit 95
220. sed parentheses in order to compile properly If it does not a compiler error will be generated and the equation network will not function Each pair of open and closed parentheses consumes two words in the equation network 043505766 4 2006 63 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Mathematical Functions in Equation Networks Mathematical The following table lists the pre defined math functions you can include in your Functions equation Each of these functions takes one argument enclosed in brackets following the function name The argument can be any valid value or expression For example COS 35 40001 returns the cosine of 35 plus the number stored at address 40001 In this table X refers to a function s argument as in COS X Function Description ABS S Absolute value of X i e negative numbers become positive ARCCOS X Arc cosine of X radians ARCSIN X Arc sine of X radians ARCTAN X Arc tangent of X radians COS X Cosine of X radians COSD X Cosine of X degrees EXP X Calculates e approximately 2 7182818 to the Xth power FIX X Converts floating point number X to an integer FLOAT X Converts integer X to a floating point number LN X Natural base e logarithm of X LOG X Common base 10 logarithm of X SIN X Sine of X radians SI
221. sed to indicate the Modbus Plus ports on the PLC regardless of the slot in which it resides e yyis a decimal value in the range 1 64 indicating the drop number on the appropriate token ring For example if you are interested in retrieving drop status starting at distributed drop 1 on a network being handled by a DIO processor in slot 3 enter 0301 in the top node destination middle node 4x INT UINT WORD First holding register in the destination table i e in a block of contiguous registers where the retrieved health status information is stored length bottom node INT UINT Length of the destination table range 1 64 Top output Ox None Echoes the state of the top input Bottom output Ox None ON invalid source entry 210 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DIOH Distributed I O Health Parameter Description Source Value The source value entered in the top node is a four digit constant in the form xxyy Top Node where Digits Meaning XX Decimal value in the range 00 16 indicating the slot number in which the relevant DIO processor resides The value 00 can always be used to indicate the Modbus Plus ports on the PLC regardless of the slot in which it resides YY Decimal value in the range 1 64 indicating the drop number on the appropriate
222. see p 154 delay INT UINT A delay timer value with 10ms increments The bottom node value 1 is assigned to OFF Note When any of the above inputs are activated the CANT function block begins to solve the routine The bottom node specifies a delay time in 10ms increments that the block uses to delay the start of the solve routine 043505766 4 2006 153 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CANT Interpret Coils Contacts Timers Counters and the SUB Block Parameter Description CANT Interpret Coils Contacts Timers Counters and the SUB Block Output Data Registers Table Middle Node Output Data Registers Table Output Data Register Description Purpose 4x Contains the address of the CANT in use flag coil number Coil must be programmed with NO POWER CONNECTED FROM THE LEFT in the last network of your ladder logic 4x 01 CANT version number in hexadecimal format for example 0105 for v1 05 4x 02 Hi Byte Internal operational flags Lo Byte MB address of a PLC 4x 03 Output coil number a variable that is dependent on the block s state 4x 04 The Id of the trigger contact or coil Bit 15 gt 0 if a coil 1 if a contact Bit 14 00 coil or contact number 1 based 4x 05 Hi 12 bits network number where logic fails 1 based Lo 4 bits column number where logic fails 1 based 4x 4 06
223. service for Interrupt 2 043505766 4 2006 197 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Counter Timer and Interrupt Function The following table describes Bit Usage and ON OFF Combinations for bits 7 and 8 of the second register 4x1 Bit 7 8 Description 0 1 Disable interrupt service for Interrupt 1 1 0 Enable interrupt service for Interrupt 1 The following table describes Bit Usage and ON OFF Combinations for bits 9 and 10 of the second register 4x1 Bit 9 10 Description 0 1 Disable interrupt service for timer counter interrupt 1 0 Enable interrupt service for timer counter interrupt The following table describes Bit Usage and ON OFF Combinations for bits 11 and 12 of the second register 4x1 Bit 11 12 Description 0 1 Disable auto restart operation 1 0 Enable auto restart operation The following table describes Bit Usage and ON OFF Combinations for bits 13 and 14 of the second register 4x1 Bit 13 14 Description 0 1 Stop counter timer operation 1 0 Start counter timer operation The following table describes Bit Usage and ON OFF Combinations for bits 15 and 16 of the second register 4x 1 Bit 15 16 Description 0 1 Counter Mode 1 0 Timer Mode Third Register The third register 4x12 g
224. sitive transitional P T contact At A negative transitional N T contact A normal coil eL M A memory retentive or latched coil the two symbols mean the same thing and the user may select the preferred version for on line display A horizontal short A vertical short This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Ladder Logic Overview Standard Ladder Logic Counter and Timer Instructions instructions for Instruction Definition Nodes Consumed all PLCs UCTR Counts up from 0 to a preset value 2 DCTR Counts down from a preset value to 0 2 T1 0 Timer that increments in seconds 2 TO 1 Timer that increments in tenths of a second 2 T 01 Timer that increments in hundredths of a second 2 Integer Math Instructions Instruction Definition Nodes Consumed ADD Adds top node value to middle node value 3 SUB Subtracts middle node value from top node value 3 MUL Multiplies top node value by middle node value 3 DIV Divides top node value by middle node value 3 DX Move Instructions Instruction Definition Nodes Consumed R 5T Moves register values to a table 3 TP Moves specified table values to a register 3 ToT Moves a specified set of values from one table 3 to another table BLKM Moves a spec
225. st I O Instructions 41 Loadable DX 42 Math Instructions 43 Matrix Instructions 45 Miscellaneous 46 Move Instructions 47 Skips Specials 48 Special Instructions 49 Coils Contacts and Interconnects 50 043505766 4 2006 37 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Groups Instruction Groups General All instructions are attached to one of the following groups ASCII Functions See p 39 Counters Timers See p 40 Fast I O Instructions See p 41 Loadable DX See p 42 Math See p 43 Matrix See p 45 Miscellaneous See p 46 Move See p 47 Skips Specials See p 48 Special See p 49 Coils Contacts and Interconnects See p 50 38 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com 043505766 4 2006 Instruction Groups ASCII Functions This group provides the following instructions ASCII Functions Available at PLC family Instruction Meaning Quantum Compact Momentum Atrium READ Read ASCII messages yes no no no WRIT Write ASCII messages yes no no no PLCs that support ASCII messaging use instructions called READ and WRIT to handle the sending of messages to display devices and the receiving of messages from input devices These instructions provide the routines necessary for communication between the ASCII message table in the PLC s syst
226. st a variable name and a Data type Should a variable be assigned a direct Address Reference it is referred to as a Located variable Should a variable not be assigned a direct address it is referred to as an unlocated variable If the variable is assigned a Derived data type it is referred to as a Multi element variable Otherwise there are Constants and Literals Vertical format means that the page is higher than it is wide when looking at the printed text W Warning WORD When processing a FFB or a Step a critical status is detected e g critical input value or a time out a warning appears which can be viewed with the menu command Online Event display With FFBs the ENO output remains at 1 WORD stands for the data type Bit sequence 16 The input appears as Base 2 literal Base 8 literal or Base 1 16 literal The length of the data element is 16 bit A numerical range of values cannot be assigned to this data type 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary liv 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Index Numerics 3x or 4x register entering in mathematical equation 57 A ABS 64 AD16 109 ADD 113 Add 16 Bit 109 Addition 113 AD16 109 ADD 113 Advanced Calculations 782 algebraic expression equation network 54 algebraic n
227. start Delay timer value in 1 ms in crements Row 7 ft P Value of 1 is off 043505766 4 2006 155 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CANT Interpret Coils Contacts Timers Counters and the SUB Block MSTR Write The purpose of the MSTR block is to send the 20 4x CANT registers to a PC based Data Setup Action Monitor program This transmittal of registers is done using either MB or an Ethernet TCP IP Modbus Below is an example MSTR Statistics Control Registers Register Value Description 400121 1 Write data function 400122 MSTR error register 400123 20 of data registers to send 400124 40001 Start of data registers 400125 22 Destination MB address 400126 1 MB routing 400127 0 MB routing 400128 0 MB routing 400129 0 MB routing Note It is necessary to program a MSTR block for each receiving PC address if you want to transmit data to more than one PC running Action Monitor MSTR Setup MSTR Setup IPE 1530 MSTR control regis ters e g 40121 CANT output register base e g 40001 20 registers to be written out See 4xxX1 regis ter in CANT DX block setup above 156 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CHS Configure Hot Standby 24
228. state is controlled by an input module 3x input register Holds numerical inputs from an external source for example a thumbwheel entry an analog signal data from a high speed counter A 3x register can also be used to store 16 contiguous discrete signals which may be entered into the register in either binary or binary coded decimal BCD format 4x output holding register Can be used to store numerical decimal or binary information in state RAM or to send the information to an output module 6x extended memory register Stores binary information in extended memory area available only in PLCs with 24 bit CPUs that support extended memory the 984B the E984 785 and the Quantum Automation Series PLCs 18 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC Storing a Discreet and Register Data in State RAM State RAM data is stored in 16 bit words on page F in System Memory The state RAM table is followed by a discrete history table that stores the state of the bits at the end of the previous scan and by a table of the current ENABLE DISABLE status of all the discrete 0x and 1x values in state RAM 0000 ENABLE DISABLE Tables Discrete History Tables 4x History Table EOL Pointers Crash Codes Executive ID Executive Rev Not available in the 984A B X PLCs ke 16
229. struction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None Execute Hot Standby unconditionally Middle input Ox 1x None ON Enable command register Bottom input Ox 1x None ON Enable non transfer area OFF z non transfer area will not be used and the Hot Standby status register will not exist command 4x INT UINT Hot Standby command register register WORD For expanded and detailed top node information please see p 161 nontransfer 4x INT UINT First register in the nontransfer area of area WORD state RAM middle For expanded and detailed node information please see p 162 length INT UINT Number of registers of the Hot bottom Standby nontransfer area in state node RAM range 4 8000 Top output Ox None Echoes the state of the top input Middle output Ox None ON System detects interface error Bottom Ox None ON System configuration set by output configuration extension 043505766 4 2006 159 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CHS Configure Hot Standby Detailed Description Hot Standby System Configuration via the CHS Instruction Parameter Description Execute Hot Standby Top Input Program the CHS instruction in network 1 segment 1 of your ladder logic program and unconditionally connect the top input to the power rail via a horizontal short as the HSBY instruction is programme
230. sult is representation of the number 00110100 or 52 decimal stored at 40001 shifted left two 2 places Zeros are added on the right to fill in the gap gt gt Right Shift The result of 40001 gt gt 2 is the binary representation of the number stored at 40001 shifted right two 2 places Zeros are added on the left to fill in the gap Relational operator lt Less than These operators perform a comparison between lt Less than or equal to two values or expressions The result is always Edad true 1 or false 0 For example 35 lt 42 eee evaluates to 1 true Relational operators are lt gt Not equal to used in Conditional expressions gt Greater than or equal to gt Greater than Conditional operator See below for details Used in conditional expression Parentheses Used to set precedence in solving equations To make sure certain operations are solved before others enclose those operations in parentheses 60 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks How an Equation Network Resolves an Equation An equation network calculates its result in one of two ways depending on the operator types used in the expression Single Expression Evaluate a single expression and execute it by copying the derived value to the result register Conditional Expression Evaluate the valid
231. sure register 300001 copied by the first SUB 0 4095 400114 0000 Offset to loop Zero disables this feature counter register Normally this is not used 400115 0000 Max loops solved See register 400114 per scan 400116 0102 Pointer to reset If you leave this as zero the PID2 function feedback automatically supplies a pointer to the loop output register If the actual output 400500 could be changed from the value supplied by PID2 then this register should be set to 500 400500 to calculate the integral properly 400117 4095 Output clamp high Normally set to maximum 0 4095 400118 0000 Output clamp low Normally set to minimum 0 4095 400119 0015 Rate Gain Limit Normally set to about 15 The actual value Constant 2 30 depends on how noisy the input signal is Since we are not using derivative mode this has no effect on PID2 400120 0000 Pointer to track Used only if the PRELOAD feature is used If the input PRELOAD is not used this is normally zero The values in the registers in the 400200 destination block are all set by the PID2 block 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Formatting Messages for ASCII READ WRIT Operations At a Glance Introduction In this chapter you will find general information about formatting messages for ASCII READ WRIT operations What s in this This chapter
232. t If you have any suggestions for improvements or amendments or have found errors in this publication please notify us No part of this document may be reproduced in any form or by any means electronic or mechanical including photocopying without express written permission of Schneider Electric All pertinent state regional and local safety regulations must be observed when installing and using this product For reasons of safety and to ensure compliance with documented system data only the manufacturer should perform repairs to components When controllers are used for applications with technical safety requirements please follow the relevant instructions Failure to use Schneider Electric software or approved software with our hardware products may result in injury harm or improper operating results Failure to observe this product related warning can result in injury or equipment damage We welcome your comments about this document You can reach us by e mail at techpub Q schneider electric com XXX 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com General Information Introduction At a Glance In this part you will find general information about the instruction groups and the use of instructions What s in this This part contains the following chapters Pari Chapter Chapter Name Pag
233. t in ladder logic A Description single contact can be tied to a Ox or 1x reference number in the PLC s state RAM in which case each contact consumes one node in a ladder network Four kinds of contacts are available e Normally open N O contacts Normally closed N C contacts Positive transitional P T contacts Negative transitional N T contacts Referencing Normally open I l and normally closed IN contacts may be referenced by inputs Normally Open 1xxxx or coils Oxxxx Normally Closed Field Device state vs Programmed Contact Flow Contacts Field Device Programmed Contact Field Contact Closed Field Contact Open l Passes Power N Passes Power N l Passes Power Passes Power Referencing Transitional contacts positive T and negative l contacts may be referenced Transitional by inputs 1xxxx or coils 0xxxx comais State Table Transition Power Flow at Transition fl Off to On On mE 1 Scan Power NI On to Off Off 0 FlowPulse Note A transitional contact will pass power continuously if the referenced coil is skipped by a SKP instruction or by the segment scheduler A transitional contact may not pass power if it is referenced to an input that has been scheduled to read from the I O drop more than once per scan via the segment scheduler 043505766 4 2006 187 This document provided by Barr Thorp Elect
234. t size and shape A ladder logic program comprises a sequence of networks collected together in one or more segments A network is a ladder diagram bounded on the left and right by power rails By convention the rail on the left is shown and the one on the right is not Seven rungs or rows run from left to right between the two power rails Each rung is eleven columns wide Power Rail 1 2 3 4 5 6 7 8 9 10 11 NOTE Only coils can be shown in column 11 The 77 regions formed by the intersections of rungs and columns are called nodes Logic elements and instructions can be programmed into these nodes All 77 nodes in a network may be used to store ladder logic elements and instructions which are the fundamental building blocks of the logic program Some rules of placement apply particularly with respect to coil placement 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview A Coil Placement When a coil is inserted on a rung of a network no other logic elements or instructions in a Network can be placed to the right of it on that rung The seven nodes in the 11th column are reserved for displaying coils Many software panels allow you to select the way you display coils in a network either in their logic solve positions or expanded to column 11 where they can all be viewed in parallel The two examples below show the same logic structure with the coi
235. t the type of operation being performed When you configure the register you need to consider both how the bits will be used Bit Usage and the results of ON OFF Combinations Here is a graphic demonstrating the Bit Usage for the first register 4x i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 and the following table describes the Bit Usage for the first register 4x Bit Usage 1 4 Reserved 5 8 Error Operation type messages 9 14 Reserved 15 Set Mode 16 Get Mode The following table describes the ON OFF Combinations for bits 5 through 8 and the error operation type message generated by the first register 4x Bit 5 6 7 8 Description 0 0 0 0 No error detected 0 0 0 1 Unsupported operation type specified 0 0 1 0 Interrupt 2 not supported in this model 0 0 1 1 Interrupt 3 not supported while counter is selected 0 1 0 0 Counter value of 0 specified 0 1 0 1 Counter value too big counter value 16 383 0 1 1 0 Operation type supported only on local drop 0 1 1 1 Specified drop not in I O map 1 0 0 0 No subroutine for enabled interrupt 1 0 0 1 Remote drop is unhealthy 1 0 1 0 Function not supported remotely 196 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CTIF Counter Timer and Interrupt Func
236. terval timer that generates interrupts into the normal logic scan and initiates an interrupt handling subroutine 2 modules from within ladder logic ID Interrupt disable 1 IE Interrupt enable 1 BMDI Masks timer generated and local I O generated 3 interrupts performs a block data move then unmasks the interrupts IMIO Permits immediate access of specified I O 2 ASCII Message Instructions Instruction Definition Nodes Consumed READ Reads data entered at an ASCII device 3 into the PLC via its RIO link WRIT Sends a message from the PLC to an 3 ASCII device via its RIO link COMM Combines both ASCII READ and WRITE capabilities for 3 simple canned messages in the Micro PLCs Ladder Logic Subroutine Instructions Instruction Definition Nodes Consumed JSR Jumps from scheduled logic scan to a 2 ladder logic subroutine LAB Labels the entry point of a ladder logic subroutine 1 RET Returns from the subroutine to scheduled logic 1 CTIF Used to set up high speed input terminals on a 3 Micro PLC for scheduled logic interrupts and or counter timer operations 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Overview Other Special Purpose Instructions Instruction Definition Nodes Consumed CKSM Calculates any of four types of checksum o
237. thorp com DV16 Divide 16 Bit Example Quotient of The state of the middle input indicates whether the remainder will be expressed as Instruction DV16 a decimal or as a fraction For example if value 1 8 and value 2 3 the decimal remainder middle input OFF is 6666 the fractional remainder middle input ON is 2 043505766 4 2006 247 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com DV16 Divide 16 Bit 248 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary A active window Actual parameter Addresses ANL IN ANL OUT ANY The window which is currently selected Only one window can be active at any one given time When a window is active the heading changes color in order to distinguish it from other windows Unselected windows are inactive Currently connected Input Output parameters Direct addresses are memory areas on the PLC These are found in the State RAM and can be assigned input output modules The display input of direct addresses is possible in the following formats e Standard format 400001 Separator format 4 00001 Compact format 4 1 IEC format QW1 ANL IN stands for the data type Analog Input and is used for processing analog values The 3x References of the configured analog input module which is specified in the I O component list is au
238. ting Point Number 5 22 rr wees See GA NG eee 301 Short Description cc eee eee 302 Representation EMTH CHSIN Change the Sign of a Floating Point Number 0 000 eee HI 303 Parameter Descriptio 25002 eee aS oe oe en ete Sea eee aie bay eke NG 305 Chapter 51 EMTH CMPFP Floating Point Comparison 307 Short Descriptio sse x x dub ei ta Ve RR PDA DD EU Ui De needles 308 Representation EMTH CMFPF Floating Point Math Comparison 309 Parameter Description 0 e 311 Chapter 52 EMTH CMPIF Integer Floating Point Comparison 313 Short Descriptio srai ior ees we Naa SB NAA act ERU bee ae Re Go 314 Representation EMTH CMPIF Floating Point Math Integer Floating Point Comparison 02 eee eee ee eee 315 Parameter Description 00 000 ee 317 Chapter 53 EMTH CNVDR Floating Point Conversion of Degrees to Radians 0000 cece eee eee eee 319 Short Description eens 320 Representation EMTH CNVDR Conversion of Degrees to Hadlatis r3 x est xm reni kaa PE den HEROS ed Spe ee Cee Go 321 Parameter Description ee 323 Chapter 54 EMTH CNVFI Floating Point to Integer Conversion 325 Short Description 00000 cee eee 326 Representation EMTH CNVFI Floating Point to Integer Converslotts 72 oa dae eame xw das sawed PS ka KAWANG Gee Seale ed 327 Parameter Description 00000 eee eee 329
239. ting path The address is set directly on the node e g with a rotary switch on the back of the module O Operand Operator Output parameters Output Output discretes 0x references An operand is a Literal a Variable a Function call up or an Expression An operator is a symbol for an arithmetic or Boolean operation to be executed A parameter with which the result s of the Evaluation of a FFB are returned An output marker bit can be used to control real output data via an output unit of the control system or to define one or more outputs in the state RAM Note The x which comes after the first figure of the reference type represents a five figure storage location in the application data store i e if the reference 000201 signifies an output or marker bit in the address 201 of the State RAM Output marker An output marker word can be used to save numerical data binary or decimal in words 4x the State RAM or also to send data from the CPU to an output unit in the control references system Note The x which comes after the first figure of the reference type represents a five figure storage location in the application data store i e if the reference 400201 signifies a 16 bit output or marker word in the address 201 of the State RAM xlvi 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary Peer processor PLC Program Program
240. tion The following table describes Bit Usage and the ON OFF Combinations for bits 15 and 16 of the first register 4x Bit 15 16 Description 0 Set Mode 1 Get Mode Second Register The second register 4x 1 allows you to control the set up for the Set Mode 4x41 Usage operation When you configure the register you need to consider both how the bits will be used Bit Usage and the results of the ON OFF Combinations Here is a graphic demonstrating the Bit Usage for the second register 4x1 112 3 4 5 6 7 8 9 10 11 12 13 14 15 16 The following tables describe both Bit Usage and the ON OFF Combinations for bits 1 through 16 of the second register 4x 1 The following table describes Bit Usage and ON OFF Combinations for bits 1 and 2 of the second register 4x 1 Bit Usage 1 Terminal count loading 0 Disable 1 Enable 2 Reserved The following table describes Bit Usage and ON OFF Combinations for bits 3 and 4 of the second register 4x 1 Bit 3 4 Description 1 Disable interrupt service for Interrupt 3 1 0 Enable interrupt service for Interrupt 3 The following table describes Bit Usage and ON OFF Combinations for bits 5 and 6 of the second register 4x1 Bit 5 6 Description 1 Disable interrupt service for Interrupt 2 1 0 Enable interrupt
241. tion 145 Representation CALL Activate Deferred DX Function 148 043505766 4 2006 143 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate DX Function Short Description CALL Activate Immediate or Deferred DX Function Function A CALL instruction activates an immediate or deferred DX function from a library of Description functions defined by function codes The Copro copies the data and function code into its local memory processes the data and copies the results back to Controller memory Function Codes e 0 499 User Immediate Deferred DXs e 500 9999 System Immediate Deferred DXs The two MSBs of the top register are the Copro in a multiple Copro system 144 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate DX Function Representation CALL Activate Immediate DX Function The content in this section applies specifically to the Immediate DX function of the Overview CALL instruction Symbol Representation of the instruction for an Immediate DX CALL CONTROL INPUT COMPLETE function code source code SCAN CALL ERROR Length 1 255 043505766 4 2006 145 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CALL Activate DX Function Parameter Description Description of the instruction s parameters for an Immediate DX CALL
242. tional PT contact passes power for only one scan as it transitions Trans from OFF to ON To define a discrete reference for the PT contact select it in the editor and click to open a dialog called Positive transition contact Symbol 94 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils Contacts and Interconnects Contact Neg A negative transitional NT contact passes power for only one scan as it transitions Trans from ON to OFF To define a discrete reference for the NT contact select it in the editor and click to open a dialog called Contact negative transition Symbol Ale 043505766 4 2006 95 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Coils Contacts and Interconnects Interconnects Shorts Definition of Interconnects Shorts Horizontal Short Vertical Short Shorts are simply straight line connections between contacts and or instructions in a ladder logic network Shorts may be inserted horizontally or vertically in a network Two kinds of shorts are available e horizontal short e vertical short A short is a straight line connection between contacts and or nodes in an instruction through which power flow can be controlled A horizontal short is used to extend logic out across a row in a network without breaking the power flow Each horizontal short consumes one node in the
243. tiplication by the value in register 300005 then adition with the value in register 300004 then logically ANDing the result with the value in register 300003 and finally comparing teh result with the value in register 300002 If the comparison is true the second argument in the conditional expression is executed and the value in register 300008 is copied to register 400001 If the comparison is false the third argument in the conditional expression is executed and the value in register 300009 is copied to register 400001 When operators of equal precedence appear in an expression they are generally evaluated in the order form from left to right and top to bottom in the equation network 62 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Equation Networks Using Parentheses in an Equation Network Expression Nested Parentheses Entering Parentheses in an Equation Network You can alter the order in which an expression is evaluated by enclosing portions of the expression in parentheses Parenthetical portions of the expressions are evaluated before portions outside the parentheses Notice how the following expressions are evaluated with and without parentheses Equation Comments 3 400001 300001U lt 300002U This expression is evaluated by the precedence 300004U amp 300001U 300001U lt 300002U 300004U amp 30
244. tomatically assigned the data type and should therefore only be occupied by Unlocated variables ANL OUT stands for the data type Analog Output and is used for processing analog values The 4x References of the configured analog output module which is specified in the I O component list is automatically assigned the data type and should therefore only be occupied by Unlocated variables In the existing version ANY covers the elementary data types BOOL BYTE DINT INT REAL UDINT UINT TIME and WORD and therefore derived data types 043505766 4 2006 Xxxi This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Glossary ANY BIT ANY ELEM ANY INT ANY NUM ANY REAL Application window Argument ASCII mode Atrium In the existing version ANY BIT covers the data types BOOL BYTE and WORD In the existing version ANY ELEM covers the elementary data types BOOL BYTE DINT INT REAL UDINT UINT TIME and WORD In the existing version ANY INT covers the data types DINT INT UDINT and UINT In the existing version ANY NUM covers the data types DINT INT REAL UDINT and UINT In the existing version ANY REAL covers the data type REAL The window which contains the working area the menu bar and the tool bar for the application The name of the application appears in the heading An application window can contain several document windows In Concept the app
245. twork Statistics 00 0c ccc eee 733 TCP IP Ethernet Statistics 2 2 liliis 738 Run Time EMOS uut i Herne mc rato D an rds f AD KLANG Ef bk a eee ee 739 Modbus Plus and SY MAX Ethernet Error Codes 2 2005 740 SY MAX specific Error Codes 00000 cet 742 TCP IP Ethernet Error Codes lese 744 CTE Error Codes for SY MAX and TCP IP Ethernet 747 Chapter 112 MU16 Multiply 16 Bit 2 cee ee 747 Short Description eses vni oboe Co Rh DU nies KANG db dor s 748 Representation MU16 16 Bit Multiplication llle 749 Chapter 113 MUL Multiply 4 ee 751 Short Description eee 752 Representation MUL Single Precision Multiplication 753 Example eer e e an 754 Chapter 114 NBIT Bit Control an 755 Short Description 0 eee eee eee eens 756 Representation NBIT Normal Bit 0 0 0 0 a 757 Chapter 115 NCBT Normally Closed Bit 759 Shon DescripllOIT s aakit pime bee Or ow BAR ed POSER fg AY 760 Representation NCBT Bit Normally Closed aa 761 xvii This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Chapter 116 Chapter 117 Part V Chapter 118 Chapter 119 Chapter 120 Chapter 121 Chapter 122 Chapter 123 Chapter 124 NOBT Normally Open Bit llleesee 763 Shert Desc
246. u receive incorrect results If however you must use one of the other ladder logic instructions you may place them in a separate network linked to a coil that is referenced to the network containing the CANT block Note Only 24 bit logic Quantum and 984 PLCs support the DX Loadable Function Block 16 bit controllers will not work with this particular block 152 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CANT Interpret Coils Contacts Timers Counters and the SUB Representation CANT Interpret Coils Contacts Timers Counters and the SUB Block Symbol Representation of the instruction ACTION CONTACT 3 register ACTION CONTACT 2 data register ACTION CONTACT 1 Parameter Description of the instruction s parameters Description Parameters State RAM Data Type Meaning Reference Top input Ox 1x None Action Contact 3 Please see the Note below Middle input Ox 1x None Action Contact 2 Please see the Note below Bottom input Ox 1x None Action Contact 1 Please see the Note below register 4x INT UINT Each CANT block contains a block of 10 setup top node registers which will automatically fill these 10 registers with internal data data register 4x INT UINT This node is the start of the 4x output data middle node registers For expanded and detailed information please
247. uction 7E XMIT Instruction 9E XMRD Instruction 51 IBKR 52 IBKW Note These opcodes are hard coded in the appropriate system firmware and they cannot be altered How the Y Bits The y bits in a database node holding DX function data contain a binary number that are Utilized for expresses the number of registers being transferred in the function A 16 bit DX Functions database node has 8 y bits A 16 bit CPU is therefore machine limited to no more than 255 transfer registers per DX operation A 24 bit database node has 13 y bits A 24 bit CPU is therefore capable of reaching a theoretical machine limit of 8191 transfer registers per DX operation practically however the greatest number of transfer registers allowed in a 24 bit DX operation is 999 32 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Ladder Logic Opcodes Opcode Defaults for Loadables Overview Various ladder logic instructions are available only in loadable software packages When instructions are loaded to a controller they are stored in RAM on page O in system memory They are not resident on the EPROM The loadable functions have the following opcodes Opcode Definition FF HSBY instruction SF CALL FNxx or EARS instruction 1F MBUS instruction 3F PEER instruction DE DMTH instruction BE MATH or EARS instruction FE DRUM instruction 7F
248. ues 18 State RAM Structure 20 The Configuration Table 22 The I O Map Table 26 043505766 4 2006 15 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC User Memory Overview User memory is the space provided in the PLC for the logic program and for system overhead User memory sizes vary from 1K 64K words depending on PLC type and model Each word in user memory is stored on page 0 in the PLC s memory structure words may be either 16 or 24 bits long depending on the CPU size CKSM Diagnostics Configuration Table Loadables I O Map Segment Scheduler 129 words STAT Block Tables Approximately up to 277 words 888 Words Overhead System Diagnostics Configuration Extension Table optional ASCII Message area User optional Logic User Application Program User Logic The amount of space available for application logic is calculated by subtracting the amount of space consumed by system overhead from the total amount of user logic System overhead in a relatively conservative system configuration can be expected to consume around 1000 words system configurations with moderate or large I O maps will require more overhead 16 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Memory Allocation in a PLC User Memory System Overhead Memory Backup Ladder logic requires one word
249. umerical value is posted middle node 1 INT UINT Constant value can not be changed bottom node Top output Ox None Echoes the state of the top input Bottom output Ox None ON error in the conversion operation 043505766 4 2006 125 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BCD Binary to Binary Code 126 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKM Block Move 18 At a Glance Introduction This chapter describes the instruction BLKM What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 128 Representation BLKM Block Move 129 043505766 4 2006 127 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BLKM Block Move Short Description Function The BLKM block move instruction copies the entire contents of a source table to a Description destination table in one scan WARNING Overriding of any disabled coils within a destination table without enabling them BLKM will override any disabled coils within a destination table without enabling them This can cause injury if a coil has been disabled for repair or maintenance because the coil s state can change as a result of the BLKM instruction Failure to follow this instruction can result in d
250. unction COMM block is used to transmit receive Description ASCII data in the form of a single ASCII character 1 to 4 integers or 1 to 4 hexadecimal numbers to or from the simple ASCII port The COMM instruction gives you the ability to read and write canned messages to from ASCII character input output devices via one of the built in communication ports on a Micro PLC or if the PLC is a parent via a comm port on one of the child PLCs on the expansion link Note Available only on the Micro 311 411 512 and 612 controllers 176 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com COMM ASCII Communications Function Representation COMM ASCII Communications Function Symbol Representation of the instruction CONTROL INPUT ACTIVE control block ERROR Source for writes Destination for reads ABORT SUCCESS COMM length data area size 3 255 8 255 Parameter Description of the instruction s parameters Description Parameters State RAM Reference Data Type Meaning Top input Ox 1x None ON starts the COMM operation Bottom input Ox 1x None ON aborts the operation and sets the middle out control block 4x INT UINT The 4xxxx register entered in the top top node node is the first of 10 contiguous holding registers in the control block For the register usage please see the Register Usage Table below
251. usted The installed loadable is available for programming at the menu Objects List Instructions DX Loadable 043505766 4 2006 101 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Installation of DX Loadables 102 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com Instruction Descriptions A to D At a Glance Introduction In this part instruction descriptions are arranged alphabetically from A to D What s in this This part contains the following chapters PER Chapter Chapter Name Page 13 1X3X Input Simulation 105 14 AD16 Ad 16 Bit 109 15 ADD Addition 113 16 AND Logical And 117 17 BCD Binary to Binary Code 123 18 BLKM Block Move 127 19 BLKT Block to Table 131 20 BMDI Block Move with Interrupts Disabled 135 21 BROT Bit Rotate 139 22 CALL Activate Immediate or Deferred DX Function 143 23 CANT Interpret Coils Contacts Timers Counters and the SUB Block 151 24 CHS Configure Hot Standby 157 25 CKSM Check Sum 163 26 CMPR Compare Register 167 27 Coils 171 28 COMM ASCII Communications Function 175 29 COMP Complement a Matrix 179 30 Contacts 185 31 CONV Convert Data 189 32 CTIF Counter Timer and Interrupt Function 193 33 DCTR Down Counter 203 043505766 4 2006 103 This document provid
252. x 3x 4x INT UINT Source table that will have its top node WORD contents copied in the block move destination Ox 4x INT UINT Destination table where the table WORD contents of the source table will middle node be copied in the block move table length INT UINT Integer value specifies the table bottom node size i e the number of registers in the source and destination tables they are of equal length Range 1 100 Top output Ox None Echoes the state of the top input 043505766 4 2006 137 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BMDI Block Move with Interrupts Disabled 138 043505766 4 2006 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BROT Bit Rotate 21 At a Glance Introduction This chapter describes the instruction BROT What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description 140 Representation BROT Bit Rotate 141 Parameter Description 142 043505766 4 2006 139 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com BROT Bit Rotate Short Description Function Description The BROT bit rotate instruction shifts the bit pattern in a source matrix then posts the shifted bit pattern in a destination matrix The bit pattern shifts left or right by one position per scan
253. y Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CANT Interpret Coils Contacts Timers Counters and 2 3 the SUB Block At A Glance Introduction This chapter describes the instruction CANT What s in this This chapter contains the following topics 2 Chapter Topic Page Short Description CANT Interpret Coils Contacts Timers Counters and the 152 SUB Block Representation CANT Interpret Coils Contacts Timers Counters and the 153 SUB Block Parameter Description CANT Interpret Coils Contacts Timers Counters and 154 the SUB Block 043505766 4 2006 151 This document provided by Barr Thorp Electric Co Inc 800 473 9123 www barr thorp com CANT Interpret Coils Contacts Timers Counters and the SUB Block Short Description CANT Interpret Coils Contacts Timers Counters and the SUB Block Function This DX Loadable Function Block upon initializing a triggering contact analyzes Description your ladder logic to extract the specific column and the corresponding contact id s where power flow has stopped The CANT block contains 20 registers A MSTR block is used to export data from the CANT s 20 registers to a PC running the Action Monitor program The CANT block is specifically used to interpret coils contacts timers counters and the SUB block You may not use any other types of ladder logic instructions in a network Otherwise yo

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