Home

User Manual PCIE-1816/1816H

1. 13 Signal Connections 19 OVervIeN museene ru dreide 16 Switch and Jumper Settings 16 Figure 3 1 Connector and Switch Locations 16 3 2 1 Board ID SW EE 17 Table 3 1 Board ID Setting GW 17 3 2 2 Power On Configuration JP1 17 Table 3 2 Power on Configuration after Hot Reset JP1 17 Signal Connections uvaner E danne 18 Figure 3 2 68 pin I O Connector Pin Assignments 18 3 3 1 I O Connector Signal Description 19 Table 3 3 I O Connector Signal Descriptions 19 3 3 2 Analog Input Connections 20 Figure 3 3 Analog Output Connections 22 3 3 3 Digital Signal Connections 0 0 0 eee e cette eect eteteeeeeeettaeeeeeeeeaaes 22 Field Wiring Considerations rrrrnnrrnnnnnnnnrrnnnnrnnrrnnnnrnnrrnennrrnnnrrnnsrennnnn 23 Specifications 25 Function Block TTT 26 Analog Input MR Ann na tnt teen teen 27 Analog E ee 28 Digital Div eh Ael e TT 28 Bell EA 29 General 28 ege gendscucved gcedcdchijendddeduy suevavetdagenecdevs gndcadestueseveren 29 Operation Theory S Analog Input Operation 32 V PCIE 1816 1816H User Manual B 1 1 A D Hardware Structure anA a 32 B 1 2 Analog Input Ranges and Gains 33 Table B 1 Gains and Analog Input Range eeeeeeeeeeenen 33 B 1 3 Analog Input Acquisition Mode sssesseesseseeeesrnnnrnnnensseessrerre nen 33 B
2. Use driver utility to configure hardware Use test utility to test hardware Read examples amp driver manual Start writing your own application Figure 1 1 Installation Flow Chart PCIE 1816 1816H User Manual 4 1 4 1 5 Software Overview Advantech offers a rich set of DLL drivers third party driver support and application software to help fully exploit the functions of your PCIE 1816 1816H card P Device Drivers on the companion DVD ROM LabVIEW driver Advantech DAQ NAVi Datalogger Programming choices for DA amp C cards You may use Advantech application software such as Advantech Device Drivers On the other hand advanced users can use register level programming although this is not recommended due to its laborious and time consuming nature DAQNavi Software Advantech DAQNavi software includes device drivers and SDK which features a complete I O function library to help boost your application performance This soft ware is included in the companion DVD ROM at no extra charge and comes with all Advantech DA amp C cards The Advantech DAQNavi software for Windows XP 7 8 desktop mode works seamlessly with development tools such as Visual Studio Net Visual C Visual Basic and Borland Delphi DAQNavi Device Driver Programming Roadmap This section will provide you a roadmap to demonstrate how to build an application from scratch using Advantech DAQNavi Device Driver with your favorite develop ment tools s
3. source It is fairly simple to connect a single ended chan nel to a floating signal source A standard wiring diagram looks like this Signal Input Vs To A D A GND A GND Differential Channel Connections Differential input connections use two signal wires per channel The card measures only the voltage difference between these two wires the HIGH wire and the LOW wire If the signal source has no connection to ground it is called a floating source A connection must exist between LOW and ground to define a common reference point for floating signal sources To measure a floating sources connect the input channels as shown below HIGH Vs Vin LOW G A GND PCIE 1816 1816H User Manual 20 If the signal source has one side connected to a local ground the signal source ground and the PCIE 1816 1816H ground will not be at exactly the same voltage as they are connected through the ground return of the equipment and building wiring The difference between the ground voltages forms a common mode voltage To avoid the ground loop noise effect caused by common mode voltages connect the signal ground to the LOW input Do not connect the LOW input to the PCIE 1816 1816H ground directly In some cases you may also need a wire connection between the PCIE 1816 1816H ground and the signal source ground for better grounding The following two diagrams show correct and incorrect connections for a differential input
4. version Each sample updates the output of all of the DACs You can specify an internal or external source for AO Convert Clock DIO 23 0 DGND Input Digital Input Output Channel 23 0 These Output pins are digital input output which could be con figured as general purpose digital inputs or out puts DGND Digital Ground This pin supplies the reference for the digital channels at the I O connector as well as the 5V and 12V DC supply The ground references AGND and DGND are connected together on the PCIE 1816 1816H CNTO CLK DGND Input Counter 0 1 External Clock Input The clock CNT1 CLK input of counters can be either external up to 10MH2z or internal 20MH2 as set by software 19 PCIE 1816 1816H User Manual Table 3 3 1 0 Connector Signal Descriptions CNTO OUT DGND Output Counter 0 1 Output CNT1 OUT CNTO GATE DGND Input Counter 0 1 Gate Control CNT1 GATE 12V DGND Output 12V DC Source This pin is 12V DC power supply for external use 0 1A maximum 5V DGND Output 5V DC Source This pin is 5V DC power sup ply for external use 0 3A maximum 3 3 2 Analog Input Connections PCIE 1816 1816H supports either 16 single ended or 8 differential analog inputs Single ended Channel Connections Single ended connections use only one signal wire per channel The voltage on the line references to the common ground on the card A signal source without a local ground is called a floating
5. l mme Dt TT XXXXXXXXX o Iteration ET RE 0 z i d counter ep 4 Scan R i counter Acquisition Window l 1 Double Clock timing Diagram Once the acquisition procedure inside Acquisition Windows is set the incoming CLKs must fit in the user specified acquisition sequence or the CLKs may be gated off Refer to the following figures for more details PCIE 1816 1816H User Manual 34 SCAN CLK are gated off SCAN CLK CONV CLK Channel I be PE RA KJEKK XXXX re Iteration Sean geg TT TATT counter NG NM 5 E I SCAN CLK p l cas ANNAN UT See LA AA AA IA AR AUX LINKER i Iteration ie OED oS o counter Scan 1 i 2 i 3 4 counter CONV CLK is too fast Other scanning procedure applications timing diagram SCAN CLK l l CONV CLK l l l Sumber HTH NBC UL E nues NANNA DEN 3 NM I l l l Iteration counter e Scan counter 1 Single Iteration 35 PCIE 1816 1816H User Manual CONY CLK Channel number SCAN CLK I H Iteration counter Scan counter Multiple Iteration timing with fixed channel CLK are gated off SCAN CLK CONV CLK Channel number Iteration counter Scan counter Improperly matched SCAN CLK and CONV CLK PCIE 1816 1816H User Manual 36 m Single Clock Sou
6. Part No 2003181600 Edition 1 Printed in Taiwan January 2014 PCIE 1816 1816H User Manual ii CE This product has passed the CE test for environmental specifications when shielded cables are used for external wiring We recommend the use of shielded cables This kind of cable is available from Advantech Please contact your local supplier for ordering information Technical Support and Assistance 1 Visit the Advantech web site at http support advantech com tw where you can find the latest information about the product 2 Contact your distributor sales representative or Advantech s customer service center for technical support if you need additional assistance Have the follow ing information ready before you call Product name and serial number Description of your peripheral attachments Description of your software operating system version application software etc complete description of the problem The exact wording of any error messages Packing List Before setting up the system check that the items listed below are included and in good condition If any item does not accord with the table Contact your dealer imme diately m PCIE 1816 1816H DA amp C card D Startup or User Manual E Companion DVD ROM with DAQNavi drivers included Safety Precaution Static Electricity Follow these simple precautions to protect yourself from harm and the products from damage 1 To avoid electrical
7. SCAN CLK SCAN CLK External CONV CLK CN Internal 32 bit SCAN CLK Divider Q Internal 32 bit Divider CONV CL Trigger Clock Routing Diagram Trigger Clock Control Logic 20 MHZ CONV CLK B 1 6 A D Trigger Source The PCIE 1816 1816H supports the following trigger sources for start delay to start delay to stop stop trigger acquisition modes M External digital TTL trigger PR Analog threshold trigger With PCIE 1816 1816H user can also define the type of trigger source as rising edge or falling edge These following sections describe these trigger sources in more detail External Digital TTL Trigger For analog input operations an external digital trigger event occurs when the PCIE 1816 1816H detects either a rising or falling edge on the External A D TTL trigger input The trigger signal is TTL compatible 41 PCIE 1816 1816H User Manual B 2 B 2 1 H Analog Threshold Trigger For analog input operations an analog trigger event occurs when the PCIE 1816 1816H detects a transition from above a threshold level to below a threshold level falling edge or a transition from below a threshold level to above a threshold level rising edge User should connect ana log signals from external device or analog output channel on board to external input signal ATRGO 1 On the PCIE 1816 1816H the threshold level is set using a dedicated 16 bit DAC By software you can pro gram
8. digital trigger event occurs when the PCIE 1816 1816H detects either a rising or falling edge on the External D A TTL trigger input signal from the pin of connector User can define the type of trigger source as rising edge or falling edge by software The trigger signal is TTL compatible Table B 4 Analog Output Data Format D A Code Mapping Voltage Hex Dec Unipolar Bipolar 0000 h Od 0 FS 2 7FFF h 32767 d FS 2 1 LSB 1LSB 8000 h 32768 d FS 2 0 FFFF h 65535 d FS 1 LSB FS 2 1 LSB 1 LSB FS 65536 FS 65536 Table B 5 Full Scale Values for Output Voltage Ranges Reference Unipolar Bipolar Source Range FS Range FS Internal o 2 AA 19 0 10V 10 10V 20 External O xV D xV 2x PCIE 1816 1816H User Manual 44 B 3 B 4 Digital Input Output Operation The PCIE 1816 1816H supports 24 digital I O channels You can use each byte as either an input port or an output port by configuring the corresponding parameter and all four channels of the byte have the same configuration You do not need to specify the clock source or trigger source To output the data you just need to write it to the digital output channel directly In the same way you can directly read back data from digital input channel The default configuration after reset sets all the digital I O channels to logic low so users don t need to worry about damaging external devices during system start up or reset Counter Input a
9. mode is the simplest way for analog output operation Users can set the mode of each channel individually Then users just need to use software to write output data to specific register The analog output channels will out put the corresponding voltage immediately In the single value operation mode users need not set any clock source and trigger source but only output voltage range P Waveform Mode In waveform mode all D A channels can change output voltage at the same time Users can accurately control the update rate up to 3 MS s between conversions of individual analog output channels and takes full advantage of the PCIE 1816 1816H In this mode you can specify a clock and trigger source and either of the two analog output channels to work in this mode Before operating in this mode users need to set the clock and trigger source first and then generate the output data stored in the memory buffers of host PC The host computer then transfers those data to the DACs buffers on PCIE 1816 1816H When PCIE 1816 1816H detects a trigger it outputs the values stored in its buffer When the buffer s storage decreases the card sends an interrupt request to the host PC which in turn sends samples to the buffer This output operation will repeat until either all the data is sent from the buffers or until you stop the operation If the two D A channels are both operating in continuous output mode the data in buffer will be sent in an interlaced manne
10. shock always disconnect the power from your PC chassis before you work on it Don t touch any components on the CPU card or other cards while the PC is on 2 Disconnect power before making any configuration changes The sudden rush of power as you connect a jumper or install a card may damage sensitive elec tronic components iii PCIE 1816 1816H User Manual PCIE 1816 1816H User Manual Contents Chapter 1 Chapter 2 2 1 2 2 2 3 2 4 Chapter 3 3 1 3 2 3 3 3 4 Appendix A Appendix B B 1 Introduction s a avavnvavavnnnnnnvnvnvavnvavnvner 1 Featlir s ccs cccessenadeavgennceateccunctaaatesnasnesaddeaedseacdexuneadeveeenegaagdecnadcatencnneane deeds 2 leie er Le ET 3 Installation Guide TE 3 Figure 1 1 Installation Flow Chart 4 Software Overview ss 5 DAQNavi Device Driver Programming Roadmap sessesseesseeerrereeerrreses 5 lee ET 6 Installation avnnnnvnvunnnvnvannavnvnnnnvavanenrn ll UNPACKING RE 8 Driver lU LEE 9 Figure 2 1 Setup Screen of Advantech Automation Software 9 Figure 2 2 Different Options for Driver Setup 10 Hardware Installation 2 444444 usines 10 Device Setup amp Configuration 12 Figure 2 3 The Device Setting of PCIE 1816 1816H eeeenu 12 Figure 2 4 The Device Setting page rrsrrrnnnnnnnrrrnnnnnnnrrrnnnrrnen 13 Figure 2 5 The Device Testing of PCIE 1816 1816H
11. with local ground Correct Connection Incorrect Connection Vin Vs Vcm GND 21 PCIE 1816 1816H User Manual Analog Output Connection The PCIE 1816 1816H provides two D A output channels You can use the internal precision 5 V or 10 V reference to generate 0 to 5 V or 0 to 10 V D A output Use an external reference for other D A output ranges The maximum reference input voltage is 10 V and maximum output scaling is 10 V Loading current for D A out puts should not exceed 5 mA Fig 3 3 shows how to make analog output and external reference input connections on the PCIE 1816 1816H Internal External 5V 10V INT REI External Reference For DA Signal 0 Extamal Retererce For DA Signet 1 VO Connector Figure 3 3 Analog Output Connections 3 3 3 Digital Signal Connections The PCIE 1816 1816H has 24 digital input output channels and they can be config ured as input or output channels The digital I O levels are TTL compatible The fol lowing figure shows connections to exchange digital signals with other TTL devices DO TTL Devices DI D GND D GND Lo PCIE 1816 1816H User Manual 22 3 4 Field Wiring Considerations When you use PCIE 1816 1816H cards to acquire data from outside noises in the environment might significantly affect the accuracy of your measurements if due cau tions are not taken The following measures will be helpful to reduce possible inter
12. 1 4 AD Trigger Modes ceeds tetas secdevudesdeces iia aai 37 B 1 5 A D SCAN CONV Clock Source 40 B 1 6 A D Tigger SOurceu nn arm uk nn the an aan 41 Table B 2 Analog Input Data Format 42 Table B 3 Full Scale Values for Input Voltage Ranges 42 B 2 PCIE 1816 1816H Analog Output Operation 42 B 2 1 Analog Output Ranges sssseessssessessneessssnnasenennnansannnaaannnnnaetnanns 42 B 2 2 Analog Output Operation Modes eeceecceeeeeeeeeeeteeteees 43 B 2 3 D A Clock SOurces minnene dacedcduetneductegstebeduuiuanscauciest 44 B 2 4 D A Trigger Sources i iein inaani 44 Table BA Analog Output Data Format 44 Table B 5 Full Scale Values for Output Voltage Ranges 44 B 3 Digital Input Output Operation srerrrnnrennrrrrrrrrrnrrnrnnnnrnnennrernernrrrnrnnnnnn 45 B 4 Counter Input and PWM InputiOutpout ee 45 PCIE 1816 1816H User Manual vi Introduction This chapter introduces PCIE 1816 1816H and and its typical applications Sections include E Features E Applications E Installation Guide E Software Overview E Roadmap E Accessories The PCIE 1816 1816H is a PCI Express multifunction card for IBM X86 or compatible computers It offers the five most desired measurement and control functions 16 bit A D conversion 16 bit D A conversion Digital input Digital output BR Timer counter A programmable gain instru
13. 16 and PCIE 1816H should be always lim ited under 500 KHz and 1 MHz The exceeding frequency may result in data loss or unexpected data acquisition E External A D CONV clock This setting is useful when single external clock source is available Instead of hard wire the internal routing can protect signals from different line transmission delay CONV Clock Internal A D CONV clock derived from 32 bit divider External A D CONV clock from terminal board m Internal A D CONV Clock The same as internal SCAN clock the internal A D CONV clock applies 100 MHz time base accompanied with 32 bit divider The maximum frequency is 500 KS s According to the sampling theory Nyquist Theorem you must specify a frequency that is at least twice as fast as the input s highest frequency component to achieve a valid sampling For example to accurately sample a 20 kHz signal you have to spec ify a sampling frequency of at least 40 kHz This consideration can avoid an error condition often know as aliasing in which high frequency input components appear erroneously as lower frequencies when sampling PCIE 1816 1816H User Manual 40 m External A D CONV Clock The external A D CONV Clock is convenient in uneven sampling internal A D con version will start by each arriving rising edge The sampling frequency is always lim ited to a maximum of 500 KHz External Digital Trigger Trigger Analog Threshold Trigger External
14. 1E 68 pin SCSI Shielded Cable 1 m m PCL 10168 2E 68 pin SCSI Shielded Cable 2 m m PCL 10168H 1E 68 pin SCSI Shielded Cable with Noise Rejecting 1 m P PCL 10168H 2E 68 pin SCSI Shielded Cable with Noise Rejecting 2 m Wiring Boards BR ADAM 3968 68 pin DIN rail SCSI Wiring Board PCIE 1816 1816H User Manual 6 Installation This chapter provides a packaged item checklist proper instructions for unpacking and step by step procedures for both driver and card installation Sections include E Unpacking E Driver Installation E Hardware Installation E Device Setup amp Configuration 2 1 Unpacking After receiving your PCIE 1816 1816H package inspect the contents first The pack age should include the following items m PCIE 1816 1816H card E Companion DVD ROM Device Drivers included D Startup Manual The PCIE 1816 1816H card harbor certain electronic components vulnerable to elec trostatic discharge ESD ESD can easily damage the integrated circuits and certain components if preventive measures are ignored Before removing the card from the antistatic plastic bag you should take following precautions to ward off possible ESD damage Touch the metal part of your computer chassis with your hand to discharge the static electricity accumulated on your body Alternatively one can also use a grounding strap M Touch the anti static bag to a metal part of your computer chassis before open ing the bag Tak
15. 25 V 0 625 V For each channel choose the gain level providing the most optimal range that can accommodate the signal range you want to measure Analog Input Acquisition Mode The PCIE 1816 1816H can acquire data in either single value or pacer mode m Single Value Acquisition Polling Mode The single value acquisition mode is the simplest way to acquire data User can sim ply poll the data register of the desired channel to get the latest acquired value Each analog input channel has its own dedicated data register buffer and in this mode the PCIE 1816 1816H updates each channel cyclically The update rate is sampling rate num of active channels Buffer Mode Adopt buffer mode to acquire data if you wanna accurately control the time interval between conversions A D conversion clocks come from internal clock sources or external signals on connector A D conversion starts when the clocks signal come in and will not stop if the clocks are continuously sent Conversion data is accumulated into the on board A D buffer and waiting the transfer to PC memory Further you can specify Trigger to acquire the desired periods We will discuss the detail in the next sections AID Data Acquisition Clock Timing The PCIE 1816 1816H introduces a double clock system with SCAN clock and CONV clock to generate efficient A D conversion clocks at dedicated timing You can control acquisition timing interval precisely and just acquire the desire
16. 3mV step Bipolar Range Unipolar Range 1 LSB For Full Scale Step 10V NA 1 04 us 5V 0 10V 1 04 us 2 5V 0 5V 1 04 us 1 25V 0 2 5V 4 us 0 625V 0 1 25V 5us 27 PCIE 1816 1816H User Manual A 3 Analog Output Channels 2 Resolution 16 bit Memory Size 4k samples Update Rate 3 MS s Internal Reference 0 5 0 10 5 10 V External Reference Output Range Reference Input Maximum Range Unipolar O xvV Bipolar 10V lt x lt 10V xV xV Accuracy Relative 1 LSB Differential Non Linearity 1 LSB monotonic Slew Rate 20 V us Gain Error Adjustable to zero manual calibration Drift 30 ppm C Driving Capability 5 mA Update Mode Static update waveform Output Impedance max 0 10 A 4 Digital Input Output Channels 24 shared TTL compatible BEER Low 0 8V max j S High 20V min L 0 8 V 15 mA sink Output Voltage gt MGM High 2 0 V min 15 mA source PCIE 1816 1816H User Manual 28 A 5 Counter Timer A 6 Channels 2 channels independent Resolution 32 bit Compatibility TTL level Clock Source Internal 20MHZ or external clock 10 MHz max Selected by software Output Frequency Max 10MHz Low 0 8 V max Clock Input High 2 0 V min Low 0 8 V Gate Input fe High 2 0 V min Low 0 8 V max 15mA Counter Output S Q High 2 0 V min 15mA F cee
17. Frequency 10 kHz 45 PCIE 1816 1816H User Manual 3 Pulse Width measurement PCIE 1816 1816H built in counter can measure the pulse width value of the signal connected to counter input The measurable range is 50 ns to 107 seconds You can measure both the logic high time and logic low time within the measurable range Counter Input N fl N f f n N fl f fl CLK pin TE Counter Value Pulse Width 5 ms 4 Pulse Output with Timer Interrupt PCIE 1816 1816H counter has internal clock that you can produce periodic output signal with interrupt generated at the same time PCIE 1816 1816H counter will use internal clock as time base to fulfill the frequency you want to set See the figure below as example the desired fre quency is 5 MHZ The internal clock is 20 MHz so PCIE 1816 1816H will peri odically generate output signal and interrupt every 4 pulses of the internal clock 20 MHz 5 MHz 4 Available output frequency range is 0 005 Hz 5 MHz Tonen t Interrupt t Interrupt Type Positive Pulse Negative Pulse Type PCIE 1816 1816H User Manual 46 5 Delay Pulse Generation Using PCIE 1816 1816H internal clock you can change the logic level within a specific period starting from a trigger signal con necting to counter gate input For example if you define the count equals to 3 as figure below a counter output will change its status after 3 pulses of internal clock signals pass after a t
18. User Manual PCIE 1816 1816H 16 bit Multifunction Card with PCI Express Bus AD ANTECH Enabling an Intelligent Planet Copyright This documentation and the software included with this product are copyrighted 2013 by Advantech Co Ltd All rights are reserved Advantech Co Ltd reserves the right to make improvements in the products described in this manual at any time without notice No part of this manual may be reproduced copied translated or transmitted in any form or by any means without the prior written permission of Advantech Co Ltd Information provided in this manual is intended to be accurate and reliable However Advantech Co Ltd assumes no responsibility for its use nor for any infringements of the rights of third parties which may result from its use Acknowledgments Intel and Pentium are trademarks of Intel Corporation Microsoft Windows and MS DOS are registered trademarks of Microsoft Corp All other product names or trademarks are properties of their respective owners Product Warranty 2 years Advantech warrants to you the original purchaser that each of its products will be free from defects in materials and workmanship for two years from the date of pur chase This warranty does not apply to any products which have been repaired or altered by persons other than repair personnel authorized by Advantech or which have been subject to misuse abuse accident or improper installation Advantech
19. VDS 16 ch AI MUX e SPI r 2 ch AO SPI i pac gt I gt I 24 I aoe Buffer 24 ch DI O mA E am ee 4 I I I I Parallel y 2 n OU 5 D a E S S g WW Q E Ke Ei U 5 co L U A PCIE 1816 1816H User Manual 26 A 2 Analog Input Channels 16 single ended 8 differential Resolution 16 bit Built in memory 4K samples Model PCIE 1816 PCIE 1816H Sampling Rate Single channel 500 KS s 5 MS s Multi channel 500 KS s 1 MS s Unipolar Bipolar Mixed 100 KS s 250 KS s Gain 0 5 1 2 4 8 Input Range and Gain List Unipolar NA 0 10 0 5 0 2 5 0 1 25 Bipolar 10 5 25 1 25 0 625 Gain 0 5 1 2 4 8 Drift Zero 25 ppm C Span 15 ppm C Input Signal Band Width Gain 0 5 1 2 4 8 3dB BW MHz 4 4 4 4 4 4 3 3 1 7 Max Input Voltage 15V Input Impedance 1G Q 2pF Clock Source Software or external Start trigger Delay to Start trigger Trigger Mads Stop trigger Delay to Stop trigger INLE 2 LSB Under manual adjustment DNLE 1 LSB Under manual adjustment DC Offset error Adjustable to zero Gain 0 5 1 2 4 8 Accuracy Gain Error FSR 0 0075 0 0075 0 0075 0 008 0 008 Channel Type Single Ended Differential NR AC S 90 dB ENOB 15 bits External Digital Trigger Low 0 8V max High 2 0V min Min pulse width 50 ns External Analog Trigger Range 10V 10V Resolution 16 bit 0
20. and the bias current return point for differential measure ment The ground reference AGND and DGND are connected together on the PCIE 1816 1816H ATRGO AGND Input Analog Threshold Trigger These pins are the ATRG1 analog input threshold trigger input DTRGO DGND Input Digital Trigger These pins are the digital input DTRG1 The left pins are used to start or stop a data acquisition Analog Threshold Trigger and Digital Trigger are used to execute a specific data acquisition mode an acquisition which consists of one or more scans And then a data acquisition behavior needs a stop trigger signal while the pin is used to stop function The active edge of the start and stop function could be programmed to be rising or falling Al SCAN DGND Input AI Scan Clock This pin is used to initiate a set of data acquisition The card samples the Al signals of every channel in the scan list once for every Al Scan Clock AI CONV DGND Input AI Conversion Clock This pin is to initiate a sin gle Al conversion on a single channel A Scan controlled by the Al Scan Clock consists of one or more conversions AO0 REF AGND Input AO Channel 0 1 External Reference This is the AO1 REF external reference input for the analog output channel 0 1 AO0 OUT AGND Output AO Channels 0 1 This pin supplies the voltage AO1 OUT output of analog output channel 0 1 AO CONV DGND Input AO Convert Clock This pin is to initiate AO con
21. assumes no liability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most of our customers never need to use our repair service If an Advantech product is defec tive it will be repaired or replaced at no charge during the warranty period For out of warranty repairs you will be billed according to the cost of replacement materials service time and freight Consult your dealer for more details If you think you have a defective product follow these steps 1 Collect all the information about the problem encountered For example CPU speed Advantech products used other hardware and software used etc Note anything abnormal and list any onscreen messages you get when the problem occurs 2 Call your dealer and describe the problem Have your manual product and any helpful information readily available 3 If your product is diagnosed as defective obtain an RMA return merchandize authorization number from your dealer This allows us to process your return more quickly 4 Carefully pack the defective product a fully completed Repair and Replacement Order Card and a photocopy proof of purchase date such as your sales receipt in a shippable container A product returned without proof of the purchase date is not eligible for warranty service 5 Write the RMA number visibly on the outside of the package and ship it prepaid to your dealer
22. d period It can save the waste of PCI bandwidth with continuing acquisition and post data process ing by filtering out the redundant data beforehand In this section we will describe how it works and its timing reference in detail 33 PCIE 1816 1816H User Manual Double Clock Procedure Double clock procedure is the fundamental A D conversion mechanism of the PCIE 1816 1816H regardless of which mode selected The incoming SCAN CLK launches an acquisition period called Acquisition Window The arriving CONV CLKs within the Acquisition Window will become an efficient A D conversion clock to trigger A D con verter The number of efficient CONV CLK depends on the number of active scan ning multiplex channels and software programed iteration counters One scanning iteration is defined as the time auto scan multiplexer routes input channels from Start channel to Stop channel once On the other words all the active channels are sam pled once in a single iteration After the iteration counter counts down to zero the Acquisition Window will be disable automatically and wait for the next incoming SCAN CLK The end of Acquisition Window resets the iteration counter to its user specified value Users can specify the iteration counter by software and read back the number of incoming SCAN CLKs from SCAN CLK counter A Voltage cito CH I CH2 gt I Conv Period Time FE I Scan Period l l SCAN CLK Ei I I CONV CLK
23. e PCIE 1816 1816H card uses a PCIe controller to interface the card to the PCI Express bus The controller fully implements the PCI bus specification Rev 2 2 All configurations related to the bus such as base address and interrupt assignment are automatically controlled by software No jumper or switch is required for user configuration Automatic Channel Gain Scanning The PCIE 1816 1816H features an automatic channel gain scanning circuit This cir cuit instead of your software controls multiplexer switching during sampling On board SRAM stores different gain values for each channel This combination lets user perform multi channel high speed sampling for each channel Onboard Ring Buffer Memory There are 4k samples ring buffer for A D and D A on PCIE 1816 1816H This is an important feature for faster data transfer and more predictable performance under Windows system PCIE 1816 1816H User Manual 2 1 2 1 3 Onboard Programmable Timer Counter The PCIE 1816 1816H features two 32 bit timer counters to provide one shot output PWM output periodic interrupt output time delay output and the measurement of frequency and pulse width BoardID Switch The PCIE 1816 1816H has a built in DIP switch that helps define each card s ID when multiple PCIE 1816 1816H cards have been installed on the same PC chassis The BoardiD setting function is very useful when building a system with multiple PCIE 1816 1816H cards With the correct BoardID s
24. e hold of the card only by the metal bracket when removing it out of the bag After taking out the card you should first M Inspect the card for any possible signs of external damage loose or damaged components etc If the card is visibly damaged please notify our service department or our local sales representative immediately Do not install a dam aged card into your system Also pay extra attention to the followings to ensure a proper installation BR Avoid physical contact with materials that could hold static electricity such as plastic vinyl and Styrofoam P Whenever you handle the card grasp it only by its edges DO NOT TOUCH the exposed metal pins of the connector or the electronic components Note Keep the anti static bag for future use You might need the original bag N to store the card if you have to remove the card from a PC or transport it E elsewhere PCIE 1816 1816H User Manual 8 2 2 Driver Installation We recommend you to install the driver before you install the PCIE 1816 1816H card into your system since this will guarantee a smooth installation process The Advantech DAQNavi Device Drivers Setup program for the PCIE 1816 1816H card is included in the companion DVD ROM that is shipped with your DA amp C card package Please follow the steps below to install the driver software 1 Insert the companion DVD ROM into your DVD ROM drive 2 The Setup program will be launched automatically if you have the aut
25. eal 0 1 when input signal frequency 2 40KHz Error in Pulse Width Advanced M asursmert 0 1 when input signal frequency lt 40KHz Functions Se Pulse Output within 2 when output frequency gt 1MHz PWM Output within 2 when output frequency gt 1MHz Note When performing advanced functions like frequency measurement and N pulse output there will be errors And the error will vary depending on the parameter selections and the OS performance General I O Connector Type 68 pin SCSI female Dimensions 167 x 100 mm Typical 3 3 V 504 mA 12 V Q 152 mA Power Consumption ypica m m Max 3 3 V 2 49 A 12 V 408 mA i 60 2 140 F T inperature Operating 0 60 C 3 0 F Storage 40 70 C 40 158 F O ti 85 RH i Relative Humidity perating 5 85 RH non ER Storage 5 95 RH non condensing Certifications CE FCC certified 29 PCIE 1816 1816H User Manual PCIE 1816 1816H User Manual 30 Appendix B Operation Theory B 1 Analog Input Operation This section describes the following features of analog input operation theory that can help you realize how to configure the functions and parameters to match various applications A D Hardware Structure Analog input ranges and gains Analog data acquisition mechanism Analog input acquisition modes A D SCAN CONV clock source A D trigger sources Analog input data format B 1 1 A D Hardware Structure The A D conver
26. ed after a preset delay number of SCAN CLKs has been taken after the trigger event User can set the delay number of SCAN CLKs by a 32 bit counter Delay to start trigger acquisition starts when the PCIE 1816 1816H detects the trig ger event and stops when you stop the operation Start Trigger l I l I SCAN CLK Scan Counter o l 2 3 4 5 6 Delay to Start Trigger M 4 PCIE 1816 1816H User Manual 38 m Delay to Stop Trigger Acquisition Mode When you want to acquire data both before and after a specific trigger event occurs users should take advantage of the delay to stop trigger mode First designate the size of the allocated memory and the amount of samples to be snatched after the trigger event happens The about trig ger acquisition starts when the first SCAN CLK signal comes in Once a trigger event happens the on going data acquisition will continue until the designated amount of SCAN CLKs have been reached When the PCIE 1816 1816H detects the selected about trigger event the card keeps acquiring the preset number of samples and kept them on the buffer l Stop Trigger I SCAN CLK Scan Counter M Counter 5 SCANs after Stop Trigger Delay to Stop Trigger M 5 M Stop Trigger Acquisition Mode Stop trigger mode is a particular application of about trigger mode Use pre trigger acquisition mode when you want to acquire data before a specific trigger event occurs Stop trigger acquisitio
27. ettings you can easily identify and access each card during hardware configuration and software programming Note For detailed specifications and operation theory of the PCIE 1816 1816H please refer to Appendix A and B Tr Applications M Transducer and sensor measurements PB Waveform acquisition and analysis M Process control and monitoring B Vibration and transient analysis Installation Guide Before you install your PCIE 1816 1816H card please make sure you have the fol lowing necessary components m PCIE 1816 1816H DA amp C card m PCIE 1816 1816H User Manual P Driver software Advantech DAQNavi software included in the companion DVD ROM M Personal computer or workstation with a PCI Express interface running Win dows 8 desktop mode 7 and XP m Shielded Cable PCL 10168 or Shielded Cable with Noise Rejecting PCL 10168H optional P Wiring Board ADAM 3968 optional Other optional components are also available for enhanced operation P DAQ Navi LabView or other 3rd party software After you get the necessary components and maybe some of the accessories for enhanced operation of your multifunction card you can then begin the installation procedure Figure 1 1 on the next page provides a concise flow chart to give users a broad picture of the software and hardware installation procedures 3 PCIE 1816 1816H User Manual Install driver from DVD ROM and turn off computer Install hardware and turn on computer
28. fer ence running signal wires between signal sources and the PCIE 1816 1816H card The signal cables must be kept away from strong electromagnetic sources such as power lines large electric motors circuit breakers or welding machines since they may cause strong electromagnetic interference Keep the analog sig nal cables away from any video monitor since it can significantly affect a data acquisition system If the cable travels through an area with significant electromagnetic interference you should adopt individually shielded twisted pair wires as the analog input cable This type of cable has its signal wires twisted together and shielded with a metal mesh The metal mesh should only be connected to one point at the sig nal source ground Avoid running the signal cables through any conduit that might have power lines in it If you have to place your signal cable parallel to a power line that has a high voltage or high current running through it try to keep a safe distance between them Alternatively you can place the signal cable at a right angle to the power line to minimize the undesirable effect The signals transmitted on the cable will be directly affected by the quality of the cable In order to ensure better signal quality we recommend that you use the PCL 10168 shielded cable 23 PCIE 1816 1816H User Manual PCIE 1816 1816H User Manual 24 Appendix A Specifications A 1 Function Block x1 PCI Express L
29. i SDK chapter in the DAQNavi SDK Manual or the video tutorials in the Advantech Navigator Programming with DAQNavi Device Drivers Function Library Advantech DAQNavi Device Drivers offer a rich function library that can be utilized in various application programs This function library consists of numerous APIs that support many development tools such as Visual Studio Net Visual C Visual Basic Delphi and C Builder According to their specific functions or services APIs can be categorized into several function groups P Analog Input Function Group Analog Output Function Group Digital Input Output Function Group Counter Function Group Port Function Group direct I O M Event Function Group For the usage and parameters of each function please refer to the Using DAQNavi SDK chapter in the DAQNavi SDK Manual Troubleshooting DAQNavi Device Drivers Error Driver functions will return a status code when they are called to perform a certain task for the application When a function returns a code that is not zero it means the function has failed to perform its designated function To troubleshoot the Device Drivers error you can pass the error you can check the error code and error descrip tion within the Error Control of each function in the DAQNavi SDK Manual 1 6 Accessories Advantech offers a complete set of accessory products to support the PCIE 1816 1816H card These accessories include Wiring Cables m PCL 10168
30. ion and testing The following sections will guide you through the Setup Configuration and Testing of your device 11 PCIE 1816 1816H User Manual 2 4 Device Setup amp Configuration The Advantech Navigator program is a utility that allows you to set up configure and test your device and later stores your settings on the system registry These settings will be used when you call the APIs of Advantech Device Drivers Setting Up the Device 1 To install the I O device for your card you must first run the Advantech Naviga tor program by accessing Start Programs Advantech Automation DAQNavi Advantech Navigator 2 You can then view the device s already installed on your system if any on the Installed Devices list box If the software and hardware installation are com pleted you will see PCIE 1816 1816H card in the Installed Devices list ES Advantech Navigator 3 d V DAQNavi AD ANTECH Contents Device Setting amp Welcome Setting of PCIE 1810 BID 15 I S DAQNavi M E E Devices Si H IX Installed Devices Device Se Device Number 11 132 DemoDevice BID 0 i Anton beet Name PCIE 1810 2 PCIE 1810 BID 15 ea Description PCIE 1810 BID 15 E Device Setting EFR E Device Test Sacn Clock Product Id 0x810 VW fr KE Scenarios Trigger0 Board Id OxF ES Reference Trigger 1 Driver Version 3 1 0 12 SQ PCIE 1810 BID 0 al oan F e Sane Ei PCIE 1810 BID 0 Analog Input Calibration tg di Supported Devices Analog Inpu
31. le Port 1 High Nibble 30 Reference Trigger 1 cu 30 PCIE 1810 BID 0 Special Configuration Input Output Input Output RX PCIE 1810 BID 0 Analog Input Calibration Supported Devices Auchan most Mr Cala Port 2 Low Nibble Port 2 High Nibble 55 SDKs Analog Output Input Output Input Output H DAQNavi User Interface AO Channel z De Si ie fm d Welcome to Advantec E video Tutorial seg 5 432 Tools Trigger 1 l F4 Multimeter Analog Output Calibration C somer Feedback Analog Culpa Maral Calib Digital Input Output DIO Ports Direction DI Filter DI Interrupt DI Pattern Match Interrupt DI Status Change Interrupt g DO Port Initial Status Counter Clock Filter M Event Counter Frequency Measurement Y m V Update Device V Update System Database m Figure 2 4 The Device Setting page A After your card is properly installed and configured you can go to the Device Test page to test your hardware by using the testing utility supplied DAQNavi Contents Device Test X Welcome 9 DAQNavi Mf Devices SJK Installed Devices HX DemoDevice BID 0 X PCIE 1810 B10 15 IK Device Setting IK Device Test X Scenarios IK Reference K PCIE 1810 BID 0 IX PCIE 1810 BID 0 14 Supported Devices 5 SDKs 5 DAQNavi User Interface Manual Welcome to Advantech DAQNavi 5 Video Tutorial EX Tools IK Multimeter Customer Feedback DeviceTest of PCIE 1810 BID 15 Anal
32. ment amplifier lets you acquire different input signals without external signal conditioning An onboard 4k word FIFO buffer provides high speed data transfer and predictable performance under Windows Automatic channel scanning circuitry and onboard SRAM let you perform multiple channel A D conver sion and individual gains for each channel The following sections of this chapter will provide further information about features of the multifunction cards a Quick Start for installation together with some brief infor mation on software and accessories for the PCIE 1816 1816H cards 1 1 Features 16 single ended or 8 differential A D inputs programmable 16 bit A D converter up to 500 kHz sampling rate for PCIE 1816 16 bit A D converter up to 5 MHz sampling rate for PCIE 1816H Instant software polling 1 25 us high speed response Double Clock acquisition operation for analog input Start Delay to Start Delay to Stop Stop event trigger capable Programmable gain for each input channel automatic channel gain scanning 4K onboard ring buffer for analog input and output Two independent 16 bit analog output channels with continuous waveform out put function of maximum 3 MHz throughput rate Auto Calibration for analog input and output channels 24 digital Input or output channels TTL compatible Two 32 bit independent full function counters BoardID switch PCIE 1816 1816H offers the following main features PCle Bus Plug amp Play Th
33. n starts when you start the operation and stops when the trigger event happens Stop Trigger k sr D D DDDDnnn eee Scan Counter M Counter t Stop Trigger M 0 39 PCIE 1816 1816H User Manual B 1 5 A D SCAN CONV Clock Source The PCIE 1816 1816H can adopt both internal and external clock sources to accom plish pacer acquisition You can set the clock and trigger sources conveniently by software The figure can help you understand the routing route of clock and trigger generation SCAN Clock Internal A D SCAN clock derived from 32 bit divider External A D SCAN clock from terminal board External A D CONV clock from terminal board D Internal A D SCAN Clock The internal A D SCAN clock uses a 100 MHz time base divided by a 32 bit divider programmable by software You can program SCAN clock source to internal and its frequency the clock source as internal and the frequency 500 KS s maximum for the PCIE 1816 multi channel and 1 MS s maximum for the PCIE 1816H multi channel to activate A D conversions To ensure system stability SCAN clock frequency should be less or equal to CONV clock m External A D SCAN Clock The external A D SCAN clock is useful when you want to execute acquisitions at rates not available from the internal A D SCAN clock or when you want to pace at uneven intervals Acquisitions will start the rising edge of the external A D SCAN clock input And the frequency for PCIE 18
34. nd PWM Input Output PCIE 1816 1816H offer two 32 bit counters inputs which can perform event counting frequency measurement and pulse width measurement Counters on PCIE 1816 1816H have a counter value match interrupt function When this interrupt function is enabled an interrupt signal will be generated if the counter value reaches a pre set counter match value The counter will continue to count until an overflow occurs then it will go back to its reset value zero and continue the count ing process A user can set each individual counter channel to count either falling edge high to low or rising edge low to high signals Except measurement functionality counter input channels can combine with PWM output channels to generate single pulse pulse train or PWM pulse width modu lated output signal A pulse width modulated waveform is created when the High and Low periods of a periodic rectangular signal are varied Using PCIE 1816 1816H user can individually set each PWM channel s High and Low periods for from 2 to 23 1 units 1 unit 50 ns depending on his needs 1 Event counter PCIE 1816 1816H built in counter can calculate how many pulse are sent into the input channel Counter Input CLK pin Counter Value i 2 3 4 5 6 2 Frequency measurement PCIE 1816 1816H built in counter can measure the frequency value of the signal connected to counter input counterinst T CLK pin Counter Value
35. nfiguration after hot reset 1 Keep last status after hot reset o o o 1 O Default configuration Default setting 17 PCIE 1816 1816H User Manual 3 3 Pin Assignments Signal Connections The I O connector on the PCIE 1816 1816H is a 68 pin connector that enable you to connect to accessories with the PCL 10168 1 or PCL 10168H shielded cable Figure 3 2 shows the pin assignments for the 68 pin I O connector on the PCIE 1816 1816H and Table 3 3 shows its I O connector signal description AI10 AI12 Al14 AGND ACO REF AC OUT AGND ATRGO DTRGO AI SCAN NA DICO DIO2 DIO4 DIOS DGND DICE DIO10 DIO12 DIO14 DIO16 DIO18 DIO20 DIO22 DGND CNTO CLK CNTO OUT CNTO GATE 127 9 8 E 6 5 4 3 2 1 All AI3 AIS Al AIO AI11 A113 DE AGND SCH REF SC OUT AGND ATRG1 DTRG1 AI CONY AG CONV DIO1 DIOS DIOS DIO DGND DICE DIO11 DIO13 DIO15 DIO17 DIO19 DIO21 DIO23 DGND EELER CNT1 OUT CNT1 GATE 5Y Figure 3 2 68 pin I O Connector Pin Assignments PCIE 1816 1816H User Manual 18 3 3 1 1 0 Connector Signal Description Table 3 3 I O Connector Signal Descriptions Signal Name Reference Direction Pin description AI 15 0 AGND Input AI Channels 0 to 15 Each channel pair Alfi 1 i i 0 2 4 14 can be configured as either two single ended inputs or one differential input AGND Analog Ground These pins are the reference points for single ended measurements
36. og Input Analog Output Digital Input Digital Output Counter F1 Channel 0 Channel 3 300s Sampling rate per channel enden Use Instant Al I Ext Doch ED i O Use Buffered Al THz 1Hz 800000Hz Ext AnaCik z Figure 2 5 The Device Testing of PCIE 1816 1816H 13 PCIE 1816 1816H User Manual For more detailed information please refer to the DAQNavi SDK Manual or the User Interface Manual in the Advantech Navigator PCIE 1816 1816H User Manual 14 Signal Connections This chapter provides useful informa tion about how to con nect input and output signals to the PCIE 1816 1816H card via the I O connector Sections include E Overview E BoardiD Settings E Signal Connections E Field Wiring Considerations 3 1 Overview Maintaining signal connections is one of the most important factors in ensuring that your application system is sending and receiving data correctly A good signal con nection can avoid unnecessary and costly damage to your PC and other hardware devices This chapter provides useful information about how to connect input and output signals to the PCIE 1816 1816H card via the I O connector 3 2 Switch and Jumper Settings Please refer to Figure 3 1 for jumper and switch locations on PCIE 1816 1816H 000000000000 000000000000 ULLERN EET EET EEE EE EE LALLELRRLELRELELRLELLELLELLELEZLEX ew D I kenen Figure 3 1 Connector and Switch Locations PCIE 1816 1816H Use
37. oplay func tion enabled on your system When the Setup Program is launched you will see the following Setup Screen Note Ifthe autoplay function is not enabled on your computer use Windows TE Explorer or Windows Run command to execute autorun exe on the companion DVD ROM AD ANTECH DAQ Device Driver Dis OT Documents i E Installation EE CD Contents D d View Our Website D d Contact Us Note to check software version if necessary Advantech constantly update the newest software package on the Web site users can visit Figure 2 1 Setup Screen of Advantech Automation Software Select the Installation option Select the Legacy SDK and Drivers option to install Select the Individual Drivers option Select the PCIE series and the specific device then follow the installation instructions step by step to complete your device driver installation and setup 7 Back and select the Windows SDK and Drivers install the Advantech Navigator D Ss OY 9 PCIE 1816 1816H User Manual MEET C cre Figure 2 2 Different Options for Driver Setup For further information on driver related issues an online version of the DAQNavi SDK Manual is available by accessing the following path Start Programs Advantech Automation DAQNavi DAQNavi Manuals DAQNavi SDK Manual 2 3 Hardware Installation Note Make sure you have installed the driver first before you install the card refer to 2 2 Driver Installation After the Device D
38. r i e the Even Address samples in the buffer are sent to D A channel 0 while the Odd Address samples to D A channel 1 AO Start Trigger LL AO Stop Trigger o BG E Waveform Mode Output 43 PCIE 1816 1816H User Manual B 2 3 D A Clock Sources The PCIE 1816 1816H can adopt both internal and external clock sources for pacing the analog output of each channel P Internal D A output clock with 32 bit Divider m External D A output clock from connector The internal and external D A output clocks are described in more detail as follows m Internal D A Output Clock The internal D A output clock applies a 100 MHz time base divided by a 32 bit coun ter Conversions start on the rising edges of counter output Through software user can specify the clock source and clock frequency to pace the analog output opera tion The maximum frequency is 3 MS s M External D A Output Clock The external D A output clock is useful when you want to pace analog output opera tions at rates not available with the internal D A output clock or when you want to pace at uneven intervals Connect an external D A output clock to the pin and then the conversions will start on input signal s rising edge You can use software to spec ify the clock source as external The maximum input clock frequency is 3 MS s B 2 4 D A Trigger Sources The PCIE 1816 1816H supports External digital TTL trigger to activate D A conver sions for waveform mode An external
39. r Manual 16 3 2 1 3 2 2 Board ID SW1 The PCIE 1816 1816H has a built in DIP switch SW1 which is used to define each card s board ID When there are multiple cards on the same chassis this board ID switch is useful for identifying each card s device number After setting each PCIE 1816 1816H you can identify each card in system with differ ent device numbers The default value of board ID is 0 and if you need to adjust it to other value please set the SW1 by referring to Table 3 1 Table 3 1 Board ID Setting SW1 SW1 Position 1 Position 2 Position 3 Position 4 BoardID ID3 ID2 ID1 IDO 0 ON ON ON ON 1 ON ON ON OFF 2 ON ON OFF ON 3 ON ON OFF OFF 4 ON OFF ON OFF 5 ON OFF ON OFF 6 ON OFF OFF ON 7 ON OFF OFF OFF 8 OFF ON ON ON 9 OFF ON ON OFF 10 OFF ON OFF ON 11 OFF ON OFF OFF 12 OFF OFF ON ON 13 OFF OFF ON OFF 14 OFF OFF OFF ON 15 OFF OFF OFF OFF Default Setting is 0 Power On Configuration JP1 Default configuration after power on and hardware reset is to set all the analog input and analog output channels to open status the current of the load can t be sink so that the external devices will not be damaged when the system starts or resets When the system is hot reset then the status of isolated digital output channels are selected by jumper JP1 Table 3 2 shows the configuration of jumper JP1 Table 3 2 Power on Configuration after Hot Reset JP1 JP1 Power on co
40. rce Driving Single clock source driving is a specific function well suited for consecutive data acquisition while there is only one clock signal available CONV CLKs will be inter nally routed as SCAN CLKs And the external SCAN CLKs input will not be accepted Figure describes how it works CLK are gated off GEN ALLA SE l ee E ne armas VE counter S Scan D l 2 3 4 3 counter I Single clock source driving both CLKs B 1 4 A D Trigger Modes The PCIE 1816 1816H supports four trigger modes and pause function User can start or stop the operation by trigger mode selection An extra 32 bit counter is dedi cated to delay trigger mode and about trigger mode and user can set it as the num ber of delay SCAN CLKs before trigger or the number of holding SCAN CLKs after trigger Figure shows the four different trigger modes Start Trigger Mode Start Trigger Delay to Stop Trigger Mode AA AB K Gi UY Trigger Modes 37 PCIE 1816 1816H User Manual m Start Trigger Acquisition Mode Start trigger acquisition starts when the PCIE 1816 1816H detects the trigger event and stops when you stop the operation The SCAN CLKs before Trigger will be blocked out You can set post trigger acquisition mode by software Start Trigger ie SCAN LE BNI Scan Counter M Counter Start Trigger M 0 Delay to Start Trigger Acquisition Mode In delay to start trigger mode data acquisition will be activat
41. rigger signal from counter gate becomes high Counter Gate Internal or External Clock Pa 2 3 FR 2 d comers JL IL Type i Negative Pulse T interrupt Interrupt we LJ LI Positive Pulse t Interrupt Interrupt 6 PWM Output PCIE 1816 1816H can generate PWM pulse width modulation signal which you can configure its logic high time and logic low time as figure below The available period range for logic high time and logic low time is 100 ns 214 second Logic high time gt Logic low time 47 PCIE 1816 1816H User Manual AD ANTECH Enabling an Intelligent Planet www advantech com Please verify specifications before quoting This guide is intended for reference purposes only All product specifications are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of the publisher All brand and product names are trademarks or registered trademarks of their respective companies O Advantech Co Ltd 2014
42. rivers installation is completed you can install the PCIE 1816 1816H card on your computer However it is suggested that you refer to the com puter s user manual or related documentation if you have any doubts Please follow the steps below to install the card onto your system 1 2 3 Turn off your computer and unplug the power cord and cables TURN OFF your computer before installing or removing any components on the computer Remove the cover of your computer Remove the slot cover on the back panel of your computer Touch the metal part on the surface of your computer to neutralize the static electricity that might be on your body Insert the PCIE 1816 1816H card into the PCI Express interface Hold the card only by its edges and carefully align it with the slot Insert the card firmly into place Use of excessive force must be avoided otherwise the card might be damaged Connect appropriate accessories 68 pin SCSI Shielded Cable wiring termi nals etc if necessary to the card Replace the cover of your computer chassis Re connect the cables you removed in step 2 Plug in the power cord and turn on the computer PCIE 1816 1816H User Manual 10 After your card is properly installed on your system you can now configure your device using the Advantech Navigator Program that has itself already been installed on your system during driver setup A complete device installation procedure should include device setup configurat
43. sion hardware structure includes four major parts Auto scan multiplexer routes the analog input signals into A D converter chan nel by channel in a software defined sequence E PGIA Programmable Gain Instrument Amplifier rectifies the input range and amplify alleviate input signal to match the input range of A D converter A D converter conceives the rectified voltage from PGIA and transfers it into the corresponding digital data format P Trigger Clock control logic enables disables the whole process and deter mines acquisition timing interval Auto Scan A D Converter Multiplexier AD efficient Gain Code 5 conversion clock CONY CLK SCAN CLK Channel Sequence Trigger Clock Control Logic Pause A D Conversion Hardware Structure PCIE 1816 1816H User Manual 32 B 1 2 B 1 3 Analog Input Ranges and Gains The PCIE 1816 1816H can measure both unipolar and bipolar analog input signals A unipolar signal can range from 0 to 10 V FSR Full Scale Range while a bipolar signal extends within 10 V FSR The PCIE 1816 1816H provides various program mable gain levels and each channel is allowed to set its own input range individually Table B 1 lists the effective ranges supported by the PCIE 1816 1816H with gains Table B 1 Gains and Analog Input Range Gain Unipolar Analog Input Range Bipolar Analog Input Range 0 5 N A 10 V 1 0 10 V 5 V 2 0 5V 2 5 V 4 0 2 5V 1 25 V 8 0 1
44. t Manual Calibra Board Version 1 0 0 1 S N SDKs E Analog Output Location PCI bus 1 device 0 function 0 5 DAQNavi User Interface AO Channel Base Addresses 0xF7D08000 0xF7D0A000 0xF7D00000 0xF7D08000 o E Welcome to Advantec Conversion Interrupt 0x10 H video Tutorial ge Initialize device at driver loading Yes No E E Tools Trigger d Ei Multimeter Analog Output Calibration k F1 Customer Feedback Analog Output Manual Cal Digital Input Output DIO Ports Direction DI Filter DI Interrupt DI Pattern Match Interrupt DI Status Change Interrupt L DO Port Initial Status Li Counter Clock Filter Event Counter Frequency Measurement Y m m V Update Device V Update System Database PCIE 1816 1816H User Manual 12 Configuring the Device 3 Please go to the Device Setting to configure your device Here you can config ure not only the Analog Input Output of PCIE 1816 1816H but also Digital Input Output 7 Advantech Navigator Version 3 1 DAQNavi AD ANTECH Contents Device Setting X Welcome Setting of PCIE 1810 BID 15 DAQNavi 5j Devices o Installed Devices EES 2 DIO Port Direction Configuration 4132 DemoDevice BID 0 Analog Input 32 PCIE 1810 BID 15 AI Channel Port 0 Low Nibble Port 0 High Nibble A A Conversion 34 Device Setting Input Output Input Output F4 Device Test S i Geng A rigger 11 Scenarios Port 1 Low Nibb
45. the threshold level by writing a voltage value to this DAC this value can range from 10 V to 10 V Table B 2 Analog Input Data Format A D Code Mapping Voltage Hex Dec Unipolar Bipolar 0000 h Od 0 FS 2 7FFF h 32767 d FS 2 1 LSB 1LSB 8000 h 32768 d FS 2 0 FFFF h 65535 d FS 1 LSB FS 2 1 LSB 1 LSB FS 65536 FS 65536 Table B 3 Full Scale Values for Input Voltage Ranges Unipolar Bipolar Gain Range FS Range FS 0 5 N A N A 10 V 20 1 0 10V 10 5V 10 2 0 5V 5 2 5V 5 4 0 2 5V 2 5 1 25V 2 5 8 0 1 25V 1 25 0 625 V 1 25 PCIE 1816 1816H Analog Output Operation The PCIE 1816 1816H card provides two 16 bit multi range analog output D A channels This section describes the following features Analog output ranges Analog output operation modes Synchronous Analog output waveform D A clock sources D A Trigger sources Analog Output Data Format Analog Output Ranges The PCIE 1816 1816H provides two 16 bit analog output channels both of which can be configured internally to be applicable withinO 5V 0 10V 5V 10V output voltage range Otherwise users can use external reference voltage to apply 0 x V or x V output range where the value x is from 10 to 10 Users can configure the output range during driver installation or in software programming PCIE 1816 1816H User Manual 42 B 2 2 Analog Output Operation Modes Single Value Operation Mode The single value conversion
46. uch as Visual Studio Net Visual C Visual Basic Delphi and C Builder The step by step instructions on how to build your own applications using each development tool will be given in the Device Drivers Manual Moreover a rich set of example source code is also given for your reference Programming Tools Programmers can develop application programs with their favorite development tools m Visual Studio Net m Visual C and Visual Basic P Delphi E C Builder For instructions on how to begin programming works in each development tool Advantech offers a Tutorial Chapter in the DAQNavi SDK Manual for your reference Please refer to the corresponding sections in this chapter on the DAQNavi SDK Man ual to begin your programming efforts You can also look at the example source code provided for each programming tool since they can get you very well oriented The DAQNavi SDK Manual can be found on the companion DVD ROM Alternatively if you have already installed the Device Drivers on your system The DAQNavi SDK Manual can be readily accessed through the Start button Start Programs Advantech Automation DAQNavi DAQNavi Manuals DAQNavi SDK Manual The example source code could be found under the corresponding installation folder such as the default installation path Advantech DAQNavi Examples 5 PCIE 1816 1816H User Manual For information about using other function groups or other development tools please refer to the Using DAQNav

User Manual PCIE-1816/1816H

Contents

Download Pdf Manuals

Related Search

Related Contents