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1. wy AN4062 Sf Application note STM32FODISCOVERY peripheral firmware examples May 2012 Introduction This application note describes the peripheral firmware examples provided for the STM32FODISCOVERY Kit These ready to run examples are provided to help the user get started quickly with STM32F0xx peripherals and STM32FODISCOVERY board hardware Preconfigured projects for EWARM MDK ARM TrueSTUDIO and TASKING toolchains are provided for each example These examples are included in the firmware applications package available for download on www st com stm32f0discovery Users are advised to first read the document Getting started with software and firmware environments for the STM32FODISCOVERY Kit UM1523 to familiarize themselves with the STM32FODISCOVERY Kit Table 1 lists the microcontrollers and development tools concerned by this application note Table 1 Applicable products and tools Type Applicable products Microcontrollers STM32 FO series Entry level Cortex MO microcontrollers Development tools STM32FODISCOVERY evaluation board and discovery kit Doc ID 022897 Rev 2 1 19 www st com Contents AN4062 Contents 1 Peripheral firmware examples structure OvervieW 4 2 Clock configuration 00 cee eee eee 5 2 1 PEL SOURCES EE 5 2 2 PEL SOURCE ASE Ae pos deep ER daria 5 2 3 PLL SOURCE_HSE_BYPASS NEES KENNS EERSTEN EE ER 5 3 Peripheral firmware examples description
2. interrupts The EXTI Line sources are PA O and RTC Alarm Description In this example e The EXTI Lineo is configured to generate interrupt on falling edge e The EXTI line17 RTC Alarm is configured to generate interrupt on rising edge e The SysTick is programmed to generate an interrupt every 250 ms In the SysTick interrupt handler LED3 is toggled which indicates whether the MCU is in Stop or Run mode The system enters the Stop mode and waits for the RTC Alarm to be generated every 5s or when the User push button is pressed Ifthe RTC Alarm EXTI_Line17 is the source of wakeup from Stop LED3 is toggled Ifthe User push button EXTI_LineO is the source of wakeup from Stop LED4 is on and LED3 is toggled LEDs are used to monitor the system state LEDS toggling system in Run mode system woken up from Stop using RTC ALARM LED4 on system woken up from Stop using EXTI Linen User push button Current consumption example Purpose This example shows how to configure the STM32FOxx system to measure different low power modes current consumption The low power modes are e Sleep mode e Stop mode with RTC e Standby mode with wake up pin without RTC e Standby mode with RTC To select the low power modes to be measured uncomment the corresponding line inside the sim32f0xx_Ip_modes h file STM32F0xx consumption can be measured on the STM32FODISCOVERY board by removing jumper JP2 labeled IDD an
3. selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH
4. ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2012 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ki Doc ID 022897 Rev 2 19 19
5. PLL is used as the system clock source Some hardware modifications are necessary to bypass the HSE with the clock coming from the ST Link circuit For more details refer to section 4 7 OSC clock in STM32F0 discovery kit User manual UM1525 Doc ID 022897 Rev 2 5 19 Peripheral firmware examples description AN4062 3 3 1 3 1 2 3 2 3 2 1 3 2 2 6 19 Peripheral firmware examples description GPIO toggle example Purpose This example shows how to use the GPIO port bit set reset registers BSRR and BRR for I O toggling Description In this example e GPIOC clock is enabled e GPIOC pins 8 and 9 are configured Inawhile loop the ODR8 and ODRO bits are set in the GPIOC output data register ODR by setting the corresponding bits in the port bit set reset register BSRR Then the ODR8 and ODRS bits are reset in the GPIOC output data register ODR by setting the corresponding bits in the port bit reset register BRR e A delay is inserted between setting and resetting the GPIOC ODR8 and ODR39 bits When the program is executed the two LEDs LED3 and LED4 are turned ON then OFF in an infinite loop The duration between the ON and OFF states corresponds to the inserted delay EXTI example Purpose This example shows how to configure an external interrupt line Description In this example e PAO pin is configured in input floating e PAO is configured to be used as an external interrup
6. triggered after pressing the User push button on the STM32FODISCOVERY board the corresponding interrupt is serviced In the ISR LED3 turns off and the EXTI line pending bit is not cleared The CPU executes the EXTI line ISR indefinitely and the system tick interrupt routine is never entered so the independent watchdog counter is not reloaded As a result when the independent watchdog counter reaches 00 the independent watchdog generates a reset When the program is running and the independent watchdog reset is generated LED4 is turned on after the system resumes operation Doc ID 022897 Rev 2 ky AN4062 Peripheral firmware examples description 3 9 3 9 1 3 9 2 3 10 3 10 1 3 10 2 Note Note ADC DMA example Purpose This example describes how to use ADC1 and DMA to transfer continuously converted data from ADC1 to memory Description In this example e ADC1 is configured to convert continuously the Voltage reference and the Temperature sensor e Each time an end of conversion occurs the DMA transfers in circular mode the converted data from ADC1 DR register to the RegularConvData_Tab 2 table ADC low power example Purpose This example provides a short description of how to use the ADC peripheral with Auto delayed conversion mode and Auto poweroff modes Description The ADC is triggered by TIM3_TRGO which is connected to TIM3_Update Event Each time the ADC is triggered it conve
7. value is equal to 1023 so the TIM1 Channel 2 generates a PWM signal with a frequency equal to 17 57 kHz and a duty cycle equal to 37 5 TIM1 Channel2 duty cycle TIM1_CCR2 TIM1_ARR 1 100 37 5 Doc ID 022897 Rev 2 15 19 Peripheral firmware examples description AN4062 Note 3 18 3 18 1 3 18 2 Note 3 19 3 19 1 3 19 2 Note 16 19 e The TIM1 CCR3 register value is equal to 682 so the TIM1 Channel 3 generates a PWM signal with a frequency equal to 17 57 kHz and a duty cycle equal to 25 TIM1 Channel3 duty cycle TIM1_CCR3 TIM1_ARR 1 100 25 e The TIM1 CCR4 register value is equal to 431 so the TIM1 Channel 4 generates a PWM signal with a frequency equal to 17 57 kHz and a duty cycle equal to 12 5 TIM1 Channel4 duty cycle TIM1_CCR4 TIM1_ARR 1 100 12 5 The PWM waveform can be displayed using an oscilloscope Connect the TIM1 pins to an oscilloscope to monitor the different waveforms e TIM1_CH1 pin PA 08 e TIM1_CH2 pin PA 09 e TIM1_CH3 pin PA 10 e TIM1_CH4 pin PA 11 Timer ADC trigger example Purpose This example describes how to configure the TIM to trigger the ADC conversion Description In this example the TIM1 is configured in PWM mode the TIM1 CC4 event is used to trigger the ADC The ADC is configured to convert continuously the ADC_Channel_11 connected to an external voltage Each time the TIM1 CC4 event occurs the ADC converts the va
8. 020 c eee ees 12 S123 lge TEE 12 3 12 2 Description 0 ce eee 12 3 13 DAC signal generation example 000 eee ee eee 13 SCHT PUMPOSE gina cca ic eee fabon Ee ic Nee ee ges 13 3132 Deeenpton See NNN ee a Raa Ree hee Se ed a EAE E 13 3 14 TIM complementary signal example 0 0 0 eee ee eee 13 S145 P MPOSS peri tao y Sake te egen coed wade gb ewe ee ees 13 3 14 2 DOSCrIPON 9 g eS nc eek eda enw wd ee bade abe ane gee d 13 3 15 TIM time base example cscs end A EERSTEN wie 14 SIS PUIPOSE sec ck ra EE ee bee EE PERG Ee EE eS ee 14 3 15 2 DOSCIIPUON 32 ad EELER ELE EA A E ere dE tea ce 14 3 16 TIM PWM input example 15 SAGA PUWPOSE sestais EES E eee eee dE Ae OR ER E EE RE 15 3 16 2 Description restri ere reudi eee 15 3 17 TIM PWM output example 15 S171 PUIPOSE cio or bee ee is adanthar dos SER E nee es 15 3 17 2 Descrpton we ccc eed ireid ae eta hare eee ENN ee 15 3 18 Timer ADC trigger example 16 3 18 1 PUTPOSE eg EEN rikkad dia a eee dae eee 16 318 2 Descon ugi cara eee ete herds Hoe eee ws 16 3 19 NVIC WEI mode example 0 0 0 c eee ee ees 16 3191 Gig TEE 16 319 2 Dosli res seg oia mete teed PE Deed dee eed 16 3 20 RCC reset and clock control example 17 3 20 1 PUPO csi ieee bans AE Er Mork wide bead besa dee ad 17 3 20 2 Description 0 02 eee 17 4 REVISION history GEERT ERE RK a alae 18 eo Doc ID 022897 Rev 2 3 19 Peripheral f
9. RAM DAC example Purpose This example provides a description of how to use a DMA channel to transfer data buffer from RAM memory to DAC Description DMA1 channels is configured to transfer continuously word by word a Half word buffer to the DAC register DAC_DHR12R The DAC channel conversion is configured to be triggered by TIM2 TRGO triggers and without noise triangle wave generation 12 bit right data alignment is selected since we choose to access the DAC_DHR12R register Connect PA 04 pin to an oscilloscope Doc ID 022897 Rev 2 ky AN4062 Peripheral firmware examples description 3 13 DAC signal generation example 3 13 1 Purpose This example provides a short description of how to use the DAC peripheral to generate several signals using the DMA controller 3 13 2 Description When the user presses the push button DMA transfers the selected waveform to DAC e For each press on the push button one signal has been selected and monitored on the DAC Channel 1 e Escalator waveform Channel 1 e Sine waveForm Channel 1 Note Use the push button connected to PAO Note Connect PA4 DAC Channel1 pin to an oscilloscope to monitor the DAC out wave 3 14 TIM complementary signal example 3 14 1 Purpose This example shows how to configure the TIM1 peripheral to generate three complementary TIM1 signals to insert a defined dead time value to use the break feature and to lock the desired parameters 3 14 2 Description TIM1CLK is fixe
10. ach channel in order to generate 2 different time bases Description The TIM3CLK frequency is set to SystemCoreClock Hz to get TIM3 counter clock at 6 MHz so the Prescaler is computed as follows e Prescaler TIM3CLK TIM3 counter clock 1 e SystemCoreClock is set to 48 MHz e The TIM3 CC3 register is equal to 13654 CC3 update rate TIM3 counter clock CCR3_Val 439 4 Hz Thus the TIM3 Channel 3 generates an interrupt every 2 27 ms e The TIM3 CC4 register is equal to 6826 CC4 update rate TIM3 counter clock CCR4_Val 878 9 Hz Thus the TIM3 Channel 4 generates an interrupt every 1 13 ms When the counter value reaches the Output compare registers values the Output Compare interrupts are generated and in the handler routine 2 LEDs LED3 and LED4 connected to PC08 and PCO9 are toggled with the following frequencies LED3 PC09 219 7 Hz CC3 LED4 PC08 439 4 Hz CC4 Doc ID 022897 Rev 2 ky AN4062 Peripheral firmware examples description 3 16 3 16 1 3 16 2 Note 3 17 3 17 1 3 17 2 TIM PWM input example Purpose This example shows how to use the TIM peripheral to measure the frequency and duty cycle of an external signal Description The TIMxCLK frequency is set to SystemCoreClock the Prescaler is 0 so the counter clock is SystemCoreClock SystemCoreClock is set to 48 MHz for STM32FOxx Devices TIM2 is configured in PWM Input Mode the external signal is c
11. d The FLASH_Unlock function is used to unlock it e Before programming the desired addresses an erase operation is performed using the Flash erase sector feature The erase procedure starts with the calculation of the number of sectors to be used These sectors are erased one by one by calling the FLASH_EraseSector function e The programming operation is performed by using the FLASH_ProgramWord function The written data is then checked and the result of the programming operation is stored in the MemoryProgramStatus variable IWDG independent watchdog example Purpose This example shows how to update the IWDG reload counter at regular periods and how to simulate a software fault generating an MCU IWDG reset on expiry of a programmed time period Description In this example e The independent watchdog timeout is set to 250 ms e The system tick is configured to generate an interrupt every 250 ms e Inthe system tick interrupt service routine the independent watchdog counter is reloaded to prevent an independent watchdog reset and LED4 is toggled e The EXTI line 0 connected to PAO pin is configured to generate an interrupt on its falling edge e Inthe NVIC this EXTI line O corresponding interrupt vector is enabled with a priority equal to 0 and the systick interrupt vector priority is set to 1 EXTI interrupt is prior to systick interrupt e The EXTI line is used to simulate a firmware failure when the EXTI line event is
12. d connecting an ammeter Doc ID 022897 Rev 2 ky AN4062 Peripheral firmware examples description 3 6 2 Description After reset the program waits for the User button connected to PA 00 to be pressed to enter the selected low power mode e When the RTC is used the wakeup from low power mode is automatically generated by the RTC after 5s e In Sleep mode and Standby mode press again the User button to exit the low power mode The different low power mode configurations are Sleep mode e System running at PLL 48 MHz Flash 3 wait state Code running from Internal Flash All peripherals disabled Wakeup using EXTI Line User push button DA OO Stop mode RTC clocked by LSI Regulator in LP mode HSI HSE OFF and LSI if not used as RTC clock source No IWDG Flash in deep power down mode Automatic Wakeup using RTC clocked by LSI Standby mode e RTC OFF e IWDG and LSI OFF e Wakeup using Wakeup Pin DA OO Standby mode with RTC clocked by LSI e RTC clocked by LSI e IWDG OFF and LSI OFF if not used as RTC clock source e Automatic Wakeup using RTC clocked by LSI Doc ID 022897 Rev 2 9 19 Peripheral firmware examples description AN4062 3 7 3 7 1 3 7 2 3 8 3 8 1 3 8 2 10 19 Flash program example Purpose This example describes how to program the STM32FOxx internal Flash Description In this example e After Reset the Flash memory Program Erase Controller is locke
13. d to SystemCoreClock the TIM1 Prescaler is equal to O so the TIM1 counter clock used is SystemCoreClock 48 MHz The objective is to generate a PWM signal at 17 57 KHz e TIM1_Period SystemCoreClock 17570 1 The Three Duty cycles are computed as follows The channel 1 duty cycle is set to 50 so channel 1N is set to 50 The channel 2 duty cycle is set to 25 so channel 2N is set to 75 The channel 3 duty cycle is set to 12 5 so channel 3N is set to 87 5 The Timer pulse is calculated as follows e ChannelxPulse DutyCycle TIM1_Period 1 100 A dead time equal to 11 SystemCoreClock is inserted between the different complementary signals and the Lock level 1 is selected The break Polarity is used at High level Doc ID 022897 Rev 2 13 19 Peripheral firmware examples description AN4062 3 15 3 15 1 3 15 2 14 19 The TIM1 waveform can be displayed using an oscilloscope e Connect the TIM1 pins to an oscilloscope to monitor the different waveforms TIM1_CH1 pin PA 08 TIM1_CHI1N pin PB 13 TIM1_CH2 pin PA 9 TIM1_CH2N pin PB 14 TIM1_CHS pin PA 10 TIM1_CH8N pin PB 15 e Connect the TIM1 break pin TIM1_BKIN pin PB 12 to the GND To generate a break event switch this pin level from OV to 3 3V TIM time base example Purpose This example shows how to configure the TIM peripheral in Output Compare Timing mode with the corresponding Interrupt requests for e
14. ever the user can modify this configuration to use HSE crystal or bypass mode as the clock source which needs some hardware modification on the discovery kit hardware The system_stm32f0xx c file provided within each example was customized for use with the discovery kit allowing the user to select one of the three configurations below by un commenting the adequate define PLL_SOURCE_HSI The HSI clock signal is generated from an internal 8 MHz RC Oscillator and can be used directly as a system clock or divided by 2 to be used as a PLL input The HSI RC oscillator has the advantage of providing a clock source at low cost no external components It also has a faster startup time than the HSE crystal oscillator However even with a calibration the frequency is less accurate than an external crystal oscillator or a ceramic resonator This is the default configuration PLL_SOURCE_HSE The high speed external clock signal HSE can be generated from two possible clock sources e HSE external crystal ceramic resonator e HSE user external clock The HSE crystal is not provided with the discovery kit Some hardware modifications are necessary to connect this crystal For more details refer to section 4 7 OSC clock in STM32F0 discovery kit User manual UM1525 PLL_SOURCE_HSE_BYPASS In this mode the HSE is bypassed with an external clock fixed at 8 MHz coming from ST Link circuit It is used to clock the PLL and the
15. interrupt is enabled in the NVIC e The system tick timer counter starts in free running mode to generate periodical interrupts The system tick timer interrupt is triggered every 250 ms In the SysTick interrupt handler LED3 is toggled this is used to indicate whether the MCU is in STANDBY or RUN mode e The EXTI line 0 is configured to generate an interrupt on each rising falling edge detected on the PAO pin The external interrupt is generated every time the PAO changes levels GND or VDD When a falling or rising edge is detected on the EXTI line an interrupt is generated In the EXTI handler routine the RTC is configured to generate an Alarm event in 3 seconds after which the system enters the Standby mode and LEDS is Off After wake up from Standby mode the program execution restarts in the same way as after a reset the RTC configuration clock source prescaler is kept and LEDS is toggling again As a result there is no need to configure the RTC Doc ID 022897 Rev 2 7 19 Peripheral firmware examples description AN4062 3 5 3 5 1 3 5 2 3 6 3 6 1 Note 8 19 LEDS is used to monitor the system state as following e LEDS toggling system in RUN mode e LEDS off system in STANDBY mode e LEDS3 toggling system resumed from STANDBY mode These steps are repeated in an infinite loop Stop mode example Purpose This example shows how to enter the system to STOP mode and wake up using EXTI Line
16. irmware examples structure overview AN4062 4 19 Peripheral firmware examples structure overview The peripheral firmware examples are provided within the STM32FODISCOVERY firmware applications package and are located in the Project folder as shown in Figure 1 Figure 1 Hardware environment E ao STM32FO Discovery_FwW_Yx Y 2 E 5 _htmresc H 5 Libraries E 5 Project E 5 Demonstration El E Master_Workspace ab Y 5 ADC_DMA O ADC_LowPower O DAC_SignalsGeneration O DMA_FLASH_RAM O DMA_RAM_DAC 5 EXT 5 Flash_Program O 10_Togale 5 IWDG_Reset 5 NVIC_WFI_Mode B PWR_CurrentConsumption 5 PWR_STANDBY 5 PWR_STOP D rec O Systick 3 TIM_ADC_Trigger a TIM_Complementary_signals 3 TIM_PWM_Input O TIM_PWM_Output 5 TIM_TimeBase H 5 Utilities RI Er Er Er Er Er Er Er Er Er Er RR Er Er EH RI Er E 1 VX Y Z refer to the package version for example V1 0 0 To run an example open the project with your preferred toolchain compile load and run it Some examples may require additional hardware such as an oscilloscope For further detail about the required hardware refer to the readme file provided within each example d Doc ID 022897 Rev 2 AN4062 Clock configuration 2 2 1 Note 2 2 2 3 Clock configuration The peripheral examples provided within STM32F0 Discovery Kit Firmware package are configured to run at 48 MHz using HSI as the clock source How
17. o 6 3 1 GPIO toggle example ooccooccocco eee 6 3 1 1 PUTPOSO g Seege A A A A beak 6 3 1 2 RE Cl ere EE 6 3 2 EXT example isso pidas aaa pase da 6 3 2 1 allge EE 6 3 2 2 Description 3 9 a desea e eee bee eee eee edad eee ee 6 30 SysTick example cesiones eel sae EE 7 3 3 1 PUMPOSO Os es NR ER ANERE AR ee pee Ree ee eee bee ee ede ee bee 7 3 3 2 DeSCHIPtON viii fede a NN a EEE dg Ser d pee H 3 4 Standby mode example 7 3 4 1 lite EEN H 3 4 2 Description ccoo cata er Nee SERA ede eda SEN EEN ar H 3 5 Stop mode example e EE essa oia 8 3 5 1 fire TEE 8 3 5 2 Descriptio 2 cece ee ee STEE be eee eed eee ba eee Paes 8 3 6 Current consumption example 8 3 6 1 RUIDOSO Ge ia a e e Negi Phe ete 8 3 6 2 DESCrIPUON sessed Peden oes Pe tPA Pee tag de ey 9 3 7 Flash program example 10 3 7 1 lee EE 10 3 7 2 DESCrIPUOR EE tee eae tees 10 3 8 IWDG independent watchdog example 10 3 8 1 PUTPOSO evita ead ads te 10 3 8 2 D SCrIPUON ieee eho eek ad RE negli PE ae BAe ge ee 10 3 9 ADC DMA example en E EEN AE daria 11 3 9 1 PUNDOSE sins aun Beda od eed a Ga bo ede a eRe eae We A 11 2 19 Doc ID 022897 Rev 2 ky AN4062 Contents 3 9 2 Descriptio NERT dad ee ee eee eae DE kn e 11 3 10 ADC low power example 11 SIT PUMPOS SEENEN a a EEN Pa Pence ahs 11 310 2 e e EE 11 3 11 DMA Flash RAM example 12 3 111 PUPO EE 12 3 11 2 DeSCriPON soria teasuckd pel RA EA 12 3 12 DMA RAM DAC example 0
18. onnected to TIM2 Channel2 used as an input pin To measure the frequency and the duty cycle we use the TIM2 CC2 interrupt request so that the frequency and the duty cycle of the external signal are computed In the TIM2_IRQHandler routine The Frequency variable contains the external signal frequency e TIM2 counter clock SystemCoreClock e Frequency TIM2 counter clock TIM2_CCR2 in Hz The DutyCycle variable contains the external signal duty cycle DutyCycle TIM2_CCR1 100 TIM2_CCR2 in The minimum frequency value to measure is 732 Hz TIM2 counter clock CCR MAX Connect the external signal to measure the TIM2 CH2 pin PA 01 TIM PWM output example Purpose This example shows how to configure the TIM1 peripheral to generate PWM signals with 4 different duty cycles 50 37 5 25 and 12 5 Description The TIMxCLK frequency is set to SystemCoreClock the Prescaler is 0 so the counter clock is SystemCoreClock SystemCoreClock is set to 48 MHz for STM32FOxx Devices The objective is to generate a PWM signal at 17 57 KHz TIM1_Period SystemCoreClock 17570 1 TIM1 Frequency TIM1 counter clock ARR 1 48 MHz 2730 17 57 kHz e The TIM1 CCR1 register value is equal to 1364 so the TIM1 Channel 1 generates a PWM signal with a frequency equal to 17 57 kHz and a duty cycle equal to 50 TIM1 Channel1 duty cycle TIM1_CCR1 TIM1_ARR 1 100 50 e The TIM1 CCR2 register
19. riable voltage Connect the external signal ranges between 0 and 3 3V to ADC pin PC 01 NVIC WFI mode example Purpose This example shows how to enter the WFI mode and wake up from this mode by the User key interrupt Description In the associated software the system clock is set to 48 MHz When the user presses the User Key Button the MCU enters the WFI mode If the user presses again the User Key Button LED3 is toggled with a frequency depending on the system clock This is used to indicate whether the MCU is in WFI or RUN mode e Pressing the key push button generates a rising edge on EXTI Line0 will put the core in the WFI mode causing the LED3 to stop toggling e To wake up from the WFI mode you have to press again the button it generates an interrupt which exits the system from the WFI mode LEDS restarts toggling Press the User button to enter and exit the WEI mode Doc ID 022897 Rev 2 ky AN4062 Peripheral firmware examples description 3 20 RCC reset and clock control example 3 20 1 Purpose This example shows how to e Configure the HSE High Speed Clock as an RCC clock e Use the Clock Security System CSS feature to generate an NMI interrupt Output the system clock on MCO 3 20 2 Description For debug purposes the RCC_GetClocksFreq function is used to retrieve the current status and frequencies of different on chip clocks You can see the RCC_ClockFreq structure content which holds the freq
20. rts the input voltage connected to PC 1 which corresponds to ADC channel 11 and then the ADC enter the delay mode no Overrun detect until the ADC data register has been read by pressing the USER button Connect the external signal ranges from 0 to 3 3V to the ADC1 pin PC 01 to be converted Connect an ammeter to JP2 to measure the Ipp current Doc ID 022897 Rev 2 11 19 Peripheral firmware examples description AN4062 3 11 3 11 1 3 11 2 3 12 3 12 1 3 12 2 Note 12 19 DMA Flash RAM example Purpose This example describes how to use a DMA channel to transfer a word data buffer from a Flash memory to an embedded SRAM memory Description DMA1 Channel is configured to transfer the contents of a 32 word data buffer stored in the Flash memory to the reception buffer declared in RAM e The start of transfer is triggered by software DMA1 Channeli memory to memory transfer is enabled Source and destination address incrementing is also enabled e The transfer is started by setting the Channel enable bit for DMA1 Channel1 e Atthe end of the transfer a Transfer Complete interrupt is generated since it is enabled Once the interrupt is generated the remaining data to be transferred is read which must be equal to 0 The Transfer Complete Interrupt pending bit is then cleared A comparison between the source and destination buffers is done to check that all data have been correctly transferred DMA
21. t source line O EXTIO e The EXTI line O is configured to generate an interrupt on each rising edge detected on the PAO pin The interrupt is triggered every time the User push button is pressed e Inthe NVIC nested vectored interrupt controller the EXTI line O interrupt priority is configured and the interrupt is enabled When the program is executed and the user pushes on the User push button EXTIO interrupt routine LED3 and LED4 connected to PC9 and PC8 are toggled Doc ID 022897 Rev 2 ky AN4062 Peripheral firmware examples description 3 3 3 3 1 3 3 2 3 4 3 4 1 3 4 2 SysTick example Purpose This example shows how to configure the system tick timer and use it to generate a 1 ms time base Description In this example e The system tick timer is initialized e The system tick timer interrupt is enabled in the NVIC e The system tick timer counter starts in free running mode to generate periodical interrupts e The system tick timer interrupt is triggered every 1 ms eA Delay function is implemented based on the system tick timer end of count event The two LEDs LED3 and LED4 are toggled with a timing defined by the Delay function Standby mode example Purpose This example shows how to put the system in Standby mode and wake it up from this mode using the external reset RTC Alarm A Description In this example e The system tick timer is initialized e The system tick timer
22. uencies of different on chip clocks using your toolchain debugger This example also handles the High Speed External clock HSE failure detection when the HSE clock disappears broken or disconnected external Quartz HSE and PLL are disabled but no change to PLL configuration HSI is selected as a system clock source and an interrupt NMI is generated In the NMI ISR the HSE and HSE ready interrupt are enabled Once the HSE clock recovers the HSERDY interrupt is generated and in the RCC ISR routine the system clock is reconfigured to its previous state before HSE clock failure You can monitor the system clock on MCO pin PA 8 Two LEDs are toggled with a timing defined by the Delay function Doc ID 022897 Rev 2 17 19 Revision history AN4062 4 18 19 Revision history Table 2 Document revision history Date Revision Changes 23 Mar 2012 1 Initial release 14 May 2012 2 Section 2 Clock configuration added Doc ID 022897 Rev 2 AN4062 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice

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