MSI-AX10420 User Manual - Microcomputer Systems, Inc.
Contents
1. pressed if PA amp 0x02 0 printf PA1 pressed 9 if 0 04 0 printf PA2 pressed if 0 08 0 printf PA3 pressed if PA amp 0x10 0 printf PA4 pressed 9 if PA amp 0x20 0 printf PA5 pressed if PA amp 0x40 0 printf PA6 pressed if PA amp 0x80 0 printf PA7 pressed 9 delay 250 pc3_high 0 close int 24 Application AX10420 48 Bits DIO Module User s Manual 5 2 Polling 4 4 Keypad 4 4KEYPAD PCO W gt PCI T PC2 E gt Install the corresponding RP s to pull high the digital input lines Configure Group 1 Port C upper as read port and Port C lower as write port In a loop send below patterns to Group 1 Port C XXXX 1110 XXXX 1101 XXXX 1011 XXXX 0111 Each time after sending a pattern check whether keypad is pressed by reading back the data in Port C upper Any 0 value in this 4 bit nibble means keypad is pressed Then find out the pressed position A demo program in Turbo C is provided in the following page EDP J5 IRQ9 JP2 JP4 IRQ10 11 IRQ12 Application 25 AX10420 48 Bits DIO Module User s Manual DEMO PROGRAM IN TURBO C FOR POLLING KEYPAD conio h lt dos h gt lt stdio h gt include include include define BASE 0x220 void re_key void Int oh pe gl_pc inp 5 2 if gl pc amp 02. Besides bus option there are stackthrough and non stackthrough difference The stackthrough version provides self stacking PC bus It can be placed any where in a multi module stack The non stackthrough version offers minimum thickness by omitting bus stackthrough pins It must be positioned at one end of a stack For convenience the AX10420 is equipped with stackthrough version only NOTE For safety you are suggested to cut bus stackthrough pins of the last module on condition that you are sure you won t add plug any module to the module stack in the future 2 9 Module Installation The AX10420 board is shipped with protective electrostatic cover When unpacking touching the board electrostatically shielded packaging with the metal frame of your computer to discharge the accumulated static electricity prior to touching the board Following description summarizes the procedures for installing the AX10420 WARNING Tum off the PC and all accessories connected to the PC whenever installing or removing any peripheral board including the AX10420 module Module Configuration and Installation 11 AX10420 48 Bits DIO Module User s Manual Installation Procedures 12 1 Unplug all power cords Remove the case cover if necessary Remove the top module if it is a non stackthrough module Put the AX10420 module in line with the present module as described in Uu BRUN O 8 9 Turn off the system power
3. 10420 48 Bits DIO Module User s Manual Disclaimers The information in this manual has been carefully checked and is believed to be accurate AXIOMTEK Co Ltd assumes no responsibility for any infringements of patents or other rights of third parties which may result from its use AXIOMTEK assumes no responsibility for any inaccuracies that may be contained in this document AXIOMTEK makes no commitment to update or to keep current the information contained in this manual AXIOMTEK reserves the right to make improvements to this document and or product at any time and without notice No part of this document may be reproduced stored in a retrieval system or transmitted in any form or by any means electronic mechanical photocopying recording or otherwise without the prior written permission of AXIOMTEK Co Ltd Copyright 1994 by AXI OMTEK Co Ltd rights reserved November 1994 2nd Edition Printed in Taiwan Trademarks Acknowledgments AXIOMTEK is a trademark of AXIOMTEK Co Ltd IBM is a registered trademark of International Business Machines Corporation MS DOS Microsoft C and QuickBasic are trademarks of Microsoft Corporation TURBO C is a trademark of Borland Inc BASIC is a trademark of Dartmouth College Intel is a trademark of Intel Corporation Other brand names and trademarks are the properties and registered brands of their respective owners ESD Precautions Integrated circuits on comput
4. Send pattern 1111 0111 Check if key pressed Wait until key released Application 27 I O Port Address Range 000 1FF 200 20F 278 27F 2 1 2F8 2FF 320 32F 378 37 380 38F 3BF 3CF 3D0 3DF SFO 3F7 3F8 28 AX10420 48 Bits DIO Module User s Manual Appendix A PC Port Mapping Function PC reserved Game controller J oystic k Second parallel printer port LPT2 GPIB controller Second serial port COM 2 Fixed disk XT Primary parallel printer port SDLC communication port Monochrome adapter printer EGA reserved Color graphics adapter Floppy disk controller Primary serial port COM 1 PC I O Port Mapping AX10420 48 Bits DIO Module User s Manual Block Diagram Address Decode Logic Interrupt Control Logic Appendix B Block Diagram 29 AX10420 48 Bits DIO Module User s Manual Appendix C Technical Reference General Usage of Digital Input and Output Digital signals are usually used for detecting logical status or controlling devices a brief description is given below TTL level signals are developed by most DAS systems or LSTTL Level Connections TTL LEVEL I O CONNECTION TTL Devices Connection with CMOS Device Use a pull up resistor if you wish to interface to CMOS devices This will raise the logic high output level from its minimum TTL level of 2 4V to 5V suitable for CMOS
5. 1 GND 28 27 PB2 GND 26 o 25 GND 24 23 PB4 GND 2 21 5 GND 20 o off19 6 GND 18 o off17 PB7 GND 16 15 GND 14 3 PC1 GND 12 o 1 2 GND 10 o off 9 PC3 INT GND 8 7 PC4 GND elo off 5 PC5 OPT 4 3 PC6 OPT 2 o 1 PC7 INT Pin Name Description 5 5V PC power supply PA7 PortA eight digital I O lines PBO PB7 PortB eight digital I O lines PCO PC3 Port C lower four digital I O lines The has interrupt handling capability Refer to Interrupt Setting Jumper section 4 7 Port C upper four digital lines The PC7 has interrupt handling capability Refer to Interrupt Setting Jumper section OPT These pins can be connected to 12V PC power or Ground by jumpering JP1 and Refer to 12V or Ground Selection J umper section Module Configuration and Installation 9 AX10420 48 Bits DIO Module User s Manual WARNING As pin 2 and pin 4 can be connected to 12 or Ground refer to 12 or Ground Selection Jumper section thus when the AX10420 is connected to other board through this 50 pin connector user must pay attention to the connector pin assignment especially pin 2 and pin 4 of the comesponding board 2 7 Resistor Pack As mentioned before the 8 bit port of each group can be configured for input or output port refer to Chapter 3 Initially the digital I O lines are left floating Whe
6. Appendix D Install four spacers and fasten them if necessary Crush between the modules until inside distance is SPACER s height 0 6 Restore all the screws Repeat step 6 until all modules are set into position Connect cable to AX10420 J1 or J4 if necessary 10 Restore the case cover and connect all the necessary cables 11 Turn on the system power Module Configuration and Installation AX10420 48 Bits DIO Module User s Manual Chapter 3 Register Structure and Format The AX10420 occupies 8 consecutive I O addresses of PC address space During installation the first address or base address is determined by setting onboard DIP switch SW1 This chapter describes each AX10420 register in terms of function address bit structure and bit function Each register is easy to read and write to by using direct instructions of whatever application languages 3 1 AX10420 I O Address Map The 48 digital I O lines of AX10420 are arranged into separated groups Each group supports 8255 PPI chip mode 0 The AX10420 is programmable through configuration registers By writing to control registers the type of each group may be specified If a group is configured as a write port the data driver will drive the data value to the corresponding port If a group is configured as a read port the data value on corresponding port will be sent to the digital I O lines Only Port C of each group is divided into two 4 bit nibbles Po
7. TTL DTL compatible Added Pull up Resistor CMOS dry contact compatible Electrical Characteristics 2V min Vi 0 8V 200A max at Vi 2 7V 0 2mA max at Vi 0 4V Vou 2 4V min at lou VoL 0 4 maxatlo 12 15mA lou 24mA Interface Characteristic m 1 Connector 50 pin male mating connector m Cable Ribbon Twisted Pair Cable 2 50Q to 1000 typ Ribbon Stripline Cable Zo 30Q to 800 typ m Compatible Bus PC 104 bus m Interface 1 0 mapped with 10 bit addressing A9 0 m Number of Locations Occupied 8 consecutive addresses m Data Path 8 bits Power Requirements 5V typ 2 Introduction AX10420 48 Bits DIO Module User s Manual Physical Environmental Dimensions 95mm X 90mm Weight 200g Operating Temperature Range 0 to 60 Storage Temperature Range 25 C to 85 Relative Humidity To 9096 non condensing 1 4 Accessories Guide AX751 Screw terminal board for all digital I O connections Shipped with 3 3 feet 1 meter cable and 50 pin connector m AX754 24 channel opto isolated D I panel for signal connection and conditioning with the AX10420 Shipped with 3 3 feet 1 meter cable and 50 pin connector m AX755 8 channel electromechanical single pole double throw SPDT 16 channel opto isolated digital panel which is compatible with the AX10420 Shipped with 3 3 feet 1
8. With this configuration the AX10420 is compatible with AX754 AX755 and AX756 accessory board The above figure shows the factory default setting for JP1 and JP3 6 Module Configuration and Installation AX10420 48 Bits DIO Module User s Manual 2 4 IRQ Level Jumper Jumper labeled J5 is used for selecting IRQ level 9 2 5 10 11 12 15 Below figure gives the jumper configuration and default setting of J5 Place jumper cap at X position if no interrupt is required 1 J5 13 X No connect 2 5 Interface Setting Jumper AX10420 provides hardware interrupt function for applications Port C bit 3 and bit 7 PC7 are in charge of the task INTERRUPT ENABLE IENx and PROGRAMMABLE INTERRUPT INPx are selectable two jumpers The interrupt signal can be lead to any of the six interrupt request lines IRQ level 9 2 5 10 11 12 15 by J5 jumper Below figure gives the default setting for JP4 and JP2 jumpers Group 1 Group 2 EDP EDP NOTE D Disable Interrupt E Enable Interrupt P Programmable Interrupt m Disable Interrupt Jumper D position When this jumper is set any interrupt input on this group will be disabled Module Configuration and Installation 7 AX10420 48 Bits DIO Module User s Manual m Enable Interrupt Jumper E position When this jumper is set any change from 0 to 1 on this group s will generate interrupt The status is illustrated as foll
9. become extremely popular in both general purpose desktop and dedicated non desktop applications its use in embedded microcomputer applications has been limited due to the large size of standard PC and PC AT motherboards and expansion cards This document supplies the mechanical and electrical specifications for a compact version of the PC AT bus optimized for the unique requirements of embedded systems applications The specification is herein referred to as PC 104 based on the 104 signal contacts on the two bus connectors 64 pins on J2 plus 40 pins on J3 Module Dimensions PC 104 modules can be of two bus types 8 bit and 16 bit These correspond to the PC and PC AT buses respectively PC 104 Mechanical Specification 33 AX10420 48 Bits DIO Module User s Manual m PC 104 8 Bit Module Dimensions 0 250 DIA PAD 0 500 0 350 _ 0 125 DIA HOLE 3 250 4 PLCS Primary Side Primary Secondary Connectors May Side Side Overhang Within These Regions Includes Mating Connectors 0 025 SO 0500 52 0 0 325 0 250 3 225 1 Option 2 Stackthrough Bus Non Stackthrough Bus NOTE Dimensions are in inches 70 05 mating connectors may not extend outside these boundaries 34 PC 104 Mechanical Specifcation AX10420 48 Bits DIO Module User s Manual m PC 104 16 Bit Module Dimensions 0 250 DIA PAD 0 500 0 350 0 1 re 2 HOLE 3 20 B
10. do Introsr 0 outp 4 0 0 Generate pulse from Port outp 4 0x08 delay 50 outp 4 0x0 if Intolsr 1 printf interruptin Intolsr 0 while kbhit 0 restore isr Free ISR outp 0x21 0xb8 Disable IRQ5 void interrupt far newisr jJ ISR routine Intolsr 1 outp 0x20 0 x20 void restore_isr void setvect intp oldsr Programming AX10420 48 Bits DIO Module User s Manual The following is another demo program written in Turbo Pascal It is similar to the proceeding program in Turbo C except here we select Group 1 and IRQ9 The jumpers settings are thus differ as follows EDP EDP J5 IRQ9 DEMO PROGRAM IN PASCAL 5 1024 0 0 PROGRAM AX10420 IRQO USES DOS CRT CONST 50 9 MIMR SF B Enable peripheral interrupt controller for IRQ9 BASE 220 Default base setting CTR_R 89 VAR NTOISR INTEGER OLDISR POINTER RKB CHAR NT PROCEDURE NEW ISR INTERRUPT BEGIN NTOISR 1 PORT 20 20 END BEGIN GETINTVEC INTP OLDISR Get old interrupt vector and save it SETINTVEC INTP NEW_ISR Install the new handler PORT 21 MIMR AND PORT S21 Enable IRQ9 PORT BASE 3 CTR_
11. meter cable and 50 pin connector m AX756 24 channel electromechanical single pole double throw SPDT which can be driven by the AX10420 Shipped with 3 3 feet 1 meter cable and 50 pin connector Introduction 3 AX10420 48 Bits DIO Module User s Manual Chapter 2 Module Configuration and Installation 2 1 Component Locator Diagram The following figure shows the location of AX10420 s components All switch and jumper settings in this figure are the factory default setting 1 1 2 1 SW1 gt EN 2 3 EM 4 EN 5 MM 7 J2 Q8 1 39 43 4 Module Configuration and Installation AX10420 48 Bits DIO Module User s Manual 2 2 Base Address Switch AX10420 module occupies 8 consecutive locations in address space The first address or base address is selected via a 8 position DIP switch labeled SW1 If more than one module are to be installed to the embedded system each module must be given its own distinct 1 address or base address No more than one module may use the same base address It would be better if you check with Appendix A for port distribution to avoid conflicting with other installed devices In factory the AX10420 base address is set for 220 Hex or 544 Dec To set to appropriate base address switch the individual switches into the ON or OFF position The following figure shows DIP switch default setting 220 Hex wher
12. x4 m AS59099 DAC Driver CD Make sure that all of the items listed above are present What To Do If There Is A Problem If there are damaged or missing parts contact your supplier and or dealer immediately Do not attempt to apply power to the board if there is damage to any of its components Table of Contents Chapter 1 Introduction uui eR EU EE DNI CE 1 1 3 General aiii hip iEn bobo MEE DURO bU Ino IUE ERU DB 1 1 2 I A NOE 1 EE jj m 2 1 4 Accessories Guide 3 Chapter 2 Module Configuration and Installation 4 21 Gompohent Locator DIAGKAIN dU nica 4 2 2 Base Address SWIC ege ned AR 5 2 3 12V or Ground Selection 6 7 2 5 Interface Setting 4 4 7 2 5 Connector Pin 510 1 2 o EPA R ERE Ra 9 2 7 Resistor OFRO A PROENSA N PROFANO KERSE 10 2 8 Hardware DeseripliOhi abii pace dui lia aaa aeia 11 2 9 Module InstallallOlt shanti Dii Bad eR 11 Chapter 3 Register Str
13. 10 0 else if gl amp 0 20 0 else if gl amp 0 40 0 else if gl amp 0 80 0 vod main Girs outp 0x88 whiel kbhit BASE 2 0xfe if inp BASE 2 gt gt 4 0 0 printf PCO Pe delay 250 while 2 gt gt 4 outp 5 2 0 if inp BASE 2 gt gt 4 OxOf prone POL re key delay 250 26 print print print print 0x0Of Default base setting Find which key pressed DOPO f PC6 hae f PC7 ue Send pattern 1111 1110 Check if key pressed Wait until key released Send pattern 1111 1101 Check if key pressed Application AX10420 48 Bits DIO Module User s Manual while inp 2 gt gt 4 oupt BASE 2 0xfb if inp BASE 2 gt gt 4 Post _ delay 250 while inp 2 gt gt 4 outp BASE 2 0xf7 if inp BASE 2 gt gt 4 print 3 _ delay 250 while inp BASE 2 gt gt 4 0x0f OxOf 0x0f OxOf 0x0f Wait until key released Send pattern 1111 1011 Check if key pressed Wait until key released
14. R Set Port A as output Port C as input WRITELN ENTER key to continue ENTER ESC to end NTOISR 0 Programming 19 AX10420 48 Bits DIO Module User s Manual READ RKB REPEAT BEGIN PORT BASE 0 00 Generate pulse to trigger interrupt PORT BASE 0 08 PORT BASE 0 00 N F TOISR 1 THEN BEGIN WRITELN Interrupt NTOISR 0 END READ RKB END UNTIL readkey 27 SETINTVEC INTP OLDISR Free interrupt 0b PORT 21 PORT 21 8 Disable IRQ9 END Here is another demo program in Microsoft C which is similar to the preceeding program in Turbo C This program configures Group 2 as output port and write 0 followed by 1 to its PC3 bit to generate interrupt The IRQ level selected is IRQ5 Configure the jumpers as follows EDP EDP J5 IRQ9 IRQ5 IRQ10 IRQ11 IRQ12 IRQ15 X DEMO PROGRAM IN MICROSOFT finclude dos h include lt conio h gt include lt stdio h gt define BASE 0x220 Default base address setting 20 Programming AX10420 48 Bits DIO Module User s Manual int pc3 high 20 static short int num static void old int void interrupt far isr void initiate void Initiate interrupt _disable int_num 0 0 IRQ5 interrupt number old_int dos getvect int num Get old
15. T75 ad 4 050 0 062 3 450 i 0 100 Primary Side Primary Secondary Connectors Side Side Overhang Within These Regions Includes Mating Connectors 0 195 0 025 SO TYP TYP aie J1 9206 0300 025046 J2 0 0325 0 a TREE H crie 0 500 4 4 0435 0 420 0 0 325 0 9 950 0 250 Option 1 Option 2 Stackthrough Bus Non Stackthrough Bus NOTE Dimensions are in inches 70 05 mating connectors may not extend outside these boundaries PC 104 Mechanical Specification 35 AX10420 48 Bits DIO Module User s Manual m Typical Module Stack 36 Figure 1 illustrates a typical module stack of 8 bit modules and shows the use of the stack through and non stackthrough J2 bus connector options Stackthrough 8 bit module 0 6 Spacers 4 plcs Stackthrough 16 bit module 0 6 Spacers 4 plcs Non Stackthrough 16 bit module Figure 1 Typical Module Stack PC 104 Mechanical Specifcation
16. UT PORT 3 amp H92 Port A B input C output 40 FORJ 0 255 REM Decimal value from 00 to FF 50 OUTPORT 929622 REM Output data to Port C 60 1 PORT Read data on Port A 70 C INP PORT 1 REM Read data on Port B 80 PRINTB REM Check data versus Port A and B 90 NEXT 100 END The following program configures Group 1 Port A B and C as output ports Data value of 00 to FF Hex are sent to all ports and read back from output latch to ensure that the transfer is successful 16 Programming AX10420 48 Bits DIO Module User s Manual 10 PORT amp 220 20 OUTPORT 3 amp H80 REM Base address 30 FORJ PORT To PORT 2 REM Port A B C are all output 40 FOR X 0 to 255 Decimal value for PortA to 50 OUTJ X REM Decimal value for 00 to FF Hex 60 B INP J REM Output value X to 70 PRINT X J Read back from latch 80 NEXTX REM Print input output value port 90 NEXT 100 END 4 2 Interrupt The AX10420 s built in interrupt control circuitry allows either Port C PC3 bit or PC7 bit of each group to cause an interrupt request The group where interrupt comes from can be discovered by polling data from each group s Port C bit 3 and bit 7 Interrupt can be caused by external input to Port C or by direct output to Port C This feature can be used to detect external critical signal or to generate an interrupt from program T
17. ata and Control Register Base 4 to 7 m Port A Data Register Base 4 R W base 7 6 5 4 3 2 1 0 sa pas sna pns vns Pao Port B Data Register Base 5 W base 7 6 5 4 3 2 1 0 vas sos es Pei Peo m Port C Data Register Base 6 R W base 7 6 5 4 3 2 1 0 Pcs vea wc cx eco PCO Port C lower 4 PC7 Port C upper m Control Register Base 7 W base 7 6 5 4 3 2 1 0 7 Port C lower NOTE 1 PAO PA7 PBO PB7 and PCO PC7 bits are associated to pins atJ 1 connector 2 For DO D1 D3 D4 1 gt Input 0 Output Register Structure and Format 15 AX10420 48 Bits DIO Module User s Manual Chapter 4 Programming 4 1 Digital Input and Output AX10420 provides 48 bit digital I O lines arranged into two groups Each group contains three 8 bit ports Port A B and C Port C is divided into two 4 bit nibbles Port C upper Port C lower The direction of the ports Port A B C upper and C lower can be determined by programming to the control register Programming Examples The following BASIC program configures Group 1 Port A and B input port install corresponding RP s Port C as output port An increasing pattern is sent to Port C It is expected that user will connect both Port A and Port B to Port C before running this program 10 CLS 20 PORT amp H220 Base address 30 O
18. ay module such as AX1416 or AX1424 and provides 2500V isolation for interfacing with high level AC and DC signals The 48 TTL DTL CMOS compatible digital I O lines are arranged into two separated groups Each group supports 8255 PPI Programmable Peripheral Interface chip mode 0 but with stronger driving capability and consists of three 8 bit ports Port A Port B and Port C These ports can be functionally programmed as either digital inputs or digital outputs Of the three ports only Port C is further divided into Port C upper 4 bit and Port C lower 4 bit which can be independently configured for input or output port There is a unique feature associated with AX10420 an interrupt on change of state Interrupt occurs when Port C bit 3 or bit 7 of each group changes state This feature frees up the PC to do other activities since there is no need to poll the digital input port for an event to occur 1 2 Applications m Sense and control high level signals through I O module m Sense low Level TTL switches or signals m Drive indicator light or control recorders m Parallel data transfer to PC Introduction 1 AX10420 48 Bits DIO Module User s Manual 1 3 Specifications Input and Output m Input Output Lines 48 m Operation Mode 8255 MODE 0 m Input Output Mode Pair m Interruput Options jJjumper selectable to level 9 2 5 10 11 12 or 15 m improved Noise Margins Hysteresis Vr 2 Vr 0 4 typ I nput Output Level
19. e switches 1 and 5 are moved to the OFF position while leaving all other switches in the ON position A table for DIP switch setting is given in the following page SWi1 9 A8 A7 5 4 X Weighting 8 008 Hex 16 Dec 010 Hex 32 Dec 020 Hex 64 Dec 040 Hex 128 Dec 080 Hex 256 Dec 100 Hex 512 Dec 200 Hex NOTE X Not used Each switch represents one address weight The desired base address is determined by adding the weight of the switches flipped at OFF position The base address calculation is as follows Base Address 512 32 544 Dec 220 Hex Module Configuration and Installation 5 AX10420 48 Bits DIO Module User s Manual I O Port Range DIP Switch Position Hexadecimal 200 207 1 208 20F 1 210 217 1 218 21 1 1 O O e O o O e O X X X 220 227 3F7 1 1 1 1 1 1 0 8 1 1 1 1 1 1 1 0 ON 1 Factory default setting 2 3 12V or Ground Selection Jumper Group 2 Group 1 1 1 JP1 JP3 G 12V G 12V Jumper cap should be placed at pins 1 and 2 of JP1 JP3 to connect pins 2 and 4 of J1 J4 connector to Ground With this configuration the AX10420 is compatible with AX1416 and AX1424 Opto 22 interface panels When jumper cap is placed at pins 2 and 3 of JP1 pins 2 and 4 of J1 J4 connector are connected to 12V
20. er boards are sensitive to static electricity To avoid damaging chips from electrostatic discharge observe the following precautions Do not remove boards or integrated circuits from their anti static packaging until you are ready to install them Before handling a board or integrated circuit touch an unpainted portion of the system unit chassis for a few seconds This helps to discharge any static electricity on your body Wear a wrist grounding strap available from most electronic component stores when handling boards and components Unpacking The AX10420 is packed in an anti static bag The board has components that are easily damaged by static electricity Do not remove the anti static wrapping until proper precautions have been taken Safety instructions in front of this Users Manual describe anti static precautions and procedures Inventory and Inspection After unpacking the board place it on a raised surface and carefully inspect the board for any damage that might have occurred during shipment Ground the board and exercise extreme care to prevent damage to the board from static electricity Integrated circuits will sometimes come out of their sockets during shipment Examine all integrated circuits particularly the BIOS processor and keyboard controller chip to ensure that they are firmly seated The AX10420 48 Bits DIO Module package includes the following m AX10420 Board m Screw 3mm x4 m Bronze stick 6mm
21. he priority of interrupt is not defined in the interrupt control circuitry user must define the priority via software control Note that the inputs are not latched until the input read is executed Programming Examples Here we provide a demo program written in Turbo C Before executing this program Group 2 pin must be wired to PC3 pin This program give a brief description of the interrupt handling capability of the AX10420 It sets Group 2 Port A for output port and Port C for input port install corresponding RP s if necessary and sends 0 followed by 1 to The IRQ level selected is IRQ5 If interrupt occurs then shows Interrupt on screen The jumper configurations are as follows EDP EDP J5 IRQ9 Programming 17 inclu inclu inclu defin defin defin defin void interrupt AX10420 48 Bits DIO Module User s Manual DEMO PROGRAM IN TURBO C de lt dos h gt de lt stdio h gt de lt conio h gt intp 0 0 IRQ5 interrupt number e mimr oxdf Enable Peripheral Interrupt Controller for IRQ5 e base 0x220 Default base address e ctr r 0x89 oldisr E 0 void interrupt far newisr void restore isr void int Intolsr main cilrser oldisr getvect intp setvect intp newisr outp 0x21 inp 0x21 amp mimr Enable IRQ5 outp base 7 ctr Set Port A as output Port C as input
22. interface VCC PULL UP RESISTOR TTL CMOS 30 Technical Reference AX10420 48 Bits DIO Module User s Manual Digital Input for Open Short Switch Detection A pull up resistor must be connected especially at long distance wiring to ensure logic high input level 4 7K Switch a m Digital Input for Large Signal Digital Output for Relay Driving The D1 diode is added to protect the IC driver against the inductive kickback from the relay coil Technical Reference 31 AX10420 48 Bits DIO Module User s Manual AX10424 Port A B and C Basic Definition 1 Equivalent ckt of Port A B and C Internal Data Bus 32 XR dE E ac VCC 50 Pin Connector PA7 PBO PB7 PCO PC7 Write Pulse 74LS273 Control Port Data Control Port Write Pulse Line Receiver 74LS273 xm Optional Resistor Pack Not Installed in Factory gt NOTE Any port is programmable to input or output Outputs are drived by 74LS244 and latched by 74LS273 Inputs are received by 74LS244 but not latched Interrupt handling capability at PC3 and PC7 All inputs and outputs are buffered by standard line drivers and line receivers The initial state and default setting of port A B and C are tri state Technical Reference AX10420 48 Bits DIO Module User s Manual Appendix D PC 104 Mechanical Specification PC 104 General Description While the PC and PC AT architectures have
23. interrupt vector and save it _dos_setvect int_num isr Install the new handler outp 0x21 inp 0x21 amp 0 Unmask IRQ5 enable void interrupt far isr void Interrupt service routine enable pc3 high 1 If interrupt occur set pc3 high to 1 outp 0x20 0x20 Interrupt completed void close_int void _disable _dos_setvect old_int Restore original interrupt vector outp 0x21 inp 0x21 0 20 Mask IRQ5 enable main initiate outp BASE 7 0x80 Assign Group 2 as output outp BASE 6 0 Set Group 42 PC3 low outp BASE 6 0x08 Set Group 42 PC3 high outp BASE 6 0 while kbhit if pc3_high 1 printf Interrupt pc3_high 0 close_int Programming 21 AX10420 48 Bits DIO Module User s Manual Chapter 5 Application In this chapter two simple application examples are provided 5 1 Event Trigger GROUP 1 PA7 zy PA6 a 4 a PA2 M PA1 2 4 8 5 d 12 741530 Configured Group 1 as input port and set jumpers as described in figure below Install the corresponding RP s If any of the push button is pressed an interrupt is acknowledged via Reading back the data value on Port A will tell us which one of the PAO through is low pressed d
24. n any of these ports is set to input port user is suggested to pull high it s input lines by installing RP s Onboard there are six reserved spaces marked as RP1 RP6 refer to below table the RP is approximately 4 7K If a port is configured as output as output lines just leave the corresponding RP unoccupied DI O Lines RP Group 1 Group 1 Port B RP5 Group 1 Port C 4 Group 2 Port A RP1 Group 2 Port B RP2 Group 2 Port C RP3 NOTE In some situations i e environment ground is not stable the digital output resets frequently User is suggested to isolated system circuitry from extemal sgnal Let the extemal signal to go through AX754 24 Channel Opto isolated D I Panel or AX755 8 Channel Relay Output and 16 Channel Opto isolated D I panel before reaching the system Circ uitry 10 Module Configuration and Installation AX10420 48 Bits DIO Module User s Manual 2 8 Hardware Description PC 104 module can be of two bus types 8 bit and 16 bit These correspond to the PC and PC AT buses respectively The detailed mechanical dimensions of these two PC 104 bus types are provided in Appendix D Basically the AX10420 belongs to 16 bit bus option which design only to by pass PC AT bus signal in order to compatible to PC AT type PC 104 module The AX10420 uses only IRQ lines on J3 40 pin connector If this module is going to plug onto PC type PC 104 bus do not use IRQ line above 10
25. own A demo program in Turbo C is provided in the following page EDP 45 IRQ9 22 EDP Application AX10420 48 Bits DIO Module User s Manual DEMO PROGRAM IN TURBO C FOR EVENT TRIGGER include lt dos h gt include lt conio h gt include lt stdio h gt define BASE 0x220 Default base address setting tatic int pc3_high 0 n tatic short int num 0 static inp void interrupt far isr static void interrupt old int 0 void initiate void disable int num 0 0 IRQ5 interrupt number old int getvect int num Get old interrupt vector and save it setvect int num isr Install the new handle outp 0x21 inportb 0x21 amp 0xdf Unmask IRQ5 enable void interrupt far isr void enable if pc3_high 0 1 BASE Read status pc3 high 1 interrupt occur set pc3 high to 1 outp 0x20 0x20 Interrupt completed void close_int void disable setvect 0x0d old_int Restore original interrupt vector outp 0x21 inp 0x21 0 20 Mask 5 Application 23 AX10420 48 Bits DIO Module User s Manual enable main clrscr initiate outp 3 0 9 Assign Group l as input while kbhit if pc3 high 1 if PA amp 0x01 0
26. ows Interrupt YES id NO NOTE After interrupt immediately pull down PC3 thus enable other interrupt to happen m Programmable Interrupt Jumper P position When this jumper is set a programmable interrupt function can be raised via and PC7 The status is illustrated as follows Interrupt YES 9 5 After interrupt immediately pull down thus enable other interrupt to happen After interrupt immediately pull high PC7 thus enable other interrupt to happen 8 Module Configuration and Installation AX10420 48 Bits DIO Module User s Manual 2 6 Connector Pin Assignments The AX10420 s 48 DI O lines are divided into two groups Group 1 and Group 2 The 24 lines of Group 1 are built 44 50 pin connector while the 24 lines of Group 2 are built in J1 50 pin connector Both connector pin assignments are the same and shown in below figure Through these connectors the AX10420 module can be directly connected to AXIOMTEK s AX751 AX754 AX755 and AX756 accessory boards or standard Opto 22 interface panel GND 50 49 5 GND 48 o 47 GND 46 o 45 1 GND 44 43 2 GND 42 o 41 GND 40 o oll39 4 GND 38 o 37 PA5 GND 36 o 85 6 GND 34 33 7 GND 32 31 PBO GND 29
27. rt C upper and Port C lower of which the direction can be determined by programming to the control register The following table lists and describes the registers and their locations Read W Write Base Base address Location Function Type Base Address 0 Group 1 Port A R W Base Address 1 Group 1 Port B R W Base Address 2 Group 1 Port C R W Base Address 3 Group 1 Control Register W Base Address 4 Group 2 Port A R W Base Address 5 Group 2 Port B R W Base Address 46 Group 2 Port C R W Base Address 7 Group 2 Control Register W Register Structure and Format 13 AX10420 48 Bits DIO Module User s Manual 3 2 AX10420 Register Description Group 1 Data and Control Registers Base 0 to 3 Port A Data Register Base 0 R W base 7 6 5 4 3 2 1 0 sna pai Pao Port B Data Register Base 1 R W base 7 6 5 4 3 2 1 0 a ser ves vas vas ree ren m Port C Data Register Base 2 R W base 7 6 5 4 3 2 1 0 ex eco PCO Port C lower PC4 PC7 Port C upper m Control Register Base 3 W base 7 6 5 4 3 2 1 0 3 1 PA7 PB7 and PCO PC7 bits associated to pins 4 connector 2 For DO D1 D3 04 1 gt Input 0 Output 14 Register Structure and Format AX10420 48 Bits DIO Module User s Manual Group Z2 D
28. ucture and Format e 13 Sd AX10420 VQ Address adit 13 3 2 AX10420 Register rA aanre nenne 14 Chapter 4 Programming siiisccissicisissssasssssssccasssestsacesssiecssnseasasavsescaaaassonaas 16 4 1 Digital Input and OUIDUL uie inae rni ai nada rna ex ea id ob a ka RR gd RR oda i aic 16 4 2 E ii Y eXe C CO 17 Chapter 5 22 5 1 Event Prigge eden 22 5 2 PONG 4 46 Keypad 25 Appendix Port Mapping eee e 28 Appendix B Block Diagram iine eee eeeees cesses erae ba eaa rr PER o Eee e eer Eo ae eRh Rd Ea 29 Appendix C Technical Reference 222 30 Appendix D PC 104 Mechanical Specification 33 AX10420 48 Bits DIO Module User s Manual Chapter 1 Introduction 1 1 General Description The AX10420 is a PC 104 module which is primary intended to PC embedded application in industrial environment containing 48 bit digital input and output It can be used with TTL low level input output circuitry or with solid state rel
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