Motorola 68HC12 User`s Manual - ECSE
Contents
1. Wakeup Interrupt is enabled to prevent any false triggers _H12KWIEH bit 7 bit 6 bres bit 4 bit 3 bit 2 bit 1 bit 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 _H1I2KWIFH bit 7 bit 6 BIT 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Sample Code This code will trigger a Port H Key Wakeup interrupt when a falling edge is detected on any bit of Port H __mod2__ void KeyH void function prototype void __main void DB12 gt SetUserVector PortHKey KeyH Set Vector address _H12KWIFH O0xFF make sure flags aren t set _H12KWIEH OxFF Enable all key wakeups for port H while 1 __mod2__ void KeyH void Port H Key Wakeup ISR _HI2KWIFH _H12KWIFH clear the flags 29 Port J Key Wakeup Interrupt Operation The Port J key Wakeup Interrupt is a more powerful version of the Port H Key Wakeup Interrupt Unlike the Port H Key Wakeup Port J can be set to trigger on either a rising edge or a falling edge input This adds to the flexibility of the key wakeup but also adds to the complexity The selection of which bits will be used to generate interrupts is controlled by _H12KWIEJ As with port H when a bit is set to 1 the Key Wakeup for t c hat channel is enabled Also as with the Port H Key Wakeup while each bit an cause an interrupt the2. very time a falling e rototype set up the vector dge is This assumes there is a switch of some sort on the IRQ input to set up the IRQ for falling edge triggered while 1 infinite L __mod2__ IRQInt IRQ ISR DB12 gt printf IRQ triggered 28 oop display a message Port H Key Wakeup Interrupt Operation This is a new feature that was incorporated into the HC12 This generates an interrupt when the appropriat dge is detected on the input to the port This is ideal for use with a keypad or can be used as extra IRQ lines for the HC12 Each bit of Port H can be used to generate a Key Wakeup interrupt when a falling edge is detected It is important to note that even though each bit can generate an interrupt independently of the others the same interrupt will be called regardless of which bit triggered it The Key Wakeup Interrupt for each individual bit is enabled using _H12KWIEH Writing a 1 to a bit in the register will enable the corresponding bit of Port H to generate an interrupt when a falling edge is detected The flag bits for the Key Wakeup interrupt are located in _H12KWIFH Multiple flags can be set at the same time although software must be written in order to determine which flags have been set The flags are cleared by writing a one to the flag bits that have been set It is a good idea to clear the flags before the Key
3. 1 1 8MHz 65536 clock PAI is the Pulse Accumulator Edge triggered interrupt enable This must be set to 1 to enable edge triggered interrupts _H12PACTL bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 pito unused PAEN PAMOD PEDGE CLK1 CLKO PAOVI PAI After setting PACTL the hardware will trigger an interrupt whenever the correct edge is detected at Port T The ISR must clear the flag by writing a one to the Pulse Accumulator Interrupt Flag PAIF in _H12PAFLG 22 DB12 gt printf Pulse Accum triggered n _H12PAFLG 0x01 23 clear the flag _H12PAFLG bit 7 bit 6 bit 5 bit 4 bit 3 bat 2 bit 1 bit 0 unused unused unused unused unused unused PAOVIF PAIF The value of the pulse accumulator is stored in _H12PACNT Sample Code This code detects the edge and triggers an interrupt __mod2__ void PAEdgeInt function prototype void __main DB12 gt SetUserVector PAEdge PAEdgeInt _H12PACTL 0x55 set the pulse accumulator rising edge while 1 wait __mod2__ void PAEdgeInt Pulse Accumulator ISR Pulse Accumulator Overflow Triggered Interrupt Operation This operation triggers an interrupt every time the pulse accumulator overflows Whenever the pulse accumulator overflows from OxFFFF to 0x0000 the ISR will trigger The set up
4. the timer modul bit 1 his section covers the operation of the timer module when it is used for such as output compare and input capture discussed in chapter 5 ures of timer module that apply to both the input as well as interrupt driven Timer e must This will set bit 0 TEN TSWAL TSBCK TEFCA unused unused unused unused nceremen a ut can no Port T is compare pin The register is set to one the p _H12TIOS bit 7 b Each bit The Timer uses a counter used as I O pi Each pin can s in i can be accessed by the user if needed value that is stored in b also called a free running counter ted by one every clock pulse that The free running counter on the register _H12TCNT t be written to by the user EW as 0 the pin is in is used as and output compares can it 6 bit 5 bit 4 bit 3 capture bit 2 _H12TIOS corresponds to a pin of Port T used as an input an output compare be selected by bit 1 The free running counter is It can be read at a ns for the timer input capture and timer ou is the 68HC12 a 16 bit nytime tput ither an input capture or output compare function of the pin is selected by the state of the _H12TIOS When the bit bit when the bit is set toa Any combination of input captures the user 0 pin 7 pin 6 pin
5. COP Failure Reset Trap SWI XIRO OMNIA BWN EF LON OO IO OBS TS A NEE Oe Se PortJKey PortHKey The priority of these can be changed by using _H12HPRIO register The first six interrupts are unmaskable and can not have their priority changed The other interrupts are all maskable and may have their priority changed An interrupt may be made the highest priority interrupt by writing its address value to _H12HPRIO The address values are listed below in hex for each interrupt IR F2 REL FO Timer0 EE Timerl EC Timer2 EA Timer3 E8 Timer4 E6 Timer5 E4 Timer6 E2 Timer7 EO TimerOvf DE PAOvf DC PAEdge DA SP Ls D8 SCIO D6 SGIL D4 AtoD D2 PortJKey DO PortHKey CE 18 Interrupt Service Routines example code and explanations This section includes explanations of all the different interrupts and sample code of the function Real Time Interrupt Operation The operation of the RTI is controlled by _H12RTICTL Bit 7 is the Real Time Interrupt Enable RTIE Writing a one to this bit will enable the RTI rate at which the RTI is triggered is determined by the Real Time Interrupt Rate RTR The different rates are listed in Table 6 Table 6 RTI rate RTR2 RTR1 RTRO Period___ 0 0 0 off 0 0 1 1 024ms 0 1 0 2 048ms 0 1 1 4 096ms ue 0 0 8 196ms a 0 A 16 384ms a 1 0 32 768ms 1 1 1 65 536ms _H12RTICTL b
6. When SCAN 0 w ost of the registers in the HC12 this is a 16 bit register he completion of the conversion cycle 1 and the entire block of four or hen MULT 0 all four bits nversion sequence consists of ngle specified channel he conversion process Unlike The Sequence he completion of the cycle hen SCAN 1 it signals the completion of the first conversion cycle _H12ADSTAT BIES TS bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 SCF unused unused unused unused CCZ CCl CCO CCF 7 CCF 6 CCE5 CCF4 CCF3 CCF2 CCF 1 CCFO bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CC2 CCO are the conversion counter They are the pointer for the conversion cycle and reflect which result register will be CCF7 CCFO are the Conversion Complete Flags channels When the conversio flag is set channel and by reading the _H12STAT register The results of the A D conversions registers These registers ar converting multiple channels results of each channel CCF written to next for the individual A D n sequence for a channel has been complete the The flags can be cleared by reading the A D register for the are stored in the A D converter result called _H12ADROH through _H12ADR7H the destination register used to store the listed When in Table 3 When that is converted is converting a single channel the results are in _H12ADROH _H12ADR3H
7. output be stored in the which channels are controlled by OC7 to a bit in _H120C7M assigns control of data that is output by for each bit that is wri in _H120C7M compare pin is set he output be used to cause ting a one to TCRE more detailed informatio the o _H12TOC7 the corresponding da vent for 0000 f you set OC7 for SFFFF n on pulsewidth Writ the corresponding channel the channel is stored in _H120C7D ther output compares is compare operation The next step is to nd what will occur w _H120C7M and _H120C7D registers the time hen OC7 ing a EO OCT When OC7 is ta bit the free running counter to be in _H12TMSK2 the free running counter will the Timer Overflow Fl Note if you ag will never be set See Timer Overflow Interrupt _H120C7M bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 OC7M7 OC7M6 OC7M5 OC7M4 OC7M3 OC7M2 OC7M1 OC7MO _H120C7D bit 7 bit 6 bit 5 bit 4 bit lt 3 bit 2 bit 1 bit 0 OC7D7 OC7D6 OC7D5 OC7D4 OC7D3 OC7D2 OC7D1 OC7DO _H12TMSK2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 breed bit 0 TOILE unused TPE TDRB TCRE PR2 PRI PRO Sample Code This code simply shows how to setup OC7 _H12TC7 0x4000 Set up the time when the OC triggers _H120C7M 0x01 select channel 0 _H120C7D 0x00 cause channel 0 t
8. return and backspace Function Prototype int GetCmdLine char CmdLineStr int CmdLineLen Return Value An error code of NoErr The location where data that is read in is stored and the number of characters that are to be read are determined by CmdLineStr and CmdLineLen respectively CmdLineStr is a char array that is created by the programmer This is where the input line from the user is stored CmdLineLen is the length of the string to be read in A total of CmdLineLen 1 characters may be entered by the user before the GetCmdLine function exits The user may also use a carriage return to exit before the value of CmdLineLen has been reached Backspace may be used to delete unwanted characters from the line that the user entered The character will be erased from the screen and the memory array isxdigit This routine determines if c is a member of the set 0 9 a z and A Z Function prototype int isxdigit int c Return Value If c is part of the set the function returns true 1 if c is not a part of the set the function returns a false 0 toupper This routine is used to convert lower case letters to upper case letters Function Prototype int toupper int c Return Value The uppercase value of c If c is already an uppercase letter it returns c isalpha This routine determines if c is a member of the set a z and A Z Function Prototype int isalpha int c Ret
9. 2 0x83 reset the A D converter H12ADTCTL5 0x00 27 IRQ Interrupt Operation The I detection to turn on the IRQ set to zero the I edge triggered operatio low level detection W The I level used it is There are a few differ RQ is used to generate external interr of operation for the IRQ One is falling edge triggered th The mode of the IRQ is co When this bit is RQ is disabled n will be used hen it is 1 the IRQ will be falling edge RQ is automatically cleared by the hardware in the 68HC12 nces betw Whe n th he HC11 the IRQ is no valu t from at any tim Th the program _H12INTCR bit 7 bit 6 bit bit 4 t time protected I of IRQE bit 3 IRQE however There are two ot upts basic modes her is low set to 1 the IRQ ise determines whether n this bit is 0 the IRQ on the HC11 and the ROEN may be written t may only be writt bit 2 bit 1 ntrolled by _H12INTCR IRQEN is nabled when low level or IRQ will use triggered HC12 Unlike o and read en once in bit 0 IRQE IRQEN DLY unused unused unused unused unused Sample Code detected generate the falling ed __mod2__ void __main DB12 gt SetUserVector IRQ _H12INTCR 0xC0 This is sample code that triggers th ge void IRQInt IRQ function p IRQInt
10. 5 pin 4 pin 3 pin 2 pin 1 pin 0 The data for the input captures and output compares are stored i _H12TC7 These are 16 bit registers For inp of the free running counter will be latched i capture is triggered register is used to trigger an action nto th ut capture operatio _H12TCO to the value register wh For output compare operations the value i The 68HC12 also allows the user to assign pull up resistors to t module inputs nable th _H12TMSK2 bit 7 b pull ups it 6 This is done by writing a one to TPE in _H12TMSK he 23 the input he timer This will A zero will disable them bit 5 bit 4 bit 3 bit 2 bre bit 0 Gl TOI unused TP T F E TDRB TCRE PR2 PR1 PRO 13 Timer Output Compare The output compare on the 68HC12 is very similar to t hat of the 68HC11 The user selects an action to occur when the output compare is triggered and the time at which the action occurs action accordingly The processor will then carry out this The first step is to select which channel s will be used This is done by using the _H12TIOS register as explained above Having done this the next step is to select when the output compare will trigger This is done by writing a value to the _H12TCx register s that correspond
11. ECSE 4790 Microprocessor Systems Motorola 68HC12 User s Manual Lee Rosenberg Electrical and Computer Systems Engineering Rensselaer Polytechnic Institute Revision 1 1 8 10 00 Table of Contents page 1 Introduction 2 2 Basic Programming notes for the 68HC12 3 3 D Bug 12 Monitor Program 4 4 68HC12 Hardware 7 a Ports 7 b A D Converter 9 c Timer Functions 13 i Timer Output Compare 14 ii Output Compare 7 15 iii Timer Compare Force Register 16 iv Input Capture 16 5 Interrupt Service Routines 17 a Overview 17 b Interrupt Priority 18 c Real Time Interrupt 20 d Timer Overflow Interrupt 22 e Pulse Accumulator Edge Triggered Interrupt 23 f Pulse Accumulator Overflow Triggered Interrupt 24 g Output Compare Interrupt 25 h Input Capture Interrupt 26 i A D Converter Interrupt 27 j IRQ Interrupt 28 k Port H Key Wakeup Interrupt 29 1 Port J Key Wakeup Interrupt 30 Introduction The Motorola 68HC12 is a 16 bit microprocessor descended from the 68HC11 The design has a number of major improvements over the 6811 and several new features that are not found on the 6811 The biggest change is the expansion from an 8 bit bus to a full 16 bit bus for both the data and address Other improvements include an increase in the number of A D converter registers Timer output compare and input capture pins and I O ports Also added is a second SCI connector and a new interrupt called
12. IOS and _H12TCTL3 and _H12TCTL4 are set up the same as for the non interrupt input capture The difference is that _H12TMSK1 is used to determine which channel s will be used to generate an interrupt s Each bit in _H12TMSK1 corresponds to a different input capture channel When the interrupt is generated the ISR for that channel is called and executed The flag must be cleared by writing a one to the bit in the _H12TFLG1 register that corresponds to the channel which triggered the interrupt _H12TMSK1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CAL C6I CSI C4I C31 C21 CEL COT _H12FLG1 bit 7 bit 6 bit lt 5 bit 4 bit 3 bit 2 bie lt L bit 0 C7F COF CSF C4F C3F C2F C1F COF Sample Code This code calls the ISR when the input capture generates an interrupt __mod2__ void TimerOInt void __main DB12 gt SetUserVector TimerO _H12TIOS 0x00 _H12TMSK1 0x01 _H12TCTL3 0x5A _H12TCTL4 0x5F f f _H12TSCR 0x80 while 1 __mod2__ void TimerOInt DB12 gt printf timer int _H12TFLG1 0x01 function prototype TimerOInt select input capture nable the interrupt on pin 0 IC7 IC6 rising edge IC5 IC4 falling edge Ic3 IC2 rising edge ICl ICO any edge nable the timer wait 26 Output Compare ISR clear the flag A to D Converter Interrupt Operation This is similar to the non interrupt based A D converter However instead of having t
13. PULEJ bit 7 bit 6 bre 5 bit 4 bit 3 bit 2 bit 1 bit 0 pit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 _H12PUPSJd bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bite bit 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 As with the Port H Key Wakeup the flags are cleared after a Port J Key Wakeup Interrupt is triggered This is done by writing a one to the bits in _HI2KWIFJ that have been set Sample Code This code sets up the Port J Key Wakeup for falling edge operation on all 8 channels and enables the pull up resistors for all the bits 30 __mod2__ void KeyJ void void __main void function prototype DB12 gt SetUserVector PortJKey KeyJ assign the vector address 12KPO 12KWI 12PUP 12PUL 12KWI mie ee while 1l LJ 0x00 FJ OxFF SJ OxFF EJ OxFF EJ OxFF __mod2__ void KeyJ void _H12KWIFJ _H12KWIFJ falling edge sets flag clear any flags that may be set pull up pull up enabled all bits Enable all bits of J for keypad Infinite loop function prototype clear the flag 31
14. Por 68HC12 Hardware ludes the I O ports erial hnical Summary ts All port names are of the format _H12PORTx the Por usa the Por low Por use chi con inp Por con an Por con an Por LF as are and aH Por int port Por be Por are Por memory XIRQ Port Port port you are trying to access i ts A and B ble as I O low order by the programmer byte ts C and D order byte T F E t d as the input for the IRQ and Po F is used to control c ps The programmer can no G is a 6 bit general p trolled by _H12DDRG Whe ut and when it is set to Lat Ts t H is an 8 bit general p trolled by the _H12DDRH input and when it is set When _H torie J is an 8 bit general p rolled by the _H12DDRJ nput and when it is set When _H to 1 it FS SGP Gr S is used for the SCI a EE ET DE SCI1 and bits 4 7 are the SPI the SPI are not being used DDRS 2 T rrupts are not being used then P direction is controlled by _H12 AD is used exclusively as the i used for any other I O T F am ts G H and Port pin 0 have op controlled by the _H12PUCR regis H write a one to bit 7 for Por nd the SPI he SCI or SPI are not being used he interface to the terminal and can not be used as I O J6 are used as the address bus for the 68HC12 Port A is are used as the data bus for for I O
15. a Key Wakeup interrupt This manual is intended to provide a brief introduction to the 68HC12 and how to program it in C using the Introl C compiler 4 00 This manual is intended primarily for those people who are already familiar with the Motorola 68HC11 This manual also assumes that the reader has basic familiarity with the C programming language 2 Basic Programming Notes There are 3 header files that must be included with any code written for the 68HC12 using the Introl C compiler These are HC812A4 H This file contains all the register declarations for the 6812 INTROL H This file contains several function declarations needed by Introl to compile the program DBUG12 H This contains the information need to call the D Bugl2 routines and to handle interrupts Omitting this file will result in the calls to the D Bugl2 routines being flagged as errors by the compiler Your main function must be of the format void __main The two 2 underscores before main are necessary as that is the format that Introl uses to recognize the main function of the program 3 D Bugl12 D Bug12 is the monitor program for the 6812 EVB This is similar to the BUFFALO monitor used on the 6811 Unlike the BUFFALO monitor the D Bug12 monitor is a series of C functions that are stored in an EPROM on the EVB These functions can be called by the user to handle both I O and several of the common C lan
16. bre gt bit 4 bit 3 bit 2 bit 1 bit 0 EDG3B EDG3A EDG2B EDG2A EDG1B EDGIA EDGOB EDGOA Just as with the output compare operation the timer interrupts must be disabled and the timer module must be enabled The values that are read in by the input capture are stored in the appropriate _H12TCx register Sample Code This code captures the time of _H12TCNT when a switch is pressed by the user _H12TMSK1 0x00 _H12TIOS 0x00 turn off interrupts Set up Port T for input capture _H12TCTL3 0x5A IC7 IC6 rising edge IC5 IC4 falling edge _H12TCTL4 0x5F IC3 IC2 rising edge IC1 ICO any edge _H12TSCR 0x80 turn on the timer 16 5 Overview The 68 programmer key wa Interrupt Service Routines Overview HC12 provides a wide array of interrupts that ca Others are new to terrupts This sectio te n be used by t the 68HC12 su n will cover a he Some of these are similar to interrupts found on the 68HC11 such as the RTI and timer overflow keups and A D converter in different ISRs and how they opera ch as the ll the Interrupts on the 68HC12 are controlled in part through the D Bugl2 monitor program The SetUserVector routine in the D Bugl2 monitor is used to program the ISR vector table that tells the processor where the different ISRs are located in memory When using a particular interrupt the ISR mus
17. by the programmer Port C is the high order byte and port is used to generate control signals needed to access the ex As a result the programmer can not use it for I O EE E F fi urpose I O port n an _H12DDRG bit is set to 0 utput an o urpose I O port RH bit n outp 12DD isa urpose I O port RJ bit n outp 12DD isa It Bits Por Tee Hardware For more information on this Motorola 68HC12 where x is the capital letter of A is _H12PORTA They are not the high order byte and port B is pin 0 is used as the inpu the 68HC12 They are not usable D is the ternal E pin 1 is for the Port t E hip selects for the external memory and other t use it as I O The direction of the port is the port pin is an The direction of the port is is set to 0 the port pin is ut The direction of the port is is set to 0 the port pin is ut can also be used for general I O 0O and 1 are SCIO These are used Bits 2 and 3 These can be used as general I O if SCI1 is used for the timer interrupts and ca ort DDRTT nput to Ler tional p To t G write a one to bit 6 The direction of the port is controlled by the pulse accumulator If the n be used for general I O The Note The two T s are not a typo the A to D converter It can not These the pull up resistor for for Port E ull up resistors inside nabl F per write a one to b
18. by the value of PRSO PRS4 The clock input to the prescalar is an 8 MHz clock This allows for an A D conversion frequency of 500 kHz to 2 MHz The different prescalar values are listed in Table 2 Table 2 Prescalar Values Prescale Value Divisor___ 00000 Do not use 00001 4 00010 6 00011 8 00100 10 00101 12 00110 14 00111 16 Olxxx Do not use 1XXXX Do not use _HI2ADTCTL5 is used to select the conversion mode which channels are to b converted and to initiate the conversions The conversion sequence is started by any write made to this register If a write is made to this register while a conversion sequence is in progress the conversion is aborted and the SCF and CCF flags are reset _H12ADTCTLS bit 7 bit 6 bit 9 bit 4 bit 3 bite 2 bit 1 bit 0 unused S8CM SCAN MULT CD CC CB CA S8CM is used to select between making 4 conversions when the bit is set to zero and 8 conversions when the bit is set to one SCAN is used to select between performing either a single conversion or multiple conversions If SCAN is set to zero then a single conversion will be run and the flag will then be set If SCAN is set to 1 then the A D converter will run continuous conversions on the A D channels MULT determines whether the conversion is run on a single channel or on multiple channels When MULT zero the A D converter runs all the conversions on a single channel whi
19. ch is selected by CD CC CB and CA When MULT is one the conversion is run on several different channels in the group specified by CD CC CB and CA The possible channel combinations are in Table 3 Table 3 A D Converter Settings S8CM CD CC CB CA Channel Signal Result in ADRx if MULT 1 0 0 0 0 70 ANO ADRO 0 0 0 O Ts AN1 ADR1 0 0 0 1 O AN2 ADR2 0 0 0 T T AN3 ADR3 0 0 1 O O AN4 ADRO 0 0 L O I3 AN5 ADR1 0 0 1 1 O AN6 ADR2 0 0 T a Ts AN7 ADR3 0 1 O O O Reserved ADRO 0 1 O O 1 Reserved ADR1 0 1 O 1 O Reserved ADR2 0 1 Or a As Reserved ADR3 0 1 1 O O V RH ADRO 10 0 L 1 O Ls V RL ADRI1 0 1 1 1 O V RH V RL 2 ADR2 0 1 1 1 1 TEST Reserved ADR3 1 0 gt 02T O gt O ANO ADRO 0 O O ie AN1 ADR1 0 O 1 O AN2 ADR2 0 O A Bs T AN3 ADR3 0 Ex O O AN4 ADR4 0 slags O Ls AN5 ADR5 0 1 1 O AN6 ADR6 QO 1 Ts ts AN7 ADR7 1 OA LOFIOS Reserved ADRO 0x 0 1 Reserved ADR1 O 1s O Reserved ADR2 Osa Sls is Reserved ADR3 1 3 O O V RH ADR4 L Q 1 V RL ADR5 Lex T 0 V RH V RL 2 ADR6 1 1 1 TEST Reserved ADR7 Stared bits are don t care if MULT eight channels make up a conversion sequence W CD CC CB and CA must be specified and a co four or eight consecutive conversions of the si HI2ADSTAT is used to determine the status of t SCF is used to signal t the setting of the SCF signals t m Complete Flag
20. es not need to be specified Instead _H12TMSK1 is used to determine which channel s will be used to generate an interrupt s Each bit in _H12TMSK1 corresponds to a different output compare channel When the interrupt is generated the ISR for that channel is called and executed The flag must be cleared by writing a one to the bit _H12TFLG1 register that corresponds to the channel which triggered the interrupt _H12TMSK1 bit 7 bit 6 bit 5 bit 4 bit 3 bit2 bit 1 bit 0 C7I Col CSI C4I C3 I C2I C1I COI _H12FLG1 bit 7 bit 6 bat 5 bit 4 bit 3 bit 2 bit 1 bit 0 CTF C6F CSF C4F C3F C2F CLF COF Sample Code This code calls the ISR when the Output Compare 0 generates an interrupt __mod2__ void TimerOInt void __main DB12 gt SetUserVector TimerO _HI2TIOS 0xFF _H12TMSK1 0x01 _H12TCO 0x8000 _H12TSCR 0x80 while 1 __mod2__ void Timer0Int DB12 gt printf timer int _H12TFLG1 0x01 function prototype TimerOInt select output compare nable the interrupt on pin 0 set the value to be compared against nable the timer wait Output Compare ISR clear the flag 25 Input Capture Interrupt Operation Like the output compare interrupt the input capture interrupt is very similar to the non interrupt based input capture The _H12T
21. for a 4 conversion sequence and _H12ADROH _H12ADR7H for an eight conversion sequence Sample Code This code turns on the A D converter while disabling the A D interrupt then performs 4 conversions on channel 0 of the Lt A D converter and displays the result that is stored in the result registers to the screen 11 H12ADTCTL2 0x80 turn on ATD and off the interrupt H12ADTCTL3 0x00 don t stop at breakpoints _H12ADTCTL4 0x43 Set prescalar 8 amp sample time 8 periods H12ADTCTL5 0x00 check ANO 4 conversions and stop while _H12ADTSTAT amp 0x8000 wait for flag to be set DB12 gt out2hex _H12ADROH Display A D result registers DB12 gt printf n r DB12 gt out2hex _H12ADR1H DB12 gt printf n r DB12 gt out2hex _H12ADR2H DB12 gt printf n r DB12 gt out2hex _H12ADR3H 12 Timer Functions T functions unctions first bee nabled the Timer Enable bit non interrupt based operatio Interrupt based apture and output compare f In order to make use of any This is do T ns timer features ar The basics of timer module operation There are several basic feat c f EN _H12TSCR bit 7 b it 6 bit 5 bit 4 unctions bit 3 timer based operations ne by setting _H12TSCR to 0x80 which then enables all timer operations bit 2
22. guage ANSI functions All calls to the D Bugl2 routines follow the same format The format is DB12 gt routine name The DB12 gt is used as a cast pointer that allows the compiler to reference the EPROM for the different routines The routine name is just the name of the routine and any parameters that are being passed to the function If the function returns a value to the program the return value can be assigned to a variable This is done as follows temp DB12 gt routine name This assigns the return value of the routine to a variable named temp As always the variable must be declared in the program It is important to note that if you do not include the DB12 gt with the function call the compiler will return an error message Th rror message that is returned is that the function does not exist Putting the DB12 gt before the function name will solve this problem D Bug12 Functions Readers interested in a more in depth explanation of the D Bugl2 routines are referred to Motorola Document anl280a Using the Callable Routines in D Bug 12 available on the web at http www ecse rpi edu Courses CStudio appnotes getchar This function will get a single character of input from the user Function Prototype int getchar void Return Value This returns the character from the keyboard in hexadecimal ASCII printf This will display a string of characters to the screen Function P
23. has different effects based on the state of PAMOD equals 0 then falling edges on the pulse accumulator input pin Port T f PEDGE bit 7 causes the count to be incremented equals 1 then rising edges on the input cause the count to be bP HAH SS N f PEDGE ncremented en PAMOD equals one equals 0 when the pulse accumulator input pin goes high it enables nternal f PEDGE W I an internal clock which is connected to the pulse accumulator and the E i clock used to increment the pulse accumulator is 8MHz 64 H rt p H nternal H he time the tim railing rising edge on railing falling edge on the pulse accumulator input sets the PAIF flag The equals one when the pulse accumulator input pin goes low it enables n internal clock which is connected to the pulse accumulator and the the pulse accumulator input sets the PAIF flag The clock used to increment the pulse accumulator is 8MHz 64 r must be enable to use these since the clock generated is based on CLK1 and CLKO are r prescaler used to control the clock rate at which the pulse accumulator is incremented The different options are listed in Table 7 Table 7 Pulse Accumulator Clock Rates CLK1 CLKO Selected clock__ 0 0 timer prescaler 0 1 8MHz clock 1 0 8MHz 256 clock
24. it 4 of _H12PUCR To disable the pull up resistors to a particular port write a 0 to the appropriate bit A to D Converter This sectio convert nN covers converter c converter allows This sectio explained i n the The A hannels o registers allowing 8 nN covers D converter co for SEC and can convert operation have been completed ither on the basic fu r uses a dedicated port n the HC12 a simultaneous readings two differe the polling method tion on interrupts nversion seq chan polling based operation signaling port AD nd for its inp unlike the 6811 The imple nt methods of operati The interrup uence consists of eit nel or multiple channels the flag is set after th uts nction of the A D converter There are 8 A D there are also 8 A D mentation of the A D ng the A D converter t based operation is The A D her 4 or 8 conversions In scan mode conversions the completion of the A D cycle Before running the A D converter the system must be initialized by the user There are 4 registers that are used to control the A D Converter These are _H1I2ADTCTL2 _H12ADTCTL3 _H1I2ADTCTL4 and _H12ADTCTL5S _H12ADTCTL2 contains several of the A D Converter enable bits Bit 7 is the A D po
25. it 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 RTIE RSWAI RSBCK unused RTBYP RTR2 RTR1 RTRO After the interrupt is triggered the ISR must clear the flag This is done by writing a one to the Real Time Interrupt Flag RTIF in _H12RTIFLG register _H1I2RTIFLG bit 7 bit 6 bit 5 bit 4 bie ss bit 2 bit 1 bit 0 RTIF unused unused unused unused unused unused unused Sample Code This occurred __mod2__ int Timec void RTIInt ount void __main DB12 gt SetUserVector RTI RTIInt Tim eCount 0 _H12RTICTL 0x87 whi le 1 DB12 gt out2hex Timecount is a simple program to count the number 19 of RTI interrupts that have function prototype global variable set up interrupt vector set up the RTI for 65 536ms __mod2__ void RTIInt interrupt service routine Timecounttt _H12RTIFLG 0x80 clear the flag 20 Timer Overflow Interrupt Operation The Timer Overflow Interrupt TOI functions by generating an interrupt every time the free running counter overflows The free running counter is a 16 bit value and is constantly running in the background when the timer is enabled The TOI is set up in the _H12TMSK2 register by writing a one to Timer Overflow Interrupt Enable TOIE After this has been done the Timer can be enabled Whenever the interrupt is trigge
26. o output a low when triggered 15 Timer Compare Force Register This is a special register that allows the programmer to cause an output Writing to bit n in this register causes the action which is programmed for output compare n to occur immediately compare to trigger This is the same as if a successful comparison had just taken place with the TCn register _H12CFORC bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FOC7 FOC6 FOC5 FOC4 FOC3 FOC2 FOC1 FOCO Input Capture The operation of the input capture is similar to that of the output compare The first step is to set up the appropriate Port T bits as input capture pins using _H12TIOS Having done that be triggered it is then necessary to select how the input capture will This is done using _H12TCTL3 and _H12TCTL4 Each channel has two control bits EDGxB and EDGxA which determine which edge triggers the input capture The different configurations of these bits are in Table 5 Table 5 Input Capture selects EDGxB EDGxA Configuration 0 0 Capture disabled 0 1 Capture on rising edge 1 0 Capture on falling edge 1 1 Capture on any edge SHI2TCTI3 bit 7 bit 6 biti5 bit 4 bit 3 bit 2 bit 1 bit 0 EDG7B EDG7A EDG6B EDG6A EDG5B EDGSA EDG4B EDG4A _H12TCTL4 bit 7 bit 6
27. o poll the flag to determine when the A D cycle has been completed an interrupt is generated when the conversion is completed In order to make use of the A D interrupt the ASCIE bit in _H12ADTCTL2 must be set to 1 This way when the conversion is completed the interrupt will be triggered The flag is cleared by writing a one to ASCIF in _H12ADTCTL2 T he remainder of the operation is the same as the non interrupt based A D onverter _H12ADTCTL2 bit 7 bit 6 lon bones bit 4 bit 3 bit 2 bit 1 bit 0 ADPU AFFC AWAIT unused unused unused ASCIE ASCIF Sample Code This sample code calls the A D interrupt when the A D cycle is completed __mod2__ void AtoDInt Function prototype void __main main program DB12 gt setUserVector AtoD AtoDInt set the vector address _H12ADTCTL2 0x82 turn on ATD and on the interrupt _H12ADTCTL3 0x00 don t stop at breakpoints _H12ADTCTL4 0x43 Set prescalar 8 amp sample time 8 periods _H12ADTCTL5 0x00 check ANO while 1 infinite loop __mod2__ void AtoDInt A D ISR DB12 gt out2hex _H12ADROH print contents of registers DB12 gt printf n r DB12 gt out2hex _H12ADR1H DB12 gt printf n r DB12 gt out2hex _H12ADR2H DB12 gt printf n r DB12 gt out2hex _H12ADR3H _H12ADTCTL
28. o toggle when the interrupt is triggered 12TI 12TM OS 0OxFF SK1 0x00 127 CT L1 0x5A L2TC 12TC 12TC 12TC 12TC L2TC 12TC1 TL2 0x5F 0 0x0000 0x2000 2 0x4000 3 0x6000 4 0x8000 5 0xA000 set up th no hardwa set OC7 set OC3 set diffe 14 e cha re interrupts nnels as output compare OC6 for toggle OC5 0C4 clear OC2 for toggle OC1 0C0 set rent trigger times _H12TC6 0xC000 _H12TC7 0x9000 _H1I2TSCR 0x80 Output Compare Output Output Compare Compare output compare Output Compare modulated refer to modulation 7 turn on the timer 7 has a special feature that makes it very powerful 7 allows the programmer to change pin the LIT EC man without Anyone The method for using output set up as follows at which OC7 is triggered must select which channels will be controlled by OC7 a This is done using triggers _H120C7M is used to select one The triggered in _H120C7D Just as tten TO T A successful OC7 event This is done by wri reset write a one ands Similarly i stay at 0000 can t the OC7 ual for the s changing the operation that This is particularly useful for generating pulsewidth signals tate of any of the is performed by that interested in this particular application should compare 7 to control with any other
29. of this interrupt is very similar to the edge triggered interrupt although PAMOD and PAEDGE have no effect on the interrupt Most of the other settings are the same as for the edge triggered operation of the Pulse Accumulator However instead of setting PAI to one for Overflow operation PAOVI is set to one The user must clear the flag in the ISR by writing a 1 to PAOVIF in the _H12PAFLG register _H1I2PACTL bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 unused PAEN PAMOD PEDGE CLK1 CLKO PAOVI PAI _H12PAFLG bit 7 bit 6 bat 5 bit 4 bit 3 bit 2 bit I bit 0 unused unused Unused unused unused unused PAOVIF PAIF Sample Code This code simply displays when the interrupt is triggered __mod2__ void PAOvfInt void __main DB12 gt SetUserVector PAOvf _H12PACTL 0x46 while 1 __mod2__ void PAOvfInt function prototype PAOvfiInt set for pulse accumulator overflow wait Pulse Accumulator ISR DB12 gt printf triggered _H12PAFLG 0x02 clear the flag 24 Output Compare Interrupt Operation The outpu t compare interrupt calls an ISR every time a successful output compare is detected The output compare is setup like the non interrupt based output compare with the major difference being that the action which is to occur on a successful compare do
30. red the ISR will be called and executed The ISR must clear the flag by writing a one to the Timer Overflow Flag in the _H12TFLG2 register _H1I2TMSK2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 TOILE unused TPE TDRB TCRE PR2 PR1 PRO _H1I2TFLG2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 TOF unused unused unused unused unused unused unused Sample Code This code calls an interrupt every time the Timer Overflow Interrupt occurs __mod2__ void TimerOvfInt function prototype void __main DB12 gt SetUserVector TimerOvf TimerOvfInt _H12TMSK2 0x80 enable interrupt _H12TSCR 0x80 enable the timer while 1 idle loop __mod2__ void TimerOvflInt Timer Overflow ISR DB12 gt printf Overflow interrupt _H12TFLG2 0x80 clear the flag 21 Pulse Accumulator Edge Triggered Interrupt Operation This sectio nable n describes how to set up the Pulse Accumulator for edge triggered operation The Pulse Accumulator is enabled by setting the Pulse Accumulator PAEN in _H12PACTL to one There are two other control bits in _H12PACTL PAMOD and PEDGE When PAMOD equals zero the pulse accumulator is in event counter hen PAMOD equals zero f PEDGE mode when it is one it is in gated time accumulation mode PEDGE
31. rototype int printf char s Return value The number of characters that were transmitted NOTE The Introl 4 0 compiler has an error in this function The first parameter in the list is not printed properly There are workarounds for some cases that are given in examples in class handouts In any case simple strings without variables will work without problems To display a variable the variable is represented using Sy in the printf statement where y is chosen from the table below to match the variable type To display a signed decimal integer stored in a variable num the function call would look like DB12 gt printf This is the value of num d num dy ti int signed decimal number 0 int unsigned octal number x int unsigned hexadecimal number using a f for 10 15 X int unsigned hexadecimal number using A F for 10 15 u int unsigned decimal o int single character s char display from a string until 0 p void pointer putchar This will display a single ASCII character on the screen Function Prototype int putchar int Return Value The character that was displayed GetCmdLine This function is used to read in a line of data from the user and store it in an array Each character that is entered is echoed back to the screen using a call to the putchar function Only printable ASCII characters are accepted by the function with the exception of carriage
32. t be assigned to the interrupt in the beginning of the program Each interrupt has an address offset to the interrupt vector table base address which is stored in the D Bugl2 header file When assigning the interrupt SetUserVector is called and the name of the interrupt as well as the ISR name are passed as parameters This will store the address of the ISR in the vector table For example If you are using the Real Time Interrupt RTI and have it call an ISR called RTIInt when it is triggered the code would look like DB12 gt SetUserVector RTI RTIInt The list below is all of the interrupts and their mnemonics AtoD A to D converter interrupt PAEdge Pulse Accumulator Edge triggered PAOvf Pulse Accumulator Overflow triggered TimerOvf Timer Overflow Timer7 Timer 7 Timer6 Timer 6 Timer5 Timer 5 Timer4 Timer 4 Timer3 Timer 3 Timer2 Timer 2 Timerl Timer 1 Timer0O Timer 0 RTI Real Time Interrupt IRQ IRQ interrupt XIRQ XIRQ interrupt The format of the ISR is show below All ISRs follow this format __mod2__ your code here void RTIInt It also must include a function prototype of the format __mod2__ void RTIInt Note r Lt There are 2 underscores both before and after the mod2 Interrupt Priority Interrupts on the 68HC12 do not all occur simultaneously Rather there is a hierarchy of priority for the interrupts The default priority order is Reset COP Clock Monitor Fail Reset
33. to the channel s that was selected as an output compare in _H12TIOS It is then necessary to determine what action will occur when the output compare is triggered There are several different actions that are possible which one occurs is determined by the values in _H12TCTL1 and _H12TCTL2 These registers contain the control bits for each channel OMn and OLn The effect that the different values have are listed in Table 4 Table 4 Output compare actions OMn OLn Action 0 0 Timer disconnected from output logic 0 1 toggle Ocn output line 1 0 clear Ocn output line to 0 1 1 set Ocn output line to 1 _H12TCTLI1 bit 7 bit 6 pit 5 bit 4 bit 3 bit 2 bit 1 pit 0 OM7 OL7 OM6 OL6 OM5 OL5 OM4 OL4 _H12TCTL2 bit bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 OM3 OL3 OM2 OL2 OM1 OL1 OMO OLO Having determined the action taken on a successful match the next step is to make sure timer interrupts are disabled This is done by writing 0x00 to _H12TMSK1 Lastly the timer module is enabled as shown above allowing the output compare to trigger It is important to note when using the output compare that when an output compare action is triggered the corresponding bit of Port T will automatically be set as an output regardless of the state of DDRTT Sample Code This code sets up an output compare and causes the pin output t
34. urn Value If c is part of the set it returns true 1 if it is not a part of the set it returns a false 0 strlen This routine determines the length of the string that is passed in as a parameter The string must be null terminated Function Prototype unsigned int strlen const char cs Return Value The length of the string pointed to by cs strcpy This routine makes a copy of string two to string one The string to be copied must be null terminated Function Prototype char strcpy char sl char s2 Return Value A pointer to sl out2hex This outputs an 8 bit number on the screen as two hexadecimal numbers Function Prototype void out2hex unsigned int num Return Value None out 4hex This outputs a 16 bit number on the screen as four hexadecimal numbers Function Prototype void out4hex unsigned int num Return Value None SetUserVector This routine is used for handling Interrupt Service Routines and will be described in the section on interrupts Notes The printf putchar out2hex and out4hex routines do not generate carriage returns or line feeds when they are called To do this you must include n r in either a putchar or a printf statement 4 This section explains the operation of the hardware on the 68HC12 the A D converter and the timer functions interrupts are explained in the next section refer to Motorola document MC68HC812A4TS D inc mat Tec
35. wer up ADPU When this is set to one the A D converter is enabled when it is zero then the A D converter is disabled Bit 1 is the A D converter interrupt enable ASCIE The interrupt is enabled when the bit equals one and disabled when the bit is set to zero In scan mode this bit is set to 0 to disable interrupts Bit 0 is the interrupt flag ASCIF which is not used in the polling version of the A D converter _H1I2ADTCTL2 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ADPU AFFC AWAI unused unused unused ASCIE ASCIF _H1I2ADTCTL3 should always be set to 0x00 This is used to control several actions that are related to how the A D converter operates in background debug mode As the D Bugl2 monitor is being used the background debug mode is not being used and these features should be disabled _H12ADTCTL4 is used to select the sample time of the A D converter and to set the prescalar for the clock _HI2ADTCTL4 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 unused SMP1 SMP 0 PRS4 PRS3 PRS2 PRS1 PRSO There are four different sample times available for the A D converter The sample time is s cted by setting the value of SMP1 and SMPO sample times that can be used are listed in table 1 Table 1 Sample Times SMP1 SMPO Sample Time 0 0 2 A D clock periods 0 1 4 A D clock periods 1 0 8 A D clock periods 1 1 16 A D clock periods The different The prescalar that is used by the A D converter is determined
36. y all call the same interrupt service routine _H12KWIEJ bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 _H1I2KWIFJ bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit 7 bit 6 bit 5 bit 4 bit 3 PIE 2 biti bit 0 Before enabling the Key Wakeup Interrup will trigger the interrupt and to selec pulldown resistors on the input it is necessary to set which edge to us ither the pull up or Which edge will be used to trigger an interrupt is determined by the setting of _H12KPOLJ Writing a zero to a bit of _H12KPOLJ makes that channel falling edge triggered Writing a one makes the channel rising edge triggered _H12KPOLJ bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 The pull up and pulldown resisters are controlled by _H12PUPSJ and _H12PUL _H12PUPSJ selects between using pull up resisters and pulldown resisters When a bit in _H12PUPSJ is set to one the channel has a pull up resistor GI ey When the bit is zero there is a pulldown resistor on the input This MUST be set before the pull up pulldown resistors are enabled _H12PULEJ is used to enable the pull up or pulldown resistor Writing a on nables the pull up or pulldown while writing a zero will disable it _H12
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