A Practical Application of the TMS320C54x Host
Contents
1. asm LD AR2 B asm NOP asm AND 00ffh B A asm STL A OUT asm PORTW OUT 0x4000 sends over the lower byte of checksum asm AND 0ff00h B A asm SFTA A 8 asm STL A OUT asm LD 0909h A asm LD 255 B asm AND B A asm STL A OUT asm PORTW OUT 0 0000 asm PORTW OUT 0 2000 end of index 2 case else if index 3 send word O0xOfff A SEND send word 0x0000 D SEND COMMAND value 10005 0h ST 1000 0 send word 0x1010 D SEND 6 asm PORTW OUT 0 6000 sends over upper byte of checksum 0 provides for data download option destinatio placed for i n address to where the application code is nterim storage in HPIram always 1010 1001h 1010h DEST LD DUPADDR 1010h send word 0x000a D SI send word 0x2014 D SEND 2000h is the assigned target program memory address 001dh is equivalent to nA 1010h is the src address in HPIRAM A Practical Application of the TMS320C54x Host Port Interface HPI D for the segmented simple out c case 18 Application Report SPRA574 send_word send_word new_count This sets END number of chunks 0x100f A SE D ADDITION OF A NE FOR2. nsigned int index 1 done globally index will always start out as 1 A Practical Application of the TMS320C54x Host Port Interface HPI The DSKPlus board will be used as the HOST nsigned const count 4 should be done globally The DSP Research Board will be used as the TARGET ck kck ck kck ck ckokckckokck kc k Application Report X5 SPRA574 BORK KK KK KR A A Ck kk KC KC Kk kk e send word Send a word 16 bits to the DSP A pre increment occurs for each write operation Arguments i word ii hpimode A SEND write to HPIA C SEND write to HPIC D SEND write to HPID with auto increment N SEND write to HPID NO auto increment FAK RA ck I A ke x x void send word unsigned int word unsigned int hpimode asm OUT set 07h vall BYTE LO word asm STL A OUT asm LD 40h Clear the B acc at the beginning of each incoming word used later to total two bytes to form the word if hpimode 0x8000 asm PORTW OUT 0 8000 hpimode hpimode HBIL HI This line doesn t actually need to be here since the Port address is hard coded in the next statement similarly done in the elseif below val2 BYTE HI word asm STL A OUT asm PORTW OUT Oxa000 else if hpimode 0x4000 asm PORTW OUT 0 400
3. send word 0x1010 D SEND destination address to where the application code is placed for interim storage in HPIram always 0x1010 1001h 1010h DEST LD DUPADDR 1010h Ei send word 0x000a D SEND send word 0x2000 D SEND destination address where application code chunks will be placed in target program memory for sample code this value is 2000h this is fed through the lower two bytes of the accumulator 1003h 2000h SRC LD PUDDADDR 2000h 2000h is the assigned target program memory address 001dh is equivalent to ud 1010h is the src address in HPIRAM A Practical Application of the TMS320C54x Host Port Interface HPI 15 Application Report X5 SPRA574 send word new count D SEND This sets the number of chunks send word 0x100f A SEND This sets up the address to where data chunks from the host say 1010h are transferred to in HPIRAM xj section length 0 000 TO IMPLEMENT THE CHECKSUM TOTAL THE VALUES AND PLACE HE ACCUMULATING VALUE IN SOME AR on the host side T BEFORE BEGINNING THE ADDITION OF A NEW SET OF DATA VALUES REMEMBER O CLEAR THE AR IN USE FOR TOTALLING below asm STM 27f0h AR2 asm ST 0h AR2 f KK kk KK KK x FIRST CHUNK of application
4. MVDM 1005h ARO checksum sent by host is stored in address pointed to by ARO A Practical Application of the TMS320C54x Host Port Interface HPI 26 Application Report X5 SPRA574 chec chec Th CMPR 0 AR3 check to s if received checksum is equal to locally calculated checksum if equal then TC 1 else TC 0 BC checkpass TC STM 100ah ARO initialize ARO ST 1h ARO if checksum DOES NOT match then write a value of 1 to location 100ah STM 1h ARO write result of checksum comparisons ARO because location 1010h will be cleared befor this result is read by host from location 1010h the aim is to store the result in ARO directly Since that MMR is never used any place else so hopefully no chance of overwriting it B checkfail kpass STM 100ah ARO initialize ARO ST 0h ARO if checksum DOES match then write a value of 0 to location 100ah kfail STM 0h ARO write result of checksum comparisons ARO because location 1010h will be cleared befor this result is read by host from location 1010h the aim is to store the result in ARO directly Since that MMR is never used any place else so hopefully no chance of overwriting it STM 1004h ARS arb is set to total number of chunks left to be xferred ckckckckck kk kk ck ck STM 1002h AR1 1 1002h arl points to length value thr values of COMMAND DUPDADDR and PUDDADDR are now
5. Application Report X5 SPRA574 STM 000ah HPIC interrupt host and retain SMOD 1 iiiiiiii For interrupting host in HOM mode if required iiiiiiii A STM 8h HPIC hpic 8h interrupt the host R NOP The two instructions following a SAM to A HOM change NOP must be NOP s see section 9 5 2 in 54x ser manual wait LDM HPIC A hpic AND 8h A amp 8h BC wait ANEQ if ANEQ B wait Loop till next command ready 331111 needed if using HOM mode for interrupting not currently used STM 2h HPIC hpic 2h Shared access mode next 3 instructions cannot access HPI see section 9 5 2 C54x user manual EEE OE EEE EE EE 47 4 EE SEE EE EE EL GEE EP ROE EE PR PSL E DRY at this point calculate the checksum of the values received from locations 1010h through 1050h or end of HPIram LD 40h A initialize accumulator STM 1010h AR4 starting address STM 1008h AR3 initialize AR3 STM 07efh BRC set loop count RPTB turn 1 XOR AR4 A NOP turn STL A AR3 STL A AR3 checksum calculated by target of the incoming host data is stored in address pointed to by AR3 having XORed all the relevant values now check it against the checksum sent by the host So compare checksum in A with checksum sent over by host into location 0x1005
6. RSV HD 0 7 HRDY HPIENA HCS HBI HCNTLO HCNTL1 HAS HRW HDS1 HDS2 HINT INT2 Remaining HPI Application Report X5 SPRA574 Mode of Operation The target board is used in the microcontroller MC mode this enables the on chip ROM and bootloader The jumper configurations on the target board have been set to the values indicated in Table 1 A jumper satisfying the In configuration indicates that the jumper is enabled similarly a jumper satisfying the Out configuration indicates that the jumper is disabled Table 1 Jumper Configurations Jumper In Out JP 12 ALN ROM TBC 14 CPURST The bootloader program on the target DSP enables the HINT line by driving it low HPI boot from HPI memory only occurs if the HINT line is connected externally to the INT2 line The state of the INT2 line is checked at least 30 clock cycles after the boot loader program has been initiated On the target board the INT2 signal is the output at pin 40 of a PAL device labeled U30 Adhering to the jumper configurations of Table 1 the target board drives the INT2 line at pin 40 of U30 to a midlevel logic swing Connecting HINT to INT2 causes HINT to reflect the midlevel logic swing instead of a full TTL swing that is expected once the target DSP is released from reset This midlevel logic swing prevents an HPI boot from occurring Although the board manufacturer has been contacted on this issue no
7. ADD IN 8 A at this point the whole word is read and is in the accumulator A asm STM 27f1h AR1 initialize AR1 asm STL A AR1 store value of flag into address pointed to by 1 asm CMPM AR1 40h asm BC over NTC if flag value indicates that the checksum has not matched then re send most recently sent block if flag value indicates that the checksum has matched then increment counter and prepare to send new block if index gt count else asm B over asm over NOP end of the while loop end of host_hpiram_xfer A Practical Application of the TMS320C 54x Host Port Interface HPI 21 Application Report SPRA574 main asm OUT set 07h asm IN set 09h asm LD 1 DP This data page pointer setting doesn t seem to have any affect since the CPL bit is configured to show SP mode then values of OUT and IN are in SP mode as well asm STM 1020h PMST This is in keeping with the new value of the vector table location at 0 100 IPTR 32 Set the IPVT to indicate the vector table location for the host device for the DSK I am using location 0x0100a IPVT set to 32 BORK RK KK kk kk kk x f The BOB bit is set here by PORTW commands to the target We may recall that when
8. DEST LD DUPADDR 1010h send word 0x000a D SEND for the segmented simple out c case send word 0x200a D SEND 1003h 2000h SRC LD PUDDADDR 2000h 2000h is the assigned target program memory address 001dh is equivalent to 1010h is the src address in HPIRAM send word new count D SEND This sets the number of chunks send word 0x100f A SEND This sets up the address to where data chunks from the host say 1010h are transferred to in HPIRAM section length 0x0029 BEFORE BEGINNING THE ADDITION OF A NEW SET OF DATA VALUES REMEMBER CLEAR THE AR IN USE FOR TOTALLING below asm STM 27f0h AR2 asm ST 0h AR2 SECOND CHUNK of application code send word send word send word send word send word send word 0xCCCC 0x7791 OxAAAA 0x7791 0x5555 0x7781 Ed p Ed Dd bd Dd lt 2 lt 2 A Practical Application of the TMSS320C54x Host Port Interface HPI 17 Application Report SPRA574 send word 0x0000 D SEND send 495 D SEND send 495 D SEND send 495 D SEND send word 0x1004 A SEND The checksum value will be placed in location 0x1005 in HPIram of the target
9. also a 542 is rated at 40 MIPS and the target DSP is rated at 50 MIPS Since this application report deals with the 54x as both host and target it is important to clarify here that the HPI in use resides on the target side of the interface Although the host also has an independent HPI port none of its pins are used to drive the target processor This is important to remember since the interface can be between a target 54x and any generic host processor in which case the host may not have an HPI port The host processor board is driven by a 5 V power supply and is connected to the PC through a JTAG cable and an XDS510 emulator card The target DSP board is a plug in ISA card Signal Connections Figure 1 shows the relevant connections between the two boards In this setup since the target is faster than the host processor the target 54x will likely be through processing the previous transfer before receiving any new request from the host In such a situation the HRDY signal pin 19 on the Tiger 542 HPI port can be left open unconnected A Practical Application of the TMS320C54x Host Port Interface HPI 3 Application Report SPRA574 Figure 1 Hardware Schematic DSKplus 542 40 MIPS Host A 12 Open V cc A 13 A 14 A 15 R W IOSTRB INT GND A Practical Application of the TMS320C54x Host Port Interface HPI GND Tiger 542 542 50 MIPS Target
10. e Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne e IED A A A LC C AT A UI ND 0 AA CEU AA AA X CU AA EA NA AA Xo SAD A a w 14 Application Report X5 SPRA574 send word 0x2000 D SEND return BORK KK KK KK I IA A AA IA AA A kkk kk kk ke k A k kkk k kk ke ke kk k X host hpiram xfer ushort dst uchar src int count This function moves a blocks of application code from host to C54x HPIram See document SPRA573 for detailed information on preparing 8 application code chunks for transfer the steps taken to convert the assembly code into the corresponding hex values as seen throughout the four chunk transfers in this routine A KK Kk kk Sk KC Ck e I void host hpiram xfer unsigned int new_count while index lt count new count count index Earlier this statement was declared outside the while loop and thus the contents of location 1004h never reflected the correct value of new count after the first chunk transfer now it is OK if index 1 send_word 0x0fff A_SEND send word 0x0000 D SEND COMMAND value 0 provides for data download option 10005 0h ST 41000 0
11. lled upon by referring to their actual data memory address values STM 1000h AR3 ar3 data COMMAND ar3 command value MVDM 1001h AR2 ar2 data DUPDADDR ar2 DUPDADDR MVDM 1003h AL al data PUDDADDR acclow has address ckckckckckckck kk LD AR3 B Accumulator B contains the contents of AR3 A Practical Application of the TMS320C54x Host Port Interface HPI 27 Application Report SPRA574 MAR AR1 AR1 WRITA AR2 CMPM AR5 Oh BC again NTC B out again STM 1000h AR4 RPT 2048 ST 40h AR4 B execmd out B 2000h stkptr end indicate one less than the actual length for the purposes of the repeat loop below repeat arl prog A ar2 The MVDP instruction can t be used due to the necessity of having a hardcode dest addr The WRITA instruction achieves the same result and when in a RPT loop it auto increments the dest addr specified in the Acc through the PAR write contents of locations 1010h onward into locations 2000h onwards respectively check if all chunks have been transferred This is a loop that will clear out all locations from 0x1000 to 2048 locations ahead with zeros Branch to the starting address of the first chunk A Practical Application of the TMS320C54x Host Port Interface HPI 28 Application Report SPRA574 TI Contact Numbers INTERNET TI Semiconductor Home Page www ti com sc TI Distributors www ti c
12. TOTALLING BEFORE BEGINNING THE TO CLEAR THE AR IN USE asm STM 27 0h AR2 asm ST 0h AR2 THIRD CHUNK of send word 0x771A D SEND send word 0x0003 D SEND send word 0x7710 D SEND send word OxEO00 D SEND send word 0xF072 D SEND send word 0x2020 D SEND send word 0x3089 D SEND send word 0x8c82 D SEND send word 0x1082 D SEND send word 0x0882 D SEND send word 0x1004 A SEND The checksum valu 0x1005 in asm LD AR2 B asm AND 00ffh B asm STL A OUT asm PORTW OUT 0 4000 sends over the lower byt asm AND 40ff00h B A asm SFTA A 8 asm STL A OUT asm PORTW OUT 0x6000 asm LD 0909h A asm LD 4255 B asm AND B asm STL A OUT asm PORTW OUT 0x0000 asm PORTW OUT 0x2000 end of th else if send word OxOfff A S W SE of checksum below T OF DATA VALUE application code x e will be placed in location HPIram of the target sends over upper byt index t END A Practical Application of the TMS320C54x Host Port Interface HPI index 3 cas of checksum Application Report SPRA574 send word 0x0000 D SEND COMMAND value 10005 0h ST send word 0x1010 D SEND destination a placed for inter 1001h 1
13. code Xk ke eK KK x x x send_word 0xF495 D SEND send 495 D SEND send 495 D SEND send word 0x7712 D SEND send word 0x1400 D SEND send word 0x7711 D SEND send word 0x0060 D SEND send 495 D SEND send 495 D SEND send word 0x7791 D SEND send word 0x1004 A SEND The checksum value will be placed in location 0x1005 in HPIram of the target asm LD AR2 B asm NOP asm AND 400ffh B asm STL A OUT asm PORTW OUT 0 4000 sends over the lower byte of checksum asm AND 0ff00h B A asm SFTA A 8 asm NOP asm STL A OUT asm PORTW OUT 0x6000 sends over upper byte of checksum asm LD 0909h A asm LD 255 B asm NOP asm AND B asm NOP asm STL A OUT A Practical Application of the TMS320C54x Host Port Interface HPI 16 Application Report X5 SPRA574 asm PORTW OUT 0x0000 asm PORTW OUT 0x2000 end of index 1 case else if index 2 asm NOP send word O0xOfff A SEND send word 0x0000 D SEND COMMAND value 0 provides for data download option 10005 0h ST 41000 0 send word 0x1010 D SEND destination address to where the application code is placed for interim storage in HPIram always 0x1010 1001h 1010h
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15. 0 asm ADD OUT B hpimode hpimode HBIL HI val2 BYTE HI word asm STL A OUT asm PORTW OUT 0 6000 asm ADD OUT 8 B Adds the upper and lower bytes to give the word value asm XOR AR2 B A Practical Application of the TMS320C54x Host Port Interface HPI 9 Application Report X5 SPRA574 XOR the result of the last XOR operation stored in AR2 with the current word if dealing with the first incoming word of a group of words then AR2 will equal zero asm NOP asm STL B AR2 Save the result of the latest operation into AR2 else if hpimode 0x0000 asm PORTW OUT 0x0000 hpimode hpimode HBIL HI val2 BYTE HI word asm STL A OUT asm PORTW OUT 0x2000 return A Practical Application of the TMS320C54x Host Port Interface HPI 10 Application Report X5 SPRA574 BORK KK KK KR I IA A A AA A Pk KC Ck I A A AA I I I relocate Download the relocation code along with th mbedded kernel of the first 2K set of code The relocation code will be responsible for transferring th mbedded kernel from HPI RAM to internal DSP memory enh mbedded kernel will be the first 2K or less chunk of code that is sent from the HOST to the DSP It will contain calls to the HOST to transfer subsequent 2K chunks of data to some specified space in exte
16. 010h send word 0x000b D SEND send word 0x201e D SEND 2000h is the a is equiv 1010h is the s 0 provides for data download option 1000 0 ddress to where the application code is im storage in HPIram always 0x1010 DEST LD DUPADDR 1010h for the segmented simple out c case Ssigned target program memory address alent to rc address in HPIRAM send word new count D SEND This sets the number of chunks send word 0x100f A SEND EFORE BEGINNING T THE AR IN USI F I F TO Gl 7 7 as as 27 0h AR2 0h AR2 se se se se se se se se se se se KKKKKK KK FOURTH nd 495 nd 495 nd 495 nd 0 7711 nd 0 0063 nd 0 6092 CHU Ox Ox nd word OxF4AA nd 0 820 nd 0 2014 nd 495 nd 495 CO E Ed Ed Dd Dd Ed Ed Ed EH Dd pud UXUUUURUUUUU OOS UU uu xu D wi HPI se nd word 0x1004 A SI The checksum value 0x1005 in LD AR2 B NOP AND 00ffh B STL A OUT PORTW OUT 0x4000 sends over the lower as as as as as D mamme
17. 0DC OxF495 OxF495 OxF495 0x7710 0 100 OxF495 OxF495 0x7680 0x0001 OxF495 A Practical Application of the TMS320C 54x Host Port Interface HPI Per E qe eq TTT dp REC T qe pq EVE Tacha ne Fae nc ai edu Lc se ru NNN NA NNN NAN NN NAN NNN NN NAN NNN NNN C0 C0 D C0 NNN NAN C0 C 0 Ed p Ed Ed Dd E Dn D Dd BE pb bd D E bd E DH bd E E Dd Dd E pb pd p E Db E Dd Db E E Dd p E p bd bd E Dd E DH bd D E D Dd BE b bd bd Dd Dd Eb Dd bd bd Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne e Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne e IED A A A LC C AT A UI ND 0 AA CEU AA AA X CU AA EA NA AA Xo SAD A a w 13 Application Report SPRA574 send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word sen
18. ADDITION OF A N OR TOTALLING EW S below ET OF DATA VALUE x EMB F Eh application code Ne ONE NE NE Ne ll be placed location ram of the target of checksum as as as as AND 40ff00h B A SFTA A 8 STL A OUT PORTW OUT 0x6000 A Practical Application of the TMS320C54x Host Port Interfa byt ns ys of checksum sends over upper byt ce HPI 20 Application Report SPRA574 asm LD 0909h A asm LD 255 B asm AND B asm PORTW OUT 0x0000 asm PORTW OUT 0x2000 asm STL A OUT end of the index 4 case The lines below cause the host to loop until it senses another HINT assertion by the target only then will it re enter the while loop and send the next chunk KKK Ax x f asm circle PORTR 0x0000 IN asm LD IN A asm PORTR 0x2000 IN asm AND 0808h A asm BC circle AEQ asm ADD IN 8 A Specify the address it will be post incremented where you want to start reading from send word 0x100a A SEND asm PORTR 0x4000 IN read the lower byte of what is in the specified address location asm LD IN A asm PORTR 0x6000 IN read upper byte of what is in specified address location asm
19. K KKK kk kk Ck ck ck kk Ck ck ck ck kk Ck ck kk Ck Ck ck ck ok ck Ck ck ck ok kk Ck ck ck ok kk Sk ck ck ko Sk ko ck k ko Mk kc k ko ko ko i Original Author GERALD CAPWELL File Name DSPKERN ASM Default Communication Kernel for j TMS320C542 DSKplus written using the algebraic instruction set A Date July 19 1996 A Author of Modified version ARUN CHHABRA p File Name kern_ram asm n the extracted hex file corresponding to this code is embedded in the file host2 c in the routine host2dsp dnld kernel The hex file is extracted by applying the COFF conversion utility SPRA573 to this Kernel code Date January 30 1998 ck ck ck kk Ck ck ck ck kk Ck Ck KK kk Ck ck ck ck kk ck ck ck Ck Ck ck ck ok KKK ck ck ck kk ck ck ok kk Sk ck ck ok Sk Ck ck Sk kk Sk ck Mk Mk Mk ko ko def start def main width 80 length 55 title TMS320C542 Debugger Kernel loaded via HPI mmregs bss COMMAND 1 bss PUDDADDR 1 bss LENGTH 1 bss DUPDADDR 1 bss 1 BEGIN MAIN PROGRAM text XCkckckckckckck kk kk kk k k k Buffer Structure N X XXkXkXk kk kk kk kk k kk k kx KK A 1000h COMMAND All cases Command 0 dataul progdl 1 progul datadl 2 run 1001n PUDDADDR Data Download amp Program Upload address Data Upload amp Program Download address j Run Address to r
20. The COFF2 utility is based on an original COFF extraction utility that extracts hex code equivalents of a COFF1 type executable file COFF1 and COFF2 file types have different header formats while the sections themselves which contain raw data are identical 2 The TI 54x version 1 16 tools generate a COFF1 type executable file All TI 54x code generation tools version 1 2 tools and higher generate a COFF2 type executable file The only distinguishing factor between these two COFF file formats is the section header length COFF1 file types have a 39 byte long section header whereas COFF2 file types have a 47 byte long section header 2 References 1 TMS320C54x DSP Reference Set Volume 1 CPU and Peripherals SPRU131 1997 2 TMS320C54x Assembly Language Tools User s Guide SPRU102 1997 A Practical Application of the TMS320C54x Host Port Interface HPI 7 Application Report SPRA574 Appendix A The Host Routine BORK KK IK kCkCk kk KC I A A A Ck CK Pk KC KK Kk Pk KC CK kk kk KKK k kkk kkk kk I FILENAME HOST2 C AUTHOR ARUN CHHABRA DATE 1 30 98 3 20pm ox X F X F F define A_SEND 0x8000 define C_SEND 0x0000 define D_SEND 0x4000 define N_SEND 0xC000 define HBIL_HI 0x2000 define BYTE HI w w gt gt 8 amp OxOOFF define BYTE LO w w amp OxOOFF nsigned int hpimode nsigned char vall val2 nsigned int word G xti GG
21. d_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word send_word 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A Practical Application of the TMS320C 54x Host Port Interface HPI xF495 0x7710 Mcd 0x7710 0 100 495 7680 0 xF495 0x7711 1002 0x 1113 1000 1001 0x 108 1183 0 4781 0x7F92 xF073 0x0110 0x7714 0x1000 OxF070 0x0800 0x7694 0x0000 0001 xF073 xF495 x0000 xF495 xF495 x7710 x0000 xF495 xF495 xF495 xF495 xF495 xF495 xF495 xF495 xF495 x7715 x1004 xF495 x1003 xF495 6085 x0000 xF495 xF820 0107 xF495 xF073 x00A0 xF073 oepPPPPPPPPPPPPPPPPPPPPUPPPPPPPPPPPUPPPPPPPPPUPPPPPPPPPPPPPPP C0 NN NN D C0 C NN NAN C0 C C0 D C0 C C0 0 CO E pd Ed Ed Dd E Dn D Dd pb Dd D E Dd E DH Dd E E D pd BE pb bdo p E Db E Dd bd E E Dd p E pd bd bd Ed Dd E Dd Db Dd E Dd Dd BE b bd Dd D Dd Eb Dd bd bd Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne Ne
22. definite explanation has been obtained As a result to circumvent the problem pin 40 INT2 of U30 is raised and connected directly to the HINT signal Sequence of Operation After loading the program on the host processor single step or run through the code until the software reset command is encountered At this point reset the target board using the reset button that is provided on the board While continuing to run through the code in this state the kernel code is transferred from the host to the target The target s reset button is released after witnessing a change in the STO register indicating a change in the XF bit soon after single stepping past the software reset release command When the target DSP is released from reset the bootloader program on it begins executing Upon recognizing an HPI boot the bootloader transfers program execution to resume from DARAM location 1000h A Practical Application of the TMS320C54x Host Port Interface HPI 5 Application Report X5 SPRA574 Software Description The software component of the interface consists of three primary parts host routine kernel and COFF extraction routine each is described below Host Routine The main program that initiates communication between the two processors is referred to as the host routine see Appendix A The host routine begins by asserting the software component of the target reset Subsequently it sets the BOB bit values in the HPIC reg
23. e 16 bit word structure of the 54x all data transfers with a host must consist of two consecutive bytes The dedicated HBIL pin indicates whether the first or second byte is being transferred The HCNTLO and HCNTL1 control inputs indicate which one of the three internal HPI registers is being accessed as well as the type of the access The host address bus bits usually drive these two control inputs along with the HBIL input on the 54x The two control inputs specify access to the HPI registers in four different ways The host can specify an access to the HPIC the HPIA and the HPID The HPIA register serves as a pointer to HPI memory The HPID is used to transfer data to the address pointed to by the HPIA The HPID can also be referenced with the option of automatic address increment In this mode a data read causes a post increment of the HPIA and a data write causes a pre increment of the HPIA The HDS1 and HDS2 strobes control the transfer of data during host access cycles Hosts with separate read and write strobes connect those to either HDS1 or HDS2 The HDS1 and HDS2 lines are internally exclusive NORed As a result hosts with a single data strobe connect it to either HDS1 or HDS2 and is taken to connect the unused strobe line high The HAS strobe is connected to logic 1 level in hosts with separate address and data buses Hosts with a multiplexed data and address bus are connected to the HAS pin through the addre
24. gram that has been designed to run on the target 54 As a result of the HINT line being enabled by the bootloading operation the kernel program begins by monitoring the HPIC until the host processor clears the HINT Then the HPI memory is cleared and the kernel asserts another HINT to the host Subsequently the application code is downloaded from the host processor For the duration of the download the target DSP monitors the status of the HINT bit until it is cleared by the host Once the HINT bit is cleared by the host the target 54x will recognize that one complete chunk has been downloaded The HPI memory is cleared with Os to prepare for the arrival of the next chunk At this stage the target 54x is ready to perform the transfer of the application code chunk from HPI memory to the target 54x internal memory The target 54x proceeds to decipher parameters for the transfer of the application code chunks to internal memory These parameters are specified in the header information of the application code chunk and contain the number of chunks to be transferred the destination address and the length of each chunk Each chunk is then transferred to some internal memory location If the last chunk has been transferred the kernel passes control to the starting address of the first chunk However if additional chunks remain to be transferred then the target asserts another HINT and the process continues Each application chunk transfer is moni
25. ister on the target HPI Following this a call to the host2dsp dnld kernel routine occurs This routine contains the kernel code that executes on the target processor and consists of a series of calls to the send word function The send word function performs the actual transfer of the kernel chunk and is responsible for decomposing the transfer process into a series of I O writes Host hpiram xfer is another function that resides in the host program it is responsible for transferring the application code chunks to the target 54x This routine is also composed of a series of calls to the send word function which conducts the actual transfer of application code chunks from the host to the target DSP When the kernel routine executing on the target 54x indicates to the host that it is ready to receive application chunks then the host program invokes the host hpiram xfer routine Kernel The host2dsp dnld kernel routine see Appendix B transfers kernel code to the target DSP starting at location 1010h Locations 1000h to 100Fh contain a relocation code that is transferred along with the kernel The bootloader begins by executing the relocation code which relocates raw data from locations 1010h onward in HPI memory to location 0080h and beyond in internal program memory Once this has been done the last line of relocation code branches control to resume execution at location 0080h of internal program memory The kernel code is an independent pro
26. it onere Dee 7 Appendix A Host Routine sisri nennen enin nter innen ennt eren nete nennen 8 Appendix B The Kernel estende tetigi stec Leere eben dne epiac RR ee cR deiari 24 Digital Signal Processing Solutions July 1999 Application Report X5 SPRA574 Theory of Operation Information exchange between the host and target processors is carried out through the on chip HPI memory which resides on the target 54x and can be accessed by both processors The 8 bit HPI memory on the 542 545 548 and 549 devices is a 2K x 16 bit word block of dual access on chip RAM addressed at 1000h in data memory The HPI interfaces to the host as a peripheral with the host device as master of the interface The host communicates with the HPI memory by using the three HPI registers the HPI address HPIA the HPI data HPID and the HPI control HPIC The 54x has direct access to only the HPIC register The HPI has two modes of operation shared access mode SAM and host only mode HOM In SAM the normal mode of operation both the 54x and the host can access the HPI memory In case of a conflict between host and 54x cycles the host has access priority while the 54x waits one cycle In HOM the host has exclusive access to the HPI memory while the 54x remains in reset or IDLE2 1 HPI Functional Description An 8 bit data bus HD7 0 exchanges information with the host Because of th
27. k kkk k kkk ke kk EMBEDDED KERNEL BEGINS HERE FER KR A kk AA Ck I A I relocate 0x0080 0x0092 send 0 100 A SEND section length 0x0092 Writing a Oxa into HPIC i e asserting HINT in SAM mode 0x6807 0x2300 xF495 xF495 0x7700 x0000 xF495 xF495 xF495 0x7728 Ox7ETF 0x7718 send word send word send word 0 send word 0 send word send word 0 send 0 send 0 send 0 send send send send 0 0112 send 0 482 send 495 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Ed Dd Db Ed Dn D pd Ed p D D bd E DH pd DE DE D pd pb pb E D D pb pH JU C QU JACI 4 4 send_word 0xF495 D E send_word 0xF495 D_ send_word 0xF030 D A send wo
28. ny license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such semiconductor products or services might be or are used TI s publication of information regarding any third party s products or services does not constitute TI s approval warranty or endorsement thereof Copyright O 1999 Texas Instruments Incorporated A Practical Application of the TMS320C54x Host Port Interface HPI 30
29. om sc docs distmenu htm PRODUCT INFORMATION CENTERS Americas Phone 1 972 644 5580 Fax 1 972 480 7800 Email sc infomaster ti com Europe Middle East and Africa Phone Deutsch 49 0 8161 80 3311 English 44 0 1604 66 3399 Espa ol 34 0 90 23 54 0 28 Francais 33 0 1 30 70 11 64 Italiano 33 0 1 30 70 11 67 Fax 44 0 1604 66 33 34 Email epic ti com Japan Phone International 81 3 3344 5311 Domestic 0120 81 0026 Fax International 481 3 3344 5317 Domestic 0120 81 0036 Email pic japan ti com Asia Phone International 886 2 23786800 Domestic Australia 1 800 881 011 TI Number 800 800 1450 China 10810 TI Number 800 800 1450 Hong Kong 800 96 1111 TI Number 800 800 1450 India 000 117 TI Number 800 800 1450 Indonesia 001 801 10 TI Number 800 800 1450 Korea 080 551 2804 Malaysia 1 800 800 01 1 TI Number 800 800 1450 New Zealand 000 911 TI Number 800 800 1450 Philippines 105 11 TI Number 800 800 1450 Singapore 800 0111 111 TI Number 800 800 1450 Taiwan 080 006800 Thailand 0019 991 1111 TI Number 800 800 1450 Fax 886 2 2378 6808 Email tiasia ti com Tlis a trademark of Texas Instruments Incorporated A Practical Application of the TMS320C54x Host Port Interface HPI 29 IMPORTANT NOTICE Texas Instruments and its subsidiaries reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the
30. rd 0x0008 D A send_word 0xF495 D send 495 D H send word OxF844 D 5 send word 0x008D D A send_word 0xF495 D A send_word 0xF495 D send 495 D H send word 0x7714 D send_word x1000 send word OxF070 D z A Practical Application of the TMS320C54x Host Port Interface HPI 12 Application Report SPRA574 send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word 0x0800 0x7694 0x0000 0x7310 0x1010 0 495 0 495 0 495 0x772C 0x000A 0 495 0 495 0x482C 0 495 0 495 0 495 0 030 0 0008 0 495 0 495 OxF844 0x00A9 0 495 0 495 0 495 0 495 0xE800 0x7714 0x1010 0x771A send word send word OxOT7EF 0xF072 send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word send word OxOOBF Ox1C94 OxF495 OxF495 0x8013 0x7210 0x1005 OxF495 OxF495 OxF495 OxF4AB OxF495 OxF495 OxF495 OxF830 0x0
31. rnal SRAM Th mbedded kernel may also contain the total number of such 2K blocks to be transferred AA A A A A A A kck ck kokckckokck ck k ok k ke I x x void relocate int addr int length send_word 0x0fff A SEND Set the HPIA to begin location 1000h in the HPI buffer send word 0x7710 D SEND 1000 STM 1010h ARO send word 0x1010 D SEND send word 0xf070 D SEND 1002 RPT send word length 1 D SEND 1003 length send_word 0x7190 D_SEND 1004 MVDK ARO addr send_word addr D_SEND send_word 0xf073 D_SEND 1006 B addr entrypoint send_word addr D SEND return The MVDK instruction will take care of incrementing addr in each iteration A Practical Application of the TMS320C54x Host Port Interface HPI 11 Application Report X5 SPRA574 BORK KK ko kc k kk kk ke e ke ke host2dsp dnld kernel Download the kernel relocation code Th mbedded kernel will begin at location 1010h The kernel relocation code starts at location 1000h NOTE Kernel execution does not occur in this module de Only kernel DOWNLOAD occurs here The hex values in the embedded kernel below are derived by applying the COFF to hex conversion utility SPRA573 on the kernel code shown in Appendix B ck ckokck Kk ke e x void host2dsp dnld kernel KOK KKK HK I RK IR A I A KC Ck kkk kk
32. ss latch enable ALE pin or equivalent The HR W strobe is driven high by a host to perform a read and low to perform a write The HCS line serves as the enabling input for the HPI and must be low during an access A Practical Application of the TMS320C54x Host Port Interface HPI 2 Application Report X5 SPRA574 Host communication with the HPI is dependent on whether the HPI is ready to perform a transfer as indicated by the HRDY output line When HRDY is high the HPI is ready for a transfer to occur When HRDY is low it reflects that the HPI is busy completing the previous transaction Since HCS enables the HPI and it is inactive low when an access occurs it may be inferred that HRDY which is always active high except for the duration of an access is always active when HCS is active The HPIENA signal on the target is used as a select line that enables the HPI Host interrupts from the HPI are initiated by setting the HINT bit in the HPIC The value in the HINT bit is reflected correspondingly on the HINT line that is output from the HPI port At reset the HINT bit is 0 causing the HINT line to be inactive high When the C54x is brought out of reset the on chip boot loader drives the HINT line low causing the HINT bit to have a value of 1 Setup Description The 54x DSP starter kit DSKplus serves as the host unit and a DSP Research Tiger 542 board with a TMS320C542 serves as the target unit The host processor
33. the host is writing any value to it is necessary for it to write identical byte values in upper and lower bytes in will not be affected by the fact that there is no BOB F inevitably the BOB bit will be set FAK A I c kokok ko koe ke ke e x asm RSBX XF Software reset asserted for target board asm LD 0101h asm LD 4255 B asm AND B A asm STL A OUT asm PORTW OUT 0 0000 asm PORTW OUT 0x2000 This sets the BOB bit 1 for data transfer from host to hpiram host2dsp dnld kernel asm RSBX INTM asm STM 0001h IMR setting up INTO asm SSBX XF A Practical Application of the TMS320C54x Host Port Interface HPI the HPIC both the For that reason we may be sure that the particular value being fed bit setting prior to itself i e since the two byt ntries are identical then 22 Application Report SPRA574 asm asm asm asm 51 asm asm asm round LD 0909h A WOLD 4255 B TE Clearing the HINT asserted by the bootloader AND B A A PORTW OUT 0x0000 PORTW OUT 0x2000 loops Wait for external interrupts to occur end of main A Practical Application of the TMS320C54x Host Port Interface HPI 23 Application Report SPRA574 Appendix B The Kernel KKK KKK KKK KKK KK
34. tored by a modulo 2 Cyclic A Practical Application of the TMSS320C54x Host Port Interface HPI 6 Application Report X5 SPRA574 Redundancy Check CRC If the CRC reflects an error in a particular chunk transfer then that chunk is retransmitted to the target HPI memory This process continues until the CRC is passed COFF to Hex Extraction Utility The original kernel and application code are written in assembly However to be able to transfer them from the host to the 54x target it is necessary to know the hex code corresponding to each line of assembly code With these hex values known it becomes a simple issue of performing a series of I O writes to transfer the code from the host processor to the 54x target The conversion of the assembly code to hex values can be easily done by manually translating each command into it s corresponding hex data but this can prove to be a very laborious procedure when the size of a typical application code is considered With this in mind a COFF to hex extraction utility is used which performs the intended operation through a single executable program This utility extracts hex code equivalents of a 16 bit COFF file The COFF to hex extraction utility used in this application is meant to extract hex value equivalents of a COFF2 type executable file During the extraction process the COFF2 utility also resolves all address references based on the memory map specified in the linker command file
35. un A Practical Application of the TMS320C54x Host Port Interface HPI Source Destination 24 Application Report X5 SPRA574 1002h LENGTH Upload and Download Length value j Run not used 1003h DUPDADDR Data Download amp Program Upload Destination H address Data Upload amp Program Download Source address R Run not used 1004h HPIbuf All cases Start of HPI comm buffer GOR RISES ARK EREEREER EREE E OK BREE BK KER LIRR KO BAER BORER RRR RRR RK ARR AR KERR RA RK KR SKI start ANDM 2300h ST1 Enable global interrupts STM 0000h IMR Disable INT2 so that further HINT s will not cause bootloader to kick in again STM 7e7fh SWWSR SWWSR for I O writes 1 STM stkptr sp sp stkptr set stack location after kernal main clear this portion is intended to wait for the kernel code to be transferred internally by the host from HPIram to internal memory before proceeding to clear the HPIram LDM HPIC A AND 8h A BC clear AN 9 STM 1000h AR4 This is a loop that will clear out the buffer Locations RPT 2048 all locations from 0x1000 to 2048 locations ST 0h AR4 ahead with zeros execmd MVMD ARO 1010h Move the checksum comparison result that was stored temporarily in ARO back into location 1010h A Practical Application of the TMS320C54x Host Port Interface HPI 25
36. x TEXAS Application Report INSTRUMENTS SPRA574 A Practical Application of the TMS320C54x Host Port Interface HPI Arun Chhabra and Ramesh A lyer Digital Signal Processing Solutions Abstract The host port interface HPI is an 8 16 bit parallel port used to interface a host processor or device to the Texas Instruments TI TMS320C54x digital signal processor DSP The HPI enables a glueless interface with host processors containing single or dual data strobes in addition to separate or multiplexed address and data buses This application report presents a hardware interface and the accompanying software protocol that are involved in communicating between the host and target units through the 8 bit HPI resident on the target processor Contents Theory oF Operation dioe a cba ipei pe ERE e een ELSE 2 HPI Functional Description 5 cr 2 Setup DescripliOnis A c MEM eto tetas ete cde en 3 Signal Connections dide a a eo La etg ceo ere nd peso edge le De eoo rad 3 Mode Of Operation titi then cun e e RR LI Le b eM Oe e De eee E eda iu 5 SEQUENCE OF Operation e ee bo EG eer etre dee Ero llinc ipe aio en 5 SoftWare Descriptio nsession 6 Host 6 Kernel EE 6 COFF to Hex Extraction Utility nicer inet n Re
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