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1. mov 3D point transformation calculation We assume that the matrix is already present in RAMO loaded into RAM1 using DMA m00 m01 m02 m03 x0 x1 m10 mll m12 mi3 yO yl m20 m21 m22 m23 z0 ozi 1 ramO index cto raml index ctl ram2 index ct2 all mc2 The vector will be The resultant vector will be stored in RAM2 The address of the input vector in external memory is divided by four becaus befor r addresses in the DMA read register being sent out onto the system bus vector_adr 10000 gt gt 2 in_mat_rO 0 in_vec_rl 0 out_vec_r2 0 i Transfer the x0 i mvi dma d0 mcl 3 r yO and z0 from external fvector adr ra0 Wait for the transfer to complete r dma_wait LA jmp t0 dma wait Initialize the data RAM index registers The SATURN SCU DSP Assembler IToav o NMfamnal A ddan dam RAO memory to RAMI mov mov mov get multiplied by four in vec rl ctl in mat ro cto in jvec ri cti Start computing sums of products and storing the results mov mcl x mov mc0 y mov out_vec_r2 ct2 mov mcl x mov mul p mov mc0 y clr a ad2 mov mcl x mov mul p mov mc0 y mov alu a mov in vec rl ctl ad2 mov mul p mov mc0O y mov alu a mov 1 r x ad2 mov mcl x mov mul p mov mcO y mov alu a ad2 mov mcl x mov mul p mov mc0 y clr a mov all mc22. 3 mcl 4 mc0 5 mcl Number of words to be copied Index to start of source data in RO Index to destination buffer in Rl Load index register for Load index register for RO Rul Initialize loop counter Repeat next instruction Move a word from RO to R1 incrementing th auto index registers Index to location of 2 and 4 in RO Index to location of 3 and 5 in R1 Index to location of result in R2 Load index Load index Store gi Store 3 in Store 4 in Store 5 in Reset Reset Load Load Load Move Load Load Clear ne ne ne ne ne dt dt ct ct cee register for RO register for Rl the the the the RO index Rl index ndex to destination buffer in R2 2 into the RX register 3 into the RY register product into the P register 4 into the RX register 5 into the RY register the accumulator first word of RO first word of R1 second word of RO second word of R1 Add the P register to the accumulator Move the second product into P Add the two products and store the result in R2 Index to location of 2 and 4 in RO Index to location of 3 and 5 in R1 Index to location of result in R2 mov ram0O index cto mov raml index ctl ad2 mov mc0 X mov mc0 X mov mul mov mcl Y l p mov mcl Y mov mul Lp clr a mov alu a mov mov mov ad2 endi 3 Multiplication of a 4x3 matrix by a 4 element vector Perform a typical i
3. The SATURN SCU DSP Assembler 1 TTanvla NMamual A dAdan darm The maximum line length is 255 characters The assembler does not distinguish between upper and lower case Labels Labels consist of up to 32 letters numbers and or underscores The first character of a label may not be a number A label on an instruction need not begin in column 1 but if it doesn t it must be appended by a colon If the label does begin in column 1 the colon is optional Reserved Wrds The following symbols are reserved and should not be used as labels ALH ALL ALU MO M1 M2 M3 MCO MC1 MC2 MC3 MUL Using these symbols as labels will not generate an error message in all cases but it may cause your code to be assembled in ways you probably didn t expect Opcodes The assembler recognizes the following opcodes Operation commands MOV ADD SUB AD2 AND OR XOR SR RR SL RL RL8 CLR NOP Load Immediate command MVI DMA commands DMA DMAH Jump command JMP Looping commands BIM LPS End commands END ENDI Normally at most one opcode appears on each source line however up to six operation commands may appear on a single source line subject to the DSP s hardware limitations see the programming examples at the end of this manual Assembler Directives ELSE Concludes an IF clause and begins an ELSE clause If the expression in the preceding IF directive was zero then the statements between the EL
4. result from applications based on the examples describe herein It is possible that this document may contain reference to or information about SEGA products development hardware software or services that are not provided in countries other than Japan Such references information must not be construed to mean that SEGA intends to provide such SEGA products or services in countries other than Japan Any reference of a SEGA licensed prod uct program in this document is not intended to state or simply that you can use only SEGA s licensed products programs Any functionally equivalent hardware software can be used instead SEGA will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user s eguipment or programs according to this document NOTE A reader s comment correction form is provided with this document Please address comments to SEGA of America Inc Developer Technical Support att Evelyn Merritt 150 Shoreline Drive Redwood City CA 94065 SEGA may use or distribute whatever information you supply in any way it believes appropriate without incurring any obligation to you 11 2 94 002 SEGA SEGA OF AMERICA INC Consumer Products Division The SATURN SCU DSP Assembler User s Manual Addendum Doc ST 240 A SP1 052295 1994 95 SEGA All Rights Reserved READER CORRECTION COMMENT SHEET Keep us updated If you sh
5. General Notice When using this document keep the following in mind 1 This document is confidential By accepting this document you acknowledge that you are bound by the terms set forth in the non disclosure and confidentiality agreement signed separately and in the possession of SEGA If you have not signed such a non disclosure agreement please contact SEGA immediately and return this document to SEGA This document may include technical inaccuracies or typographical errors Changes are periodi cally made to the information herein these changes will be incorporated in new versions of the document SEGA may make improvements and or changes in the product s and or the program s described in this document at any time No one is permitted to reproduce or duplicate in any form the whole or part of this document without SEGA S written permission Request for copies of this document and for technical information about SEGA products must be made to your authorized SEGA Technical Services representative No license is granted by implication or otherwise under any patents copyrights trademarks or other intellectual property rights of SEGA Enterprises Ltd SEGA of America Inc or any third party Software circuitry and other examples described herein are meant merely to indicate the character istics and performance of SEGA s products SEGA assumes no responsibility for any intellectual property claims or other problems that may
6. SE directive and the next ENDIF directive will be assembled otherwise they will be ignored ENDIF Concludes an IF directive ENDS Causes the assembler to ignore everything from this directive to the end of the file EQU Equates a label with a constant e g foo equ 1 IF lt expr gt lt label gt Ifthe expression or label is non zero then the statements between the IF directive and the next ENDIF or ELSE directive will be assembled otherwise they will be ignored IF directives may be nested up to 16 levels deep IFDEF lt label gt If the given label has been defined then the statements between the IFDEF directive and the next ENDIF or ELSE directive will be assembled otherwise they will be ignored ORG Set the assembler s target address e g org 0 The directive has no effect on the contents of the C and assembler object files apart from altering the comments that show the target addresses Equivalent to EQU Constants Expressions and Operator Precedence Numerical literals are decimal by default Hexadecimal literals must be preceded by a dollar sign Binary literals must be preceded by a percent sign Constants and labels may be combined in expressions using the following operators which are listed in the order of their precedence Unary plus unary minus and bitwise negation Multiplication division and modulus Addition and sub
7. ad2 mov mcl x mov mul p mov mc0 y mov alu a mov in vec rl ctl ad2 mov mul p mov mc0O y mov alu a mov 1 ad2 mov mcl x mov mul p mov mc0 y mov alu a ad2 mov mcl x mov mul p mov mc0 y clr a mov all mc2 ad2 mov mcl x mov mul p mov mc0 y mov alu a ad2 mov mul p mov mc0O y mov alu a mov 1 rx ad2 mov mul p mov alu a ad2 mov all mc2 endi
8. e Options a Output the DSP program as an assembler source file having the extension d in addition to the S record object file which is always produced The file is in Hitachi format and it consists of a series of DATA L statements c Output the DSP program as a C source file having the extension d in addition to the S record object file which is always produced The file contains a comma separated list of 32 bit hexadecimal numbers which can be used in an array initializer 1 Output an assembled listing having the extension lst in addition to the S record object file which is always produced m Enables midbox Model M compatibility mode These options may be invoked with either a slash or a minus sign and they may be used in combina tion with one another Source File Format Each line of a DSP assembler source file has the following format lt label gt lt opcode gt lt operand list gt lt comment gt Either spaces or tabs may be used as separators Labels need not begin in column 1 however see Labels below and opcodes must not begin in column 1 Comments begin with a semicolon and continue to the end of the line A backslash may be used as a continuation character at the end of a source line allowing a long logical line to be broken into several physical lines In order to continue a line which contains a comment the continuation character must immediately precede the semicolon
9. ould come across any incorrect or outdated information while reading through the attached document or come up with any questions or comments please let us know so that we can make the required changes in subsequent revisions Simply fill out all information below and return this form to the Developer Technical Support Manager at the address below Please make more copies of this form if more space is needed Thank you General Information Your Name Phone Document number ST 240 A SP1 052295 Date Document name The SATURN SCU DSP Assembler User s Manual Addendum Corrections Questions comments Where to send your corrections 415 802 1717 Mail SEGA OF AMERICA Attn Evelyn Merritt Attn Evelyn Merritt Developer Technical Support Developer Technical Support 150 Shoreline Dr Redwood City CA 94065 The SATURN SCU DSPAssembler User s ManualAddendum by Dennis Caswell 5 1 95 Introduction The DSP assembler dspasm exe assembles programs written for the DSP that is a part of the SAT URN System Control Unit SCU It produces object files in S record format in Hitachi assembler source format and in C source format Invoking theAssembler The syntax for invoking the assembler is dspasm lt options gt lt source file gt lt object file gt If the lt object file gt is omitted the assembler will produce an object file with the same name as at the source file and the extension s Command Lin
10. traction lt lt gt gt Left and right shifting amp Bitwise and lon 2 Bitwise or and exclusive or Notes The DSP s program memory is limited to 256 words but the assembler will assemble programs having up to 2048 words and the DSP simulator will load and run them This allows you to develop and debug your algorithms first and worry about program size later If your program exceeds 256 words in length a warning will be displayed Use caution however since jumping to destinations beyond the 256 word boundary will not work because the destination field in a JMP command is only eight bits wide The assembler stops as soon as it encounters an error so it never generates more than one error message The SATURN SCU DSP Assembler 3 TTanavlo NMfamanal A ddan darm Sample Programs 1 Copying a block of memory from RAMO to RAM1 block_size ramO index raml index 2a Calculating 2x3 4x5 without parallelism ramO index raml index ram2 index 2b Calculating 2x3 4x5 with parallelism ramO index raml index ram2 index mov mov mov lps mov endi 3 5 8 3 5 3 3 3 3 5 3 S 8 3 ad2 endi mvi mvi mvi mvi 12 0 0 ramO index cto raml index ctl block size l lop mc0 mcl CO ramO index cto raml index ctl 2 mc0 3 mcl 4 mc0 45 mcl ramO index cto raml index ctl ram2 index ct2 mc0 x mcl y mul p mc0 x mcl y a mov alu a mul p mov all mc2 2 mc0
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