MSI-P420 User Manual (Adobe Acrobat Format)
Contents
1. inportw sel printf Strike any key to continue gets buffer sel sel2 printf Ch 23 16 printf X X X X X X X X n inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel printf Strike any key to continue gets buffer sel sel3 printf Ch 31 24 printf X X X X X X X X n inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel printf Strike any key to continue gets buffer goto start Page 15 MSI P420 P421 P422 User Manual IV SPECIFICATIONS PC 104 16 bit stackthrough Analog Inputs Channels 8 to 32 in groups of 8 Converter SI P420 MAX1304 MSI P421 MAX1308 SI P422 MAX1312 Single ended Input Ranges SI P420 0 5V SI P421 5V MSI P422 10V Resolution 12bits Conversion Rate 456 ksps per channel 32 Ch s enabled Nor Lirearity 1 2 LSBtypical Offset Error 3 LSBtypical GainError 2 LSBtypical Signal to Noise 71 cBtypical Input Resistance 1 MQ standard 10 MQ optional Internal Reference Ref Out Voltage 2 5V41 Temp Coeff 30 ppm C Connectors MSI P42x 8Ch One 1 3M30320 5002 or eq 20 pin MSI P42x 16Ch One 1 3M 30334 5002 oreq 34 pin MSI P42x 24Ch One 1 3M30316 5002 or eq 16 pin One 1 3M 30334 5002 oreq 34 pin MSI P42x 32Ch Two 2 3M 30334 5002 or eq 34 pin Interrupts Channels One sharingw2. Page 11 MSI P420 P421 P422 User Manual Ch4 J1 7 Ch12 J1 25 Ch20 J2 7 Ch28 J2 25 Ch4 J1 8 Chi2 J1 26 Ch20 J2 8 Ch28 J2 26 Ch5 J1 5 Ch13 J1 23 Ch21 J2 5 Ch29 J2 23 Ch5 Jl 6 Chi3 J1 24 Ch2i 32 6 Ch29 J2 24 Ch6 J1 3 Chi4 Ji 21 Ch22 J2 3 Ch30 J2 21 Ch6 J1 4 Chi4 J1 22 Ch22 J2 4 Ch30 J2 22 Ch7 Ji 1 Ch15 J1 19 Ch23 J2 1 Ch31 J2 19 Ch7 Ji 2 9 Chi5 J1 20 Ch23 J2 2 Ch31 J2 20 Note Pins P1 17 is Initialize Convert P1 18 is Initialize Convert Table 3 Pin assignments for Input Connector J3 Pi n Input Pin Input Pin J3 1 Init convert J3 2 Init convert GND G Using the MSI P910 and 20mA Current Inputs A schematic of the MSI P910 terminal card is given in the Appendix The card provides terminal strips for connecting field wiring for 16 channels 8 channels for the MSI P910 8 using a 34 pin flat cable Pads are also included for adding 250 Ohm precision resistors for 0 20 mA or 4 20 mA inputs Normally the MSI P420 is used for current inputs Page 12 MSI P420 P421 P422 User Manual BLANK PAGE Page 13 MSI P420 P421 P422 User Manual III C PROGRAM EXAMPLE A simple C program for performing a software mode conversion sequence is given below The program initializes the card and initiates a polled mode acquisition sequence The data is displayed on the user console device Program to test P420 Card 09 16 2009 clear_screen char a for a 1 a l
3. 8 thru 15 are ignored A Obit setting disables the channel anda 1 enables the channel Disabled channels are not converted and the overall conversion time is reduced by approximately 200ns for each disabled channel of the device Devices are configured as follow a MAX13xx Device 1 Channels 0 thru 7 Configuration format Bits O thru 7 control channels O thru 7 respectively Bits 8 thru 15 ignored Power up default is enabled FFFFH Address is base 0 Example To enable channels O and 5 write FF20H to I O address base O where H denotes a hexadecimal number b MAX13xx Device 2 Channels 8 thru 15 Configuration format Bits O thru 7 control channels 8 thru 15 respectively Bits 8 thru 15 ignored Power up default is enabled FFFFH Address is base 2 Example To enable channels 9 and 14 write FF42H to I O address base 2 where H denotes a hexadecimal number c MAX13xx Device 3 Channels 16 thru 23 Configuration format Bits O thru 7 control channels 16 thru 23 respectively Bits 8 thru 15 ignored The Page 7 MSI P420 P421 P422 User Manual 2 power up default is enabled FFFFH Address is base 4 Example To enable channels 17 and 23 write FF82H to I O address base 4 where H denotes a hexadecimal number MAX13xx Device 4 Channels 24 thru 31 Configuration format Bits 0 thru 7 control channels 24 thru 31 respectively Bits 8 thru 15 ignored Power up default is enabled FFFFH Ad
4. Interrupt Hardware Connections Interrupt connections are implemented by pins 17 thru 38 of JP1 and interrupt source selection jumpers of JP3 Interrupts are most commonly used with external hardware initated conversions Note User must supply program code for processing of interrupts The steps in the procedure are as follows 1 Select the interrupting source using JP3 jumper a End of last conversion EOLC JP3 1 2 The EOLC signal described above is valid when the last channel of any device is converted and is ready for reading b End of conversion EOC JP3 2 3 The EOC signal described above is valid when the first channel of any device is converted and is ready for reading 2 Select the desired IRQ using a jumper on pins 19 thru 38 of JP1 as follows IRQ2 JP1 19 20 IRQ3 JP1 27 28 IRQ4 JP1 25 26 IRQ5 JP1 23 24 IRQ7 JP1 21 22 IRQ10 JP1 29 30 IRQ11 JP1 37 38 IRQ12 JP1 35 36 IRQ14 JP1 33 34 IRQ15 JP1 31 32 A1KOhm pull down resistor is available on JP1 17 18 Only 1 resistor should be enabled in the system for a given IRQ when multiple peripheral cards are used E Performinga Conversion Conversions can be made in a polling mode or an interrupt driven mode Polling is normally used when the conversion is activated under software control An intiate convert is Page 10 MSI P420 P421 P422 User Manual issued and the status is checked for valid EOC or EOLC values Since the conversion time for the first cha
5. MSI P420 MSI P421 MSI P422 ANALOG INPUT CARD USER MANUAL PC 104 Embedded Industrial Analog I O Series Microcomputer Systems Inc 1814 Ryder Drive Baton Rouge LA 70808 Ph 504 769 2154 Fax 504 769 2155 Email staff microcomputersystems com http www microcomputersystems com CONTENTS I INTRODUCTION IILHARDWARE DESCRIPTION A Card Configuration B Card Addressing C Conversion Registers D Interrupt Hardware Connections E Performing a Conversion F Connecting Inputs to P1 and P2 G Using the MSI P910 and 20 mA Current Inputs III C PROGRAM EXAMPLE III SPECIFICATIONS APPENDIX Circuit Diagrams MSI P420 P421 P422 MSI P910 MAX13xx pdf 14 16 17 I INTRODUCTION The MSI P42x series is a low cost high performance 12 bit analog input card designed for use with all PC 104 embedded systems A special feature for the series is the simultaneous conversion of all channels activated from software or from an external pulse Four models provide input capacities of 8 16 24 or 32 channels which operate from a single 5V supply for input ranges of 0 5V MSI P420 5V MSI P421 and 10V MSI P422 with a non linearity of 1 2 LSB The inputs are overvoltage tolerant to 9V and 15V for unipolar and bipolar units respectively A block diagram of the card is shown in Fig 1 The card employs up to four MAX13xx xx 04 08 or 12 eight channel A D converters that incorporate a precision 2 5V reference
6. at address base 8 Bit O of the status is EOC and bit 1 is EOLC Bits 2 thru 15 are set to 1 The EOC bit is latched by the NANDing of the EOC s from each converter This bit is 1 when the first channel of any device is converted and is ready for reading and 0 otherwise The EOLC bit is latched by the NANDing of the EOLC s from each converter This bit is 1 when the last channel of any device is converted and is ready for reading and 0 otherwise 4 Initiate convert register I The initiate convert register is used to start a conversion sequence for all devices Conversions can be performed in two ways as follow a Software Initiated An I O write of any value to address base CH will initiate simultaneous conversions on all devices which will require a maximum time of approximately 2200ns if all 8 channels are enabled any one of the devices b Hardware Initiated An input pulse applied toJ1 17 and J1 18 see Table 2 or J3 1 and J3 2 see Table 3 will initiate a conversion sequence A 4 7KOhm pull up is used on these inputs to provide compatibility with open collector and relay contactinputs TTLinputs are valid as well The conversion is initiated on the rising edge of the input pulse As in the software initiated case simultaneous conversions on all devices which will require a maximum time of approximately 2200ns if all 8 Page 9 MSI P420 P421 P422 User Manual channels are enabled any one of the MAX13xx devices D
7. ction The MSI P910 terminal card can be used to provide up to 16 analog inputs via terminal strips This card contains resistor sites for accommodating current inputs of 0 20 mA or 4 20 mA and includes surge protection for protecting against spurious voltages prevalent in harse or industrial environments Page 4 MSI P420 P421 P422 User Manual II HARDWARE DESCRIPTION A Card Configuration The MSI C420 P421 P422 card is a CMOS design using through hole and surface mounted devices The card configuration is shown in Figure 2 and a circuit diagram of the network is given in the Appendix The input signals for channels O thru 15 are applied to connector J1 and channels 16 thru 31 toJ2 These signals are directed to the input terminals of A D converters U11 Ch 0 7 U14 Ch 8 15 U17 Ch 16 23 and U20 Ch 24 31 Jumper block JP1 is used for base address selection Pins 1 thru 16 and interrupt configuration Pins 19 thru 38 as described below A 1 KOhm pull down resistor for use with F te n JPY a 8 T a 6b Fa 3 1 e mk Ae JE se s53 Eaa legt a EE as ose i E i ae de ou 3 o gia O ejire csi a MNNM ae TT uo ol an ole aed B Eres att Ti LL Se mi ati S cE F lam HE eS p t uy _ like smo ER Mar Er
8. dress is base 6 Example To enable channels 27 and 30 write FF48H to I O address base 6 where H denotes a hexadecimal number Data register D Four input data registers provide for reading converted values from the devices Data is retrieved by successive I O reads of each device Each device is read repeatedly for a count equal to the number of channels enabled in the device The first value read is equal to the lowest numbered enabled channel and successive reads are for the next lowest until the last read which is the highest numbered enabled channel Reads are performed as follow a MAX13xx Device 1 Channels 0 thru 7 Data format Bits O thru 11 are converted data Bit O is LSB Ignore bits 12 thru 15 that are set to 1 Read address is base 0 MAX13xx Device 2 Channels 8 thru 15 Data format Bits O thru 11 are converted data Bit Ois LSB Ignore bits 12 thru 15 that are set to 1 Read address is base 2 MAX13xx Device 3 Channels 16 thru 23 Data format Bits O thru 11 are converted data Bit Ois LSB Ignore bits 12 thru 15 that are set to 1 Read address is base 4 Page 8 MSI P420 P421 P422 User Manual d MAX13xx Device 4 Channels 24 thru 31 Data format Bits O thru 11 are converted data Bit O is LSB Ignore bits 12 thru 15 that are set to 1 Read address is base 6 3 Status register S The conversion status register provides the EOC and EOLC bit values by performing an I O read
9. ithtri state buffer for IRQ2 15 Option Jumpers 025 squareposts 0 1 grid Electrical amp Environmental 5V 300 mA typical 32 Ch s enabled 40 to 85 C Page 16 MSI P420 P421 P422 User Manual APPENDIX Circuit Diagrams MSI P420 P421 P422 see P420 1 pdf P420 2 pdf P420 2 pdf P420 3 pdf P420 4 pdfand P420 5 pdf MSI P910 see P910 pdf MAX13xx Document see MAX13xx pdf Page 17 MSI P420 P421 P422 User Manual
10. m OOOOH to FFOOH on integral 100H boundaries where H denotes a hexadecimal number To assign a base address of 8200H for example install jumpers JP1 13 14 A9 and JP1 1 2 A15 Pins 17 thru 38 are used to configure the interrupt connections if interrupts are used as described in the Section II D C Conversion Registers The MAX13xx converters each have five types of registers for performing data conversions a Configuration register C an input Data register D a convert Status register S a convert status Reset register R and an Initiate convert register I The addresses for each device are summarized in Table 1 1 Configuration register C Four configuration registers are used to enable or ES aa on STN Cat Nn tn Nn oS 98583593500 0005 Ss eeeeaet eee eeezegezEg on 44 O O O AN 4t O OON yY wo 00 Nt OO DF a AES a E ar 1 en URE 2 AR SED ae EE o DEE e E e E ae o mo o 0 O O O 0 0 O O O 0 0 0 0 0 0 0 o O O O O O O O 0 0 0 0 0 0 0 0 0 e ere E a Figure 3 Jumper block JP1 configuration Page 6 MSI P420 P421 P422 User Manual Table 1 Analog Converter Register Addresses Channels Control amp Data C D Status S Start Convert I 0 7 base 0 8 15 base 2 16 23 base 4 24 31 base 6 0 31 base 8 base CH Denotes a hexadecimal address disable the analog channels of each device Bits O thru 7 are used to set the mode of a channel and bits
11. nnel ofany device is 900ns when bit O EOC of the status register is 1 reading of the devices can be started at this time for most processors For super fast processors simply use instead bit 1 EOLC Conversions are performed by the following steps 1 Perform a word 16 bit I O write to the configuration register C for each converter to enable the desired number of channels of each device Default setting at power up is all channels are enabled This step is only required if the channels enabled are to be changed 2 Initate a conversion by software or hardware as described in C 4 above 3 Read the converted data as outlined in C 2 above Note User must supply program code for processing of data using interrupts F ConnectingInputstoJ land 2 Inputs are interconnected to the card via Pl and P2 using 34 pin flat cable connectors Pin assignments are given in Table 2 Table 2 Pin assignments for Input Connectors J1 and J2 Chan Pin Input Pin Chan Pin Input Pin J1 17 Init convert J2 17 5V J1 18 Init convert GND J2 18 GND Cho J1 15 Ch8 J1 33 Ch16 J2 15 Ch24 J2 33 ChQ J1 16 Ch8 J1 34 Chi6 J2 16 Ch24 J2 34 Chi J1 13 Ch9 J1 31 Ch17 32 13 Ch25 J2 31 Ch 1 J1 14 Ch9 J1 32 Ch17 J2 14 Ch25 J2 32 Ch2 J1 11 Chi10 J1 29 Ch18 J2 11 Ch26 J2 29 Ch2 J1 12 Chi10 J1 30 Ch18 J2 12 Ch26 J2 30 Ch3 J1 9 Chil Ji 27 Ch19 J2 9 Ch27 J2 27 Ch3 J1 10 Chii J1 28 Ch19 J2 10 Ch27 J2 28
12. source with buffer amp an internal 15 MHz clock and independent track and hold T H circuitry provides simultaneous sampling of each channel Channels for each of four devices can be enabled or disabled via the configuration register of the devices Conversion times are approximately 800ns to 2200ns for 1 to 8 channels respectively for each device Since conversions are MAX13XX SERIES A8 A15 8 CH CONVERTER T JUMPERS CH 0 to 7 34 PIN CONNECTOR S ANALOG INPUTS g MAX13XX SERIES CH0 to 15 Ex ay 8 CH CONVERTER _ OF i CH 8 to 15 n 2 PIN CONNECTOR EZ INTERFASE START CONVERT IN mo NETWORK MAX13XX SERIES oY 8 CH CONVERTER 3 CH1 10 23 34 PIN CONNECTOR 9 Rosier ANALOG INPUTS R MAX13XX SERIES CH 16 to 31 8 CH CONVERTER CH 24 to 31 MSI P420 P421 P422 Figure 1 Block Diagram of the MSI P420 P421 P422 Page 3 MSI P420 P421 P422 User Manual simultaneous all four devices are converting at the same time for a maximum time of approximately 2200ns for all 32 channels A detailed description of the conversion devices is the MAX13xx pdf document in the Appendix The card is I O mapped using 16 bit addressing to select the input channels and device status Option jumpers are provided for specifying the card base addresses A8 thru A15 and interrupts IRQ2 thru IRQ15 as described in the next se
13. t 25 a a 1 printf Xn main char buffer 10 int sel0 sel1 sel2 sel3 sel4 sel6 baddr sel baddr 0x300 sel0 baddr control data ch 0 7 sell baddr 0x2 control data ch 8 15 sel2 baddr 0x4 control data ch 16 23 sel3 baddr 0x6 control data ch 24 31 sel4 baddr 0x8 status EOC bit0 EOLC bit2 sel6 baddr Oxc start convert start clear screen printf 1 Input channels 0 71 printf n printf Input choice gets buffer printf buffer 0 gets buffer if buffer 1 printf it is 1 ues outportw sel0 Oxff init all ports for 8 channels outportw seli Oxff Page 14 MSI P420 P421 P422 User Manual outportw sel2 Oxff outportw sel3 Oxff printf Status should be Oxfc printf X n inportw sel4 gets buffer outportw sel6 0 start conversion printf Status should be Oxff printf X n inportw sel4 gets buffer sel sel0 printf Ch 7 0 printf X X X X WX X X X n inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel printf Strike any key to continue gets buffer sel sel1 printf Ch 15 8 printf X X X X X X X X n inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel inportw sel
14. win ES Tez eam A p E s Eb 5 co re 7 0 rulle 4 c85 re ree oe rr FF mm r a Lm aa P CARE m ofe e sm a i i z5 cer a S le la m D iie m o a 3 o la MEE ST uze Gai kml aS B ira T once BEG a ren 530 I AN ii Fa ELDE Sd ur I e e e U16 Foc R59 Macs P Ea a lim ce SS g ALL i 7 S e e F cas e UUM wm g ANN a 2 ja an NE a mn Pe ag 034 aie cso a Sgr E sag BZ Ex e le SE MAx1304 E ms aoe ME naxs B Tome pan a oS hund rd mv siemg T ipie T SOS mim e7 w N ome Lymm lt z er SF Sc om RC gsise o rs lm 5 Mag mas ia F oN cad ba DEG ea ea GR bund o BES EE Ti om z2 an revi com Sipeneneg aaan me 3 sf eauer 4 Fl 74HCT 326 e I re onno gyng A a cd 74HCT125 Ea ER ES Sp meree PELLI Sb mean me E cr gt minal ree ID Smin he ed CUD 8 g MSI P420 P42L P422 7 Figure 2 MSI P420 P421 P422 card outline Page 5 MSI P420 P421 P422 User Manual the interrupts is available on pins 17 18 B Card Addressing The card base address is set by installing appropriate jumpers on JP1 pins 1 thru 16 as shown in Fig 3 An uninstalled jumper for a given address bit sets the bit to O false and an installed jumper sets the bit to 1 true Addresses A8 thru A15 are jumper selectable for defining the base address of the card fro
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