10-W Mono Class-D Audio Power Amp (Rev. E)
Contents
1. SC Detect DC Detect Thermal Detect UVLO OVLO Biases and References Startup Protection Logic Product Folder Links TPA3111D1 www ti com PVCC PVCC Gate Drive Lf BSP OUTP FB mn OUTP PGND BSN A OUTN xul OUTN FB PGND Copyright 2009 2012 Texas Instruments Incorporated TEXAS INSTRUMENTS www ti com TPA3111D1 SLOS618E AUGUST 2009 REVISED AUGUST 2012 TYPICAL CHARACTERISTICS All Measurements taken at 1 kHz unless otherwise noted Measurements were made using the TPA3110D2 EVM which is available at ti com TOTAL HARMONIC DISTORTION vs FREQUENCY 10 Gain 20 dB Voc 12V 2e Z 280 66 uH c 1 9 E 2 52 S 01 9 S Po 1W T a 0 01 T Po 5W 2 5 0 001 20 100 1k 10k 20k f Frequency Hz 9001 Figure 2 TOTAL HARMONIC DISTORTION vs FREQUENCY 10 Gain 20 dB Voc 12V x 21 40 33uH2. Changes from Original August 2009 to Revision A Page Added slew rate adjustment 10 Changes from Revision A July 2010 to Revision B Page Replaced the Dissipations Ratings Table with the Thermal Information Table 2 2 Inthe BSN and BSP CAPACITORS section the 220 nf capacitor rated for at least 25V was changed to 470 nf Capacitor rated to atleast 16V m 18 Changes from Revision B August 2010 to Revision C Page Added lt 10 V ms to V in the Absolute Maximum Ratings table 2 Changes from Revision C October 2010 to Revision D Page e Added a 100 resistor to AVCC Pin 14 and Note 1 to Figure 17 13 Changes from Revision D July 2012 to Revision E Page Changed 0 1 mF to 0 1 uF and 200 mF 200 pF in the POWER SUPPLY DECOUPLING Ca section 18 Changed 0 1 mF and 1 mF to 0 1 uF and 1 uF in the PRINTED CIRCUIT BOARD PCB LAYOUT section 19 Copyright 2009 2012 Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links TPA3111D1 H PACKAGE OPTION ADDENDUM TEXAS INSTRUMENTS www ti com 9 Sep 2014 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead Ball Finish MSL Peak Temp Temp Device Marking Samples Drawing Qty 2 6 3 4 5 TPA3111D1PWP ACTIVE HTSSOP PWP 28 50 Green RoHS
3. TEXAS INSTRUMENTS www ti com TPA3111D1 SLOS618E AUGUST 2009 REVISED AUGUST 2012 10 W FILTER FREE MONO CLASS D AUDIO POWER AMPLIFIER with SPEAKER GUARD Check for Samples TPA3111D1 FEATURES 10 W into 8 O Load at 10 THD N From a 12 V Supply 7 W into an 4 O Load at 10 THD N From a 8 V Supply 94 Efficient Class D Operation into 8 Load Eliminates Need for Heat Sinks Wide Supply Voltage Range Allows Operation from 8 to 26 V Filter Free Operation SpeakerGuard Speaker Protection Includes Adjustable Power Limiter plus DC Protection Flow Through Pin Out Facilitates Easy Board Layout Robust Pin to Pin Short Circuit Protection and Thermal Protection with Auto Recovery Option Excellent THD N Pop Free Performance Four Selectable Fixed Gain Settings Differential Inputs APPLICATIONS Televisions Monitor Laptop Consumer Audio Equipment GAINO GAIN1 PLIMIT 8 Fault EP 55 TPA3111D1 DESCRIPTION The TPA3111D1 is a 10 W efficient Class D audio power amplifier for driving a bridge tied speaker Advanced EMI Suppresion Technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements SpeakerGuard speaker protection system includes an adjustable power limiter and a DC detection circuit The adjustable power limiter allows the user to set a virtual voltage rail lower than the chi
4. 1 5 5 2 2 5 0 1 Po 10W E 1 I X 3 0 01 Po 1W ke 0 001 20 100 1k 10k 20k f Frequency Hz 9003 Figure 4 Copyright 2009 2012 Texas Instruments Incorporated THD Total Harmonic Distortion THD N Total Harmonic Distortion Noise 96 TOTAL HARMONIC DISTORTION vs FREQUENCY 10 Gain 20 dB Voc 24 V ZL 8Q 66 uH 0 1 0 01 Po 10W Po 5W 0 001 20 100 1k 10k 20k f Frequency Hz 9002 Figure 3 TOTAL HARMONIC DISTORTION NOISE vs OUTPUT POWER 10 Gain 20 dB 12 ZL 8Q 66 uH 0 1 0 01 0 001 0 01 0 1 1 10 20 Po Output Power W 9004 Figure 5 Submit Documentation Feedback 7 Product Folder Links TPA3111D1 TPA3111D1 SLOS618E AUGUST 2009 REVISED AUGUST 2012 TEXAS INSTRUMENTS www ti com TYPICAL CHARACTERISTICS continued All Measurements taken at 1 kHz unless otherwise noted Measurements were made using the TPA3110D2 EVM which is available at ti com TOTAL HARMONIC DISTORTION NOISE vs OUTPUT POWER 10 Gain 20 dB Voc 24 V 21 8 0 66 THD N Total Harmonic Distortion Noise 96 e 9005 0 01 f 10 kHz 0 001 0 01 0 1 1 10 20 Po Output Power W Figure 6 MAXIMUM OUTPUT POWER vs PLIMIT VOLTAGE 25 go o Oo amp 15 O E E 5 10 1 k 5 0 0 0 0 5 1 0 1 5 2 0 2 5 3 0 VPLIMIT PLIMIT Voltage V
5. Note Dashed line represents thermally limited region Figure 8 8 Submit Documentation Feedback G007 THD N Total Harmonic Distortion Noise 96 Po Output Power W TOTAL HARMONIC DISTORTION NOISE vs OUTPUT POWER 10 Gain 20 dB 12 21 2 4 Q 33 uH 0 1 0 01 f 10 kHz 0 001 0 01 0 1 1 10 20 Po Output Power W 9006 Figure 7 OUTPUT POWER vs PLIMIT VOLTAGE Gain 20 dB 12 21 2 4 Q 4 33 uH 0 0 0 5 1 0 1 5 2 0 VPLIMIT PLIMIT Voltage V G008 Note Dashed line represents thermally limited region Figure 9 Copyright 2009 2012 Texas Instruments Incorporated Product Folder Links TPA3111D1 TEXAS INSTRUMENTS TPA3111D1 www ti com SLOS618E AUGUST 2009 REVISED AUGUST 2012 TYPICAL CHARACTERISTICS continued All Measurements taken at 1 kHz unless otherwise noted Measurements were made using the TPA3110D2 EVM which is available at ti com GAIN PHASE EFFICIENCY vs vs FREQUENCY OUTPUT POWER 40 100 100 Voc 12 V 35 50 90 Phase 80 30 0 Voc 24 V 70 25 50 ps 60 bs Gain 3 o 4 c o o cog 15 150 40 e uF c Gain 20 dB 30 10
6. CU NIPDAU Level 3 260C 168 HR 40 to 85 TPA3111D1 Samples 1 amp no Sb Br amples TPA3111D1PWPR ACTIVE HTSSOP PWP 28 2000 Green RoHS CU NIPDAU Level 3 260C 168 HR 40 to 85 TPA3111D1 Samples amp no Sb Br amples The marketing status values are defined as follows ACTIVE Product device recommended for new designs LIFEBUY TI has announced that the device will be discontinued and a lifetime buy period is in effect NRND Not recommended for new designs Device is in production to support existing customers but TI does not recommend using this part in a new design PREVIEW Device has been announced but is not in production Samples may or may not be available OBSOLETE TI has discontinued the production of the device 2 Eco Plan The planned eco friendly classification Pb Free ROHS Pb Free RoHS Exempt or Green RoHS amp no Sb Br please check http www ti com productcontent for the latest availability information and additional product content details TBD The Pb Free Green conversion plan has not been defined Pb Free RoHS TI s terms Lead Free or Pb Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances including the requirement that lead not exceed 0 1 by weight in homogeneous materials Where designed to be soldered at high temperatures TI Pb Free products are suitable for use in specified lead free processes Pb Free RoHS Exempt This component
7. Filter Audio Precision AUX 0025 E Voc 12 V 20 5 Vi 20 1 Vrms 250 ZL 8 Q 66 pH 10 Gain 20 dB 0 300 ZL 8 Q 66 uH 10 100 1k 10k 100k 0 f Frequency Hz 0 1 2 3 4 5 6 7 8 9 10 9009 Po Output Power W 9012 Figure 10 Figure 11 EFFICIENCY SUPPLY CURRENT vs vs OUTPUT POWER TOTAL OUTPUT POWER 100 90 80 70 lt 59 60 e S 5 50 i 40 9 30 S 20 Gain 20 dB 10 Voc 12V ZL 4Q 33 nH 0 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 Po Output Power W Poctot Total Output Power W Figure 12 Copyright 2009 2012 Texas Instruments Incorporated 9013 Figure 13 Submit Documentation Feedback Product Folder Links TPA3111D1 9014 9 TPA3111D1 ip TEXAS INSTRUMENTS SLOS618E AUGUST 2009 REVISED AUGUST 2012 TYPICAL CHARACTERISTICS continued All Measurements taken at 1 kHz unless otherwise noted Measurements were made using the TPA3110D2 EVM which is available at ti com www ti com SUPPLY CURRENT SUPPLY RIPPLE REJECTION RATIO vs vs TOTAL OUTPUT POWER FREQUENCY 0 Gain 20 dB m 12 9 20b 2 80 66 9 w 5 40 9 5 c ES 5 60 8 a 80 Q 2 7 100 120 0 1 2 3 4 5 6 7 8 9 10 20 100 1k 10k 20k Poctot Total
8. audio input Biased at 3V INP 12 Positive audio input Biased at NC 13 Not connected 14 Connect AVCC supply to this PVCC 15 P Power supply for H bridge PVCC pins are also connected internally PVCC 16 P Power supply for H bridge PVCC pins are also connected internally BSP 17 l Bootstrap I O for positive high side FET OUTP 18 O Class D H bridge positive output PGND 19 Power ground for the H bridges OUTP 20 O Class D H bridge positive output BSP 21 l Bootstrap I O for positive high side FET BSN 22 Bootstrap I O for negative high side FET OUTN 23 O Class D H bridge negative output PGND 24 Power ground for the H bridges OUTN 25 O Class D H bridge negative output BSN 26 Bootstrap I O for negative high side FET PVCC 27 P Power supply for H bridge PVCC pins are also connected internally PVCC 28 P Power supply for H bridge PVCC pins are also connected internally Copyright 2009 2012 Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links TPA3111D1 TPA3111D1 SLOS618E AUGUST 2009 REVISED AUGUST 2012 INP INN FAULT GAINO GAIN1 PLIMIT GVDD AGND TEXAS INSTRUMENTS FUNCTIONAL BLOCK DIAGRAM jen P 2 gt OUTP FB Gain Control OUTN FB AN TIE Buffer agis Control PLIMIT Reference AVDD LDO Regulator GVDD Ramp Generator Submit Documentation Feedback
9. be modeled simply as a resistor in series with an ideal capacitor The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor 18 Submit Documentation Feedback Copyright 2009 2012 Texas Instruments Incorporated Product Folder Links TPA3111D1 T ONNE TPA3111D1 www ti com SLOS618E AUGUST 2009 REVISED AUGUST 2012 PRINTED CIRCUIT BOARD PCB LAYOUT The TPA3111D1 can be used with a small inexpensive ferrite bead output filter for most applications However since the Class D switching edges are very fast it is necessary to take care when planning the layout of the printed circuit board The following suggestions will help to meet EMC requirements Decoupling capacitors The high frequency decoupling capacitors should be placed as close to the PVCC and AVCC terminals as possible Large 220 uF or greater bulk power supply decoupling capacitors should be placed near the TPA3111D1 on the PVCC supplies Local high frequency bypass capacitors should be placed as close to the PVCC pins as possible These caps can be connected to the thermal pad directly for an excellent ground connection Consider adding a small good quality low ESR ceramic capacitor between 220 pF and 1000 pF and a larger mid freqency cap of value between 0 1 uF and 1 UF also of good quality to the PVCC connections at eac
10. customers to design and create their own end product solutions that meet applicable functional safety standards and requirements Nonetheless such components are subject to these terms No TI components are authorized for use in FDA Class III or similar life critical medical equipment unless authorized officers of the parties have executed a special agreement specifically governing such use Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in military aerospace applications or environments Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer s risk and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use TI has specifically designated certain components as meeting ISO TS16949 requirements mainly for automotive use In any case of use of non designated products TI will not be responsible for any failure to meet ISO TS16949 Products Applications Audio www ti com audio Automotive and Transportation www ti com automotive Amplifiers amplifier ti com Communications and Telecom www ti com communications Data Converters DLP Products DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID OMAP Applications Processors Wireless Connectivity dataconverter ti com www dlp c
11. has a RoHS exemption for either 1 lead based flip chip solder bumps used between the die and package or 2 lead based die adhesive used between the die and leadframe The component is otherwise considered Pb Free RoHS compatible as defined above Green RoHS amp no Sb Br TI defines Green to mean Pb Free RoHS compatible and free of Bromine Br and Antimony Sb based flame retardants Br or Sb do not exceed 0 196 by weight in homogeneous material 9 MSL Peak Temp The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications and peak solder temperature 9 There may be additional marking which relates to the logo the lot trace code information or the environmental category on the device e Multiple Device Markings will be inside parentheses Only one Device Marking contained in parentheses and separated by a will appear on a device If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device 9 eag Ball Finish Orderable Devices may have multiple material finish options Finish options are separated by a vertical ruled line Lead Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width Important Information and Disclaimer The information provided on this page represents TI s knowledge and belief as of the date that it is provided bases its knowledge and belief on informatio
12. noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Class D output offset voltage measured iru Vos differentially Vi 0 V Gain 36 dB 1 5 15 mV loc Quiescent supply current SD 2 V no load PVcc 12V 20 mA Icc sp Quiescent supply current in shutdown mode SD 0 8 V no load PVcc 12V 200 lo 500 mA High Side 240 r Drain source on state resistance aan Ty 25 Low side 240 GAINO 0 8 V 19 20 21 GAIN1 0 8 V dB GAINO 2 V 25 26 27 G Gain GAINO 0 8 V 31 32 33 GAIN1 2 V dB GAINO 2 V 35 36 37 ton Turn on time SD 2V 10 ms lorr Turn off time 50 0 8 V 2 us GVDD Gate Drive Supply lavpp 2mA 6 5 6 9 7 3 V PLIMIT Output Voltage maximum under PLIMIT 2 0 V Vj 6 0V differential 6 75 7 90 8 75 V control Copyright 2009 2012 Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links TPA3111D1 TPA3111D1 SLOS618E AUGUST 2009 REVISED AUGUST 2012 AC CHARACTERISTICS 25 Voc 24 V 8 Q unless otherwise noted TEXAS INSTRUMENTS www ti com Product Folder Links TPA3111D1 PARAMETER TEST CONDITIONS MIN MAX UNIT o aii 200 mVpp ripple from 20 2 1 kHz E Ksvr Power Supply ripple rejection Gain 20 dB Inputs ac coupled to AGND
13. 2009 REVISED AUGUST 2012 SD OPERATION TPA3111D1 employs a shutdown mode of operation designed to reduce supply current lcc to the absolute minimum level during periods of nonuse for power conservation The SD input terminal should be held high see specification table for trip point during normal operation when the amplifier is in use Pulling SD low causes the outputs to mute and the amplifier to enter a low current state Never leave SD unconnected because amplifier operation would be unpredictable For the best power off pop performance place the amplifier in the shutdown mode prior to removing the power supply voltage PLIMIT The voltage at pin 10 can used to limit the power to levels below that which is possible based on the supply rail Add a resistor divider from GVDD to ground to set the voltage at the PLIMIT pin An external reference may also be used if tighter tolerance is required Also add a 1uF capacitor from pin 10 to ground The PLIMIT circuit sets a limit on the output peak to peak voltage This limit can be thought of as a virtual voltage rail which is lower than the supply connected to PVCC This virtual rail is 4 times the voltage at the PLIMIT pin This output voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance File Edit Vertical Trig Display Cursors Measure m m Mask Math MyScope Anal
14. CC BSN AGND BSP GVDD OUTP PLIMIT PGND INN OUTP INP C BSP NC PVCC AVCC PVCC 4 Submit Documentation Feedback Copyright 2009 2012 Texas Instruments Incorporated T UMENT TPA3111D1 www ti com SLOS618bE AUGUST 2009 REVISED AUGUST 2012 PIN FUNCTIONS NAME INN Pin yo DESCRIPTION SD 1 Shutdown logic input for audio amp LOW outputs Hi Z HIGH outputs enabled TTL logic levels with compliance to AVCC Open drain output used to display short circuit or dc detect fault status Voltage FAULT 2 compliant to Short circuit faults can be set to auto recovery by connecting FAULT pin to SD pin Otherwise bothe short circuit faults and dc detect faults must be reset by cycling PVCC GND 3 Connect to local ground GND 4 Connect to local ground GAINO 5 l Gain select least significant bit TTL logic levels with compliance to AVCC GAIN1 6 l Gain select most significant bit TTL logic levels with compliance to AVCC AVCC 7 P Analog supply AGND 8 Analog supply ground Connect to the thermal pad GVDD 9 High side FET gate drive supply Nominal voltage is 7V May also be used as supply for PLILMIT divider Add a 1yuF cap to ground at this pin PLIMIT 10 Power limit level adjust Connect directly to GVDD pin for no power limiting Add a 1uF cap to ground at this pin INN 11 Negative
15. Output Power W PM f Frequency Hz core Figure 14 Figure 15 DEVICE INFORMATION Gain setting via GAINO and GAIN1 inputs The gain of the TPA3111D1 is set by two input terminals GAINO and GAIN1 The voltage slew rate of these gain terminals along with terminals 1 and 14 must be restricted to no more than 10V ms For higher slew rates use a 100kQ resistor in series with the terminals The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier This causes the input impedance Z to be dependent on the gain setting The actual gain settings are controlled by ratios of resistors so the gain variation from part to part is small However the input impedance from part to part at the same gain may shift by 20 due to shifts in the actual resistance of the input resistors For design purposes the input network discussed in the next section should be designed assuming an input impedance of 7 2 kQ which is the absolute minimum input impedance of the TPA3111D1 At the lower gain settings the input impedance could increase as high as 72 kO Table 1 Gain Setting 10 AMPLIFIER GAIN dB IMPEDANCE GAIN1 GAINO kQ TYP TYP 0 0 20 60 0 1 26 30 1 0 32 15 1 1 36 9 Submit Documentation Feedback Copyright 2009 2012 Texas Instruments Incorporated Product Folder Links TPA3111D1 T ONNE TPA3111D1 www ti com SLOS618E AUGUST
16. Pitch between successive cavity centers 4 W1 TAPE AND REEL INFORMATION All dimensions are nominal Device Package SPQ Reel Reel AO BO KO P1 Ww Pint Drawing Diameter Width mm mm mm mm mm Quadrant mm W1 mm TPA3111D1PWPR HTSSOP PWP 28 2000 330 0 16 4 6 9 10 2 1 8 12 0 16 0 Q1 Pack Materials Page 1 ip TEXAS PACKAGE MATERIALS INFORMATION INSTRUMENTS www ti com 23 Jul 2012 TAPE AND REEL BOX DIMENSIONS All dimensions are nominal Device Package Type Drawing Pins SPQ Length mm Width mm Height mm TPA3111D1PWPR HTSSOP PWP 28 2000 367 0 367 0 38 0 Pack Materials Page 2 MECHANICAL DATA P WP PDSO G28 PowerPAD PLASTIC SMALL OUTLINE Seating Plane Seating Plane Y LT i 27 nup e NOTES All linear dimensions are in millimeters This drawing is subject to change without notice Body dimensions do not include mold flash or protrusions Mold flash and protrusion shall not exceed 0 15 per side This pack
17. There is a 15 C tolerance on this trip point from device to device Once the die temperature exceeds the thermal set point the device enters into the shutdown state and the outputs are disabled This is not a latched fault The thermal fault is cleared once the temperature of the die is reduced by 15 C The device begins normal operation at this point with no external system interaction Thermal protection faults are NOT reported on the FAULT terminal APPLICATION INFORMATION Control System 1 100 resistor is needed if the PVCC slew rate is more than 10 V ms Figure 17 Mono Class D Amplifier with BTL Output Copyright 2009 2012 Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links TPA3111D1 TPA3111D1 NE SLOS618E AUGUST 2009 REVISED AUGUST 2012 www ti com CLASS D OPERATION This section focuses on the class D operation of the TPA3111D1 TPA3111D1 Modulation Scheme The TPA3111D1 uses a modulation scheme that allows operation without the classic LC reconstruction filter when the amp is driving an inductive load Each output is switching from 0 volts to the supply voltage The OUTP and OUTN are in phase with each other with no input so that there is little or no current in the speaker The duty cycle of OUTP is greater than 50 and OUTN is less than 50 for positive output voltages The duty cycle of OUTP is less than 50 and OUTN is greater than 50 for negative output voltages The v
18. age is designed to be soldered to a thermal pad on the board Refer to Technical Brief PowerPad Thermally Enhanced Package Texas Instruments Literature No SLMAOO02 for information regarding recommended board layout This document is available at www t com http www ti com gt See the additional figure in the Product Data Sheet for details regarding the exposed thermal pad features and dimensions Falls within MO 153 PowerPAD is a trademark of Texas Instruments 3 TEXAS INSTRUMENTS www ti com THERMAL PAD MECHANICAL DATA PWP R PDSO G28 PowerPAD SMALL PLASTIC OUTLINE THERMAL INFORMATION This PowerPAD package incorporates an exposed thermal pad that is designed to be attached to a printed circuit board PCB The thermal pad must be soldered directly to the PCB After soldering the PCB can be used as a heatsink In addition through the use of thermal vias the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device or alternatively can be attached to a special heatsink structure designed into the PCB This design optimizes the heat transfer from the integrated circuit IC For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities refer to Technical Brief PowerPAD Thermally Enhanced Package Texas Instruments Literature SLMAOO2 and Application Brief PowerPAD Made Easy Texas Instrument
19. al pad on the board Refer to Technical Brief PowerPad Thermally Enhanced Package Texas Instruments Literature No SLMAO02 SLMAO04 and also the Product Data Sheets E For specific thermal information via requirements and recommended board layout These documents are available at www ti com http www ti com Publication 7351 is recommended for alternate designs Laser cutting apertures with trapezoidal walls and also rounding corners will offer better paste release Customers should contact their board assembly site for stencil design recommendations Example stencil design based on a 50 volumetric metal load solder paste Refer to 7525 for other stencil F Customers should contact their board fabrication site for solder mask tolerances between and around signal pads Ki Texas INSTRUMENTS www ti com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries reserve the right to make corrections enhancements improvements and other changes to its semiconductor products and services per JESD46 latest issue and to discontinue any product or service per JESD48 latest issue Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All semiconductor products also referred to herein as components are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants perfor
20. as an LC filter is almost purely reactive The TPA3111D1 modulation scheme has little loss in the load without a filter because the pulses are short and the change in voltage is Vcc instead of 2 x Voc As the output power increases the pulses widen making the ripple current larger Ripple current could be filtered with an LC filter for increased efficiency but for most applications the filter is not needed An LC filter with a cutoff frequency less than the class D switching frequency allows the switching current to flow through the filter instead of the load The filter has less resistance but higher impedance at the switching frequency than the speaker which results in less power dissipation therefore increasing efficiency Copyright 2009 2012 Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links TPA3111D1 TPA3111D1 TRI SLOS618E AUGUST 2009 REVISED AUGUST 2012 www ti com When to Use an Output Filter for EMI Suppression The TPA3111D1 has been tested with a simple ferrite bead filter for a variety of applications including long speaker wires up to 125 cm and high power The TPA3111D1 EVM passes FCC Class B specifications under these conditions using twisted speaker wires The size and type of ferrite bead can be selected to meet applicaton requirements Also the filter capacitor can be increased if necessary with some impact on efficiency There may be a few circuit instances where it is ne
21. cessary to add a complete LC reconstruction filter These circumstances might occur if there are nearby circuits which are very sensitive to noise In these cases a classic second order Butterworth filter similar to those shown in the figures below can be used 33 uH OUTP X Y YN 11 2n C2 11 33 uH c3 L2 Z 1 uF Figure 19 Typical LC Output Filter Cutoff Frequency of 27 kHz Speaker Impedance 8 Q 15 uH OUTP 22004 L1 jc 15 uH OUTN e L2 C3 0 0 Figure 20 Typical LC Output Filter Cutoff Frequency of 27 kHz Speaker Impedance 4 Ferrite Chip Bead D 4nF 1 Ferrite Chip Bead Figure 21 Typical Ferrite Chip Bead Filter Chip Bead Example Steward HI0805R800R 10 16 Submit Documentation Feedback Copyright 2009 2012 Texas Instruments Incorporated Product Folder Links TPA3111D1 T ONNE TPA3111D1 www ti com SLOS618E AUGUST 2009 REVISED AUGUST 2012 INPUT RESISTANCE Changing the gain setting can vary the input resistance of the amplifier from its smallest value 9 20 to the largest value 60 20 As a result if a single capacitor is used in the input high pass filter the 3 dB or cutoff frequency may change when changing gain steps Input i IN Signal g The 3 dB frequency be calculated using Equation 2 Use the Z values given in Table 1 f 2n Z Cj 2 INPUT CAPACITOR C In
22. duction is without alteration and is accompanied by all associated warranties conditions limitations and notices TI is not responsible or liable for such altered documentation Information of third parties may be subject to additional restrictions Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice Tl is not responsible or liable for any such statements Buyer acknowledges and agrees that it is solely responsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures monitor failures and their consequences lessen the likelihood of failures that might cause harm and take appropriate remedial actions Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety critical applications In some cases components may be promoted specifically to facilitate safety related applications With such components TI s goal is to help enable
23. h end of the chip Keep the current loop from each of the outputs through the ferrite bead and the small filter cap and back to PGND as small and tight as possible The size of this current loop determines its effectiveness as an antenna e Output filter The ferrite EMI filter Figure 21 should be placed as close to the output terminals as possible for the best EMI performance The LC filter Figure 19 and Figure 20 should be placed close to the outputs The capacitors used in both the ferrite and LC filters should be grounded to power ground Thermal Pad The thermal pad must be soldered to the PCB for proper thermal performance and optimal reliability The dimensions of the thermal pad and thermal land should be 6 46 mm by 2 35 mm Seven rows of solid vias three vias per row 0 33 mm or 13 mils diameter should be equally spaced underneath the thermal land The vias should connect to a solid copper plane either on an internal layer or on the bottom layer of the PCB The vias must be solid vias not thermal relief or webbed vias See TI Application Report SLMAOO2 for more information about using the TSSOP thermal pad For recommended PCB footprints see mechanical pages appended to the end of this data sheet For an example layout see the TPA3111D1 Evaluation Module TPA3111D1EVM User Manual Both the EVM user manual and the thermal pad application note are available on the TI Web site at http www ti com REVISION HISTORY
24. he supply rail Vp 4 x PLIMIT voltage if PLIMIT lt 4 x Vp Pour 1096 THD 1 25 x Poyt unclipped Table 2 PLIMIT Typical Operation Test Conditions PLIMIT Voltage Output Power W paket hes PVCC 24V Vin 1Vrms RL 40 Gain 20dB 1 92 10 15 0 PVCC 24V Vin 1Vrms RL 40 Gain 20dB Tes 10 0 PVCC 12V Vin 1Vrms RL 40 Gain 20dB 1 09 10 13 3 PVCC 12V Vin 1Vrms RL 40 Gain 20dB Td 9 198 GVDD Supply The GVDD Supply is used to power the gates of the output full bridge transistors It can also used to supply the PLIMIT voltage divider circuit Add a 1uF capacitor to ground at this pin DC Detect TPA3111D1 has circuitry which will protect the speakers from DC current which might occur due to defective capacitors on the input or shorts on the printed circuit board at the inputs A DC detect fault will be reported on the FAULT pin as a low state The DC Detect fault will also cause the amplifier to shutdown by changing the state of the outputs to Hi Z To clear the DC Detect it is necessary to cycle the PVCC supply Cycling SD will NOT clear a DC detect fault A DC Detect Fault is issued when the output differential duty cycle exceeds 14 eg 57 43 for more than 420 ms at the same polarity This feature protects the speaker from large DC currents or AC currents less than 2 Hz To avoid nuisance faults due to the DC detect circuit hold the SD pin low at power up until the signals at the input
25. hermal pad on the underside of the chip This acts as a heatsink and it must be connected to a thermally dissipating plane for proper power dissipation Failure to do so may result in the device going into thermal protection shutdown See TI Technical Briefs SCBA017D and SLUA271 for more information about using the QFN thermal pad See TI Technical Briefs SLMAO02 for more information about using the HTQFP thermal pad In accordance with JEDEC Standard 22 Test Method A114 B 5 In accordance with JEDEC Standard 22 Test Method C101 A THERMAL INFORMATION TPA3111D1 THERMAL METRIC 2 UNITS PWP 28 PINS Junction to ambient thermal resistance 30 3 OJctop Junction to case top thermal resistance 33 5 Junction to board thermal resistance 17 5 CW Wot Junction to top characterization parameter 0 9 Junction to board characterization parameter 7 2 Junction to case bottom thermal resistance 0 9 1 For more information about traditional and new thermal metrics see the C Package Thermal Metrics application report SPRA953 2 For thermal estimates of this device based PCB copper area see the TI PCB Thermal Calculator Submit Documentation Feedback Product Folder Links TPA3111D1 Copyright 2009 2012 Texas Instruments Incorporated TEXAS INSTRUMENTS www ti com RECOMMENDED OPERATING CONDITIONS over operating free air temperature range unless other
26. itching transients as well as digital hash on the line another good quality capacitor typically 0 1 uF to 1 uF placed as close as possible to the device PVCC leads works best For filtering lower frequency noise signals a larger aluminum electrolytic capacitor of 220 uF or greater placed near the audio power amplifier is recommended The 220 uF capacitor also serves as a local storage capacitor for supplying current during large signal transients on the amplifier outputs The PVCC terminals provide the power to the output transistors so a 220 pF or larger capacitor should be placed on each PVCC terminal A 10 uF capacitor on the AVCC terminal is adequate Also a small decoupling resistor between AVCC and PVCC can be used to keep high frequency class D noise from entering the linear input amplifiers BSN and BSP CAPACITORS The full H bridge output stage uses only NMOS transistors Therefore they require bootstrap capacitors for the high side of each output to turn on correctly A 470 nF ceramic capacitor rated for at least 16 V must be connected from each output to its corresponding bootstrap input Specifically one 470 nF capacitor must be connected from OUTP to BSP and one 470 nF capacitor must be connected from OUTN to BSN See the application circuit diagram in Figure 1 The bootstrap capacitors connected between the BSx pins and corresponding output function as a floating power supply for the high side N channel power MOSFET gate drive circu
27. itry During each high side switching cycle the bootstrap capacitors hold the gate to source voltage high enough to keep the high side MOSFETs turned on DIFFERENTIAL INPUTS The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel To use the TPA3111D1 with a differential source connect the positive lead of the audio source to the INP input and the negative lead from the audio source to the INN input To use the TPA3111D1 with a single ended source ac ground the INP or INN input through a capacitor equal in value to the input capacitor on INN or INP and apply the audio source to either input In a single ended input application the unused input should be ac grounded at the audio source instead of at the device input for best noise performance For good transient performance the impedance seen at each of the two differential inputs should be the same The impedance seen at the inputs should be limited to an RC time constant of 1 ms or less if possible This is to allow the input dc blocking capacitors to become completely charged during the 14 msec power up time If the input capacitors are not allowed to completely charge there will be some additional sensitivity to component matching which can result in pop if the input components are not well matched USING LOW ESR CAPACITORS Low ESR capacitors are recommended throughout this application section A real as opposed to ideal capacitor can
28. low as 30 MHz It is important to use the ferrite bead filter to block radiation in the 30 MHz and above range from appearing on the speaker wires and the power supply lines which are good antennas for these signals The impedance of the ferrite bead can be used along with a small capacitor with a value in the range of 1000 pF to reduce the frequency spectrum of the signal to an acceptable level For best performance the resonant frequency of the ferrite bead capacitor filter should be less than 10 MHz Also it is important that the ferrite bead is large enough to maintain its impedance at the peak currents expected for the amplifier Some ferrite bead manufacturers specify the bead impedance at a variety of current levels In this case it is possible to make sure the ferrite bead maintains an adequate amount of impedance at the peak current the amplifier will see If these specifications are not available it is also possible to estimate the bead current handling capability by measuring the resonant frequency of the filter output at very low power and at maximum power A change of resonant frequency of less than fifty percent under this condition is desirable Examples of ferrite beads which have been tested and work well with the TPA3110D2 include 28L0138 80R 10 and HI1812V101R 10 from Steward and the 742792510 from Wurth Electronics A high quality ceramic capacitor is also needed for the ferrite bead filter A low ESR capacitor with good temperature a
29. m pa Po Continuous output power THD N lt 0 1 f 1 KHz Voc 24 V 10 THD N Total harmonic distortion noise Voc 24 V f 1 kHz Po 5 W half power lt 0 05 96 65 V Vn Output integrated noise 20 Hz to 22 kHz A weighted filter Gain 20 dB 80 EV Crosstalk Vo 1 Vrms Gain 20 dB f 1 kHz 70 Maximum output at THD N 1 f 1 kHz SNR Signal to noise ratio Gain 20 dB A weighted 102 dB fosc Oscillator frequency 250 310 350 kHz Thermal trip point 150 C Thermal hysteresis 15 C AC CHARACTERISTICS Ta 25 C 12 V R 8 unless otherwise noted PARAMETER TEST CONDITIONS MIN MAX UNIT oT 200 MVpp ripple from 20 2 1 kHz E Ksvn Supply ripple rejection Gain 20 dB Inputs ac coupled to AGND m dB Po Continuous output power THD N lt 10 f 1 kHz 80 10 Continuous output power THD N lt 0 1 f 1 kHz Rp 40 10 THD N Total harmonic distortion noise R 8 O f 1 kHz Po 5 W half power lt 0 06 65 V Vn Output integrated noise 20 Hz to 22 kHz A weighted filter Gain 20 dB 80 m Crosstalk P 1 W Gain 20 dB f 1 kHz 70 dB Maximum output at THD N lt 196 f 1 kHz SNR Signal to noise ratio Gain 20 dB A weighted 102 dB fosc Oscillator frequency 250 310 350 kHz Thermal trip point 150 C Thermal hysteresis 15 C PWP TSSOP Package Top View SD PVCC FAULT PVCC GND BSN GND OUTN GAINO PGND GAIN1 OUTN AV
30. mance of its components to the specifications applicable at the time of sale in accordance with the warranty Tl s terms and conditions of sale of semiconductor products Testing and other quality control techniques are used to the extent deems necessary to support this warranty Except where mandated by applicable law testing of all parameters of each component is not necessarily performed TI assumes no liability for applications assistance or the design of Buyers products Buyers are responsible for their products and applications using Tl components To minimize the risks associated with Buyers products and applications Buyers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI components or services are used Information published by TI regarding third party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if repro
31. n provided by third parties and makes no representation or warranty as to the accuracy of such information Efforts are underway to better integrate information from third parties has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals TI and TI suppliers consider certain information to be proprietary and thus CAS numbers and other limited information may not be available for release Addendum Page 1 H PACKAGE OPTION ADDENDUM TEXAS INSTRUMENTS www ti com 9 Sep 2014 In no event shall TI s liability arising out of such information exceed the total purchase price of the TI part s at issue in this document sold by TI to Customer on an annual basis OTHER QUALIFIED VERSIONS OF 11101 e Automotive TPA3111D1 Q1 NOTE Qualified Version Definitions e Automotive Q100 devices qualified for high reliability automotive applications targeting zero defects Addendum Page 2 ip TEXAS PACKAGE MATERIALS INFORMATION INSTRUMENTS www ti com 23 Jul 2012 TAPE AND REEL INFORMATION REEL DIMENSIONS TAPE DIMENSIONS Dimension designed to accommodate the component width Bo Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Y Overall width of the carrier tape
32. nd voltage characteristics will work best Additional EMC improvements may be obtained by adding snubber networks from each of the class D outputs to ground Suggested values for a simple RC series snubber network would be 10 ohms in series with a 330 pF capacitor although design of the snubber network is specific to every application and must be designed taking into account the parasitic reactance of the printed circuit board as well as the audio amp Take care to evaluate the stress on the component in the snubber network especially if the amp is running at high PVCC Also make sure the layout of the snubber network is tight and returns directly to the PGND or the PowerPad beneath the chip Efficiency LC Filter Required With the Traditional Class D Modulation Scheme The main reason that the traditional class D amplifier needs an output filter is that the switching waveform results in maximum current flow This causes more loss in the load which causes lower efficiency The ripple current is large for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by the time at that voltage The differential voltage swing is 2 x Vcc and the time at each voltage is half the period for the traditional modulation scheme An ideal LC filter is needed to store the ripple current from each half cycle for the next half cycle while any resistance causes power dissipation The speaker is both resistive and reactive where
33. ng free air temperature range unless otherwise noted TEXAS INSTRUMENTS www ti com These devices have limited built in ESD protection The leads should be shorted together or the device placed in conductive foam UNIT Voc Supply voltage AVCC PVCC 0 3 V to 30 V 1 0 3 V to Vcc 0 3 V SD FAULT GAINO GAIN1 AVCC Pin 14 10 V ms Vi Interface pin voltage PLIMIT 0 3 V toGVDD 0 3 V INN INP 0 3 V to 6 3 V Continuous total power dissipation See Thermal Inforamtion Table TA Operating free air temperature range 40 C to 85 C Tj Operating junction temperature range 9 40 C to 150 C Tstg Storage temperature range 65 C to 150 C RL Minimum Load Resistance BTL 3 2 mu Human body model all pins 2 kV Electrostatic discharge f Charged device model all pins 500 V 1 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device These are stress ratings only and functional operations of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reliability 2 The voltage slew rate of these pins must be restricted to no more than 10 V ms For higher slew rates use a 100 kQ resister in series with the pins 3 The TPA3111D1 incorporates an exposed t
34. oltage across the load sits at 0 V throughout most of the switching period greatly reducing the switching current which reduces any I R losses in the load Differential 42V Output 0 V Voltage ov Across Load 2 OUTN Output 0 V Differential 12 V Voltage ov Across Load Current inp cicer 7 an a Figure 18 The TPA3111D1 Output Voltage and Current Waveforms Into an Inductive Load 14 Submit Documentation Feedback Copyright 2009 2012 Texas Instruments Incorporated Product Folder Links TPA3111D1 T UMENT TPA3111D1 www ti com SLOS618E AUGUST 2009 REVISED AUGUST 2012 Ferrite Bead Filter Considerations Using the Advanced Emissions Suppression Technology in the TPA3111D1 amplifier it is possible to design a high efficiency Class D audio amplifier while minimizing interference to surrounding circuits it is also possible to accomplishthis with only a low cost ferrite bead filter In this case it is necessary to carefully select the ferrite bead used in the filter One important aspect of the ferrite bead selection is the type of material used in the ferrite bead Not all ferrite material is alike so it is important to select a material that is effective in the 10 to 100 MHz range which is key to the operation of the Class D amplifier Many of the specifications regulating consumer electronics have emissions limits as
35. om www ti com clocks interface ti com logic ti com microcontroller ti com www ti rfid com www ti com omap Computers and Peripherals Consumer Electronics Energy and Lighting Industrial Medical Security Space Avionics and Defense Video and Imaging TI E2E Community www ti com wirelessconnectivity www ti com computers www ti com consumer apps www ti com energy www ti com industrial www ti com medical www ti com security www ti com space avionics defense www ti com video Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2014 Texas Instruments Incorporated
36. p supply to limit the amount of current through the speaker The DC detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs The TPA3111D1 can drive a mono speaker as low as 4O The high efficiency of the TPA3111D1 gt 90 eliminates the need for an external heat sink when playing music The outputs are fully protected against shorts to GND Vcc and output to output The short circuit protection and thermal protection includes an auto recovery feature OUTP OUTN FERRITE BEAD FILTER 10W 80 8 to 26V lt Figure 1 Simplified Application Diagram Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet SpeakerGuard is a trademark of Texas Instruments PRODUCTION DATA information is current as of publication date Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters Copyright 2009 2012 Texas Instruments Incorporated TPA3111D1 SLOS618E AUGUST 2009 REVISED AUGUST 2012 during storage or handling to prevent electrostatic damage to the MOS gates ABSOLUTE MAXIMUM RATINGS over operati
37. s Literature No SLMAOO4 Both documents are available at www ti com The exposed thermal pad dimensions for this package are shown in the following illustration 6 17 5 27 View Exposed Thermal Pad Dimensions 4206332 33 Al 09 14 NOTE A All linear dimensions are in millimeters AA Exposed tie strap features may not be present PowerPAD is a trademark of Texas Instruments Ki Texas INSTRUMENTS www ti com R PDSO G28 Example Board Layout Via pattern and copper pad size may vary depending on layout constraints Increasing copper area will LAND PATTERN DATA PowerPAD PLASTIC SMALL OUTLINE Stencil Openings Based on a stencil thickness of 127mm 005inch Reference table below for other solder stencil thicknesses enhance thermal performance 18x1 30 26x0 65 21 00 30 Solder Mask Over Copper Example Non Soldermask Defined Pad Example See Note D 28x0 25 1 55 26x0 65 4 Example Solder Mask Defined Pad See Note C D Center Power Pad Solder Stencil Opening golder Mask Opening pi Mask 66 25 z Geometry 4207609 19 T 08 13 NOTES A All linear dimensions are in millimeters B This drawing is subject to change without notice C Customers should place a note on the circuit board fabrication drawing not to alter the center solder mask defined pad D This package is designed to be soldered to a therm
38. s are stable Also take care to match the impedance seen at the positive and negative input to avoid nuisance DC detect faults The minimum differential input voltages required to trigger the DC detect are shown in Table Table 3 The inputs must remain at or above the voltage listed in the table for more than 420 ms to trigger the DC detect Table 3 DC Detect Threshold AV dB Vin mV differential 20 112 26 56 32 28 36 17 12 Submit Documentation Feedback Copyright 2009 2012 Texas Instruments Incorporated Product Folder Links TPA3111D1 T ONNE TPA3111D1 www ti com SLOS618E AUGUST 2009 REVISED AUGUST 2012 SHORT CIRCUIT PROTECTION AND AUTOMATIC RECOVERY FEATURE TPA3110D2 has protection from over current conditions caused by a short circuit on the output stage The short circuit protection fault is reported on the FAULT pin as a low state The amplifier outputs are switched to a Hi Z state when the short circuit protection latch is engaged The latch can be cleared by cycling the SD pin through the low state If automatic recovery from the short circuit protection latch is desired connect the FAULT pin directly to the SD pin This will allow the FAULT pin function to automatically drive the SD pin low which will clear the short circuit protection latch THERMAL PROTECTION Thermal protection on the TPA3111D1 prevents damage to the device when the internal die temperature exceeds 150 C
39. the typical application an input capacitor Cj is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation In this case C and the input impedance of the amplifier Z form high pass filter with the corner frequency determined in Equation 3 3 dB fc 3 The value of C is important as it directly affects the bass low frequency performance of the circuit Consider the example where 4 is 60 and the specification calls for a flat bass response down to 20 Hz Equation 3 is reconfigured as Equation 4 1 2nZf 4 In this example C is 0 13 uF so one would likely choose a value of 0 15 pF as this value is commonly used If the gain is known and is constant use 4 from Table 1 to calculate A further consideration for this capacitor is the leakage path from the input source through the input network Cj and the feedback network to the load This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom especially in high gain applications For this reason a low leakage tantalum or ceramic capacitor is the best choice If a ceramic capacitor is used use a high quality capacitor with good temperature and voltage coefficient An X7R type works well and if possible use a higher voltage rating than required This will give a better C vs voltage characteristic When polarized capacitors are used the positive side of the capaci
40. tor should face the amplifier input in most applications as the dc level there is held at 3 V which is likely higher than the source dc level Note that it is important to confirm the capacitor polarity in the application Additionally lead free solder can create dc offset voltages and it is important to ensure that boards are cleaned properly Copyright 2009 2012 Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links TPA3111D1 TPA3111D1 P ISP UMEN SLOS618E AUGUST 2009 REVISED AUGUST 2012 www ti com POWER SUPPLY DECOUPLING The TPA3111D1 is a high performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion THD is as low as possible Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker Optimum decoupling is achieved by using a network of capacitors of different types that target specific types of noise on the power supply leads For higher frequency transients due to parasitic circuit elements such as bond wire and copper trace inductances as well as lead frame capacitance a good quality low equivalent series resistance ESR ceramic capacitor of value between 220 pF and 1000 pF works well This capacitor should be placed as close to the device PVCC pins and system ground either PGND pins or PowerPad as possible For mid frequency noise due to filter resonances or PWM sw
41. wise noted TPA3111D1 SLOS618E AUGUST 2009 REVISED AUGUST 2012 PARAMETER TEST CONDITIONS MIN MAX UNIT Voc Supply voltage PVCC AVCC 8 26 V Vin High level input voltage SD GAINO GAIN1 2 V Vit Low level input voltage SD GAINO GAIN1 0 8 V VoL Low level output voltage FAULT Rpy_tup 100kO 26 0 8 V High level input current SD GAINO GAIN1 V 2 Voc 18 V 50 pA lit Low level input current SD GAINO GAIN1 V 0 8V Voc 18 V 5 UA TA Operating free air temperature 40 85 C DC CHARACTERISTICS 25 C Voc 24 V 8 Q unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Class D output offset voltage measured a 51 differentially V 0 V Gain 36 dB 15 15 mV loc Quiescent supply current SD 2 V no load PVcc 21V 40 mA Icc sp Quiescent supply current in shutdown mode SD 0 8 V no load PVcc 21V 400 7 lo 500 High Side 240 r Drain source on state resistance mQ PSION Ty 25 C Low side 240 GAINO 0 8 V 19 20 21 GAIN1 0 8 V dB GAINO 2 V 25 26 27 G Gain GAINO 0 8 V 31 32 33 GAIN1 2V dB GAINO 2 V 35 36 37 ton Turn on time SD 2V 10 ms lorr Turn off time SD 0 8 V 2 us GVDD Gate Drive Supply lavpp 2MA 6 5 6 9 7 3 V DC CHARACTERISTICS 25 C Vec 12 V 8 Q unless otherwise
42. yze Utilities Help x TPA3111D1 PLIMIT OPERATION PYCC 12V RL 4ohms Vin 0 67Vrms PLIMIT 6 95V GVDD PO 10W v3 PLIMIT 116 V PO 4W L PUMIT 0 77V PO 2W 1 0 8 20 0M m 40V 200 N 180mv J 200us 20 0MS s 50 0ns pt 1 8 500 d Run Hi Res w1 40V 200 m 40V 200us 9 431 431 acgs RL 40 0k Cm 40V 200ys Auto July 06 2009 11 29 55 C Ampi 18 08 Ampi 239mV 1481v eum B Ampl 12 24 9 454 Figure 16 PLIMIT Circuit Operation The PLIMIT circuits sets a limit on the output peak to peak voltage The limiting is done by limiting the duty cycle to fixed maximum value This limit can be thought of as a virtual voltage rail which is lower than the supply connected to PVCC This virtual rail is 4 times the voltage at the PLIMIT pin This output voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance Copyright 2009 2012 Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links TPA3111D1 TPA3111D1 P I UMEN SLOS618E AUGUST 2009 REVISED AUGUST 2012 www ti com 2 t x Vp RL 2x Rs Pout for unclipped power 2xR 1 Where Rg is the total series resistance including Rosin and any resistance in the output filter is the load resistance Vp is the peak amplitude of the output possible within t
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