Products and Licensing
Contents
1. IP royalty based licensing 3 2 Flexibilis Redundancy Supervision Flexibilis Redundancy Supervision protocol stack 6 implements HSR PRP Supervision protocol as specified in IEC 62439 3 2011 7 3 2 1 Licensing Flexibilis Redundancy Supervision is provided with the following licensing methods Paid up source code design o Available for following environments Linux Debian NIOS II no OS o For price licensing and availability or support for different OS contact Flexibilis o Note Flexibilis Redundancy Supervision is provided free of charge when used with FRS IP royalty based licensing 3 3 FRS Management Protocol Stack FRS management protocol 8 is used to control FRS reference design over Ethernet It is also possible to implement for example SNMP or NetConf agents that use the information provided by the protocol 3 3 1 Licensing FRS Management Protocol Stack is provided with the following licensing methods 9 20 Version 1 0 PRODUCTS AND LICENSING Di ala Paid up source code design o Available for the following environments Linux Debian NIOS II no OS o For price licensing and availability or support for different OS contact Flexibilis o Note FRS Management Protocol Stack is provided free of charge when used with FRS IP royalty based licensing 10 20 Version 1 0 PRODUCTS AND LICENSING a a 4 Additional SW components and Environment For Linux OS Flexibilis provides additional SW funct2. naaeaa 11 4 1 Flexibilis Configuration Manager Module and Daemon men nn 11 A DR TT 11 4 2 Interface Manager o ic feet eege ag Seg tt ian ege D ia im eege 11 AiO LICENSIN sista aaa Pa E te 2 a a 2 a 11 4 3 Graphical User Interface nenea nea amana ana ana naae 12 43 1 LICR SING E 12 4 4 XR7 Software Platform nenea nenea aaa nana ana ana 12 4 4 1 LICENSING EE 13 5 Additional FPGA IP Greg eege na ai aia ba datei due d di 14 5 1 Interface Adapters mmm e neoane moon ee me ea neam na nea mana ae anna aaa anna 14 5 11 LICENSING sees cetei iata aa ad i a a a a i a ated n an ba i 14 5 2 Common Avalon blocks mn sees eeeaaeeeeeeeseaeeesaaesesaeeseeeeescaeeesaeseeneeseaees 14 5 2 LICENSIIIC EE 14 5 3 Miscellaneous blocks AA 15 5 91 LICENSIIIC EE 15 6 FRS Reference Heen oos 16 6 1 FRS Reference Design with NICO 16 6 2 FRS Reference Design with SoC ARM nenea eee aaa amana 16 7 Product Mali oceni eer 18 71 Based On Functionality css azi nt RE ata at at 18 8 Abbreviations scai accea oi aa cai D aa canada nr dota ri ta isa aia dia ri dia ia V ca ia 19 CHE 20 Tables Table 1 Product Matrix based on provided functionality mmme nenea 18 3 20 Version 1 0 PRODUCTS AND LICENSING Revision History Rev Date Comments 1 0 18 09 2014 First version 4 20 BA ola Version 1 0 PRODUCTS AND LICENSING FRERES 1 About This Docu
3. or each developer can use his own machine Any combination is also possible 4 4 1 Licensing XR7 Platform is provided with the following licensing methods Paid up source code design o Available for the following environments Linux Debian o For price licensing and availability or support for different OS contact Flexibilis 13 20 Version 1 0 PRODUCTS AND LICENSING ERR 5 Additional FPGA IP cores In addition to the IP cores listed in Chapter 2 Flexibilis also provides a few smaller IP cores to be used with the main Flexibilis IP cores 5 1 Interface Adapters As FRS FES IP interfaces are GMII there is a selection of additional interface adapters that convert GMII to some other interface type The following Interface adapters are provided MII GMII to SGMII 1000BASE X o This adapter uses Altera s Triple Speed Ethernet which is a licensable product from Altera GMII to 1000BASE X MII to 100BASE FX MII GMII to RGMII GMII to GMII o MAC PHY GMIl swaps the TX clock direction GMII to EMAC o SoC EMAC used in SoC FPGA designs 5 1 1 Licensing Interface Adapters are provided with the following licensing methods Paid up license for Adapters o Note Interface Adapters as black box Designs are provided free of charge for those using FRS IP royalty based licensing To get the license key contact Flexibilis o Altera Cyclone IV Cyclone V and Cyclone V SoC For other device families contact Flexibilis for more informati
4. speed non blocking PTPv2 end to end one step transparent clock processing at hardware PTPv2 peer to peer transparent clock support functions PTPv2 boundary and ordinary clock support functions Ethernet packet filter and prioritization on each of the ports Compatible with IEC 62439 3 High availability Seamless Redundancy HSR Compatible with IEC 62439 3 Parallel Redundancy Protocol PRP 2 1 1 Licensing FRS IP is provided with the following licensing methods Royalty based black box design supporting 3 8 interfaces requires a use separate security CPLD chip o Altera Cyclone IV Cyclone V and Cyclone V SoC Other vendors not provided For price and licensing information contact the local Altera representative Available from https www altera com third party flexibilis license Note If External security CPLD is not present the design will operate as a time limited design Paid up license for FRS supporting 3 8 ports o Altera Cyclone IV Cyclone V and Cyclone V SoC For other device families contact Flexibilis for more information o Xilinx Spartan 6 Artix 7 Kintex 7 For other device families contact Flexibilis for more information o Lattice For all device families contact Flexibilis for more information o Microsemi Igloo2 and SmartFusion2 For other device families contact Flexibilis for more information o For price licensing and availability information contact Flexibilis o For other vendors or Port con
5. 7 Kintex 7 For other device families contact Flexibilis for more information o Lattice For all device families contact Flexibilis for more information 7 20 Version 1 0 PRODUCTS AND LICENSING A ela o Microsemi Igloo2 and Smartfusion2 For other device families contact Flexibilis for more information o For price licensing and availability information contact Flexibilis o For other vendors contact Flexibilis for more information 8 20 Version 1 0 PRODUCTS AND LICENSING i a 3 Protocol Stacks Flexibilis provides a set of Protocol stacks which are mainly targeted to be used with FRS IP 3 1 XR7 PTP The XR7 PTP stack 4 implements IEEE1588 2008 Precision Time Protocol PTP 5 The XR7 PTP stack supports the following features 1 Ordinary clock OC master and slave Boundary clock BC Peer to Peer P2P delay measurements BMC algorithm Asymmetry corrections Configurable message intervals Support for multiple domains Different timescales PTP TAI UTC Layer 3 UDP multicast Layer 2 Ethernet multicast PTP management protocol partial not all messages 3 1 1 Licensing XR7 PTP is provided with the following licensing methods Paid up source code design o Available for the following environments Linux Debian NIOS II no OS o For price licensing and availability or support for different OS contact Flexibilis o Note XR7 PTP is provided free of charge for usage with FRS
6. Core Plus black box design for evaluation o Altera No device family dependencies o Available from www flexibilis com downloads Paid up license for FRTC o ERIC black box design is provided free of charge for those using FRS IP royalty based licensing To get the license key contact Flexibilis o Altera Cyclone IV Cyclone V and Cyclone V SoC For other device families contact Flexibilis for more information o Xilinx Spartan 6 Artix 7 Kintex 7 For other device families contact Flexibilis for more information o Lattice For all device families contact Flexibilis for more information o Microsemi Igloo2 and SmartFusion2 For other device families contact Flexibilis for more information o For price licensing and availability information contact Flexibilis o For other vendors contact Flexibilis for more information 2 4 AFEC IP The Advanced Flexibilis Ethernet Controller AFEC IP 3 provides Ethernet MAC functionalities 2 4 1 Licensing AFEC IP is provided with the following licensing methods Open Core Plus black box design for evaluation o Altera No device family dependencies o Available from www flexibilis com downloads Paid up license for AFEC o AFEC black box design is provided free of charge for those using FRS IP royalty based licensing To get the license key contact Flexibilis o Altera Cyclone IV Cyclone V and Cyclone V SoC For other device families contact Flexibilis for more information o Xilinx Spartan 6 Artix
7. Document ID FLXN111 Ce PRODUCTS AND LICENSING PRODUCTS AND LICENSING mo This document could contain technical inaccuracies or typographical errors Flexibilis Oy may make changes in the product described in this document at any time Please email comments about this document to support flexibilis com Copyright Flexibilis Oy 2014 All rights reserved Trademarks All trademarks are the property of their respective owners 2 20 Version 1 0 PRODUCTS AND LICENSING a Contents 1 About This Document e cocon dece bacauane badea nana nana gi anita aaa n batiaa ua aaa d suni 5 SEL Oe GE 6 ZA FRG IP nts ceil eee at ct eed ee ee ad de en ee E eed 6 2 1 1 LICENSING ici eth eee i a i o rete a a e eee eee a e oii 6 2 20 PES Pitt cae notat d E oi alten asad EENEG er 6 2 2 1 LICENSIN EE 6 2 93 an EC mE bata iesit aa ta bl t dai ata e ba tai a lua a 7 2 3 LIGENSING EE 7 24 AFEC Poisoner pda oaza ta e tt at ti taraba i za ata Da 7 ZAM LICENSING seic act ana ital n ac a it ai na a nes 7 3 Protocol Stacks nm lt cc neincapatoare n anda dn aaa daia i dana aaa a 9 CHE d K acei aaa tet Beta a e a E a at a ut a a na Va 9 KEREN 9 3 2 Flexibilis Redundancy Supervision ccccccccceeeeeseeceeeeeceeeeeaeeeeaeeseeeeeseaeeesaeeeeneeseaees 9 3 2 1 LICENSING ET 9 3 3 FRS Management Protocol Stack mn anemie 9 3 3 1 LICENSING EEN 9 4 Additional SW components and Environment cnn nenea eee nene eee nana nana ana
8. EV 5CGTDSN http www altera com products devkits altera kit cyclone v qt html 17 Altera Cyclone V SoC Development kit http www altera com products devkits altera kit cyclone v soc html 18 Terasic Cyclone V SoC Development kit http www terasic com tw cqgi bin page archive pl CategoryNo 167 amp No 816 20 20 Version 1 0
9. M Interface manager or XR7 GUI To be able to recompile the design these items are needed The Reference Design SD card image can be used to boot Linux and configure the FPGA on the evaluation board 17 20 Version 1 0 PRODUCTS AND LICENSING oa 7 Product Matrix 7 1 Based on Functionality The Product and availability matrix based on provided functionality is presented in Table 1 Limited Design Evalution and Quick Evaluation Development Full Functionality inux SW Components Others FPGA Components A Reference Design Flash file Downloadable from www flexibilis com downloads Reference Design SD card image Downloadable from www flexibilis com downloads Time limited free of charge Evaluation version available from C www flexibilis com downloads Full functionality part of the reference design packages Downloadable from D www flexibilis com downloads E Royalty based with CPLD chip Contact Altera representative Paid up black box Contact Flexibilis G Paid up source code Contact Flexibilis Table 1 Product Matrix based on provided functionality 18 20 Version 1 0 PRODUCTS AND LICENSING FLEXIDILIS 8 Abbreviations Term Description AFEC Advanced Flexibilis Ethernet Controller CPU Central Processing Unit FCM Flexibilis Configuration Manager FPGA Field Programmable Gate Array FRS Flexibilis Redundant Switch FRTC Flexibilis Real Time Clock G
10. MII Gigabit Media Independent Interface HSR High availability Seamless Redundancy MAC Media Access Controller MII Media Independent Interface PPS Pulse Per Second PTP Precision Time Protocol PRP Parallel Redundancy Protocol SD Secure Digital 19 20 Version 1 0 PRODUCTS AND LICENSING A a 9 References 1 Flexibilis Redundant Switch FRS Manual FRS_Manual pdf 2 FRTC User Manual FRTC_user_manual pdf 3 Advanced Flexibilis Ethernet Controller AFEC User Manual AFEC_user_manual pdf 4 XR7 PTP design specification xr5_ptp_design pdf 5 IEEE standard 1588 2008 6 Flexibilis Redundancy Supervision design specification flx_redundancy_supervision_design paf 7 Standard IEC 62439 3 2011 8 FRS Management Protocol FRS_management_protocol pdf 9 NETCONF RFC 4741 http tools ietf org html ric4741 10 Flexibilis Configuration Manager Design Specification version 1 0 11 Interface Manager Release Notes 12 XR7 GUI Design Specification version 1 0 13 XR7 Software Platform Features and Overview XR7platform_overview pdf 14 Cyclone IV GX FPGA Development Kit from Altera ordering code DK DEV 4CGX150N http Awww altera com products devkits altera kit cyclone iv gx html 15 Cyclone V GX FPGA Development Kit from Altera ordering code DK DEV 5CGXC7NES http www altera com products devkits altera kit cyclone v gx htm 16 Cyclone V GT FPGA Development Kit from Altera ordering code DK D
11. ed roles or overlapping roles but one machine acts as a software package repository server XR7 software platform provides the following features and services Building software packages o Building software package means taking source code and compiling and linking it to binaries that can be used on target device Cross compiling is used when needed Also files that do not need compiling can be packaged Platform offers simple way to build packages either for testing during development or to be included in the firmware Packages are built in robust reliable and reproducible way Building device firmware o Firmware contains all software needed in a target device in some target device specific format Examples are SD card images NAND flash filesystem images and so on Platform offers simple way to create releases and needed firmware files Detailed contents of each release are available and also accessible via HTTP using simple URLs Small firmware upgrade packs o In many cases it is not desirable to replace the whole firmware on SD card or NAND flash memory when doing system upgrades Platform offers simplified way to create small upgrade packs which provide new or upgraded packages or remove unneeded software packages from the firmware Full customization of upgrade installation process is possible Updating firmware of test system o Typically there are some devices in a dedicated test system or in lab Platform offers a simple way to k
12. eep devices up to date by downloading and installing needed software from package repository server Local Debian package archive o Platform manages software as Debian packages deb files The package repository server acts as a local Debian package archive for upstream Debian and Flexibilis software as well as project specific software New and upgraded software is sent to the package archive via SSH and packages are available from the repository via HTTP Many debugging and diagnostics utilities from Debian are available for use in test system devices without needing to be included in official firmware 12 20 Version 1 0 PRODUCTS AND LICENSING EES HTTP server o Package archive functionality uses HTTP so Apache HTTP server is included in the platform In each machine the HTTP server can also be used to configure other firmware related custom tasks Continuous Integration Cl server o Platform contains Jenkins Cl server that can be used as needed Its use is not required Also external Cl servers can be used for various firmware management tasks DNS server o Typically there already is a DNS server for the development network and often it s best to use it to give names for platform servers the package archive server HTTP server virtual hosts In some cases it may not be possible or desirable so BIND DNS server is included with the platform Multiple developer support o Many developers can use a single platform machine
13. f FRTC in TC only applications GMIl Interconnect o For QSYS internal connections Authentication IF multiplexer o For applications with multiple FRS cores using the same security CPLD Link Led Control o Link LED functionality 5 3 1 Licensing Miscellaneous blocks are provided with the following licensing methods Paid up license for Miscellaneous blocks o Note Miscellaneous blocks as black box designs are provided free of charge for those using FRS IP royalty based licensing To get the license key contact Flexibilis o Supports any design and vendor o These blocks are included in the Reference Design package downloadable from www flexibilis com downloads 15 20 Version 1 0 PRODUCTS AND LICENSING FRERES 6 FRS Reference Design Flexibilis provides FRS reference designs for evaluating the FRS IP Mainly the reference designs can be divided into two categories Reference designs with NIOS and reference designs with SoC ARM 6 1 FRS Reference Design with NIOS Reference Design with NIOS is provided for the following evaluation boards Cyclone IV GX DK DEV 4CGX150N 14 Cyclone V GX DK DEV 5CGXC7NES 15 Cyclone V GT DK DEV 5CGTDON 16 The Reference design includes Reference design image flash file including o FRS IP time limited operation o AFEC IP o FRTC IP o NIOS with XR7 PTP Flexibilis Redundancy Supervision FRS Management Protocol Design related control SW o FRS related FPGA blocks Inte
14. figurations contact Flexibilis for more information 2 2 FES IP The Flexibilis Ethernet Switch FES provides the same feature set as FRS excluding PRP and HSR support oo0 0 2 2 1 Licensing FES IP is provided with the following licensing methods Open Core Plus black box design for evaluation o Altera No device family dependencies 6 20 Version 1 0 PRODUCTS AND LICENSING EES o Request core for evaluation from Flexibilis o Note FRS IP may also be used in FES mode Paid up black box design supporting 3 12 ports o Altera Cyclone IV Cyclone V and Cyclone V SoC For other device families contact Flexibilis for more information o Xilinx Spartan 6 Artix 7 Kintex 7 For other device families contact Flexibilis for more information o Lattice For all device families contact Flexibilis for more information o Microsemi Igloo2 and Smartfusion2 For other device families contact Flexibilis for more information o For price licensing and availability information contact Flexibilis o For other vendors or Port configurations contact Flexibilis for more information 2 3 FRTC IP The Flexibilis Real Time Clock IP 2 provides a real time clock which supports clock adjustment and provides the clock information via registers and external interface In Addition the FRTC supports Pulse Per Second PPS output signal for external synchronization 2 3 1 Licensing FRTC IP is provided with the following licensing methods Open
15. ionalities Figure 1 describes different components and the dependencies between them ae TCP IP FCM ethernet gt 5 a Browser XR7 GUI Le EE SEN AE LOCAL J ip SEQPACKET module SSH routing Network NETCONF stdin module ee SSH stdout FCM management Le pl a gt Pe system subsystem manager Interface manager daemon Figure 1 SW blocks 4 1 Flexibilis Configuration Manager Module and Daemon Flexibilis Configuration Manager Daemon is an implementation of IETF NETCONF 9 network management protocol FCMD design is modular The daemon itself implements the protocol The FCM modules implemented as dynamically linked shared object libraries provide NETCONF support for specific system components like PTP stack Flexibilis Redundancy Supervision network interfaces and so on 4 1 1 Licensing Flexibilis Configuration Manager Daemon and Module 10 is provided with the following licensing methods Paid up source code design o Available for following environments Linux Debian o For price licensing and availability or support for different OS contact Flexibilis 4 2 Interface Manager Interface Manager 11 is a daemon which provides NETCONF support for various network interfaces Its design is modular each module is implemented as a dynamically linked shared object library implementing FCM module i
16. ment This document gives an overview of the products that Flexibilis provides around the Flexibilis Redundant Switch FRS IP 1 Based on this document the FRS IP user should be able to notice other products that would add value on their end product but also understand which products may be needed to generate designs Chapter 2 introduces the main FPGA IP Cores and Chapter 3 Protocol Stacks Chapters 4 and 5 list additional SW and FPGA IP blocks that are available and Chapter 6 defines the available Reference Designs Chapter 7 shows a product matrix for a couple of use cases and Chapters 8 and 9 define Abbreviations and References 5 20 Version 1 0 PRODUCTS AND LICENSING BA a 2 FPGA IP Cores This chapter discusses Flexibilis IP blocks for FPGA designs and their licensing methods 2 1 FRS IP FRS 1 is an Ethernet switch IP block designed to be used in programmable environments FRS includes multiple Ethernet Media Access Controller MAC functional entities and provides MII GMII interfaces for Ethernet PHY devices and optionally for a host system CPU FRS standard features include 10 100 1000 Mbit s Full Duplex Ethernet interfaces Compatible with IEEE standard 802 1D MAC Bridges Media Independent Interfaces MII and Gigabit Media Independent Interfaces GMI for attaching to external Physical Layer devices PHY and host system CPU s Avalon slave interface for register access Ethernet packet forwarding at wire
17. nterface 4 2 1 Licensing Interface Manager is provided with the following licensing methods Paid up source code design o Available for the following environments Linux Debian o For price licensing and availability or support for different OS contact Flexibilis 11 20 Version 1 0 PRODUCTS AND LICENSING ERR 4 3 Graphical User Interface XR7 GUI 12 provides web interface to the device for presenting status information and for configuring the system as desired by user It is implemented as a Java servlet and it uses NETCONF to access the device resources 4 3 1 Licensing XR7 GUL is provided with the following licensing methods Paid up source code design o Available for the following environments Linux Debian o For price licensing and availability or support for different OS contact Flexibilis 4 4 XR7 Software Platform Flexibilis XR7 software platform 13 is a complete system for building and managing GNU Linux based firmware for devices Devices can vary from more or less standard server PCs embedded systems with a SoC to virtual machines The platform is based on Debian and uses various Debian utilities and conventions However it uses them in a more specific way and presents an easy to use interface to them without sacrificing flexibility The Platform is available as a disk image which can be used to setup multiple networked machines as needed Machines can have a different firmware management relat
18. on Xilinx For all device families contact Flexibilis for more information Lattice For all device families contact Flexibilis for more information Microsemi For all device families contact Flexibilis for more information These blocks are included in the Reference Design package downloadable from www flexibilis com downloads oo00 5 2 Common Avalon blocks A group of common Avalon blocks are provided to assist in QSYS designing Avalon Terminate o Terminates an Open Avalon Master interface Avalon Arbit o Combines two Avalon masters i e transfers accesses from two slave interfaces to one master interface Avalon Export o Exports an Avalon interface from a QSYS block Avalon Splitter o Splits the Avalon address space Used when the design includes multiple FRS IP Cores 5 2 1 Licensing Common Avalon blocks are provided with the following licensing methods Paid up license for Common Avalon blocks o Note Common Avalon blocks as black box designs are provided free of charge for those using FRS IP royalty based licensing To get the license key contact Flexibilis 14 20 Version 1 0 PRODUCTS AND LICENSING ERR o Supports any design using an interface that meets Avalon specification o These blocks are included in the Reference Design package downloadable from www flexibilis com downloads 5 3 Miscellaneous blocks Flexibilis also provides a group of miscellaneous blocks as listed below Default Clock o Can be used instead o
19. rface adapters Avalon bus components etc For more information check the Reference design specification Design related control SW source codes component drivers initializations etc FRS related FPGA blocks as black box Interface adapters Avalon bus components etc Quartus Project files Note The reference design package does not include FRS IP AFEC IP FRTC IP or SW protocol stacks To be able to recompile the design these items are needed The Reference design flash file can be used to configure the FPGA on the evaluation board 6 2 FRS Reference Design with SoC ARM Reference design with ARM is provided for the following evaluation boards Altera Cyclone V SoC Development kit DK DEV 5CSXCEN 17 Terasic Cyclone V SoC Development kit 18 Reference design includes Reference design image SD card image including o FRS IP time limited operation o AFEC IP o FRTC IP o Linux with XR7 PTP Flexibilis Redundancy Supervision FCMs Interface Managers XR7 GUI Kernel drivers o FRS related FPGA blocks Interface adapters Avalon bus components etc For more check the Reference design specification Kernal drivers source codes FRS related FPGA blocks source codes Interface adapters Avalon bus components etc 16 20 Version 1 0 PRODUCTS AND LICENSING A a Quartus Project files Note The reference design package does not include FRS IP AFEC IP FRTC IP SW protocol stacks FC
Download Pdf Manuals
Related Search