Home

VisualDSP++ 4.0 Linker and Utilities Manual

1. Hex Number Binary Number Truncated Filled A5A5A 1010 0101 1010 0101 1010 1010 0101 1010 0101 1010 FFEFI 1111 11 1111 1111 000 1111 1111 1111 1111 0001 A5A5 1010 0101 1010 010 0000 1010 0101 1010 0101 5A5A5 0101 1010 0101 1010 010 0101 1010 0101 1010 0101 11111 0001 0001 0001 0001 000 0001 0001 0001 0001 0001 123456 0001 0010 0011 0100 0101 0110 0010 0011 0100 0101 0110 VisualDSP 4 0 Linker and Utilities Manual A 9 www BDTIC com ADI Format References Format References The following texts define industry standard file formats supported by VisualDSP e Gircys G R 1988 Understanding and Using COFF by O Reilly amp Associates Newton MA 1993 Executable and Linkable Format ELF V1 1 from the Portable Formats Specification V1 1 Tools Interface Standards TIS Committee Go to http developer intel com vtune tis htm e 1993 Debugging Information Format DWARF V1 1 from the Portable Formats Specification V1 1 UNIX International Inc Go to http developer intel com vtune tis htm A 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI B UTILITIES The VisualDSP development software includes several utilities some of which run from a command line only This appendix describes the ELF file dumper utility elfdump ELF File Dumper The ELF file dumper e1 fdump exe utility extracts data from ELF format executable
2. i E s Start Address Dsz FA MOCode 3 0x0 a bsz init ee MDAA rea te r f O40000 H E datat s M2DataB iy ox50000 E datat0a H M4Datad go 080000 datal0b H M4DataB Delete 090000 HL data2 H M6Datad Pin to Output Section 0xc0000 HL data2a M6DataB Go to Oxd0000 HL data2b M Datad View Section Contents Ox100000 L datada M8DataB view Symbols 0110000 H data4b 4 M10Datad Properties Ox1 40000 L dataBa M10DataB Expand all 0150000 data6b MSO View Legend 030000000 H dataBa MS view Global Properties 0x38000000 4 data8b 3 MSSDO Ox40000000 L program MSSD1 v Allow Docking ox50000000 3 MSSD2 Hide Ox60000000 SA MSSD3 ae ox70000000 me cT Float In Main Window EAA Bef Figure 4 16 Memory Map Main Menu View Mode e Memory Map Tree Displays the memory map in a tree represen tation see Figure 4 17 on page 4 25 e Graphical Memory Map Displays the memory map in graphical blocks see Figure 4 18 on page 4 26 4 22 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker View e Mapping Strategy Pre Link Displays the memory map that shows the placement of your object sections e Link Results Post Link Displays the memory map that shows the actual placement of the object sections New e Memory Segment Specifies the name address range type size and so on for memory segme
3. EEE Figure 4 4 Selecting System and Processor Types 4 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker By default the LDF file is set for single processors Under System type select Single processor or Multiprocessor e Fora single processor system the Processors list shows only one processor and the MP address columns do not appear e Fora multiprocessor system right click in the Processor Proper ties box to add the desired number of processors included in the LDF file name each processor and set the processor order which will determine each processor s MP memory address range Processor type identifies the DSP system s processor architecture This setting is derived from the processor target specified via the Project Options dialog box in VisualDSP By selecting Set up system from debug session settings the processor information number of processors and the processor names is filled auto matically from the current settings in the debug session This field is grayed out when the current debug session is not supported by the Expert Linker You can also specify the Output file name and the Executables to link against object libraries macros and so on When you select a processor in the Processors list the system displays the output file name and the list of executable files to link against for that pro cessor appear You can change these files by typing a
4. e data2 90000 ae 100000 MeData _ Ji 110000 3 180000 180800 400000 1co00000 2000000 2400000 2800000 2co00000 3000000 3400000 3800000 PSO 3 00000 sear F 4000000 SDRAM Bee He HH 4 Figure 4 41 Shared Memory Segment VisualDSP 4 0 Linker and Utilities Manual 4 47 www BDTIC com ADI Memory Map Pane Expert Linker automatically adds shared memory segments and therefore no any additional modifications to the LDF are needed Confirm that Expert Linker has correctly added the SM file to the link against command line by selecting View Global Properties in the Mem ory Map pane and clicking on the Processor tab The shared sm file should now be contained in the Executables to Link Against box for each processor Use Expert Linker to detect non linked input sections such as a variable declared in external SDRAM memory which belongs to the shared mem ory segment When both processors and the shared memory segments have been prop erly configured and Expert Linker has detected all input sections you can link the object files from different input sections to their corresponding memory sections In general the linking process consists of these steps 1 Sort the left pane of the Expert Linker window by LDF macros instead of input sections default setting To do that right click on the left pane and select Sort by LDF Macros 2 Right click on the LDF M
5. heap Allocate a heap for the application ldf_heap_space ldf_heap_end ldf_heap_space 0x2000 ldf_heap_length ldf_heap_end ldf_heap_space gt mem_heap end PSHO sections end PSHO processor The third and final link project defined in this LDF file is another DXE project and will be linked against both the SHARED project and the PSHO DXE project PROCESSOR_PSH1 PSH1_OBJECTS pshl doj 161_hdr doj LINK_AGAINST shared sm psh0 dxe OUTPUT pshl dxe SECTIONS dxe_pmco INPUT_SECTIONS PSH1_OBJECTS seg_pmco LIBRARIES seg_pmco gt mem_pmco dxe_pmda INPUT_SECTIONS VisualDSP 4 0 Linker and Utilities Manual D 9 www BDTIC com ADI Linking for MP and Shared Memory PSH1_OBJECTS seg_pmda LIBRARIES seg_pmda gt mem_pmda dxe_dmda PUT_SECTIONS PSH1_OBJECTS seg_dmda LIBRARIES seg_dmda gt mem_dmda dxe_init PUT_SECTIONS PSH1_OBJECTS seg_init LIBRARIES seg_init gt mem_init dxe_rth PUT_SECTIONS PSH1_OBJECTS seg_rth LIBRARIES seg_rth gt mem_rth stackseg Allocate a stack for the application df_stack_space df_stack_length 0x2000 gt mem_stak heap Allocate a heap for the application df_heap_space gt mem_heap df_heap_end ldf_heap_space 0x2000 df_heap_length ldf_heap_end ldf_heap_space The following defin
6. ldf_heap_end ldf_heap_space MEMORY_SIZEOF MEM_HEAP 1 ldf_heap_length ldf_heap_end ldf_heap_space gt MEM_HEAP argv Allocate argv space for the application ldf_argv_space ldf_argv_end ldf_argv_space MEMORY_SIZEOF MEM_ARGV 1 ldf_argv_length ldf_argv_end ldf_argv_space gt MEM_ARGV end SECTIONS end PROCESSOR pO VisualDSP 4 0 Linker and Utilities Manual 3 7 www BDTIC com ADI LDF File Overview Memory Usage in Blackfin Processors The LDF files define memory areas for all defined spaces on the proces sor Not all of these memory areas are used within the LOF files Instead the LDF files provide two basic memory configurations e The default configuration specifies that only internal memory is available and caching is disabled Thus no code or data is mapped to SDRAM unless explicitly placed there and all of the available L1 space is used for code or data e The USE_CACHE option selects the alternative configuration where code and data caches are enabled and external SDRAM is used Code and data are mapped into L1 where possible but the Cache SRAM areas are left empty any spill over goes into the lower 32 MB area of SDRAM If USE_CACHE is used caches may safely be turned on because doing so will not corrupt code or data Selecting this option does not actually enable the caches that must be done separately for example through the ___cplb_ctr1
7. S program LIBRARIES program S datal LIBRARIES datal TS cplb LIBRARIES cplb 2 42 VisualD SP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker INPUT_SECTIONS 0BJECTS cplb_code LIBRARIES cplb_code INPUT_SECTIONS 0OBJECTS cplb_data LIBRARIES cplb_data INPUT_SECTIONS 0BJECTS constdata LIBRARIES constdata I gt PUT_SECTIONS 0BJECTS voldata LIBRARIES voldata EM_PROGRAM stac ldf_stack_space ldf_stack_end ldf_stack_space MEMORY_SIZEOF MEM_STACK 4 gt MEM_STACK heap Allocate a heap for the application ldf_heap_space ldf_heap_end ldf_heap_space MEMORY_SIZEOF MEM_HEAP 1 ldf_heap_length ldf_heap_end ldf_heap_space gt MEM_HEAP argv Allocate argv space for the application ldf_argv_space ldf_argv_end ldf_argv_space MEMORY_SIZEOF MEM_ARGV 1 ldf_argv_length ldf_argv_end ldf_argv_space gt MEM_ARGV end SECTIONS VisualDSP 4 0 Linker and Utilities Manual 2 43 www BDTIC com ADI Link Target Description Specifying Two Buffers in Different Memory Segments On TigerSHARC processors the linker is enhanced to support efficient programming using the SEPARATE_MEM_SEGMENTS assembler directive e The SEPARATE_MEM_SEGMENTS assembler directive or the compiler pragma pragma separate_mem_segments specifies two buffers directing the linker to place the buffers in
8. 4 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Step 3 Completing the LDF Wizard From the Wizard Completed page you can go back and verify or modify selections made up to this point When you click the Finish button Expert Linker copies a template LDF file to the same directory that contains the project file and adds it to the current project The Expert Linker window appears and displays the con tents of the new LDF file Create LDF Step 3 of 3 Wizard Completed The Create LDF Wizard now has enough information to create your LDF file Summary of choices LDF file name C examples dot_product_c ldf Project type C System type Multiprocessor Processor type ADSP 21060 Processors PO Output file name COMMAND_LINE_OUTPUT_FILE MP Offset 0x80000 M Click Finish to close this wizard create the new LDF file and view the LDF file with Expert Linker EEEREN Figure 4 6 Wizard Completed Page of the Create LDF Wizard VisualDSP 4 0 Linker and Utilities Manual 4 9 www BDTIC com ADI Expert Linker Window Overview Expert Linker Window Overview The Expert Linker window contains two panes e The Input Sections pane Figure 4 7 provides a tree display of the project s input sections see Input Sections Pane on page 4 12 e The Memory Map pane displays each memory map in a tree or graphical representation see Memory Map Pane on p
9. VisualDSP 4 0 Linker and Utilities Manual 2 21 www BDTIC com ADI Link Target Description gdt gdel frt frel cht chtl edt edtl These data sections are used to hold data used during the handling of exceptions The linker places the contents of these data sections in seg_dmda See Special Table Memory Sections on page 2 30 Default Memory Sections for TigerSHARC Processors Table 2 2 shows section mapping in the default LDF file for ADSP TS101 processor as an example for TigerSHARC processors Table 2 2 Section Mapping in the Default TigerSHARC LDF Input Section Output Section Memory Section program code O0Code data datal Data data2 data2 2Data heaptab heaptab Data mem_argv mem_argv Data bsz_init bsz Data bsz bsz_init Data jstackseg Stack kstackseg 2Stack defheapseg Heap ctor ctor Data ctorO ctor Data ctorl ctor Data ctor2 ctor Data ctor3 ctor Data 2 22 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Table 2 2 Section Mapping in the Default TigerSsHARC LDF Contd Input Section Output Section Memory Section ctor4 ctor MlData vtbl vtbl vtbl There are several input memory sections used in the default LDF files for ADSP TSxxx processors which must be present in user s own LDF files These sections are described in detail below program This section is the default loc
10. Memory Overlays and Advanced LDF Commands If FUNC_A is in an overlay the linker replaces the function call with the fol lowing instruction J4 LJO 93155 j5 j4 j6 CALL plt_FUNC_A Call to PLIT entry js 93d J5s3 p1t_FUNC_A is the entry in the PLIT that contains defined instructions These instructions prepare the overlay manager to load the overlay con taining FUNC_A The instructions executed in the PLIT are specified within the LDF Listing 5 2 is an example PLIT definition from an LDF file where register j4 is set to the value of the overlay ID that contains the referenced symbol and register j5 is set to the run time address of the referenced symbol The last instruction branches to the overlay manager that uses the initialized registers to determine which overlay to load and where to jump to exe cute the called overlay function Listing 5 2 PLIT Definitions in LDF PLIT TigerSHARC PLIT j4 PLIT_SYMBOL_OVERLAYID j5 PLIT_SYMBOL_ADDRESS JUMP OverlayManager PLIT Blackfin PLIT RO 1 PLIT_SYMBOL_OVERLAYID R1 h PLIT_SYMBOL_ADDRESS R1 1 PLIT_SYMBOL_ADDRESS JUMP OverlayManager VisualDSP 4 0 Linker and Utilities Manual 5 11 www BDTIC com ADI Memory Management Using Overlays The linker expands the PLIT definition into individual entries in a table An entry is created for each overlay symbol as shown in Listing 5 2 The redirection function calls t
11. The overlay manager also stores the ID of an overlay currently residing in internal memory When an overlay is transferred to internal memory the overlay manager stores the overlay ID in internal memory in the buffer labeled ov_id_loaded Before another overlay is transferred the overlay manager compares the required overlay ID with the ID stored in the ov_id_loaded buffer If they are equal the required overlay is already in internal memory and a transfer is not required The PC is sent to the proper location to execute the referenced function If they are not equal the value in ov_id_loaded is updated and the overlay is transferred into its internal run space via DMA VisualDSP 4 0 Linker and Utilities Manual 5 19 www BDTIC com ADI Memory Management Using Overlays On completion of the transfer the overlay manager restores register values from the run time stack flushes the cache and then jumps the PC to the run time location of the referenced function It is very important to flush the cache before moving the PC to the referenced function Otherwise when code is replaced or modified incorrect code execution may occur If the program sequencer searches the cache for an instruction and an instruction from the previous overlay is in the cache that instruction may be executed because the expected cache miss is not received Overlay Manager Function Summary In summary the overlay manager routine does the following e Maintai
12. e The ARCHITECTURE command defines the processor type which can be one type only e The SEARCH_DIR command adds the 1ib and current working directory to the search path e The 0BJS and LIBS macros get object 00J and library DLB file input e The MPMEMORY command defines each processor s offset within multiprocessor memory e The SHARED_MEMORY command identifies the output for the shared memory items e The MAP command outputs map files e The MEMORY command defines memory for the processors e The PROCESSOR and SECTIONS commands define each processor and place program sections using memory definitions for each pro cessor s output file e The LINK_AGAINST commands resolve symbols within multipro cessor memory Listing D 4 LDF for a Multiprocessor System With Shared Memory ARCHITECTURE ADSP 21161 SEARCH_DIR ADI_DSP 211xx lib D 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for SHARC Processors es y EMORY at the linker 0400ff 0401ff 040287 0419ff 043fff O51fff 052fff O53fff e undefined buffer Allocate multiprocessor memory space with the MP command The values represent an offset th uses to resolve undefined symbols in one DXE file to symbols defined in another DXE That is the offset is ad
13. www BDTIC com ADI Expert Linker Managing Processor Properties To specify processor properties 1 In the Memory Map pane right click on a Processor tab and choose Properties The Processor Properties dialog box appears 2 Click the Processor tab Figure 4 44 The Processor tab allows you to reconfigure the processor setup Processor Properties zix Processor Elimination Symbols Processor type aDsP 21 160 Multiprocessor m Processor properties Processors Output file 3COMMAND_LINE_OUTPUT_FILE Executables to link against o Figure 4 44 Processor Page of the Processor Properties Dialog Box VisualDSP 4 0 Linker and Utilities Manual 4 53 www BDTIC com ADI Managing Object Properties With a Processor tab in focus you can Specify System Type It may be a Single processor or Multipro cessor selection The Processors list displays the names of all the processors in the project and the address range for each processor Select a Processor type such as ADSP 21060 Specify an Output file name The file name may include a relative path and or LDF macro Specify an output file for each processor Specify Executables to link against Multiple files names are per mitted but must be separated with space characters or commas Only SM DLB and DXE files are permitted A file name may include a relative path LDF macro or both Additio
14. 4 0 Linker and Utilities Manual 3 29 www BDTIC com ADI LDF Commands e RESOLVE on page 3 47 e SEARCH_DIR on page 3 47 e SECTIONS on page 3 48 e SHARED_MEMORY on page 3 55 ALIGN The ALIGN number command aligns the address of the current location counter to the next address that is a multiple of number where number is a power of 2 The number is a word boundary address that depends on the word size of the memory segment in which the ALIGN takes action ARC HITEC TURE The ARCHITECTURE command specifies the target system s processor An LDF file may contain one ARCHITECTURE command only The ARCHITECTURE command must appear with global LDF scope applying to the entire LDF file The command s syntax is ARCHITECTURE processor The ARCHITECTURE command is case sensitive For example valid entry may be ADSP TS201 Thus ADSP 1S201 is valid but adsp TS201 is not If the ARCHITECTURE command does not specify the target processor you must identify the target processor via the linker command line linker proc processor Otherwise the linker cannot link the program If processor specific MEMORY commands in the LDF file conflict with the processor type the linker issues an error message and halts 3 30 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File Test whether your VisualDSP installation a
15. DXE files and yields text showing the ELF file s contents The el fdump utility is often used with the archiver el far exe Refer to Disassembling a Library Member on page B 3 for details Syntax elfdump switches Lobjectfile Table B 1 shows switches used with the elfdump command Table B 1 ELF File Dumper Command Line Switches Switch Description c Stabs to mdebug conversion fh Prints the file header arsym Prints the library symbol table arall Prints every library member help Prints the list of elfdump switches to stdout ph Prints the program header table 25 Prints contents as a list of disassembled machine instructions Also prints labels VisualDSP 4 0 Linker and Utilities Manual B 1 www BDTIC com ADI elfdump ELF File Dumper Table B 1 ELF File Dumper Command Line Switches Cont d Switch Description sh Prints the section header table This switch is the default when no options are specified notes Prints note segment s n name Prints contents of the named section s The name may be a simple glob style pattern using and as wildcard characters Each section s name and type determines its output format unless overridden by a modifier i x0 x1 Prints contents of sections numbered x0 through x1 where x0 and x1 are decimal integers and x1 defaults to x0 if omitted Formatting rules are the same
16. LIBRARIES program VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blackfin Processors PUT_SECTION_ALIGN 1 PUT_SECTIONS OBJECTS datal LIBRARIES datal PUT_SECTIONS 0BJECTS cplb LIBRARIES cplb PUT_SECTIONS O0BJECTS cplb_code LIBRARIES cplb_code PUT_SECTIONS OBJECTS cplb_data LIBRARIES cplb_data PUT_SECTION_ALIGN 1 PUT_SECTIONS OBJECTS constdata LIBRARIES constdata U UT_SECTION_ALIGN 1 UT_SECTIONS OBJECTS ctor LIBRARIES ctor gt MEM_PROGRAM U stack INPUT_SECTIONS 0QBJECTS stack gt MEM_STACK heap Allocate a heap for the application ldf_heap_space ldf_heap_end ldf_heap_space MEMORY_SIZEOF MEM_HEAP 1 ldf_heap_length ldf_heap_end ldf_heap_space gt MEM_HEAP OVERLAY_INPUT The output archive file overlayl ovl will contain the code and symbol table for this overlay OVERLAY_OUTPUT overlayl ovl Only take the code from the file overlayl doj If this code needs data it must be either the INPUT of a VisualDSP 4 0 Linker and Utilities Manual E 19 www BDTIC com ADI Linking for Overay Memory data overlay or the INPUT to non overlay data memory INPUT_SECTIONS overlayl doj program Tell the linker that all of the code in the overlay must fit into the run memor
17. SECTION directive Refer to example DSP programs shipped with VisualDSP for sample LDF files supporting typical system models 3 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File LDF File Overview The LDF file directs the linker by mapping code or data to specific mem ory segments The linker maps program code and data within the system memory and processor s and assigns an address to every symbol where symbol label symbol function_name symbol variable_name If you neither write an LDF file nor import an LDF file into your project VisualDSP links the code using a default LDF file The chosen default LDF file is determined by the processor specified in the VisualDSP Project Options dialog box Default LDF files are packaged with your processor tool distribution kit in a subdi rectory specific to your target processor s family One default LDF file is provided for each processor supported by your VisualDSP installation see Default LDFs The LDF file combines information directing the linker to place input sections in an executable file according to the memory available in the DSP system The linker may output warning messages and error messages You must resolve the error messages to enable the linker to produce valid output See Linker Warning and Error Messages on page 2 15 for more information Default LDFs The name of each L
18. TPUT ONS e TPUT ONS Declare first overlay group Overlays to live in section ovl_code AL ff Ff AL ff Ff L FIT t_one ovl t_lst doj program L FIT t_two ovl t_mid doj program Declare second overlay group Overlays to live in section ovl_code C AL ff Ff AL Ci FF L FIT J t_three ovl t_last doj program L FIT J t_last ovl t_last doj program VisualDSP 4 0 Linker and Utilities Manual 5 35 www BDTIC com ADI Advanced LDF Commands PUTO The linker resolves function calls and variable accesses both direct and indirect across overlays This task requires the linker to generate extra code to transfer control to a user defined routine an overlay manager that handles the loading of overlays Linker generated code goes in a spe cial section of the executable file which has the section name PLIT The PLIT procedure linkage table command in an LDF file inserts assembly instructions that handle calls to functions in overlays The assembly instructions are specific to an overlay and are executed each time a call to a function in that overlay is detected The PLIT command provides a template from which the linker generates assembly code when a symbol resolves to a function in overlay memory The code typically handles a call to a function in overlay memory by calling an overlay memory manager Refer to Memory Overlay Support
19. W SUN DSP x 4 0 Linker and Utilities Manual Analog Devices Inc One Technology Way Norwood Mass 02062 9106 Revision 1 0 January 2005 Part Number 82 000420 03 ANALOG DEVICES www BDTIC com ADI Copyright Information 2005 Analog Devices Inc ALL RIGHTS RESERVED This docu ment may not be reproduced in any form without prior express written consent from Analog Devices Inc Printed in the USA Disclaimer Analog Devices Inc reserves the right to change this product without prior notice Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by impli cation or otherwise under the patent rights of Analog Devices Inc Trademark and Service Mark Notice The Analog Devices logo the CROSSCORE logo VisualDSP Blackfin SHARC TigerSHARC and EZ KIT Lite are registered trade marks of Analog Devices Inc All other brand and product names are trademarks or service marks of their respective owners www BDTIC com ADI CONTENTS PREFACE Purpose ot This Manual ac stsceciaseinii asda gation aluieeaibiniieeaiumnsiaiag xix landed Fat SAE aes cic onesieneen E xix ea ae seniri SAREETAN XX Whats New m Liis Manual cncniientinrmiiaeasientmennae xxi Technical or Costomer SUpport osonsr
20. e The initialization data and code from the primary application Figure 7 1 shows the basic structure of the initialization stream Initialization Stream Header First Callback Code optional Second Callback Code optional Additional Callback Code optional Code and Data for the Primary Executable Figure 7 1 Memory Initializer Basic Initialization Stream Structure VisualDSP 4 0 Linker and Utilities Manual 7 5 www BDTIC com ADI Run Time Library Routine Basic Operation Run Time Library Routine Basic Operation A Run Time Library RTL routine performs the memory initialization with the initialization stream created by the Memory Initializer during runtime It can be a dedicated RTL routine or user provided routine called _mi_initialize from the assembly code For more information on the definition of the initialization stream see EE 239 for Blackfin processors Following a system reset the RTL routine is invoked by the application s start up code The RTL routine 1 searches for the initialization stream 2 digests the stream header 3 for each callback executable specified the RTL routine first copies callback code into RAM and then executes it It is done piece by piece and continue until execution is complete 4 brings the code and data from the primary executable file into the processors memory Once each callback executable has been executed it is no longer needed in RAM it may b
21. on page 4 69 The new overlay appears in the run and live spaces in two different colors in the memory map VisualDSP 4 0 Linker and Utilities Manual 4 37 www BDTIC com ADI Memory Map Pane Viewing Section Contents To view the contents of an input section or an output section specify the particular memory address and the display s format This capability employs the el fdump utility e1 fdump exe to obtain the section contents and display it in a window similar to a memory window in VisualDSP Multiple Section Contents dialog boxes may be dis played For example Figure 4 30 shows output section contents in HEX format Section Contents Section mE Primes doj sea_pmco q Section contents 000000 1607ffffff 26715f8100 0000ad02ff ffffe50f02 00001E 0 01000000 00003C 0c00140000 00005 adOcffffff 000078 073e000000 000096 0 00000000 000084 013e0000a0 0000D2 716 8a0000 0000F0 5ffe810000 00010E ac02ffffff 00012C 716 8a0000 000144 0 08000000 OladOlffft Od59be0000 fdac02ffff ic0f040000 00073e0000 2107040000 001604ffff 005ffeb180 e7013e0002 001604ffff 145ffe8400 ffe70f1400 00005bbe80 ffe70f0100 0000180400 004c073e00 002d013e00 ffeb493e04 0000013600 9120ad01ff ffe8493e80 0000180400 000000716f 0000000000 000014013e 0000005ffe 00004cac02 a 029010ad00 000000ach4 0210000700 ffffevacOO 000000ac0c
22. thing that is needed to create an initialization stream Table 7 1 Command Line Options and Entries Item Description BeginInit Initsymbol on page 7 14 Specifies a symbol name for a variable that holds a pointer pointing to the start address of an initialization stream h on page 7 15 Displays the list of Memory Initializer switches IgnoreSection Sectionname on page 7 15 Directs the Memory Initializer to NOT process a section selected in the primary input file Init Initcode dxe Specifies an executable file to be inserted into the initial on page 7 15 ization stream and executed as a callback InputFile dxe Specifies a primary input file on page 7 16 NoAuto Directs the Memory Initializer to NOT process sections on page 7 16 in the primary input file based on the section header flags the section specified by a user as either ZERO_INIT and RUNTIME_INIT qualifier in the linker description file but to only process sections specified on the command line through Sect SectionName This switch is optional VisualDSP 4 0 Linker and Utilities Manual 7 13 www BDTIC com ADI Memory Initializer Command Line Switc hes Table 7 1 Command Line Options and Entries Contd Item Description NoErase Directs the Memory Initializer not to erase the data of the on page 7 16 processed sections in the primary executable file o Outputfile dxe Specifies an outp
23. www BDTIC com ADI Memory Map Pane This section describes e Context Menu on page 4 22 e Tree View Memory Map Representation on page 4 24 e Graphical View Memory Map Representation on page 4 25 e Specifying Pre and Post Link Memory Map View on page 4 31 e Zooming In and Out on the Memory Map on page 4 32 e Adding a Memory Segment on page 4 33 e Inserting a Gap Into a Memory Segment on page 4 35 e Working With Overlays on page 4 36 e Viewing Section Contents on page 4 38 e Profiling Object Sections on page 4 42 e Adding Shared Memory Segments and Linking Object Files on page 4 46 The Memory Map pane has tabbed pages You can page through the memory maps of the processors and shared memories to view their makeup The two viewing modes are a tree view and a graphical view Select these views and other memory map features by means of the right click context menu All procedures involving memory map han dling assume the Expert Linker window is open The Memory Map pane displays a tooltip when the mouse cursor moves over an object in the display The tooltip shows the object s name address and size The system also uses representations of overlays which display in run space and live space Use the right click menu Context Menu on page 4 22 to select and perform major memory map functions 4 20 VisualDSP 4 0 Linker and Utilities Manual w
24. ALGORITHM ALL_FIT OVERLAY_OUTPUT fft_one ovl INPUT_SECTIONS Fft_lst doj program gt ovl_code OVERLAY_INPUT ALGORITHM ALL_FIT OVERLAY_OUTPUT ft_two ovl INPUT_SECTIONS ft_2nd doj program gt ovl_code m OVERLAY_INPUT ALGORITHM ALL_FIT L i OVERLAY_OUTPUT ft_three ovl INPUT_SECTIONS Fft_3rd doj program gt ovl_code 5 34 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI OVERLAY_ ALGORITHM INPUT Memory Overlays and Advanced LDF Commands INPUT _SECTIONS Fft_last doj program ALL_FIT OVERLAY_OUTPUT fft_last ovl gt ovl_code Grouped Ovenay Execution Listing 5 5 shows a different implementation of the same algorithm The overlay functions are grouped in pairs Since all four pairs of routines reside simultaneously the processor executes both routines before paging Listing 5 5 LDF Overlays Grouped OVERLAY_ OVE A OV I OVE A R R V HO OVERLAY_ OVER A OV I OVE AL OV I R GROUP LAY_I LGORIT ERLAY PUT_S LAY_I GORIT RLAY UT_S ovl_ D gt GROUP AY_I ORIT RLAY UT_S gt ovl_ LAY_I GORIT m I p ERLAY_ PUT_S gt ovl_code _0 gt ovl_ _0 _0 HM ECT cod U HM U ECT cod HM ECT cod HM 0 ECT U PUT PUT PUT PUT TPUT ONS e TPUT ONS e
25. CL Be arco 2 27 LI DATA D okorna 2 27 E E E E E E E A E E 2 27 UE pica iene iene ae erent 2 28 CEE P N 2 28 DST sare ATTE 2 28 E O EEE PTA AEA AOE NE REA AEA E 2 28 INE A E E E E E A A E E A 2 29 E E A A T E E NE 2 29 nonca he Code soetra 2 29 E E EE AA EE T 2 29 TLL EEN sam E A E E E 2 29 Other Memory Sections sencncminisnaneenran 2 30 Special Table Memory Sections scscctiasliieis nnsicieineadars 2 30 A sisi saa id acai A E E asin eteaainichaainal 2 30 vi VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI CONTENTS ENIN eee nee een ee A ENES eee eee 2 30 i uct A A E N 2 30 EEEE EN IA ENE EE E E REE OT RYE EE EE 2 31 E E S 2 31 T E E E A E E E E 2 31 E E AE iene eae 2 31 EE E E E per E E E eer rere 2 31 Memory Characteristics Overview seis casesicscareanctnarcameisarcesens 2 31 SHARC Memory Characteristics ccscecessacsess smeciesescncoies 2 32 TigerS HARC Memory Characteristics scsecdcnsncarccsnaseiocses 2 34 Blackfin Processor Memory Characteristics ssssseseee 2 36 Linker MEMORY Command in LDF File 0 0 eee 2 38 Placita Code on the Tapet seaticissericitewernieewmsie 2 40 Specifying Two Buffers in Different Memory Segments 2 44 Piretile Gutded Optimization Sapport siscacsssisavandsesanceseccesseeats 2 45 Passing Arguments for Simulation or Emulation 00 2 46 Linker Command Line Referente aciiciusicdesrssuiarsacdedaatoninesauns 2 47 Linket Command Line SY
26. Link Processor TigerSHARC Page Use the VisualDSP context sensitive online Help for each target archi tecture to obtain information on linker options you can specify in VisualDSP To do that click on the button and then click in a field or box you need information about VisualDSP 4 0 Linker and Utilities Manual 2 13 www BDTIC com ADI Linking Environment Expert Linker The VisualDSP IDDE features an interactive tool Expert Linker to map code or data to specific memory segments When developing a new project use the Expert Linker to generate the LDF file Expert Linker graphically displays the LDF information object files LDF macros libraries and a target memory description With Expert Linker use drag and drop operations to arrange the object files in a graphical memory mapping representation When you are satisfied with the memory layout generate the executable DXE file Figure 2 10 shows the Expert Linker window which comprises two panes Input Sections and Memory Map output sections Refer to Chapter 4 Expert Linker for detailed information Expert Linker Input Sections Wint E Wint Mint12 Mint13 Mint 4 Mint 5 vinta Mint5 Mint6 Mint Mint oe EE A A H E F Memory Map mem_INT_INT14 OxicO mem_INT_INT15 OxleO e
27. Section SectionName switch has no effect on callback executable files specified via the Init switch There fore do not use this switch to specify any sections in callback executable files SectDestination Sectonname The SectDestination Sectionname switch is used to specify a destination section to hold the initialization stream The section name must already exist in the input primary file The Memory Initializer appends the pro cessed initialization stream into this section The default value for the SectionName if the switch is not provided on the command line is meminit VisualDSP 4 0 Linker and Utilities Manual 7 17 www BDTIC com ADI Memory Initializer Command Line Switc hes The memory type PM or DM of the specified section or meminit has no impact to the processed data though generally the memory type of meminit should be PM if the processor supports the PM DM architecture The Memory Initializer generates an error if the section is not found in the file If this switch is not present the default name is meminit An error is also produced if the section is not large enough to hold the gener ated initialization stream Please note that this switch does not have to be used if meminit is defined in the LDF file and the linker allocates the memory space for that default section to hold the initialization stream Instead of using this switch you could define the meminit memory section in
28. Some linker switches take a file name as a parameter Table 2 8 lists the types of files names and extensions that the linker expects on file name arguments The linker follows the conventions for file extensions in Table 2 8 Table 2 8 File Extension Conventions Extension File Description DLB Library archive file DOJ Object file DXE Executable file LDF Linker Description File OVL Overlay file SM Shared memory file VisualDSP 4 0 Linker and Utilities Manual 2 49 www BDTIC com ADI Linker Command Line Reference The linker supports relative and absolute directory names default directo ries and user selected directories for file search paths File searches occur in the following order I Specified path If the command line includes relative or absolute path information the linker searches that location for the file Specified directories If you do not include path information on the command line and the file is not in the default directory the linker searches for the file in the search directories specified with the L path command line switch and then searches direc tories specified by SEARCH_DIR commands in the LDF file Directories are searched in order of appearance on the command line or in the LDF file Default directory If you do not include path information in the LDF file named by the T switch the linker searches for the LDF file in
29. TYPECRA START 0x00008000 END OxOOOOFFFF WIDTH 32 1Data TYPE RA START 0x00080000 END OxOO08BFFF WIDTH 32 1Stack TYPE RA START Ox0008C000 END OxOOO8FFFF WIDTH 32 2Data TYPE RA START 0x00100000 END OXOO1OBFFF WIDTH 32 2Heap TYPECRA START O0x0010C000 END 0x0010C7FF WIDTH 32 2Stack TYPE RA START 0x0010C800 END 0x0010FFFF WIDTH 32 SDRAM TYPE RA START 0x04000000 END OxXO7FFFFFF WIDTH 32 SO TYPE RA START 0x08000000 END OxXOBFFFFFF WIDTH 32 Sl TYPE RA START Ox0CO00000 END COXOFFFFFFF WIDTH 32 end of memory the MO_ovly segment is for overlay storage PLIT assign the overlay ID of resolved symbol to j4 j4 PLIT_SYMBOL_OVERLAYID C 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for TigerSHARC Processors assign run address of resolved symbol to j5 j5 PLIT_SYMBOL_ADDRESS JUMP _OverlayManager LIBRARIES libc dl1b OBJECTS ts_hdr doj PROCESSOR PO PO_OBJECTS main doj manager doj OUTPUT Mgrovly dxe SECTIONS text output section Code INPUT_SECTIONS PO_OBJECTS program LIBRARIES program Specify the first overlay This overlay is stored in the memory defined by MO_ovly It runs in the memory space defined by MOCode OVERLAY_INPUT OVERLAY_OUTPUT overlayl ovl The output archive file overlay olv contai
30. be familiar with the following topics e Command Line Object Files on page 2 48 e Command Line File Names on page 2 49 e Object File Types on page 2 51 Command Line Object Files The command line must list at least one typically more object file s to be linked together These files may be of several different types e Standard object D0J files produced by the assembler e One or more libraries archives each with a DLB extension Examples include the C run time libraries and math libraries included with VisualDSP You may create libraries of common or specialized objects Special libraries are available from DSP algo rithm vendors For more information see Chapter 6 Archiver e An executable DXE file to be linked against Refer to COMMAND_LINE_LINK_AGAINST in Built In LDF Macros on page 3 27 2 48 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Object File Names Object file names are not case sensitive An object file name may include e The drive directory path file name and file extension e The directory path may be an absolute path or a path relative to the directory where the linker is invoked e Long file names enclosed within straight quotes If the file exists before the link begins the linker opens the file to verify its type before processing the file Table 2 8 lists valid file extensions used by the linker Command Line File Names
31. e External memory bank space the region for standard addressing of off chip memory including SDRAM MBO MB1 and Host e External multiprocessor space the on chip memory of all other TigerSHARC processors connected in a multiprocessor system e Internal address space the region for standard internal addressing In the example system the ADSP TS101 processor has internal memory addresses from 0x0 to 0x17FFFF Refer to Table 2 6 Table 2 6 ADSP TS101 Processor Memory Structure Block Range Word Size MO memory block 0x0000 0000 0x0000 FFFF 32 bit instructions 0x0001 0000 0x0007 FFFF Reserved M1 memory block 0x0008 0000 0x0008 FFFF 32 bit instructions 0x0009 0000 0x0009 FFFF Reserved M2 memory block 0x0010 0000 0x0010 FFFF 32 bit instructions 0x0011 0000 0x0017 FFFF Reserved VisualDSP 4 0 Linker and Utilities Manual 2 35 www BDTIC com ADI Link Target Description Table 2 6 ADSP TS101 Processor Memory Structure Contd Block Range Word Size Internal registers 0x0018 0000 0x0018 O7FF Control status and I O registers This cannot be used in LDF files Internal registers are memory accessible in MP space only 0x0018 0800 OxO1BF FFFF Reserved 0x01C0 0000 OxO3FF FFFF Broadcast and multiprocessor not used in LDF file SDRAM 0x0400 0000 OxO7FF FFFF 32 bit instruct
32. expanding items 4 23 expanding LDF macros 4 13 Global Properties 4 52 heap properties 4 71 icons 4 15 Input Sections pane 4 12 Input Sections pane menu 4 12 invalid memory segments 4 21 launching 4 3 Legend dialog box 4 15 mapping sections in 4 14 memory map graphical view 4 25 Memory Map pane 4 19 memory segment properties 4 61 multiprocessing tasks 4 46 object properties 4 51 output section properties 4 62 overlay properties 4 69 overlays 4 36 overview 2 14 4 2 packing properties 4 65 processor properties 4 53 profiling object sections 4 42 properties for overlays 4 55 removing LDF macro 4 13 resize cursor 4 29 sorting objetcs 4 17 specifying new memory segments 4 23 stack properties 4 71 symbols properties 4 58 vewing icons and colors 4 15 viewing section contents 4 38 viewing symbols 4 41 Expert Linker shared memory properties 4 74 external execution packing 3 43 INDEX external memory TigerSHARC processors 2 35 extracting data from ELF executable files B 1 F file extension conventions 2 49 filename linker command line switch 2 55 files ASM A 3 assembler A 5 build A 5 C C A 2 DAT A 3 debugger A 9 DLB A 5 DOJ A 5 dumping contents of B 1 DXE A 6 executable A 6 format references A 10 formats A 1 input A 2 LDR ASCH format A 8 LDR hex format A 6 library A 5 linker command line 2 49 linker command line TXT
33. internal memory defheapseg ldf_defheap_base ldf_defheap_size MEMORY_SIZEOF M2Heap VisualDSP 4 0 Linker and Utilities Manual C 9 www BDTIC com ADI Linking an ADSP TS101 MP Shared Memory System gt M2Heap end PSHO sections end PSHO processor The third and final link project defined in this LDF file is another DXE project and will be linked against both the SHARED project and the PSHO DXE project PROCESSOR_PSH1 PSH1_OBJECTS pshl doj ts_hdr doj LINK_AGAINST shared sm psh0 dxe OUTPUT pshl dxe SECTIONS places code instructions in MO internal memory code FILL 0xb3c00000 INPUT_SECTION_ALIGN 4 INPUT_SECTIONS PSH1_OBJECTS program LIBRARIES program gt MOCode place data in M2 internal memory datal INPUT_SECTIONS PSH1_OBJECTS datal LIBRARIES datal gt M2Data place data in M1 internal memory data2 INPUT_SECTIONS PSH1_OBJECTS data2 LIBRARIES data2 gt M1Data place C RTL initializers in M2 internal memory ctor INPUT_SECTIONS LIBRARIES ctor0 C 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for TigerSHARC Processors INPUT_SECTIONS LIBRARIES ctor1 INPUT_SECTIONS LIBRARIES ctor2 INPUT_SECTIONS LIBRARIES ctor3 INPUT_SECTIONS LIBRARIES ctor gt M2Data place C RTL heap table in M2
34. ldf_stack_space Assign end address of stack to ldf_stack_end variable ldf_stack_end Idf_stack_space MEMORY_SIZEOF MemStack 4 gt MEM_STACK Allocate a heap segment for dynamic memory allocation heap VisualDSP 4 0 Linker and Utilities Manual E 9 www BDTIC com ADI Linking for C Source File Example 1 Assign start address of heap to ldf_heap_space variable using the LDF s current location counter ldf_heap_space Assign end address of heap to Idf_heap_length variable ldf_heap_end ldf_heap_space MEMORY_SIZEOF MemHeap 1 Assign length of heap to ldf_heap_length variable ldf_heap_length ldf_heap_end ldf_heap_space gt MEM_HEAP end SECTIONS end PROCESSOR pO VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blac kfin Proc essors Linking for Complex C Source File Example 2 Listing 1 3 shows an example LDF that describes the memory placement of a C source file This file contains code and data that is to reside in and execute from L1 L2 Scratchpad SRAM and external SDRAM Banks 0 through 3 The LDF file includes two commands MEMORY and SECTIONS which are used to describe specific memory and system information Refer to Notes for Listing 3 2 on page 3 9 for information on items in this com plex example Listing E 8 Complex C Source File Example static section Fast_Code void MEM_DMA_
35. oOo0g0g00Sftfe gt Figure 4 30 Output Section Contents in Hex Format To display the contents of an output section 1 In the Memory Map pane right click an output section 4 38 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker 2 Choose View Section Contents from the menu The Section Contents dialog box appears By default the memory section content appears in Hex format 3 Right click anywhere in the section view to display a menu with these selections e Go To Displays an address in the window e Select Format Provides a list of formats Hex Hex and ASCII and Hex and Assembly Select a format type to specify the memory format Figure 4 31 and Figure 4 32 illustrate memory data formats available for the selected output section Section Contents zix Section PRIMES DO4J program J Section contents 000030 09901340 003a08bc 96400001 400c8015 000040 70011570 111c0004 01202008 fc8708fc 000050 75082fc5 400145248 e9aa1800 O5082fd5 000060 086fc52a e9aa1800 05086fd4 22200f08 o 000070 bfd 0d04 710d0611 010ca415 0057082c 000080 951c0004 2a79aal8 0001082c 9522615f 000090 O8bc9640 000a08bf d61c0000 O8afc708 O000A0 6fc52228 Of08bfc6 082c950d O47b0d06 000080 11010ca4 15101715 70114000 05157051 0000C0 80000115 70111c00 04012030 082c9522 0000D0 615f08be 96400008 O8bfd6le 00004000 0000E0 01157011 1c000401 20104000 011c00
36. 2 2 Directing Linker Operaia oeer 2 3 Lakme Process Re cavemen 2 4 Linker Description File Overview scicuiociissnecaaemacnuaaen 2 5 Lioking Eoyitonment casita binaducrisienaceitanidianninuinainielandeamniunutiboiealaes 2 6 Peet a piece ee ei ae eee ene es 2 6 Foen LIEF sorna 2 14 Linker Warming and Errar Messages ocsacsnrinonisinnsiatss 2 15 Lisle Toet Desai pioi sarran a A 2 16 Representing Memory Architecture scsuncarsinusnrinsnrasna 2 17 Specityiog the Memory Map renisrocrnecukstinsioieiiataias 2 17 iv VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Usage and Default Memory Sections Default Memory Sections for SHARC Processors Ce E E A seg ini code sccucenibikasirdatoiinrihe nbin a e eam ther Memory Sedins ae orsiasinnieuguaioucia Default Memory Sections for TigerSHARC Processors PROTON nisnin Ra RASNE T a a cen em nye ttre Es er eer eee er eT TEE ane er CaN en Te ent errant er ee UPS Rect cape tate ee te OR tnt ra CONTENTS VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI CONTENTS PA sateen inte rcereeieiee 2 24 PTA scent cance mam genmeemnsainael 2 24 OE aa AAN 2 25 Default Memory Sections for Blackfin Processors 0 2 25 pogram i aiitinesmciandeeatnnimaanianazipauiieindas 2 26 daital Ss ciaiieieciaauts ais nntinashiehwiaanasabbinhbabbeaudasbipeiaiaubdadiens 2 26 E COE porcine deer eae 2 26 COG OAN AEAEE EE A 2 27 E E AE A E E E 2 27
37. 20 Reducing Overlay Manager Overhead sisriororinininiiararii 5 20 VisualDSP 4 0 Linker and Utilities Manual xiii www BDTIC com ADI Using PLIT and Overlay Manager ccccececccccesesseseeeeeeeceees 5 25 8 ig 8 bier Oera Cals ppconandenes a 5 27 Tnet Procesor Call snsernars nner 5 27 Advanced LDF Commands mecsre innn N 5 30 MPMEMORT 1 cxiccsenuicccentnniiideunteuidimaeutnuieas 5 30 OVERLAY GROUP sbudisnehatiinenaienerincikueeaemaeualiiabeass 5 32 Unerp ped Overlay Execution secsrsrinaiinn 5 33 Gionped Teil Erection es dacsterccomctsamotennsresvaeestiatoseven 5 35 lig ty ieee omer ORe Snir mmen Tee SUR CRUnINT Ptr Ere emer ee cern nr nee 5 36 PELLIT Ne so sontecs tie lated seirtea N 5 36 Command Evaluation and Setup acssiariasnbicririenii 5 37 Overlay PLIT Requirements and PLIT Examples 2 cccccc s lt 0 5 38 PEIE OMI ocuccrtieceeidniseiene eases 5 40 SHARED A areor 5 40 ARCHIVER e COAG 22 E N T E E E 6 2 Creating a Library From VialDS PFE sa rescircsrcssancinaisansavacsncancen 6 3 Making Archived Functions Usable secrnenssmceesinecsnsiia 6 3 Writing Archive Routines Creating Entry Points 0 6 4 Accessing Archived Functions From Your Code c00 6 5 Arebiv r File Searches ecene aera ieeseioss 6 6 Tagging an Archive With Version Information 00 6 6 Basic Version Mniotmatioii secer 6 6 User Defined Version Information ssssesssssesessssseeresseeee 6 7 xiv VisualDSP 4 0 Linker and
38. 28 bsz_init memory section 7 8 bsz input section 2 22 2 24 2 25 2 28 buffers allocating to different memory segments 2 44 build files description of A 5 built in LDF macros 3 27 bus lock D 11 multiprocessor systems D 11 byte order 4 65 packing 4 66 C cache memory 2 36 caching external memory 3 8 callback executable file 7 3 7 5 7 15 calls inter overlay 5 27 inter processor 5 27 c archiver command line switch 6 12 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI C C source files A 2 cht input section 2 31 chtl input section 2 31 color selection in Expert Linker 4 15 command LDF scope 3 17 command line arguments base address setting 2 46 COMMAND_LINE_LINK_AGAINST LDF macro 3 27 COMMAND_LINE_OBJECTS LDF macro 3 27 COMMAND_LINE_OUTPUT_DIRE CTORY LDF macro 3 27 COMMAND_LINE_OUTPUT_DIRE CTORY macro 2 63 COMMAND_LINE_OUTPUT_FILE LDF macro 3 13 3 27 COMMAND_LINE_OUTPUT_FILE macro 2 63 commands LDF 3 29 5 30 linker 2 47 comma separated option 2 60 comments LDF file 3 16 compiler source files C CC 1 3 constdata input section 2 25 2 27 constructors 2 20 2 23 2 28 converting library members to source code B 3 out of range short calls and jumps 2 61 2 62 cplb_code input section 2 25 2 26 ___cplb_ctrl configuration variable 3 8 cplb_data input section 2 25 2 27 Create LDF wizard 4 4 ctor input sect
39. 61 e Managing Output Section Properties on page 4 62 e Managing Packing Properties on page 4 65 e Managing Alignment and Fill Properties on page 4 67 e Managing Overlay Properties on page 4 69 e Managing Stack and Heap in Processor Memory on page 4 71 e Managing Shared Memory Properties on page 4 74 VisualDSP 4 0 Linker and Utilities Manual 4 51 www BDTIC com ADI Managing Object Properties Managing General Global Properties To access Global Properties right click in the Input Sections pane and choose Properties The Global Properties dialog box appears The General tab of the Global Properties dialog box provides these selec tions Figure 4 43 e Linker map file displays the map file generated after linking the project This is a read only field If Show stack heap usage is selected after you run a project Expert Linker shows how much of the stack and heap were used e If Profile execution of object sections is selected Expert Linker enables the profiling feature that allows you to see hotspots in object sections and to fine tune the placement of object sections Global Properties BE General l Processor PLIT Elimination Linker map C examples myproject ldf I Show stack heap usage IV Profile execution of object sections Cancel Figure 4 43 General Page of the Global Properties Dialog Box 4 52 VisualDSP 4 0 Linker and Utilities Manual
40. 7 3 Project Options for NewProject1 E Project Link Processor Fig Compile Allow indirect e Eh General 1 E General 2 OF 2 E Preprocessor fy Processor 1 Das Processor 2 Eh LDF Preprocessing Ls Elimination or memini flag meminit init callback1 dxe init callbaxk2 dxe Figure 7 3 Invoking Callback Executable from the VisualDSP IDDE Invocation of Memory Initializer from a Command Line To directly invoke the Memory Initializer from a command line use the Init switch for each callback executable as shown below meminit exe Input dxe o Output dxe Init Callbackl dxe Init Callback2 dxe 7 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initializer Memory Initializer Command Line Switc hes The Memory Initializer provides a number of command line switches They are not case sensitive Table 7 1 provides a summary of the Memory Initializer switches It is followed by a detailed description of each switch The listed switches are mostly optional For a project in which the linker description file is well defined the meminit and bsz_init memory sec tions are defined and the ZERO_INIT and RUNTIME_INIT qualifiers are set on the proper sections and the sections are all initialized properly in the source files most of these optional switches may not be necessarily required By default the Memory Initializer automatically handles every
41. A 5 object 2 51 output 1 7 OVL A 6 SM A 6 TXT A 5 XML A 6 FILL LDF command 3 32 3 52 FIRST_FIT LDF identifier 3 54 flags meminit linker command line switch 2 60 flags pp linker command line switch 2 60 VisualDSP 4 0 Linker and Utilities Manual I 5 www BDTIC com ADI INDEX FORCE_CONTIGUITY LDF command 3 55 fragmented memory filling in 2 60 frt input section 2 31 frtl input section 2 31 G gaps inserting into memory segment 4 35 gdt input section 2 30 gdtl input section 2 30 global LDF scope 3 17 Global Properties dialog box General tab 4 52 PLIT tab 4 55 viewing 4 24 H heap graphic representation 4 71 input section 2 19 2 25 managing in memory 4 71 heap input section 2 29 heaptab input section 2 22 2 24 hex format files LDR A 6 h help command line switch 7 15 h help linker command line switch 2 60 I icons Expert Linker 4 15 unmapped icon 4 14 IDDE_ARGS option 2 45 i filename archiver command line switch 6 12 IgnoreSection SectionName command line switch 7 15 i include search directory linker command line switch 2 60 INCLUDE LDF command 3 32 individual data placement option 2 61 Initialization Flag 7 8 initialization qualifier choosing in Expert Linker 4 63 initialization stream 7 2 generated from Memory Initializer 7 2 inserting executable file into 7 15 start address 7 14 structure 7 5 Init Initcode dxe co
42. Chapter 2 Linker describes the linking process and how the LDF file ties into the linking process When generating a new LDF file use the Expert Linker to generate an LDF file Refer to Chapter 4 Expert Linker for details The LDF file allows code development for any processor system It defines your system to the linker and specifies how the linker cre ates executable code for your system This chapter describes LDF file syntax structure and components Refer to Appendix C LDF Programming Examples for TigerSHARC Processors Appendix D LDF Programming Examples for SHARC Processors and Appendix E LDF Programming Examples for Blackfin Proces sors for the LDF examples for typical systems This chapter contains LDF File Overview on page 3 3 LDF Structure on page 3 16 LDF Expressions on page 3 18 LDF Keywords Commands and Operators on page 3 19 LDF Operators on page 3 21 LDF Macros on page 3 26 LDF Commands on page 3 29 VisualDSP 4 0 Linker and Utilities Manual 3 1 www BDTIC com ADI The linker runs the preprocessor on the LDF file so you can use preprocessor commands such as def ines within the file For information about preprocessor commands refer to a VisualDSP 4 0 Assembler and Preprocessor Manual for an appropriate target processor architecture Assembler section declarations in this document correspond to the assembler s
43. DOJ program _L_250007 Ox2a 0x0 STB_LOCAL PRIMES DOJ program _L_250008 0x2a6 0x0 STB_LOCAL PRIMES DOJ program _L_316000 O0x2c4 0x0 STB_LOCAL PRIMES DOJ program _L_316001 0x281 0x0 STB_LOCAL PRIMES DOJ program _L_316002 0x284 0x0 STB_LOCAL PRIMES DOJ program _EPC_text 0x273 0x0 STB_LOCAL PRIMES DOJ program _main Ox273 0x0 STB_GLOB PRIMES DOJ program program 0x273 0x0 STB_LOCAL PRIMES DOJ program m Figure 4 33 View Symbols Dialog Box 1 In the post link view of the Memory Map pane select the item memory segment output section or input section whose symbols you want to view 2 Right click and choose View Symbols The View Symbols dialog box displays the selected item s symbols The symbol s address size binding file name and section appear beside the symbol s name VisualDSP 4 0 Linker and Utilities Manual 4 4 www BDTIC com ADI Memory Map Pane Profiling Object Sections Use Expert Linker to profile object sections in your program After doing so Expert Linker graphically displays how much time was spent in each object section so you can locate code hotspots and move the code to faster internal memory The following is a sample profiling procedure Start by selecting Profile execution of object sections in the General page of the Global Properties dialog box Figure 4 34 Global Properties BE General l Processor PLIT Elimination Linker map C examples myproject ldf I
44. Delimit the list of names with commas Example To place section program of object foo doj in library myLib d1b INPUT_SECTIONS myLib dlb foo doj program expression In a section_command an expression manipulates symbols or positions the current location counter See LDF Expressions on page 3 18 for details FILL hex number In a section_command the FILL command fills gaps created by aligning or advancing the current location counter with hexadecimal numbers The FILL command is used only within a section declaration By default the linker fills gaps with zeros Specify only one FILL com mand per output section For example FILL 0x0 or FILL OXFFFF PLIT plit_commands In a section_command a PLIT command declares a locally scoped pro cedure linkage table PLIT It contains its own labels and expressions For more information see PLIT on page 5 36 3 52 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File OVERLAY_INPUTfoverlay_commands In a section_command OVERLAY_INPUT identifies the parts of the pro gram to place in an overlay executable 0VL file For more information on overlays see Memory Management Using Overlays on page 5 4 and OVERLAY_GROUP on page 5 32 For overlay code examples see Linking for Overlay Memory on page C 12 and Linking for Overlay Memory on page D 13 The over
45. ELF file contents B 1 ELF file dumper about B 1 command line switches B 1 extracting data B 1 overlay library files B 4 references A 10 elfloader exe loader utility 1 10 elfspl21k exe splitter utility 1 10 ELIMINATE LDF command 3 31 ELIMINATE_SECTIONS LDF command 3 32 elimination enabling 3 31 3 33 specifying properties 4 56 Memory Initializer switches h 7 15 emulation passing arguments in Blackfin processors 2 46 encryption constraints 6 16 symbol names in libraries 6 15 end address memory segment 3 38 end label 3 31 ENDO LDF identifier 3 38 errata workaround 2 64 errors linker 2 15 es eliminate listed sections linker command line switch 2 59 ev eliminate unused symbols verbose linker command line switch 2 59 executable files 1 7 A 6 expanding items in memory map 4 23 Expert Linker about 4 1 adding input sections 4 13 adding LDF macros 4 13 adding object files 4 13 adding output section to memory segment 4 23 adding overlay 4 23 adding shared memory 4 23 adding shared memory segments 4 46 alignment properties 4 67 allocaing for heap 4 71 allocaing for stack 4 71 choosing initialization qualifier 4 63 color selection 4 15 context menu 4 22 deleting objects 4 13 deleting selected object 4 23 1 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI displaying global properties 4 14 displaying section contents 4 14 elimination properties 4 56
46. Files H on page A 4 e Linker Description Files LDF on page A 4 e Linker Command Line Files TXT on page A 5 C C Source Files These are text files with extensions such as C CPP CXX and so on containing C C code compiler directives possibly a mixture of assembly code and directives and typically preprocessor commands Several dialects of C code are supported pure portable ANSI C and at least two subtypes of ANSI C with ADI extensions These extensions include memory type designations for certain data objects and segment directives used by the linker to structure and place executable files For information on using the C C compiler and associated tools as well as a definition of ADI extensions to ANSI C see the VisualDSP 4 0 C C Compiler and Library Manual for appropriate target architectures 1 With and without built in function support a minimal differentiator There are others A 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI File Formats Assembly Source Files ASM Assembly source files are text files containing assembly instructions assembler directives and optionally preprocessor commands For infor mation on assembly instructions see your processor s Programming Reference The instruction set is supplemented with assembler directives Preprocessor commands control macro processing and conditional assem bly or compilation For in
47. Formats Convention Description Oxnumber Hexadecimal number H fnumber hifnumber number Decimal number D tnumber d number Bitnumber Binary number b number O number Octal number of number Header Files H Header files are ASCII text files that contain macros or other preprocessor commands that the preprocessor substitutes into source files For informa tion on macros or other preprocessor commands see the VisualDSP 4 0 C C Compiler and Library Manual for appropriate target architectures For information on the assembler and preprocessor see the VisualDSP 4 0 Assembler and Preprocessor Manual Linker Desc nption Files LDF Linker Description Files are ASCII text files that contain commands for the linker in the linker s scripting language For information on this scripting language see LDF Commands on page 3 29 A 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI File Formats Linker Command Line Files TXT Linker command line files are ASCII text files that contain command line input for the linker For more information on the linker command line see Linker Command Line Reference on page 2 47 Build Files Build files are produced by the VisualDSP development tools when building a project This section describes these build file formats e Assembler Object Files DOJ on page A 5 e Library Files DLB on page A 5 e Linker
48. Initializer utility see Memory Initializer for more information flags pp optl opt2 The flags pp switch passes each comma separated option to the preprocessor Use flags pp with caution For example if the pp legacy com ment syntax is enabled the comment characters become unavailable for non comment syntax h elp The h or help switch directs the assembler to output to lt stdout gt a list of command line switches with a syntax summary i directory The idirectory or Idirectory include directory switch directs the linker to append the specified directory or a list of directories separated by semicolons to the search path for included files ip This switch is not used with Blackfin processors The ip individual placement switch directs the linker to fill in frag mented memory with individual data objects that fit When the ip switch is specified on the linker s command line or via the VisualDSP IDDE the default behavior of the linker placing data blocks in consecu 2 60 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker tive memory addresses is overridden The ip switch allows individual placement of a grouping of data in processor memory to provide more efficient memory packing Absolute placements take precedence over data program section place ments in contiguous memory locations When remaining memory space is not sufficient for the entire sec
49. InstallationPath gt TS Examples A variety of processor specific default LDF files come with the development software providing information about each proces sor s internal memory architecture Default LDF files are in the following directories lt VisualDSP InstallationPath gt TS ldf VisualDSP 4 0 Linker and Utilities Manual C 1 www BDTIC com ADI Linking a Single Processor System Linking a Single Processor System When linking an executable for a single processor system the LDF describes the processor s memory and places code for that processor The LDF in Listing C 1 shows a single processor LDF Note the following commands in this LDF ARCHITECTURE defines the processor type SEARCH_DIR adds the 1ib and current working directory to the search path 0BJS and LIBS macros get object D0J and library DLB file input MAP outputs a map file MEMORY defines memory for the processor PROCESSOR and SECTIONS defines a processor and place pro gram sections for that processor s output file using the memory definitions Listing C 1 Single Processor System LDF Example ARCHITECTURE ADSP TS201 SEARCH_DIR ADI_DSP TS Tib MAP SINGLE PROCESSOR MAP Generate a MAP file LIBS ADI_DSP is a predefined linker macro that expands to the VisualDSP installation directory Search for objects in directory TS lib relative to the installation directory
50. LDF Source ARCHITECTURE ADSP TS201 OBJECTS COMMAND_LINE_OBJECTS Libraries amp objects from the command line MEMORY SDRAM TYPE RAM START Ox04000000 END OxXO7FFFFFF WIDTH 32 end segment end memory PROCESSOR PO LINK_AGAINST COMMAND_LINE_LINK_AGAINST OUTPUT COMMAND_LINE_OUTPUT_FILE NO_INIT section isn t written to the output file SECTION sdram_output NO_INIT INPUT_SECTIONS OBJECTS sdram_area gt mem_sdram SECTION zero_sdram_output ZERO_INIT INPUT_SECTIONS OBJECTS zero_sdram_area gt mem_sdram end section end processor PO VisualDSP 4 0 Linker and Utilities Manual C 5 www BDTIC com ADI Linking an ADSP TS101 MP Shared Memory System Linking an ADSP TS101 MP Shared Memory System When linking executable files for a multiprocessor system using shared memory the LDF file describes the multiprocessor memory offsets shared memory each processors memory and places code for each processor Note the following in the example LDF file in Listing C 4 on page C 6 e The ARCHITECTURE command defines the processor type which can only be one type e The MPMEMORY command defines each processor s offset within multiprocessor memory e The SHARED_MEMORY command identifies the output for the shared memory items e The MEMORY command defines memory for the processors e The PROCESSOR and SECTIONS commands define each
51. Linker Desc ription File Segment Declarations A segment declaration declares a memory segment on the target proces sor Although an LDF file may contain only one MEMORY command that applies to all scopes there is no limit to the number of memory segments declared within a MEMORY command Each segment declaration must contain a segment_name TYPE START LENGTH or END and a WIDTH Parts of a segment declaration are described as e segment_name Identifies the memory region The segment_name must start with a letter underscore or point may include any letters underscores digits and points and must not conflict with LDF keywords e 6START address_number Specifies the memory segment s start address The address_number must be an absolute address e 6TYPEC Identifies the architecture specific type of memory within the memory segment Note Not all target processors support all types of memory The linker stores this information in the executable file for use by other development tools e For Blackfin and TigerSHARC processors use TYPE to spec ify the functional or hardware locus RAM or ROM The RAM declarator specifies segments that need to be booted ROM segments are not booted they are executed loaded directly from off chip PROM space VisualDSP 4 0 Linker and Utilities Manual 3 37 www BDTIC com ADI LDF Commands e For SHARC ADSP 21xxx processors use TYPE to specify two paramet
52. NPUT_SECTIONS PSHO_OBJECTS heaptab LIBRARIES heaptab gt M2Data VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for TigerSHARC Processors place C RTL JALU stack in MO internal memory jstackseg ldf_jstack_limit ldf_jstack_base MEMORY_SIZEOF M2Stack gt M2Stack place C RTL KALU stack in M1 internal memory kstackseg ldf_kstack_limit ldf_kstack_base MEMORY_SIZEOF M1Stack 1Stack Vv place C RTL heap in MO internal memory defheapseg ldf_defheap_base By ldf_defheap_size MEMORY_SIZEOF M2Heap gt M2Heap end PO sections end PO processor VisualDSP 4 0 Linker and Utilities Manual C 15 www BDTIC com ADI Linking for Overay Memory C 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI D LDF PROGRAMMING EXAMPLES FOR SHARC PRO C ESSO RS This appendix provides several typical LDFs used with SHARC proces sors As you modify these examples refer to the syntax descriptions in LDF Commands on page 3 29 This appendix provides the following examples e Linking a Single Processor SHARC System on page D 2 e Linking Large Uninitialized Variables on page D 4 e Linking for MP and Shared Memory on page D 6 e Linking for Overlay Memory on page D 13 The source code for several programs is bundled with your devel opment software Each program
53. O processor provides data transfers between internal memory and the processor s communica tion ports link ports serial ports and external port without hindering the processor core s access to memory The processor provides access to external memory through the processor s external port The processor contains one megabit of on chip SRAM organized as two blocks of 0 5 Mbits Each block can be configured for different combina tions of code and data storage All of the memory can be accessed as 16 bit 32 bit 48 bit or 64 bit words The memory can be configured in each block as a maximum of 16 Kwords of 32 bit data 8 Kwords of 64 bit data 32K words of 16 bit data 10 67 Kwords of 48 bit instructions or 40 bit data or combinations of different word sizes up to 0 5 Mbit This gives a total for the complete internal memory a maximum of 32 Kwords of 32 bit data 16 Kwords of 64 bit data 64 Kwords of 16 bit data and 21 Kwords of 48 bit instructions or 40 bit data The processor features a 16 bit floating point storage format that effec tively doubles the amount of data that may be stored on chip A single instruction converts the format from 32 bit floating point to 16 bit floating point While each memory block can store combinations of code and data accesses are most efficient when one block stores data using the DM bus typically Block 1 for transfers and the other block typically Block 0 stores instructions and data u
54. START 0x00050000 END OxO00051fff WIDTH 32 seg_heap TYPE DM RAM START 0x00052000 END Ox00052f ff WIDTH 32 seg_stak TYPE DM RAM START 0x00053000 END Ox00053f ff WIDTH 32 mem_pmco is the run memory segment mem_ovly is the live memory segment Processor and application specific assembly language instructions One instance of these instructions is generated for each symbol resolved in overlay memory PLIT Each of five instructions are duplicated for each symbol in an overlay VisualDSP 4 0 Linker and Utilities Manual D 13 www BDTIC com ADI Linking for Overay Memory RO PLIT_SYMBOL_OVERLAYID Assigns overlay ID of the resolved symbol to RO R1 PLIT_SYMBOL_ADDRESS Assigns run address of resolved symbol to R1 dm _overlayID RO dm _pf R1 JUMP _OverlayManager LIBRARIES libcl6l dlb OBJECTS 161_hdr doj PROCESSOR PO PO_OBJECTS main doj manager doj OUTPUT mgrovly dxe SECTIONS text output section seg_pmco INPUT_SECTIONS PO_OBJECTS seg_pmco LIBRARIES seg_pmco Specify the first overlay This overlay is stored in the memory defined by mem_ovly It runs in the memory space defined by mem_pmco OVERLAY_INPUT The output archive file overlayl olv contains the code and symbol table for this overlay OVERLAY_OUTPUT overlayl ovl Take the code from overlayl
55. The linker will pass the si revision lt silicon version gt switch when invoking another VisualDSP tool for example when the linker invokes the assembler Example The TigerSHARC linker invoked as linker proc ADSP TS201 si revision 0 1 invokes the assembler with easmts proc ADSP TS201 si revision 0 1 sp The sp skip preprocessing switch directs the linker to link without pre processing the LDF file t The t trace switch directs the linker to output the names of link objects to standard output as the linker processes them v erbose The v or verbose verbose switch directs the linker to display version and command line information for each phase of linking VisualDSP 4 0 Linker and Utilities Manual 2 65 www BDTIC com ADI Linker Command Line Reference version The version display version switch directs the linker to display version information for the linker wamonce The warnonce single symbol warning switch directs the linker to warn only once for each undefined symbol rather than once for each reference to that symbol xref filename The xref filename external reference file switch directs the linker to produce a cross reference file xref xm1 file 2 66 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 3 UNKER DESCRIPTION FILE Every DSP project requires one Linker Description File LDF The LDF file specifies precisely how to link projects
56. Utilities Manual www BDTIC com ADI Printing Version Informati n ceccasssrssornensresiseis 6 8 Removing Version Information From an Archive 6 9 Checking Version Number cette rdnnnnmmnnsmmnins 6 9 Adding Texet to Version Information cusriacesinseiimares 6 10 Archiver Command Line Reference snrorigistissiikiriiketiiikii 6 11 elar Command SA ce cnioneeorrseaeeamnticememereonens 6 11 Archiver Parameters and Switches uak eee 6 12 Command Line Constants serrare 6 14 Archiver Symbol Name Encryption sesirsresiiririnreiens 6 15 MEMORY INITIALIZER Memory Initielizer ee sorasa n nian 7 2 Basic Operation of Memory Initializer sei ciccecccacccesenseascodesedecadetencexse 7 3 lapot and Gutpot Fes acetic de RO N 7 3 Tuitialization Serea Biter sis ssciscisasicsndvsinienscinsioliniaiaaniianeaiens 7 5 Run Time Library Routine Basic Operation csscsisnernoneeorarrws 7 6 Using the Memory Initialize sicsnenas eae ene eeeeeewieden 7 7 Preparing the Linker Description File LDF siersisnianissaniavednasses 7 7 Preparing the Sonce File rrr 7 8 Invoking the Memory nitializer sicsssisrinnensneinincnnea 7 10 Invoking Memory Initializer from the VisualDSP IDDE 7 10 Invoking Memory Initializer from Command Line 7 11 Invoking Memory Initializer from Linker s Command Line 7 11 Invoking Memory Initializer from Compilers Command Line 7 11 Invoking Memory Initializer with Callback Executables 7 11 VisualDSP 4 0 Linker and U
57. and Index commands Open online Help from context sensitive user interface items tool bar buttons menu commands and windows VisualDSP 4 0 Linker and Utilities Manual xxvii www BDTIC com ADI Product Information Accessing Documentation From Windows In addition to any shortcuts you may have constructed there are many ways to open VisualDSP online Help or the supplementary documenta tion from Windows Help system files CHM are located in the Help folder of VisualDSP environment The PDF files are located in the Docs folder of your VisualDSP installation CD ROM The Docs folder also contains the Dinkum Abridged C library and the FlexLM network license manager software documentation Using Windows Explorer e Double click the vdsp help chm file which is the master Help sys tem to access all the other CHM files e Open your VisualDSP installation CD ROM and double click any file that is part of the VisualDSP documentation set Using the Windows Start Button e Access VisualDSP online Help by clicking the Start button and choosing Programs Analog Devices VisualDSP and VisualDSP Documentation Accessing Doc umentation From the Web Download manuals in PDF format at the following Web site http www analog com processors resources technicalLibrary manuals Select a processor family and book title Download archive Z1P files one for each manual Use any archive management software suc
58. and Utilities Manual 5 5 www BDTIC com ADI Memory Management Using Ovenlays External Memory Internal Memory Overlay 1 FUNG_A Main callFUNG_H call pit_FUNG_A Overlay 2 OverlayManager Overlay3 FUNGTE Overlay 1 and2 Runtime Memory Overlay 4 FUNG_F FUNC G y Overlay 3 and 4 Runtime Memory Figure 5 1 Memory Overlays the location in internal memory where overlay 2 is designated to run When FUNC_D is required the overlay manager loads overlay 3 into its des ignated run time memory The transfer is typically implemented with the processor s Direct Memory Access DMA capability The overlay manager can also handle advanced functionality such as checking whether the requested overlay is already in run time memory executing another function while loading an overlay and tracking recursive overlay function calls 5 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands Overlay Managers An overlay manager is a user definable routine responsible for loading a referenced overlay function or data buffer into internal memory run time space This task is accomplished with linker generated constants and PLIT commands Linker generated constants inform the overlay manager of the overlay s live address where the overlay resides for execution and the number of words in the overlay PLIT commands inform the overlay manager of the requested overla
59. and has no effect on callback executable files The Memory Initializer does not carry any sections of a callback executable file over to the output file nor erase any sections but only extracts the code and data from it to form the ini tialization stream 7 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initializer o Outputfile dxe The o Output file dxe switch is used to specify an output file If this switch is absent the Memory Initializer makes up an output file name from the root of the input file name For example the output file name is created as InputFilel dxe if the input file name is InputFile dxe This switch is optional Section Sectionname The Section Sectionname switch is used to specify a section from which the data is extracted by the Memory Initializer This switch can be repeated to specify a number of the sections from the specified input pri mary file All the section specified must exist in the specified input primary file Note that the section name specified via the SectDestination or IgnoreSection switches cannot be used with the Section switch It is not necessary to use this switch to specify any sections which already have the ZERO_INIT or RUNTIME_INIT qualifiers in the linker description file LDF as the Memory Initializer processes such sections automati cally Using initialization qualifiers in the LDF file is usually the simpler and recommended method The
60. as for the n switch all Prints everything This is the same as fh ph sh notes n ost Omits string table sections v Prints version information objectfile Specifies the file whose contents are to be printed It can be a core file executable shared library or relocatable object file If the name is in the form A B A is assumed to be a library and B is an ELF member of the library B can be a pattern similar to the one accepted by n The n and i options can have a modifier letter after the main option character to force section contents to be formatted as a Dumps contents in hex and ASCII 16 bytes per line x Dumps contents in hex 32 bytes per line xN Dumps contents in hex N bytes per group default is N 4 t Dumps contents in hex N bytes per line where N is the section s table entry size If N is not in the range 1 to 32 32 is used hN Dumps contents in hex N bytes per group HN Dumps contents in hex MSB first order N bytes per group i Prints contents as list of disassembled machine instructions B 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Utilities Disassembling a Library Member The elfar and el fdump utilities are more effective when their capabilities are combined One application of these utilities is for disassembling a library member and converting it to source code Use this technique when the source of a particularly useful routine
61. at the specified memory segment The memory initializa tion post process fills this space with the data needed by the C run time library for run time initialization The MEMINIT section should be placed in non overlay memory See Memory Initializer for more information init_qualifier Specifies run time initialization type optional The qualifiers are e NO_INIT Contains un initialized data There is no data stored in the DXE file for this section equivalent to SHT_NOBITS legacy qualifier e ZERO_INIT Contains only zero initialized data If invoked with the meminit switch on page 2 62 the zeroing of the section is done at runtime by the C run time library If meminit is not specified the zeroing is done at load time e RUNTIME_INIT If the linker is invoked with the meminit switch this section fills at runtime If meminit is not spec ified the section fills at load time section_commands May consist of any combination of such commands and or expres sions such as INPUT_SECTIONS on page 3 51 expression on page 3 52 FILL hex number on page 3 52 PLIT plit_commands on page 3 52 OVERLAY_INPUT overlay_commands on page 3 53 3 50 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File e memory_segment Declares that the output section is placed in the specified memory segment The memor
62. code and data from callback executable files are extracted to make up the initialization stream This is an optional switch VisualDSP 4 0 Linker and Utilities Manual 7 15 www BDTIC com ADI Memory Initializer Command Line Switc hes InputFile dxe The InputFile dxe parameter is used to specify a primary input file The Memory Initializer issues an error message if no primary input file is specified NoAuto The NoAuto switch directs the Memory Initializer to not process sections in the primary input file based on the section header flags the section specified as either ZERO_INIT and RUNTIME_INIT qualifier in the LDF file but to only process sections specified on the command line using the section SectionName switch By default the Memory Initializer automatically processes only the sec tions with ZERO_INIT and RUNTIME_INIT qualifiers in the LDF file This switch has no effect on the the code and data of callback executable files specified using the init switch All the code and data sections of a call back executable file are processed by the Memory Initializer regardless of this switch being used or not This switch is optional NoErase The NoErase switch directs the Memory Initializer not to erase the data of the processed sections By default the Memory Initializer empties the sections from which the data are extracted to make up the initialization stream This switch is valid for the primary input file only
63. com processors resources technicalLibrary XXVI VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Online Preface Technical Documentation Online documentation includes the VisualDSP Help system software tools manuals hardware tools manuals processor manuals Dinkum Abridged C library and Flexible License Manager FlexLM network license manager software documentation You can easily search across the entire VisualDSP documentation set for any topic of interest using the Search function of VisualDSP Help system For easy printing supple mentary PDF files of most manuals are also provided Each documentation file type is described as follows File Description CHM Help system files and manuals in Help format HTM or Dinkum Abridged C library and FlexLM network license manager software doc HTML umentation Viewing and printing the HTML files requires a browser such as Internet Explorer 4 0 or higher PDF VisualDSP and processor manuals in Portable Documentation Format PDF Viewing and printing the PDF files requires a PDF reader such as Adobe Acrobat Reader 4 0 or higher Access the online documentation from the VisualDSP environment Windows Explorer or the Analog Devices Web site Accessing Documentation From VisualDSP From the VisualDSP environment Access VisualDSP online Help from the Help menu s Contents Search
64. define new symbols within the LDF file These examples define the starting stack address the highest possible stack address and the heap s starting location and size These newly created symbols are entered in the executable s symbol table VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 2 39 Link Target Description Placing Code on the Target Use the SECTIONS command to map code and data to the physical mem ory of a processor in a processor system To write a SECTIONS command 1 List all input sections defined in the source files Assembly files List each assembly code SECTION directive identify its memory type PM or CODE or DM or DATA and note when location is critical to its operation These SECTIONS por tions include interrupt tables data buffers and on chip code or data see Specifying Two Buffers in Different Memory Seg ments on page 2 44 for TigerSHARC specific information C C source files The compiler generates sections with the name program or code for code and the names data1 and data2 for data These sections correspond to your source when you do not specify a section by means of the optional section extension Compare the input sections list to the memory segments specified in the MEMORY command Identify the memory segment into which each SECTION must be placed Combine the information from these two lists to write one
65. doj only If there is data that this code needs it must be the INPUT of a data overlay or the INPUT to non overlay data memory INPUT_SECTIONS overlayl doj program Tell the linker that all code must fit into the run memory all at once Other ALGORITHM commands provide more optimized overlay support D 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for SHARC Processors ALGORITHM ALL_FIT gt mem_ovly This is the second overlay Note that the OVERLAY_INPUT commands must be contiguous in the LDF file to occupy the same run time memory OVERLAY_INPUT OVERLAY_OUTPUT overlay2 ovl INPUT_SECTIONS overlay2 doj seg_pmco gt mem_ovly gt dxe_pmco Instructions generated by the linker in the plit section must be placed in non overlay memory Here is the one and only specification telling the linker where to place these instructions plit linker inserts instructions here gt mem_pmco dxe_pmda INPUT_SECTIONS PO_OBJECTS seg_pmda LIBRARIES seg_pmda gt mem_pmda dxe_dmda INPUT_SECTIONS PO_OBJECTS seg_dmda LIBRARIES seg_dmda gt mem_dmda seg_init INPUT_SECTIONS PO_OBJECTS seg_init LIBRARIES seg_init gt mem_init dxe_rth VisualDSP 4 0 Linker and Utilities Manual D 15 www BDTIC com ADI Linking for Overay Memory NPUT_SECTIONS PO_OBJECTS seg_rth LIB
66. execute them before conducting the process of the memory initialization for the primary application This allows you to perform memory configuration and any other set up func tions that must occur before the code and data are extracted from ROM memory 7 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initializer Basic Operation of Memory Initalizer This section describes the basic operations of the Memory Initializer its input and output files as well as basic initialization stream generated by the Memory Initializer Input and Output Files The Memory Initializer takes an executable file DXE as a primary input file and augments it by adding an initialization stream The enhanced exe cutable file is written as the output file Processing the Primary Input Executable File After opening an input primary executable file the Memory Initializer looks for sections marked with the Initialization Flag in their section headers or specified from the command line and extracts the data and instructions from them to make the primary initialization stream By default the stream is saved in the dedicated memory section called meminit in the output file For the sections from which the Memory Initializer extracts no data the Memory Initializer simply copies them from the input file to the output file Sections that are processed by the Memory Initializer to form the initialization stream are not needed i
67. extract the data from them to make an initialization stream Any number of sections can be set as either ZERO_INIT or RUNTIME_INIT type in an LOF file Please note that there are two memory sections specified in a default LDF file which also serve the Memory Initializer bsz_init and meminit The bsz_init section is used to hold the pointer generated by the Memory Ini tializer which points to the start address of the initialization stream while the section meminit is used to hold the actual initialization stream gener ated by the Memory Initializer Although other sections may be selected as alternatives using the appropriate command line switches it is not rec ommended to do so Preparing the Source Files The sections marked with the ZERO_INIT and RUNTIME_INIT qualifiers need to be initialized with the proper values in the source files before being compiled The following example shows one way to initialize a section d Finclude lt stdio h gt fpragma section my_data_section RUNTIME_INIT unsigned int A 100 7 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initializer Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xa
68. file OVL VisualDSP 4 0 Linker and Utilities Manual 4 69 www BDTIC com ADI Managing Object Properties The Live Memory drop down list contains all output sections or memory segments within one output section The live memory is where the over lay is stored before it is swapped into memory The Overlay linking algorithm box permits one overlay algorithm ALL_FIT Expert Linker does not currently allow changes to this setting When ALL_FIT is used the linker tries to fit all of the mapped objects into one overlay The Placement box provides the following information e Live Address The starting address of the overlay e Run Address The starting address where the overlay is swapped into memory at runtime e Size The overlay s size Click the Packing tab to specify byte packing order The Browse button is only available after the overlay build and when the symbols are available Clicking Browse opens the Browse Symbols dialog box You can choose the address for the symbol group or let the linker choose the address 4 70 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Managing Stack and Heap in Processor Memory Expert Linker shows how much space is allocated for your program s heap and stack Figure 4 55 shows stack and heap output sections in the Memory Map pane Right click on either of them to display its properties Expert Linker x Input Sections Mem
69. files to be linked The linker treats executable DXE and shared memory SM files on the command line as executables to be linked against For more information on objects see the COMMAND_LINE_OBJECTS macro For information on executables see the COMMAND_LINE_LINK_AGAINST macro Both are described in Built In LDF Macros on page 3 27 If link objects are not specified on the command line or in the LDF file the linker generates appropriate informational or error messages Linker Command Line Switches This section describes the linker s command line switches Table 2 9 on page 2 53 briefly describes each switch with regard to case sensitivity equivalent switches switches overridden or contradicted by the one described and naming and spacing constraints for parameters The linker provides switches to select operations and modes The standard switch syntax is switch argument VisualDSP 4 0 Linker and Utilities Manual 2 51 www BDTIC com ADI Linker Command Line Reference Rules Switches may be used in any order on the command line Items in brackets are optional Items in italics are user definable and are described with each switch Path names may be relative or absolute File names containing white space or colons must be enclosed by double quotation marks though relative path names such as test dxe do not require double quotation marks Different switches require or prohibit whi
70. highlighted algorithms stand and should continue to stand in future releases of VisualDSP This chapter includes e Software Development Flow on page 1 2 Shows how linking loading and splitting fit into the project devel opment process e Compiling and Assembling on page 1 3 Shows how compiling and assembling the code fits into the project development process e Linking on page 1 7 Shows how linking fits into the project development process e Loading and Splitting on page 1 10 Shows how loading and splitting fit into the project development process VisualDSP 4 0 Linker and Utilities Manual 1 1 www BDTIC com ADI Software Development How Software Development Flow The majority of this manual describes linking a critical stage in the program development process for embedded applications The linker tool Jinker exe consumes object and library files to produce executable files which can be loaded onto a simulator or target processor The linker also produces map files and other output that contain informa tion used by the debugger Debug information is embedded in the executable file After running the linker you test the output with a simulator or emulator Refer to the VisualDSP 4 0 Users Guide and online Help for informa tion about debugging Finally you process the debugged executable file s through the loader or splitter to create output for use on the actual processor The ou
71. in one of these forms hexadecimal decimal or decimal optionally followed by K kilo x1024 or M Mega x1024x1024 e A period indicating the current location see Location Counter on page 3 25 The following statement which defines the bottom of stack space in the LDF ldf_stack_space VisualDSP 4 0 Linker and Utilities Manual 3 21 www BDTIC com ADI LDF Operators can also be written as ldf_stack_space ABSOLUTE e A symbol name ADDR Operator Syntax ADDR section_name This operator returns the start address of the named output section defined in the LDF file Use this operator to assign a section s absolute address to a symbol Blackfin Code Example If an LDF file defines output sections as dxe_L2_code INPUT_SECTIONS OBJECTS program LIBRARIES program gt mem_L2 dxe_L2_data INPUT_SECTIONS OBJECTS datal LIBRARIES datal gt mem_L2 the LDF file may contain the command ldf_start_L2 ADDR dxe_L2_code The linker generates the constant Idf_start_L2 and assigns it the start address of the dxe_L2 output section 3 22 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File SHARC Code Example If an LOF file defines output sections as dxe_pmco INPUT_SECTIONS OBJECTS seg_pmco LIBRARIES seg_pmco gt mem_pmco dxe_dmda INPUT_SECTIONS OBJECTS seg_dmda LIBRARIES s
72. internal memory heaptab INPUT_SECTIONS PSH1_OBJECTS heaptab LIBRARIES heaptab gt M2Data place C RTL JALU stack in M2 internal memory jstackseg ldf_jstack_limit ldf_jstack_base MEMORY_SIZEOF M2Stack gt M2Stack place C RTL KALU stack in M1 internal memory kstackseg ldf_kstack_limit ldf_kstack_base MEMORY_SIZEOF M1Stack gt M1Stack place C RTL heap in M2 internal memory defheapseg ldf_defheap_base oy ldf_defheap_size MEMORY_SIZEOF M2Heap gt M2Heap end PSH1 sections end PSH1 processor VisualDSP 4 0 Linker and Utilities Manual C 11 www BDTIC com ADI Linking for Overay Memory Linking forOvenay Memory When linking executable files for an overlay memory system the LDF file describes the overlay memory the processors that use the overlay memory and each processor s unique memory The LDF file places code for each processor in the PLIT section ARCHITECTURE ADSP TS101 SEARCH_DIR ADI_DSP TS 1ib MAP overlay map This simple overlay example uses internal memory as overlay storage memory Typically overlays are never stored in internal memory they are loaded there at runtime x Internal memory blocks are 0x10000 64K EMORY OCode TYPECRA START 0x00000000 END 0x00007FFF WIDTH 32 O_ovly
73. is executing another task Each circumstance can be labeled as deter ministic or non deterministic A deterministic circumstance is one where you know exactly when an overlay function is required for execution A non deterministic circumstance is one where you cannot predict when an overlay function is required for execution For example a deterministic application may consist of linear flow code except for function calls A non deterministic example is an application with calls to overlay functions within an interrupt service routine where the interrupt occurs randomly The example provided by the software contains deterministic overlay function calls The time of overlay function execution requests are known as the number of cycles required to transfer an overlay Therefore an over lay function load request can be placed to complete the transfer by the time the execution request is made The next overlay transfer from a load request can be enabled by the core and the core can execute the instruc tions leading up to the function execution request Since the linker handles all overlay symbol references in the same way jump to PLIT table and then overlay manager it is up to the overlay manager to distinguish between a symbol reference requesting the load of an overlay function and a symbol reference requesting the execution of an overlay function In the example the overlay manager uses a buffer in memory as a flag to indicate whether the f
74. is missing and is available only as a library routine For information about el far refer to Archiver on page 6 1 The following procedure lists the objects in a library extracts an object and converts the object to a listing file The first archiver command line lists the objects in the library and writes the output to a text file elfar p libc dlb gt libc txt This command assumes the current directory is C Program Files Analog Devices VisualDSP 21xxx lib Open the text file scroll through it and locate the object file you need Then use the following archiver command to extract the object from the library elfar e libc dlb fir doj To convert the object file to an assembly listing file with labels use the following e1fdump command line elfdump ns fir doj gt fir asm The output file is practically source code Just remove the line numbers and opcodes VisualDSP 4 0 Linker and Utilities Manual B 3 www BDTIC com ADI elfdump ELF File Dumper Disassembly yields a listing file with symbols Assembly source with sym bols can be useful if you are familiar with the code and hopefully have some documentation on what the code does If the symbols are stripped during linking the dumped file contains no symbols Disassembling a third party s library may violate the license for the third party software Ensure there are no copyright or license issues with the code s owner before using this disassemb
75. libc dlb C 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for TigerSHARC Processors single doj is a user generated file The linker will be invoked as follows linker T single processor ldf single doj COMMAND_LINE_OBJECTS is a predefined linker macro The linker expands this macro into the name s of the the object s doj files and libraries dlb files COMMAND_LINE_OBJECTS single doj ts_header doj is the standard initialization file for TSxxx OBJUS COMMAND_LINE_OBJECTS ts_hdr doj A linker project to generate a DXE file PROCESSOR PO OUTPUT SINGLE DXE The name of the output file MEMORY Processor specific memory command INCLUDE TS201_memory 1ldf SECTIONS Specify the output sections INCLUDE TS201_sections 1df end PO sections end PO processor VisualDSP 4 0 Linker and Utilities Manual C 3 www BDTIC com ADI Linking Large Uninitialized or Zero InitializedVariables Linking Large Uninitialized or Zero InitializedVanables When linking an executable file that contains large uninitialized variables use the NO_INIT equivalent to SHT_NOBITS legacy qualifier or ZERO_INIT section qualifier to reduce the file size A variable defined in a source file normally takes up space in an object and executable file even if that variable is not explicitly initialized w
76. new file name The file name may include a relative path an LDF macro or both In addition if the processor s ID is detected the processor is placed in the correct posi tion in the processor list For multiprocessor systems the window Figure 4 5 shows the list of pro cessors in the project Expert Linker automatically displays MP address range for each processor space providing specific MP addresses and multi processor memory space MMS offsets which makes using MP commands much easier This is an automatic replacement for the MPMEM ORY linker command used in the LDF source file VisualDSP 4 0 Linker and Utilities Manual 4 7 www BDTIC com ADI Launching the Create LDF Wizard Create LDF Step 2 of 3 RT ES System Information Configure the DSP system by choosing the processors in your system and the processor type m System type Processor type Single processor ADSP T5101 Multiprocessor Set up system from debug session settings Processor propetties Processors 2000000 0x23ffff 02400000 Ox27ffffF 2600000 Ox2bfffff Cx2c00000 Ox2tfffff MAAA Output file SCOMMAND_LINE_OUTPUT_DIRECTO F Executables to link against pe o vv M areri lt Back Cancel Help Figure 4 5 Processors and MMS Offset The MP address range is available only for processors that have MP memory space Press Next to advance to the Wizard Completed page
77. or more SECTIONS commands in the LDF file SECTIONS commands must appear within the context of the PROCESSOR or SHARED_MEMORY command Listing 2 4 presents a SECTIONS command that would work with the MEMORY command in Listing 2 1 2 40 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Listing 2 4 ADSP 21161 SECTIONS Command in the LDF File SECTIONS Begin output sections seg_ seg_ seg_ seg_ seg_ bss ZERO_INIT seg_dmda DM data rth run time header and interrupt table PUT_SECTIONS 0BJS seg_rth LIBS seg_rth gt seg_rth init Initialization ldf_seginit_space PUT_SECTIONS 0BJS seg_init LIBS seg_init gt seg_init init_code Initialization data PUT_SECTIONS 0BJS seg_init_code LIBS seg_init_code gt seg_init_code pmco PM code PUT_SECTIONS 0BJS seg_pmco LIBS seg_pmco gt seg_pmco pmda PM data PUT_SECTIONS 0BJUS seg_pmda LIBS seg_pmda gt seg_pmda PUT_SECTIONS 0BJS bss LIBS bss gt seg_dmda PUT_SECTIONS 0BJS seg_dmda LIBS seg_dmda gt seg_dmda heap gt allocate a heap for the application ldf_heap_space ldf_heap_length MEMORY_SIZEOF seg_heap ldf_heap_end ldf_heap_space ldf_heap_length 1 seg_heap end sections Listing 2 5
78. presents a SECTIONS command that would work with the MEMORY command in Listing 2 2 VisualDSP 4 0 Linker and Utilities Manual 2 41 www BDTIC com ADI Link Target Description Listing 2 5 ADSP TS101 SECTIONS Command in the LDF File SECTIONS sec_rth sec_code sec_code2 sec_datal List of sections for processor PO INPUT_SECTIONS INPUT_SECTIONS INPUT_SECTIONS INPUT_SECTIONS OBJECTS rth gt seg_rth OBJECTS code gt OBJECTS y_input gt seg_code OBJECTS datal gt seg_code seg_datal Listing 2 6 presents a SECTIONS command that would work with the MEMORY command in Listing 2 3 Listing 2 6 ADSP BF535 SECTIONS Command in the LDF File SECTIONS List of sections for processor PO L1_code PU PU PU PU PU PU PU PU gt MEM_ progra Alig INPU INPU INPU INPU Al ode sections on 2 byte boundary TS program LIBRARIES program TS datal LIBRARIES datal S constdata LIBRARIES constdata S OBJECTS ctor LIBRARIES ctor code sections on 2 byte boundary _SECTION_ALIGN 2 ign all c _SECTIONS OBJEC _SECTION_ALIGN 1 _SECTIONS O0BJEC _SECTION_ALIGN 1 _SECTIONS 0OBJECT _SECTION_ALIGN 1 _SECTIO L2_CODE n all _SECTION_ALIGN 4 _SECTIONS O0BJECT _SECTIONS 0BJECT _SECTIONS O0BJECT
79. processing a callback executable file the Memory Initializer extracts all the code and data from it to make up the callback initialization stream regardless of the Memory Initializer command line switches used only for the primary input file Those switches are e BeginInit Initsymbol on page 7 14 e Init Initcode dxe on page 7 15 e NoAuto on page 7 16 e NoErase on page 7 16 e Section Sectionname on page 7 17 e SectDestination Sectionname on page 7 17 This ensures the integrity of the code and data from each callback execut able file in the callback initialization stream the code can be executed independently and successfully regardless of the Memory Initializer com mand line switches By taking multiple input files the Memory Initializer supports those sys tems which have to run a number of independent service applications before starting the primary application 7 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initializer Initialization Steam Structure An initialization stream made from the Memory Initializer has three major portions e The header of the initialization stream which holds the basic infor mation for the Run Time Library RTL routine such as the number of data blocks in the initialization stream e The callback executable file which itself may have a number of the sub portions with each containing a piece of the callback executable
80. program instructions are partitioned and stored in external memory until they are required for program execution These partitions are memory overlays and the routines that call and execute them are called overlay managers Overlays are many to one memory mapping systems Several overlays may live stored in unique locations in external memory but run execute in a common location in internal memory Throughout the fol lowing description the overlay storage location is referred to as the live location and the internal location where instructions are executed is referred to as the run run time space Overlay functions are written to overlay OVL files which are specified as one type of linker executable output file The loader can read 0VL files to generate an LDR file On Blackfin processors this function must be done using the memory DMA controller Figure 5 1 demonstrates the concept of memory overlays The two mem ory spaces are internal and external The external memory is partitioned into four overlays The internal memory contains the main program an overlay manager function and two memory segments reserved for execu tion of overlay program instructions In this example overlays 1 and 2 share the same run time location within internal memory and overlays 3 and 4 also share a common run time memory When FUNC_8 is required the overlay manager loads overlay 2 to VisualDSP 4 0 Linker
81. pv but are shown with pva In addition the archiver keeps two additional kinds of information elfar a lib dlb t doj elfar pva lib dlb User Archive Version Info 1 2 3 elfar Version 4 5 0 2 log a lib dlb t doj 6 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver The archiver version that created the archive is stored in __version doj and is available using the pva switch Also if any operations that cause the archive to be written were executed since the last version information was written these commands appear as part of special version information called __log The log prints a line for every command that has been done on the archive since the last update of the version information Removing Version Information From an Archive Every operation has a special form of switch that can cause an archive to be written and request that the version information is not written to the archive Version information already in the archive would be lost Adding nv no version to a command strips version information For example elfar anv lib dlb new doj elfar dnv lib dlb In addition a special form of the t switch see Table 6 2 on page 6 12 which takes no argument can be used for stripping version information from an archive elfar tnv lib dlb only effect is to remove version info Checking Version Number You can have version numbers conform to a strict format The archiv
82. the LDF file for the default initialization stream destination sec tion Also note that the linker expands the meminit memory section to fill the remaining space This switch has no effect on a callback executable file Therefore do not use this switch to specify a section existing only in a callback executable file This switch is optional V The v or verbose verbose switch directs the Memor Initializer to out y put status information as it processes files 7 18 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI A FILE FORMATS The VisualDSP development tools support many file formats In some cases several file formats for each development tool are supported This appendix describes file formats that are prepared as input for the tools and points out the features of files produced by the tools This appendix discusses three types of file formats e Source Files on page A 2 e Build Files on page A 5 e Debugger Files on page A 9 Most of the development tools use industry standard file formats Sources that describe these formats appear in Format References on page A 10 VisualDSP 4 0 Linker and Utilities Manual A 1 www BDTIC com ADI Source Files Source Files This section describes these input file formats e C C Source Files on page A 2 e Assembly Source Files ASM on page A 3 e Assembly Initialization Data Files DAT on page A 3 e Header
83. the following symbols should be retained with the KEEP LDF command described on page 3 33 ctor_NULL_marker and lib_end_of_heap_descriptions ek sectionName The ek sectionName no elimination switch specifies a section to which the elimination algorithm is not applied Both this switch and the KEEP_SECTIONS LDF command on page 3 34 may be used to specify a section name in which elimination should ot take place es sectionName The es sectionName eliminate listed section switch specifies a section to which the elimination algorithm is to be applied This switch restricts elimination to the named input sections The es switch may be used on a command line more than once The default is all sections Both this switch and the ELIMINATE_SECTIONS LDF command on page 3 32 may be used to specify sections from which unreferenced code and data are to be eliminated In order for the C and C run time libraries to work properly the following symbols should be retained with the KEEP LDF command described on page 3 33 ctor_NULL_marker and lib_end_of_heap_descriptions eV The ev switch directs the linker to eliminate unused symbols and pro vides reports on each eliminated symbol VisualDSP 4 0 Linker and Utilities Manual 2 59 www BDTIC com ADI Linker Command Line Reference flags meminit optl opt2 The flags meminit switch passes each comma separated option to the Memory
84. with a diagonal slash if it is over an object where you are not allowed to drop the input section 4 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Viewing Icons and Colors Use the Legend dialog box to display all possible icons in the tree pane as well as short descriptions of each icon Figure 4 9 Icons Colors Ji LDF Macro Zl Unmapped LDF Macro Library File 2A Unmapped Library File Object File 2 Unmapped Object File Object Section al Unmapped Object Section E Pinned Object Section Processor zA Memory Segment lt Invalid Memory Segment QO Shared Memory C Output Section C Output Section that Overflow O Overlay Live Space Overlay Run Space Figure 4 9 Legend Dialog Box Icons Page The red x on an icon indicates this object file is not mapped Click the Colors tab to view the Colors page Figure 4 10 This page contains a list of colors used in the graphical memory map view each item s color can be customized The list of displayed objects depends on the processor family VisualDSP 4 0 Linker and Utilities Manual 4 15 www BDTIC com ADI Input Sections Pane Legend mE Icons Colors O Internal Memory O External Memory CO Unused Memory E Reserved Memory CO Output Section O Object Section O Overlay Live Space O Overlay Run Space O Hardware Overlay Live Space E Hardware Overlay Run Space GB Hardware Ov
85. write to the semaphore address for example Sema The processors should read the semaphore before modifying it to verify that another processor has not changed it For more information on semaphores refer to your processor s Hardware Reference manual D 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for SHARC Processors Linking for Overlay Memory When linking executable files for an overlay memory system the LDF file describes the overlay memory the processors that use the overlay memory and each processor s unique memory The LDF file places code for each processor in the PLIT section ARCHITECTURE ADSP 21161 SEARCH_DIR ADI_DSP 211xx lib MAP overlay map This simple overlay example uses internal memory as overlay storage memory Typically overlays are never stored in internal memory but are loaded there at runtime K MEMORY seg_rth TYPE PM RAM START 0x00040000 END 0x000400ff WIDTH 48 seg_init TYPE PM RAM START 0x00040100 END 0x000401ff WIDTH 48 seg_init_code TYPE PM RAM START 0x00040200 END 0x00040287 WIDTH 48 seg_pmco TYPE PM RAM START 0x00040288 END Ox000409ff WIDTH 48 seg_ovly TYPE PM RAM START 0x00040100 END Ox000419ff WIDTH 48 seg_pmda TYPE PM RAM START 0x00042700 END Ox00043fff WIDTH 32 seg_dmda TYPE DM RAM
86. 00 Figure 4 31 Output Section Contents in Hex and ASCII Format VisualDSP 4 0 Linker and Utilities Manual 4 39 www BDTIC com ADI Memory Map Pane Section Contents 000000 403b3a8e j27 OX40 000001 403b3a9 k26 k27 OX40 000002 f0bb4087 j27 OXFFFFFFFO cjmp 000003 043b3b9 k27 k27 0X4 000004 00804488 yr4 0 000005 3e3a4484 j26 OX3E yr4 000006 3e3a0c80 xri2 j26 0X3E 000007 40800488 xr13 OX40 000008 8d0118a4 xCOMP r12 r13 000009 110051b1 IF nxalt JUMP Ox11 NP 00000A 140cOc88 j10 xri2 000005 003f0b0 000000b2 j11 j31 a Figure 4 32 Output Section Contents in Hex and Assembly Format 4 40 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Viewing Symbols Symbols can be displayed per a processor program DXE per overlay OVL or per input section Initially symbol data is in the same order in which it appears in the linker s map output Sort symbols by name address and so on by clicking the column headings To view symbols Figure 4 33 Name Address Size Binding FileName Section l _LN 7_m 0x286 0x0 STB_LOCAL PRIMES DOJ program _LN 8_m 0x28e 0x0 STB_LOCAL PRIMES DOJ program _LN 9_m 0x292 0x0 STB_LOCAL PRIMES DOJ program _L_250002 0x28e 0x0 STB_LOCAL PRIMES DOJ program _L_ 250004 0x2bd 0x0 STB_LOCAL PRIMES DOJ program _L_250005 0x292 0x0 STB_LOCAL PRIMES
87. 0x006000 Listing E 3 Large Uninitialized Variables LDF File Source ARCHITECTURE ADSP BF535 OBJECTS COMMAND_LINE_OBJECTS Libraries amp objects from the command line MEMORY mem_extram TYPE RAM START 0x10000 END Ox15fff WIDTH 8 end segment end memory PROCESSOR PO LINK_AGAINST COMMAND_LINE_LINK_AGAINST OUTPUT COMMAND_LINE_OUTPUT_FILE NO_INIT section isn t written to the output file SECTION extram_output NO_INIT INPUT_SECTIONS 0BJECTS extram_area gt mem_extram SECTION zero_extram_output ZERO_INIT INPUT_SECTIONS OBJECTS zero_extram_area gt mem_extram end section end processor PO VisualDSP 4 0 Linker and Utilities Manual E 5 www BDTIC com ADI Linking for Assembly Source File Linking for Assembly Source File Listing E 5 shows an example LDF file for an ADSP BF535 DSP that describes a simple memory placement of an assembly source file The file in Listing E 4 contains code and data that is to reside in and execute from L2 SRAM This example assumes that the code and data declared in L2 memory is cacheable within L1 code and data memories The LDF file includes two commands MEMORY and SECTIONS which are used to describe specific memory and system information Refer to Notes for Listing 3 2 on page 3 9 for information on items in this basic example Listing E 4 MyFile ASM SECTION program GLOBAL main main
88. 2 63 procedure linkage table PLIT 3 45 5 36 about 5 10 using 5 25 processor selection 2 55 specifying properties 4 54 PROCESSOR LDF command 3 45 Processor Properties dialog box 4 53 proc target processor linker command line switch 2 63 profile guided optimization 2 45 program counter 5 15 input section 2 22 2 25 program input section 2 23 2 26 INDEX Properties dialog box viewing 4 24 pva archiver command line switch 6 8 6 13 pv archiver command line switch 6 8 6 13 R RAM 3 37 r archiver command line switch 6 13 references file formats A 10 reflective semaphores D 11 removing LDF macro 4 13 reserving space for 5 10 resize cursor 4 29 RESOLVE LDF command 3 35 3 47 ROM 3 37 RTL routine 7 2 performing memory initialization 7 6 run time initialization 3 50 qualifiers 3 50 RUNTIME_INIT qualifier 3 50 7 7 7 8 7 15 7 16 7 17 S s archiver command line switch 6 13 save temps linker command line switch 2 64 sdram0 input section 2 29 sdram input section 2 26 SEARCH_DIR LDF command 3 47 sec_rth input section 2 19 project builds SectDestination SectionName linker gt 2 6 command line switch 7 17 Project Options dialog box 2 7 section contents 4 14 PROM 3 37 SECTION directive 1 4 section formats 4 39 VisualDSP 4 0 Linker and Utilities Manual I 13 www BDTIC com ADI INDEX section_name qualifier 3 49 Section SectionName command lin
89. 7 architecture 2 36 architecture representation 2 17 initializer 3 50 internal 2 34 managing heap stack 4 71 map files A 6 multiprocessor 2 35 overlays 5 4 5 5 partitions 4 19 segment declaration 2 17 segment length 3 38 segments 4 19 Tiger SHARC processor 2 34 types 2 17 3 37 memory initialization 7 6 Memory Initializer 7 1 command line switches 7 13 destination section to hold initialization stream 7 17 extracting data from section 7 17 ___inits default symbol name 7 14 invoking 7 10 invoking with meminit switch 2 62 7 11 NO BOOT mode 7 2 output file 7 17 passing comma separated option to 2 60 primary input file 7 16 section initialization flag 7 11 Memory Initializer switches BeginInit InitSymbol 7 14 IgnoreSection SectionName 7 15 Init Initcode dxe 7 15 InputFile dxe 7 16 NoAuto 7 16 NoErase 7 16 o OutputFile dxe 7 17 SectDestination SectionName 7 17 Section SectionName 7 17 v verbose 7 18 memory interface width bits 3 38 MEMORY LDF command 2 17 3 13 3 35 5 31 segment_declaration 3 37 memory map adding memory segments to 4 33 generating 2 56 graphical view 4 25 highlighted objects in 4 29 post link view 4 31 pre link view 4 31 specifying 2 17 tree view 4 24 viewing 4 20 Memory Map context menu 4 22 Memory Map pane 4 20 4 22 overlays 4 36 zooming in out 4 32 memory sections Blackfin processor 2 25 S
90. 9 Select one of the processors by clicking on the processor s name tab In this case PO is selected first Then place drag and drop the recently created LDF macro 0BJECTS_PO in its corresponding memory segment The red crosses denoting the non linked sec tions have disappeared indicating that the input sections have been properly mapped into memory Also note that the LDF macros that were moved from the Input Sections window left pane to their corresponding sections in the Memory Map window right pane have been automatically replaced during the linking process with the actual object files used by the linker The LDF is now complete Figure 4 42 illustrates the generated LDF file in the Source Code View mode VisualDSP 4 0 Linker and Utilities Manual 4 49 www BDTIC com ADI Memory Map Pane Input Sections Momor Map catal wl SCOMMAND_LINE_OBJECTS il OBJECTS Wl OBJECTS_PO E 101 doj program 00 wl OBJECTS_P1 G A MIData 0 80000 IDO doj SY daat 0 80000 ID1 doj EJ 11 daj fatal nANANN LJ cata2 El M2Data O100000 COMMAND_LINE_OBJECTS 29 data 0 100000 al OBJECTS E 1D1 doj data2 0x100000 dl OBJECTS_PO SDRAM 04000000 ai SOBJECTS_PI we MSU UxSUUULUU IDO doi MSI O 000000 AQ 1D1 doj HOST o10000000 LJ ext_data HOSTI 020000000 gil C
91. AGAINST 3 34 MAP 3 35 MEMORY 3 35 5 31 MPMEMORY 3 38 5 30 OVERLAY_GROUP 3 39 5 32 OVERLAY_INPUT 3 53 PACKING 3 39 PLIT 3 52 5 36 PROCESSOR 3 45 RESOLVE 3 47 SEARCH_DIR 3 47 SECTIONS 3 48 SHARED_MEMORY 3 55 5 40 LDF expressions 3 18 LDF file commands 3 29 default 2 16 keywords 3 19 miscellaneous keywords 3 20 operators 3 21 purpose 2 5 scope 3 17 structure 3 16 LDF files 2 49 A 4 commands in 2 3 3 29 5 30 comments in 3 16 creating in Expert Linker 4 4 memory segments 2 4 output sections 2 4 LDF macros about 3 26 adding 4 12 built in 3 27 command line input 3 28 expanding 4 13 removing 4 13 user declared 3 28 VisualDSP 4 0 Linker and Utilities Manual I 7 www BDTIC com ADI INDEX LDF operators about 3 25 ABSOLUTE 3 21 ADDRO 3 22 DEFINED 3 23 MEMORY_SIZEOFO O 3 24 SIZEOF 3 24 LDR files ASCII format A 8 hex format A 6 splitter output A 8 legends Expert Linker 4 13 LENGTH O LDF identifier 3 38 lib_end_of_heap_descriptions symbol 3 34 librarian VisualDSP 6 1 library symbol name encryption 6 15 library file DLB A 5 library files about A 5 adding 4 12 creating 6 3 searching 6 2 library members 6 1 converting to source code B 3 library routines using assembler routine 6 5 LINK_AGAINST LDF command 3 34 linker 1 2 about 2 1 command line files TXT A 5 comm
92. Advanced LDF Commands Inter Ovenlay Calls PLITs can be used to resolve inter overlay calls as shown in Figure 5 6 Structure the LDF file in a way that ensures the PLIT code generated for inter overlay function references is part of the plit section for main which is stored in non overlay memory Always store the plit section in non overlay memory The linker resolves all references to variables in overlays and the PLIT allows an overlay manager to handle the overhead of loading and unload ing overlays Placing global variables in non overlay memory optimizes overlays This action ensures that the proper overlay is loaded before a global variable is called Inter Processor Calls PLITs resolve inter processor overlay calls as shown in Figure 5 7 for sys tems that permit one processor to access the memory of another processor When one processor calls into another processor s overlay the call increases the size of the p1it section in the executable file that manages the overlay The linker resolves all references to variables in overlays and the PLIT lets an overlay manager handle the overhead of loading and unloading overlays Not putting global variables in overlays optimizes overlays This action ensures that the proper overlay is loaded before a global is referenced VisualDSP 4 0 Linker and Utilities Manual 5 27 www BDTIC com ADI Memory Management Using Overlays Code in Non Overlay Memory F
93. BDTIC com ADI Linking for Overay Memory E 22 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI INDEX A a archiver command line switch 6 12 absolute data placements 2 61 ABSOLUTE LDF operator 3 21 adding input sections 4 12 LDF macros 4 12 library files 4 12 object files 4 12 adding memory segments to memory map 4 33 address setting for command line arguments 2 46 ADDRO LDF operator 3 22 ADI_DSP LDF macro 3 28 ADSP 21xxx processors broadcast space D 11 external memory 2 33 internal memory 2 33 memory architecture 2 32 overlays D 13 ADSP BFxxx processors L2 memory 2 36 memory architecture 2 36 memory map addresses 2 37 ADSP TSxxx processors allocating buffers to different memory segments 2 44 external memory 2 35 internal memory 2 34 memory architecture 2 34 overlays C 12 ALGORITHM LDF command 3 54 ALIGN LDF command 3 30 alignment setting 4 67 specifying properties 4 67 ALL_FIT LDF identifier 3 54 4 70 anv archiver command line switch 6 12 ARCHITECTURE LDF command 3 30 archive files See library files A 5 members A 5 writing library files in 6 3 archived files usable 6 3 archiver about 6 1 accesing archived functions 6 5 adding text to version information 6 10 adding version information 6 6 checking version number 6 9 command constraints 6 14 command line switches 6 12 command line syntax 6 11 deleting version infor
94. BO BO BO 32 bit DM 8 bit DM PACKING 4 BO BO BO B1 BO BO BO BO B2 BO BO BO BO B3 BO BO BO BO B4 BO 16 bit DM 8 bit DM PACKING 2 BO BO BO B1 BO BO BO BO B2 BO External Execution Packing in SHARC Processors The only two processors that require packed memory for external execu tion are the ADSP 21161N and the ADSP 21065L chips The ADSP 21161N processor supports 48 32 16 and 8 bit wide external memory The ADSP 21065L processor supports 32 bit external memory only VisualDSP 4 0 Linker and Utilities Manual 3 43 www BDTIC com ADI LDF Commands Previous to VisualDSP 3 5 it was required to use packing commands in the LDF file to cause the code to be placed properly In VisualDSP 3 5 and latter releases the VisualDSP tools are enhanced to perform packing automatically In order for the VisualDSP tools to execute packing directly from exter nal memory on ADSP 21065L and ADSP 21161N processors the tools pack the code into the external memory providing the following condi tions are met 1 Ensure the type of the external memory is PM Program Memory 2 Ensure the data width matches the real actual memory width ADSP 21065L processor 32 bits ADSP 21161N processor 48 32 16 and 8 bits 3 Ifthe LDF file has the PACKING command for the particular sec tion remove the command When defining memory segments required for ext
95. DF for each processor s internal memory architecture The default LDF files are in the directory lt VisualDSP Install Path gt Blackfin ldf VisualDSP 4 0 Linker and Utilities Manual E 1 www BDTIC com ADI Linking fora Single Proc essor System Linking fora Single Processor System When you link an executable file for a single processor system the LDF file describes the processor s memory and places code for that processor The LOF file in Listing E 1 is for a single processor system Note the fol lowing commands in this example LDF file e ARCHITECTURE defines the processor type e SEARCH_DIR commands add the 1ib and current working direc tory to the search path e 0BJS and LIBS macros retrieve object 00J and library DLB file input e MAP outputs a map file e MEMORY defines memory for the processor e PROCESSOR and SECTIONS commands define a processor and place program sections for that processor s output file by using the memory definitions Listing E 1 Example LDF File for a Single Processor System ARCHITECTURE ADSP BF535 SEARCH_DIR ADI_DSP Blackfin lib MAP SINGLE PROCESSOR MAP Generate a MAP file ADI_DSP is a predefined linker macro that expands to the VDSP install directory Search for objects in directory Blackfin lib relative to the install directory E 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Bl
96. DRESS JUMP OverlayManager db Register j4 contains the overlay ID with the referenced symbol and regis ter j5 contains the run time address of the referenced symbol The final instruction moves the program counter PC to the starting address of the overlay manager The overlay manager uses the overlay ID in conjunction with the overlay constants generated by the linker to transfer the proper overlay into internal memory Once the transfer is complete the overlay manager sends the PC to the address of the referenced symbol stored in jo VisualDSP 4 0 Linker and Utilities Manual 5 15 www BDTIC com ADI Memory Management Using Overlays Linker Generated Constants The following constants generated by the linker are used by the overlay manager EXTERN _ov_startaddress_1 EXTERN _ov_startaddress_ 2 EXTERN _ov_endaddress_l EXTERN _ov_endaddress_2 EXTERN _ov_size_l EXTERN _ov_size_2 EXTER ov_word_size_run_l EXTER ov_word_size_run_2 EXTER ov_word_size_live_l EXTER ov_word_size_live_2 EXTERN _ov_runtimestartaddress_1 EXTERN _ov_runtimestartaddress_2 The constants provide the following information to the overlay manager e Overlay sizes both run time word sizes and live word sizes e Starting address of the live space e Starting address of the run space Overlay Word Sizes Each overlay has a word size and an address which the overlay m
97. DSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Project Options for NewProject1 21x ifs Project r Target E General Fis Compile p aeaa Automatic x Bs General 1 Processor Revision Eh General 2 Type Library file z Eh Preprocessor fy Processor 1 Name NewProject2 fy Processor 2 Eh Warning Tool Chain fy Workarounds Assemble Compiler C C Compiler for Blackfin x Link E General Assembler Blackfin Family Assembler z LDF P il ao Linker Blackfin Family Linker z lEz pe Loader Blackfin Family Loader z Loa fy Options Splitter zj Eh Kernel E Splitter i Settings for configuration Debug x Pre build i ee zi Cancel Figure 2 5 Project Options Dialog Box Blackfin Processors There are four subpages you can access General LDF Preprocessing Elimination and Processor Almost every setting option has a corre sponding compiler command line switch described in Linker Command Line Switches on page 2 51 The Additional options field in each sub page is used to enter the appro priate file names and options that do not have corresponding controls on the Link sub page but are available as compiler switches Due to different processor architectures the processors may provide dif ferent Link tab selection options For example Figure 2 7 shows Blackfin p
98. DTH 8 EM_HEAP TYPECRAM START OxXF0030000 END 0xF0037FFF WIDTH 8 EM_STACK TYPECRAM START OxXF0038000 END OXxFOO3DFFF WIDTH 8 EM_SYSSTACK TYPECRAM START OxFOO3E000 END OXFOO3EFFF WIDTH 8 EM_OVLY TYPECRAM START 0x00000000 END 0x08000000 WIDTH 8 PROCESSOR pO LINK_AGAINST COMMAND_LINE_LINK_AGAINST OUTPUT COMMAND_LINE_OUTPUT_FILE VisualDSP 4 0 Linker and Utilities Manual E 17 www BDTIC com ADI Linking for Overay Memory SECTIONS reset INPUT_SECTIONS OBJECTS IVreset gt MEM_PROGRAM itab INPUT_SECTIONS 0BJECTS IVpwrdwn Processor a instructions in overlay n gt MEM_PROGRAM d application specific assembly language generated for each symbol that is resolved emory PLIT PO PLIT_SYMBOL_OVERLAYID P1 L PLIT_SYMBOL_ADDRESS P1 H PLIT_SYMBOL_ADDRESS JUMP _OverlayManager tdefine LIBS libsmal1535 d1lb 1ibc535 d1b libm3free535 d1b libevent535 dlb 11bi0535 d1b libcpp535 d1b libcpprt535 d1b libdsp535 d1lb libsftf1t535 d1lb libetsi535 d1lb idle535 doj LIBRARIES LIBS librt535 d1b OBJECTS crts535 doj COMMAND_LINE_OBJECTS crtn535 doj PROCESSOR PO PO_OBJECTS main doj manager doj OUTPUT mgrovly dxe OUTPUT COMMAND_LINE_OUTPUT_FILE SECTIONS program Align all code sections on 2 byte boundary INPUT_SECTION_ALIGN 2 INPUT_SECTIONS OBJECTS program
99. DTH XREF 1 Supported on ADSP 21xxx processors only Miscellaneous LDF Keywords The following linker keywords are not operators macros or commands Table 3 3 Miscellaneous LDF File Keywords Keyword Description FALSE A constant with a value of 0 TRUE A constant with a value of 1 XREF A cross reference option setting See xref filename on page 2 66 For more information about other LDF file keywords see LDF Opera tors on page 3 21 LDF Macros on page 3 26 and LDF Commands on page 3 29 3 20 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File LDF Operators LDF operators in expressions support memory address operations Expres sions that contain these operators terminate with a semicolon except when the operator serves as a variable for an address The linker responds to several LDF operators including the location counter Each LDF operator is described in the following sections ABSOLUTE Operator Syntax ABSOLUTE expression The linker returns the value expression Use this operator to assign an absolute address to a symbol The expression can be e A symbolic expression in parentheses for example ldf_start_expr ABSOLUTE start 8 This example assigns 1df_start_expr the value corresponding to the address of the symbol start plus 8 as in ldf_start_expr start 8 e An integer constant
100. D_LINE_OBJECTS crtn535 doj 3 n TH 3 n PE 1n PE me PE WIDTH 8 4KB for heap in L2 SRAM for dynamic memory a L1 SRAM seg RAM START OXF 8 Data Ban RAM START ory for Cr RAM START 8 system memory below ment FA00000 k A SRA OxFF800000 k Ox B SRA FF9000 00 OxFFBOO000 un time stac m A D OXFFAO3FFF D C OXFF803FFF D OXFF903F FF user mode DCOXFFBOO 7FF TYPECRAM START OXFO0000000 END OXFOO3DFFF location TYPECRAM START OxXFO03E000 END OXFOO3EFFF WIDTH 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blackfin Processors 4KB for system stack in L2 SRAM supervisor mode stack MEM_SYSSTACK TYPECRAM START OXFOO3F000 END COXFOO3FFFF WIDTH 8 4 x 128MB External SDRAM memory segments EM_SDRAM_BANKO TYPE RA START 0x00000000 END COXO7FFFFFF WIDTH 8 EM_SDRAM_BANK1 TYPE RA START 0x08000000 ENDCOXOFFFFFFF WIDTH 8 EM_SDRAM_BANK2 TYPE RA START 0x10000000 END OX17FFFFFF WIDTH 8 EM_SDRAM_BANK3 TYPE RA START 0x18000000 ENDCOXIFFFFFFF WIDTH 8 end MEMORY PROCESSOR pO OUTPUT COMMAND_LINE_OUTPUT_FILE SECTIONS Input section declarations for L1 code memory
101. D_LINE_OUTPUT_DIRECTORY LDF macro This switch allows you to make a command line change that propagates to many places without changing the LDF file Refer to Built In LDF Macros on page 3 27 pp The pp end after preprocessing switch directs the linker to stop after the preprocessor runs without linking The output preprocessed LDF prints to standard output proc processor The proc processor target processor switch directs the linker to pro duce code suitable for the specified processor For example linker proc ADSP TS201 pO doj pl doj p2 doj o program dxe If the processor identifier is unknown to the linker it attempts to read required switches for code generation from the file lt processor gt ini The linker searches for the ini file in the VisualDSP System folder For custom processors the linker searches the section proc in the lt processor gt ini for key architecture The custom processor must be based on an architecture key that is one of the known processors There fore proc Custom xxx searches the Custom xxx ini file VisualDSP 4 0 Linker and Utilities Manual 2 63 www BDTIC com ADI Linker Command Line Reference For example proc Architecture ADSP TS201 See also si revision version for more information on silicon revi sion of the specified processor S The s strips all symbols switch directs the linker to omit all symbol information from the output
102. ECTS cogogongn Figure 4 13 Expert Linker Window Sorted by LDF Macros 4 18 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Memory Map Pane In an LDF file the linker s MEMORY command defines the target system s physical memory Its argument list partitions memory into memory seg ments and specifies start and end addresses memory width and memory type such as program data stack and so on It connects your program to the target system The OUTPUT command directs the linker to produce an executable DXE file and specifies its file name Figure 4 14 shows a typical memory map pane ADSP 218x DSPs only Expert Linker Input Sections Memory Map PM inti End EJ IVini 3 mem_INT_RSTI 0x0 Oxtt dil LIBRARIES mem_INT_PWRDWN 0x20 Ox3t ail SOBJECTS MVpwrdwn_dxe QB 219 _int_tab doj E OBJECTS IVp dotprod_main doj E LIBRARIES IY intl 2 4 mem_INT_KERNEL 0x40 Ox5f intl 3 mem_INT_STKI 0x60 Ox7F intl 4 mem_INT_INT4 0x80 0x9f IWVint15 H mem INT _INTS Nan Nwhf Processor tab Figure 4 14 Expert Linker Window Memory Map For Blackfin SHARC and TigerSHARC processors the combo box located to the right of the Memory Map label is not available VisualDSP 4 0 Linker and Utilities Manual 4 19
103. EMORY command s syntax are e shared_segment_commands Contains processor_name declara tions with a START address for each processor s offset in multiprocessor memory Processor names and linker labels follow the same rules For more information refer to LDF Expressions on page 3 18 e processor_name placement_commands Applies the processor_name offset for multiprocessor linking Refer to PROCESSOR on page 3 45 for more information The MEMORY command specifies the memory map for the target system The LDF must contain a MEMORY command for global memory on the target system and may contain a MEMORY com mand that applies to each processor s scope An unlimited number of memory segments can be declared within each MEMORY com mand For more information see MEMORY on page 3 35 See Memory Characteristics Overview on page 2 31 for memory map descriptions VisualDSP 4 0 Linker and Utilities Manual 5 31 www BDTIC com ADI Advanced LDF Commands OVERLAY GROUP The OVERLAY_GROUP command provides legacy support This command is deprecated and is not recommended for use When running the linker with a SHARC processor the following warning may occur Warning 112534 More than one overlay group or explicit OVERLAY_GROUP command is detected in the output section seg_pmda Create a separate output section for each group of overlays Expert Linker makes the change aut
104. GAINST command for a specific symbol This command overrides the search order for a specific variable or label Refer to the LINK_AGAINST on page 3 34 for more information The RESOLVE symbol_name resolver command uses the resolver to specify an address of a particular symbol variable or label The resolver is an absolute address or a file DXE or SM that contains the definition of the symbol If the symbol is not located in the designated file an error is issued For the RESOLVE symbol_name resolver command e When the symbol is not defined in the current processor scope the lt resolver gt supplies a file name overriding any LINK_AGAINST e When the symbol is defined in the current processor scope the lt resolver gt supplies to the linker the symbol location address Resolve a C C variable by prefixing the variable with an under score in the RESOLVE command for example _symbol_name SEARCH_DIR The SEARCH_DIR command specifies one or more directories that the linker searches for input files Specify multiple directories within a SEARCH_DIR command by delimiting each path with a semicolon and enclosing long directory names within straight quotes The search order follows the order of the listed directories This command appends search directories to the directory selected with the linker s L command line switch on page 2 56 Place this command at the begin ning of the LDF file to
105. Generate a MAP file ADI_DSP is a predefined linker macro that expands to the VisualDSP installation directory Search for objects in directory 21k lib relative to the installation directory 1ib161 d1b is an ADSP 2116x specific library D 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for SHARC Processors and must precede libc dlb the C library to link the 2116x specific routines LIBS 1ibl61 d1b libc dlb single doj is a user generated file The linker will be invoked as follows linker T single processor ldf single doj COMMAND_LINE_OBJECTS is a predefined linker macro The linker expands this macro into the name s of the the object s doj files and libraries dlb files that appear on the command line In this example COMMAND_LINE_OBJECTS single doj 6l1_hdr doj is the standard initialization file for 2116x O0BJS COMMAND_LINE_OBJECTS 161_hdr doj A linker project to generate a DXE file PROCESSOR PO OUTPUT SINGLE DXE The name of the output file MEMORY Processor specific memory command INCLUDE 21161_memory h SECTIONS Specify the output sections INCLUDE 21161_sections h end PO sections end PO processor VisualDSP 4 0 Linker and Utilities Manual D 3 www BDTIC com ADI Linking Large Uninitialized Variables Linking Large
106. HARC processor 2 19 TigerSHARC processor 2 22 2 25 memory segments about 1 3 adding 4 33 changing size of 4 28 insering a gap 4 35 invalid 4 21 MEMORY command 4 19 rules 2 4 size 4 24 specifying properties 4 61 start address 4 24 MEMORY_SIZEOF LDF operator 3 24 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI memory type DM 7 18 PM 7 18 MEM_PROGRAM memory section 2 25 MEM_STACK memory section 2 25 MM archiver command line switch 6 12 MM dependency check output and build linker command line switch 2 56 modify register 5 16 MPMEMORY LDF command 3 38 5 30 MP systems semaphores D 11 MUDmacro undefine macro linker command line switch 2 57 multiple overlays 4 36 multiprocessor memory 2 35 multiprocessor systems bus lock D 11 semaphores D 11 N new memory segment 4 23 4 33 output section 4 23 overlay 4 23 shared memory 4 23 NoAuto command line switch 7 16 NoErase command line switch 7 16 NOFORCE_CONTIGUITY LDF command 3 55 NO_INIT qualifier 3 50 C 4 D 4 E 4 noncache_code input section 2 26 2 29 noncache_code memory section 2 26 nonmemcheck inker command line switch 2 62 INDEX O object files 1 3 adding 4 12 linking into executable 2 2 object properties managing with Expert Linker 4 51 objects deleting 4 13 sorting 4 13 4 17 OBJECTS LDF macro 3 12 od output directory linker command line switch 2 63 o filename link
107. IC com ADI 6 ARCHIVER The VisualDSP archiver e far exe combines object D0J files into library files which serve as reusable resources for code development The VisualDSP linker rapidly searches library files for routines library members referred to by other object files and links these routines into the executable program This chapter provides e Archiver Guide on page 6 2 Introduces the archiver s functions e Archiver Command Line Reference on page 6 11 Describes archiver operations by means of command line switches VisualDSP 4 0 Linker and Utilities Manual 6 1 www BDTIC com ADI Archiver Guide Archiver Guide The elfar exe utility combines and indexes object files or any other files to produce a searchable library file It performs the following opera tions as directed by options on the el far command line Creates a library file from a list of object files Appends one or more object files to an existing library file Deletes file s from a library file Extracts file s from a library file Prints the contents of a specified object file of an existing library file to stdout Replaces file s in an existing library file Encrypts symbol s in an existing library file Allows embedded version information into a library built with elfar The archiver can run only one of these operations at a time However for commands that take a list of file names as arguments the archiver can input
108. IDTH 32 MiStack TYPE RA START Ox0008C000 ENDCOXOOO8FFFF WIDTH 32 M2Data TYPE RA START 0x00100000 END OXOO1OBFFF WIDTH 32 M2Heap TYPE RA START Ox0010C000 END 0x0010C7FF WIDTH 32 M2Stack TYPE RA START Ox0010C800 ENDCOXOO1OFFFF WIDTH 32 SDRAM TYPECRA START 0x04000000 END OXO7FFFFFF WIDTH 32 so TYPE RA START 0x08000000 END OXOBFFFFFF WIDTH 32 S1 TYPE RA START 0x0C000000 END OXOFFFFFFF WIDTH 32 LIBRARIES libc dlb Three link projects are specified in one LDF The first LDF is a shared memory link project against which the PROCESSOR projects are linked SHARED_MEMORY The file containing the shared data buffers is defined in shared c SHARED_OBJECTS shared doj The output name of this shared object is used VisualDSP 4 0 Linker and Utilities Manual C 7 www BDTIC com ADI Linking an ADSP TS101 MP Shared Memory System subsequently in the LINK_AGAINST command of the PROCESSOR projects OUTPUT shared sm shared c has data declarations only There is no need to specify any output other than data2 SECTIONS data2 INPUT_SECTIONS SHARED_OBJECTS data2 gt M1Data end shared sections end shared memory The second link project described in this LDF is a DXE project which will be linked against the SHARED link project defined above PROCESSOR_PSHO PSHO_OBJECTS pshO doj ts_hdr doj LINK_AGAINST shared sm OUTPU
109. IS Com mittee texts cited in Format References on page A 10 The archiver automatically converts legacy input objects from COFF to ELF format Memory Map Files XML The linker can output memory map files that contain memory and symbol information for your executable file s The map file contains a summary of memory defined with MEMORY commands in the LDF file and pro vides a list of the absolute addresses of all symbols Memory map files are available only in xmi format Loader Output Files in Intel Hex 32 Format LDR The loader can output Intel hex 32 format LDR files These files support 8 bit wide PROMs The files are used with an industry standard PROM programmer to program memory devices for a hardware system One file contains data for the whole series of memory chips to be programmed The following example shows how the Intel hex 32 format appears in the loader s output file Each line in the Intel hex 32 file contains an extended linear address record a data record or an end of file record 020000040000FA Extended linear address record A 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI File Fomats 0402100000FE03F0F9 Data record 00000001FF End of file record Extended linear address records are used because data records have a 4 character 16 bit address field but in many cases the required PROM size is greater than or equal to OxFFFF bytes Extended linear address
110. ISR void tatic section SDRAM_O int page_buff1 0x08000000 tatic section SDRAM_1 int page_buff2 0x08000000 tatic section SDRAM_2 int page_buff3 0x08000000 tatic section SDRAM_3 int page_buff4 0x08000000 static section Data _BankA int coeffs1 256 static section Data_BankB int input_array 0x2000 int X yo ZS void main void t x 13 0x5555 VisualDSP 4 0 Linker and Utilities Manual E 11 www BDTIC com ADI Linking for Complex C Source File Example 2 The following is an example of an LDF file for ADSP BF535 DSP which is based on the complex C source from Listing 1 13 Also see Figure E 2 on page E 16 Listing E 9 C LDF File Example SDRAM LDF ARCHITECTURE ADSP BF535 SEARCH_ define li L 0 ME beven IB BJ D 0 4 MeM_SCRATCH_STACK TY WIDTH 248KB of user code and data in L2 SRAM segment MEM_L2_SRAM MEM_H RAR DIR ES fine physical B of EAP LIBS li B of _CODE_SRAM TYPE B of DATAA_SRAM T WIDTH B of i _DATAB_SRAM T WIDTH AD LIBS ECTS crts535 doj user code W user data user data L1 Scratch _DSP Blackfin 1 bsmal1535 d1b t535 dlb 1ibi0535 dlb libdsp535 d1b librt535 d1 ib b 1ibc535 d1b libm3free535 d1lb ibcpp535 dlb libcpprt535 d1b ibsftf1t535 dlb libetsi535 dlb idle535 doj COMMAN
111. Jay_commands item consists of at least one of the following com mands INPUT_SECTIONS OVERLAY_ID NUMBER_OF_OVERLAYS OVERLAY_OUTPUT ALGORITHM RESOLVE_LOCALLY or SIZE The overlay_memory_segment item optional determines whether the overlay section is placed in an overlay memory segment Some overlay sec tions such as those loaded from a host do not need to be included in the overlay memory image of the executable file but are required for other tools that read the executable file Omitting an overlay memory segment assignment from a section retains the section in the executable file but marks the section for exclusion from the overlay memory image of the exe cutable file The overJay_commands portion of an OVERLAY_INPUT command follows these rules e DEFAULT_OVERLAY When the DEFAULT_OVERLAY command is used the linker initially places the overlay in the run time space that is without running the overlay manager e OQVERLAY_OUTPUT Outputs an overlay 0VL file for the overlay with the specified name The OVERLAY_OUTPUT in an OVERLAY_INPUT command must appear before any INPUT_SECTIONS for that overlay VisualDSP 4 0 Linker and Utilities Manual 3 53 www BDTIC com ADI LDF Commands INPUT_SECTIONS Has the same syntax within an OVERLAY_INPUT command as when it appears within an output_section_command except that a PLIT section may not be placed in overlay memory For more inform
112. L1 Code SRAM L2 SRAM void MEM_DMA_ISR void se L1 Data A SRAM coeffs1 0 void main void coeffs 1 35025333 coeffs1 255 L1 Data B SRAM Scratch SRAM Input_array 0 coeffs1 1 coeffs1 255 External SDRAM page_buffl 0 page_buff2 0 page_buffl 1 page_buff2 1 page_buffl 134217727 page_buff2 134217727 page_buff3 0 page_buff4 0 page_buff3 1 page_buff4 1 page_buff4 1 34217727 page_buff3 134217727 Figure E 2 C to Memory Code Placement E 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blac kfin Proc essors Linking for Overday Memory When you link executable files for an overlay memory system the LDF file describes the overlay memory the processor s that use the overlay memory and each processor s unique memory The LDF file places code for each processor and the special PLIT section Listing E 10 shows an example LDF file for an overlay memory system For more information on this LDF file see the comments in the listing Listing E 10 Example LDF File for an Overlay Memory System ARCHITECTURE BF535 SEARCH_DIR ADI_DSP Blackfin lib MAP overlay map This simple example uses internal memory for overlays Real overlays would never live in internal memory MEMORY EM_PROGRAM TYPECRAM START OxFOO00000 END OXFOO2FFFF WI
113. L1_CODE_SRAM Align L1 code segments on a 2 byte boundary INPUT_SECTION_ALIGN 2 INPUT_SECTIONS 0BJECTS Fast_Code gt MEM_L1_CODE_SRAM Input section declarations for L1 data bank A memory L1_DATAA_SRAM Align L1 data segments on a 1 byte boundary INPUT_SECTION_ALIGN 1 INPUT_SECTIONS 0BJECTS Data_BankA gt MEM_L1_BANKA_SRAM Input section declarations for L1 data bank B memory L1_BANKB_SRAM Align L1 data segments on a 1 byte boundary INPUT_SECTION_ALIGN 1 INPUT_SECTIONS OBJECTS Data_BankB gt MEM_L1_BANKB_SRAM VisualDSP 4 0 Linker and Utilities Manual E 13 www BDTIC com ADI Linking for Complex C Source File Example 2 stack ldf_stack_space ldf_stack_end ldf_stack_space MEMORY_SIZEOF Mem_Scratch_Stack 4 gt MEM_SCRATCH_STACK heap ldf_heap_space ldf_heap_end ldf_heap_space MEMORY_SIZEOF Mem_Heap 1 ldf_heap_length ldf_heap_end ldf_heap_space gt MEM_HEAP L2_SRAM Align L2 code segments on a 2 byte boundary PUT_SECTION_ALIGN 2 PUT_SECTIONS 0BJECTS program LIBRARIES program Align L2 data segments on a l1 byte boundary PUT_SECTION_ALIGN 1 PUT_SECTIONS OBJECTS datal LIBRARIES datal Align L2 constructor data segments on a 1 byte boundary C only PUT_SECTION_ALIGN 1 PUT_SECTIONS OBJECTS constdata LIBRARIES constdata gt
114. LOGD Contact your Analog Devices Inc local sales office or authorized distributor Send questions by mail to Analog Devices Inc One Technology Way P O Box 9106 Norwood MA 02062 9106 USA xxii VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Preface Supported Processors The following is the list of Analog Devices Inc processors supported in VisualDSP 4 0 TigerSHARC ADSP TSxxx Processors The name TigerSsHARC refers to a family of floating point and fixed point 8 bit 16 bit and 32 bit processors VisualDSP currently supports the following TigerSHARC processors ADSP TS101 ADSP TS201 ADSP TS202 ADSP TS203 SHARC ADSP 21xxx Processors The name SHARC refers to a family of high performance 32 bit floating point processors that can be used in speech sound graphics and imaging applications VisualDSP currently supports the following SHARC processors ADSP 21020 ADSP 21060 ADSP 21061 ADSP 21062 ADSP 21065L ADSP 21160 ADSP 21161 ADSP 21261 ADSP 21262 ADSP 21266 ADSP 21267 ADSP 21363 ADSP 21364 ADSP 21365 ADSP 21366 ADSP 21367 ADSP 21368 ADSP 21369 VisualDSP 4 0 Linker and Utilities Manual xxiii www BDTIC com ADI Product Information Blackfin ADSP BFxxx Processors The name Blackfin refers to a family of 16 bit embedded processors VisualDSP currently supports the following Blackfin processors ADSP BF531 ADSP BF532 formerly ADSP 21532 ADS
115. MEM_L2_SRAM SDRAM_0O Align external SDRAM data segments on a 1 byte boundary INPUT_SECTION_ALIGN 1 INPUT_SECTIONS OBJECTS SDRAM_O gt MEM_SDRAM_BANKO SDRAM_1 Align external SDRAM data segments on a 1 byte boundary INPUT_SECTION_ALIGN 1 INPUT_SECTIONS OBJECTS SDRAM_1 gt MEM_SDRAM_BANK1 SDRAM_2 Align external SDRAM data segments on a 1l1 byte boundary E 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blackfin Processors INPUT_SECTION_ALIGN 1 INPUT_SECTIONS 0BJECTS SDRAM_2 gt MEM_SDRAM_BANK2 SDRAM_3 Align external SDRAM data segments on a 1 byte boundary INPUT_SECTION_ALIGN 1 INPUT_SECTIONS OBJECTS SDRAM_3 gt MEM_SDRAM_BANK3 End Sections End PROCESSOR pO VisualDSP 4 0 Linker and Utilities Manual E 15 www BDTIC com ADI Linking for Complex C Source File Example 2 static section Fast_Code void MEM_DMA_ISR void static section SDRAM _O0 int page_buffl 0x08000000 static section SDRAM_1 int page_buff2 0x02000000 static section SDRAM _2 int page_buff3 0x08000000 static section SDRAM _3 int page_buff4 0x02000000 static section Data_RankA int coeffs1 256 static section Data_RankR int input_array 0x2000 int x y z void main void int i x 0x5555 21535 Internal SRAM
116. Manual www BDTIC com ADI PREFACE Thank you for purchasing Analog Devices development software for digi tal signal processors DSPs Purpose of This Manual The VisualDSP 4 0 Linker and Utilities Manual contains information about the linker and utilities programs for 16 bit fixed point Blackfin ADSP BFxxx processors and 32 bit floating point and fixed point TigerSsHARC ADSP TSxxx and SHARC ADSP 21xxx processors which set a new standard of performance for digital signal processors combining multiple computation units for floating point and fixed point processing as well as wide word width This manual provides information on the linking process and describes the syntax for the linker s command language a scripting language that the linker reads from the linker description file The manual leads you through using the linker archiver and utilities to produce DSP programs and provides reference information on the file utility software Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set Programmers who are unfamiliar with Analog Devices VisualDSP 4 0 Linker and Utilities Manual xix www BDTIC com ADI Manual Contents processors can use this manual but should supplement it with other texts such as the appropriat
117. NE_OBJECTS crtn535 doj MEMORY E 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blackfin Processors 248KB of L2 SRAM memory segment for user code and data MEM_L2SRAM TYPECRAM START Oxf0000000 END OxFOO3dfff WIDTH 8 4KB of L2 SRAM memory for C run time stack user mode MEM_STACK TYPE RAM START Oxf003e000 END Oxf003ef ff WIDTH S8 4KB of Scratch SRAM for Heap memory segment MEM_HEAP TYPE RAM START OxFFB00000 END COXFFBOOFFF WIDTH 8 PROCESSOR pO OUTPUT COMMAND_LINE_OUTPUT_FILE SECTIONS Declare L2 Input objects below L2_SRAM Align L2 instruction segments on a 2 byte boundaries PUT_SECTION_ALIGN 2 PUT_SECTIONS OBJECTS program LIBRARIES program Align L2 data segments on a 1 byte boundary PUT_SECTION_ALIGN 1 PUT_SECTIONS OBJECTS datal LIBRARIES datal PUT_SECTIONS 0BJECTS cplb LIBRARIES cplb PUT_SECTIONS OBJECTS cplb_code LIBRARIES cplb_code PUT_SECTIONS 0BJECTS cplb_data LIBRARIES cplb_data Align L2 constructor data segments on a l1 byte boundary C only PUT_SECTION_ALIGN 1 PUT_SECTIONS OBJECTS constdata LIBRARIES constdata gt MEM_L2SRAM Allocate memory segment for C run time stack segment stack Assign start address of stack to Idf_stack_space variable using the LDF s current location counter
118. NTEX cs sceceiiccinalownniieaaemens 2 47 Command Line Object Files ossrsrsnarsorsranenaroh 2 48 Commax Lins Pile Nane sessionaris 2 49 bjer File Types ee act cise n tenai 2 51 Linker Command Line Switches sssercssnsrneisnririenes 2 51 Linker Switch Summary and Descriptions s s s 2 53 e ene na a 2 55 VisualDSP 4 0 Linker and Utilities Manual vii www BDTIC com ADI CONTENTS A FIDOCRCBOY crniacroesseeerciensnieniesnenreicermneenmneee eens 2 55 Ae TIME Oh 6a E EN A ali E E T A E E 2 56 E ara EE 2 56 TNE e ee N Pees 2 56 Map Hiena ineutseieririiuknini eiia 2 56 SRT REDE aenreinriapeaa aaa 2 57 MUDMACIO enrii erner nen crCe nrc arunenrnem ener creme le 2 57 eae ee eee TT oy Neen UREN a Reese Te Tete eee ny nent nn ene 2 57 OR Fe ore eee 2 58 or Weert number ea etedonsuadasdeaecedeas 2 58 W pumba namber aiaiaaiiiccaidelsaiasabiaslesie Gidesmiaciadeiialaaed 2 58 CO ose a oe ee 2 59 k secon MAINE nemna eameerraeeewe eres 2 59 SRG SC NANE a a 2 59 E E E A EAA E A 2 59 flags meminit opt lh 0pt2 e nenacia 2 60 flags pp opti Open cccuiniinsinratiianniniink 2 60 Ail CUD aioecassumabaran arkea aeaa 2 60 EOT or OA 2 60 E E mam E E E E 2 60 e Th E E EN A E N T E E ee 2 61 T E E A A A 2 62 keep wit late aorsarouiniokansarianoka aan nka 2 62 STITT ainikien aiani akti 2 62 viii VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI CONTENTS AO ORINE E E E E E A N eres 2 62 Cae E E A E E E 2 63 eod direc
119. OF file indicates the intended processor for example ADSP BF531 1df and may include an optional suffix for example ADSP BF533_C 1df If the LDF file name has no suffix it is the default LDF file That is when no LDF file is explicitly specified the default file is used to link an application when building for that processor Therefore ADSP BF531 1df is the default LDF file for the ADSP BF531 processor VisualDSP 4 0 Linker and Utilities Manual 3 3 www BDTIC com ADI LDF File Overview If no LDF file is specified explicitly via the T command line switch the compiler driver selects the default LDF file for the target processor For example the first of the following commands uses the default LDF file and the second uses a user specified file ccblkfn proc ADSP BF531 hello c uses default ADSP BF531 1df ccblkfn proc ADSP BF531 hello c T my ldf uses my 1df For each processor there are three LDF files with suffixes _C _CPP and _ASM respectively for example ADSP BF533_C 1df These LDF files are templates for the Expert Linker If you use the Expert Linker to create a custom LDF file for your project the Expert Linker will do so by querying you for the kind of LDF file you want to create asm C or C and then copying one of the above templates The suffixes indi cate the kind of LDF files they support The CPP template is a superset of the C template and the C template is a super
120. OMMAND_LINE_OBJECTS A HOST2 050000000 il OBJECTS_SM HOST3 0470000000 A data doj R HOST4 050000000 E program HOSTS 0 b0000000 gl COMMAND_LINE_OBJECTS A HOSTE Od 0000000 wil OBJECTS HOST o fo000000 OBJECTS_PO Hl OBJECTS_P1 IDO doj ID1 doj Eee Seren lo Figure 4 42 Expert Linker Multiprocessor LDF The multiprocessor linker commands MPMEMORY SHARED MEMORY and LINK AGAINST as well as the corresponding LDF macros were successfully gen erated by the Expert Linker in a way absolutely transparent to the user The complete project is now ready to be built Once again perform a Rebuild All and start debugging with the application code 4 50 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Managing Object Properties You can display different properties for each type of object Since different objects may share certain properties their Properties dialog boxes share pages The following procedures assume the Expert Linker window is open To display a Properties dialog box right click an object and choose Prop erties You may choose these functions e Managing General Global Properties on page 4 52 e Managing Processor Properties on page 4 53 e Managing PLIT Properties for Overlays on page 4 55 e Managing Elimination Properties on page 4 56 e Managing Symbols Properties on page 4 58 e Managing Memory Segment Properties on page 4
121. OOSE EE a Figure 4 23 Memory Map Pane in Pre Link View VisualDSP 4 0 Linker and Utilities Manual 4 31 www BDTIC com ADI Memory Map Pane e To enable post link view from the Memory Map pane right click and choose View and Link Results Post Link Figure 4 24 on page 4 32 illustrates a memory map after linking Memory Map QIAQlIQ f0000000 MEM_PROGRAM f0000000 MEM_PCI_IO FOO2F FAN MEM_HEAP f 0030000 osea f0037fff MEM_STACK 0038000 FOOSd FFE MEM_SYSSTACK f 003e000 FOOSfd Ee MEM_ARGY f003fe00 Figure 4 24 Memory Map Pane in Post Link View Zooming in and Out on the Memory Map From the Memory Map pane you can zoom in or out incrementally or zoom in or out completely Three buttons at the top right of the pane per form zooming operations Horizontal and or vertical scroll bars appear when there is not enough room to display a zoomed memory map in the Memory Map pane see Figure 4 25 on page 4 33 4 32 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Expert Linker Memory Map PM Input Sections a Mino E Min EA Iin a Zoom Options Figure 4 25 Memory Map Zoom Options To e Zoom in click on the magnifying glass icon with the sign above the upper right corner of the memory map window e Zoom out click on the magnifying glass icon with the sign above the upper r
122. Output Files DXE SM and OVL on page A 6 e Memory Map Files XML on page A 6 e Loader Output Files in Intel Hex 32 Format LDR on page A 6 e Splitter Output Files in ASCII Format LDR on page A 8 Assembler Object Files DOJ Assembler output object 00J files are in binary executable and linkable file ELF format Object files contain relocatable code and debugging information for a DSP program s memory segments The linker processes object files into an executable DXE file For information on the object file s ELF format see Format References on page A 10 Library Files DLB Library files the archiver s output are in binary executable and linkable file ELF format Library files called archive files in previous software releases contain one or more object files archive elements VisualDSP 4 0 Linker and Utilities Manual A 5 www BDTIC com ADI Build Files The linker searches through library files for library members used by the code For information on the ELF format used for executable files refer to Format References on page A 10 Linker Output Files DXE SM and OVL The linker s output files are in binary executable and linkable file ELF format These executable files contain program code and debugging information The linker fully resolves addresses in executable files For information on the ELF format used for executable files see the T
123. P 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File where e Pn is the processor name for example PO or P1 e executable_file_names is a list of one or more executable DXE or shared memory SM files Separate multiple file names with commas However Expert Linker allows the use of white spaces to separate multiple file names The linker searches the executable files in the order specified in the LINK_AGAINST command When a symbol s definition is found the linker stops searching Override the search order for a specific variable or label by using the RESOLVE command see RESOLVE on page 3 47 which directs the linker to use the specified resolver thus ignoring LINK_AGAINST for a specific symbol The LINK_AGAINST command for other symbols still applies MAP The MAP filename command outputs a map XML file with the specified name You must supply a file name Place this command anywhere in the LDF The MAP filename command corresponds to and may be overridden by the linker s Map lt fi lename gt command line switch on page 2 56 In VisualDSP if project options Link tab of the Project Options dialog box specify the generation of a symbol map the linker runs with Map lt projectname gt xml asserted and the LDF s MAP command generates a warning MEMORY The MEMORY command specifies the memory map for the target system After declaring memory segment
124. P BF533 ADSP BF535 formerly ADSP 21535 ADSP BF536 ADSP BF537 ADSP BF538 ADSP BF539 ADSP BF561 ADSP BF566 AD6532 Product Information You can obtain product information from the Analog Devices Web site from the product CD ROM or from the printed publications manuals Analog Devices is online at www analog com Our Web site provides infor mation about a broad range of products analog integrated circuits amplifiers converters and digital signal processors MyAnalog com MyAnalog com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information on products you are interested in You can also choose to receive weekly e mail notifications containing updates to the Web pages that meet your interests MyAnalog com provides access to books application notes data sheets code examples and more xxiv VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Preface Registration Visit www myanalog com to sign up Click Register to use MyAnalog com Registration takes about five minutes and serves as a means to select the information you want to receive If you are already a registered user just log on Your user name is your e mail address Proc essor Product Information For information on embedded processors and DSPs visit our Web site at www analog com processors which provides access to technical publica tions data sheets application no
125. RARIES seg_rth gt mem_rth stackseg Allocate a stack for the application df_stack_space df_stack_length 0x2000 gt mem_stak heap Allocate a heap for the application ldf_heap_space ldf_heap_end ldf_heap_space 0x2000 h m ldf_heap_length ldf_heap_end ldf_heap_space em_heap D 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI E LDF PROGRAMMING EXAMPLES FOR BLAC KFIN PRO C ESSO RS This appendix provides several typical LDFs used with Blackfin proces sors As you modify these examples refer to the syntax descriptions in LDF Commands on page 3 29 This appendix provides the following examples Linking for a Single Processor System on page E 2 Linking Large Uninitialized or Zero initialized Variables on page E 4 Linking for Assembly Source File on page E 6 Linking for C Source File Example 1 on page E 8 Linking for Complex C Source File Example 2 on page E 11 Linking for Overlay Memory on page E 17 The source code for several programs is bundled with the development software Each program includes an LDF file For working examples of the linking process examine the LDF files that come with the examples These examples are in the directory VisualDSP InstallPath gt Blackfin examples The development software includes a variety of preprocessor default LDF files These files provide an example L
126. RCHITECTURE ADSP 21161 SEARCH_DIR ADI_DSP 211xx lib MAP SINGLE PROCESSOR XML Generate a MAP file ADI_DSP is a predefined linker macro that expands to the VisualDSP installation directory Search for objects in directory 21k lib relative to the installation directory 1ibl61 d1b is an ADSP 2116x specific library and must precede precede libc dlb C library to link 2116x specific routines LIBS 1ibl61 d1b libc dlb single doj is a user generated file The linker will be invoked as follows linker T single processor ldf single doj COMMAND_LINE_OBJECTS is a predefined linker macro The linker expands this macro into the name s of the the object s doj files and libraries dlb files that appear on the command line In this example COMMAND_LINE_OBJECTS single doj 16l_hdr doj is the standard initialization file for 2116x OBJS COMMAND_LINE_OBJECTS 161_hdr doj A linker project to generate a DXE file PROCESSOR PO OUTPUT SINGLE DXE The name of the output file MEMORY Processor specific memory command 3 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File INCLUDE 21161_memory h SECTIONS Specify the output sections INCLUDE 21161_sections h end PO sections end PO processor Notes on Basic LDF File Examples In the following description th
127. SEARCH_DIR ADI_DSP Blackfin lib OBJECTS CRT COMMAND_LINE_OBJECTS MEMORY Define label system List of global Me EM_L2 TYPEC RA START 0xFO0000000 EM_HEAP TYPEC RA START 0xF0030000 EM_STACK TYPECRA START 0xF0038000 EM_SYSSTAC TYPECRA START OxFOO3E000 EM_ARGV TYPE RA START OxXFOO3FEQO or y PROCESSOR PO the only processor OUTPUT COMMAND_LINE_OUTPUT_FILE SECTIONS List of sections for processor L2 INPUT_SECTION_ALIGN 2 ENDCRT emory Segments DCOxFOO2FFFF WIDTH 8 DC OxFOO37FFF WIDTH 8 DCOxFOO3DFFF WIDTH 8 DCOxFOO3FDFF WIDTH 8 DCOxFOO3FFFF WIDTH 8 in the system PQ 3 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File Align a ode sections on 2 byte boundary S OBJECTS program LIBRARIES program T AT v UT U C S OBJECTS constdata 0 ON_ ECTIONS OBJECTS datal LIBRARIES datal 0 0 IES constdata L PUT_ PUT_ gt MEM_L2 S S S UT_SEC I S SECTIONS OBJECTS ctor LIBRARIES ctor stack ldf_stack_space ldf_stack_end ldf_stack_space MEMORY_SIZEOF MEM_STACK 4 gt MEM_STACK heap Allocate a heap for the application ldf_heap_space
128. SP 4 0 Linker and Utilities Manual 2 27 www BDTIC com ADI Link Target Description argv This section contains the command line arguments that are used as part of Profile Guided Optimization PGO ctor This section contains the addresses of constructors that are called before the start of a C program such as constructors for global and static objects This section must be terminated with the symbol __ctor_NULL_marker default LDF files ensure this It is required if compiling with C code When all ctor sections are merged they form a table containing a list of all constructors for all global C objects The table is only used at startup and can be placed in ROM When linking it is important that all ctor sections are merged in sequence no other sections in between and the run time library or the VDK run time library is placed with the first ctor section Note that the default LDF s ___ctor_NULL_marker symbol is placed in a section named ctor which must the the last of the ctor sec 9 tions to be used as input The final letter in this name is a lower case L bsz This section is a BSS style section for global zero initialized data This sec tion does not actually contain data it is zero filled upon loading via the VisualDSP IDDE or when processed by the loader bsz_init This section contains run time initialization data see meminit on page 2 62 for more inform
129. Section tab to change the output section s name or to set the overflow Overflow allows objects that do not fit in the current output section to spill over into the specified output section By default all objects that do not fit except objects that are manually pinned to the cur rent output section overflow to the specified section To specify output section properties 1 Right click an output section for example PROGRAM_DXE or CODE_DXE in the Memory Map pane 2 Choose Properties Figure 4 51 Output Section Properties 21x Output Section l Packing Alignment Name Initialization program None Overflow Ouput section to which objects overflow None m Contiguity of Input Sections Display linker warning if section is not mapped contiguously C Force contiguous placement of sections C Suppress linker warning about non contiguous placement of sections Placement Address Not available Size in words Not available coner Figure 4 51 Output Section Properties Dialog Box Output Section Tab 4 62 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker The selections in the output section segment list include None for no overflow and All output sections Pin objects to an output section by right clicking the object and choosing Pin to output section You can e Type a name for the output section in Name e In Overfl
130. Show stack heap usage IV Profile execution of object sections Figure 4 34 General Page of the Global Properties Dialog Box Then build the project and load the program After the program is loaded Expert Linker sets up the profiling bins to collect the profiling information When the program run is complete Expert Linker colors each object sec tion with a different shade of red to indicate how much time was spent executing that section For an example see Figure 4 35 4 42 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Input Sections Memory Map Sh Q Si seg_ctdm seg_dmda seg_init seg_pmco seg_pmda seg_tth libc dlb seg_pmco AEA t a a a amp i Figure 4 35 Colored Object Sections The fir doj seg_pmco section appears in the brightest shade of red indicating that it takes up most of the execution time The shading of the libio dlb seg_pmco section is not as bright This indicates that it takes up less execution time than fir doj seg_pmco The shading of the libc dlb seg_pmco section is black indicating that it takes up a negligi ble amount of the total execution time From Expert Linker you can view PC sample counts for object sections To view an actual PC sample count Figure 4 36 move the mouse pointer over an object section and view the PC sample count To view sample counts for functions located within an object section double click
131. Symbol resolver Figure 3 3 PROCESSOR Command Syntax Tree VisualDSP 4 0 Linker and Utilities Manual 3 45 www BDTIC com ADI LDF Commands The PROCESSOR command syntax is defined as processor_name Assigns a name to the processor Processor names follow the same rules as linker labels For more information see LDF Expressions on page 3 18 OUTPUT f77e_name DXE Specifies the output file name for the executable DXE file An OUTPUT command in a scope must appear before the SECTIONS command in that same scope MEMORY segment_commands Defines memory segments that apply only to this specific proces sor Use command scoping to define these memory segments outside the PROCESSOR command For more information see Command Scoping on page 3 17 and MEMORY on page 3 35 PLIT plit_commands Defines procedure linkage table PLIT commands that apply only to this specific processor For more information see PLIT on page 3 45 SECTIONS section_commands Defines sections for placement within the executable DXE file For more information see SECTIONS on page 3 48 RESOLVE symbol resolver Ignores any LINK_AGAINST command For details see the RESOLVE command 3 46 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File RESOLVE Use the RESOLVE symbol_name resolver command to ignore a LINK_A
132. T psh0 dxe SECTIONS places code instructions in MO internal memory code FILL Oxb3c00000 INPUT_SECTION_ALIGN 4 INPUT_SECTIONS PSHO_OBJECTS program LIBRARIES program gt MOCode place data in M2 internal memory datal INPUT_SECTIONS PSHO_OBJECTS datal LIBRARIES datal gt M2Data C 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for TigerSHARC Processors place data in M1 internal memory data2 INPUT_SECTIONS gt M place C RTL initializers in ctor Data INPU _SEC ONS LIBRA INPU _SEC ONS LIBRA INPU _SEC ONS INPU SE ONS LIBRA R R LIBRAR R R INPU place C RTL heap table heaptab INPUT_SECTIONS _SEC gt M2Data ONS LIBRA in M2 PSHO_OBJECTS data2 LIBRARIES data2 2 internal memory ES ctord ES ctorl ES ctor2 ES ctor3 ES ctor internal memory PSHO_OBJECTS heaptab LIBRARIES heaptab gt M2Data place C RTL JAL jstackseg ldf_js ldf_js gt M2S place C RTL kstackseg ldf_ks ldf_ks gt MIS U stack in M2 k_limit k_base M K U stack in M1 tack_limit tack_base tack M internal memory EMORY_SIZEOF M2Stack internal memory EMORY_SIZEOF M1Stack place C RTL heap in M2
133. The Browse button is grayed out when no symbol list is available for example if the project has not been linked When this button is active click it to display the Browse Symbols dialog box which shows a list of all the symbols Selecting a symbol from that list places it in the Symbol box of the Edit Symbol to Resolve dialog box To delete a symbol from the resolve list 1 Click Browse to display the Symbols to resolve list Figure 4 49 2 Select the symbol to delete 3 Right click and choose Remove Symbol 4 60 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Managing Memory Segment Properties Specify or change the memory segment s name start address end address size width memory space memory type and internal external flag To display the Memory Segment Properties dialog box Figure 4 50 1 Right click a memory segment for example PROGRAM or MEM_CODE in the Memory Map pane 2 Choose Properties The selected segment properties are displayed Memory Segment Properties ix Memory Segment Start Address End Address Size width Memor Space ROM RAM r Internal External PM RAM C nena DH C ROM Evtemal BH Cancel Figure 4 50 Memory Segment Properties Dialog Box VisualDSP 4 0 Linker and Utilities Manual 4 61 www BDTIC com ADI Managing Object Properties Managing Output Section Properties Use the Output
134. Uninitialized Vanables When linking an executable file that contains large uninitialized variables use the NO_INIT equivalent to SHT_NOBITS legacy qualifier or ZERO_INIT section qualifier to reduce the file size A variable defined in a source file normally takes up space in an object and executable file even if that variable is not explicitly initialized when defined For large buffers this action can result in large executables filled mostly with zeros Such files take up excess disk space and can incur long download times when used with an emulator This situation also may occur when you boot from a loader file because of the increased file size Listing D 2 shows an example of assembly source code Listing D 3 shows the use of the NO_INIT and ZERO_INIT sections to avoid initialization of a segment The LDF can omit an output section from the output file The NO_INIT qualifier directs the linker to omit data for that section from the output file Refer to SECTIONS on page 3 48 for more information on the NO_INIT and ZERO_INIT section qualifiers The NO_INIT qualifier corresponds to the UNINIT segment qualifier in previous ACH development tools Even if NO_INIT is not used the boot loader removes variables initialized to zeros from the LDR file and replaces them with instructions for the loader kernel to zero out the variable This action reduces the loader s output file size but still requires execution time for t
135. _data cplb_data EM_PROGRA L1_DATA_A L1_DATA_A EM_L1_DATA_A L1_DATA_B L1_DATA_B EM_L1_DATA_A voldata voldata EM_PROGRAM bsz bsz EM_L1_CODE bsz_init bsz_init EM_PROGRAM heap heap EM_HEAP stack stack EM_STAC ctor program EM_PROGRAM argv argv EM_ARGV VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 2 25 Link Target Description Table 2 3 Section Mapping in the Default ADSP BF535 LDF Cont d Input Section Output Section Memory Section noncache_code noncache_code noncache_code sdram sdram MEM_SDRAM vtbl sdram vtbl For Blackfin processors you can modify your LDF file to place objects into L1 memories when they are configured as SRAM There are several input memory sections used in the default LDF files for ADSP BF xxx processors which must be present in user s own LDF files These sections are described in detail below program This section is the default location for program code Code in this section is mapped into L1 Instruction memory if possible but will spill into slower memory if there is not enough space datal This section is the default location for global program data cplb_code This section stores the run time library s CPLB management routines It is usually mapped into L1 Instruction SRAM In particular if CPLB replacement is a possibility this section must be mapped to mem ory that is guarantee
136. a SSS 3 55 EXPERT LINKER Esper Linker Oe arrori 4 2 Lawnching the Create LDF Wizard sicsrerniresrrshamiernienttonananle 4 4 Step 1 Specifying Project Information penccccissusiakianstecnsteaunnnsiice 4 5 VisualDSP 4 0 Linker and Utilities Manual xi www BDTIC com ADI CONTENTS Step 2 Specifying System arora secsscconcerncinineeernaioess 4 6 Step 3r Completing the LDF Wizard snsssnteniosoriinenssii 4 9 Expert Linker Window Cv cocsiessensinrarinneinenirensies 4 10 kapot ee TE e EE 4 12 Input Sections Menu sninicneiriitntansitiibiienkoniak ian 4 12 Mapping an Input Section to an Output Section ee 4 14 Viewing Iconsand Calos scien meres 4 15 Sarine ODETE aore nrnn 4 17 Momor Map Pns sonrai mnie eeunneas 4 19 LORO ET DIE aaa E 4 22 Tree View Memory Map Representation sirnrosssrsisirasani 4 24 Graphical View Memory Map Representation eeeeeeeeee 4 25 Specifying Pre and Post Link Memory Map View sesse 4 31 Zooming In and Out on the Memory Map nascesse 4 32 Adding a Memory Sement searuinsnssiei ia 4 33 Inserting 4 Gap Intoa Memory Segment cccncsocsacsnssnsceseraauess 4 35 Working With Overlays sccsiiccdiasceatidsiutanieaacervissiuatdenasntainineds 4 36 Viewing Section COntENnTS cijeciciccrcontimeinneimeis 4 38 Viewing Gymboree 4 4 Profiling Object Se ected ememenennaie 4 42 Adding Shared Memory Segments and Linking Object Files 4 46 Managing Object Free OS sorprendre AR 4 51 Managing General Global Properties sssissorsu
137. a text file that contains the names of object files separated by white space The operation makes long lists easily manageable The archiver which is sometimes called a librarian is a general purpose utility It combines and extracts arbitrary files This manual refers to DSP object 00J files because they are relevant to DSP code development 6 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver Creating a Library From VisualDSP Within the VisualDSP development environment you can choose to create a library file as your project s output To do so specify DSP library file as the target type on the Project page of the Project Options dialog box VisualDSP writes its output to lt projectname gt DLB To modify or list the contents of a library file or perform any other operations on it run the archiver from the el far command line as shown in Archiver Com mand Line Reference on page 6 11 To maintain code consistency use the conventions in Table 6 1 When you create a library VisualDSP writes lt projectname gt DLB Table 6 1 File Name Extensions used with Archiver Extension File Description DLB Library file DOJ Object file Input to archiver TXT Text file used as input with the i switch Making Archived Functions Usable In order to use the archiver effectively you must know how to write archive files which make your DSP function
138. abbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd O0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Oxaabbccdd pragma section my_zero_section ZERO_INIT unsigned int B 128 int void main int i int not_init 0 not_zero 0 for i 0 i lt 100 i if A i Oxaabbccdd not_init for i 0 i lt 128 i if BE i 0 not_zerot printf AL d elements not initialized n not_init printf B d elements not zeroed n not_zero return 0 VisualDSP 4 0 Linker and Utilities Manual 7 9 www BDTIC com ADI Using the Memory Initializer Invoking the Memory Initializer There are several ways to invoke the Memory Initializer either from t
139. ackfin Processors LIBS libc dlb libevent dlb libsftflt dlb libcpp_blkfn dlb libcpprt_blkfn dlb libdsp dlb LIBRARIES LIBS librt dlb single doj is a user generated file The linker will be invoked as follows linker T single processor ldf single doj COMMAND_LINE_OBJECTS is a predefined linker macro The linker expands this macro into the name s of the the object s doj files and archives dlb files that appear on the command line In this example COMMAND_LINE_OBJECTS single doj OBJECTS COMMAND_LINE_OBJECTS A linker project to generate a DXE file PROCESSOR PO OUTPUT SINGLE DXE The name of the output file MEMORY Processor specific memory command INCLUDE BF535_memory ldf SECTIONS Specify the Output Sections INCLUDE BF535_sections 1df end PO sections end PO processor VisualDSP 4 0 Linker and Utilities Manual E 3 www BDTIC com ADI Linking Large Uninitialized or Zero initialized Variables Linking Large Uninitialized or Zero initialized Variables When linking an executable file that contains large uninitialized variables use the NO_INIT equivalent to SHT_NOBITS legacy qualifier or ZERO_INIT section qualifier to reduce the file size A variable defined in a source file normally takes up space in an object and executable file even if that variable is not explicitly initialized when defined For large
140. acro window and add a new macro for PO Add LDF Macro For example 0BJECTS_P0 Repeat the same step for P1 and shared sm 3 Add the object D0J files that correspond to each processor as well as to the shared memory segment To do this right click on each recently created LDF macro and then select Add Object Library File The use of LDF macros becomes extremely useful in systems where there is more than one object files 00J files per processor or shared memory segments in which case the same step previously explained should be followed for each D00 file 4 48 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker 4 Delete the LDF macro COMMAND_LINE_OBJECTS from the OBJECTS macro to avoid duplicate object files during the linking process Right click on the COMMAND_LINE_OBJECTS macro and click Remove 5 The left pane needs to be sorted by Input Sections instead of LDF macros To do that right click on the left pane and select Sort by Input Sections Additionally in the right pane change the Memory Map View Mode from Graphical to Tree mode Right click on the Memory Map window select View Mode and then Memory Map Tree 6 Map the new macros into memory To do this place each macro into its corresponding memory section 7 Repeat the same steps for processor P1 0BJECTS_P1 and for the shared memory segment shared sm place 0BJECTS_SM in the SDRAM section 8 Press Rebuild All
141. age 4 19 Expert Linker x Input Sections Memory Map EJ IVint11 I intl2 I int13 Ivintl 4 I int15 I int4 I intS IVint6 I int I int8 mem_INT_INT14 OxicO mem_INT_INT15 OxleO mem_itab 0x200 mem_code 0x242 mem_data2 08000 mem_heap Oxaf00 mem_stack Oxbs00 mem_datal OxcO000 A A A E E e e e e A Figure 4 7 Expert Linker Window Using LDF commands the linker reads the input sections from object D0J files and places them in output sections in the executable file The LDF file defines the processors memory and indicates where within that memory the linker is to place the input sections Using drag and drop you can map an input section to an output section in the memory map Each memory segment may have one or more output sections under it Input sections that have been mapped to an output sec 4 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker tion are displayed under that output section For more information refer to Input Sections Pane on page 4 12 and Memory Map Pane on page 4 19 Access various Expert Linker functions with your mouse Right click to display appropriate menus and make selections VisualDSP 4 0 Linker and Utilities Manual 4 11 www BDTIC com ADI Input Sections Pane Input Sections Pane The I
142. ain c Linker Files B dot_product_asm ldf COOOL AAA AAA void main COOSA AAA 00808F r4 r0 a 008090 r8 0xd0 008091 r0 0x1 008092 jump ma libi 008093 pm ee 008094 idle o Te main int i double result 3 0 Header Files result 0 a_dot_b a b 008095 jump __ 7 result 1 a_dot_c a __done_ result 1 a_dot_c_asm a 008096 nop result 2 a_dot_d a d 008097 nop oie C rogram Files Analog Devices 3 32 Bit 21k Exanpled complete product 0 0 000000 product 1 0 707107 product 2 0 500000 Hated et e e e A Ready Figure 2 2 VisualDSP Environment Within VisualDSP specify tool settings for project builds Use the Project menu to open Project Options dialog box Figure 2 3 Figure 2 4 and Figure 2 5 show the project option selections for SHARC TigerSHARC and Blackfin processors respectively These dialog boxes allow you to select the target processor type and and name of the executable file as well as VisualDSP tools available for use with the selected processor When using the VisualDSP IDDE use the Link option from the Project Options dialog box Figure 2 6 to select and or set linker func tional options VisualDSP 4 0 Linker and Utilities Manual 2 7 www BDTIC com ADI Linking Environment Project Options f
143. aken for an object file It may not follow the ib_file during an append or create operation The file include switch i must immediately precede the name of the file to be included The archiver s i switch enters a list of members from a text file instead of listing each member on the command line Use the library file name first following the switches The i and v switches are not operational switches and can appear later When using the archiver s p switch it is not necessary to identify members on the command line Enclose file names containing white space or colons within straight quotes Append the appropriate file extension to each file The archiver assumes nothing and does not do it for you Wildcard options are supported with the use of the wildcard char acter 6 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver e The obj_file name D0J object file can be added removed or replaced in the 7ib_file e The archiver s command line is not case sensitive Archiver Symbol Name Encryption Symbol name encryption protects intellectual property contained in an archive DLB library that might be revealed when using meaningful sym bol names Code and test a library with meaningful symbol names and then use archive library encryption on the fully tested library to disguise the names Source file names in the symbol tables of object files in the archive are not
144. anager uses to determine where the overlay resides and where it is executed Table 5 1 shows the linker generated constants and examples of processor specific addresses The overlay manager places the constants in arrays as shown in Figure 5 3 and Figure 5 4 The arrays are referenced by using the overlay ID as the index to the array The index or ID is stored in a Modify register Jn Kn 5 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands Table 5 1 Linker Generated Constants and Processor Specific Addresses Constant TigerSHARC SHARC Blackfin _ov_startaddress_1 0x04000000 0x20000 0x00000000 _ov_startaddress_2 0x04000080 0x20000 0x00000010 _ov_endaddress_1 0x0400007F 0x20017 0x0000000F _ov_endaddress_2 0x04000100 0x00018 0x00000010 ov_word_size_run_l 0x04000080 0x00018 0x00000010 ov_word_size_run_2 0x04000080 0x00018 0x00000010 ov_word_size_live_l 0x04000080 0x00010 0x00000010 ov_word_size_live_2 0x04000080 0x00010 0x00000010 _ov_runtimestartaddress_1 0x04001000 0x08800 0xF0001000 _ov_runtimestartaddress_2 0x04001080 0x08800 0xF0001000 for TigerSHARC processors and M for SHARC and Blackfin processors and the beginning address of the array is stored in the Index register Jm Km for TigerSHARC processors and 1 for SHARC and Blackfin processors VAR liveAddresses 2 VAR runAddresses 2 VAR runWor
145. anager now sets any breakpoints requested on the overlays and resume execution The second breakpoint is at _ov_start The label _ov_start should be defined in the overlay manager in code always executed immediately before the transfer of a new overlay begins The breakpoint disables all of the overlays in the debugger the idea being that while the target is run ning in the overlay manager the target is unstable in the sense that the debugger should ot rely on the overlay information it may gather since the target is in flux The debugger still functions without this break point but there may be some inconsistencies while overlays are being moved in and out Memory Overlay Support The overlay support provided by the DSP tools includes e Specification of the live and run locations of each overlay e Generation of constants e Redirection of overlay function calls to a jump table Overlay support is partially user designed in the LDF file You specify which overlays share run time memory and which memory segments establish the live and run space Listing 5 1 shows the portion of an LDF file that defines two overlays This overlay declaration configures the two overlays to share a common run time memory space The syntax for the OVERLAY_INPUT command is described in OVERLAY_GROUP on page 3 39 5 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Co
146. and fol lowed by definitions of its components SHARED_MEMORY OUTPUT ie mime SM SECTIONS section _commetnas Figure 5 12 SHARED_MEMORY Command Syntax The command components are e OUTPUT Specifies the output file name fi 7e_name SM of the shared memory executable SM file An OUTPUT command in a SHARED_MEMORY command must appear before the SECTIONS command in that scope e SECTIONS Defines sections for placement within the shared memory executable SM file Figure 5 13 shows the scope of SHARED_MEMORY commands in the LDF VisualDSP 4 0 Linker and Utilities Manual 5 41 www BDTIC com ADI Advanced LDF Commands The NEMNORY command appears in a scope that is available to any SHARED_LPMEMNORY command of PROCESSOR command that ywses the shared memory To achieve this type of scoping across multiple liaks place the shared MEMORY command in 4 separate LDF and vse the ITHCLUDE 5 command to include that memory in both links MEMORY my_shared_ram T PEC RAM START Ox04000000 LENGTH 8k WIDTH 32 SHARED_MEMORY i OUT PUTE shared sm SECTIONS my_shared_secti ons srtior_eom maerds gt my_shared_ram PROCESSOR poi piocessor_commands with Biek agaes shared m emorpy PROCESSOR pli processor_commands with Biek agaes shared memorye Figure 5 13 LDF Scopes for SHARED_MEMORY Command 5 42 VisualDSP 4 0 Linker and Utilities Manual www BDT
147. and line switches 2 51 command line syntax 2 47 commands 2 47 file name conventions 2 50 linking object files 2 51 memory map files XML A 6 options 2 3 output files A 6 outputs 1 7 overlay constants generated by 5 9 running from command line 2 47 running from VisualDSP 2 6 warning messages 2 15 linker command line switches Darchitecture 2 55 Dprocessor 2 55 e 2 62 e 2 59 ek secName 2 59 es secName 2 59 ev 2 59 filename 2 55 flags meminit 2 60 flags pp 2 60 h help 2 60 i include search directory 2 60 ip individual placement 2 60 jcs2l 2 61 jcs2l 2 62 keep symbolName 2 62 L path 2 56 M 2 56 Map filename 2 56 MDmacro 2 57 meminit 2 62 MM 2 56 MUDmacro 2 57 nonmemcheck 2 62 od directory 2 63 o filename output file 2 63 describing the target 2 16 pp 2 63 error messages 2 15 proc processor 2 63 executable files A 6 S 2 57 1 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI save temps 2 64 si revision version silicon revision 2 64 sp 2 65 sp skip preprocessing 2 65 s strips all symbols 2 64 T filename 2 58 2 66 t trace 2 65 version display version 2 66 v verbose 2 65 warnonce 2 66 Wnumber warning suppression 2 58 Wwarn num override error message 2 58 xref filename 2 66 Linker Description File overview 2 5 3 1 linker exe 1 2 linker generated constants 5 16 link
148. anual www B DTIC com ADI M2Data M2Heap M2Stac SDRAM MSO MS1 Listing 2 3 ADSP BF533 MEMORY Command Code MEMORY E E RAM RAM RAM RAM RAM RAM TYPE TYPE TYPE TYPE TYPE TYPE k end of Define label syste List of global Memo _L2_CODE TYPECRAM START OxFO00000 _L1_DATA_A TYPECRAM START OxFF80000 L1_DATA_B TYPECRAM START OxFF90000 HEAP TYPECRAM START OxF003000 _ STACK TYPECRAM START OxF003800 _ ARGV TYPECRAM START OxFOO3FEO _ SDRAMO TYPECRAM START 0x0000000 NANNNNN ART AR ART AR AR ART TS101_me 0x00100000 0x0010C000 0x0010C800 0x04000000 0x08000000 0x0C000000 ory ldf file memory T ry Segments 0 END 0xF002FFF 0 END OXFF803FF 0 END OXFF903FF 0 END 0xF0037 0 END 0xF003D 0 END 0xF003F 4 END 0x07FFF xy END OXOO10BFFF END OxO0010C7FF END OXOO10FFFF END OXO7FFFFFF END OXOBFFFFFF END OXOFFFFFFF Linker TH 8 TH 8 TH 8 TH 8 TH 8 TH 8 TH 8 The above examples apply to the preceding discussion of how to write a MEMORY command and to the following discussion of the SECTIONS command The SECTIONS command is not atomic it can be interspersed with other directives including location counter information You can
149. ap tree Figure 4 39 Memory Map Start Address End Address seg_tth 3 seq_tth E O65L_hdr doj seg_rth seg_dmda seg_heap seg_stak seg_init seg_pmco seg_pmda wa seg_pmda ext_mem e ext_mem E libe dlb seq_pmco E libio dlb seq_pmco E fit doj seq_pmco 1S pbb Figure 4 39 Percentage of Total PC Sample Count 0x8000 0x8000 08000 08900 09000 09500 OxcO000 Oxc110 Oxd800 NAA 0 20000 0 20000 0 20000 0x2033f Ox20c5e Ox80ff 0x808e 0x808e Ox8tft 0x94ff Dx9fff 0xc10f Oxcfff Dxdfff N A Dx2ffff 0x218a4 0x2033e 0x20c5d 0x218a4 0 04 135 6 80 35 48 57 68 24845 129681 210796 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 4 45 Memory Map Pane Adding Shared Memory Segment and Linking Object Files In many DSP applications where large amounts of memory for multipro cessing tasks and sharing of data are required an external resource in the form of shared memory may be desired Refer to Engineer To Engineer Note EE 202 Using the Expert Linker for Multiprocessor LDF for a detailed description and proce dure Find this EE Note on Analog Devices Web site at http www analog com ee notes System Information Confiqure the DSP system by choosirg the processors in your system and the processor type Processor type System type Singl
150. are not called The keeplist is a comma delimited list of objects to be retained VisualDSP 4 0 Linker and Utilities Manual 3 33 www BDTIC com ADI LDF Commands When utilizing the linker s data elimination capabilities it is essential that certain objects continue to use the KEEP command so that the C C run time libraries function properly The safest way to do this is to copy the KEEP command from the default LDF file into your own LDF file For the C and C run time libraries to work properly retain the following symbols with KEEP ctor_NULL_marker and lib_end_of_heap_descriptions A symbol specified in keep7ist must be a global symbol KEEP SECTIONS The linker uses the KEEP_SECTIONS command to specify a section name in which elimination should not take place This command can appear anywhere the ELIMINATE_SECTION command appears You may either use the KEEP_SECTIONS command or the ek linker switch on page 2 59 LINK_AGAINST The LINK_AGAINST command checks specific executables to resolve vari ables and labels that have not been resolved locally To link programs for multiprocessor systems you must use the LINK_AGAINST command in the LDF file This command is an optional part of the PROCESSOR and SHARE_MEMORY commands The syntax of the LINK_AGAINST command as part of a PROCESSOR command is PROCESSOR Pn LINK_AGAINST executable_file_names 3 34 VisualDS
151. arting at the beginning of MEM_ARGV Refer to VisualDSP 4 0 C C Compiler and Library Manual for the appropriate processor architecture for more information on Profile Guided Optimization Passing Arguments for Simulation or Emulation This feature applies to Blackfin processors ONLY To support simulation and emulation in Blackfin processors the linker should obtain the start address and buffer length of the argument list from the ARGV memory segment of the LDF file refer to Example 1 Basic LDF File for Blackfin Processors on page 3 6 To set the address 1 In the MEMORY section add a line to define the MEM_ARGV section 2 Add a command to define the ARGV section and the values for ldf_argv_space ldf_argv_length and 1ldf_argv_end Refer to the VisualDSP 4 0 User s Manual or the online Help for infor mation about the simulator and command line arguments Do not use command line arguments for linked programs without first modifying the LDF file to allocate a buffer suitable for your application 2 46 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Linker Command Line Reference This section provides reference information including e Linker Command Line Syntax on page 2 47 e Linker Command Line Switches on page 2 51 When you use the linker via the VisualDSP IDDE the settings on the Link tab of the Project Options dialog box correspond to linker comman
152. assembler s preprocessor uses the define command to define macros and symbolic constants 3 26 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File For more information refer to the VisualDSP 4 0 Compiler and Library Manual and the VisualDSP 4 0 Assembler and Preprocessor Manual for appropriate target processors Built In LDF Macros The linker provides the following built in LDF macros e COMMAND_LINE_OBJECTS This macro expands into the list of object D0J and library DLB files that are input on the linker s command line Use this macro within the INPUT_SECTIONS syntax of the linker s SECTIONS command This macro provides a comprehensive list of object file input that the linker searches for input sections e COMMAND_LINE_LINK_AGAINST This macro expands into the list of executable DXE or SM files that one input on the linker s command line This macro provides a comprehensive list of executable file input that the linker searches to resolve external symbols e COMMAND_LINE_OUTPUT_FILE This macro expands into the output executable file name which is set with the linker s o switch This file name corresponds to the lt projectname dxe gt set via the VisualDSP Project Options dia log box Use this macro only once in your LDF file for file name substitution within an OUTPUT command e COMMAND_LINE_OUTPUT_DIRECTORY This macro expands int
153. ation It is expected that this section is mapped into read only memory When a DXE file has been processed by the Mem ory Initializer utility and the program starts running other data sections such as datal and constdata are initialized by data copied from this section 2 28 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker stack This section is the area where the run time stack is located Local vari ables function parameters and so on are stored here heap This section is the area where the heap is located Dynamically allocated data is placed here noncache_code This section is mapped to areas of memory that cannot be cache and take program code This section would be used if you have a function that turns on the cache to ensure that the function itself does not reside in cache as executing code from a cache memory address causes a hardware exception sdram0 This section allows code or data to be mapped explicitly into external memory by using the SECTION directive This can be used to place large infrequently used data or functions into external memory to free up valu able internal memory vtbl This section contains C virtual function tables The default LDF files place the virtual function tables into the default data memory area but this can be re mapped as required You can also direct the compiler to use a different section for C virtual function tables by using the sec
154. ation see INPUT_SECTIONS on page 3 51 OVERLAY_ID Returns the overlay ID NUMBER_OF_OVERLAYS Returns the number of overlays that the current link generates when the FIRST_FIT or BEST_FIT overlay placement for ALGO RITHM is used Note Not currently available ALGORITHM Directs the linker to use the specified overlay linking algorithm The only currently available linking algorithm is ALL_FIT For ALL_FIT the linker tries to fit all the OVERLAY_INPUT into a single overlay that can overlay into the output section s run time memory segment FIRST_FIT Not currently available For FIRST_FIT the linker splits the input sections listed in OVERLAY_INPUT into a set of overlays that can each overlay the output section s run time memory segment according to First In First Out FIFO order BEST_FIT Not currently available For BEST_FIT the linker splits the input sections listed in OVERLAY_INPUT into a set of overlays that can each overlay the output section s run time memory segment but splits these over lays to optimize memory usage 3 54 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File e SIZE Sets an upper limit to the size of the memory that may be occupied by an overlay e FORCE_CONTIGUITY Forces contiguous placement of sections NOFORCE_CONTIGUITY sup presses a linker warning about non contiguous placement of sections in the o
155. ation for program code datal This section is the default location for global program data data2 This section is the default location for global program data specified with the pm memory qualifier mem_argv This section contains the command line arguments that are used as part of Profile Guided Optimization PGO ctor This section contains the addresses of constructors that are called before the start of a C program such as constructors for global and static objects This section must be terminated with the symbol __ctor_NULL_marker the default 1df files ensure this It is required if compiling with C code VisualDSP 4 0 Linker and Utilities Manual 2 23 www BDTIC com ADI Link Target Description When all ctor sections are merged they form a table containing a list of all constructors for all global C objects The table is only used at startup and can be placed in ROM When linking it is important that all ctor sections are merged in sequence no other sections in between and the run time library or the VDK run time library is placed with the first ctor section Note that the default LDF s ___ctor_NULL_marker symbol is placed in a section named ctor which must the the last of the ctor sec 9 tions to be used as input The final letter in this name is a lower case L heaptab This section is the area from which memory allocation functions and operators new mall
156. binary number or b number 3 18 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File LDF Keywords Commands and Operators Table 3 2 lists LDF file keywords used in Blackfin SHARC and Tiger SHARC processor families Descriptions of LDF keywords operators macros and commands are provided in the following sections e Miscellaneous LDF Keywords on page 3 20 e LDF Operators on page 3 21 LDF Macros on page 3 26 e LDF Commands on page 3 29 Keywords are case sensitive the linker recognizes a keyword only when the entire word is UPPERCASE Table 3 2 LDF File Keywords Summary ABSOLUTE ADDR ALGORITHM ALIGN ALL_FIT ARCHITECTURE BEST_FIT BM BOOT DEFINED pil ELIMINATE ELIMINATE_SECTIONS END FALSE FILL FIRST_FIT INCLUDE INPUT_SECTION_ALIGN INPUT_SECTIONS KEEP KEEP_SECTIONS LENGTH LINK_AGAINST MAP MEMORY MEMORY_SIZEOF MPMEMORY NUMBER_OF_OVERLAYS OUTPUT OVERLAY_GROUP OVERLAY_ID OVERLAY_INPUT OVERLAY_OUTPUT PACKING PLIT VisualDSP 4 0 Linker and Utilities Manual 3 19 www BDTIC com ADI LDF Keywords Commands and Operators Table 3 2 LDF File Keywords Summary Contd PLIT_SYMBOL_ADDRESS PLIT_SYMBOL_OVERLAY ID pM PROCESSOR RAM RESOLVE RESOLVE_LOCALLY ROM SEARCH_DIR SECTIONS SHARED_MEMORY SHT_NOBITS SIZE SIZEOF SROM START TYPE VERBOSE WI
157. braries for objects on page 2 56 Produces dependencies on page 2 56 MM Builds and produces dependencies on page 2 56 Map file Outputs a map of link symbol information to a file on page 2 56 MDmacro def Defines and assigns value def to a preprocessor on page 2 57 macro MUDmacro Undefines the preprocessor macro on page 2 57 5 Omits debugging symbols from the output file on page 2 57 T filename Names the LDF on page 2 58 Wwarn number Demotes the specified error message to a warning on page 2 58 Wnumber Selectively disables warnings by one or more mes on page 2 58 sage numbers For example W1010 disables warn ing message 111010 e Eliminates unused symbols from the executable on page 2 59 ek secName Specifies a section name in which elimination on page 2 59 should not take place VisualDSP 4 0 Linker and Utilities Manual 2 53 Linker Command Line Reference Table 2 9 Linker Command Line Switches Summary Contd Switch Description More Info es secName Names input sections secName list to which elim on page 2 59 ination algorithm is applied ev Eliminates unused symbols verbosely on page 2 59 flag meminit Passes each comma separated option to the on page 2 60 Memory Initializer utility flag pp Passes each comma separated option to the prepro on page 2 60 cessor h Outputs the list of command line switches and exits on page 2 60 help i path Incl
158. buffers this action can result in large executables filled mostly with zeros Such files take up excess disk space and can incur long download times when used with an emulator This situation also may occur when you boot from a loader file because of the increased file size Listing E 2 shows an example of assembly source code Listing E 3 shows the use of the NO_INIT and ZERO_INIT sections to avoid initialization of a segment The LDF can omit an output section from the output file The NO_INIT qualifier directs the linker to omit data for that section from the output file Refer to SECTIONS on page 3 48 for more information on the NO_INIT and ZERO_INIT section qualifiers The NO_INIT qualifier corresponds to the UNINIT segment qualifier in previous ACH development tools Even if you do not use NO_INIT the boot loader removes variables initialized to zeros from the LDR file and replaces them with instructions for the loader ker nel to zero out the variable This action reduces the loader s output file size but still requires execution time for the processor to ini tialize the memory with zeros E 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blackfin Processors Listing E 2 Large Uninitialized Variables Assembly Source SECTION NO_INIT extram_area 1Mx8 EXTRAM BYTE huge_buffer 0x006000 SECTION ZERO_INIT zero_extram_area BY TE huge_zero_buffer
159. ccommodates a particular processor by typing the following linker command linker proc processor If the architecture is not installed the linker prints a message to that effect ELIMINATE The ELIMINATE command enables object elimination which removes symbols from the executable file if they are not called Adding the VERBOSE keyword ELIMINATE VERBOSE reports on objects as they are eliminated This command performs the same function as the e command line switch see on page 2 59 When using either the linker s data elimination feature via the Expert Linker or command line switches or the ELIMINATE command in an LDF file it is essential that certain objects are continue to use the KEEP command so that the C C run time libraries function properly The safest way to do this is to copy the KEEP command from the default LDF file into your own LDF file For the C and C run time libraries to work properly retain the following symbols with KEEP on page 3 33 ctor_NULL_marker and lib_end_of_heap_descriptions In order to allow efficient elimination the structure of the assembly source has to be such that the linker can unambiguously identify the boundaries of each source object in the input section a source object is a function or a data item Specifically an input section must be fully covered by non overlapping source objects with explicit boundaries The boundary of a function item
160. ces the operation of other commands that appear within the range of that scope The following LDF commands support advanced memory management functions overlays multiprocessor and shared memory features e MPMEMORY e OVERLAY_GROUP on page 5 32 e PLIT on page 5 36 e SHARED_MEMORY on page 5 40 For detailed information on other LDF commands refer to LDF Com mands on page 3 29 MPMEMORY Q The MPMEMORY command specifies the offset of each processor s physical memory in a multiprocessor target system After you declare the processor names and memory segment offsets with the MPMEMORY command the linker uses the offsets during multiprocessor linking Refer to Memory Overlay Support on page 5 8 for a detailed description of overlay functionality Your LDF file and other LOF files that it includes may contain one MPMEMORY command only The maximum number of processors that you can declare is architecture specific Follow the MPMEMORY command with PROCESSOR processor_name commands which contain each processor s MEMORY and SECTIONS commands Figure 5 8 shows MPMEMORY command syntax 5 30 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands MPMEMORY shared_segment_commands processor_name START address_number Figure 5 8 MPMEMORY Command Syntax Tree Definitions for parts of the MPM
161. ck of run time memory For detailed command description refer to OVERLAY_GROUP on page 5 32 Refer to Memory Management Using Overlays on page 5 4 for a detailed description of overlay functionality PAC KING In VisualDSP 4 0 the PACKING command is used with ADSP 21xxx SHARC processors as described in Packing in SHARC Processors on page 3 41 Processors exchange data with their environment on chip or off chip through several buses The configuration placement and amounts of memory are determined by the application Specify memory of width s and data transfer byte order s that suit your needs The linker places data in memory according to the constraints imposed by your system s architecture The LDF s PACKING command specifies the order the linker uses to place bytes in memory This ordering places data in memory in the sequence the processor uses as it transfers data The PACKING command allows the linker to structure its executable out put to be consistent with your installation s memory organization This command can be applied scoped on a segment by segment basis within the LDF file with adequate granularity to handle heterogeneous memory configurations Any memory segment requiring more than one packing command may be divided into homogeneous segments Syntax The syntax of the PACKING command is PACKING number_of_bytes byte_order_list VisualDSP 4 0 Linker and Ut
162. com ADI Managing Object Properties Managing Elimination Properties Eliminate unused code from the target DXE file Specify the input sections from which to eliminate code and the symbols you want to keep Select the Global Properties dialog box by right clicking in the Input Sections pane and choosing Properties Use the Elimination tab to perform elimination Figure 4 46 Global Properties zix General Processor PLIT Elimination JV verbose linker output of eliminated objects Sections to apply elimination intl O Mint 1 int12 IMintl3 lt K ii is Symbols to keep _main Verbose linker output of eliminated objects Cancel Figure 4 46 Elimination Tab Selecting the Enable elimination of unused objects option enables elimi nation This check box is grayed out when elimination is enabled through the linker command line or when the LDF file is read only 4 56 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker When Verbose linker output of eliminated objects is selected the elimi nated objects are shown as linker output in the Output window s Build page during linking This check box is grayed out when the Enable elimi nation of unused objects check box is cleared It is also grayed out when elimination is enabled through the linker command line or when the LDF file is read only The Sections to apply elimination box lists all input sec
163. configuration variable Instead this option ensures that the memory layout allows caches to be enabled later Note that the SDRAM is not enabled automatically when USE_CACHE is enabled A common user error is to enable cache despite not having specified USE_CACHE which would lead to code or data corruption as cache activity overwrites the contents of SRAM Therefore the LDF files use the follow ing guard symbols ___1ll_code_cache l1l_data_cache_a l_data_cache_b 1 With the exception of the core MMRs which the linker considers out of bounds 3 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File These symbols are defined by the LDF files and are given values that is resolved to addresses 0 or 1 depending on whether USE_CACHE is defined The run time library examines these symbols when cache configuration is requested and refuses to enable a cache if the corresponding guard symbol is zero indicating that valid information already occupies this space For more information refer to VisualDSP 4 0 C C Compiler and Library Manual section Caching and Memory Protection Example 2 Basic LDF File for TigerSHARC Proc essors Listing 3 2 is an example of a basic LDF file for the ADSP TS101 proces sor formatted for readability Note the MEMORY and SECTIONS commands and refer to Notes on Basic LDF File Examples on page 3 11 Other LDF f
164. cription Linker options control how the linker processes object files and library files These options specify various criteria such as search directories map file output and dead code elimination You select linker options via linker command line switches or by settings on the Link page of the Project Options dialog box within the VisualDSP environment LDF commands in a Linker Description File LDF define the target memory map and the placement of program sections within processor memory The text of these commands provides the information needed to link your code VisualDSP 4 0 Linker and Utilities Manual 2 3 www BDTIC com ADI Linker Operation The VisualDSP Project window displays the LDF file as a source file though the file provides linker command input Using directives in the LDF file the linker Reads input sections in the object files and maps them to output sections in the executable file More than one input section may be placed in an output section Maps each output section in the executable to a memory segment a contiguous range of memory addresses on the target processor More than one output section may be placed in a single memory segment Linking Process Rules The linking process observes these rules Each source file produces one object file Source files may specify one or more input sections as destinations for compiled assembled object s The compiler and assembler produce objec
165. ction datal spa myArray 1 section datal global myArmy my Array 0 var mtyAsray 256 myArray 1 myArray 255 any Auray dat F 3 myArray 255 Assembler Linker Figure E 1 Assembly to Memory Code Placement VisualDSP 4 0 Linker and Utilities Manual E 7 www BDTIC com ADI Linking for C Source File Example 1 Linking for C Source File Example 1 Listing E 7 shows an example LDF that describes the memory placement of a simple C source file Listing E 6 which contains code and data that is to reside in and execute from L2 SRAM This example also assumes that the code and data declared in L2 memory is cacheable within L1 code and data memories The LDF file includes two commands MEMORY and SEC TIONS which are used to describe specific memory and system information Refer to Notes for Listing 3 2 on page 3 9 for information on items in this basic example Listing E 6 Simple C Source File Example 1 int myArray 256 void main void int 1 for i 0 1 lt 256 i yArrayLi i end main Listing E 7 Example Simple C based LDF File for ADSP BF535 Processor ARCHITECTURE ADSP BF535 SEARCH_DIR ADI_DSP Blackfin lib i tdefine LIBS libsmal1535 d1lb 1ibc535 d1b libm3free535 d1b libevent535 dlb 11bi0535 d1b libcpp535 dlb libcpprt535 d1b libdsp535 d1lb libsftf1t535 d1lb libetsi535 d1lb idle535 doj LIBRARIES LIBS librt535 d1b OBJECTS crts535 doj COMMAND_LI
166. ction_commands and a memory_segment 3 48 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File SECTIONS section_stetements express lan sectionname tarttgualifrer section_commands gt memory_seanent J INPUT_SECTIONS file source Larchive_member input_lebels Lt LOF macro expression list_of_files OVERLAY_OUTPUT File_name OYL INPUT_SECTIONS jnput_section_commands ALGORITHM ALL_FIT SIZE expression FORCE_CONTIGUIT NOFORCE_CONTIGUITY FILL hex number PLIT p 3 _commands OVERLAY _INPUT overlay commands gt overlay_memory_seament Figure 3 4 SECTIONS Command Syntax Tree Parts of a SECTION declaration are e section_name Starts with a letter underscore or period and may include any let ters underscores digits and points A section_name must not conflict with any LDF keywords The special section name PLIT indicates the procedure linkage table PLIT section that the linker generates when resolving sym bols in overlay memory Place this section in non overlay memory to manage references to items in overlay memory VisualDSP 4 0 Linker and Utilities Manual 3 49 www BDTIC com ADI LDF Commands The special section name MEMINIT indicates where to place the run time initialization structures used by the C run time library The linker places this section into the largest available unused memory
167. ctions with Initialization Flags in the input file produces an initialization stream and places it in the out put file The Memory Initializer command line switches are listed in Table 7 1 Invoking Memory Initializer from Linkers Command Line The simplest way to invoke the Memory Initializer from the linker s com mand line is to use the linker s meminit switch The linker also provides the flag meminit switch that passes each comma separated option to the Memory Initializer For example linker proc ADSP BF535 meminit input dxe o output dxe Invoking Memory Initializer from Compilers Command Line The simplest command line to invoke the Memory Initializer from the compiler s command line is for example for Blackfin processors ccblkfn proc ADSP BF535 mem input dxe o output dxe Invoking Memory Initializer with Callback Executables Invocation of Memory Initializer from the IDDE Select Project gt Project Options gt Link The Link option is displayed Use the Additional options field to process callback executable files For example if you have two callback executable files cali back1 dxe and callback2 dxe and you wish to pass them to the Memory Initializer you can enter them in the Additional options window as VisualDSP 4 0 Linker and Utilities Manual 7 11 www BDTIC com ADI Using the Memory Initializer meminit flag meminit Init callbackl dxe Init callback2 dxe then click OK see Figure
168. d 5 32 word size 5 9 5 16 ov_id_loaded buffer 5 19 OVL files 1 7 2 49 3 53 A 6 B 4 dumping B 4 extracting content from B 4 linker A 6 _ov_runtimestartaddress_ 5 9 5 25 _ov_size_ 5 9 5 25 _ov_startaddress_ 5 25 _ov_startaddress_ 5 9 __ov_start breakpoint 5 7 _ov_start breakpoint 5 8 ov_word_size_live_ 5 9 5 25 ov_word_size_run_ 5 9 5 25 P packing 3 39 data 3 39 DMA 3 41 external execution 3 43 in SHARC processors 3 41 overlay format 3 42 packing h header file 3 40 PACKING Q LDF command 3 39 packing properties specifying 4 65 p archiver command line switch 6 13 pinning to output section 4 23 pinning objects to output section 4 63 PLIT about 5 10 allocating space for 5 38 constants 5 37 executing user defined code 5 10 overlay management 5 7 resolving inter overlay calls 5 27 size 4 70 specifying overlay properties 4 55 I 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI summary 5 40 syntax 5 36 PLIT LDF command 3 52 5 36 about 5 36 in SECTIONS 3 52 instruction qualifier 5 37 PLIT_SYMBOL_ADDRESS 5 37 PLIT_SYMBOL_OVERLAYID 5 37 plit output section 5 38 PLIT procedure linkage table LDF command 3 45 PLIT_SYMBOL_ADDRESS 5 37 PLIT_SYMBOL constants 5 40 PLIT_SYMBOL_OVERLAYID 5 37 pp end after preprocessing linker command line switch 2 63 pp exe preprocessor 1 8 preprocessor 1 8 compiler 1 9 running from linker
169. d line switches VisualDSP calls the linker with these switches when linking your code For more information refer to the VisualDSP 4 0 Users Manual and the VisualDSP online Help Linker Command Line Syntax Run the linker by using one of the following normalized formats of the linker command line linker proc processor switch switch object object linker T target ldf switch switch object object The linker command requires proc processorora T lt ldf name gt for the link to proceed If the command line does not include proc processor the LDF file following the T switch must con tain a Darchitecture command Use proc processor instead of the deprecated Darchitecture on the command line to select the target processor See Table 2 9 on page 2 53 for more information The command line must have at least one object an object file name Other switches are optional and some commands are mutually exclusive VisualDSP 4 0 Linker and Utilities Manual 2 47 www BDTIC com ADI Linker Command Line Reference The following are the example linker commands linker proc ADSP 21161 p0 doj T target ldf t o program dxe linker proc ADSP TS201 p0 doj T target ldf t o program dxe linker proc ADSP BF535 p0 doj T target ldf t o program dxe The linker command line except for file names is case sensitive For example linker t differs from linker T When using the linker s command line
170. d memory space e ROM RAM e Internal External memory location 4 34 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker 5 Click OK Inserting a Gap Into a Memory Segment A gap may be inserted into a memory segment in the graphical memory map To insert a gap 1 Right click on a memory segment 2 Choose Insert gap The Insert Gap dialog box appears as shown in Figure 4 27 It displays the start address end address and size of the selected memory segment Insert Gap Ei x Memory segment properties Start address 022000 End address Ox23fff Size 0 2000 Location of gap End of memory segment Size of gap 022000 Sze Start address End address Cancel Figure 4 27 Insert Gap Dialog Box VisualDSP 4 0 Linker and Utilities Manual 4 35 www BDTIC com ADI Memory Map Pane You may insert a gap at the start of the memory segment or the end of it e Ifthe Start is chosen the Start address for the gap is grayed out and you must enter an End Address or Size of the gap e Ifthe End is chosen the End address of the gap is grayed out and you must enter a Start Address or Size Working With Overlays Overlays appear in the memory map window in two places run space and live space Live space is where the overlay is stored until it is swapped into run space Because multiple overlays can exist
171. d the overlay run time address of the symbol called Ensure the registers used in the plit do not contain values that cannot be overwritten PLIT j4 PLIT_SYMBOL_OVERLAYID j5 PLIT_SYMBOL_ADDRESS JUMP OverlayManager db The following is an example of PLIT command implementation for Blackfin processors PLIT PO PLIT_SYMBOL_OVERLAYID P1 L PLIT_SYMBOL_ADDRESS P1 H PLIT_SYMBOL_ADDRESS JUMP _OverlayManager As a general rule minimize overlay transfer traffic Improve performance by designing code to ensure overlay functions are imported and use mini mal or no reloading VisualDSP 4 0 Linker and Utilities Manual 5 39 www BDTIC com ADI Advanced LDF Commands PLIT Summary A PLIT is a template of instructions for loading an overlay For each overlay routine in the program the linker builds and stores a list of PLIT instances according to that template as it builds its executable file The linker may also save registers or stack context information The linker does not accept a PLIT without arguments If you do not want the linker to redirect function calls in overlays omit the PLIT commands entirely To help write an overlay manager the linker generates PLIT_SYMBOL con stants for each symbol in an overlay The overlay manager can also e Be helped by manual intervention Save the target s state on the stack or in memory before loading and executing an overlay fu
172. d to always available this means that it must be addressed by a locked CPLB 2 26 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker constdata This section is used for global data which is declared as constant and for literal constants such as strings and array initializers The compiler s default behavior is to assume that const data remains constant and therefore can be mapped into read only memory although the default LDFs do not do this Refer to the const read write switch in the VisualDSP 4 0 C C Compiler and Library Manual for Blackfin Proces sors for more details cplb_data This section stores CPLB configuration tables In particular the cpl btabx doj files where x indicates the target mapped by the LDFs are placed into this section It must be mapped to a data area that is always available If CPLB replacement is a possibility this section must be mapped into memory that is covered by a locked CPLB L1_DATA_A This section is used to allow data to be mapped explicitly into L1 Data A SRAM using the SECTION directive By default the compiler does not gen erate data here This section is analogous to L1_code L1_DATA_B This section is similar to L1_DATA_A except that it is used to map data into L1 Data B SRAM voldata This section is used for data that may change due to external influences such as DMA and should not be placed into cached data areas VisualD
173. dSizeL2 VAR liveWordSizeL2 _ov_startaddress_l _ov_startaddress_ 2 _ov_runtimestartaddress_l _ov_runtimestartaddress 2 OV word size run_l OV word size run_2 OV word size live_l OV word size live_2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 5 17 Memory Management Using Ovenays Exernal Benory hve mal Memory Addess 0204000000 Overby 1 24x32 bits Overfay Runtime Memory Ox 400007 F Figure 5 3 TigerSHARC Processor Overlay Live and Run Memory Sizes Figure 5 4 shows the difference between overlay live and run size in SHARC processor memory Overlays 1 and 2 are instruction overlays with a run word width of 48 bits Because external memory is 32 bits the live word size is 32 bits Overlay 1 contains one function with 16 instructions Overlay 2 contains two functions with a total of 40 instructions The live word size for overlays 1 and 2 are 24 and 60 words respectively The run word size for overlay 1 and 2 are 16 and 40 words respectively 5 18 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands Exteel Menor Inmernal Memory Addres s 022 0000 Overby 1 24x32 bats Ox2 0017 FUNC_A Ox2 0018 Overtay2 60 x32 bits FUNC_B FUNC_C O22 0063 Figure 5 4 SHARC Processor Overlay Live and Run Memory Sizes Storing Overlay ID
174. ded to each defined symbol s value For example PROCESSOR project PSHO references th symbol buffer and PROCESSOR project PSH1 defin at address 0x22000 The linker will fix up the reference to buffer in PSHO s code to address Ox22000 MPMEMORY PSH1 0x22000 0x120000 0x142000 MPMEMORY PSHO START 0x100000 PSH1 START 0x120000 MEMORY This is used for all processors Alternativel a PROCESSOR can describe its own memory seg_rth TYPECPM RA START 0x00040000 END 0x00 WIDTH 48 seg_init TYPE PM RA START 0x00040100 END 0x00 WIDTH 48 seg_int_code TYPE PM RA START 0x00040200 END 0x00 WIDTH 48 seg_pmco TYPECPM RA START 0x00040288 END 0x00 WIDTH 48 seg_pmda TYPE PM RA START 0x00042700 END 0x00 WIDTH 32 seg_dmda TYPE DM RA START 0x00050000 END 0x00 WIDTH 32 seg_heap TYPE DM RA START 0x00052000 END 0x00 WIDTH 32 seg_stak TYPE DM RA START 0x00053000 END 0x00 WIDTH 32 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI D 7 Linking for MP and Shared Memory LIBRARIES 1ibcl61 dlb Three link projects are specified in one LDF file The first link project is a shared memory link project against which the PROCESSOR projects are linked SHARED_MEMORY The file containing the shared data buffers is defined in shared c SHARED_OBJECTS shar
175. der are grayed out Custom Permits the selection of number of bytes and packing order other choices Specifies the number of bytes and packing order of the selected method The list of packing methods is derived from the included packing h file Packing method information number of bytes and packing order appears but you cannot change it 4 In Number of bytes if Custom is selected specify the number of bytes to be reordered at one time This value does not include the number of null bytes inserted into memory 5 In Packing order specify byte packing To do that select a byte and perform one of these actions e Click the keyboard s Up arrow or Down arrow key e Drag and drop it to a new location e Insert a null byte by clicking on Insert e Delete a null byte by selecting the null byte and clicking Delete 6 Click OK 4 66 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Managing Alignment and Fill Properties Use the Alignment tab to set the alignment and fill values for the output section When the output section is aligned on an address the linker fills the gap with zeros 0 NOP instructions or a specified value To specify alignment properties 1 Right click a memory segment in the Memory Map pane 2 Choose Properties 3 Click the Alignment tab Figure 4 53 Output Section Properties ix J a pK cancel Figure 4 53 Output Sec
176. dress External memory connects to the processor s external port which extends the processor s 24 bit address and 32 bit data buses off the proces sor The processor can make 8 16 32 or 48 bit accesses to external memory for instructions and 8 16 or 32 bit accesses for data Table 2 5 shows the access types and words for processor s external memory accesses The processors DMA controller automatically packs external data into the appropriate word width during data transfer VisualDSP 4 0 Linker and Utilities Manual 2 33 www BDTIC com ADI Link Target Description The external data bus can be expanded to 48 bits if the link ports are disabled and the corresponding full width instruction packing mode IPACK is enabled in the SYSCON register Ensure that link ports are disabled when executing code from external 48 bit memory Table 2 5 Internal to External Memory Word Transfers Word Type Transfer Type Packed Instruction 32 16 or 8 to 48 bit packing Normal Word Data 32 bit word in 32 bit transfer Short Word Data Not supported The total addressable space for the fixed external memory bank sizes depends on whether SDRAM or Non SDRAM such as SRAM SBSRAM is used Each external memory bank for SDRAM can address 64 Mwords For Non SDRAM memory each bank can address up to 16 Mwords The remaining 48 Mwords are reserved These reserved addresses for non SDRAM accesses are aliased to the first 16 Mspac
177. e Se lt mem_itab lt 8 mem_code w mem_data2 w mem_heap g mem_stack w mem_datal 0x200 0x242 08000 Oxaf00 Oxb800 OxcO000 Ox1 df Ox1 ff 0x241 Ox7 fff Oxaeff Oxb ft Oxbfff Dxffff i Figure 2 10 Expert Linker Window 2 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Linker Waming and Error Messages Linker messages are written to the VisualDSP Output window standard output when the linker is run from a command line Messages describe problems the linker encountered while processing the LDF file Warnings indicate processing errors that do not prevent the linker from producing a valid output file such as unused symbols in your code Errors are issued when the linker encounters situations that prevent the produc tion of a valid output file Typically these messages include the name of the LDF file the line num ber containing the message a six character code and a brief description of the condition Example gt linker proc ADSP unknown a doj Error 111010 The processor ADSP unknown is unknown or unsuppported Interpreting Linker Messages Within VisualDSP the Output window s Build tab displays project build status and error messages In most cases double clicking a message displays the line in the source file causing the problem You can access descriptions of linker messages from VisualDSP online Help by select ing a six charac
178. e edt section cht This section Catch Handler Types Table is used to map to the RTTI type information The C Exception Library uses it to determine the types that correspond to catch entries for a try block chtl This section contains the terminator for the cht table section It must be mapped immediately after the cht section frt This section Function Range Table is used by the C Exception Library during exception processing to unwind the stack of active functions frtl This section contains the terminator for the frt table section It must be mapped immediately after the frt section Memory Characteristics Overview This section provides an overview of basic memory information including addresses and ranges for sample target architectures Some portions of the processor memory are reserved Refer to the hardware reference manual for target processor for more information VisualDSP 4 0 Linker and Utilities Manual 2 31 www BDTIC com ADI Link Target Description SHARC Memory Characteristics As an example of the SHARC memory architecture the ADSP 21161 processor contains a large dual ported internal memory for single cycle simultaneous independent accesses by the core processor and I O proces sor The dual ported memory in combination with three separate on chip buses allow two data transfers from the core and one transfer from the I O processor in a single cycle Using the IO bus the I
179. e switch 7 17 SECTIONS LDF command 2 40 3 13 3 48 seg_argv input section 2 19 2 20 seg_ctdm input section 2 19 2 20 seg_ctdml input section 2 20 seg_ctdml memory section 2 21 seg_dmda input section 2 19 seg_dmda memory section 2 21 seg_heap input section 2 21 seg_init_code input section 2 19 seg_init input section 2 19 2 20 seg_int_code input section 2 20 segment declaration 3 37 seg_pmco input section 2 19 2 20 seg_pmda input section 2 19 2 20 seg_rth input section 2 19 seg_stak input section 2 19 2 21 seg_vtbl input section 2 19 2 21 2 25 2 29 selecting section format 4 39 semaphores reflective D 11 SEPARATE _MEM_SEGMENTS assembler directive 2 44 setting alignment 4 67 command line arguments base address 2 46 fill values 4 67 SHARC memory sections gdt gdel frt frtl cht chtl edt edtl 2 21 seg_argv 2 20 seg_ctdm 2 20 seg_ctdml 2 21 seg_dmda 2 21 seg_heap 2 21 seg_init 2 20 seg_init_code 2 20 seg_pmco 2 20 seg_pmda 2 20 seg_rth 2 19 seg_stak 2 21 seg_vtbl 2 21 SHARED_MEMORY LDF command 3 55 5 40 shared memory system C 6 D 6 short calls converting 2 61 SHT_NOBITS section qualifier C 4 D 4 E 4 SHT_NOBITS keyword 3 50 C 4 D 4 E 4 simulation passing arguments in Blackfin processors 2 46 si revision silicon revision linker command line switch 2 64 SIZEQ LDF command 3 55 SIZEOF LDF operator 3 24 SM file 5 40 SM files 1 7 2 49 A 6 li
180. e MEMORY and SECTIONS commands connect the program to the target processor For complete syntax informa tion on LDF commands see LDF Commands on page 3 29 These notes describe features of a typical LDF file as presented in Listing 3 1 Listing 3 2 and Listing 3 3 e ARCHITECTURE ADSP xxxxx specifies the target architecture pro cessor For example ARCHITECTURE ADSP TS201 The architecture dictates possible memory widths and address ranges the register set and other structural information for use by the debugger linker and loader The target architecture must be installed in VisualDSP e SEARCH_DIR specifies directory paths searched for libraries and object files on page 3 47 For example the argument ADI_DSP TS 1ib specifies one search directory for TigerSHARC libraries and object files The linker supports a sequence of search directories presented as an argument list directoryl directory2 The linker follows this sequence and stops at the first match e LIBRARIES is a list of the library and object files searched to resolve references in the required order Some of the options specify the selection of one library over another VisualDSP 4 0 Linker and Utilities Manual 3 11 www BDTIC com ADI LDF File Overview OBJECTS is an example of a user definable macro which expands to a comma delimited list of file names Macros improve readability by replacing long strings of text Concept
181. e encrypted unless they are correlated with a sym bol having external binding that should not be encrypted Symbols with external binding can be encrypted when they are used only within the library in which they are defined Symbols with external binding that are not defined in the library or are defined in the library and referred to out side of the library should not be encrypted Symbols that should not be encrypted must be placed in a text file and the name of that file given as the exclude file command line argument Some symbol names have a prefix or suffix that has special meaning The debugger does not show a symbol starting with period and a symbol starting with and ending with end is correlated with another sym bol For example bar would not be shown by the debugger and _foo end would correlated with the symbol _foo appearing in the same object file The encryption process encrypts only the part of the sym bol after any initial and before any final end This part is called the root of the symbol name Since only the root is encrypted a name with a prefix or suffix having special meaning retains that special meaning after encryption 6 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver The encryption process ensures that a symbol with external binding is encrypted the same way in all object files contained in the library This process als
182. e hardware reference and programming reference manuals that describe your target architecture Manual Contents The manual contains Chapter 1 Introduction This chapter provides an overview of the linker and utilities Chapter 2 Linker This chapter describes how to combine object files into reusable library files to link routines referenced by other object files Chapter 3 Linker Description File This chapter describes how to write an LDF file to define the target Chapter 4 Expert Linker This chapter describes Expert Linker which is an interactive graphical tool to set up and map processor memory Chapter 5 Memory Overlays and Advanced LDF Commands This chapter describes how overlays and advanced LDF commands are used for memory management Chapter 6 Archiver This chapter describes the e1 far archiver utility used to combine object files into library files which serve as reusable resources for code development Chapter 7 Memory Initializer This chapter describes the Memory Initializer utility that is used to generate a single initialization stream and save it in a section in the output executable file VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Preface e Appendix A File Formats This appendix lists and describes the file formats that the develop ment tools use as inputs or produce as outputs e Appendix B Utilities This append
183. e manual and in its data sheet This section contains e Representing Memory Architecture on page 2 17 e Specifying the Memory Map on page 2 17 e Placing Code on the Target on page 2 40 e Profile Guided Optimization Support on page 2 45 e Passing Arguments for Simulation or Emulation on page 2 46 2 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Representing Memory Architecture The LOF file s MEMORY command is used to represent the memory archi tecture of your processor system The linker uses this information to place the executable file into the system s memory Perform the following tasks to write a MEMORY command e Memory Usage List the ways your program uses memory in your system Typical uses for memory segments include interrupt tables initialization data program code data heap space and stack space Refer to Specifying the Memory Map on page 2 17 e Memory Characteristics List the types of memory in your proces sor system and the address ranges and word width associated with each memory type Memory type is defined as RAM or ROM e MEMORY Command Construct a MEMORY command to com bine the information from the previous two lists and to declare your system s memory segments For complete information refer to MEMORY on page 3 35 Specifying the Memory Map A DSP program must conform to the constraints imposed by th
184. e name for the LDF file The default file name is project_name 1df where project_name is the name of the currently opened project The Project type selection specifies whether the LDF is for a C C assembly or a VDK project The default setting depends on the source files in the project For example if files are in the project the default is G if a VDK H file is in the project the default is VDK and so on This set ting determines which template is used as a starting point VisualDSP 4 0 Linker and Utilities Manual 4 5 www BDTIC com ADI Launching the Create LDF Wizard For a case where there is a mix of assembly and C files or any other file combination the most abstract programming language should be selected For example for a project with C and assembly files a C LDF should be selected Similarly for a C and C project the C LDF should be selected Press Next Step 2 Specifying System Information Choose whether the project is for a single processor system or a multipro cessor MP system Create LDF Step 2 of 3 iE System Information Configure the DSP system by choosing the processors in your system and the processor type m System type Processor type Single processor ADSP BF535 Multiprocessor F Jo Setup system from debug session settings m Processor properties Processors Output file COMMAND_LINE_OUTPUT_FILE ro Executables to link against
185. e overwritten by future callback executables or by the code or data spaces of the primary executable After all the callback codes are executed the RTL routine starts to initialize the processors memory with the initialization stream created from the primary input executable file and overwrites the memory spaces previously initialized with the call back codes After that the RTL routine returns execution to the start up header and the application proceeds as normal If there are no callback executables to be executed the RTL routine imme diately starts the process of initializing memory for the primary application 7 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initializer Using the Memory Initializer There are several reasons why it may be beneficial to use the Memory Initializer e The system needs to initialize the RAM memory from the data stored in ROM e It is desirable to reduce the overall size of the executable e Initialization executable files need to run to configure the system before the primary application starts If it is decided to use the Memory Initializer the preparation starts from the linker description file LDF and the source files of the project Preparing the Linker Description File LDF If a section is to be processed by the Memory Initializer in order to create the initialization stream the section must be marked in the LDF file to indicate the k
186. e proces sor s data path bus widths and addressing capabilities The following information describes an LDF file for a hypothetical project This file specifies several memory segments that support the SECTIONS command as shown in SECTIONS on page 3 48 The three topics are important when allocating memory e Memory Usage and Default Memory Sections on page 2 18 e Memory Characteristics Overview on page 2 31 e Linker MEMORY Command in LDF File on page 2 38 VisualDSP 4 0 Linker and Utilities Manual 2 17 www BDTIC com ADI Link Target Description Memory Usage and Default Memory Sections Input section names are generated automatically by the compiler or are specified in the assembly source code The LDF file defines memory sec tion names and output section names The default LDF file handles all compiler generated input sections refer to the Input Section column in Table 2 1 Table 2 2 and Table 2 3 The produced DXE file has a corre sponding output section for each input section Although programmers typically do not use output section labels the labels are used by down stream tools Use the ELF file dumper utility e1 fdump exe to dump contents of an output section for example data1 of an executable file See elfdump ELF File Dumper on page B 1 for information about this utility The following sections show how input sections output sections and memory segme
187. e processor amp DSP TS101 Multiprocessor a Set up system from debug session settings Processor propeties Processors Output file MP Start MPEnd COMMAND_LINE_OUTPUT_DIRECTOR Cx2000000 Ox23ffff Ce2200000 O27 Fett Executables to link against 2300000 Oxzbfffff Cx2c00000 Ox2tfffif gt snnnnann Figure 4 40 Multiprocessor LDF Selection 4 46 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker To add a shared memory section to the LDF file right click in the Memory Map pane and select New Shared Memory Then specify a name for the shared memory segment SM and select the processors that have access to this shared memory segment Refer to Managing Shared Mem ory Properties on page 4 74 for more information As shown in Figure 4 41 a new shared memory segment visible to pro cessors P0 and P1 has been successfully added to the system Note that variables declared in the shared memory segment will be accessed by both processors in the system In order for the linker to be able to correctly resolve these variables the link against command should be used once again Shared Memory Properties Ea ES Shared Memary Elimination Output file name shared sm Expert Linker MP T5101 Idf Input Sections Memory Map Processors sharing MEM_AR bsz o MoCode c bsz_init 10000 5 data1 s0000 mbas
188. e symbol ___ctor_NULL_marker the default 1df files ensure this It is required if compiling with C code 2 20 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker seg_dmda This section is the default location for global data and also for data that is qualified with the dm keyword For example int abc 100 Located in seg_dmda int dm def 100 Located in seg_dmda seg_heap This section is the area from which memory allocation functions and operators new malloc and so on allocate memory seg_stak This section is the area where the run time stack is located Local vari ables function parameters and so on are stored here seg_vtbl This section contains C virtual function tables The default LDF files place the virtual function tables into the default data memory area but this can be re mapped as required You can also direct the compiler to use a different section for C virtual function tables by using the section compiler switch Other Memory Sections The compiler and libraries also use other data sections that are linked into one of the above memory sections These data sections include seg_ctdml The symbol ___ctor_NULL_marker located in the C run time library marks the end of the list of global and static constructors and is placed in this data section The linker ensures that the contents of this data section are the last items in seg_ctdm
189. ect names The following SHARC processor examples are functionally identical 3 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File sec_program INPUT_SECTIONS main doj program fft doj program gt mem_program DOJS main doj fft doj dxe_program INPUT_SECTIONS DOJUS program gt mem_program e The MEMORY command on page 3 35 defines the target system s physical memory and connects the program to the target system Its arguments partition the memory into memory segments Each memory segment is assigned a distinct name memory type a start and end address or segment length and a memory width These names occupy different namespaces from input section names and output section names Thus a memory segment and an output sec tion may have the same name e Each PROCESSOR command on page 3 45 generates a single exe cutable file e The OUTPUT command on page 3 46 produces an executable DXE file and specifies its file name In basic example the argument to the 0UTPUT command is the COMMAND_LINE_OUTPUT_FILE macro on page 3 27 The linker names the executable file according to the text following the o switch which corresponds to the name specified in the Project Options dialog box when the linker is invoked via the VisualDSP IDDE gt linker o outputfilename e SECTIONS on page 3 48 specifies the placement of code a
190. ecutable file is to compile or assem ble C C or assembly source files into object files The VisualDSP development software assigns a D0J extension to object files Figure 1 1 Source Files Object Files C CPP ASM DOU Compiler and Assembler Figure 1 1 Compiling and Assembling Object files produced by the compiler via the assembler and by the assembler itself consist of input sections Each input section contains a particular type of compiled assembled source code For example an input section may consist of program opcodes or data such as variables of various widths Some input sections may contain information to enable source level debugging and other VisualDSP features The linker maps each input section via a corresponding output section in the executable to a memory segment a contiguous range of memory addresses on the target system VisualDSP 4 0 Linker and Utilities Manual 1 3 www BDTIC com ADI Compiling and Assembling Each input section in the LDF file requires a unique name as specified in the source code Depending on whether the source is C C or assembly different conventions are used to name an input section see Chapter 3 Linker Description File Input Section Directives in Assembly Code A SECTION directive defines a section in assembly source This directive must precede its code or data SHARC Code Example SECTION DM asmdata Declares section a
191. ed doj The output name of this shared object is used subsequently in the LINK_AGAINST command of the PROCESSOR projects OUTPUT shared sm shared c has data declarations only There is no need to specify any output other than seg_dmda SECTIONS sec_dmda INPUT_SECTIONS SHARED_OBJECTS seg_dmda gt mem_dmda end shared sections end shared memory The second link project described in this LDF file is a DXE project which will be linked against the SHARED link project defined above PROCESSOR_PSHO PSHO_OBJECTS psh0O doj 161_hdr doj LINK_AGAINST shared sm OUTPUT psh0 dxe SECTIONS dxe_pmco INPUT_SECTIONS PSHO_OBJECTS seg_pmco LIBRARIES seg_pmco gt mem_pmco D 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for SHARC Processors dxe_pmda PUT_SECTIONS P TS seg_pmda LIBRARIES seg_pmda gt mem_pmda dxe_dmda PUT_SECTIONS ECTS seg_dmda LIBRARIES seg_dmda Wn I je v ma CH NN N rap I C3 je dxe_init PUT CTIONS PSHO_OBJECTS seg_init LIBRARIES seg_init gt mem_init dxe_rth PUT_SECTIONS PSHO_OBJECTS seg_rth LIBRARIES seg_rth gt mem_rth stackseg Allocate a stack for the application ldf_stack_space ldf_stack_length 0x2000 gt mem_sta Vu 3 E N3 Ww
192. eg_dmda gt mem_seg_dmda the LDF file may contain the command ldf_start_dmda ADDR mem_seg_dmda The linker generates the constant 1df_start_dmda and assigns it the start address of the mem_seg_dmda output section DEFINED Operator Syntax DEFINED symbol The linker returns 1 when the symbol appears in the global symbol table and returns 0 when the symbol is not defined Use this operator to assign default values to symbols Example If an assembly object linked by the LDF file defines the global symbol test the following statement sets the test_present constant to 1 Other wise the constant has the value 0 test_present DEFINED test VisualDSP 4 0 Linker and Utilities Manual 3 23 www BDTIC com ADI LDF Operators MEMORY_SIZEOF Operator Syntax MEMORY_SIZEOF segment_name This operator returns the size in words of the named memory segment Use this operator when a segment s size is required to move the current location counter to an appropriate memory location Example This example from a default LDF file sets a linker generated constant based on the location counter plus the MEMORY_SIZEOF operator sec_stack ldf_stack_limit ldf_stack_base MEMORY_SIZEOF mem_stack 1 gt mem_stack The sec_stack section is defined to consume the entire mem_stack memory segment SIZEOF Operator Syntax SIZEOF section_name This operator returns the size in byt
193. employ processors with small amounts of on chip memory and place much of the program code and data off chip The linker supports the linking of executable files for systems with overlay memory Applications notes on the Analog Devices Web site provide detailed descriptions of this technique for example EE 66 Using Memory Overlays for SHARC processors e EE 180 Using Code Overlays from ROM on the ADSP 21161N EZ KIT Lite e EE 230 Code Overlays on the ADSP 2126x SHARC Family of DSPs This section describes the use of memory overlays The topics are e Introduction to Memory Overlays on page 5 5 e Overlay Managers on page 5 7 e Memory Overlay Support on page 5 8 e Example Managing Two Overlays on page 5 13 e Linker Generated Constants on page 5 16 e Overlay Word Sizes on page 5 16 e Storing Overlay ID on page 5 19 e Overlay Manager Function Summary on page 5 20 e Reducing Overlay Manager Overhead on page 5 20 e Using PLIT and Overlay Manager on page 5 25 5 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands The following LDF commands facilitate overlay features e OVERLAY_GROUP on page 5 32 e PLIT on page 5 36 Introduction to Memory Overlays Memory overlays support applications that cannot fit the program instruc tions into the processor s internal memory In such cases
194. encrypted The encryption algorithm is not reversible Also encryption does not guarantee a given symbol is encrypted the same way when different libraries or different builds of the same library are encrypted The s switch see Table 6 2 is used to encrypt symbols in lt in_library_file gt to produce lt library_file gt Symbols in lt exclude_file gt are not encrypted and lt type letter gt provides the first letter of scrambled names Command Syntax The following command line encrypts symbols in an existing archive file elfar s v library_file in_library_file exclude_file type letter where s Selects the encryption operation v Selects verbose mode which provides statistics on the encrypted symbols VisualDSP 4 0 Linker and Utilities Manual 6 15 www BDTIC com ADI Archiver Command Line Reference library_file Specifies the name of the library DLB file to be produced by the encryption process in_library_file Specifies the name of the archive DLB file to be encrypted This file is not altered by the encryption process unless in archive is the same as out archive exclude file Specifies the name of a text file containing a list of symbols not to be encrypted The symbols are listed one or more to a line separated by white space type letter The initial letter of type letter provides the initial letter of all encrypted symbols Encryption Constraints All local symbols can b
195. ensure that the linker applies the command to all file searches VisualDSP 4 0 Linker and Utilities Manual 3 47 www BDTIC com ADI LDF Commands Example ARCHITECTURE ADSP 21161 MAP SINGLE PROCESSOR XML Generate a MAP file SEARCH_DIR ADI_DSP 21k lib ABC XYZ ADI_DSP is a predefined linker macro that expands to the VisualDSP install directory Search for objects in directory 21k lib relative to the install directory and to the ABC XYZ directory SEC TIONS The SECTIONS command uses memory segments defined by MEMORY commands to specify the placement of output sections into memory Figure 3 4 shows syntax for the SECTIONS command An LOF file may contain one SECTIONS command within each of the PROCESSOR commands The SECTIONS command must be preceded by a MEMORY command which defines the memory segments in which the linker places the output sections Though an LDF file may contain only one SECTIONS command within each processor command scope multi ple output sections may be declared within each SECTIONS command The SECTIONS command s syntax includes several arguments expressions or section_declarations Use expressions to manipulate symbols or to position the current loca tion counter Refer to LDF Expressions on page 3 18 Use a section_declaration to declare an output section Each section_declaration has a section_name optional section_type se
196. er confirms that version numbers given on the command line conform to an nn nn nn format three numbers separated by The twc switch see Table 6 2 on page 6 12 causes the archiver to raise a warning if the ver sion number is not in this form The check ensures that the version number starts with a number in this format VisualDSP 4 0 Linker and Utilities Manual 6 9 www BDTIC com ADI Archiver Guide Adding Text to Version Information Additional text can be added to the end of the version information For example elfar twc 1 2 new library lib dlb Warning ar0081 Version number does not match num num num format Version 0 0 0 will be used elfar pv lib dlb User Archive Version Info 0 0 0 1 2 new library 6 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver Archiver Command Line Reference The archiver processes object files into a library file with a DLB extension which is the default extension for library files The archiver can also append delete extract or replace member files in a library as well as list them to stdout This section provides the following reference information on the archiver command line and linking e elfar Command Syntax e Archiver Parameters and Switches e Command Line Constraints e Archiver Symbol Name Encryption elfar Command Syntax Use the following syntax to run elfar from the command line elfar La c dje p
197. er command line switch 2 63 o OutputFile dxe command line switch A7 operators LDF 3 21 output directory specifying 2 63 OUTPUT LDF command 3 13 4 19 output sections about 2 3 dumping 2 18 mapped contiguously 4 64 overflow 4 63 rules 2 4 specifying properties 4 62 _ov_endaddress_ 5 9 5 25 _ov_end breakpoint 5 7 5 8 overlay ALL_FIT algorithm 4 70 identifier 5 10 live space 4 36 run space 4 36 overlay file producing 3 53 OVERLAY_GROUP LDF command 3 39 5 32 overlay ID 5 19 VisualDSP 4 0 Linker and Utilities Manual I 11 www BDTIC com ADI INDEX OVERLAY_ID LDF identifier 3 54 OVERLAY_INPUT LDF command 3 53 DEFAULT_OVERLAY 3 53 overlay library files B 4 overlay manager about 5 4 5 6 5 7 assembly code 5 38 constants 5 16 major functions 5 7 performance summary 5 20 placing constants 5 16 PLIT table 5 13 storing overlay ID 5 19 overlay memory linking for E 17 OVERLAY_OUTPUT LDF command 3 53 overlays address 5 9 5 16 ADSP 21xxx processors D 13 ADSP TSxxx processors C 12 constants 5 9 5 15 debugging 5 7 dumping library files B 4 grouped 5 32 grouping 5 32 in Memory Map pane 4 36 live address 4 70 live space 4 36 loading and executing 5 21 loading instructions with PLIT 5 40 managing properties 4 69 memory 5 4 5 5 multiple 4 36 numbering 5 25 reducing overhead 5 20 run address 4 70 run space 4 37 special symbols 5 25 ungroupe
198. er macros 3 26 3 27 linking about 2 2 controlling 2 3 file with large uninitialized variables C 4 D 4 E 4 file with large zero initialized variables C 4 D 4 E 4 multiprocessor systems C 6 D 6 overlay memory system E 17 process rules 2 4 single processor system C 2 D 2 E 2 linking environment 2 6 Link tab setting linker options 2 7 link target 2 16 loader creating bootloadable image 1 10 1 11 hex format files A 6 INDEX location counter 3 25 definition of 3 25 L path libraries and objects linker command line switch 2 56 M M1Heap input section 2 24 M1Stack input section 2 24 M2Stack input section 2 24 macroname declaration for user macros 3 28 macros LDF 3 26 preprocessor 3 26 user declared 3 28 map file 2 51 2 56 3 35 Map filename linker command line switch 2 56 MAP LDF command 3 35 mapping input sections to output sections 4 14 M archiver command line switch 6 12 M dependency check and output linker command line switch 2 56 MDmacro macro value linker command line switch 2 57 mem_argv input section 2 22 2 23 MEM_ARGV memory section 2 25 2 26 2 45 2 46 MEM_HEAP memory section 2 25 MemInit command line switches 7 13 MemInit exe utility 7 1 meminit linker command line switch 2 62 meminit memory section 7 8 7 18 MEMINIT section name 3 50 VisualDSP 4 0 Linker and Utilities Manual 1 9 www BDTIC com ADI INDEX memory allocation 2 1
199. er snrinioriusscrursssnsnoinia B 3 Dumping Overlay Library Files cicncicucnceerneuenenenuee B 4 LDF PROGRAMMING EXAMPLES FOR TIGERSHARC PROCESSORS Linkime a Siogle Processor System srcani C 2 Linking Large Uninitialized or Zero InitializedVariables C 4 Linking an ADSP TS101 MP Shared Memory System 004 C 6 Lioking for Overtlay Memofy sicsiciicitasseineiiiouesniaieeeislenriauaninn C 12 LDF PROGRAMMING EXAMPLES FOR SHARC PROCESSORS Linking a Single Processor SHARC System o ccoriveeocersarcssapvineevenies D 2 Linking Large Unimtialized Variables xccesacesverisnsrescercerssvenesneiaenin D 4 Linking for MP and Shared Memory cencsasncesniiiinsissn D 6 Reflective Semap hores ca sercccde ecovadernnsendeaesdeaasdehuertencdeysaerades D 11 Linking for Oyerlay NAY sssesscine iain D 13 LDF PROGRAMMING EXAMPLES FOR BLACKFIN VisualDSP 4 0 Linker and Utilities Manual xvii www BDTIC com ADI PROCESSORS Linking for a Single Processor System acicmcshmeneniensnaeueneen E 2 Linking Large Uninitialized or Zero initialized Variables E 4 Linking tor Assembly Source File ccrcisicersnssanigersiarnanariuesonsnay E 6 Linking for C Source File Example l scopasictcecccctesnavenieesenticccareaues E 8 Linking for Complex C Source File Example 2 stccoscsasscsnnenss once Bell Linking for Overlay Memory sascicissseaviasinsdintiarenvistinaimaniaavenvina E 17 INDEX xviii VisualDSP 4 0 Linker and Utilities
200. erence T filename The T filename linker description file switch directs the linker to use filename to name an LOF file The LOF file specified following the T switch must contain an ARCHITECTURE command if the command line does not have proc lt processor gt The linker requires the T switch when linking for a processor for which no VisualDSP support has been installed In such cases the processor ID does not appear in the Target processor field of the Project Options dialog box The filename must exist and be found for example via the L option White space must appear before filename A file s name is unconstrained but must be valid For example a b works if it is a valid LDF file where LDF is a valid extension but not a requirement Wwam number The Wwarn override error message switch directs the linker to demote the specified error message to a warning The number argument specifies the message to demote Wnumber number The Wnumber or wnumber warning suppression switch selectively dis ables warnings specified by one or more message numbers For example W1010 disables warning message 111010 This switch optionally accepts a list such as number 2 58 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker e The e switch directs the linker to eliminate unused symbols from the exe cutable file In order for the C and C run time libraries to work properly
201. erlay Live and Run Space Figure 4 10 Legend Dialog Box Colors Page To change a color 1 Double click the color You can also right click on a color and select Properties The system displays the Select a Color dialog box Figure 4 11 2 Select a color and click OK Click Other to select other colors from the advanced palette Click Reset to reset all memory map colors to the default colors 4 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Sclicct a Color EEEE EEN Figure 4 11 Select a Color Dialog Box Sorting Objects Objects in the Input Sections pane can be sorted by input sections default or by LDF macros like 0BJECTS or COMMAND_LINE_OBJECTS The Input Sections and LDF Macros menu selections are mutually exclu sive only one can be selected at a time Refer to Figure 4 12 and Figure 4 13 Input Sections ctor data1 mycode program Figure 4 12 Expert Linker Window Sorted by Input Sections Other macros object files or libraries may appear under each macro Under each object file are input sections contained in that object file When the tree is sorted by LDF macros only input sections can be dragged onto output sections VisualDSP 4 0 Linker and Utilities Manual 4 17 www BDTIC com ADI Input Sections Pane Input Sections FHESCOMMAND LINE OBJECTS dil LIBRARIES dil NEWMACRO gil OBJ
202. ernal memory the type of a memory section is recommended to be e PM code or 40 bit data data requires PX register to access e DM all other sections Width should be the actual physical width of the external memory 3 44 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File PUTO The PLIT procedure linkage table command in an LDF file inserts assembly instructions that handle calls to functions in overlays The PLIT commands provide a template from which the linker generates assembly code when a symbol resolves to a function in overlay memory Refer to PLIT on page 5 36 for a detailed description of the PLIT command Refer to Memory Management Using Overlays on page 5 4 for a detailed description of overlay and PLIT functionality PROC ESSOR The PROCESSOR command declares a processor and its related link infor mation A PROCESSOR command contains the MEMORY SECTIONS RESOLVE and other linker commands that apply only to that specific processor The linker produces one executable file from each PROCESSOR command If you do not specify the type of link with a PROCESSOR command the linker cannot link your program The syntax for the PROCESSOR command appears in Figure 3 3 PROCESSOR precesser_nane OUTPUT Fi 7e_name DXE CMEMORY seguent _ commands CPLIT pis _conmanas SECTIONS secti en_comnan ds RESOLVE
203. ers memory usage PM for program memory or DM for data memory and functional or hardware locus RAM or ROM as described above LENGTH ength_number or END address_number Identifies the length of the memory segment in words or specifies the segment s end address When you state the length Tength_number is the number of addressable words within the region or an expression that evaluates to the number of words When you state the end address address_number is an absolute address WIDTH width_number Specifies the physical width number of bits of the on chip or off chip memory interface The width_number parameter must be a whole number For Blackfin processors width must be 16 bits for TigerSHARC processors width must be 32 bits and for SHARC processors width may be 8 16 32 48 or 64 bits MPMEMORY Q The MPMEMORY command specifies the offset of each processor s physical memory in a multiprocessor target system After you declare the processor names and memory segment offsets with the MPMEMORY command the linker uses the offsets during multiprocessor linking Refer to MPMEMORY on page 5 30 for a detailed description of the MPMEMORY command 3 38 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File OVERLAY _GROUP The OVERLAY_GROUP command is deprecated This command provides support for defining a set of overlays that share a blo
204. es of the named output section Use this operator when a section s size is required to move the current location counter to an appropriate memory location SHARC Code Example The following LDF fragment defines the _sizeofdatal constant to the size of the seg_dmda section seg_dmda INPUT_SECTIONS OBJECTS seg_dmda LIBRARIES seg_dmda 3 24 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File _sizeofdatal SIZEOF seg_dmda gt seg_dmda TigerSHARC Code Example The following LDF fragment defines the _sizeofdatal constant to the size of the datal section datal INPUT_SECTIONS 0BJECTS datal LIBRARIES datal _sizeofdatal SIZEOF datal gt MEM_DATAL Location Counter The linker treats a period surrounded by spaces as the symbol for the current location counter The ocation counter is a pointer to the memory location at the end of the output section Because the period refers to a location in an output section this operator may appear only within an output section in a SECTIONS command Observe these rules e Use a period anywhere a symbol is allowed in an expression e Assign a value to the period operator to move the location counter and to leave voids or gaps in memory e The location counter may not be decremented VisualDSP 4 0 Linker and Utilities Manual 3 25 www BDTIC com ADI LDF Macros LDF Macros LDF macros or l
205. es within the bank TigerS HARC Memory Characteristics As an example of the TigersHARC memory architecture the ADSP TS101 processor has three internal memory blocks MO M1 and M2 Each memory block consists of 2 Mbits of memory space and is con figured as 64 kwords each 32 bits in width There are three separate internal 128 bit data buses each connected to one of the memory blocks Memory blocks can store instructions and data interchangeably with one access per memory block per cycle If the programmer ensures that pro gram and data are in different memory blocks then data access can occur at the same time as program fetch Therefore in one cycle up to three 128 bit transfers can occur within the core two data transfers and one program instruction transfer 2 34 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker The I O Processor can use only one internal bus at a time and the I O Processor competes with the core for use of the internal bus Therefore in one cycle the processor can fetch four 32 bit instructions and load or store 256 bits of data four 64 bit words or eight 32 bit words or sixteen 16 bit words or thirty two 8 bit words The TigerSHARC processor 32 bit address bus provides an address space of four gigawords This address space is common to a cluster of Tiger SHARC processors that share the same cluster bus The zones in the memory space are made up of the following regions
206. f ROM memory images that you can use in post processing For more information refer to no boot mode information in the VisualDSP 4 0 Loader Manual A 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI File Formats Debugger Files Debugger files provide input to the debugger to define simulation or emu lation support of your program The debugger supports all the executable file types produced by the linker DXE SM OVL To simulate I O the debugger also supports the assembler s data file DAT format and the loader s loadable file LDR formats The standard hexadecimal format for a SPORT data file is one integer value per line Hexadecimal numbers do not require a 0x prefix A value can have any number of digits but is read into the SPORT register as e The hexadecimal number which is converted to binary e The number of binary bits read which matches the word size set for the SPORT register which starts reading from the LSB The SPORT register then fills with zero values shorter than the word size or conversely truncates bits beyond the word size on the MSB end Example In this example a SPORT register is set for 20 bit words and the data file contains hexadecimal numbers The simulator converts the HEX numbers to binary and then fills or truncates to match the SPORT word size In Table A 5 the A5A5 number is filled and 123456 is truncated Table A 5 SPORT Data File Example
207. ffff VisualDSP 4 0 Linker and Utilities Manual 4 3 www BDTIC com ADI Launching the Create LDF Wizard Launching the Create LDF Wizard From the VisualDSP main menu choose Tools gt Expert Linker gt Create LDF to invoke a wizard for creating and customizing a new LDF file Use the Create LDF option when creating a new project Create LDF Welcome to the Create LDF Wizard This wizard will guide you through the creation of a new LDF file To continue click Next lt Back Cancel Help Figure 4 2 Welcome Page of the Create LDF Wizard Ifan LDF file is already in the project you are prompted to confirm whether to create a new LDF file to replace the existing one This menu command is disabled when VisualDSP does not have a project opened or when the project s processor build target is not supported by Expert Linker Press Next to run the wizard 4 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Step 1 Specifying Project Information The first wizard window is displayed Create LDF Step 1 of 3 K E Project Information Choose the LDF file name and the project type LDF filename fe examples dot_product_c ldf as m Project type os CTC C Assembly C VisualDSP kermel VDK lt Back Cancel Help Figure 4 3 Selecting File Name and Project Type You may use or specify the default fil
208. file Some debugger functionality including run to main all stdio functions and the ability to stop at the end of program execution rely on the debugger s ability to locate certain symbols in the exe cutable file This switch removes these symbols save temps The save temps switch directs the linker to save temporary intermedi ate output files Si revision version The si revision version silicon revision switch directs the assembler to build for a specific hardware revision Any errata workarounds available for the targeted silicon revision will be enabled The parameter version represents a silicon revision of the processor specified by the proc switch on page 2 63 For example linker proc ADSP TS201 si revision 0 1 If silicon version none is used then no errata workarounds are enabled whereas specifying silicon version any will enable all errata workarounds for the target processor 2 64 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker If the si revision switch is not used the linker builds for the latest known silicon revision for the target processor and any errata workarounds which are appropriate for the latest silicon revision will be enabled If the silicon revision is set to any the _ SILICON REVISION _ macro is set to Oxf fff and if the si revision switch is set to none the linker will not set the __SILICON_REVISION__ macro
209. formation on the assembler and preprocessor see the VisualDSP 4 0 Assembler and Preprocessor Manual Assembly Initialization Data Files DAT Assembly initialization data DAT files are text files that contain fixed or floating point data These files provide the initialization data for an assembler VAR directive or serve in other tool operations When a VAR directive uses a DAT file for data initialization the assembler reads the data file and initializes the buffer in the output object D0J file Data files have one data value per line and may have any number of lines The DAT extension is explanatory or mnemonic A directive to include lt file gt can take any file name or extension as an argument Fixed point values integers in data files may be signed and they may be decimal hexadecimal octal or binary base values The assembler uses the prefix conventions in Table A 1 to distinguish between numeric formats For all numeric bases the assembler uses 16 bit words for data storage 24 bit data is for the program code only The largest word in the buffer determines the size for all words in the buffer If there is some 8 bit data VisualDSP 4 0 Linker and Utilities Manual A 3 www BDTIC com ADI Source Files in a 16 bit wide buffer the assembler loads the equivalent 8 bit value into the most significant eight bits in the 8 bit memory location and zero fills the lower eight bits Table A 1 Numeric
210. from VisualDSP archive them afterwards from the elfar command line 6 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver Accessing Archived Functions From Your Code Programs that call a library routine must use the assembler s EXTERN directive to specify the routine s start label as an external label When link ing the program specify one or more library 0LB files to the linker along with the names of the object 00J files to link The linker then searches the library files to resolve symbols and links the appropriate rou tines into the executable file Any file containing a label referenced by your program is linked into the executable output file Linking libraries is faster than using individual object files and you do not have to enter all the file names just the library name In the following example the archiver creates the filter d1b library con taining the object files taps doj coeffs doj and go_input doj elfar c filter dlb taps doj coeffs doj go_input doj If you then run the linker with the following command line the linker links the object files main doj and sum doj uses the default LDF file for example ADSP TS201 1df and creates the executable file main dxe linker DADSP TS201 main doj sum doj filter dlb o main dxe Assuming that one or more library routines from filter d1b are called from one or more of the object files the linker searches the library ex
211. g the menu choose Add Symbol to open the dialog box and type a new symbol name names at the end of the existing list To delete a symbol select the symbol right click and choose Remove Symbol To specify symbol resolution 1 In the Memory Map pane right click a Processor tab 2 Choose Properties The Processor page of the Processor Properties dialog box appears The Symbols tab allows you to specify how symbols are to be resolved by the linker Figure 4 48 Processor Properties i x Processor l Elimination Symbols Symbols to resolve Symbol Address or File Name 0x10000 c examples programs dxe oc tae Figure 4 48 Processor Properties Dialog Box Symbols Tab VisualDSP 4 0 Linker and Utilities Manual 4 59 www BDTIC com ADI Managing Object Properties The symbols can be resolved to an absolute address or to a program file Right clicking in the Symbols field allows you to add or remove symbols Choosing Add Symbol from the menu invokes the Add Symbol to Resolve dialog box Figure 4 49 which allows you to pick a symbol by either typing the name or browsing for a symbol Using Resolve with you can also decide whether to resolve the symbol from a known absolute address or file name DXE or SM file Add Symbol to Resolve 24x Symbol fes Browse m Resolve with Absolute Address fox1 0000 C Eile Name Figure 4 49 Add Symbol to Resolve Dialog Box
212. h as WinZip to decompress downloaded files xxviii VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Preface Printed Manuals For general questions regarding literature ordering call the Literature Center at 1 800 ANALOGD 1 800 262 5643 and follow the prompts VisuaIDSP Documentation Set To purchase VisualDSP manuals call 1 603 883 2430 The manuals may be purchased only as a kit If you do not have an account with Analog Devices you are referred to Analog Devices distributors For information on our distributors log onto http www analog com salesdir continent asp Hardware Tools Manuals To purchase EZ KIT Lite and In Circuit Emulator ICE manuals call 1 603 883 2430 The manuals may be ordered by title or by product number located on the back cover of each manual Processor Manuals Hardware reference and instruction set reference manuals may be ordered through the Literature Center at 1 800 ANALOGD 1 800 262 5643 or downloaded from the Analog Devices Web site Manuals may be ordered by title or by product number located on the back cover of each manual Data Sheets All data sheets preliminary and production may be downloaded from the Analog Devices Web site Only production final data sheets Rev 0 A B C and so on can be obtained from the Literature Center at 1 800 ANALOGD 1 800 262 5643 they also can be downloaded from the Web site VisualDSP 4 0 Linker and Util
213. h italic style format XXX VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Preface Example Description Note For correct operation A Note provides supplementary information on a related topic In the online version of this book the word Note appears instead of this symbol M Caution Incorrect device operation may result if Caution Device damage may result if A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage In the online version of this book the word Caution appears instead of this symbol 9S Warning Injury to device users may result if A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for devices users In the online version of this book the word Warning appears instead of this symbol VisualDSP 4 0 Linker and Utilities Manual XXxI www BDTIC com ADI Notation Conventions xxxii VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 1 INTRODUCTION This chapter provides an overview of VisualDSP development tools and their use in the DSP project development process The code examples in this manual have been compiled using VisualDSP 4 0 The examples compiled with other versions of VisualDSP may result in build errors or different output although the
214. he IDDE or from a command line Invoking Memory Initializer from the VisualDSP IDDE Use the Project menu in the VisualDSP main screen to select Project gt Project Options gt Link see Figure 7 2 The Link option is displayed Type meminit in the Additional options field and then click OK When the project is built the linker calls the Memory Initializer Project Options for NewProject1 21x by Project Fx Project Link Processor E General c i Compile Branch instruction expansion allow indirect x fey General 1 Eh General 2 Libraries Floating Point ay Preprocessor I Use workaround libraries High performance fy Processor 1 I Use C exceptions libraries Strict IEEE compliance fy Processor 2 Eh Warning m L1 Memory Usage a aid Instruction and Data BAM a l ee Cache sets USE_CACHE macro Eh General fey LDF Preprocessing ER Elimination Processor Ej E Load E Options fy Kernel ey Splitter Additional options Bres mene Cancel Figure 7 2 Invoking the Memory Initializer from the VisualDSP IDDE 7 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initalizer Invoking Memory Initializer from Command Line The simplest command line to invoke the Memory Initializer from the command line is meminit exe input dxe o output dxe The Memory Initializer identifies all the se
215. he PLIT table for overlays 1 and 2 Figure 5 2 For each entry the linker replaces the generic assembly instructions with specific instructions where applicable Overlay 1 Overlay 2 FUNC _A FUNC_B FUNC _C Intemal Memory Main Pit_table i call pit_FUNC A PIt_FUNC_A j4 0x00001 j5 0x22000 jump OvenayManager call pit FUNC _C pit FUNC_B j4 oxo0002 call pit FUNC _B j5 0x22000 jump OvenayManager PIt_FUNC_C j4 0x00002 j5 0x23000 jump OvenayManager Figure 5 2 Expanded PLIT Table for TigerSHARC Processors For example the first PLIT entry in Listing 5 2 is for the overlay symbol FUNC_A The linker replaces the constant name PLIT_SYMBOL_OVERLAYID with the ID of the overlay containing FUNC_A The linker also replaces the constant name PLIT_SYMBOL_ADDRESS with the run time address of FUNC_A 5 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands When the overlay manager is called via the jump instruction of the PLIT table j4 contains the referenced function s overlay ID and j5 contains the referenced function s run time address The overlay manager uses the overlay ID and run time address to load and execute the referenced function Example Managing Two Ovenays The following example has two overlays each containing two functions Overlay 1 contains the functions fft_first_two_stages and fft_last_stage Overlay 2 contai
216. he following considerations e An LDF file that uses command line inputs produces a more generic LDF that can be used in multiple projects Because the command line can specify only one output an LDF file that relies on command line input is best suited for single processor systems e An LDF file that does not use command line inputs produces a more specific LDF that can control complex linker features 3 28 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File LDF Commands Commands in the LDF file called LDF commands define the target sys tem and specify the order in which the linker processes output for that system LDF commands operate within a scope influencing the operation of other commands that appear within the range of that scope For more information see Command Scoping on page 3 17 The linker supports these LDF commands not all commands are used with specific processors ALIGN on page 3 30 ARCHITECTURE on page 3 30 ELIMINATE on page 3 31 ELIMINATE_SECTIONS on page 3 32 INCLUDE on page 3 32 INPUT_SECTION_ALIGN on page 3 32 KEEP on page 3 33 KEEP_SECTIONS on page 3 34 LINK_AGAINST on page 3 34 MEMORY on page 3 35 MPMEMORY on page 3 38 OVERLAY_GROUP on page 3 39 PACKING on page 3 39 PLIT on page 3 45 PROCESSOR on page 3 45 VisualDSP
217. he processor to initialize the memory with zeros Listing D 2 Large Uninitialized Variables Assembly Source SECTION DM NO_INIT sdram_area 1Mx32 SDRAM VAR huge_bufferL0x100000 D 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for SHARC Processors Listing D 3 Large Uninitialized Variables LDF Source ARCHITECTURE ADSP 21161 OBJECTS COMMAND_LINE_OBJECTS Libraries amp objects from MEMORY mem_sdram the command line TYPE DM RAM START Ox3000000 END OX30FFFFF WIDTH 32 end PROCESSOR PO LINK_AGAINST end segment memory COMMAND_LINE_LINK_AGAINST OUTPUT COMMAND_LINE_OUTPUT_FILE N SECTION sdram_out INPUT_S gt mem_sdra SECTION zero_sdra INPUT_ gt mem_sdra en en O_INIT section isn t written to the output file put NO_INIT ECTIONS O0BJECTS sdram_area m m_output ZERO_INIT SECTIONS OBJECTS zero_sdram_area m d section d processor PO VisualDSP 4 0 Linker and Utilities Manual D 5 www BDTIC com ADI Linking for MP and Shared Memory Linking for MP and Shared Memory When linking executable files for a multiprocessor system using shared memory the LDF file describes the multiprocessor memory offsets shared memory each processors memory and places code for each processor Note the following in the example LDF file in Listing D 4 on page D 6
218. hen defined For large buffers this action can result in large executables filled mostly with zeros Such files take up excess disk space and can incur long download times when used with an emulator This situation also may occur when you boot from a loader file because of the increased file size Listing C 2 shows an example of assembly source code Listing C 3 shows the use of the NO_INIT and ZERO_INIT sections to avoid initialization of a segment The LDF can omit an output section from the output file The NO_INIT qualifier directs the linker to omit data for that section from the output file Refer to SECTIONS on page 3 48 for more information on the NO_INIT and ZERO_INIT section qualifiers The NO_INIT qualifier corresponds to the UNINIT segment qualifier in previous ACH development tools Even if NO_INIT is not used the boot loader removes variables initialized to zeros from the LDR file and replaces them with instructions for the loader kernel to zero out the variable This action reduces the loader s output file size but still requires execution time for the processor to initialize the memory with zeros C 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for TigerSHARC Processors Listing C 2 Large Uninitialized Variables Assembly Source SECTION NO_INIT sdram_area 1Mx32 SDRAM VAR huge_bufferl0x1000000 Listing C 3 Large Uninitialized Variables
219. hen the first function f ft_one is referenced during code execution overlay id 1 is transferred to internal memory When the second function fft_two is referenced overlay id 2 is transferred to internal memory When the third function in overlay fft_two is referenced the overlay manager recognizes that it is already in internal memory and an overlay transfer does not occur To verify whether an overlay is in internal memory place the overlay ID of this overlay into a register for example j4 and compare this value to the overlay ID of each overlay already loaded by loading these overlay val ues into a register for example j5 Is overlay already in internal memory JASE Jass If so do not transfer it in if jeq jump skipped_DMA_setup Finally when the last function fft_one is referenced overlay id 1 is again transferred to internal memory for execution 5 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands The following code segment calls the four FFT functions fftrad2 call fft_first_2_stages call fft_middle_stages call fft_next_to_last call fft_last_stage wait NOP jump wait The linker replaces each overlay function call with a call to the appropriate entry in the PLIT For this TigerSHARC example only three instructions are placed in each entry of the PLIT PLIT j4 PLIT_SYMBOL_OVERLAYID j5 PLIT_SYMBOL_AD
220. here The Expert Linker updates the memory map to show how much of the stack and heap are unused Use this information to adjust the size of your stack and heap This infor mation helps make better use of the processor memory so the stack and heap segments do not use too much memory 4 72 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Use the graphical view View Mode gt Graphical Memory Map to dis play stack and heap memory map blocks Figure 4 57 shows a possible memory map after running a project program Expert Linker Input Sections Memory Map J WMinti0 Mint11 mem_data2 I intl2 IMint13 Wing IWVin15 Ivintd mem_heap Mint 1 Iing EJ Mint J Ivint8 J Wint9 0 EE DRUHE tht IVkernel mem_stack lYpwrdwn IVreset l stackint datal data mem_datal program FH EE EL Figure 4 57 Graphical Memory Map Showing Stack and Heap Usage VisualDSP 4 0 Linker and Utilities Manual 4 73 www BDTIC com ADI Managing Object Properties Managing Shared Memory Properties Specify the path and name of the file used by shared memory This proce dure assumes the Expert Linker window is open To specify shared memory properties 1 In the Memory Map pane click the Shared Memory tab located at the bottom of dialog box Shared Memory P
221. hod VisualDSP comes with the packing h file in the include folder This file provides macros that define packing commands for use in a Linker Description File LDF The macros support vari ous types of packing for Direct Memory Access functionality used 3 40 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File in overlays and for direct external execution To use these macros place them in an LDF file s SECTIONS command when a PACKING command is needed Packing in SHARC Processors On SHARC processors PACKING applies to the processor s external port Each external port buffer contains data packing logic that allows the pack ing of 8 16 or 32 bit external bus words into 32 or 48 bit internal words This logic is fully reversible The following information describes how the PACKING command may apply in an LDF file for your ADSP 21xxx processor In some Direct Memory Access DMA modes SHARC processors unpack three 32 bit words to build two 48 bit instruction words when the processor receives data from 32 bit memory For example the unpacked order and storage order Table 3 4 could apply to a DMA mode Table 3 4 DMA Packing Order Transfer Order Unpacked Order from storage in a 32 bit external memory Two 48 bit internal words after the third transfer B1 and B2 word 1 bits 47 32 B3 and B4 word 1 bits 31 16 B1 B2 B3 B4 B5 B6 B11 a
222. ializer on page 7 7 e Memory Initializer Command Line Switches on page 7 13 VisualDSP 4 0 Linker and Utilities Manual 7 1 www BDTIC com ADI Memory Initializer Overview Memory Initializer Overview The Memory Initializer may be used with processor systems where the RAM memory needs to be initialized with the code and data stored in the ROM memory before the execution of the application code begins This is generally true for a processor system running in NO BOOT mode The initialization stream generated by the Memory Initializer is consumed by a dedicated Run Time Library RTL routine Following a system reset the RTL routine searches the initialization stream and initializes the processor s RAM memory with the data in the initialization stream before the call to main the starting point of the application code In creating the initialization stream the Memory Initializer can in most cases effectively reduce the overall size of an executable file by combining contiguous identical initialization into a single block For example a large zero initialized array in an executable file can be compressed to a single small data block by the Memory Initializer In addition to a primary executable file dxe the Memory Initializer accepts one or more additional executable files called callback executable files and includes their data and instructions in the initialization stream The RTL routine is able to call and
223. ight corner of the memory map window _ 99 e Exit zoom mode click on the magnifying glass icon with the x above the upper right corner of the memory map window e View a memory object by itself by double clicking on the memory object e View the memory object containing the current memory object by double clicking on the white space around the memory object Adding a Memory Segment You can add memory segments to the memory map This procedure assumes that the Expert Linker window Memory Map pane is open To add a memory segment 1 Right click in the Memory Map pane 2 Choose New and then choose Memory Segment The Memory Segment Properties dialog box appears Figure 4 26 3 In Name type a name for the memory segment 4 Specify the following attributes VisualDSP 4 0 Linker and Utilities Manual 4 33 www BDTIC com ADI Memory Map Pane Memory Segment Properties zi x Memory Segment l Name Start Address End Address Size Width E 5 p F m Memory Space ROM RAM Internal External PM C RAM C Internal C DM C ROM C Extemal C BH C DATAB4 Figure 4 26 Memory Segment Properties Dialog Box e Start address e End Address e Size hexadecimal It is only necessary to specifiy either End Address or Length and not both e Width e Memory Space For Blackfin and TigerSHARC processors this option is unavailable because VisualDSP employs a unifie
224. ile examples are provided in LDF Programming Examples for TigerSHARC Processors Listing 3 2 Example LDF File for ADSP TS201 Processor ARCHITECTURE ADSP TS101 SEARCH_DIR ADI_DSP TS 1ib OBJECTS main doj COMMAND_LINE_OBJECTS MEMORY Define and label system memory List of global memory segments MOCode TYPECRAM START Ox000000 END OxXOOFFFF WIDTH 32 MlData TYPECRAM START Ox080000 END OxO8FFFF WIDTH 32 M2Data TYPECRAM START Ox100000 END OX1OFFFF WIDTH 32 PROCESSOR PO the only processor in the system OUTPUT COMMAND_LINE_OUTPUT_FILE SECTIONS code INPUT_SECTIONS OBJECTS program gt MOCode datal INPUT_SECTIONS 0OBJECTS datal gt MlData data2 INPUT_SECTIONS 0OBJECTS data2 gt M2Data End of SECTIONS command for processor PO End of PROCESSOR command VisualDSP 4 0 Linker and Utilities Manual 3 9 www BDTIC com ADI LDF File Overview Example 3 Basic LDF File for SHARC Processors Listing 3 3 is an example of a basic LDF file for the ADSP 21161 proces sor formatted for readability Note the MEMORY and SECTIONS commands and refer to Notes on Basic LDF File Examples on page 3 11 Other examples for assembly and C source files are in LDF Programming Examples for SHARC Processors Listing 3 3 Example LDF File for ADSP 21161 Processor Link for the ADSP 21161 A
225. ilities Manual 3 39 www BDTIC com ADI LDF Commands where e number_of_bytes is an integer specifying the number of bytes to pack reorder before repeating the pattern e pyte_order_list is the output byte ordering what the linker writes into memory Each list entry consists of B followed by the byte s number in a group at the storage medium memory The list follows these rules e Parameters are whitespace delimited e The total number of non null bytes is number_of_bytes e If null bytes are included they are labeled 80 For example in SHARC processors the first byte is B1 not 80 The sec ond byte is 82 and so on PACKING 12 B1 B2 B3 B4 BO B11 B12 B5 B6 BO B7 B8 B9 B10 BO Non default use of the PACKING command reorders bytes in executable files DXE SM or OVL so they arrive at the target in the correct number alignment and sequence To accomplish this task the command specifies the size of the reordered group the byte order within the group and whether and where null bytes must be inserted to preserve alignment on the target The term null refers to usage the target ignores a null byte the linker sets these bytes to zeros The order used to place bytes in memory correlates to the order the pro cessor may use while unpacking the data when the processor transfers data from external memory into its internal memory The processor s unpack ing order can relate to the transfer met
226. ime memory Command Evaluation and Setup The linker first evaluates the sequence of assembly code in each plit_command Each line is passed to a processor specific assembler which supplies values for the symbols and expressions After evaluation the linker places the returned bytes into the PLIT output section and manages the addressing in that output section To help write an overlay manager the linker generates PLIT constants for each symbol in an overlay Data can be overlaid just like code If an over lay resident function calls for additional data overlays include an instruction for finding them VisualDSP 4 0 Linker and Utilities Manual 5 37 www BDTIC com ADI Advanced LDF Commands After the setup and variable identification are completed the overlay itself is brought via DMA transfer into run time memory This process is con trolled by assembly code called an overlay manager The branch instruction such as jump OverlayManager is normally the last instruction in the PLIT command Ovenlay PLIT Requirements and PUT Examples Both the plit output section allocating space for PLIT and the PLIT command are necessary when specifying PLIT for overlays The LOF file must allocate space in memory to hold PLITs built by the linker Typi cally that memory resides in the program code memory segment No input section is associated with the plit output section The LDF allocates space for linker genera
227. in L2 memory is made to a function in L1 memory keep symbolNa me The keep symbolName keep unused symbols switch directs the linker to keep symbols from being eliminated It directs the linker when e or ev is enabled to retain listed symbols in the executable even if they are unused meminit The meminit post processing executable file switch directs the linker to post process the DXE file through the Memory Initializer utility see Memory Initializer for more information This action causes the sec tions specified in the LDF file to be run time initialized by the C run time library By default if this flag is not specified all sections are ini tialized at load time for example via the VisualDSP IDDE or the boot loader Refer to SECTIONS P on page 3 48 for more information on section initialization honmemcheck The nonmemcheck memory checking off switch allows you to turn off memory checking in any LDF file 2 62 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker o filename The o filename output file switch sets the value of COMMAND_LINE_OUTPUT_FILE macro which is normally used as a parameter in LDF 0UTPUT command which specifies the output file name If no o is present on command line the COMMAND_LINE_OUTPUT_FILE macro gets a value of a dxe od directory The od directory switch directs the linker to specify the value of the COMMAN
228. in the same run space the overlays display as multiple blocks on top of each other in cascading fashion Figure 4 28 shows an overlay in live space and Figure 4 29 shows an overlay in run space Marnory Map UWE_SPACE E prograrn Figure 4 28 Graphical Memory Map Showing an Overlay in Live Space 4 36 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Overlays in a run space appear one at a time in the graphical memory map The scroll bar next to an overlay in run space allows you to specify an overlay to be shown on top Drag the overlay on top to another output section to change the run space for an overlay Click the Up arrow or Down arrow button in the header to display a pre vious overlay or next overlay in run space Click the browse button to display the list of all available overlays The header shows the number of overlays in this run space as well as the current overlay number Input Sectione Memory Map E constdata 6J datal 4 ovi 8 oyl p E program f f 60196b f fF8032d5 E Browse Button Figure 4 29 Graphical Memory Map Showing an Overlay Run Space To create an overlay in the run space 1 Right click on an output section 2 Choose New gt Overlay 3 Select the live space from the Overlay Properties dialog box see Managing Overlay Properties
229. includes an LDF file For working examples of the linking process examine the LDF files that come with the examples Examples are in the following directory lt VisualDSP InstallationPath gt 21k Examples A variety of processor specific default LDF files come with the development software providing information about each proces sor s internal memory architecture Default LDF files are in the following directory lt VisualDSP InstallationPath gt 21k ldf VisualDSP 4 0 Linker and Utilities Manual D 1 www BDTIC com ADI Linking a Single Processor SHARC System Linking a Single Processor SHARC System When linking an executable for a single processor system the LDF describes the processor s memory and places code for that processor Listing D 1 shows a single processor LDF file Note the following com mands in this file e ARCHITECTURE defines the processor type e SEARCH_DIR adds the 1ib and current working directory to the search path e 0BJS and LIBS macros get object 00J and library DLB file input e MAP outputs a map file e MEMORY defines memory for the processor e PROCESSOR and SECTIONS defines a processor and place pro gram sections for that processor s output file using the memory definitions Listing D 1 Single Processor System LDF Example Link for the ADSP 21161 ARCHITECTURE ADSP 21161 SEARCH_DIR ADI_DSP 211xx lib MAP SINGLE PROCESSOR XML
230. ind of initialization required This is done using initializa tion qualifiers The qualifiers that are used here are ZERO_INIT and RUNTIME_INIT The sections marked with ZERO_INIT may contain only zero initialized data and the sections marked with RUNTIME_INIT may contain the data with any initialization values Refer to the SECTIONS descrip tion in the VisualDSP 4 0 Linker and Utilities Manual for detailed information on these qualifiers The following example shows how to use the ZERO_INIT and RUNTIME_INIT qualifiers in a LDF file to set up the section type my_zero_section ZERO_INIT INPUT_SECTION_ALIGN 4 INPUT_SECTIONS OBJECTS my_zero_section LIBRARIES my_zero_section gt MEM_L1_DATA_A VisualDSP 4 0 Linker and Utilities Manual 7 7 www BDTIC com ADI Using the Memory Initializer my_data_section RUNTIME_INIT INPUT_SECTION_ALIGN 4 INPUT_SECTIONS OBJECTS my_data_section gt MEM_L1_DATA_A The section my_zero_section is intended to hold all the zero initialized data and the section my_data_section is to hold any other initialized data After the program is first linked the sections in the DXE file have flags set according to the qualifiers in the LDF file Then the Memory Ini tializer runs and processes the DXE sections according to those flags and produces a modified output DXE file The Memory Initializer is able to identify the DXE sections with the dis tinct Initialization Flag and
231. ine switch 2 66 wildcard character specifying archive files 6 13 wizards Create LDF 4 4 Wnnnn archiver command line switch 6 13 Wnumber warning suppression linker switch 2 58 word width number of bits 3 38 w remove warning archiver command line switch 6 13 Wwarn num override error message linker command line switch 2 58 X XML file 3 35 A 6 xmlmap2html exe command line utility 2 56 2 57 XML map file 2 56 opening in Web browser 2 56 xref external reference file linker command line switch 2 66 Z ZERO_INIT qualifier 3 50 7 7 7 8 7 15 7 16 7 17 I 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI INDEX VisualDSP 4 0 Linker and Utilities Manual I 17 www BDTIC com ADI 1 18 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI I 19 I 20 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI I 21 I 22 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI
232. inker macros are built in macros They have predefined system specific procedures or values Other macros called user macros are user definable LDF macros are identified by a leading dollar sign character Each LDF macro is a name for a text string You may assign LDF macros with textual or procedural values or simply declare them to exist The linker e Substitutes the string value for the name Normally the string value is longer than the name so the macro expands to its textual length e Performs actions conditional on the existence of or value of the macro e Assigns a value to the macro possibly as the result of a procedure and uses that value in further processing LDF macros funnel input from the linker command line into predefined macros and provide support for user defined macro substitutions Linker macros are available globally in the LDF file regardless of where they are defined For more information see Command Scoping on page 3 17 and LDF Macros and Command Line Interaction on page 3 28 LDF macros are independent of preprocessor macro support which is also available in the LDF file The preprocessor places pre processor macros or other preprocessor commands into source files Preprocessor macros repeat instruction sequences in your source code or define symbolic constants These macros facilitate text replacement file inclusion and conditional assembly and compilation For example the
233. input section see Figure 4 43 on page 4 52 Properties Displays a Properties dialog box for the selected object The Properties menu is context sensitive different properties are displayed for different objects Right click a memory segment and choose Properties to specify a memory segment s attributes name start address end address size width memory space PM DM BM RAM ROM and internal or external flag View Legend Displays the Legend dialog box showing tree view icons and a short description for each icon The Colors page lists the colors used in the graphical memory map You can customize each object s color See Figure 4 9 on page 4 15 and Figure 4 10 on page 4 16 View Global Properties Displays a Global Properties dialog box that lists the map file generated after linking the project It also provides access to some processor and setup information see Figure 4 44 on page 4 53 Tree View Memory Map Representation In the tree view selected by right clicking and choosing View Mode gt Memory Map Tree the memory map is displayed with memory seg ments at the top level Each memory segment may have one or more output sections under it Input sections mapped to an output section appear under that output section The start address and size of the memory segment display in separate col umns If available the start address and the size of each output section are displayed for example after you lin
234. ion 2 22 2 23 2 25 2 28 INDEX ctorl input section 2 30 ctor NULL_marker symbol 2 23 2 28 3 34 custom processors 2 63 D d archiver command line switch 6 12 datal input section 2 22 2 23 2 25 2 26 data2 input section 2 22 2 23 data placement 2 60 data sections for handling of exceptions 2 30 DAT files initialization data A 3 debugger files A 9 declaring macros 3 28 DEFAULT_OVERLAY LDF command 3 53 DEFINED LDF operator 3 23 deleting selected object 4 23 directories supported by linker 2 50 disassembly library member B 3 using archiver B 3 using dumper B 3 DLB files 2 49 A 5 description of A 5 symbol name encryption 6 15 dnv archiver command line switch 6 12 DOJ files 2 49 about A 5 Dprocessor target architecture linker command line switch 2 55 DSPs development software 1 2 VisualDSP 4 0 Linker and Utilities Manual I 3 www BDTIC com ADI INDEX dumper use in code disassembly B 3 DWARF references A 10 DXE files 1 7 2 49 A 6 data extraction B 1 linker A 6 E e archiver command line switch 6 12 edt input section 2 30 edtl input section 2 31 e eliminate unused symbols linker command line switch 2 59 ek no elimination linker command line switch 2 59 elfar exe about 6 1 command line reference 6 11 constraints 6 14 elfdump exe command line switches B 1 file dumper B 1 used by Expert Linker 4 38
235. ion Since the format of xm1 files can be extended between VisualDSP releases the map file is dependant on particular installation of VisualDSP Thus the xm1 map file can be used only on a machine it was generated In order to view the map file on a different machine the file should be transformed to HTML format using the xmimap2htm1 exe command line utility The utility makes it possible to view the map on virtually any machine with any browser MDmacro def The MDmacro def define macro switch declares and assigns value def to the preprocessor macro named macro For example MDTEST BAR exe cutes the code following ifdef TEST BAR in the LDF file but not the code following ifdef TEST XXxX If def is not included macro is declared and set to 1 to ensure the code following ifdef TEST is executed This switch may be repeated MUDmacro The MUDmacro undefine macro switch undefines the preprocessor macro where macro specifies a name For example MUDTEST undefines macro TEST The switch is processed after all MDmacro switches have been pro cessed The MUDmacro switch may be repeated on the command line S The S strip debug symbol switch directs the linker to omit debugging symbol information not all symbol information from the output file Compare this switch with the s switch on page 2 64 VisualDSP 4 0 Linker and Utilities Manual 2 57 www BDTIC com ADI Linker Command Line Ref
236. ion information c Creates a new ib_file containing the listed object files d Removes the listed object files from the specified 1ib_file dnv Removes the listed obj_file s from the specified 7b_file and clears version information e Extracts the specified file s from the library i filename Uses filename a list of object files as input This file lists obj_file s to add or modify in the specified ib_file DLB M Prints dependencies Available only with the c switch MM Prints dependencies and creates the library Available only with the c switch 6 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver Table 6 2 Command Line Options and Entries Cont d Item Description p Prints a list of the obj_fi1e s D0J in the selected Jib_file DLB to standard output pv Prints only version information in library to standard output pva Prints all version information in library to standard output r Replaces the specified object file in the specified library file The object file in the library and the replacement object file must have identical names zS Specifies symbol name encryption Refer to Archiver Symbol Name Encryption on page 6 15 t verno Tags the library with version information in string tx filename Tags the library with version information in the file twc ver Tags the library with version information in the nu
237. ion segrar a SN 2 63 E A E T A 2 63 EEI E I E A E E 2 63 RE E E EN E E T dd 2 64 SNEEN 2 64 SITS PIII arrana rn rE Ee ENERE 2 64 e E aimee E O E 2 65 a E E E E I E EE E E E E E E 2 65 saD aa a 2 65 a E E A A E E AT 2 66 OS ea ic arensenterie ee Gaeta eae 2 66 Set ene sn oan erent 2 66 LINKER DESCRIPTION FILE LOP File Orennan ioe eee oes 3 3 Dera LDF set sesassestaceieninanerstvenscanatnenesiantvrasunaanessictaniaaitennss 3 3 Example 1 Basic LDF File for Blackfin Processors 3 6 Memory Usage in Blackfin Processors cacrccecinsunsaninin 3 8 Example 2 Basic LDF File for TigerSHARC Processors 3 9 Example 3 Basic LDF File for SHARC Processors 3 10 Notes on Basic LDF Pile Examples cass ecerassescevarstxaycereranvacnads 3 11 LDE SEE secara orana OAA 3 16 Command BONE oona AA 3 17 VisualDSP 4 0 Linker and Utilities Manual ix www BDTIC com ADI CONTENTS LDE Expressions siceieccacictioncieemionanacnesemeueeens 3 18 LDF Keywords Commands and Operators ssinisirisrisserirasenis 3 19 Miscellaneous LDF Keywords nessieneicsniiiseireinennrenre 3 20 LOP ODETI E aA 3 21 ABSOLUTE Operator sororirinurnsinininiiniieeiinkn ia 3 21 ADDRO OPONtOF ounitccnnecndiuntieniamrmonaionsnuen 3 22 DEFINED Opentof scncese ieee 3 23 MEMORY _SIZEOF Oph ee cer crecnncexiscavnieervuncanarsennricenceens 3 24 EE Cee rer eee 3 24 Location Counter J ciccciscnasseanvasdvcnicnandonecnrenes leasnsizennoudews
238. ions Blackfin Processor Memory Characteristics As an example this section describes the Blackfin ADSP BF535 memory architecture and memory map organization Other processors in the Blackfin processor family ADSP BF531 ADSP BF532 ADSP BF533 and ADSP BF561 processors have very different memory architectures Refer to hardware reference manuals of target processors for appropriate information The ADSP BF535 processor includes the L1 memory subsystem with a 16Kbyte instruction SRAM cache a dedicated 4Kbyte data scratchpad and a 32Kbyte data SRAM cache configured as two independent 16Kbyte banks memories Each independent bank can be configured as SRAM or cache The ADSP BF535 processor also has an L2 SRAM memory that provides 2 Mbits 256 Kbytes of memory The L2 memory is unified that is it is directly accessible by the instruction and data ports of the ADSP BF535 processor The L2 memory is organized as a multi bank architecture of single ported SRAMs there are eight sub banks in L2 such that simulta neous accesses by the core and the DMA controller to different banks can occur in parallel 2 36 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker The device has two ports to the L2 memory one dedicated to core requests and the other dedicated to system DMA and PCI requests The processor units can process 8 16 32 or 40 bit data depending on the type of function being performed Tab
239. ions in Figure 5 5 describe different overlays By default the linker generates PLIT code only when an unresolved function refer ence is resolved to a function definition in overlay memory The main function calls functions X and Y which are defined in over lay memory Because the linker cannot resolve these functions locally the linker replaces the symbols X and Y with plit_X and plit_Y Unresolved references to X and Y are resolved to plit_X and plit_y VisualDSP 4 0 Linker and Utilities Manual 5 25 www BDTIC com ADI Memory Management Using Overlays Non Overlay Memory maint int pfid X TEs PLIT amp overlay manager handle calls using the PLIT to resolve calls and load overlays as needed plt_Xt call OM plt_ call OM Overlay 1 Storage HO asi i function X defined Overlay 2 Storge TEN fea i function Y defined Runtime Overlay Memory i currently loaded overlay Figure 5 5 PLITs and Overlay Memory main Calls to Overlays When the reference and the definition reside in the same executable file the linker does not generate PLIT code However you can force the linker to output a PLIT even when all references can be resolved locally The plit command sets up data for the overlay manager which first loads the overlay that defines the desired symbol and then branches to that symbol 5 26 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and
240. is chapter describes memory management with the overlay functions as well as several advanced LDF commands used for memory management This chapter includes e Overview on page 5 2 Provides an overview of Analog Devices processor s overlay strategy e Memory Management Using Overlays on page 5 4 Describes memory management using the overlay functions e Advanced LDF Commands on page 5 30 Describes LDF commands that support memory management with overlay functions the implementation of physical shared memory and multiprocessor support This chapter generally uses code examples for TigerSHARC pro cessors If used other processor s code examples are marked accordingly VisualDSP 4 0 Linker and Utilities Manual 5 1 www BDTIC com ADI Overview Overview Current Analog Devices processors use fast Harvard memory architecture that has separate program and data memories This memory architecture improves processing speed because the machine can fetch program instructions and data in parallel A data fetch from memory can thus be accomplished in a single memory cycle Analog Devices processors possess a separate program and data memory for speed For extra speed data can be kept in program memory as well as in data memory and there are instructions to fetch data from both memories simultaneously Since internal memory is much faster than external memory it may be desirable to keep large amounts of program c
241. is specified by the function label and its cor responding end label If an input section layout does not conform to the rule described above no elimination is performed in the section See the VisualDSP 4 0 Assembler and Preprocessor Manual for more details on using end labels VisualDSP 4 0 Linker and Utilities Manual 3 31 www BDTIC com ADI LDF Commands ELIMINATE_SECTIONS The ELIMINATE_SECTIONS sectionList command instructs the linker to remove unreferenced code and data from listed sections only The sectionList is a comma delimited list of input sections Both this LDF command and the linker s es command line switch on page 2 59 may be used to specify sections where unreferenced code and data should be eliminated INC LUDE The INCLUDE command specifies additional LDF files that the linker processes before processing the remainder of the current LDF Specify any number of additional LDF files Supply one file name per INCLUDE command Only one of these additional LDF files is obligated to specify a target architecture Normally the top level LDF file includes the other LDF files INPUT SECTION ALIGN The INPUT_SECTION_ALIGN number command aligns each input section data or instruction in an output section to an address satisfying number The number argument which must be a power of 2 is a word boundary address Valid values for number depend on the word size of the memor
242. isting 5 4 and Listing 5 5 the functions are written to overlay 0VL files Whether functions are disk files or memory segments does not matter except to the DMA transfer that brings them in Overlays are active only while being executed in run time memory which is located in the program memory segment Ungrouped Ovenlay Execution In Listing 5 4 as the FFT progresses and overlay functions are called in turn they are brought into run time memory in sequence as four function transfers Figure 5 10 shows the ungrouped overlays Live locations reside in several different memory segments The linker outputs the executable overlay 0VL files while allocating destinations for them in program VisualDSP 4 0 Linker and Utilities Manual 5 33 www BDTIC com ADI Advanced LDF Commands OVERLAY INPUT oenas mae fift_one ov fit_two ovl Ovenay OVERLAY_INPUT fh_two ov 2m fft_three ovl Oveday Run time Ovenay Memory ft Jast ovh y Figure 5 10 Example of Overlays Not Grouped OVERLAY_INPUT fift_three ov Listing 5 4 LDF Overlays Not Grouped This is part of the SECTIONS command for processor PO Declare which functions reside in which overlay The overlays have been split into different segments in one file or into different files The overlays declared in this section seg_pmco will run in segment seg_pmco OVERLAY_INPUT Overlays to live in section ovl_code
243. ities Manual xxix www BDTIC com ADI Notation Conventions To have a data sheet faxed to you call the Analog Devices Faxback System at 1 800 446 6212 Follow the prompts and a list of data sheet code numbers will be faxed to you If the data sheet you want is not listed check for it on the Web site Notation Conventions Text conventions used in this manual are identified and described as follows Additional conventions which apply only to specific chapters may appear throughout this document Example Description Close command File menu Titles in reference sections indicate the location of an item within the VisualDSP environment s menu system for example the Close command appears on the File menu this that Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars read the example as this or that One or the other is required this that Optional items in syntax descriptions appear within brackets and sepa rated by vertical bars read the example as an optional this or that this Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse read the example as an optional comma separated list of this SECTION Commands directives keywords and feature names are in text with letter gothic font filename Non keyword placeholders appear in text wit
244. ition sections are needed only for pre VisualDSP combatibility woth COFF objects coff stringstab INPUT_SECTIONS PSH1_OBJECTS coff stringstab LIBRARIES coff stringstab coff SDB INPUT_SECTIONS PSH1_OBJECTS coff SDB LIBRARIES coff SDB Inno seg_pmco INPUT_SECTIONS LIBRARIES 1nno seg_pmco end PSH1 sections end PSH1 processor PSH1_OBJECTS 1nno seg_pmco VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for SHARC Processors Reflective Semaphores Semaphores may be used in multiprocessor MP systems to permit processors to share resources such as memory or I O A semaphore is a flag that can be read and written by any of the processors sharing the resource A semaphore s value indicates when the processor can access the resource Reflective semaphores permit communication among processors that share a multiprocessor memory space Use broadcast writes to implement reflective semaphores in an MP system Broadcast writes allow simultaneous transmission of data to all the SHARC processors in an MP system The master processor can broadcast writes to the same memory location or IOP register on all the slaves During a broadcast write the master also writes to itself unless the broad cast is a DMA write Broadcast writes can also be used to simultaneously download code or data to multiple processors Bus lock can be used in combi
245. ix describes the utilities that provide legacy and file conversion support e Appendix C LDF Programming Examples for TigersHARC Pro cessors This appendix provides code examples of LDF files used with TigerSHARC processors e Appendix D LDF Programming Examples for SHARC Proces sors This appendix provides code examples of LDF files used with SHARC processors e Appendix E LDF Programming Examples for Blackfin Proces sors This appendix provides code examples of LDF files used with Blackfin processors Whavts New in This Manual This is a new manual that documents linking support for all currently available Analog Devices 32 bit floating point and fixed point SHARC and TigerSsHARC processors as well as 16 bit fixed point Blackfin processors Loader splitter information is now available in a separate Loader manual Refer to VisualDSP 4 0 Product Bulletin for information on all new and updated features and other release information VisualDSP 4 0 Linker and Utilities Manual xxi www BDTIC com ADI Technical or Customer Support Technical or Customer Support You can reach Analog Devices Inc Customer Support in the following ways Visit the Embedded Processing and DSP products Web site at ttp www analog com processors technical Support E mail tools questions to dsptools support analog com E mail processor questions to dsp support analog com Phone questions to 1 800 ANA
246. j program gt ovl_code Overlay to live in section ovl_code OVERLAY_INPUT VisualDSP 4 0 Linker and Utilities Manual 5 23 www BDTIC com ADI Memory Management Using Overlays ALGORITHM ALL_FIT OVERLAY_OUTPUT fft_last ovl INPUT_SECTIONS Fft_ovl doj program gt ovl_code Overlay to live in section ovl_code gt mem_code The first and third overlays share one run time location and the second and fourth overlays share the second run time location Additional instructions are included to determine whether the function call is a load or an execution call If the function call is a load the overlay manager initiates the DMA transfer and then jumps the PC back to the location where the call was made If the call is an execution call the over lay manager determines whether the overlay is currently in internal memory If so the PC jumps to the run time location of the called func tion If the overlay is not in internal memory a DMA transfer is initiated and the core waits for the transfer to complete The overlay manager pushes the appropriate registers on the run time stack It checks whether the requested overlay is currently in internal memory If not the overlay manager sets up the DMA transfer It then checks whether the function call is a load or an execution call If it is a load call the overlay manager begins the transfer and returns the PC back to the instruction following the call If it is an executi
247. k the project 4 24 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker ADSP 218x DSPs only Expert Linker Input Sections Memon Map PM Y Minti En EJ IVini 7 mem_INT_RSTI 0x0 0x1 a a caring S mem_INT_PWRDWN 0x20 Ox gt 219x_int_tab doj ja Epea Ip dotprod_main doj E LIBRARIES IV IVint12 mem_INT_KERNEL Ox40 Ox IVint3 4 mem_INT_STKI Ox60 Oxi Vint 4 mem_INT_INT4 0x80 Ox Vint Li mem INT_INTA Avan Nxt Vint ro Processor tab Figure 4 17 Expert Linker Window Memory Map Tree View Graphical View Memory Map Representation In the graphical view selected by right clicking in the Memory Map pane and choosing View Mode gt Graphical Memory Map the graphical memory map displays the processor s hardware memory map refer to your processor s hardware reference manual or data sheet Each hardware memory segment contains a list of user defined memory segments View the memory map from two perspectives pre link view and post link view see Specifying Pre and Post Link Memory Map View on page 4 31 Figure 4 18 through Figure 4 22 show examples of graphical memory map representations VisualDSP 4 0 Linker and Utilities Manual 4 25 www BDTIC com ADI Memory Map Pane Memory Map AIAI f 0000000 MEM_PRUGRAM f 0000000 Outpu
248. l i function Fl defined call F2 call F3 PLIT amp overlay manager handle calls using the PLIT for resolving calls and loading overlays as needed plit_Fe i set up OM information jump OM plit_F3 ii set up OM information jump OM OM load overlay defined in setup from plt branch to address defined in setup Overlay 1 Fe i function F2 defined call Fl call plit_F3 Overlay 2 F3 i function F3 defined call Fl call PLIT_F2 Runtime Overlay Memory i currently loaded overlay Figure 5 6 PLITs and Overlay Memory Inter Overlay Calls 5 28 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands Processor P1 Processor P2 Non Overlay Memory Non Overlay Memory main P2_Overlay_Manager plt_food if manager routines PLIT amp overlay manager handle calls using the PLIT to resolve calls and load overlays as needed plt_foo call P2_Overl ay_Manager Processor P2 Ovedlay Storage P2 Overlay fod Processor P2 Overlay Memory i current overlay Figure 5 7 PLITs and Overlay Memory Inter Processor Calls VisualDSP 4 0 Linker and Utilities Manual 5 29 www BDTIC com ADI Advanced LDF Commands Advanced LDF Commands Commands in the LOF file define the target system and specify the order in which the linker processes output for that system The LDF commands operate within a scope which influen
249. l fft _next_to_last j4 0 j31 prefetch J4 call fft_last_stage j4 0 j31 prefetch J4 The next set of instructions represents a load function call call fft_middle_stages This function call pre loads the function jnto the overlay run memory j4 13 5 22 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands j31 prefetch j4 Set pre fetch flag to 1 to indicate a load The code executes the first function and transfers the second function and so on In this implementation each function resides in a unique overlay and requires two run time locations While one overlay loads into one run time location a second overlay function executes in another run time location The following code segment allocates the functions to overlays and forces two run time locations OVERLAY_GROUPI1 OVERLAY_INPUT ALGORITHM ALL_FIT OVERLAY_OUTPUT fft_one ovl INPUT_SECTIONS Fft_ovl doj program gt ovl_code Overlay to live in section ovl_code OVERLAY_INPUT ALGORITHM ALL_FIT OVERLAY_OUTPUT fft_three ov1 INPUT_SECTIONS Fft_ovl doj program gt ovl_code Overlay to live in section ovl_code gt mem_code OVERLAY_MGR INPUT_SECTIONS Covly_mgr doj program gt mem_code OVERLAY_GROUP2 OVERLAY_INPUT ALGORITHM ALL_FIT OVERLAY_OUTPUT fft_two ovl INPUT_SECTIONS Fft_ovl do
250. le modification is often the easier alternative when there are few changes in your system s hardware or software VisualDSP provides an LDF file that supports the default mapping of each processor type When developing a new project use the Expert Linker to generate the project s LDF file as described in Chapter 4 Expert Linker Similar to an object D0J file an executable DXE file consists of different segments called output sections Input section names are inde pendent of output section names Because they exist in different namespaces input section names can be the same as output section names Refer to Chapter 3 Linker Description File for further information VisualDSP 4 0 Linker and Utilities Manual 2 5 www BDTIC com ADI Linking Environment Linking Environment The linking environment refers to Windows command prompt windows and the VisualDSP IDDE Ata minimum run development tools such as the linker via a command line and view output in standard output VisualDSP provides an environment that simplifies the processor pro gram build process From VisualDSP you specify build options from the Project Options dialog box and modify files including the Linker Description File LDF The Project Options dialog box s Type option allows you to choose whether to build a library 0L8 file an executable DXE file or an image file LDR or others Error and warning messages appea
251. le 2 7 lists memory ranges for the ADSP BF535 processors Blackfin processors have a 32 bit address range to support memory addresses from 0x0 to OxFFFF FFFF Address ranges that are not listed are reserved Table 2 7 ADSP BF535 Processor Memory Map Addresses Memory Range Range Description OxFFE00000 OxFFFFFFFF Core MMR registers 2MB OxFFCOO000 OxFFDFFFFF System MMR registers 2MB OxFFBOO000 OxFFBOOFFF Scratchpad SRAM 4K OxFFAQQ000 OxFFAO3FFF Instruction SRAM 16K OxFF9O00000 OxFF9O3FFF Data Memory Bank 2 SRAM 16K OxFF800000 OxFF803FFF Data Memory Bank 1 SRAM 16K OxFOO40000 OxFF FFFFF Reserved 0xF0000000 OxFOO3FFFF L2 Memory Bank SRAM 256K OxEFOO0400 OxEFFFFFFF Reserved OxEFOO0000 OxEFOOO3FF Boot ROM 1K Ox00000000 OxEEFFFFFF External memory The MEMORY section in Listing 2 1 on page 2 38 assumes that only L1 and L2 SRAMs are available and that L1 is unused Refer to the VisualDSP C C Compiler and Library Manual for Blackfin Processors and the appro priate hardware reference for information about cache configuration See the Memory chapter in an appropriate hardware reference for information about your target processor s memory organization VisualDSP 4 0 Linker and Utilities Manual 2 37 www BDTIC com ADI Link Target Description Linker MEMORY Q Command in LDF File Referring to information in sections Memo
252. le defines four version names my_name my_location CVS_TAG and other The value of my_name is neo the value of other is version value can be many words name is only one VisualDSP 4 0 Linker and Utilities Manual 6 7 www BDTIC com ADI Archiver Guide To tag an archive with version information from a file use the tx switch see Table 6 2 on page 6 12 which accepts the name of that file as an argument elfar c tx foo txt lib dlb object doj elfar p lib dlb CVS_TAG matrix_v_8_0 imy_location zion my_name neo other version value can be many words name is only one Version information can be added to an archive that already has version information The effect is additive Version information already in the archive is carried forward Version information that is given new values is assigned the new values New version information is added to the archive without destroying existing information Printing Version Information As mentioned above when printing the contents of an archive the p command see Table 6 2 on page 6 12 prints any version information Two more forms of the p switch can be used to examine version information The pv switch prints only version information and does not print the contents of the archive This switch provides a quick way to check the ver sion of an archive The pva switch prints all version information Version names without values cannot not be printed with p or
253. le files a DXE extension Figure 1 2 Library Files DLB Object Files DOJ Exec utables DXE SM O L LinkerDescription Project Options File LDF Dialog Box Settings Figure 1 2 Linking Diagram Linking enables your code to run efficiently in the target environment Linking is described in detail in Chapter 2 Linker When developing a new project use the Expert Linker to generate the project s LDF file See Chapter 4 Expert Linker for more information VisualDSP 4 0 Linker and Utilities Manual 1 7 www BDTIC com ADI Linking Linker and Assembler Preprocessor The linker and assembler preprocessor program pp exe evaluates and processes preprocessor commands in source files With these commands you direct the preprocessor to define macros and symbolic constants include header files test for errors and control conditional assembly and compilation The pp preprocessor is run by the assembler or linker from the operating system s command line or within the VisualDSP environment These tools accept and pass this command information to the preprocessor The preprocessor can also operate from the command line using its own com mand line switches gt Assembler Linker Preprocessor treats the character identifier as part of an The preprocessor matches the assembler which uses as part of assem bler directives and as a legal character in labels This behavio
254. ly technique Dumping Overlay Library Files Use the elfar and elfdump utilities to extract and view the contents of overlay library 0VL files For example the following command lists prints the contents library members of the CLONE2 0VL library file elfar p CLONE2 0VL The following command allows you to view one of the library members CLONE2 ELF elfdump all CLONE2 OVL CLONE2 elf The following commands extract CLONE2 ELF and print its contents elfar e CLONE2 ov1 elfdump all CLONE2 elf Switches for these commands are case sensitive B 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI C LDF PROGRAMMING EXAMPLES FOR TIG ERSHARC PRO C ESSO RS This appendix provides several typical LDFs used with TigerSHARC pro cessors As you modify these examples refer to the syntax descriptions in LDF Commands on page 3 29 This appendix provides the following examples e Linking a Single Processor System on page C 2 e Linking Large Uninitialized or Zero InitializedVariables on page C 4 e Linking an ADSP TS101 MP Shared Memory System on page C 6 e Linking for Overlay Memory on page C 12 The source code for several programs is bundled with your devel opment software Each program includes an LDF file For working examples of the linking process examine the LDF files that come with the examples Examples are in the following directory lt VisualDSP
255. m piler and Library Manual for TigerSHARC Processors for more information Profile Guided Optimization Support The SHARC TigerSHARC and Blackfin processor architectures support Profile Guided Optimization PGO PGO is the process of gathering information about a running application over many invocations of the executable with different input data and then re optimizing it using that gathered information The process relies upon the same application being run with different data sets which often means that the application acts upon sample data sets stored in files More specifically it means that the application is instructed to process each file via command line options passed to main The LOF files and the VisualDSP IDDE collaborate to provide support for command line arguments Under normal circumstances a typical embedded program is not interested in command line arguments and receives none In these normal cases the run time header invokes a func tion to parse a global string __argv_string and finds it empty To support PGO the LDF option IDDE_ARGS can be used to define a memory section called MEM_ARGV and __argv_string is mapped directly to the start of this section The VisualDSP IDDE follows the conven VisualDSP 4 0 Linker and Utilities Manual 2 45 www BDTIC com ADI Link Target Description tion that command line arguments can be passed to an application by writing the argument string into memory st
256. m num num form tnv Clears version information from a library v Verbose Outputs status information as the archiver processes files version Prints the archiver el far version to standard output w Removes all archiver generated warnings Wnnnn Selectively disables warnings specified by one or more message numbers For example W0023 disables warning message ar0023 The el far utility enables you to specify files in an archive by using the wildcard character For example the following commands are valid far c oO e elfar a elfar p 1 elfar e elfar d 1 elfar r li ibedlb adoj create using every doj file dlb s doj add objects starting with s ib dlb 1 print the files with 1 in their name ib dlb extract all files from the archive ib dlb t doj delete doj files starting with t b dlb doj replace all doj files VisualDSP 4 0 Linker and Utilities Manual 6 13 www BDTIC com ADI Archiver Command Line Reference The c a and r switches use the wildcard to look up the file names in the file system The p e and d switches use the wildcard to match file names in the archive Command Line Constraints The elfar command is subject to the following constraints Select one action switch a c d e p r s M or MM only in a sin gle command Do not place the verbose operation switch v in a position where it can be mist
257. map or the object mappings When the project is ready to be built Expert Linker saves the changes to the LDF file Expert Linker is able to show graphically how much space is allocated for program heap and stack After you load and run the program Expert Linker can show how much of the heap and stack has been used You can interactively reduce the amount of space allocated to heap or stack if they are using too much memory Freeing up memory enables you to store other things like processor code or data 4 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker There are three ways to launch the Expert Linker from VisualDSP e Double click the LDF file in the Project window e Right click the LDF file in the Project window to display a menu and then choose Open in Expert Linker e From the VisualDSP main menu choose Tools gt Expert Linker gt Create LDF The Expert Linker window appears Expert Linker Input Sections int10 Ivint11 IVint12 I intl3 Vint 4 IVint1 5 IVint4 IVint5 IVint6 IVint7 IVint8 H A E Memory Map End Address mem_itab mem_code mem_data2 mem_heap mem_stack mem_datal Dr E Figure 4 1 Expert Linker Window mem_INT_INT14 Ox1cO mem_INT_INT15 OxleO 0x200 0x242 08000 Oxaf00 Oxb800 OxcO00 Ox1 df Ox1 Ff On241 Ox fff Oxaeff Oxb ff Oxbfff Ox
258. mation 6 9 file searches 6 6 handling arbitrary files 6 2 printing version information 6 8 removing version information 6 9 running 6 11 6 12 symbol name encryption 6 15 tagging with version 6 6 tagging with version information 6 8 use in code disassembly B 3 VisualDSP 4 0 Linker and Utilities Manual I 1 www BDTIC com ADI INDEX using wildcard character 6 13 archive routines creating entry points 6 4 ARGV input section 2 25 argv input section 2 28 ARGV section 2 46 ASM files assembler A 3 assembler initialization data files DAT A 3 object files DOJ A 5 source files ASM 1 3 A 3 B base address setting for command line arguments 2 46 BeginInit InitSymbol command line switch 7 14 BEST_FIT LDF identifier 3 54 Blackfin memory architecture 2 36 Blackfin memory sections argv 2 28 bsz 2 28 bsz_init 2 28 constdata 2 27 cplb_code 2 26 cplb_data 2 27 ctor 2 28 ctorl 2 30 datal 2 26 gdt gdel frt frel cht chtl edt edtl 2 30 heap 2 29 L1_DATA_A 2 27 L1_DATA_B 2 27 noncache_code 2 29 program 2 26 sdram0 2 29 stack 2 29 voldata 2 27 vtbl 2 29 Blackfin processors basic memory configurations 3 8 memory usage in 3 8 simulation and emulation support 2 46 branch expansion instruction 2 60 2 61 2 62 2 64 branch instructions 5 38 breakpoints on overlays 5 7 broadcast space D 11 broadcast writes D 11 bsz_init input section 2 22 2 24 2 25 2
259. mit zooming If there is not enough room to display the memory map when zoomed in horizontal and or vertical scroll bars allow you to view the entire memory map for more information see Zooming In and Out on the Memory Map on page 4 32 You can drag and drop any object except memory segments See Figure 4 19 VisualDSP 4 0 Linker and Utilities Manual 4 27 www BDTIC com ADI Memory Map Pane 906fd0 1 Select ffgogfff the input mem_stack f 907000 section 2 Drag itto an output section x G jajal 0 Figure 4 19 Dragging and Dropping an Object 1 1 Select an output section 2 Drag it to a new location Figure 4 20 Dragging and Dropping an Object 2 Select a memory segment to display its border Memory segments when selected display a tiny box at their top and bottom borders Figure 4 21 Drag the border at this box to change the memory segment s size By doing this the size of the selected and adjacent memory segments change 4 28 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Map ffI03fff 904000 ff907fff f 908000 f IfLELE ffa00000 ffal7fff ffa0s000 ffal3fff ffal4000 904000 907800 ffal3ffc ffal3fft g Expert Linker Move this box to adjust the size of the memory segment Figure 4 21 Adjusting the Size of a Memory Segment When the mouse pointer is on top of the box the resize curso
260. mmand line switch 7 15 ___inits symbol name 7 14 InputFile dxe command line switch 7 16 input files callback input executable file 7 3 primary input file 7 3 input output sections contents of 4 38 INPUT_SECTION_ALIGN LDF command 3 32 input sections adding 4 12 contiguity 4 64 directives 1 4 names 2 18 source code 1 3 INPUT_SECTIONS LDF identifier 3 14 3 51 Input Sections pane 4 12 menu selections 4 12 inserting gaps into memory segment 4 35 internal memory memory blocks MO M1 M2 2 34 TigerSHARC processors 2 34 I 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI inter overlay calls 5 27 inter processor calls 5 27 ip individual placement linker command line switch 2 60 J jcs2 convert out of range short calls linker command line switch 2 61 jcs2l convert out of range short calls linker command line switch 2 62 jumps converting 2 61 K keep keep unused symbols linker command line switch 2 62 KEEP LDF command 3 33 KEEP_SECTIONS LDF command 3 34 L ll_code_cache guard symbol 3 8 L1_code input section 2 25 L1_DATA_A input section 2 25 2 27 L1_DATA_B input section 2 25 2 27 L1 memory 2 36 L2 memory 2 36 LDF commands about 2 3 3 29 5 30 ALIGN 3 30 ARCHITECTURE 3 30 ELIMINATE 3 31 ELIMINATE_SECTIONS 3 32 FILLO 3 52 INCLUDE 3 32 INPUT_SECTION_ALIGN O 3 32 KEEP 3 33 INDEX KEEP_SECTIONS 3 34 LINK_
261. mmands In this TigerSHARC code example 0VLY_one contains FUNC_A and lives in memory segment ovl_code OVLY_two contains functions FUNC_B and FUNC_C and also lives in memory segment ov1_code Listing 5 1 Overlay Declaration in an LDF File code OVERLAY_INPUT OVERLAY_OUTPUT OVLY_one ovl INPUT_SECTIONS FUNC_A doj program gt ovl_code OVERLAY_INPUT OVERLAY_OUTPUT OVLY_two ovl INPUT_SECTIONS FUNC_B doj program FUNC_C doj sec_code gt ovl_code gt MOCode The common run time location shared by overlays 0VLY_one and OVLY_two is within the seg_code memory segment The LOF file configures the overlays and provides the information necessary for the overlay manager to load the overlays The information includes the following linker generated overlay constants where is the overlay ID _ov_startaddress_ _ov_endaddress_ _ov_size_ ov_word_size_run_ ov_word_size_live_ _ov_runtimestartaddress_ Each overlay has a word size and an address which is used by the overlay manager to determine where the overlay resides and where it is executed One exception _ov_size_ specifies the total size in bytes VisualDSP 4 0 Linker and Utilities Manual 5 9 www BDTIC com ADI Memory Management Using Overlays Overlay live and run word sizes differ when internal memory and external memory widths differ A system containing either 16 bit wide or 32 bit wide external memory req
262. mon shared memory definitions in the global scope before the PROCESSOR commands See Command Scoping for more information Comments in the LDF File C style comments may cross newline boundaries until a terminator is encountered A string precedes a single line C style comment For more information on LDF structure see e Link Target Description on page 2 16 e Placing Code on the Target on page 2 40 Also see Appendix C Appendix D and Appendix E for code and LDF structure examples for Tigers HARC SHARC and Blackfin processors respectively 3 16 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File Command Scoping The two LDF scopes are global and command A global scope occurs outside commands Commands and expressions that appear in the global scope are always available and are visible in all subsequent scopes LDF macros are available globally regardless of the scope in which the macro is defined see LDF Macros on page 3 26 A command scope applies to all commands that appear between the braces of another command such as a PROCESSOR or PLIT command Commands and expressions that appear in the command scopes are lim ited to those scopes Figure 3 1 illustrates some scoping issues For example the MEMORY command that appears in the LDF s global scope is available in all com mand scopes but the MEMORY command that a
263. n named extern section ext_data int temp Section directive section extern void funcl void int x 1 Example 2 In the following example section extern is optional Note the new function funct2 does not require section extern For more infor mation on LDF sections refer to Specifying the Memory Map on page 2 17 section ext_data int temp section extern void funcl void int x 1 int func2 void return 13 New VisualDSP 4 0 Linker and Utilities Manual 1 5 www BDTIC com ADI Compiling and Assembling For information on compiler default section names refer to the VisualDSP 4 0 C C Compiler and Library Manual for appropriate target processors and Placing Code on the Target on page 2 40 Identify the difference between input section names output sec tion names and memory segment names because these types of names appear in the LDF file Usually default names are used However in some situations you may want to use non default names One such situation is when various functions or variables in the same source file are to be placed into different memory segments 1 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Introduction Linking After you have compiled and assembled source files into object files use the linker to combine the object files into an executable file By default the development software gives executab
264. n the output executable file as their contents will be regenerated at run time when the initialization stream is processed Therefore by default such sec tions are not copied to the output file in order to reduce the size of the executable file Processing Callback Input Executable Files In addition to a primary input executable file the Memory Initializer optionally accepts a number of individually built callback executable files specified with the init switch on page 7 15 VisualDSP 4 0 Linker and Utilities Manual 7 3 www BDTIC com ADI Basic Operation of Memory Initializer The Memory Initializer sequentially processes the callback executable files one at a time After opening an input callback executable file the Memory Initializer looks for all of the sections marked with the Initialization Flag and PROGBITS qualifier it indicates the section contains either the instruc tions or data or both and extracts the data and instructions from them make a callback initialization stream When this stream is built up all the callback DXE files are processed in the order they are specified on the com mand line The Memory Initializer continues making a callback initialization stream from each of the callback executable files and pre pending it to the pri mary initialization stream in the same sequence the callback executable files appear in the command line until the last callback executable file is processed When
265. nally a processor can be renamed by selecting the processor right clicking choosing Rename Processor and typing a new name For multiprocessor systems you can add delete and rearrange processor order Right click in the Processors box choose Add Processor and type a name for the new processor or choose Delete Processor To move a pro cessor select the processor and drag it to another position in the Processors list When a processor in a multiprocessor system is moved to a differ ent position its address range changes The MP Start Addr and MP End Addr information is static 4 54 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Managing PLIT Properties for Overlays The PLIT tab allows you to view and edit the function template used in overlays Assembly instructions observe the same syntax coloring as specified for editor windows Enter assembly code only Comments are not allowed To view and edit PLIT information 1 Right click in the Input Sections pane 2 Choose Properties The Global Properties dialog box appears 3 Click the PLIT tab Figure 4 45 Global Properties 24x General Processor PLIT Elimination Procedure Linkage Table PLiT PLIT SYMBOL _OVERLAYID PLIT SYMBOL ADDRESS J5 _OverlayManager Concer Figure 4 45 PLIT Page of the Global Properties Dialog Box VisualDSP 4 0 Linker and Utilities Manual 4 55 www BDTIC
266. names with this command use the mem ory segment names to place program sections via the SECTIONS command VisualDSP 4 0 Linker and Utilities Manual 3 35 www BDTIC com ADI LDF Commands The LDF must contain a MEMORY command for global memory on the target system and may contain a MEMORY command that applies to each processor s scope There is no limit to the number of memory segments you can declare within each MEMORY command For more information see Command Scoping on page 3 17 In each scope scenario follow the MEMORY command with a SECTIONS command Use the memory segment names to place program sections Only memory segment declarations may appear within the MEMORY com mand There is no limit to section name lengths If you do not specify the target processor s memory map with the MEMORY command the linker cannot link your program If the combined sections directed to a memory segment require more space than exists in the segment the linker issues an error message and halts the link The syntax for the MEMORY command appears in Figure 3 2 followed by a description of each part of a segment declaration MEMORY segment commends TY PEC RAM ROM START adbdress_copression LENGTH length expression END aabdress_ecepresston WIDTH sera _ccepresstor Figure 3 2 MEMORY Command Syntax Tree 3 36 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI
267. nation with broadcast writes to implement reflective semaphores in an MP system The reflective semaphore should be located at the same address in internal memory or IOP register of each SHARC processor SHARC processors have a broadcast space Use LDF file or header files to define a memory segment in this space just as in internal memory or any processor MP space The broadcast space aliases internal space so if there is a memory segment defined in the broadcast space the LDF file cannot have a memory segment at the corresponding address in the inter nal space or in the MP space of any processor Otherwise the linker generates an error indicating that the memory definition is not valid To check the semaphore each SHARC processor reads from its own inter nal memory Any object in the project can be mapped to an appropriate memory segment defined in the broadcast space for use as a reflective VisualDSP 4 0 Linker and Utilities Manual D 11 www BDTIC com ADI Linking for MP and Shared Memory semaphore If an object defining symbol SemA is mapped to a broadcast space when the program writes to SemA the written value appears at the aliased internal address of each processor in the cluster Each processor may read the value using SemA or read it from internal memory by select ing SemA 0x380000 thus avoiding bus traffic To modify the semaphore a SHARC processor requests bus lock and then performs a broadcast
268. nc tion to ensure it continues correctly on return However you can implement this feature within the PLIT section of your LDF Note Your program may not need to save this information e Initiate jump to the routine that transfers the overlay code to internal memory after given the previous information about its identity size and location _OverlayManager Smart overlay man agers first check whether an overlay function is already in internal memory to avoid reloading the function SHARED_MEMORY The linker can produce two types of executable output DXE files and SM files A DXE file runs in a single processor system s address space Shared memory executable SM files reside in the shared memory of a multipro cessor system The SHARED_MEMORY command is used to produce SM files 5 40 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands If you do not specify the type of link with a PROCESSOR or SHARED_MEMORY command the linker cannot link your program Your LDF may contain multiple SHARED_MEMORY commands but the maximum number of processors that can access a shared memory is pro cessor specific The SHARED_MEMORY command must appear within the scope of a MEMORY command The PROCESSOR commands declaring the processors that share this memory must also appear within this scope Figure 5 12 shows the syntax for the SHARED_MEMORY comm
269. nd data in physical memory The linker maps input sections in object files to output sections in executable files and maps the output sections to memory segments specified by the MEMORY command VisualDSP 4 0 Linker and Utilities Manual 3 13 www BDTIC com ADI LDF File Overview The INPUT_SECTIONS statement specifies the object file the linker uses as an input to resolve the mapping to the appropriate memory segment declared in the LDF file For example in TigerSHARC processors the following INPUT_SECTIONS statement directs the linker to place the program input section in the code output section and to map it to the MOCode memory segment code INPUT_SECTIONS 0BJECTS program gt MOCode For SHARC processors the following INPUT_SECTIONS statement directs the linker to place the isr_tb1 input section in the dxe_isr output section and to map it to the mem_isr memory segment dxe_isr INPUT_SECTIONS OBJECTS isr_tbl gt mem_isr For Blackfin processors the following two input sections program and datal are mapped into one memory segment L2 as shown below dxe_L2 1 INPUT_SECTIONS_ALIGN 2 2 INPUT_SECTIONS OBJECTS program LIBRARIES program 3 INPUT_SECTIONS_ALIGN 1 4 INPUT_SECTIONS OBJECTS datal LIBRARIES datal gt MEM_L2 The second line directs the linker to place the object code assem bled from the source file s program input section via the section
270. nd B12 word 2 bits 15 0 word 1 bits 47 0 B5 and B6 word 1 bits 15 0 B7 B8 B9 B10 B11 B12 B7 and B8 word 2 bits 47 32 word 2 bits 47 0 B9 and B10 word 2 bits 31 16 The order of unpacked bytes does not match the transfer stored order Because the processor uses two bytes per short word the above transfer translates into the format in Table 3 5 VisualDSP 4 0 Linker and Utilities Manual 3 41 www BDTIC com ADI LDF Commands Table 3 5 Storage Order vs Unpacked Order Storage Order Unpacked Order in 32 bit external memory two 48 bit internal words B1 B2 B3 B4 B11 B12 B1 B2 B3 B4 B5 B6 B5 B6 B7 B8 B9 B10 B7 B8 B9 B10 B11 B12 You specify to the linker how to accommodate processor specific byte packing for example non sequential byte order with the PACKING syn tax within the OVERLAY_INPUT command The above example s byte ordering translates into the following PACKING command syntax which supports 48 bit to 32 bit packing over the processor s external port PACKING 12 B1 B2 B3 B4 BO B11 B12 B5 B6 BO B7 B8 B9 B10 BO The above PACKING syntax places instructions in an overlay stored in a 32 bit external memory but is unpacked and executed from 48 bit inter nal memory Refer to fft_ovly fft which uses a macro that defines the packing This file is included with the overlay3 example that ships with VisualDSP Overlay Packing Forma
271. ne switch 6 13 tree view memory map 4 24 t trace linker command line switch 2 65 twc ver archiver command line switch 6 13 tx filename archiver command line switch 6 13 TXT files A 5 linker A 5 TYPE Q command 3 37 U uninitialized variables C 4 D 4 E 4 unmapped object icon 4 14 unpacking data 3 40 USE_CACHE configuration 3 8 user declared macros 3 28 VisualDSP 4 0 Linker and Utilities Manual I 15 www BDTIC com ADI INDEX utilities archiver elfar exe 6 1 file dumper elfdump exe B 1 V version archiver command line switch 6 13 version display version linker command line switch 2 66 version information built in with archiver 6 6 user defined 6 7 viewing archive files B 4 icons and colors 4 15 input sections 4 12 memory map 4 20 OVL file content B 4 section contents 4 38 VisualDSP archiver 6 1 Assemble tab 2 7 creating library files 6 3 Expert Linker 4 2 librarian 6 1 project builds 2 6 Project Options dialog box 2 3 2 7 running linker from 2 6 setting assembler options 2 7 setting options 2 9 voldata input section 2 25 2 27 vtbl input section 2 23 2 26 vtbl memory section 2 26 v verbose archiver command line switch 6 13 v verbose command line switch 7 18 v verbose linker command line switch 2 65 v verbose MemInit command line switch 7 14 W warnings linker 2 15 warnonce single symbol warning linker command l
272. nker A 6 software development 1 2 software development phases 1 2 sort objects 4 13 4 17 sorting objects 4 17 source code in input sections 1 3 I 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI source files 1 3 assembly instructions A 3 C C A 2 fixed point data A 3 preparing 7 8 special section name MEMINIT 3 50 PLIT 3 49 splitter ASCII format files LDR A 8 generating non bootable PROM image files 1 11 SPORT data files A 9 sp skip preprocessing linker command line switch 2 65 s strip all symbols linker command line switch 2 64 S strip debug symbols linker command line switch 2 57 stack 2 29 graphic representation 4 71 managing in memory 4 71 sections 2 25 start address memory segment 3 37 symbol declaration 3 11 manager 5 7 symbols adding 4 58 4 60 deleting from resolve list 4 60 encryption of names 6 15 managing properties of 4 58 removing 2 64 4 58 resolution 4 59 resolve with 4 60 viewing 4 24 4 41 4 58 T t archiver command line switch 6 6 6 13 INDEX target processor specifying 2 56 T file executable program placement linker command line switch 2 58 TigerSHARC memory sections bsz 2 24 bsz_init 2 24 ctor 2 24 datal 2 23 data2 2 23 heaptab 2 24 M1Heap 2 24 M1Stack 2 24 M2Stack 2 24 mem_argv 2 23 2 28 program 2 23 vtbl 2 25 TigerSHARC processors programming enhancement 2 44 tnv archiver command li
273. nput Sections pane initially displays a list of all the input sections referenced by the LDF file and all input sections contained in the object files and libraries Under each input section a list of LDF macros librar ies and object files may be contained in that input section You can add or delete input sections LDF macros or objects library files in this pane Input Sections Menu Right click an object in the Input Sections pane and a menu appears as shown in Figure 4 8 Input Sections Memory Map H I MEM Sort by gt Start Address End Address H bs add gt 0x0 Ox1ff9F H E bse Mee Ox40000 Oxdfttt H datal Expand all LDF Macros 050000 Ox5ffft SL data eee oxg0000 OxStttt F os View Global Properties Ox30000 OxSfftt H E dataz Oxc0000 Oxcf ff L dataz w Allow Docking Oxd0000 Oxdffff E a Hide 0x100000 Ox Orff ata a F datad Float In Main Window shea bu L databa M10DataB Ox150000 Ox Biff HL data6b MSO Ox30000000 Ox37Htttff H dataBa MSI Ox38000000 Ox ttt H datab MSSDO Ox40000000 Oxd Stttttt HL program MSSD1 ox50000000 OxStttttf A MSSD2 oxs0000000 Ox6Sittttt A MSSD3 ox70000000 Ox Sitttft z sa HOST owannoannnn NAFF Oro Figure 4 8 Input Sections Right Click Menu 4 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker The main menu functio
274. ns a run time stack for registers being used by the overlay manager e Compares the requested overlay s ID with that of the previously loaded overlay stored in the ov_id_loaded buffer e Sets up the DMA transfer of the overlay if it is not already in internal memory e Jumps the PC to the run time location of the referenced function These are the basic tasks that are performed by an overlay manager More sophisticated overlay managers may be required for individual applications Reducing Overlay Manager Overhead The example in this section incorporates the ability to transfer one overlay to internal memory while the core executes a function from another over lay Instead of the core sitting idle while the overlay DMA transfer occurs the core enables the DMA and then begins executing another function 5 20 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands This example set for TigerSsHARC processors uses the concept of overlay function loading and executing A function load is a request to load the overlay function into internal memory but not execute the function A function execution is a request to execute an overlay function that may or may not be in internal memory at the time of the execution request If the function is not in internal memory a transfer must occur before execution In several circumstances an overlay transfer can be in progress while the core
275. ns functions fft_middle_stages and fft_next_to_last For examples of overlay manager source code refer to the example pro grams shipped with the development software The overlay manager e Creates and maintains a stack for the registers it uses e Determines whether the referenced function is in internal memory e Sets up a DMA transfer e Executes the referenced function Several code segments for the LDF and the overlay manager follow with appropriate explanations Listing 5 3 FFT Overlay Example 1 OVERLAY_INPUT OVERLAY_OUTPUT fft_one ov1 INPUT_SECTIONS Fft_lst_last doj program gt ovl_code Overlay to live in section ovl_code VisualDSP 4 0 Linker and Utilities Manual 5 13 www BDTIC com ADI Memory Management Using Overlays OVERLAY_INPUT OVERLAY_OUTPUT fft_two ovl INPUT_SECTIONS Fft_mid doj program gt ovl_code Overlay to live in section ovl_c The two defined overlays fft_one ovl and fft_two ov1 live in memory segment ovl_code defined by the MEMORY command and run in sec tion program All instruction and data defined in the program memory segment within the Fft_lst_last doj file are part of the fft_one ov overlay All instructions and data defined in program within the file Fft_mid doj are part of overlay fft_two ovl The result is two functions within each overlay The first and the last called functions are in overlay fft_one The two middle functions are in overlay fft_two W
276. ns include e Sort by Sorts objects by input sections or LDF macros These selections are mutually exclusive e Add Adds input sections object library files and LDF macros Appropriate menu selections are grayed out when right clicking on a position area in which you cannot create a corresponding object Create an input section as a shell without object library files or LDF macros in it You can even map this section to an output sec tion However input sections without data are grayed out e Delete Deletes the selected object input section object library file or LDF macro e Remove Removes an LDF macro from another LDF macro but does not delete the input section mappings that contain the removed macro The difference between Delete and Remove is that Delete completely deletes the input section macros that contain the deleted macro NOTE The Remove option becomes available only if you right click on an LDF macro that is part of another LDF macro e Expand All LDF Macros Expands all the LDF macros in the input sections pane so that the contents of all the LDF macros are visible e View Legend Displays the Legend dialog box which shows icons and colors used by the Expert Linker VisualDSP 4 0 Linker and Utilities Manual 4 13 www BDTIC com ADI Input Sections Pane e View Section Contents Opens the Section Contents dialog box which displays the section contents of the object file librar
277. ns the code and symbol table for this overlay Take the code from overlayl doj only If there is data that this code needs it must be the INPUT of a data overlay or the INPUT to non overlay data memory INPUT_SECTIONS overlayl doj program gt MO_ovly This is the second overlay Note that the OVERLAY_INPUT commands must be contiguous in the LDF file to occupy the same runtime memory VisualDSP 4 0 Linker and Utilities Manual C 13 www BDTIC com ADI Linking for Overay Memory OVERLAY_INPUT OVERLAY_OUTPUT overlay2 ovl INPUT_SECTIONS overlay2 doj program gt MO_Lovly gt MOCode In structions generated by the linker in the plit section must be placed in non overlay memory Here is the one and only specification telling the linker where to place these instructions plit linker inserts instructions here gt MOCode datal INPUT_SECTIONS PO_OBJECTS datal LIBRARIES datal gt M2Data data2 INPUT_SECTIONS PO_OBJECTS data2 LIBRARIES data2 gt M1lData place C RTL initializers in MO internal memory ctor INPUT_SECTIONS LIBRARIES ctor0 INPUT_SECTIONS LIBRARIES ctor1 INPUT_SECTIONS LIBRARIES ctor2 INPUT_SECTIONS LIBRARIES ctor3 INPUT_SECTIONS LIBRARIES ctor gt M2Data place C RTL heap table in MO internal memory heaptab I
278. nto a different memory arrangement Different DSP boards have different amounts of memory located at different addresses For code reuse and portability a program should not require modification to run in different machines or in different locations in memory There fore the C or assembler source code does not specify the addresses of either code or data Instead the source code assigns names to sections of code data or both at compile or assembly time to allow the linker to assign physical memory addresses to each section of code or data The goal is to make the source program s position independent and to let the linker assign all the addresses The linker uses Linker Description Files to control what goes where At link time the linker follows directions in the LDF file to place code and data at the proper addresses The overlay manager is a user defined function responsible for insuring that a required symbol function or data within an overlay is in the run time memory when it is needed The transfer occurs using the direct memory access DMA capability of the processor The overlay manager may also handle other advanced functionality described in Introduction to Memory Overlays on page 5 5 and Overlay Managers on page 5 7 VisualDSP 4 0 Linker and Utilities Manual 5 3 www BDTIC com ADI Memory Management Using Overlays Memory Management Using Overlays To reduce DSP system costs many applications
279. nts correspond in the default LDF files for appropriate tar get processor architectures Refer to your processor s default LDF file and to the hardware ref erence manual for details Typical uses for memory segments include interrupt tables initialization ata program code data heap space and stack space etc For detaile dat g de data h d stack tc For detailed processor specific information refer to e Default Memory Sections for SHARC Processors e Default Memory Sections for TigerSHARC Processors e Default Memory Sections for Blackfin Processors e Special Table Memory Sections 2 18 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Default Memory Sections for SHARC Processors Table 2 1 shows section mapping in the default LDF file for ADSP 21161 processor as an example for SHARC processors Table 2 1 Section Mapping in the Default SHARC LDF Linker Input Section Output Section Memory Section seg_pmco dxe_pmco seg_pmco seg_dmda dxe_dmda seg_dmda seg_pmda dxe_pmda seg_pmda heap dxe_heap seg_heap seg_stak dxe_sta seg_stak sec_rth dxe_rth seg_rth seg_init seg_init seg_init seg_init_code seg_init_code seg_init_code seg_argv seg_argv seg_argv seg_ctdm seg_ctdm seg_ctdm seg_vtb seg_vtb seg_vtbl There are several input memory sections used in the default LDF files for ADSP 210xx 211xx 212xx 213xx
280. nts you want to add e Output Section Adds an output section to the selected memory segment Right click on the memory segment to access this com mand If you do not right click on a memory segment this option is disabled e Shared Memory Adds a shared memory to the memory map e Overlay Invokes a dialog box that allows adding a new overlay to the selected output section or memory segment The selected out put section is the new overlay s run space see Figure 4 54 on page 4 69 Delete Deletes the selected object Expand All Expands all items in the memory map tree so that their con tents are visible Pin to Output Section Pins an object section to an output section to prevent it from overflowing to another output section This command appears only when right clicking an object section that is part of an output section specified to overflow to another output section View Section Contents Invokes a dialog box that displays the contents of the input or output section It is available only after you link or build the project and then right click on an input or object section see Figure 4 31 on page 4 39 VisualDSP 4 0 Linker and Utilities Manual 4 23 www BDTIC com ADI Memory Map Pane View Symbols Invokes a dialog box that displays the symbols for the project overlay or input section It is available only after you link the project and then right click on a processor overlay or
281. o ensures that correlated symbols within an object file are encrypted the same way so they remain correlated The names listed in the exclude file are interpreted as root names Thus _foo in the exclude file prevents the encryption of the symbol names foo _foo end and _foo end _ foo The type letter argument which provides the first letter of the encrypted part of a symbol name ensures that the encrypted names in dif ferent archive libraries can be made distinct If different libraries are encrypted with the same type letter argument unrelated external sym bols of the same length may be encrypted identically VisualDSP 4 0 Linker and Utilities Manual 6 17 www BDTIC com ADI Archiver Command Line Reference 6 18 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 7 MEMORY INITIALIZER VisualDSP 4 0 supports the Memory Initializer MemInit exe tool The Memory Initializer s main function is to modify executable files DXE files so that the programs are self initializing It does this by converting the program s RAM based contents into an initialization stream which it embeds into the executable file This chapter provides e Memory Initializer Overview on page 7 2 e Basic Operation of Memory Initializer on page 7 3 e Initialization Stream Structure on page 7 5 e Run Time Library Routine Basic Operation on page 7 6 e Using the Memory Init
282. o the path of the output directory which is set with the linker s od switch or o switch when od is not speci fied For example the following statement permits a configuration change Release vs Debug without modifying the LDF file OVERLAY_OUTPUT COMMAND_LINE_OUTPUT_DIRECTORY OVL1 0VL VisualDSP 4 0 Linker and Utilities Manual 3 27 www BDTIC com ADI LDF Macros e ADI_DSP This macro expands into the path of the VisualDSP installation directory Use this macro to control how the linker searches for files User Declared Macros The linker supports user declared macros for file lists The following syn tax declares macroname as a comma delimited list of files macroname filel file2 file3 3 After macroname has been declared the linker substitutes the file list when macroname appears in the LDF file Terminate a macroname decla ration with a semicolon The linker processes the files in the listed order LDF Macros and Command Line Interaction The linker receives commands through a command line interface regard less of whether the linker runs automatically from the VisualDSP IDDE or explicitly from a command window Many linker operations such as input and output are controlled through the command line entries Use LDF macros to apply command line inputs within the LDF Base your decision on whether to use command line inputs in the LDF file or to control the linker with LDF code on t
283. oc etc allocate memory bsz This section is a BSS style section for global zero initialized data bsz_init This section contains run time initialization data see meminit on page 2 62 for more information M1Stack This section is the area where the run time stack is located Local vari ables function parameters and so on are stored here M2Stack This section is the second area where the run time stack is located M1Heap This section is the area where the heap is located Dynamically allocated data is placed here 2 24 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI vtbl Linker This section contains C virtual function tables The default LDF files place the virtual function tables into the default data memory area but this can be re mapped as required You can also direct the compiler to use a different section for C virtual function tables by using the section compiler switch Default Memory Sections for Blackfin Processors Table 2 2 shows section mapping in the default LDF file for ADSP BF535 processor as an example for Blackfin processors Table 2 3 Section Mapping in the Default ADSP BF535 LDF Input Section Output Section Memory Section program program EM_PROGRA datal datal EM_PROGRA cplb_code cplb_code EM_PROGRA Ll_code L1_code EM_L1_CODE constdata constdata EM_PROGRA cplb
284. ode in external memory and to swap parts of it to internal memory for speed in execution Such a pro gram is said to run in overlays In case of Blackfin architecture to use the full memory bandwidth Black fin processors possess an instruction cache Instructions which come from cache memory free up the program memory bus for data access fetch from program memory This feature permits multiply accumulate instructions to fetch a multiplier and a multiplicand compute a product and add the new product to the accumulator all in a single instruction In this case it is important to locate the multiplier data in program memory and the multiplicand data in data memory Blackfin processors have an integrated instruction and data cache which can be used to reduce the manual process of moving instructions and data in and out of core Memory overlays can also be used to run an application efficiently but they require a user managed set of DMAs Since Blackfin processors do not have a separate built in overlay manager the DMA con troller must be used to move code in and out of internal L1 memory For this reason it is almost always better to use the instruction cache 5 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands It is the programmer s responsibility to assign data buffers to memory This is done with instructions to the linker In addition each DSP project must fit i
285. of Input Sections allows you to choose whether or not code or data in an output section should be mapped contiguously The choices are e Display linker warning if section is not mapped contiguously e Force contiguous placement of sections e Suppress linker warning about non contiguous placement of sections in the operating system e Specify the Packing on page 4 65 and Alignment with Fill value properties on page 4 67 as needed 4 64 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Managing Packing Properties Use the Packing tab to specify the packing format that the linker employs to place bytes into memory The choices include No packing or Custom packing You can view byte order which defines the order that bytes will be placed into memory and you can change this order It can be viewed via the Packing order box To specifypacking properties 1 Right click a memory segment in the Memory Map pane 2 Choose Properties and click the Packing tab Figure 4 52 Output Section Properties AE Dutput Section Packing Alignment Packing Number of bytes Custom Packing order Figure 4 52 Memory Segment Properties Dialog Box Packing Tab VisualDSP 4 0 Linker and Utilities Manual 4 65 www BDTIC com ADI Managing Object Properties 3 In Packing method select a method Method Description No packing Specifies no packing Number of bytes and Packing or
286. omatically upon reading the LDF file Memory overlays support applications whose program instructions and data do not fit in the internal memory of the processor Overlays may be grouped or ungrouped Use the OVERLAY_INPUT command to support ungrouped overlays Refer to Memory Overlay Support on page 5 8 for a detailed description of overlay functionality The OVERLAY_GROUP command groups overlays and each group is brought into run time memory where the overlay for each group is run from a different starting address in run time memory Overlay declarations syntactically resemble the SECTIONS commands They are portions of SECTIONS commands The OVERLAY_GROUP command syntax is OVERLAY_GROUP OVERLAY_INPUT LGORITHM ALL_FIT VERLAY_OUTPUT PUT_SECTIONS KS YO YF Figure 5 9 demonstrates grouped overlays 5 32 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands OVERLAY _GROUP fft_one ovl OVERLAY_INPUT Main call fft_one ovl sda call OVERLAY_INPUT ft t fft_two ovl tw 0 0v overlay Overlay Manager OVERLAY_GROUP OVERLAY_INPUT fft_three ovl OVERLAY_INPUT fft_last ovl fft_three ovl overlay Overlay Group 1 Run time fft_last ovl Memory overlay Y Overlay Group 2 Run time Memory Figure 5 9 Example of Overlays Grouped In the simplified examples in L
287. on call the core is idle until the transfer is completed if the transfer was necessary The PC then jumps to the run time location of the function The overlay managers in these examples are used universally Spe cific applications may require some modifications which may eliminate some instructions For instance if your application allows the free use of registers you may not need a run time stack 5 24 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands Using PUTQ and Overlay Manager The PLIT command inserts assembly instructions that handle calls to functions in overlays The instructions are specific to an overlay and are executed each time a call to a function in that overlay is detected Refer to PLIT on page 5 36 for basic syntax information Refer to Introduction to Memory Overlays on page 5 5 for detailed information on overlays Figure 5 5 shows the interaction between a PLIT and an overlay manager To make this kind of interaction possible the linker generates special sym bols for overlays These overlay symbols are e _ov_startaddress_ e _ov_endaddress_ e _ov_size_ ov_word_size_run_ ov_word_size_live_ e _ov_runtimestartaddress_ The indicates the overlay number Overlay numbers start at 1 not 0 to avoid confusion when these elements are placed into an array or buffer used by an overlay manager The two funct
288. on page 5 8 for a detailed description of overlay and PLIT functionality A PLIT command may appear in the global LDF scope within a PROCESSOR command or within a SECTIONS command For an example of using a PLIT command see Using PLIT and Overlay Manager on page 5 25 When you write the PLIT command in the LDF the linker generates an instance of the PLIT with appropriate values for the parameters involved for each symbol defined in overlay code PLIT Syntax Figure 5 11 shows the general syntax of the PLIT command and indi cates how the linker handles a symbol symbo1 local to an overlay function 5 36 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands PLIT pdit_commana s INSUR on symbol PLIT_SYMBOL_OVERLAVYID symbol PLIT_SYMBOL_ADDRESS symbol PLIT_DATA_OVERLAY_ID Figure 5 11 PLIT Command Syntax Tree Parts of the PLIT command are e instruction None one or multiple assembly instructions The instructions may occur in any reasonable order in the com mand structure and may precede or follow symbols The following two constants contain information about symbol and the overlay in which it occurs You must supply instructions to handle that info e PELIT rmation _SYMBOL_OVERLAYID Returns the overlay ID e PLETI T_SYMBOL_ADDRESS Returns the absolute address of the resolved symbol in run t
289. on the object section Figure 4 37 VisualDSP 4 0 Linker and Utilities Manual 4 43 www BDTIC com ADI Memory Map Pane TTN fi doj seg_pmeo 0x20c5e 0421884 PC Sample Count 210796 57 68 Figure 4 36 PC Sample Count x gt Input Sections Memory Map seg_ctdm EJ seq_dmda seq_init seg_pmeo seg_pmda seq_tth do_filter 17 86 65410 samples T i k Figure 4 37 Sample Count of Functions Within Object Section Functions are available only when objects are compiled with debug information You can view detailed profile information such as the sample counts for each line in the function Figure 4 38 To view detailed profile informa tion double click on a function 4 44 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Execution Uni xtheputcha printti sd xdecimal_d xdecimal_s Eprint_e f xprint_f_f Histogram xpri t g f zpr t_32 d fir doj do_filter pre_filter maint Total Samples 366165 Figure 4 38 Detailed Profile Information for i D temp 0 i temp coefficients compiler generated c f lcntr 16 dofpe _L 3 wmrt mritr2 rl SSI _ 316001 output k temp for j taps 1 j gt ta state j l state j Elapsed Time 00 To view PC samples as a percentage of total samples view the memory m
290. or NewProject1 21x py Project its Project fy General cet Fis Compile n A z E General 1 Processor Revision utomatic z Eh General 2 Type Library file he fay Preprocessor Processor Name JNewProject2 ss ss s S Lg Warning a soci M Tool Chain fy General Compiler C C Compiler for SHARC 210xx 2114x 213x gt ii aia Assembler JADSP 21xxx Family Assembler a Linker ADSP 2i0aFamiyLinker S S dS a f Load Loader JADSP 21xxx Family Loader sti fy Processor Eh Pre build Splitter JADSP 21 xxx Family Splitter 7 Eh Post build Settings for configuration Debug x cea Figure 2 3 Project Options Dialog Box SHARC Processors Project Options for NewProject1 x Ii Project ay General M Target F fe ee P 3 7 Revision Automatic fy General 1 Processor Revision fh General 2 Type Library file z Eh Preprocessor Eh Processor Name NewProject2 E warning Eh Assemble ese El Link Eh General Compiler Compiler Driver for TigerSHARC tools x fy LDF Preprocessing Fs Elimination Assembler TigerSHARC Family Assembler x Pi oe EERST Linker ADI DSP Linker 7 El Load Loader ELF Loader Driver x Eh Processor Eh Pre build Splitter ADSP TSxxx Family Splitter 7 fs Post build Settings for configuration Debug x cores Figure 2 4 Project Options Dialog Box TigerSHARC Processors 2 8 Visual
291. ory Map ih Mint mem_INT_INT14 OxtcO Ox1 df Mint pedal NETS Ox1e0 Ox ff Vint 3 mem_itab 0x200 0x241 intl 4 mem_code 0x242 Ox7fff intl mem_data2 08000 Oxaelf Vint4 mem_heap Oxaf00 Oxb7ff Vints mem_stack Oxb800 Oxbfff _ Wint mem_datal Ozc000 Ost IVint IVint8 FF 2444493393 Ee Figure 4 55 Memory Map Window With Stack and Heap Sections Use the Global Properties dialog box to select Show stack heap usage Figure 4 56 This option graphically displays the stack heap usage in memory Figure 4 57 VisualDSP 4 0 Linker and Utilities Manual 4 71 www BDTIC com ADI Managing Object Properties Global Properties Ea General l Processor PLIT Elimination Linker map C examples myproject ldf M Show stack heap usage IV Profile execution of object sections Figure 4 56 Global Properties Selecting Stack and Heap Usage The Expert Linker can e Locate stacks and heaps and fill them with a marker value This occurs after loading the program into a processor target The stacks and heaps are located by their output section names which may vary across processor families e Search the heap and stack for the highest memory locations written to by the DSP program This action occurs when the target halts after running the program assume the unused portion of the stack or heap starts
292. ow select an output section into which the selected out put section will overflow select None for no overflow This setting appears in the Placement box Before linking the project the Placement box indicates the output section s address and size as Not available After linking is done the box displays the output section s actual address and size e Initialization allows you to choose the initialization qualifier for an output section The choices are e None No initialization qualifier is specified for this output section e No initialization No data initialization will happen for this output section e Initialize to zero The memory space for this section will be initialized to zero at either load or runtime if invoked with the linker s meminit switch If the meminit switch is not used the memory is initialized at load time when the DXE file is loaded via VisualDSP IDDE or boot loaded by the boot kernel If the memory initializer is invoked the C C run time library CRTL will process embedded information to initialize the memory space during the CRTL initialization process VisualDSP 4 0 Linker and Utilities Manual 4 63 www BDTIC com ADI Managing Object Properties e Initialize at runtime If the linker is invoked with the mem init switch this section will be filled at runtime If the meminit switch is not specified the section is filled at load time e Contiguity
293. pO 1 myArray pO h myArray ro p0 SECTION datal GLOBAL myArray VAR myArray 256 myArray dat Listing E 5 Simple LDF File Based on Assembly Source File Only define L2_START 0xf0000000 define L2_END OxfOO3FfFff Declare specific DSP Architecture here for linker ARCHITECTURE ADSP BF535 LDF macro equals all object files in project command line OBJECTS COMMAND_LINE_OBJECTS Describe the physical system memory below MEMORY E 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blackfin Processors 256KB L2 SRAM memory segment for user code and data L2SRAM MEM_L2SRAM TYPEC RAM STARTC L2_START END L2_END WIDTH 8 PROCESSOR pO OUTPUT COMMAND_LINE_OUTPUT_FILE SECTIONS L2SRAM Align L2 instruction segments on a 2 byte boundaries INPUT_SECTION_ALIGN 2 INPUT_SECTIONS 0BJECTS program LIBRARIES program Align L2 data segments on 1 byte boundary INPUT_SECTION_ALIGN INPUT_SECTIONS OBJECTS datal LIBRARIES datal gt MEM_L2SRAM end section end processor PO MyFile ASM MyFile DOJ L2 SRAM section prograny global mam main Object Section program nam p l myAmay amp Oxf po my Amay 16 pol myAray amp oxi 10 p0 pO myArray gt gt 16 10 p0 po l myAnay amp Oxf p h myAmay gt gt 16 10 p0 myArray 0 Object Se
294. perating system SHARED _MEMORY The linker can produce two types of executable output DXE files and SM files A DXE file runs in a single processor system s address space Shared memory executable sm files reside in the shared memory of a multiprocessor system The SHARED_MEMORY command is used to pro duce SM files For more information see SHARED_MEMORY on page 5 40 VisualDSP 4 0 Linker and Utilities Manual 3 55 www BDTIC com ADI LDF Commands 3 56 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 4 EXPERT LINKER The linker 1 inker exe combines object files into a single executable object module Using the linker you can create a new Linker Description File LDF modify an existing LDF file and produce an executable file files The linker is described in Chapter 2 Linker of this manual The Expert Linker is a graphical tool that simplifies complex tasks such as memory mapping manipulation code and data placement overlay and shared memory creation and C stack heap adjustment This tool comple ments the existing VisualDSP LDF file format by providing a visualization capability enabling new users to take immediate advantage of the powerful LDF format flexibility Graphics in this chapter demonstrate Expert Linker features Some graphics show features not available to all processor families Processor specific features are noted in neighboring text This chap
295. ppear in command scopes is restricted to those scopes MEMORY 1 4 MPMEMORY kK SHARED_M EMOR YK if OUTPUT X Global Scope of SHARED_MEMORY SECTIONSLK LDF H Scope PROCESSOR PO K OUT PUT 3K Scope of PROCESSOR PO MEMORY K SECTIONS lt RESOLVE 4 1 Figure 3 1 LDF Command Scoping Example VisualDSP 4 0 Linker and Utilities Manual 3 17 www BDTIC com ADI LDF Expressions LDF Expressions LDF commands may contain arithmetic expressions that follow the same syntax rules as C C language expressions The linker e Evaluates all expressions as type unsigned long and treats con stants as type unsigned long e Supports all C C language arithmetic operators e Allows definitions and references to symbolic constants in the LDF e Allows reference to global variables in the program being linked e Recognizes labels that conform to these constraints Must start with a letter underscore or point May contain any letters underscores digits and points Are delimited by white space Do not conflict with any keywords Are unique Table 3 1 Valid Items in Expressions Convention Description Current location counter a period character in an address expres sion See Location Counter on page 3 25 Oxnumber Hexadecimal number a 0x prefix number Decimal number a number without a prefix numberk A decimal number multiplied by 1024 or numberKk B number A
296. processor and place program sections using memory definitions for each pro cessor s output file e The LINK_AGAINST commands resolve symbols within multipro cessor memory Listing C 4 LDF for a Multiprocessor System With Shared Memory ARCHITECTURE ADSP TS101 SEARCH_DIR ADI_DSP TS 1ib Allocate multiprocessor memory space with the MPMEMORY command The values represent an addend that the linker uses to resolve undefined symbols in one DXE file to symbols defined in another DXE The addend is added to each defined symbol s value For example PROCESSOR project PSHO contains the undefined C 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for TigerSHARC Processors symbol buffer and PROCESSOR project PSH1 defines buffer at address 0x22000 The linker will fix up the reference to buffer in PSHO s code to address Ox22000 MPMEMORY PSH1 0x22000 0x2400000 0x2422000 MPMEMORY PSHO START 0x2000000 PSH1 START 0x2400000 MEMORY This is used for all processors Alternatively a PROCESSOR can describe its own memory Internal memory blocks are 0x10000 64K bytes MOCode TYPE RA START O0x00000000 ENDCOXOOOOFFFF WIDTH 32 MiData TYPE RA START 0x00080000 END OXOO08BFFF W
297. processors which must be present in user s own LDF files These sections are described in detail below seg_rth This section contains the interrupt vector table by default this is located in the start up file for example 060_hdr doj VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 2 19 Link Target Description seg_init This section contains location and size information about the stack and heap also contains compressed data created by the memory initialization tool see meminit on page 2 62 for more information seg_int_code Code that modifies interrupt latch registers must not be executed from external memory To minimize the impact of this restriction the library functions that modify the latch registers are located in the seg_init_code section which should be located in internal memory seg_pmco This section is the default location for program code seg_pmda This section is the default location for global program data that is quali fied with the pm keyword For example int pm xyz 100 Located in seg_pmda seg_argv This section contains the command line arguments that are used as part of Profile Guided Optimization PGO seg_ctdm This section see also seg_ctdml on page 2 21 contains the addresses of constructors that are called before the start of a C program such as con structors for global and static objects This section must be terminated with th
298. program directive in the assembly source file place the output object into the DXE_L2 output section and map the out put section to the MEM_L2 memory segment The fourth line does the same for the input section data1 and output section 3 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File DXE_L2 mapping them to the memory segment MEM_L2 The two pieces of code follow each other in the program memory segment The INPUT_SECTIONS commands are processed in the same order as object files appear in the 0BJECTS macro You may intersperse INPUT_SECTIONS statements within an output section with other directives including location counter information VisualDSP 4 0 Linker and Utilities Manual 3 15 www BDTIC com ADI LDF Struc ture LDF Structure One way to produce a simple and maintainable LDF file is to parallel the structure of your DSP system Using your system as a model follow these guidelines e Split the file into a set of PROCESSOR commands one for each DSP in your system e Place a MEMORY command in the scope that matches your system and define memory unique to a processor within the scope of the corresponding PROCESSOR command e Ifapplicable place a SHARED_MEMORY command in the LDF file s global scope This command specifies system resources available as shared resources in a multiprocessor environment Declare com
299. r lt options gt library_file object_file Table 6 2 describes each switch Example elfar v c my_lib dlb fft doj sin doj cos doj tan doj This command line runs the archiver as follows v Outputs status information c my_lib d1b Creates a library file named my_lib d1b fft doj sin doj cos doj tan doj Places these object files in the library file Table 6 1 on page 6 3 lists typical file types file names and extensions VisualDSP 4 0 Linker and Utilities Manual 6 11 www BDTIC com ADI Archiver Command Line Reference Symbol Encryption When employing symbol encryption use the following syntax elfar s v library_file in_library_file exclude_file type letter Refer to Archiver Symbol Name Encryption on page 6 15 for more information Archiver Para meters and Switches Table 6 2 describes each archiver part of the command Switches must appear before the name of the archive file Table 6 2 Command Line Options and Entries Item Description lib_file Specifies the library that the archiver modifies This parameter appears after the switch obj_file Identifies one or more object files that the archiver uses when modifying the library This parameter must appear after 7b_file Use the i switch to input a list of object files a Appends one or more object files to the end of the specified library file anv Appends one or more object files and clears vers
300. r appears as A F When an object is selected in the memory map it is highlighted as shown in Figure 4 22 on page 4 30 If you move the mouse pointer over an object in the graphical memory map a yellow tooltip dis plays the information about the object such as name address and size VisualDSP 4 0 Linker and Utilities Manual 4 29 www BDTIC com ADI Memory Map Pane 8000 mer pu 8000 804a mem 804b 8191 mem ao RI G2 Highlighted 3 AT Object B18 K e G i G e seee E E o 32 Figure 4 22 A Highlighted Memory Segment in the Memory Map 4 30 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Specifying Pre and Post Link Memory Map View View the memory map from two perspectives pre link view and post link view Pre link view is typically used to place input sections Post link view is typically used to view where the input sections are placed after linking the project Other information such as the sizes of each section symbols and the contents of each section is available after linking e To enable pre link view from the Memory Map pane right click and choose View and Mapping Strategy Pre Link Figure 4 23 on page 4 31 illustrates a memory map before linking Memory Map RIAIQ f O000000 MEM_PROGRAM f0000000 MEM_PCI_IO FOO2F FAN MEM_HEAP f 0030000 MEM_STACK 0038000 MEM_SYSSTACK f 003e000 o scas MEM_ARGY f003fe00 Ern F
301. r does create a possible problem for users that have written preprocessor macros that rely on identifiers to break when encountering the when processing register names For example character usually seen i tdefine Loadd reg val reg l val reg h val The above example would not work in VisualDSP 4 0 becauseVisu alDSP 4 0 does not provide any replacement since reg is not parsed as a separate identifier The macro has to be rewritten using the operator such as define Loadd reg val reg HF 1 val reg dF h val 1 8 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Introduction The preprocessor supports ANSI C standard preprocessing with extensions but differs from the ANSI C standard preprocessor in several ways For more information on the pp preprocessor see the VisualDSP 4 0 Assembler and Preprocessor Manual The compiler has it own preprocessor that allows you to use pre processor commands within your C C source The compiler preprocessor automatically runs before the compiler For more information see the VisualDSP 4 0 C C Compiler and Library Manual for the appropriate target archtecture VisualDSP 4 0 Linker and Utilities Manual 1 9 www BDTIC com ADI Loading and Splitting Loading and Splitting After debugging the DXE file you process it through a loader or splitter to create output files used by the actual processor The file s may
302. r in the Output window Project Builds The linker runs from an operating system command line issued from the VisualDSP IDDE or a command prompt window Figure 2 2 shows the VisualDSP environment with the Project window and an LDF file open in an Editor window The VisualDSP IDDE provides an intuitive interface for processor pro gramming When you open VisualDSP a work area contains everything needed to build manage and debug a DSP project You can easily create or edit an LDF file which maps code or data to specific memory segments on the target For information about the VisualDSP environment refer to the VisualDSP User s Guide for the appropriate target architecture or online Help Online Help provides powerful search capabilities To obtain information on a code item parameter or error select text in an VisualDSP IDDE Editor window or Output window and press the keyboard s F1 key 2 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker P Analog Dev alDSP Target ADSP 21065L ADSP 2106x Simulator Project dot_product_asm File Edit Session View Project Register Memory Debug Settings Tools Window Help Jose S89 Blo e MACHT EAn uha ak a aale a onanen sooo of SOS amp oE 3824 S Pe Bh ioe Ra Project dot_product_asm dpj BE E dotprod_main c Project group 1 project s D dot_product_asm Source Files B dotprod c dotprod_func asm dotprod_m
303. rch directory switch adds path name to search libraries and objects This switch is case sensitive and spacing is unimportant The path parameter enables searching for any file including the LDF file itself Repeat this switch to add multiple search paths The paths named with this switch are searched before arguments in the SEARCH_DIR command M The M generate make rule only switch directs the linker to check a dependency and to output the result to stdout MM The MM generate make rule and build switch directs the linker to output a rule which is suitable for the make utility describing the dependencies of the source file The linker check for a dependency outputs the result to stdout and performs the build The only difference between MM and M actions is that the linking continues with MM See M for more information Map filename The Map filename generate a memory map switch directs the linker to output a memory map of all symbols The map file name corresponds to the filename argument The linker generates the map file in XML format only For example if the file name argument is test the map file name is test xml The xm1 extension is added where necessary 2 56 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Opening an xm map file in a Web browser provides an organized view of the map file By using hyperlinks it becomes easy to quickly find any rele vant informat
304. records specify bits 16 31 for the data records that follow Table A 2 shows an example of an extended linear address record Table A 2 Example Extended Linear Address Record Field Purpose 020000040000FA Example record Start character 02 Byte count always 02 0000 Address always 0000 04 Record type 0000 Offset address FA Checksum Table A 3 shows the organization of an example data record and Table A 4 shows an end of file record Table A 3 Example Data Record Field Purpose 0402100000FEO3F0F9 Example record Start character 04 Byte count of this record 0210 Address VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Build Files Table A 3 Example Data Record Cont d Field Purpose 00 Record type 00 First data byte FO Last data byte F9 Checksum Table A 4 Example End of File Record Field Purpose 00000001FF End of file record Start character 00 Byte count zero for this record 0000 Address of first byte 01 Record type FF Checksum For more information refer to the VisualDSP 4 0 Loader Manual Splitter Output Files in ASCII Format LDR When the loader is invoked as a splitter its output can be an ASCII for mat file ASCII format files are text representations o
305. reside on another processor host or may be burned into a PROM For more information refer to the VisualDSP 4 0 Loader Manual which provides detailed descriptions of the processes and options used to generate boot loadable LDR loader files for the approprate target pro cessors This manual also describes the splitting utility which when used creates the non bootloadable files that execute from the processor s exter nal memory In general The SHARC ADSP 2106x ADSP 21160 processors use the loader el floader exe to yield a boot loadable image LDR file which resides in memory external to the processor PROM or host proces sor Use the splitter utility e fsp121k exe to generate non bootable PROM image files which execute from the proces sor s external memory often used with the ADSP 21065L processors The SHARC ADSP 2116x 2126x 2136x processors use the loader el floader exe to yield a boot loadable image LDR file which transported to and run from processor memory To make a load able file the loader processes data from a boot kernel file DXE and one or more other executable files DXE The TigerSHARC processors use the loader e1 floader exe to yield a boot loadable image LDR file which transported to and run from processor memory To make a loadable file the loader processes data from a boot kernel file DXE and one or more other executable files DXE VisualDSP 4 0 Linker and U
306. risinisssusis 4 52 Managing Processor Properties renunecnesririrensininiers 4 53 xii VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Managing PLIT Properties for Overlays occiccicicceseneesorsieerrnmees 4 55 Managing Elimination Properti scccincccnenmnionanaaan 4 56 Managing Symbols Properties scesaccsesenstaceniwsiamnsnsenccioaniasnsaneee 4 58 Managing Memory Segment Properties sesrsiiierersasaiimers 4 61 Managing Output Section Properties vu ssisuiscancariaaaserrinniaciucs 4 62 Managing Packine Properties scnewistcnvemciimnnenciaens 4 65 Managing Alignment and Fill Properties 1ccrsccessrssrersiersesnes 4 67 Managing POPES constirercansececraineonstinneiseneanats 4 69 Managing Stack and Heap in Processor Memory 008 4 71 Managing Shared Memory Properties sdcccccsoscassscrssccciensevanianses 4 74 MEMORY OVERLAYS AND ADVANCED LDF COMMANDS CYSTIC tei eacipritiolitiicaeidicai obe 5 2 Memory Management Using Overlays cecsccssieinerieresisns 5 4 Introduction to Memory Overlays soscessecssnneiossrorossie 5 5 eer banat eee 5 7 Breakpoibits on Overlays igo cece seas cccipagecanseetidodanecesionseiey 5 7 Memory Overlay Support siciticicnsianieieesetoisinielesincaadeeninads 5 8 Example Managing Two Overlays scernssiiasininransnkiri 5 13 Linker Generated Constanti 2 ncsinincectisocnnicheiewiemniiaed 5 16 decias Wond See ie S R 5 16 DCE ID eninpnn n S 5 19 Overlay Manager Function Sammary ecicccrcancsesctementeenesecss 5
307. rocessor options page Figure 2 8 shows SHARC processor options page VisualDSP 4 0 Linker and Utilities Manual 2 9 www BDTIC com ADI Linking Environment Project Options for NewProject1 amp Project Link General TA General 1 E Preprocessor Processor 1 Processor 2 Warning E Workarounds fy Assemble a f Link Bem Eh LDF Preprocessing Elimination Processor Options Kernel Ey Splitter fy Pre build i Moaea sr u Figure 2 6 Project Options Link Page 2 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Project Options for NewProject1 2 x E Project Link Processor Allows indirect a E Assemble tg Link Eh General 4 LDF Preprocessing fy Eliminati Figure 2 7 Project Options Link Processor Blackfin Page VisualDSP 4 0 Linker and Utilities Manual 2 11 www BDTIC com ADI Linking Environment Project Options for NewProject1 es Project Link Processor rr E Processor 2 fy Warning Eh Workarounds Ey LDF Preprocessing Eliminati Figure 2 8 Project Options Link Processor SHARC Page VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Figure 2 9 shows TigerSHARC processor options page Project Options for NewProject1 ex Project Link Processor E ig Load fy Processor Figure 2 9 Project Options
308. roperties Shared Memory Elimination Output file name shared sm im Expert Linker MP TS101 ldf Input Sections Memory Map MEM_AR bsz o MoCode bsz_init 10000 data1 80000 data2 30000 Program 100000 110000 180000 180800 400000 1 lt co00000 2000000 2400000 2800000 2c 00000 3000000 3400000 36800000 3c 00000 4000000 6000000 lt 000000 10000000 Figure 4 58 Shared Memory Tab 4 74 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker 2 Right click anywhere on the Memory Map pane Note Do not right click on a memory segment output section input section or overlay 3 Choose Properties The Shared Memory page of the Shared Memory Properties dia log box appears 4 In Output file name specify the name of the output file for the shared memory 5 In Processors sharing this memory select the processors that share the file whose name appears in Output file name Selecting a pro cessor links its executable file against this shared memory file 6 Optionally click the Elimination tab see Managing Elimination Properties on page 4 56 and specify options 7 Click OK VisualDSP 4 0 Linker and Utilities Manual 4 75 www BDTIC com ADI Managing Object Properties 4 76 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 5 MEMORY OVERLAYS AND ADVANCED LDF COMMANDS Th
309. ry Usage and Default Mem ory Sections and Memory Characteristics Overview you can specify the target s memory with the MEMORY command for any of target proces sor architectures Listing 2 1 Listing 2 2 and Listing 2 3 provide code examples for specific processors Listing 2 1 ADSP 21161 MEMORY Command Code MEMORY seg_rth seg_init seg_int_code TY seg_pmco seg_pmda seg_dmda seg_heap seg_stak TYP WIDTH 48 TYP WIDTH 48 D WIDTH 48 TYP WIDTH 48 TYP WIDTH 32 TYP WIDTH 32 TYP WIDTH 32 TYP WIDTH 32 ECPM RA START 0x00040288 END Ox000419F Ff ECPM RA START 0x00042700 END Ox00043f ff E DM RA START 0x00050000 END Ox00051f ff E DM RA START 0x00052000 END Ox00052f ff E DM RA START 0x00053000 END Ox00053f fF ECPM RA START 0x00040000 END Ox000400f Ff ECPM RA START 0x00040100 END Ox000401f fF ECPM RA START 0x00040200 END 0x00040287 Listing 2 2 ADSP TS101 MEMORY Command MEMORY Internal memory blocks are 0x10000 64K bytes Start of TS101_memory ldf MOCode TYPE RAM START 0x00000000 END OxOOOOFFFF WIDTH 32 MlData TYPE RAM START 0x00080000 END OxO008BFFF WIDTH 32 MiStack TYPE RAM START Ox0008C000 END OxOOO8FFFF WIDTH 32 2 38 VisualDSP 4 0 Linker and Utilities M
310. s available to your code via the linker and how to write code that accesses these archives Archive usage consists of two tasks e Writing archive routines functions that can be called from other programs e Accessing archive routines from your code VisualDSP 4 0 Linker and Utilities Manual 6 3 www BDTIC com ADI Archiver Guide Writing Archive Routines Creating Entry Points An archive routine or function in code can be accessed by other pro grams Each routine must have a globally visible start label entry point Code that accesses that routine must declare the entry point s name as an external variable in the calling code To create entry points 1 Declare the start label of each routine as a global symbol with the assembler s GLOBAL directive This defines the entry point The following code fragment has two entry points dIriir and FAE global dIriir section datal byte2 FAE 0x1234 0x4321 section program global FAE dIriir RO N 2 P2 FAE 2 Assemble and archive the code containing the routines Use either of the following methods e Direct VisualDSP to produce a library see Creating a Library From VisualDSP on page 6 3 When building the project the object code containing the entry points is packaged in lt projectname gt DLB You can extract an object file for exam ple to incorporate it in another project e When creating executable or unlinked object files
311. s value for the particular processor The run time library provides a default symbol of ___inits 7 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Initializer for the Memory Initializer and therefore it is not necessary to use this switch in most cases This switch has no effect on callback executable files specified using the Init Initcode dxe on page 7 15 h The h elp switch is used to display the list of Memory Initializer switches lgnoreSection Sec tionname The IgnoreSection Sectionname switch is used to specify a section that is not to be processed by the Memory Initializer This switch can be repeated to specify a number of sections not to be processed in the primary input file All the specified sections must exist in the primary input file The IgnoreSection switch is optional It is normally easier to remove a section s initialization qualifier ZERO_INIT or RUNTIME_INIT from the LDF file than to use this switch The switch does not affect a callback exe cutable file specified using the Init switch Init Initcode dxe The Init Initcode dxe switch is used to specify an executable file to be inserted into the initialization stream and executed as a callback Any number of executable files can be specified this way and it is allowed to specify the same file name a number of times The callback executable file must exist before the Memory Initializer is run All the
312. set of the ASM template The differences are as follows e The CPP template links against C run time libraries C excep tion libraries and the run time headers built to initialize C constructors It maps data sections that contain information con trolling how thrown exceptions are caught e The C template is currently identical to the CPP template since a C project may link against local or system libraries that have been implemented in C there may be differences in a future release e The ASM template does not include a run time header and does not permit command line arguments to applications The ASM template is not suitable for use with the compiler s Profile Guided Optimization Since the ASM template has no run time header it does not mandate a start symbol resolved to the Reset address It does not map the C exception sections into memory 3 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File Each LOF file handles a variety of demands allowing applications to be built in multiple configurations merely by supplying a few command line options This flexibility is achieved by extensive use of preprocessor mac ros within the LDF file Macros serve as flags to indicate one choice or another and as variables within the LDF file to hold the name of a chosen file or other link time parameter This reliance on preprocessor operation can make the LDF file seem an impo
313. shared mem ory SM executable file whose code is used by multiple processors Overlay files another linker output support applications that require more program instructions and data than the processor s internal memory can accommodate Refer to Memory Management Using Overlays on page 5 4 for more information 2 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Similar to object files executable files are partitioned into output sections with unique names Output sections are defined by the Executable and Linking Format ELF file standard to which VisualDSP conforms The executable s input section names and output section names occupy different namespaces Because the namespaces are indepen dent the same section names may be used The linker uses input section names as labels to locate corresponding input sections within object files The executable file s 0XE and auxiliary files SM and OVL are not loaded into the processor or burned onto an EPROM These files are used to debug the system Directing Linker Operation Linker operations are directed by these options and commands e Linker J inker exe command line switches options Refer to Linker Command Line Reference on page 2 47 e Settings options on the Link page of the Project Options dialog box See Project Builds on page 2 6 e LDF commands Refer to LDF Commands on page 3 29 for a detailed des
314. sing sight In simple terms different LDF file configurations are selected by defining preprocessor macros on the linker command line This can be specified from the Link tab of the VisualDSP IDDE s Project Options dialog box or directly from the command line You can use an LDF file written from scratch However modifying an existing LDF or a default LDF file is often the easier alternative when there are no large changes in your system s hardware or soft ware See Listing 3 1 on page 3 6 Listing 3 2 on page 3 9 and Listing 3 3 on page 3 10 as examples of basic LDF files for sup ported processors See Notes on Basic LDF File Examples on page 3 11 for basic information on LDF structure See Appendix C Appendix D and Appendix E for code examples for TigersHARC SHARC and Blackfin processors respectively VisualDSP 4 0 Linker and Utilities Manual 3 5 www BDTIC com ADI LDF File Overview Example 1 Basic LDF File for Blackfin Processors Listing 3 1 is an example of a basic LDF file for ADSP BF535 processors formatted for readability Note the MEMORY and SECTIONS commands and refer to Notes on Basic LDF File Examples Other LDF file exam ples are provided in LDF Programming Examples for Blackfin Processors For more information refer to EE 237 Guide to Blackfin Processor LDF Files Listing 3 1 Example LDF File for ADSP BF535 Processor ARCHITECTURE ADSP BF535
315. sing the PM bus Using the DM bus and PM bus with one dedicated to each memory block assures single cycle execu tion with two data transfers In this case the instruction must be available in the cache 2 32 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Internal Memory The ADSP 21161 processor has 2 MBits of internal memory space 1 Mbit is addressable The 1 Mbit of memory is divided into two 0 5 Mbit blocks Block 0 and Block 1 The additional 1 MBit of the memory space is reserved on the ADSP 21161 processor Table 2 4 shows the maximum number of data or instruction words that can fit in each 0 5 MBit internal memory block Table 2 4 Words Per 0 5 MBit Internal Memory Block Word Type Bits Per Word Maximum Number of Words Per 0 5 Mbit Block Instruction 48 bits 10 67 Kwords Long Word Data 64 bits 8 Kwords Extended Precision Normal Word Data 40 bits 10 67 Kwords Normal Word Data 32 bits 16 Kwords Short Word Data 16 bits 32 Kwords External Memory While the processor s internal memory is divided into blocks the proces sor s external memory spaces are divided into banks The internal memory blocks and the external memory spaces may be addressed by either data address generator External memory banks are fixed sizes that can be con figured for various waitstate and access configurations There are 254 Mwords of external memory space that the processor can ad
316. sion information and exits on page 2 66 warnonce Warns only once for each undefined symbol on page 2 66 xref filename Produces a cross reference file on page 2 66 The following sections provide the detailed descriptions of the linker s command line switches filename This switch uses fi7emname as input to the linker command line The switch circumvents environmental command line length restrictions The filename may not start with linker that is it cannot be a linker com mand line White space including newline in filename serves to separate tokens Dproc essor The Dprocessor define processor switch specifies the target processor architecture for example DADSP 21062 or DADSP TS201 The proc processor switch on page 2 63 is a preferred option to be used as a replacement for the Dprocessor command line entry to specify the target processor VisualDSP 4 0 Linker and Utilities Manual 2 55 www BDTIC com ADI Linker Command Line Reference White space is not permitted between D and processor The architecture entry is case sensitive and must be available in your VisualDSP installa tion This switch must be used if no LDF file is specified on the command line see T on page 2 58 This switch must be used if the specified LDF file does not specify ARCHITECTURE Architectural inconsistency between this switch and the LDF file causes an error Lpath The Lpath sea
317. smdata VAR input 3 Declares data buffer in asmdata SECTION PM asmcode Declares section asmcode RO 0x1234 Three lines of code in asmcode Rl 0x4567 R3 R1 R2 In this example the dm asmdata input section contains the array input and the pm asmcode input section contains the three line of code Blackfin Code Example SECTION Library_Code_Space Section Directive global _abs _abs RO ABS RO Take absolute value of input RTS _abc end In this example the assembler places the global symbol label _abs and the code after the label into the input section Library_Code_Space as it pro cesses this file into object code 1 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Introduction Input Section Directives in C C Source Files Typically C C code does not specify an input section name so the compiler uses a default name By default the input section names program for code and data1 for data are used Additional input section names are defined in LDF files see Specifying the Memory Map on page 2 17 for more information on memory mapping In C C source files you can use the optional section name C lan guage extension to define sections Example 1 While processing the following code the compiler stores the temp variable in the ext_data input section of the D0J file and also stores the code gen erated from funcl in an input sectio
318. t section User defined memory segments Input section MEM_SY SSTACK FOOSfd FE MEM_ARGY f003fe00 A Figure 4 18 Graphical Memory Map Representation 4 26 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker In graphical view the memory map comprises blocks of different colors that represent memory segments output sections objects and so on The memory map is drawn with these rules An output section is represented as a vertical header with a group of objects to the right of it A memory segment s border and text change to red from its nor mal black color to indicate that it is invalid When moving the mouse pointer over the invalid memory segment a tooltip displays a message describing why the segment is invalid The height of the memory segments is not scaled as a percentage of the total memory space However the width of the memory seg ments is scaled as a percentage of the widest memory Object sections are drawn as horizontal blocks stacked on top of each other Before linking the object section sizes are not known and are displayed in equal sizes within the memory segment After linking the height of the objects is scaled as a percentage of the total memory segment size Object section names appear only when there is enough room to display them Addresses are listed in ascending order from top to bottom Three buttons at the top right of the Memory Map pane per
319. t code with labels that direct one or more portions to particular output sections As directed by the LDF file the linker maps each input section in the object code to an output section in the DXE file As directed by the LDF file the linker maps each output section to a memory segment Each input section may contain multiple code items but a code item may appear in one input section only More than one input section may be placed in an output section Each memory segment must have a specified width 2 4 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker e Contiguous addresses on different width hardware must reside in different memory segments e More than one output section may map to a memory segment if the output sections fit completely within the memory segment Linker Desc niption File Overview Whether you are linking C C functions or assembly routines the mech anism is the same After converting the source files into object files the linker uses directives in an LDF file to combine the objects into an execut able DXE file which may be loaded into a simulator for testing Executable file structure conforms to the Executable and Linkable Format ELF standard Each project must include one LDF file that specifies the linking process by defining the target memory and mapping the code and data into that memory You can write your own LDF file or you can modify an existing fi
320. table file can be split into a smaller execut able file and overlays 0VL files which contain code that is called in swapped into internal processor memory as needed The linker linker exe performs this task You can run the linker from a command line or from the VisualDSP Integrated Development and Debugging Environment IDDE You can load the link output into the VisualDSP debugger for simula tion testing and profiling This chapter includes e Linker Operation on page 2 2 e Linking Environment on page 2 6 e Link Target Description on page 2 16 e Linker Command Line Reference on page 2 47 VisualDSP 4 0 Linker and Utilities Manual 2 1 www BDTIC com ADI Linker Operation Linker Operation Figure 2 1 illustrates a basic linking operation The figure shows several object 00J files being linked into a single executable DXE file The Linker Description File LDF directs the linking process i Figure 2 1 Linking Object Files to Produce an Executable File When developing a new project use the Expert Linker to generate the project s LDF file See Chapter 4 Expert Linker for more information In a multiprocessor system a DXE file for each processor is generated For example for a two processor system you must generate two DXE files The processors in a multiprocessor architecture may share memory When directed by statements in the LDF file the linker produce a
321. te space between the switch and its parameter Example linker proc ADSP BF535 p0 doj pl doj p2 doj T target ldf t o program dxe Note the difference between the T and the t switches The command calls the linker as follows proc ADSP BF535 Specifies the processor p0 doj pl doj and p2 doj Links three object files into an executable file T target ldf Uses a secondary LDF file to specify executable program placement Turns on trace information echoing each link object s name to stdout as it is processed 0 program dxe Specifies a name of the linked executable file 2 52 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Typing linker without any switches displays a summary of command line options Using no switches is the same as typing linker help Linker Switch Summary and Descriptions Table 2 9 briefly describes each linker switch Each individual switch is described in detail following this table See Project Builds on page 2 6 for information on the VisualDSP Project Options dialog box Table 2 9 Linker Command Line Switches Summary www BDTIC com ADI Switch Description More Info file Uses the specified file as input on the command line on page 2 55 DprocessorID Specifies the target processor ID The use of on page 2 55 proc processor is recommended L path Adds the path name to search li
322. ted routines which do not contain input data objects A typical LDF declaration for that purpose is In the SECTIONS command for Processor PO Plit code is to reside and run in mem_program segment plit gt mem_program This segment allocation does not take any parameters You write the struc ture of this command according to the PLIT syntax The linker creates an instance of the command for each symbol that resolves to an overlay The linker stores each instance in the plit output section which becomes part of the program code s memory segment A PLIT command may appear in the global LDF scope within a PROCESSOR command or within a SECTIONS command The following are examples of PLIT command implementation 5 38 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memory Overlays and Advanced LDF Commands Simple PLIT States are not Saved A simple PLIT merely copies the symbol s address and overlay ID into registers and jumps to the overlay manager The following fragment is extracted from the global scope just after the MEMORY command of sample fft_group 1df Verify that the contents of AX0 and AX1 are either safe or irrelevant The following is an example of PLIT command implementation for TigerSHARC processors The global PLIT to be used whenever a PROCESSOR or OVERLAY specific PLIT description is not provided The plit initializes a register to the overlay ID an
323. ter code for example 111010 and pressing the F1 key Some build errors such as a reference to an undefined symbol do not cor relate directly to source files These errors often stem from omissions in the LDF file For example if an input section from the object file is not placed by the LDF file a cross reference error occurs at every object that refers to labels in the missing section Fix this problem by reviewing the LDF file and specifying all sections that need placement For more information refer to the VisualDSP 4 0 User s Manual or online Help VisualDSP 4 0 Linker and Utilities Manual 2 15 www BDTIC com ADI Link Target Description Link Target Desc nption Before defining the system s memory and program placement with linker commands analyze the target system to ensure you can describe the target in terms the linker can process Then produce an LOF file for your project to specify these system attributes e Physical memory map e Program placement within the system s memory map If the project does not include an LOF file the linker uses a default LDF file for the processor that matches the proc lt processor gt switch on the linker s command line or the Processor selection specified on the Project page of the Project Options dialog box in the VisualDSP IDDE Be sure to understand the processor s memory architecture which is described in the appropriate processor s hardware referenc
324. ter contains e Expert Linker Overview on page 4 2 e Launching the Create LDF Wizard on page 4 4 e Expert Linker Window Overview on page 4 10 e Input Sections Pane on page 4 12 e Memory Map Pane on page 4 19 e Managing Object Properties on page 4 51 VisualDSP 4 0 Linker and Utilities Manual 4 1 www BDTIC com ADI Expert Linker Overview Expert Linker Overview Expert Linker is a graphical tool that allows you to e Define a target processors memory map e Place a project s object sections into that memory map e View how much of the stack or heap has been used after running the DSP program Expert Linker takes available project information in an LDF file as input object files LDF macros libraries and target memory description and graphically displays it You can then use drag and drop action to arrange the object files in a graphical memory mapping representation When you are satisfied with the memory layout you can generate the executable DXE file via VisualDSP project options Use default LDF files that come with VisualDSP or use the Expert Linker interactive wizard to create new LDF files When opening Expert Linker in a project that has an existing LDF file Expert Linker parses the LDF file and graphically displays the target s memory map and the object mappings The memory map displays in the Expert Linker window Figure 4 1 Use this display to modify the memory
325. tes product overviews and product announcements You may also obtain additional information about Analog Devices and its products in any of the following ways e E mail questions or requests for information to dsp support analog com e Fax questions or requests for information to 1 781 461 3010 North America 089 76 903 557 Europe e Access the FTP Web site at ftp ftp analog comor ftp 137 71 23 21 ftp ftp analog com VisualDSP 4 0 Linker and Utilities Manual XXV www BDTIC com ADI Product Information Related Documents For information on product related development software see these publications VisualDSP 4 0 Getting Started Guide VisualDSP 4 0 User s Guide VisualDSP 4 0 C C Compiler and Library Manual for SHARC Processors VisualDSP 4 0 C C Compiler and Library Manual for TigerSHARC Processors VisualDSP 4 0 C C Compiler and Library Manual for Blackfin Processors VisualDSP 4 0 Assembler and Preprocessor Manual VisualDSP 4 0 Linker and Utilities Manual VisualDSP 4 0 Product Release Bulletin VisualDSP Kernel VDK User s Guide Quick Installation Reference Card For hardware information refer to your processors s hardware reference programming reference or data sheet All documentation is available online Most documentation is available in printed form Visit the Technical Library Web site to access all processor and tools man uals and data sheets http www analog
326. the current working directory If you use a default LDF file by omitting LDF information in the command line and instead specifying proc lt processor gt the linker searches in the proces sor specific LDF directory for example ADI_DSP 21161 ldf For more information on file searches see Built In LDF Macros on page 3 27 When providing input or output file names as command line parameters Use a space to delimit file names in a list of input files Enclose file names that contain spaces within straight quotes for example long file name Include the appropriate extension to each file The linker opens existing files and verifies their type before processing When the linker creates a file it uses the file extension to determine the type of file to create 2 50 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Object File Types The linker handles an object file by its file type File type is determined by the following rules e Existing files are opened and examined to determine their type Their names can be anything e Files created during the link are named with an appropriate exten sion and are formatted accordingly A map file is generated in XML format only and is given an XML extension An executable is writ ten in the ELF format and is given a DXE extension The linker treats object 00J and library DLB files that appear on the command line as object
327. tilities Manual www BDTIC com ADI Introduction e Both TigerSHARC and SHARC processors use the splitter utility elfsp121k exe to generate non bootable PROM image files which execute from the processor s external memory e The Blackfin processors use the loader el floader exe to yield a boot loadable image LDR file which resides in memory external to the processor PROM or host processor To make a loadable file the loader processes data from a boot kernel file DXE and one or more other executable files DXE Figure 1 3 shows a simple application of the loader In this example the loader s input is a single executable DXE file The loader can accommo date up to two DXE files as input plus one boot kernel file DXE Executables DXE SM OVL Debugger Sim ulator ICE or EZ KIT Lite Boot Image LDR Boot Kemel DXB Figure 1 3 Loading Diagram VisualDSP 4 0 Linker and Utilities Manual 1 11 www BDTIC com ADI Loading and Splitting For example when a TigerSHARC processor is reset the boot kernel por tion of the image is transferred to the processor s core Then the instruction and data portion of the image are loaded into the processor s internal RAM as shown in Figure 1 4 by the boot kernel EPROM Bo ot Kermel Processor Instructions and Data Figure 1 4 Booting from a Bootloadable LDR File VisualDSP includes boot kernel files DXE which are automaticall
328. tilities Manual XV www BDTIC com ADI Memory Initializer Command Line Switches jerisestsniccteconecnescacerers 7 13 eo IMINO oeunecniunie nanan 7 14 PER E A cst ease used nenaesi irtatat 7 15 Ignar ecran SOC OMMAIG aieu a na aes 7 15 Anit nieodedie josncncciineuteneniienedpimin a 7 15 LRRD onien ES 7 16 NORU a r Ar 7 16 NOE NGG arenan a rE ESES 7 16 sa TIS aea a e AREAN RT 7 17 SCCO SECON ATE aooaaeoa ia an AEE 7 17 SectDestipation SectionnamMe sscinesinnincnkannnii inodh 7 17 E E 7 18 FILE FORMATS Souros Piles sasorereuoia etia R A 2 C et Sourd File onsa N A 2 Assembly Source Files AGM rences A 3 Assembly Initislization Data Files GDA ririri A 3 Feider Piles cade cate ieiataiensedinndecoameenadeedmmaesne A 4 Linker Description Files CLDF cacioccaccciseascacdaccarienstnapeccavaateauas A 4 Linker Command Line Files TXT ernsiiniknainskskbinnnis A 5 Pun TUSE renerion N AS A 5 Assembler Object Files DO ornnrisnsnreinnrenren A 5 Libras Files CDLI cose eteaneee A 5 Linker Output Files LXE SM and OVL snosssirsssomirisesns A 6 xvi VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Memor Map Fies LAML corsie A 6 Loader Output Files in Intel Hex 32 Format LDR oseese A 6 Splitter Output Files in ASCII Format LDR acrins A 8 Peerage Fier sraa r A 9 Format Relerenttt reristuorurirninbntenniriubmiin i aie A 10 UTILITIES didwnp ELF File Dumper as isang seadercasssecensen nig NiS B 1 Disassembling a Libtary Memb
329. tion compiler switch VisualDSP 4 0 Linker and Utilities Manual 2 29 www BDTIC com ADI Link Target Description Other Memory Sections The compiler and libraries also use other data sections that are linked into one of the above memory sections These data sections include ctorl This section contains the terminator for the ctor table section It must be mapped immediately after the ctor section gdt gdel frt frtl cht chtl edt edtl These data sections are used to hold data used during the handling of exceptions See Special Table Memory Sections on page 2 30 Special Table Memory Sections The following table data sections are used to hold data used during the handling of exceptions The linker is generally mapping these sections into read only memory gdt This section Global Dispatch Table is used by the C Exception Library to determine which area of code to which a particular address belongs This section must be contiguous in memory gdtl This section contains the terminator for the gdt table section It must be mapped immediately after the gdt section edt This section Exception Dispatch Table is used by the C Exception Library to map from try blocks to catch blocks 2 30 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker edtl This section contains the terminator for the edt table section It must be mapped immediately after th
330. tion Properties Alignment Tab VisualDSP 4 0 Linker and Utilities Manual 4 67 www BDTIC com ADI Managing Object Properties If you select No Alignment the output section is not be aligned on an address If you choose Align each input section to the next address that is a multi ple of select an integer value from the drop down list to specify the output section alignment When the output section is aligned on an address a gap is filled by the linker Based on the processor architecture Expert Linker determines the opcode for the NOP instruction The Fill value is either 0 default a NOP instruction or a user specified value a hexadecimal value entered in the entry box 4 68 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker Managing Overlay Properties Use the Overlay tab to add choose the output file for the overlay its live memory and its linking algorithm To specify overlay properties 1 Right click an overlay object in the Memory Map pane 2 Choose Properties and click the Overlay tab Figure 4 54 Overlay Properties zix Overlay Packing Output file name Joverlayt ovl Live Memory Overlay linking mem_code z ALL FIT Placement Live ddress Not available Size in Not available Run Address Not available Figure 4 54 Overlay Properties Dialog Box Overlay Tab Use the Output file name box to specify the name of the overlay
331. tion placement the link fails The ip switch allows the linker to extract a block of data for individual placement and fill in fragmented memory spaces The assembler s noip option turns off individual placement jcs2l Used with Blackfin processors only The jcs21 switch directs the linker to convert out of range short calls and jumps to the longer or indirect form Refer to the Branch expansion instruction option on the Link tab Any jump call is subject to expansion to indirect if the linker is invoked with the jcs21 switch default for C programs The following table shows how the Blackfin linker handles jump call conversions Instruction Without jcs21 With jcs21 JUMP S short short JUMP short or long short or long JUMP L long long JUMP X short or long short long or indirect CALL CALL CALL CALL X CALL CALL or indirect VisualDSP 4 0 Linker and Utilities Manual 2 61 www BDTIC com ADI Linker Command Line Reference Refer to the instruction set reference for target architecture for more infor mation on jump and call instructions jcs2l Used with Blackfin processors only This is a deprecated switch equivalent to the jcs21 switch The jcs21 switch enables the jcs21 switch and allows the linker to convert out of range branches 0x800000 to 0x7FFFFF to indirect calls jumps sequences using the P1 register This is used for example when a call from a function
332. tions with a check box next to each section Elimination applies to the sections that are selected By default all input sections are selected The Symbols to keep box displays a list of symbols to be retained see Managing Symbols Properties on page 4 58 for more information VisualDSP 4 0 Linker and Utilities Manual 4 57 www BDTIC com ADI Managing Object Properties Managing Symbols Properties You can view the list of symbols resolved by the linker You can also add and remove symbols from the list of symbols kept by the linker The sym bols can be resolved to an absolute address or to a program DXE file It is assumed that the elimination of unused code is enabled To add or remove a symbol 1 Right click in the Input Sections pane 2 Choose Properties The Global Properties dialog box appears 3 Click the Elimination tab to add or remove a symbol Figure 4 47 Global Properties fx General Processor PLIT Elimination I Enable elimination of unused objects a Verbose linker output of elininated objects Sections to apply elimination I int1 0 I int11 I int12 I int13 K K K K Symbols to keep _main __ctor_NULL_marker Cancel Figure 4 47 Elimination Page of the Global Properties Dialog Box 4 58 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Expert Linker 4 Right click in the Symbols to keep box Usin
333. to different memory seg ments For example SECTION datal VAR bufl VAR buf2 EXTERN buf3 SEPARATE_MEM_SEGMENTS bufl buf2 SEPARATE_MEM_SEGMENTS bufl buf3 e The set of available memory segments for each buffer is defined by using the linker s one to many feature mapping the input sec tion s that contain the buffer into multiple memory segments For example data2 INPUT_SECTIONS OBJECTS datal gt M2DataA data4 INPUT_SECTIONS OBJECTS datal gt M4DataA e Linker tries to satisfy placement constraint requirements by allocat ing the buffers to different memory segments a If the linker fails to satisfy some or all of the requirements the linker produces a warning b All symbols mentioned in SEPARATE_MEM_SEGMENTS are mapped before anything else by the linker with the excep tion of absolute placement 2 44 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker c Reference to symbol in SEPARATE_MEM_SEGMENTS is a weak reference If such symbol is defined in a library linker does NOT bring the symbol from the library unless the symbol is referenced directly or indirectly from an object file d The linker ignores the cases where the symbol is mentioned in SEPARATE_MEM_SEGMENTS assembler directive is unde fined or is not defined in an input section for example as an LDF symbol See Pragmas in Chapter 1 of the VisualDSP 4 0 C C Co
334. to the user 6 6 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Archiver An archive without version information will not have the __version doj entry The only operations on the archive using el far that add version information are those that use the t switch That is an archive without version information does not pick up version information unless specifi cally requested If an archive contains version information __version doj is present all operations on the archive preserve that version information except opera tions that explicitly request version information to be stripped from the archive see Removing Version Information From an Archive on page 6 9 If an archive contains version information that information can be printed with the p command elfar p lib dlb User Archive Version Info Steve s sandbox Rev 1 a doj b doj To highlight the version information precede it with User Defined Version Information You can provide any number of user defined version values by supplying a text with those values The text file can have any number of entries Each line in the file begins with a name a single token for example non embedded white space followed by a space and then the value asso ciated with that name As an example consider the file foo txt my_name neo my_location zion CVS_TAG matrix_v_8_0 other version value can be many words name is only one This fi
335. tput file may reside on another processor host or may be burned into a PROM The VisualDSP 4 0 Loader Manual describes loader splitter functional ity for the target processors The processor software development flow can be split into three phases 1 Compiling and Assembling Input source files C c C CPP and assembly ASM yield object files D0J 2 Linking Under the direction of the Linker Description File LDF a linker command line and VisualDSP Project Options dialog box settings the linker utility consumes object files 00J to yield an executable DXE file If specified shared memory SM and overlay 0VL files are also produced 3 Loading or Splitting The executable DXE file as well as shared memory SM and overlay 0VL files are processed to yield output file s For TigerSHARC and Blackfin processors these are boot loadable LDR files or non bootable PROM image files which execute from the processor s external memory 1 2 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Introduction Compiling and Assembling The process starts with source files written in C C or assembly The compiler or a code developer who writes assembly code organizes each distinct sequence of instructions or data into named sections which become the main components acted upon by the linker Inputs C C and Assembly Sources The first step towards producing an ex
336. tracts the required routines and links the routines into the executable file VisualDSP 4 0 Linker and Utilities Manual 6 5 www BDTIC com ADI Archiver Guide Archiver File Searches File searches are important in the archiver s process The archiver supports relative and absolute directory names default directories and user speci fied directories for file search paths File searches include e Specified path If relative or absolute path information is included in a file name the archiver searches only in that location for the file e Default directory If the path information is not included in the file name the archiver searches for the file in the current working directory Tagging an Archive With Version Information The archiver supports embedding version information into a library built with el far Basic Version Information You can tag an archive with a version The easiest way to tag an archive is with the t switch see Table 6 2 on page 6 12 which takes an argu ment the version number For example elfar t 1 2 3 lib dlb The t switch can be used in addition to any other el far switch For example a version can be assigned at the same time that a library is created elfar c t Steve s sandbox Rev 1 lib dlb doj To hold version information the archiver creates an object file __version doj that has version information in the strtab section This file is not made visible
337. ts in SHARC Processors Use the PACKING command when e Data and instructions for overlays are executed from external mem ory by definition those overlays live in external memory e The width or byte order of stored data differs from its run time organization The linker word aligns the packing instruction as needed Table 3 6 indicates packing format combinations for SHARC DMA over lays available under each of the two operations 3 42 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File Table 3 7 indicates packing format combinations for ADSP 21161N overlays available for storage in 8 bit wide memory 8 bit packing is avail able on ADSP 2106x and ADSP 21160 processors during EPROM booting only Table 3 6 Packing Formats for SHARC DMA Overlays Execution Storage Memory type Memory type Packing Instruction 32 bit PM 16 bit DM PACKING 6 BO BO B1 B2 B5 BO BO B3 B4 B6 32 bit DM 16 bit DM PACKING 4 BO BO B1 B2 BO BO B3 B4 B5 48 bit PM 16 bit DM PACKING 6 BO BO B1 B2 BO BO BO B3 B4 BO BO BO B5 B6 BO 48 bit DM 32 bit DM PACKING 12 B1 B2 B3 B4 BO BB5 B6 B11 B12 BO B7 B8 B9 B10 BO Table 3 7 Additional Packing Formats for DMA Overlays Execution Storage Memory type Memory type Packing Instruction wo 48 bit PM 8 bit DM PACKING 6 BO BO BO B1 BO BO BO B2 BO BO BO B3 BO BO BO BO B4 BO BO BO BO B5 BO BO BO BO B6 BO BO BO BO BO BO BO BO
338. ually similar to preproces sor macro support defines also available in the LOF file string macros are independent In this example 0BJECTS expands to a comma delimited list of the input files to be linked Note In this example and in the default LDF files that accompany VisualDSP OBJECTS in the SECTIONS command specifies the object files to be searched for specific input sections As another example ADI_DSP expands to the VisualDSP home directory COMMAND_LINE_OBJECTS on page 3 27 is an LDF command line macro which expands at the linker command line into the list of input files Each linker invocation from the VisualDSP IDDE has a command line equivalent In the VisualDSP IDDE COMMAND_LINE_OBJECTS represents the D0J file of every source file in the VisualDSP Project window Note The order in which the linker processes object files which affects the order in which addresses in memory segments are assigned to input sections and symbols is determined by the listed order in the SECTIONS command As noted above this order is typically the order listed in 0BJECTS COMMAND_LINE_OBJECTS The VisualDSP IDDE generates a linker command line that lists objects in alphabetical order This order carries through to the OBJECTS macro You may customize the LDF file to link objects in any desired order Instead of using default macros such as OBJECTS each INPUT_SECTION command can have one or more explicit obj
339. udes search directory for preprocessor include on page 2 60 files ip Fills fragmented memory with individual data on page 2 60 objects that fit Note Not used with Blackfin processors jcs21 Converts out of range short calls and jumps to the on page 2 61 longer form Note Blackfin processors only jcs21 Enables jcs21 and allows the linker to convert on page 2 62 out of range branches to indirect calls and jumps sequences Note Blackfin processors only keep symName Keeps symbols from being eliminated on page 2 62 meminit Causes post processing of the executable file on page 2 62 nonmemcheck Turns off LDF memory checking on page 2 62 o filename Outputs the named executable file on page 2 63 od filename Specifies the output directory on page 2 63 pp Stops after preprocessing on page 2 63 proc processor Selects a target processor on page 2 63 Ss Strips symbol information from the output file on page 2 64 2 54 www BDTIC com ADI VisualDSP 4 0 Linker and Utilities Manual Linker Table 2 9 Linker Command Line Switches Summary Contd Switch Description More Info save temps Saves temporary output files on page 2 64 si revision version Specifies silicon revision of the specified processor on page 2 64 Sp Skips preprocessing on page 2 65 t Outputs the names of link objects on page 2 65 v Verbose Outputs status information on page 2 65 verbose version Outputs ver
340. uires data packing to store an overlay containing instructions The Blackfin processor architecture supports byte addressing that uses 16 bit 32 bit or 64 bit opcodes Thus no data packing is required The SHARC processor architecture supports 48 bit instruction words The overlay live word size number of words in the over lay is based on the number of 32 bit words required to pack all of the 48 bit instructions Redirection In addition to providing constants the linker replaces over lay symbol references to the overlay manager within your code Redirection is accomplished by means of a procedure linkage table PLIT A PLIT is essentially a jump table that executes user defined code and then jumps to the overlay manager The linker replaces an overlay symbol reference function call with a jump to a location in the PLIT You must define PLIT code within the LDF file This code prepares the overlay manager to handle the overlay that contains the referenced sym bol The code initializes registers to contain the overlay ID and the referenced symbol s run time address The linker reserves one word or two bytes in Blackfin processors at the top of an overlay to house the overlay ID The following is an example call instruction to an overlay function J4 j0 2153 jo j4 j6 CALL FUNC_A Call to function in overlay j3 t J3 j5 5 10 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI
341. unction call symbol reference is a load or an execute request VisualDSP 4 0 Linker and Utilities Manual 5 21 www BDTIC com ADI Memory Management Using Overlays The overlay manager first determines whether the referenced symbol is in internal memory If not it sets up the DMA transfer If the symbol is not in internal memory and the flag is set for execution the core waits for the transfer to complete if necessary and then executes the overlay function If the symbol is set for load the core returns to the instructions immedi ately following the location of the function load reference Every overlay function call requires initializing the load execute flag buffer Here the function calls are delayed branch calls The two slots in the delayed branch contain instructions to initialize the flag buffer Regis ter j4 is set to the value placed in the flag buffer and the value in j4 is stored in memory 1 indicates a load and 0 indicates an execution call At each overlay function call the load buffer must be updated The following code is from the main FFT subroutine Each of the four function calls are execution calls so the pre fetch load buffer is set to zero The flag buffer in memory is read by the overlay manager to deter mine whether the function call is a load or an execute call fft_first_2_stages j O38 j31 prefetch J4 call fft_middle_stages j4 0 j31 prefetch j4 cal
342. ures 3 25 LOF Macros iorsonarenigi nka ae 3 26 Bilen LOP Gee ciseonn an eae 3 27 Vaer Declared Macro ceric scatednreieeeree nme 3 28 LDF Macros and Command Line Interaction i ccccisisasscriessss 3 28 LDF Commande suinoserasyiinten t a ia RAN ANN AANI 3 29 AA a ENA N A E E E E AE A 3 30 ARCHITECTURE norena 3 30 ELIN ATE ornano 3 31 ELIMINATE SPECTIOND sererannr N 3 32 THC EUDE K urspciaar a ASS 3 32 INPUT _SECTION_ ALIGN scccctcesnnctncaiearnousesanrdecnaumeaaseeyn 3 32 REEF en AE LOY Ere SUnTE TREE ITE 3 33 EPP SEC TIONS O cebicisnusisitnbisabaunualeienaisiieiahiniinaalias 3 34 UNE AGAINST o a N 3 34 x VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI CONTENTS WS nersoninsetccsenteptaeereneeeionienreeeeoeernees 3 35 MEO I a NANNA 3 35 Semment TAC IONE sennen 3 37 MPMEMORT I reran AE 3 38 OVERLAY GROUPI schetsatnuicndieaasnbrnleauiniaaulaeele 3 39 PAC RING oregona aan 3 39 Packing m SHARC Procesiors osrin n 3 41 Overlay Packing Formats in SHARC Processors 3 42 External Execution Packing in SHARC Processors 3 43 PEL P eonen ai AA A 3 45 PROCESSORI eitibte osninsidiees ana 3 45 RESOLVED soriire e 3 47 SEARCH DIRU ssrneesiemocer oin ennn einer 3 47 SEC TRSNE aa enema 3 48 INPUT SECTIONS eor 3 51 I A oouiaes 3 92 PIU ee HBO aruncarea aa 3 52 PLU Fate Comes sioikeinic annssneizniiociainieeeiolusiiniecadsaueieans 3 52 OVERLAY INPUT overlay commands soserissieresnan 3 53 SHARED MEMORY P crisan a
343. usioninun einnsean enih Xxil Supported Pape Sapte ain en ccwis sauilotc ninssnaiosajeladadenniiyilibiealaaases xxiii Pode Ior omata aeeai xxiv Manalo cton cictntinmninandennaeneneusn xxiv Processor Product Information iaisscsstsicatsamesvsrianciciesivantanwaneats XXV Related Docu Ments soa rr esersseerrridecarenescancraianehnentsannenanse xxvi Online Technical Documentation esecsssssseesssssssessresessssssssssse xxvii Accessing Documentation From VisualDSP eses xxvii Accessing Documentation From Windows eeseseesecee xxviii Accessing Documentation From the Web niscccrcecscoror xxviii Printed TAGS arirarisnaresreporni e ainia ES xxix VisualDSP Documentation Set isiisivccsiscinsiciovessscsvanvavss XX X Hardware Tools Manuals gcgoiccssiaencantvndurcusenturshannsucenovedadeniens xxix Procesor Fe a cette dicks chincs nadeiaasebepad e xxix VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI ill CONTENTS DA CHRO d nantes xxix Norton nents nian A XXX INTRODUCTION Software Development Plow rcscsirsnirorenneiennr een 1 2 Compiling aid Assembling soseen r E 1 3 Inputs C C and Assembly Sources srrssusserecsrcinsssenes 1 3 Input Section Directives in Assembly Code isiccccisscncenssaceceasccouas 1 4 Input Section Directives in C C Source Files ceeeeeeeeeees 1 5 LIENS E aes 1 7 Linker and Assembler Preprocessor cicccerstececetsarcieseoecaenicrcsnsays 1 8 Loading anod SpE aioe ene 1 10 LINKER E E a a ee A O
344. ut file on page 7 17 Section Sectionname Specifies a section from which the data will be extracted on page 7 17 by the Memory Initializer This switch can be repeated to specify a number of the sections from the specified input primary file SectDestination Sectionname Specifies a destination section other than meminit to on page 7 17 hold the initialization stream V Verbose Outputs status information as the MemInit on page 7 18 utility processes files The following sections provide the detailed descriptions of the com mand line switches Beginlinit Initsymbol The BeginInit Initsymbol switch is used to specify a symbol name for a variable that holds a pointer pointing to the start address of an initializa tion stream The Memory Initializer updates this pointer with the start address of the initialization stream produced by the Memory Initializer If this switch is absent the default symbol name ___inits it has three leading underscores when called from assembly is searched which by default is in the bsz_init memory section An error message is issued if this symbol cannot be found in the input primary file If a symbol other than ___inits is specified using this switch in a section other than bsz_init the symbol must not be in any of the sections specified via the Section Sectionname switch on page 7 17 It also must be able to hold a value which is no less than the maximum addres
345. ww BDTIC com ADI Invalid Memory Segment Notification Expert Linker When a memory segment is invalid for example when a memory range overlaps another memory segment or if the memory width is invalid the tree shows an Invalid Memory Segment icon see Figure 4 15 Move the mouse pointer over the icon and a tooltip displays a message describing why the segment is invalid Invalid Memory Segment Input Sections J Minig EJ IVint11 Ivint12 Ivint13 intl 4 Ivinti5 Ivint4 Ivint5 IvintG Vint Ivint8 F H lH Memory Map Segmepf Section Start ddress_ End Address H EFTE j it F E E g mem_INT_PWR mem_INT_KERN mem_INT_ASTI mem_INT_STKI mem_INT_INT4 mem_INT_INT5 mem_INT_INT6 mem_INT_INT mem INT INTS 0x0 0x20 0x40 0x60 0x80 Oxal OxcO OxeD ninn Figure 4 15 Memory Map With Invalid Memory Segments VisualDSP 4 0 Linker and Utilities Manual 4 21 www BDTIC com ADI Memory Map Pane Context Menu Display the context menu by right clicking in the Memory Map pane The menu Figure 4 16 allows you to select and perform major func tions The available right click menu commands are listed below Input Sections Memory Map
346. y segment receiving the output section being aligned The linker fills empty spaces created by INPUT_SECTION_ALIGN com mands with zeros by default or with the value specified with the preceding FILL command valid for the current scope See FILL under SECTIONS on page 3 48 3 32 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Linker Desc ription File The INPUT_SECTION_ALIGN command is valid only within the scope of an output section For more information see Command Scoping on page 3 17 For more information on output sections see the syntax description for SECTIONS on page 3 48 Example In the following Blackfin example input sections from a doj b doj and c doj are aligned on even addresses Input sections from d doj and e doj are not quad word aligned because INPUT_SECTION_ALIGN 1 indicates subsequent sections are not subject to input section alignment SECTIONS program INPUT_SECTION_ALIGN 2 PUT_SECTIONS a doj program PUT_SECTIONS b doj program PUT_SECTIONS c doj program end of alignment directive for input sections PUT_SECTION_ALIGN 1 The following sections will not be aligned PUT_SECTIONS d doj datal PUT_SECTIONS e doj datal Vv m PROGRAM KEEP The linker uses the KEEP keepList command when section elimination is enabled retaining the listed objects in the executable file even when they
347. y used when you run the loader You can also customize boot kernel source files included with VisualDSP by modifying and rebuilding them Figure 1 5 shows how multiple input files in this case two executable DXE files a shared memory SM file and overlay 0VL files are consumed by the loader to create a single image file LDR This example illustrate the generation of a loader file for a multiprocessor architecture The SMand OVL files must reside in the same directory that con tains the input DXE file s or in the current working directory If your system does not use shared memory or overlays SM and 0VL files are not required This example has two executable files that share memory Overlays are also included The resulting output is a compilation of all the inputs 1 12 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI Introduction Figure 1 5 Input Files for a Multiprocessor System VisualDSP 4 0 Linker and Utilities Manual 1 13 www BDTIC com ADI Loading and Splitting 1 14 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI 2 LUNKER Linking assigns code and data to processor memory For a simple single processor architecture a single DXE file is generated A single invocation of the linker may create multiple executable DXE files for multiprocessor MP architectures Linking can also produce a shared memory SM file for an MP system A large execu
348. y all at once ALGORITHM ALL_FIT allows the linker to break the code into several overlays as necessary in the event that not all of the code fits ALGORITHM ALL_FIT SIZE 0x100 gt MEM_OVLY This is the second overlay Note that these QVERLAY_INPUT commands must be contiguous in the LDF to occupy the same run time memory OVERLAY_INPUT OVERLAY_OUTPUT overlay2 ovl INPUT_SECTIONS overlay2 doj program ALGORITHM ALL_FIT SIZE 0x100 gt MEM_OVLY gt program The instructions generated by the linker in the plit section must be placed in non overlay memory Here is the sole specification telling the linker where to place these instructions plit linker insert instructions here gt MEM_PROGRAM DATA INPUT_SECTIONS OBJECTS datal LIBRARIES datal INPUT_SECTION_ALIGN 1 INPUT_SECTIONS OBJECTS constdata LIBRARIES constdata INPUT_SECTION_ALIGN 1 IN PUT_SECTIONS OBJECTS ctor LIBRARIES ctor E 20 VisualDSP 4 0 Linker and Utilities Manual www BDTIC com ADI LDF Programming Examples for Blackfin Processors gt MEM_PROGRAM stack INPUT_SECTIONS OBJECTS stack gt MEM_STACK heap Allocate a heap for the application ldf_heap_space ldf_heap_end ldf_heap_space MEMORY_SIZEOF HEAP 1 ldf_heap_length ldf_heap_end ldf_heap_space gt MEM_HEAP VisualDSP 4 0 Linker and Utilities Manual E 21 www
349. y and the run time address of the referenced symbol An overlay manager s main objective is to transfer overlays to a run time location when required Overlay managers may also e Set up a stack to store register values e Check whether a referenced symbol has already been transferred into its run time space as a result of a previous reference If the overlay is already in internal memory the overlay transfer is bypassed and execution of the overlay routine begins immediately e Load an overlay while executing a function from a second overlay or a non overlay function You may require an overlay manager to perform other specialized tasks to satisfy the special needs of a given application Overlay managers for Blackfin processors must be developed by the user Refer to EE 66 EE 180 and EE 230 for SHARC processors for example overlay managers Breakpoints on Overlays The debugger relies on the presence of the __ov_start and__ov_end sym bols to support breakpoints on overlays The symbol manager sets a silent breakpoint at each symbol VisualDSP 4 0 Linker and Utilities Manual 5 7 www BDTIC com ADI Memory Management Using Overlays The more important of the two symbols is the breakpoint at _ov_end Code execution in the overlay manager should pass through this location once an overlay has been fully swapped in At this point the debugger may probe the target to determine which overlays are in context The sym bol m
350. y file or DXE file This command is available only after you link or build the project and then right click on an object or output section e View Global Properties Displays the Global Properties dialog box which provides the map file name of the map file generated after linking the project as well as access to various processor and setup information see Figure 4 43 on page 4 52 Mapping an Input Section to an Output Section Using the Expert Linker you can map an input section to an output sec tion By using Windows drag and drop action click on the input section drag the mouse pointer to an output section and then release the mouse button to drop the input section onto the output section All objects such as LDF macros or object files under that input section are mapped to the output section Once an input section has been mapped the icon next to the input section changes to denote that it is mapped If an input section is dragged onto a memory segment with no output sec tion in it an output section with a default name is automatically created and displayed A red x on an icon indicates the object file is not mapped Once an input section has been completely mapped that is all object files that contain the section are mapped the icon next to the input section changes to indicate that it is now mapped the x disappears See Figure 4 9 As you drag the input section the icon changes to a circle
351. y_segment is optional Some sections such as those for debugging need not be included in the memory image of the exe cutable file but are needed for other development tools that read the executable file By omitting a memory segment assignment for a section you direct the linker to generate the section in the executable but prevent sec tion content from appearing in the memory image of the executable file INPUT_SEC TIONS The INPUT_SECTIONS portion of a sect ion_command identifies the parts of the program to place in the executable file When placing an input sec tion you must specify the fi7e_source When file_source is a library specify the input section s archive_member and input_labels The command syntax is INPUT_SECTIONS library dlb member doj input_label Note that spaces are significant in this syntax In the INPUT_SECTIONS of the LDF command e file_source may be a list of files or an LDF macro that expands into a file list such as COMMAND_LINE_OBJECTS Delimit the list of object files or library files with commas e archive member names the source object file within a library The archive_member parameter and the left right brackets 1 are required when the file_source of the input_label is a library VisualDSP 4 0 Linker and Utilities Manual 3 51 www BDTIC com ADI LDF Commands e input_labels are derived from run time SECTION names in assem bly programs for example program

VisualDSP++ 4.0 Linker and Utilities Manual

Contents

Download Pdf Manuals

Related Search

Related Contents