Service Manual DC
Contents
1. a 4 l This service manual consists of DC MCR60U XE Main unit 129 683 01 and SX MCR60 XE Speaker system 165 097 03 REFERENCE No SM5810499 LASER BEAM SAFETY 2 4 2 4 e Pick up that emits a laser beam is used this CD player section CAUTION THIS PRODUCT CONTAINS A LOW POWER LASER DEVICE TO ENSURE CONTINUED SAFETY DO NOT REMOVE ANY COVERS OR ATTEMPT TO GAIN ACCESS TO THE INSIDE OF THE PRODUCT CLUOKAN 1 LASERLATIE REFER ALL SERVICING TO QUALIFIED PERSONNEL KLASS 1 LASERAPPARAT LASER OUTPUT 0 6 mW Max CW WAVELENGTH ADVARSEL USYNLIG LASER STRALING VED ABNING NAR et SIKKERHEDSAFBRYDERE UDE AF FUNKTION UNDG UDS ETTELSE FOR STR LING VARNING OSYNLIG LASER STRALNING NAR DENNA DEL AR PPNAD OCH SPARR AR URKOPPLAD STRALEN AR FARLIG VORSICHT UNSICHTBARE LASERSTRAHLUNG TRITT AUS WENN DECKEL GE FFNET UND WENN SICHERHEITSVERRIEGELUNG O BERBR CKT IST NICHT DEM STRAHL AUSSETZEN d CAUTION INVISIBLE LASER RADIATION WHEN OPEN AND INTERLOCKS DEFEATED AVOID EXPOSURE BEAM acum RISK VARO AVATTAESSA JA SUOJALUKITUS OHITETTAESSA OLET ALTTIINA Lt EXT ANT NAKYMATTOMALLE LASERSATEILYLLE ALA KATSO SATEESEEN TAPE ADJUSTMENTS a Replacing the hea2. 216601 e SI siy L O9NO Q Y Y U Y 5 T rT colwlsl eolew o OJO CN CN N LO9NO i ES EGR N NIIN3H vL OA3M SL LOOr 91 LA3M L AQ St 02 Qin A6 045 OL onjeujeuos 216806 e SI SIU MTZJ5 6B D6402 8 F 8 H i 159290605 9 6 aA LO C Li s 25 28 8088 888 Sg on TO e M 5 51 0995 dh 2 gt orn ES ON Or Q O n 10 uu eme S Zo 209 oY KO oo e uL e e 9100 ML 09S 089 0c8 59 T 59 ae WS Tf T s 3 00495 094 089 068 009H c009H 0099 090901 9000000 OO O0 Q Q NEE ETE NE C C X Dp P 25 24 SCHEMATIC DIAGRAM DECK 7 7 7 7 7 7 7 7 7 WIRING DIAGRAM DECK T 5 lols els rig 612512 olol gt I lt lt ros uz Li 2 o 5 ET 3 2 pin T IE This is a basic schematic diagram NS w k er A aa iS 4 N oO Br 241546 R571 1K R571 K AN con o Oo 56 v m On o 42 R5912
3. 15K R2801 9000000000000 AMOSC IF VT MONO MUTE BAND1 TUL GND TU R SD STEREO TU_ B TO AMP WIRING DIAGRAM AMPLIFER amp TUNER i ES CN 7 7 20 _ 192020 20129 We 290 MIN cocer y 1 90tcu SH A OL Le 5 58 7 LLLI N ae Ss 20007 ES 229 OH a 5 SOL eu C2701 R2801 R2701 02101 2005 42313 109 200281 17002812100 J2305 19115 LN QS SNS 41000 72000180060 11089 5002 41 CNI 12 IO lt 02 gt 82 1ADA4B10D2100A 1002 94V 0 4 Vv v9 0Z vH st cc C4726 N O OE ZENOS LPH 60rtO 80198 4 4 5 2 ceerd 735916670 OF 2 90 33 corro 91980 NIYIN 01012001870 i HS 3X n09HOW OG A 14 ONAS Cro x BAYES C4953 st Sp st 22 gt lt R4108 497 J4330 lt LLI 2SOIAV CN461 2 Oe A 4913 J4111 TO MICON z lt D4982 D4980 D4981 4982 9 P gt 04983 A F 4c C BIP 4 a Lopn4 9 5 E Lo
4. PRODUCT SAFETY NOTICE Each precaution in this manual should be followed during servicing Components identified with the IEC symbol A and A mark in the parts list and the schematic diagram designated components in which safety and performance can be of special significance When replacing a component identified by and A use only the replacement parts designated or parts with the same ratings of resistance wattage or voltage that are designated in the parts list in this manual Leakage current or resistance measurements must be made to determine that exposed parts are acceptably insulated from the supply circuit before returning the product to the customer This is a basic schematic diagram 28 29 SCHEMATIC DIAGRAM TUNER 2040 CN208 YW 000 D2006 155133 ANT TERMANL CN201 AM LOOP QNO OL Q2201 KRA107M This is a basic schematic diagram C2010 100P LA1186N 4 66 SVC211 B C KTC3195 O 0 mop 0 47 50 S El D2003 SVC211 B C 30 R20 C2011 15P CH 1 100K C20 0 02 15 2 R2006 C2012 P 560 XF211 CIC D2102 SVC342 R2007 560K KTC3195 O CT211 C2131 560P CH R2008 4 5 0 XF212 LL C2142 22P T2001 XF215 450KHz R2106 2 7K C2107 1 50 155133 92102 KRC107M MTZ5 6B D2104 L2007 22UH 294
5. TAI TESTI TESTS 5 5 VDD VSS VDDS3V 9 6 4 3 E 1 2 69 6410 82 83 62 CIG 63 DEFI 1 Slice level EFMIN 00 Control VCO Clock Oscillator 2Kx8bits _ RAM D Syncrnous Detection FSEQ EFM Demodulation amp Clock Control CLV 2 CLV C1 C2 Error Detection amp CLV 13 Digital Servo Correction Flag Digital Attenuator Processing vP 2 mterpolalation 80 C2F MEM Digital Output 31 DOUT Pw Co Subcode SBCK 61 ao l S Separation 8X Over Sampling sasy 6 QCRC Digital Filter SFSY 60 WRQ 53 Micro computer SQOUT 65 Inter Fase ibit DAC CQCK 57 EE M rise i Servo Commander Crystal Oscillator RWC 54 System Generator ISCO QD 19 68 18 94 CN CCC 68 19 48 C0 61 46 62 45 44 43 CIE 89 40 7 2 GI 86 HFL TES TOFF JP JP RES TGL _ CONT CONT3 CONT5 EMPH EFLG 16M 42M FSX XVbD RVDD RCHO MUTER LVsS LVDD PCLL CONT2 CONT4 CONT6 XVSS CONT8 IC103 MM1469XH CD Driver 26 mm meme mee Smee met 18 lt 17 lt 16 lt 15 N N I DRIVER MUTE Ec 2E Omm Level shift Level shift g Level shift Level shift 402 IC BLOCK DIAGRAM amp DESCRIPTION 211 LA1844ML Electronic Tuning Supported Home Audio Tuner _ T D gt T x mE STEREO W LEVEL DET S CURVE FM IF
6. A0Sc 1 VS cL 32 This is a basic wiring diagram WIRING DIAGRAM PRIMARY POWER SUPPLY P W BOARD ASSY 1AD4B10D2100E T002 94V 0 D SECONDARY POWER SUPPLY P W BOARD ASSY 1AD4B10D2100HA AS 02 94V 0 SWITCH P W BOARD ASSY This is a basic wiring diagram 24 SANYO SANYO Electric Co Ltd Nov 03BB Printed in Japan Osaka Japan
7. 28 PM3 PN1 S30 BEEP PNO S29 gt PM3 S28 9 PM2 S27 15 PM1 S26 18 PM0 S25 19 5 1 524 SO1 PF2 S23 PFO S21 SI2 PE3 S20 5 2 2 519 SCK2 PE1 S18 PEO S17 LCD driver segment output general porpose input output and serial ports The IOS instruction is used to switch between the LCD driver segment output general purpose I O and serial I O functions and to switch between input and output of the general purpose input port function For use as segment output These pins can be set in bit units The IOS instruction with Pn ODH specifies segment output use in bit units 00 517 0 b1 S18 PE1 02 519 2 b3 S20 PE3 For use as general purpose input output port These pins can be set for input output in bit units 1 bit I O 2 51 02 0 e Segment output 1 PEO to output CMOS three value output and push pull 0 Genetal purpose port 1 SI O port Input output is specified with the IOS instruction in bit units PEee Pn 4 O e Input 1 Output For serial port The serial I O port function is specified with the IOS instruction Pn 0 The contents of the serial data buffer can be saved and loaded with the INR and OUTR instructions Pin setup states when used as a serial I O port PEO e General purpose input output PE1 SCK2 output in internal clock mode SCK output in external cloc
8. 330 70 42 0 7 95902 2563330 PLAY REC T aS LO O m O T e LO o O 4 70860 6 086 OLZr 9G 2 9 C toa tcc dro gt 9 lt 90890 Or 5 40 2 ay i a 90482 2 DP 9069 dOLe gues to VY 40001 5950 000 P S5950 8 LJ LJ S5950 7 C5916 180P 5186 17 rl OO 7 sa g 3 50 5r j B 9990 O 990 E 2 O o ANZ LN This is a basic wiring diagram 70675 HEAD L CH R P HEAD R CH y MAGNETIC 26 137 SCHEMATIC DIAGRAM AMPLIFIER 15K 82K 68K TO DECK MOTOR_GND 9 _ GND 19 e 390v s 4 9 TAPY PLAY 5 PLAY_L 470 REC_L REC_R PLAY_R BEAT CN492 C4752 C4753 0 22 C4744 C4735 150P C4736 R4745 6800P C4739 R4746 470P C4740 R4747 3300P C4741 47P R4753 180K 0 01 0 015 3300P Q4751 2501012 47K R4738 C4734 1K R4740 C4738 22K R4717 C4712 15K R4737 18K C4912 220 25 2 C4733 R4736 1 50 14780 221 TA8229K A TA8229K VDD TS BIS sd S LT L IN IN IN IN FLAT ROCK POPCLASSIC COM OUT IN LC75392 R1 R2 R3 R4 RTI HI HI4 RT RT RVR VSS VREF IN IN IN FLAT ROCK POPCLASSIC COM OUT IN 5 9 R4781 330 y L47
9. 520 1610 kHz 10 kHz steps TP14 TP13 T2001 P15 TP11 TP12 L2002 w D B g g d RIS 51 lt 0 d z 2 By vt 4 o 4984 c f 7 BOS Tz Sj T OPNO 11 585 YY A I ZASCIfI TM mu SO T GAAL 5090 a CT211 NN T2002 TP24 211 25 2205 2204 Antenna 759 unbalanced direct Modulation 1 kHz Dev 22 5kHz MONO 22 5kHz STEREO 6 75kHz PILOT RF Level dBuV EMF 1 FM Output Level about 30mV at TP13 TP14 TP15 AdjustingCirc cOn eee SG 7 IF OV FM ANT IC211 3 22pin 1 50 0 5V Check Only TP11 H 87 5MHz 2 Cover TP12 E 108 0MHz 8 0 0 05V TP13 L 90 0MHz 3 Tracking FM Ant TP14 R Maximum TP15 E 106 0MHz Anntena IRE Loop SG Moduration 1kHz 30 RF Level dBuV EMF 2 AM Output Level about 30mV at TP13 TP14 TP15 AdjustingCirc Connection SG C 7 TP13 L 1 IF Adjustment Loop Ant TP14 R 2 T2001 Maximum TP15 E B Cover TP11 H 522kHz L2205 1 00 0 05 MW TP12 E 1611kHz 750 0 50V Check Only 3 T MW Loop Ant TP14 R Maximum TP15 E 1404kHz CT211 CD PICK UP MAINTENANCE About pick up Optical lens Cleaning Clean a lens with swab of the cotton which moistened it with
10. OQ O N Q O N Q O N N N NM NNa HS HS o CEO CO NN OD T O O QO WN o eo no c O N S16 SIS lrv VIS L_ ov 6 5 16 tt HS 0 5 19 65 1 7 8S 198 ZS 6 9S 106 SS IS 75 64 65 64 5 644 94 174 HNOO 8S cPPA 65 15 S 0495 v je9d 0OS j 9d 0IS c 11591 NIX LPPA 109 LCD driver segment output general porpose input output and serial I O ports The PFO to 3 inputs are in the Schmidt format The IOS instruction is used to switch between the LCD driver segment output general purpose I O and serial I O functions and to switch between input and output of the general purpose input port function For use as segment output These pins can be set in 4 bits units The IOS instruction with Pn OEH specifies segment output use in bit units 00 521 to 24 PFO to 0 e Segment output 1 For use as general purpose input output port These pins can be set to input output in bit units 1 bit I O b1 SI O 1 0 Genetal purpose port 1 SI O port Input output is specified with the IOS instruction in bit units PFeeePn 5 OeeelInput 1 Output For use as serial port The serial I O port function is specified with the IOS instruction Pn 0 The contents of the serial data buffer can be saved
11. alcohol cleaning paper or cleaning disc appointed Specified cleaning disc LC 1 Part code 645 026 1961 manufactured by SANYO Show a clean procedure in the following in reference by swab of cotton 1 Cotton swab is wrapped with Cleaning paper 2 Add the isopropyl alcohol 3 Gently move the tip of cotton swab just like a draw a whirlpool from inside to outside on the surface of lens 2 EXPLODED VIEW Not available as service parts N S P This is a basic exploded view PARTS LIST PRODUCT SAFETY NOTICE EACH PRECAUTION IN THIS MANUAL SHOULD BE FOLLOWED DURING SERVICING COMPONENTS IDENTIFIED WITH THE IEC SYMBOL A IN THE PARTS LIST AND THE SCHEMATIC DIAGRAM DESIGNATED COMPONENTS IN WHICH SAFETY AND PERFORMANCE CAN BE OF SPECIAL SIGNIFICANCE WHEN REPLACING A COMPONENT IDENTIFIED BY USE ONLY THE REPLACEMENT PARTS DESIGNATED OR PARTS WITH THE SAME RATINGS OF RESISTANCE WATTAGE OR VOLTAGE THAT ARE DESIGNATED IN THE PARTS LIST IN THIS MANUAL LEAKAGE CURRENT OR RESISTANCE MEASUREMENTS MUST BE MADE TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY INSULATED FROM THE SUPPLY CIRCUIT BEFORE RETURNING THE PRODUCT TO THE CUSTOMER CAUTION Regular type resistors and capacitors are not listed To know those values refer to the schematic diagram Regular type resistors are less than 1 4 W carbon type and 0 ohm chip resistors Regular type capacitors are less than 50 V and less than 1000 uF type of
12. and double error correction monitor pin Incertitude Subcode P Q R S T U V and W output pin Incertitude Subcode frame synchronization signal output pin titud This signal falls when the subcode are in the standby stase Subcode readout clock input pin This is a Schmitt input Must be connected to OV when unused Output for the 7 35kHz synchronization signal divided from the crystal oscillator pin Incertitude c s d o c s 5 Subcode Q output standby output pin Incertitude Read write control input pin This is a Schmidt input Subcode Q output pin Command data input pin from control microprocessor Input for both the command input acquisition clock and the SQOUT subcode readout clock input pin This is Schmidt input Reset input pin This pin must be set low briefly after power is first applied Test output pin Leave open Notmally output a low level 16 9344MHz clock output pin 4 2336MHz clock output pin Incertitude L output Clock output Clock output Test input pin A pull down resistor is built in Must be connected to OV Internal circuit 3 3V system power supply pin Test input pin A pull down resistor is built in Must be connected to OV Note The same potential must be suplied to all power supply pins VDD VVDD LVDD RVDD and XVDD IC BLOCK DIAGRAM amp DESCRIPTION 102 LC78629E DSP for CD Player TST11 TEST2 TEST4 EFMO VVDD VVss PDO ISET FR
13. and loaded with the INR and OUTR instructions Pin setup states when used as a serial I O port PFO e General purpose input output PF1 e e SCK1 output in internal clock mode SCK1 output in external clock mode 2 501 output SI1 input In CLOCK STOP mode if this port is used as a general purpose I O port or as a serial port the pins go to the input disabled high impedance state If used for segment output the pins are fixed at the low level The segment output port function is selected after a power on reset Segment output general porpose input port 1 BEEP tone output pins The IOS instruction is used to switch between the segment output port and the PNO to 3 functions The BEEP instruction switches between the general purpose output port and BEEP tone function For use as segment output These pins can be set in 3 bits units The IOS instruction with Pn OEH specifies segment output use in bit units b2 S29 to 32 PNO to 3 0 e Segment output 1 to For use as general purpose output The general porpose output port function is selected with the BEEP instruction b3 0 PN1 to 3 are dedicated general purpose output function pins For use as BEEP output pin The BEEP instruction with b321 sets the BEEP output The BEEP instruction bit 60 61 and b2 sets the frequency When this is set as the BEEP port executing an output instruction will rewrite the internal latch data but has no i
14. universal counter function is selected by an IOS instruction with Pn 3 and b2 0 HCTR frequency measure ment mode is set up by a UCS instruction with b3 0 and b2 0 and counting is started with a UCC instruction after the count time is selected The CNTEND flag is set when the count completes To operate this circuit as an AC amplifier in this mode the input must be capacitor coupled For use as the general purpose input pin The general porpose input port function is selected by an IOS instruction with Pn 3 and b2 1 An internal register address OEH input instruction INR bO is used to acquire data from this pin Input is disabled in clock stop mede the input pin will be pulled down During the power on reset the universal counter function is selected Voltage sense general purpose input pin port This circuit is designed for a relatively low input threshold voltage For use as the voltage sense pin This input pin is is used to determine whether or not a power failure occurred after recovery from backup clock stop mode An internal sense F F is used for this determination The sense F F is tested with a TUL instruction b2 72 For use as the general purpose input port When used as a genaral purpose input port the state is sensed by using a TUL instruction b3 Since unlike other input ports input is not disablle in clock stop mode and during the power on reset special care is required with respect to through currents HCTR
15. 405 033 6706 405 033 6805 DESCRIPTION IC LA1186N AUDIO IC LA1844ML IC LC75392 IC TA8229K IC NJM78L05A INDUCTOR AIR COIL AIR INDUCTOR 8 2U K INDUCTOR 22U K INDUCTOR 22U K INDUCTOR 22U K TRANS ANT 796KHZ TRANS ANT 796KHZ TRANS OSC 796KHZ INDUCTOR 22U K INDUCTOR 22U K INDUCTOR 22U K PROTECTOR 1 25A 125V PROTECTOR 1 5A 125V TR KTC3195 Y KTC3195 O TR KTC3195 Y KTC3195 O 28C3330 U TR 28C3330 T 25 17405 5 25 17405 KTC3199 GR DTA114YS 107 TR KRC107M TR DTC114YS TR KRC107M TR DTC114YS TR KTC3195 Y KTC3195 O TR KRA107M TR DTA114YS TR DTA114ES TR KRA102M A TR DTC114ES TR KRC102M A TR DTC114ES TR KRC102M A TR DTC114YS TR KRC107M TR DTC114YS TR KRC107M KTA1267 GR TR 2SA608 F SPA TR 25 9335 TR 25 9335 5 TR 2SA608 G SPA TR DTC114ES TR KRC102M A TR KTD1303 TR 2501012 5 TR 2SD1012 G SPA TR 25014685 TR 25014685 5 KTA1267 GR TR 2SA608 F SPA TR 2SA608 G SPA TR 2SA933S R TR 25 9335 5 TR KRC102M A TR DTC114ES TR KTD1303 TR 2501012 5 TR 2SD1012 G SPA TR 25014685 25014685 5 PARTS LIST REF NO PART NO DESCRIPTION REF NO PART NO Q4903 405 1438706 TRKTC3199 GR XF211 645 054 1223 or 405 011 8500 TR2SC1740S R or 645 010 7665 or 405 011 8609 25 17405 5 or 614 240 2917 or 405 017 9600 TR 2SC3330 T XF212 645 054 1223 or 405 017 9709 TR 2SC3330 U or 645 010 7665 Q4951
16. 407 098 3300 407 012 4406 407 012 4406 409 503 5701 409 539 9704 A 409 486 8706 409 578 1103 614 329 2128 645 001 4550 645 001 4550 645 002 1459 AN 645 014 2499 405 008 6809 405 008 7202 405 008 7301 A 405 141 3604 AN 405 009 5207 A 405 009 5306 405 011 8609 405 017 9600 405 017 9709 405 011 8500 405 143 8706 405 143 8706 405 011 8500 405 011 8609 405 017 9600 405 017 9709 614 231 2667 645 057 1145 645 052 6206 DESCRIPTION ASSY PWB CD SYSCON Only initial NP ELECT 1U M 50V NP ELECT 1U M 50V SOCKET FPC 16P PLUG 6P PLUG 6P PLUG 2P MCON LID_SW PLUG 2P MCON LID_SW SOCKET FPC 22P MCON FRONT SOCKET FPC 28P MCON AMP SOCKET FFC 28P MCON AMP SOCKET FPC 16P MCON FRONT PLUG 2P MCON TU PLUG 2P MCON TU DIODE 155133 DIODE 155133 DIODE 155133 ZENER DIODE MTZJ5 1B DIODE RL153 BF S2 DIODE 155133 DIODE 155133 IC LA9242M MPB IC LC78629E IC MM1469XH IC LC72338 9C10 MICON ASSY WIRE INDUCTOR 10U K INDUCTOR 10U K INDUCTOR 22U K PROTECTOR 0 4A 125V TR 2SB808 F SPA TR 2SB810 E TR 2SB810 F TR KTA1273 Y TR 2SB927 S TR 25 927 TR 25 17405 5 TR 25 3330 TR 28C3330 U TR 25 17405 TR KTC3199 GR TR KTC3199 GR TR 25 17405 TR 25 17405 5 TR 25 3330 TR 28C3330 U RESONATOR OSC CERAMIC 16 93MHZ OSC CRYSTAL 4 5MHZ FRONT P W BOARD ASSY REF NO 73 BR601 BR602 BR603 BR604 CN601 CN603 D6201 D6313 D6314 D6315 D6330 D6401 D6402 LCD60 Q6300 Or or or 56101 or
17. 411 LC75392 Single Chip Electronic Volume Control System LTOUT LT2 LT4 RTOUT OM LVRIN LVROUT OM RVRIN RVROUT SHIFT REGISTER 2 CONTROL Ed Vpp Vss IC BLOCK DIAGRAM amp DESCRIPTION 412 TA8229 Audio Power RIPPLE BIAS CIRCUIT TERMINAL THERMAL CUT OFF PROTECTION PRE PRE GND1 GND2 IC510 BA3314F Dual Pre Amp for Audio IC BLOCK DIAGRAM amp DESCRIPTION 601 LC72338 9C10 Single Chip PLL Controller 52 po Tn muse qo th XIN 1 DETECTOR 78 E02 ex noe FMIN 74 j 1 161 17 PROGRAMMABLE DIVIDER Aa 2 AMIN 75 o SNS 72 3 VDD 73 LATCH VSS 76 UNIVERSAL COUNTER 20bits RAM 512 x 4bits i V 39 517 0 S18 PE1 SCK2 T 519 2 502 J S20 PE3 SI2 35 S21 PF0 O S22 PF1 SCK1 83 23 PF2 SO1 DRIVER ROM 8K 16bits S24 PF3 SIt S25 PMO 9 S26 PM1 a 28 S27 PM2 27 S28 PM3 eo 26 S29 PNO BEEP 25 S30 PN1 24 S31 PN2 23 S32 PN3 s 61 PJ3 DAC3 ore SI0 PG3 3 64 PJO DACO 13 IC BLOCK DIAGRAM amp DESCRIPTION 601 LC72338 9C10 Single Chip PLL Controller Pinvame PinNo vo vO rome Port only for key return signal input The threshold voltage is set to a relatively low value Pull down When a key
18. 50KHZ PRIMARY POWER SUPPLY P W BOARD ASSY DESCRIPTION ASSY PWB PT Only initial SOCKET 2P ASSY WIRE SECONDARY POWER SUPPLY P W BOARD ASSY DESCRIPTION ASSY PWB PT2 Only initial TERMINAL BOARD TERMINAL BOARD INDUCTOR 181U INDUCTOR 180U DESCRIPTION ASSY MECHA TM DS60TN SH E HEAD 6PA R P HEAD PINCH ROLLER ARM ASSY RF BELT MAIN BELT ASSY MOTOR Not available as service parts IC BLOCK DIAGRAM amp DESCRIPTION 101 LA9242M MPB Servo Processing Signal for CD Player LDS LDD BH1 1 LF2 VR REF1 Vcc2 FSS DRF CE DAT CL CLK DEF Tr 48 NC 201 RF IN GND IF OUT Vcc 1852 IC BLOCK DIAGRAM amp DESCRIPTION 102 LC78629E DSP for CD Player O DEFI TAI PDO VVSS ISET VVDD FR VSS EFMO EFMIN TEST2 CLV CLV V P HFL TES 1 2 3 4 5 6 7 8 9 TOFF TGL JP JP PCK FSEQ No Symbol Function description to rest 1 DEFI Defect detection signal DEF input pin Must be connected to OV when unused s es Te ses T Test input pin A pull down resistor is built in Must be connected to OV c e s 5 External VCO control phase comparator output pin Internal VCO ground pin Must be connected to 0V connection pin s woo 8 55 Digital system ground pin Must connected to OV vo sco wv ho fEFMIN 1 control Incertitude EFM signal input pin Test input pin A
19. 7 7903 KNOB DECK MECHA STOP EJECT 37 614 327 7910 KNOB DECK MECHA PAUSE 38 614 270 8477 SHAFT 39 614 328 9340 ASSY CABINET REAR 40 614 327 8023 SPRING REC 41 614 328 9821 SHIELD DECK PWB PARTS LIST ELECTRICAL PARTS REF NO 51 52 53 54 55 56 57 58 59 PART NO 614 328 4307 614 328 4376 614 328 4369 614 328 4390 614 328 4383 614 274 2013 A 423 016 7908 AN 645 064 8144 A 645 016 9939 DESCRIPTION ASSY WIRE CD TO MOTOR FLEXIBLE FLAT CABLE CD PICK UP FLEXIBLE FLAT CABLE SYSCON TO AMP FLEXIBLE FLAT CABLE SYSCON TO FRONT FLEXIBLE FLAT CABLE SYSCON TO FRONT CORD ID CONNECTOR FUSE 250V 2 5A TRANS POWER CORD POWER 1 74MK GB FB 160 N2B 012 0 SWITCH P W BOARD ASSY REF NO 71 CN698 56951 614 327 7330 614 020 6548 645 023 5795 DESCRIPTION ASSY PWB SW Only initial SOCKET 2P SWITCH LEVER CD amp SYSCON P W BOARD ASSY REF NO 72 C6200 or CN111 CN113 or CN690 or CN691 CN692 or CN693 CN694 or D1401 D1402 D1403 D1404 D1410 D6901 D6902 101 102 IC103 601 JW600 L1451 L6900 L6901 PR140 Q1301 or or Q1401 or or Q6200 or or or or Q6201 or or or or X1451 or X6001 PART NO 614 328 8510 403 259 0508 403 373 7001 645 059 0498 645 005 8127 614 310 2472 645 004 2881 614 310 2731 645 063 8695 645 012 5324 645 009 8482 645 059 0498 614 310 2731 645 004 2881 407 012 4406 407 012 4406 407 012 4406 407 099 5204 A
20. 70 2 42 XIN 1 XOUT F3 EN 4 5MHz crystal oscillator pin Charge pump output pin These pins go to high impedance state when the HOLD pin is set low in the hold enable state Universal counter freqency and period measurement general purose input port This IOS instruction b3 with Pn 3 swithes the pin function between universal counter input and general puropse input e Frequency measurement The universal counter function is selected by an IOS instruction with Pn 3 and b3 0 LCTR frequency measure ment mode is set up by a UCS instruction with b3 0 b2 1 and counting is started with a UCC instruction after the count time is selected The CNTEND flag is set when the count completes To operate this circuit as an AC amplifier in this mode the input must be capacitor coupled Period measurement With the universal counter function selected a UCS instruction with b321 and b2 0 sets up the period measurement mode and a UCC instruction starts counting after selecting the count time The CNTEND flag is set when the count completes In this mode the signal must be input with DC coupling to turn off the bias feedback resistor For use as general purpose input pin use The general purpose input port function is selected by an IOS instruction with Pn 3 and b3 1 An internal register address OEH input instruction INR b1 is used to acquire data from this pin Input is disabled in clock stop mode The input pin will be pu
21. 81 2 221 4716 1000 16 4913 3300 25 4816 1000 16 V PR496 1500mA o R4786 270 R4886 270 2 2 1 2 HEAD PHONE CN421 LM R4881 14881 330 22U 412 LEFT WOOFER et CN401 RIGHT WOOFER 50 4823 10P C ee ee eee T R4830 AMI 12K R4848 22K R4831 47K R4849 47K R4832 5 6K R4850 22K C4813 47 10 1K 22K 10K C4963 C4962 C4834 R4838 C4838 R4840 C4842 R4842 0 01 0 015 2200P TU_RCH G TU_LCH G TU GND G STEREO C SD G BAND1 G TU_MUTE G MONO C VTS AMIF G AMOSC G 9 0V C E CN491 TO MCON BLOCK A MUTE SYNC REC s s HH TAPE PLAY R4949 2 2K R4833 3 9K 0 15 0 22 6800P 470P 155133 D4963 R4835 C4853 D4962 155133 3 9K R4845 C4836 15K R4846 C4839 82K R4847 C4840 R4834 C4852 3 9K 68K 3300P 446 NJM78LO5A CN461 Q4109 KRC107M Q4108 KRC107M C4951 47 25 D4951 MTZJ9 1B KRC107M A s 4 VOL_STB j O E 211 nm C 1 AC 230V 50Hz R4107 47K Q4903 R4104 TKTC3199 100K Q4104 KRC102M 04106 KRC102M 2
22. A 405 138 6403 TR KTD2058Y or 614 240 2917 or A 405 095 1602 TR 2SD2061 E XF215 645 041 9324 or A 405 095 1701 TR 2SD2061 F or 645 059 0054 Q4992 405 008 2504 2SB698 G or 405 008 2405 TR 2SB698 F or 405 1413703 TRKTA1271 Y Q4994 405 000 3806 TR DTC114YS or 405 143 0007 TRKRC107M Q4995 405 141 3703 1271 REF NO PART NO or 405 008 2405 TR 2SB698 F 76 614 327 7323 or 405 008 2504 TR 2SB698 G CN450 614 020 1215 R4752 A 402 071 1304 FUSIBLE RES 2 2 JA 1 4W CN453 614 328 4338 R4852 A 402 071 1304 FUSIBLE RES 2 2 JA 1 4W R4941 A 402 096 0306 FUSIBLE RES 27 JA 1 4W SA401 411 021 6405 SCRS TPG BIN 3X8 SA402 411 021 6405 SCRS TPG BIN 3X8 SH201 614 256 3052 SHIELD T2001 645 043 0213 FILTER 450KHZ REF NO PART NO T2002 645 040 9981 TRANS IF 10 7MHZ 77 614 328 4482 or 645 039 9923 TRANS IF 10 7MHZ CN451 614 017 8203 XF210 645 059 0047 FILTER BP CN452 614 017 8203 or 645 026 2975 FILTER BP 108MHZ L4591 A 645 038 6053 or 614 252 1045 FILTER LC or N 645 041 3087 EXPLODED VIEW amp PARTS LIST TAPE MECHANISM Q XN K 50 N TAPE MECHANISM REF NO TMO1 02 TMOS3 04 TMO05 06 614 328 4239 645 033 8625 645 041 3025 645 009 1612 645 009 1766 645 033 3415 614 312 0629 DESCRIPTION CERAMIC FILTER 10 70MHZ CERAMIC FILTER 10 70MHZ FILTER CERAM CERAMIC FILTER 10 70MHZ CERAMIC FILTER 10 70MHZ FILTER CERAM CERAMIC FILTER 450KHZ CERAMIC FILTER 4
23. Ceramic type and Electrical type N S P Not available as service parts PACKING amp ACCESSORIES REF NO PART NO DESCRIPTION REF NO PART NO DESCRIPTION 42 614 329 2425 SHIELD DECK PWB 614 328 9937 CARTON CASE 43 614 329 2845 SPACER CUSHION 614 327 8085 CUSHION RIGHT F PANEL BUTTON CD OPEN 614 327 8092 CUSHION LEFT 44 614 329 3408 SPACER CUSHION 645 035 1563 POLY SHEET 0870X0480 NC SET 45 614 327 5534 STAND CUSHION 614 328 9975 INSTRUCTION MANUAL 46 614 327 7668 ASSY MECHA DA11B3N 614 329 0001 INSTRUCTION SHEET 645 046 8322 ASSY ANTENA LOOP 614 328 4635 LID BATTERY REMOCON SERVICE FIXING PARTS 645 063 8725 REMOCON RB MCR60 REF NO PART NO DESCRIPTION 614 328 9319 ASSY BOX SPEAKER YO1 4110213503 SCR S TPG BIN 3X10 SHAFT LID CD Y02 4110213503 SCRS TPG BIN 3X10 F PANEL ASSY GEAR CD CABINET amp CHASSIS Y03 411 092 0906 WASHER Z 2 6X10X0 5 REF NO PART NO DESCRIPTION F PANEL LEVER 1 614 327 8672 ASSY PANEL FRONT 04 4111562105 SCRS TPG BIN 2 3 6 2 614 327 8009 SHAFT RIGHT F PANEL LEVER 3 614 327 7996 SHAFT LEFT YO5 411 165 3803 SCR S TPG BIN 2 3X10 4 614 322 2125 ASSY GEAR LID CD MTG CD CD11 5 614 327 7941 LEVER 06 411 092 0906 WASHER 7 2 6 10 0 5 6 614 327 7682 BUTTON CD OPEN MTG CD CD11 7 614 307 2072 COVER PICK UP 07 411 021 3503 SCRS TPG BIN 3X10 8 614 298 8886 SPACER MECHA MTG CD DA11 CD F PANEL 9 614 327 8016 SPRING CD 08 411 021 3503 SCRS TPG BIN 3X10 10 614 327 7958 MOUNTING CD MTG CD CD PWB 11 614 327 7859 KN
24. D4983 D4993 FCL41 or FCL42 or HS401 PART NO 614 328 8404 403 058 4608 403 377 6406 403 058 4608 403 377 6406 403 329 5907 403 350 9301 645 025 4703 645 038 7715 614 221 8273 645 006 1875 645 006 1875 645 011 6384 645 055 1017 614 310 2731 645 004 2881 614 221 8273 645 012 5324 614 310 2519 645 005 8158 645 032 5663 407 157 8109 407 157 8109 407 012 4406 407 012 4406 407 012 4406 407 012 4406 407 105 1602 407 105 1305 407 099 5303 407 012 4406 A407 099 6003 407 012 4406 407 012 4406 407 012 4406 407 012 4406 A407 098 3300 A407 098 3300 A407 098 3300 A407 098 3300 407 012 4406 A645 006 4760 A 645 031 7903 A645 006 4760 A 645 031 7903 614 327 7835 DESCRIPTION ASSY PWB AMP TU Only initial POLYESTER 0 15U J 50V POLYESTER 0 15U J 50V POLYESTER 0 15U J 50V POLYESTER 0 15U J 50V ELECT 3300U M 25V ELECT 3300U M 25V TERMINAL ANTENNA TERMINAL TERMINAL PLUG 2P SPEAKER PLUG 2P SPEAKER JACK PHONE D3 6 HEADPHONE JACK PHONE D3 6 HEADPHONE PLUG 2P POWER PLUG 2P POWER TERMINAL SOCKET FPC 28P AMP MCON PLUG 10P AMP DECK PLUG 10P AMP DECK TRIMMER 7PF VARACTOR DI SVC211 B VARACTOR DI SVC211 B DIODE 155133 DIODE 155133 DIODE 155133 DIODE 155133 VARACTOR DI SVC342M V VARACTOR DI SVC342L V ZENER DIODE MTZJ5 6B DIODE 155133 ZENER DIODE MTZJ9 1B DIODE 155133 DIODE 155133 DIODE 155133 DIODE 155133 DIODE RL153 BF S2 DIODE RL153 BF S2 DIODE RL153 BF S2 DIODE RL153 BF S2 DIODE 155133 HOLDER FU
25. NS 50 54 AM IF 71 49 32 OSC 75 48 53 2 6 5 6V 47 33 46 52 45 CN693 Sone TU_MUTE 10 i AUX MUTE 11 u 51 C S C PS I P CON 14 5 TAPE PLAY 16 39 37 x 49 64102 SYNC REC 38 gt 06208 48 1 A MUTE 25 41 9 148 26 9 4 2 43 BAND 24 FGND 44 TO FRONT SEC This is a basic schematic diagram 20 21 WIRING DIAGRAM CD amp SYSCON ge La 069NO C MEAP AIr S ZZ a BRE us TN EA cao SNS RESP 80198 11092 3099F Sero T a Shere PIN 1 NS o 01099 099 Q gt 00192 69 25 ie TIE a 81690 90699 80198 1690 9O9Mf Ko Du R6907 CN693 10290 T HII Jeger Ve 8 1 E T LE Eri Wi enua a Og NSE bid NO ANS 5319 is EO Onde Ei LOSLH s else pee Fe m 6 5 Be 002 002 CN69 AN a eto yocp ud 82 eT 7 25 056 B Dpr degli ASEH 50712 4 2 VEL 7 9PCTO 29 ACE ae Te Oce Lf T 5 E gl E EN poe 551411 is core J 8010 bert Hisar el A 272213 6103 lt IC103 This is a basic wiring diagram 23 22 WIRING DIAGRAM FRONT SCHEMATIC DIAGRAM FRONT
26. OB VOLUME Y O9 411 098 4700 SCR S TPG BIN 2 3X8 12 614 327 7804 DEC CAP VOLUME FRONT PWB LID CD 13 614 327 7798 DEC RING Y10 411 187 2808 SCRS TPG BIN 2 3X8 14 614 327 7750 DEC WINDOW CD BTM LID CD COVER LID 15 614 327 7743 DEC WINDOW CD TOP Y11 411 187 2709 SCRS TPG BIN 2 3X6 16 614 327 8382 CAP WINDOW CAP WINDOW COVER LID 17 614 327 7675 ASSY PANEL Y12 4110208905 SCRS TPG BRZ FLG 3X10 18 614 328 9500 DEC BUTTON PANEL TOP ASSY CEAR DECK 19 614 328 0517 DEC BUTTON Y13 412 032 6408 SPECIAL SCREW 20 614 328 9524 DEC BUTTON SHAFT PANEL TOP 21 614 328 9531 DEC BUTTON Y14 4110216405 SCRS TPG BIN 3x8 22 614 327 7699 BUTTON OPERATION 8 KEYS DECK MECHA PANEL TOP 23 614 328 4604 ASSY COVER LID Y15 411 021 3503 SCRS TPG BIN 3X10 24 614 327 8030 SPRING DOOR CD DECK PWB PANEL TOP 25 614 329 2432 SPRING DOOR CD Y16 4110209100 SCR S TPG BRZ FLG 3X12 26 614 327 7934 LID CASSETTE P TRANS REAR 27 614 327 7781 DEC WINDOW DECK Y17 411021 3503 SCH S TPG BIN 3X10 AC CORD 28 614 327 7712 COVER DECK Y18 411098 7800 SCRS TPG FLT 3X12 29 614 327 8054 SPRING DOOR DECK PANEL FRONT REAR L R 30 614 327 7972 PANEL TOP Y19 411 021 4906 SCH S TPG BIN 3X20 31 614 322 2132 ASSY GEAR LID CASSETTE PANEL FRONT REAR 32 614 327 7866 KNOB DECK MECHA REC Y20 4110213503 SCR S TPG BIN 3X10 33 614 327 7873 KNOB DECK MECHA PLAY REAR ANT TERMINAL 34 614 327 7880 KNOB DECK MECHA REW Y21 411 021 3503 SCR S TPG BIN 3X10 35 614 327 7897 KNOB DECK MECHA FFWD PANEL TOP REAR 36 614 32
27. S O FILE NO Service Manual Micro Component System DC MCR60 Contents PRODUCT CODE No 129 684 01 Laser beam safety precaution 1 iga pme 24 Tape adjustments 1 DECR 26 Tuner adjustments 2 AMPORPIER R uuu musu a 28 CD pick up maintenance 2 px 30 Exploded 3 Wiring diagram PGS lence 4 CD SY SOON m 22 Exploded view amp parts list Tape Mechanism 7 FRONT M 25 IC block diagram amp description 8 m eee 27 EERTSE NY P u 16 AMPLIFIER amp TUNER 32 U ULU n 17 PRIMARY POWER SUPPLY 34 Schematic diagram SECONDARY POWER SUPPLY 34 CD amp SYSCON CD Section 18 u uuu ZS us 34 SYSCON Section 20
28. SE HOLDER FUSE HOLDER FUSE HOLDER FUSE HEAT SINK REF NO 201 211 411 412 446 2001 2002 2003 2005 2006 2007 2204 or L2205 L4780 L4781 L4881 PR495 PR496 Q2001 or Q2002 or Q2003 or or or or Q2101 or Q2102 or Q2110 or Q2111 or Q2201 or Q4103 or Q4104 or Q4106 or Q4108 or Q4109 or Q4730 or or or or Q4740 or Q4751 or or or or Q4830 or or or or Q4840 or Q4851 or or or or PART NO 409 016 0200 409 474 3201 409 390 1107 A 409 295 7402 409 039 9204 645 040 2753 645 040 2746 645 002 1534 645 002 1459 645 002 1459 645 002 1459 645 058 8792 645 037 2377 645 065 3568 645 002 1459 645 002 1459 645 002 1459 A 645 014 2529 A 645 014 2536 405 151 4301 405 151 4806 405 151 4301 405 151 4806 405 017 9709 405 017 9600 405 011 8609 405 011 8500 405 143 8706 405 000 0904 405 151 5209 405 143 0007 405 000 3806 405 143 0007 405 000 3806 405 151 4301 405 151 4806 405 151 5209 405 000 0904 405 000 0508 405 110 5400 405 000 3103 405 109 9204 405 000 3103 405 109 9204 405 000 3806 405 143 0007 405 000 3806 405 143 0007 405 143 6504 405 004 4601 405 006 1806 405 006 1905 405 004 5103 405 000 3103 405 109 9204 405 151 4400 405 021 0204 405 021 0600 405 033 6706 405 033 6805 405 143 6504 405 004 4601 405 004 5103 405 006 1806 405 006 1905 405 109 9204 405 000 3103 405 151 4400 405 021 0204 405 021 0600
29. WER SUPPLY P W B AMPLIFIER amp TUNER P W B ORANGE DECK P W B 16P a 2P SWITCH CD amp SYSCON P W B P W B CN603 CN601 16 22P FRONT P W B This is a basic wiring connection 17 SCHEMATIC DIAGRAM CD amp SYSCON CD Section C1302 1000 R1340 82K CD_R CLK CE CL DAT PONRST aD 77 A GND R1335 10K CD_L 102 LC78629E RER gt CV 9 NES e a Focs La lt h TGL FSTA CV o sd on EET THLD C1325 R1336 2200P 330 REF stop___ESTA JP gt SLOF D1404 MTZJ5 1B 2 R1312 6 8K CONT1 D MUTE CONTS SLED TO U_COM PWB OLIM SW R1331 220K DRE 2 0 DRF EE c 2 gt RWC R1330 220K gt gt WRQ gt COIN Saour 2 0 SQOUT R2 QO CD R 1K 0 22 GND 2 0 CD SPINDLE MOTOR cD L gt _ CDL SP RL 158 GND 222412771 o TC Be TO MCON GND 2 D1401 01402 D1403 E OOOO 1SS133 1SS133 1SS133 5 PLAY STOP PRODUCT SAFETY NOTICE Each precaution in this manual should be followed during servicing Components identified with the IEC symbol and mar
30. WITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH TACT SWITCH TACT SWITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH TACT SWITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH TACT SWITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH ROTARY ENCODER PHOTO DIODE SPS 440 1 VG PARTS LIST DECK P W BOARD ASSY REF NO 74 C5918 or CN500 CN505 or CN506 or IC510 L5902 Q5902 or or or or Q5904 or or or or 55950 614 327 7316 403 056 7502 403 377 6307 645 012 2750 614 310 2755 645 004 2904 614 310 2458 645 005 8110 409 384 3506 645 031 5893 405 143 8706 405 011 8500 405 011 8609 405 017 9600 405 017 9709 405 017 9600 405 017 9709 405 011 8609 405 011 8500 405 143 8706 645 038 7586 DESCRIPTION ASSY PWB DECK Only initial POLYESTER 1000P J 50V POLYESTER 1000P J 50V SOCKET DIP 10P PLUG 4P PLUG 4P PLUG 4P PLUG 4P IC BA3314F TRANS OSC 85KHZ O S C TR KTC3199 GR TR 25 17405 TR 25 17405 5 TR 25 3330 TR 28C3330 U TR 25 3330 TR 28C3330 U TR 25 17405 5 TR 25 17405 TR KTC3199 GR SWITCH PUSH R PSW AMPLIFIER amp TUNER P W BOARD ASSY REF NO 75 4714 or C4814 or C4913 or CN201 or CN203 CN401 CN402 CN421 or CN441 or CN461 CN491 CN492 or CT211 D2002 D2003 D2004 D2005 D2006 D2101 D2102 or D2104 D4102 D4951 D4953 D4961 D4962 D4963 D4980 D4981 D4982
31. d c Adjusting motor speed 1 After replacement demagnetize the heads by using 1 Insert the test tape MTT 111 or etc 3 000 Hz a degausser 2 Press the PLAY button 2 Besuretoclean the heads before attempting to make Use a flat tip screwdriver to turn the SVR to adjust so any adjustments that the frequency counter becomes 3 000 Hz 3 Besure both channels 1 and 2 are the same level 4 Press the STOP button Using a dual channels oscilloscope 4 All wiring should be returned to the original position d Replacing the motor after work is completed MOTOR SPEED ADJUSTMENT R P HEAD RED WHITE YELLOW EARTH b Adjusting head azimuth e Checking the mechanism torques 1 Load a test tape VTT 738 etc 10kHz for Clean the head capstan and pinch roller before making azimuth adjustment any measurement 2 Press the PLAY button 3 Useacross tip screwdriver to turn the screw for normal azimuth adjustment so that the left and right Take up torque TEF Cassette for PLAY TW 2111A PLAY TW 2111A Drive power cassette outputs are maximized at the same phase during measurement F FWD REW TW 2231 TW 2412 paypak 30 70gr cm 1 0 6 0gr cm 4 Press the STOP button FFWD REW TUNER ADJUSTMENTS Use a plastic screw driver for adjustments MODE ST Stereo e Speaker impedance 4 ohms e TUNING FM 87 5 108MHz AM 522 1611 kHz 9 kHz steps
32. eneral purpose 5 CONTS input output pin De emphasis monitor pin EMPH A high level indicates playback of a de emphasis disk 29 CONT6 General purpose 6 output pin Rest to EMPH function 30 o C2 flag output pin Incertitude DOUT Digital output pin EIJA format Test input pin TEST3 A pull down resistor is built in Must be connected to OV Incertitude VDD 1 EFLG SBSY XVSS XIN XOUT XVDD MUTER CONT8 RVDD RCHO RVSS LVSS LCHO LVDD MUTEL CONT7 PCCL TEST4 CONT2 CONT3 CONT4 CONT5 C2F DOUT TEST3 EMPH CONT6 to rest Test input pin A pull down resistor is built in Must be connected to OV General purpose I O command identification pin A pull down resistor is built in Used operate similarly to LC78622E connected to open or OV H Must be connected to general purpose port command L Be able to all command control PCCL Left channel mute output pin General purpose 7 output pin Rest to MUTEL function Lch one bit Left channel power supply pin DAC m IES Q z J N Right channel power supply pin Right channel mute output pin General purpose 8 output pin Rest to MUTER function Rch one bit DAC Crystal oscillator power supply pin Connections for 16 934MHz crystal oscillating circuit ground pin Crystal oscillator ground pin Must be connected to OV Subcode block synchronization signal pin Incertitude C1 C2 signal
33. ing pin is automatically set to the input port To enable interrupt operation the interrupt enable flag INTEN in status register 1 must also be set The IOS instruction with 3 b1 INT1 bO INTO is used to select rising or falling edge detection In clock stop mode input is disabled and these pins go to the high impedance state During the power on reset these pins go to the general purpose input port function PJO DACO 64 PJ1 DAC1 63 PJ2 DAC2 62 PJ3 DAC3 61 PKO INTO 22 PK1 INT1 21 PK2 20 PKS 19 Vdd1 Pin for external application of 2 3 voltage of LCD drive bias Vdd2 58 Pin for external application of 1 3 voltage of LCD drive bias TEST1 79 LSI test pin TEST2 2 These pins must be either left open or connected to ground LCD driver common output pin Driver format 1 3 duty 1 3 bias This pin is fixed at the low level in CLOCK STOP mode This pin is fixed at the low level after a power on reset LCD driver common output pin Driver format 1 3 duty 1 3 bias The frame frequency 100MHz This pin is fixed at the low level in CLOCK STOP mode This pin is fixed at the low level after a power on reset 14 IC BLOCK DIAGRAM amp DESCRIPTION 601 LC72338 9C10 Single Chip PLL Controller Pin rame pin 5 three value output and push pull CMOS three value output and push pull S25 PMO S26 PM1 S27 PM2
34. k in the parts list and the schematic diagram designated components in which safety and performance can be of special significance When replacing a component identified by and A use only the replacement parts designated or parts with the same ratings of resistance wattage or voltage that are designated in the parts list in this manual Leakage current or resistance measurements must be made to determine that exposed parts are acceptably insulated from the supply circuit before returning the product to the customer This is a basic schematic diagram 18 SCHEMATIC DIAGRAM CD amp SYSCON SYSCON Section JP 8 2K 8 2K 8 2K 10K 10K 10K 15K 15K 27K DGND O D GND CD L O CD L AGND O GND 4 2 o D ANE des lt e SQOUT CLOCK CLOCK P COIN 5 2 0 CQCK TO CD SEC 17 O 6 2 O RWC 18 DRF 21 O PICK SW JLIMIT R6905 100 R6201 C6200 2 7K 1 50 C6104 oo CN691 SW 58 9v que MET 5 CN690 LOL cH TE FMOSC C6913 100 JOG2 CN694 JOG1 CN692 e REMIN MGND 58 R 27 A_GND 57 LLI 0 CD L IC601 28 0 D_GND D_GND 54 56 lt VF CE 62 LC72338 53 29 DOUT s s D CLK Nt 51 30 AC S
35. k mode PE2 e e e 502 output SI2 input In CLOCK STOP mode if this port is used as a general purpose I O port or as a serial I O port the pins go to the input disabled high impedance state If used for segment output the pins fixed at the low level The segment output port function is selected after a power on reset LCD driver segment output general porpose input output ports The IOS instruction is used to switch between the LCD driver segment output general purpose I O port and serial I O to switch between input and output of the general purpose input output port function For use as segment output These pins can be set in 4 bits units The IOS instruction with Pn OEH specifies segment output use in bit units 00 525 to 28 PMO to 3 0 e Segment output qe ee to For use as general purpose input output port These pins can be set for input output in bit units Input output is specified with the IOS instruction in bit units PM 0 o Input 1 Output In CLOCK STOP mode if this port is used as a general purpose I O port the pins go to the input disabled high impedance state If used for segment output the pins are fixed at the low level The segment output port function is selected after a power on reset CMOS three value output and push pull u UP um z Z Z c E 77 GAU UUU DD UTUI X X X X gt gt gt gt U UU UU DU O O G YOY N O N
36. lled down During the power on reset The universal counter function in HCTR frequency measurement mode is selected PLLcontrol and CLOCK STOP mode control pin Setting this pin low in the hold enable state disables input to the FMIN and AMIN pins and sets the EO pin to the high impedance state To enter clocl stop mode set the HOLDEN flag set this pin low and execute a CKSTP instruction To clear clock stop mode set this pin high General purpose input ports ADC input pins The IOS instruction with Pn 7 switches the pin function between genetal purpose input ports and ADC inputs For use as the general purpose input port The IOS instruction with Pn 7 specifies the use as general purpose input port in bit units For use as ADC input pin The IOS instruction with Pn 7 specifies the use as ADC in bit units The IOS instruction with Pn 1 specifies the pin to convert The UCC instruction b2 starts a conversion The ADCE flag will be set when the conversion completes Note Executing an input instruction for a port specified for ADI use will always return low since input is disabled These pins must be set up for general purpose input port usage before an input instruction is excuted In other words the port must be set to the general porpose input function before the input instruction is executed Input is disabled in clock stop mode During the power on reset these pins go to the general purpose input port function General purpose o
37. matrix is formed by combining PB and PC ports resistor maximum three simultaneous key presses can be detected input All of four pull down resistor are set by the IOS instruction with Pn 2 bl and specification of resistor for each pin is impossible The input is disabled in clock stop mode Port only for key source signal output Since the output transistor circuit is an unbalanced CMOS Unbalance CMOS structure diodes to prevent short circuiting due to multiple key presses are not required Push pull In clock stop mode these pins go to the output high impedance state and hold this state until an output instruction is executed General purpose output serial I O ports Schmidt type input the IOS instruction performs switching between general purpose I O ports and serial I O ports and between input and output for general purpose I O ports When used as general purpose I O ports these pins can be set for input or output in bit units bit I O and are set for use as general purpose I O ports by the IOS instruction with Pn 0 bOzSI O Oe general purpose port 1 SI O port Specification of input or output is made by the IOS instruction in bit units PG0 PG Pn 6 PG1 SCK0 PG2 SO0 PGS SIO 0 Input 1 Output When used as serial I O ports these pins are set for serial I O port use by the IOS instruction with Pn 0 The content of serial data buffer is saved or load by the INR and OUTR ins
38. nfluence on the output These pins go to the output high impedance state in clock stop mode If used for segment output the pins are fixed at the low level These pins go to the output high impedance state during the power on reset and hold that state until an output instruction is executed _ PHO ADIO JPH1 ADI JPH2 ADI2 PHS ADIS3 a2 i oM N m m CU gt gt gt gt OQ O O O N LCD DISPLAY DESCRIPTION LCD60 s LI w U Lj ec gt NJ LNA y ki C SLEEP RASS SURA 2 PROG TA CH EUN M a ANTE CEN V MM HMM MM SE ON RM cH NN MOM M Sene de J E lt AM M ai Ew Ll ZA i 7 r ren SON 707 SLEEP BASS SURR C PROG TR CH at COM1 e oe eres CON __4__ 51 7A 5 S B 7G 7D __6__ S ON 7C cH 20 57 T9 _ 8 55 eB 6G 6D __9_ 56 OFF 6 TR __25__ S522 1 F 1E __27__ S24 ih 1C WIRING CONNECTION AC IN 230V 50Hz P T 14981 FM ANT PRIMARY POWER SUPPLY P W B AM LOOP SPEAKERS TAPE DECK MECHANISM Pesar CN450 2P CN451 CN452 CN402 CN401 BL BW 2P L SECONDARY PO
39. or or 6102 or or or 6103 or or or 56104 or or or 56105 or or or 56106 or or or 56107 or or or 56108 or or or 56500 SE601 PART NO 614 328 8411 614 327 7828 614 327 7842 614 327 7736 614 327 7989 645 063 8695 645 063 8701 407 235 7406 407 235 7406 407 235 7406 407 235 7406 407 012 4406 407 012 4406 407 099 5303 645 064 7826 405 011 8609 405 015 6205 405 015 6403 405 011 8500 614 240 1002 645 006 5958 645 048 3820 614 220 5471 614 220 5471 614 240 1002 645 006 5958 645 048 3820 614 220 5471 614 240 1002 645 006 5958 645 048 3820 614 220 5471 614 240 1002 645 006 5958 645 048 3820 614 240 1002 645 006 5958 645 048 3820 614 220 5471 614 220 5471 614 240 1002 645 006 5958 645 048 3820 614 220 5471 614 240 1002 645 006 5958 645 048 3820 614 220 5471 614 240 1002 645 006 5958 645 048 3820 645 031 8078 407 232 4002 DESCRIPTION ASSY PWB FRONT Only initial DEC SHEET LCD HOLDER LCD COVER LED REFLECTOR LCD SOCKET FPC 22P FRONT MCON SOCKET FPC 16P FRONT MCON LED LT7V34 81 URC1 LED LT7V34 81 URC1 LED LT7V34 81 URC1 LED LT7V34 81 URC1 DIODE 155133 DIODE 188133 ZENER DIODE MTZJ5 6B LCD TR 25 17405 5 TR 25 2785 25 2785 TR 25 17405 SWITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH TACT SWITCH TACT SWITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH TACT SWITCH TACT SWITCH PUSH 1P 1T SWITCH PUSH SWITCH TACT S
40. pull down resistor is built in TEST E Must be connected to OV 12 0 Disk motor control output 113 Canbe set to three value output by microprpcessor command Rough servo phase control automatic switching monitor 14 V P L output output pin Outputs a high level during rough servo and a low level Track detection signal input pin This is a Schmidt input Tracking error signal input pin This is a Schmidt input L output H output Tracking off output pin Tracking gain switching output pin Increase the gain when low Track jump output Three value output is also possible when specified by microprocessor command Incertitude L output EMF data playback clock monitor pin Output 4 3218MHz when the normal speed playback phase command L output Synchhronization signal detection output pin Output a high level when the synchronization signal detected from the EFM signal and the internaly generated synchronization signal range Incertitude 23 von Peripheral circuitry 5V system power suply pin General purpose 1 oont input output General purpose 2 CONT2 input output pin General purpose 3 input output pin Controlled by serial data commands From the microprocessor Any of these that are unused must be either set up as input pin and connected to OV or set up as output pin and left open L output General purpose 4 CONT4 input output pin G
41. tructions Pin setup states when used as serial I O ports PGO e general purpose input or output PG1 SCKO output in internal block SCKO input in external block PG2 e 500 output e e SIO input In clock stop mode input is disabled and these pins go to the high impedance state During the power on reset these pins become general purpose input ports lO CMOS posh pull In ckock stop mode during the power on reset and in the PLL stop state these pins go to the high impedance state EO1 78 CMOS EO2 77 tristate VOS o Power supply pin VDD 31 73 FMVCO local oscillator input pin This pin is selected by the PLL instruction b1 0 b0 don t care Capacitor coupling must be used for signalinput Input is disabled when the HOLD pin is set low inthe hold enable state Input is disable in clock stop mode during the power on reset and in the PLL stop state FMIN 74 AMVCo Ical oscillator input pin This pin is selected and the band set by the PLL instruction CW1 b1 b0 Capacitor coupling must be used for signal input Input is disabled when the HOLD pin is set low in the hold enable state Input is disabled in clock stop mode during the power on reset and in the PLL stop state AMIN 75 Universal counter general purpose input port The IOS instruction b3 with Pn 3 switches the pin function between universal counter input and general purpose input Frequency measurement The
42. utput ports DAC input pin The IOS instruction with Pn 9 switches the pin function between general purpose output ports and ADC inputs Since these pins are open drain circuit pull up resistors are required in exrernal circuit accepting these outputs For use as general purpose output port The IOS instruction with Pnz9F specifies general purrpose Nch input port use in bit units open drain For use as DAC The IOS instruction Pn 9 is used to switch the port in bit units DAC data is loaded into tne DAC 0 to 3 specified with the DAC instruction Although PWM waveform is output as soon as the port is switched the data prior to that load is output for up to 114us 1 8 791kHz after data is loaded The general purpose output port function is selected after a power on reset and the output go to the transistor off H output state General purpose I O external interrupt ports There is no instruction that switches the function between general purpose ports and external interrupt ports These pins function for input only when the external interrupt enable flag is set Output disables e For use as general purpose I O port These pins can be set for input or output in bit units bit I O The IOS instruction is used to specify input or output in bit units CMOS For use as external interrupt pin push pull This function can be used by setting the external interrupt enable flags INTOEN and INT1EN in status register 2 The correspond
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