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L5A TFT- LCD TV SERVICE MANUAL

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1. HEADPHONE JACK HEADPHONE OPTION POWER SC2 OUT L 2 OUT V lt SC RG6 47R C4691P8 C471 47016 4 RCATACK 10uF 16V 28 DA INI ADR DA 2 1000U16V 5 C472 SPEAKER 1 N GND 8 lo GND 6 3 FDS6675A 2K2 fuse direnc 1000U16V 7 7 HEADER 12V GND C j R466 R405 GND SW SPST 2 485 486 en C411 GND 100N 100016 100N lt R gt 4 lt 8 5 GND GND GND GND oe C422 4 HEADER R Components designated by the safety symbol should only be replac ed by original parts produced and proofed by the manufacturer lt SDASV gt 4 977 MAIN_R TDAISI7P SW1 y 0403 100N 435 220N 465 467 SPST A Sicherheitsbautelle im Sinn der sicherheitsbestimmung Diese Teile durfen nur durch Originalteile ersetzt werden ae 100U16V lt 449 10K ES on SN GND IN Contrassegno di sicurezza componenti devono corrispondere a ricambi originali e devono essere montati a regola d arte 25 OUT SUP DVSUP DVSUP DVSS ADR CL DVSS DVSS DS DA IN2 to speakers DV NC NC NC So FH12 50S 0 5S top contact INB POS Q403 GND 3 GND R437 BC848B GND 3 2 MUTE
2. MOLCON6 C425 220N 1N lt DDC_SCL_VGA cus gt SCLOUTR 1 502 IN R GNI GND EBL EBO EG7 c427 220N 2 SCLIN R 5 IN EG3 RG2 47 Ab E C417 RGB Sx SC1_OUT_L 4 RCA JACKS 412 2 2 GND ER7 c430 220N IN 1 ERS ____ d 419 SC2_PIN8 ER3 GND 43 3 5406 5 3 7 Ro_ ce oP RCAJACK Rat HEAD PHONE MODULE C433 220NC407 4 PANEL_POWER PANEL_POWER GND GND GND GND GND I c4 Ras SC2_OUT_R aa SCL OUT 1 Ha P F oO po P ScARrl RI 5V lt SCI OUT R 47016 CLE RG4 47R ND 2E ne Ae Xo 5 39R C941 R943 C2 DE E T E 330R 22P n 2 5 RIS T SC2_OUT_L SC2_OUT_R R942 RGS 47R SC2 R940 47n 100V 330R 1 39R EM RASS c437 5 IN TOOR H HEADER2X20 3 C468 68 3 GND SC2_IN_L 55 e9 SCI_OUT_L 6488 407 GND op SCI OUT R ERA 1 a cNp E scz OUTL E POR 2 XTAL_OUT SC2 OUT R T iyi TP 312 4 1 AUD_CL_OUT d 220N NC GND C460 D CTR IO 1 S408 D CTR 0 0 ADR SEL STBYQ 1b 7 HEADER LED_GREEN LED_GREEN SCI OUT V SC2 IN V
3. 10K 1 C484 47016 GNDGND GND Hs 100U16V INA POS INB NEG To Headphone 100U16V C4S0 1N GND Subject to change without notice L5A SPARE PART LIST POSITION BEKO CODE PART DESCRIPTION 0O56T14 AU1 LCDAUOPTRONICS T140VNO114 LCD TV 056T20 AU1 AU 2015 01 V 3 20 LCD TV 8R9107 AS SPEAKER4R5WLCDTV 8R9850 00A IACCESSORIEBOX 17 LCDTVBEKO POWER SWITCH LCD TV Y48120 1 5 CHASIS 20 DAUGHTER BOARD L5A VER Y48121 IL5ACHASIS 20 DAUGHTER BOARDCHCHI_ Y48913 ADAPTOR AC 15V 4 6A 20 CLASSI O Y92913 AC12V 5ACLASS 7 5850 00 ACCESSORIE BOX 20 LCD TV BEKO ______ 2691100 IL5ACHASIS 14 TOS P NXA KISNGA NT A OS ZF9187F IRCL5ATOSHIBAGRI SHINE SIP ED CT 873 264110 LSA CHASIS 20 TOS AU P NX 2 K S VGANT 20425501 IBACKCOVERTOSH BRI SIL P 20 LCDTVVGA_ 2ZH1183 CH1 INVERTOR 20 V201V1 T01 PLCD0318604H ZH6183 AU3 IINVERTOR 14 AUO TAILON TLI 04 0411 A2 zc5502 AS ICABLEPANELINTERFACE LCD20 CHIMEI_ Y56502 AS X KAB PANELINTERFACE LCD TV 15 MOLEXLSA _ ZC5513 AS CABLE PANEL INVERTORLCDTVFERRIT20CHI _ 8 9100 6 CABLELCDPOWERSWITCHL 350MM IC CHIP M24C02 MN6T 4 5 5 5V SO8 U602 FREQUENCY TABLE MHz Channel Number BG 1 DK 42978 6 18225 17525 1725 184 00 CH 8 19625
4. CO IO t LO 1 LO 1L LO KO KO CO KO KO KO KO KO KO CO P T P P 00 00 00 CO oO 00 0O OO 00 O0 O O O O O O O O O x szor 58 0 9 28505898 555855885988554585988 588580 gt 2 gt 112 2 gt gt oa aaa lt ouaccroaoood xona I gt UADD gt ENSF 5 sst 171 05 FO 44444404 OOGOGG 9 gt OO pe oo 86 5 2 gm5221 Pin Diagram AGND_ADC RESERVED AVDD_ADC 3 3 AGND_RED RED RED AVDD_RED_3 3 AGND_GREEN GREEN GREEN SOG_MCSS AVDD GREEN 3 3 AGND BLUE BLUE BLUE AVDD_BLUE_3 3 CRVSS CVDD_1 8 RESERVED VDD_RXPLL_1 8 GND_RXPLL RESERVED AVDD_RXC_3 3 RXC RXC AGND_RXC AVDD_RX0_3 3 RX0 RX0 AGND_RX0 VDD_RX0_1 8 AVDD_RX1_3 3 RX1 RX1 AGND_RX1 VDD_RX1_1 8 AVDD_RX2 3 3 RX2 RX2 AGND_RX2 VDD RX2 1 8 AGND REXT AVDD IMB 3 3 VCLK GPIO23 VDATAO GPIO22 VDATA1 GPIO21 VDATA2 GPIO20 VDATA3 GPIO19 VDATA4 GPIO18 VDATA5 NC Vide
5. 582995205 84 lt lt lt Q 944967 ES 599 FOS 4 lt lt lt lt lt 0 SSSI 99 lt lt GSG agoooooo gt gt gt gt 2 KK LK STOOL amp gt gt gt 2 gt 2 gt 2 gt 2 gt 2 gt oO oO 1 RR RRR RA ee ee ee eee ee LEE 156 2 155 3 154 4 o 153 5 152 6 151 7 150 8 149 9 148 10 147 1 146 12 145 13 144 14 143 16 141 17 79 140 20 137 21 gt 136 22 lt 135 23 134 24 133 25 132 26 o 131 27 130 a p 29 128 30 127 31 126 32 125 33 mi 124 34 123 35 122 36 NO 121 37 120 3 14 39 118 40 117 gt 115 42 113 45 112 46 111 47 110 48 109 49 108 50 107 51 106 52 y 105 OO OO Q O Q
6. Green Analog Component N Component SUPCAFSUPPLYD Supply Voltage Digital Decoupling Circuitr SUPD Supply Voltage Digital Circuitry 2 lt 5 B1 CB1IN 1 Y1IN 1 CR1IN 2 CB2IN 2 Y2IN 2 CR2IN SGF lt lt NDD Ground Digital Circuitry GND CAP SUPPLYD Ground Digital Decoupling Circuitry a CO no IN OUT Main Clock Output 20 25 MHz a EST GAV COEQ FIE FWE FRSTW 22 FFRE 23 24 CLK20 om 1 Slain 88 o Pin GND 26 V SUPPA BUPPLYD 28 IN OUT 29 V SUPLLCBUPPLYD 30 GND LLC BUPPLYD U U U 3 34 4 35 GNDY BUPPLYD 3 Kc Y GNDY 6 BUPPLYD yo ee yo CD lt 37 38 Y2 39 Y1 lt glee os 44 C4 45 VSUPC BUPPLYD OU OU OU OU OU OU OU OU 46 GNDC BUPPLYD 48 Short Description Ground Pad Decoupling Circuitry Picture Bus Luma Picture Bus Luma Y Picture Bus Luma Y Picture Bus Luma Y Picture Bus Luma Picture Bus Luma Ground Luma Output Circuitry Y Picture Bus Luma LSB Supply Voltage Luma Outpu
7. BEKOI COLOUR TELEVISIONS L5A TFT LCD TV SERVICE MANUAL CONTENTS Safety instructions Technical specifications Panel Specification Chassis block diagram Scaler block diagram Block diagram of power supply Chassis overwiev Service mode items and explanations Data sheet of important IC s Recommended Part List Frequency list of channels PAGES 12 17 29 30 SAFETY PRECAUTIONS GENERAL GUIDELINES 1 Always use the manufacturer s replacement safety components The critical safety components marked with V on the schematics diagrams should not be by other substitutes Other substitute may create the electrical shock fire or other hazards Take attention to replace the spacers with the originals Furthermore where a short circuit has occurred replace those components that indicate evidence of overheating 2 After servicing see that all the protective devices such as insulation barriers insulation papers shields and isolation R C combinations are correctly installed 3 When the receiver is not being used for a long time of period of time unplug the power cord of the Adaptor from the AC outlet Color TFT LCD Module is very sensitive both electrically and physically Users therefore are requested to follow the Guidance of handling color TFT LCD Module on the followings 1 Be careful not to make scratch on the polarizer Surface of polarizer is soft and can be physically damaged easily
8. Please do not touch push or rub polarizer surface with materials over HB hardness 2 Keep clean the surface Please wear rubber glove when touch the surface of LCD screen Please use soft and antistatic material as cleaner 3 Keep out of water Water on in the LCD may cause electrical short or corrosion Please wipe out dry or water carefully 4 Prevent swift Temperature amp Humidity change Instantaneous temperature and or humidity change can make dew or ice which cause nonconformance such as malfunction 5 High temperature amp high humidity reduce the life time LCD is not proper to be used at high temperature and high humidity Please keep specified temperature and humidity condition 6 Keep out of Corrosive Gas Corrosive gas effect the polarizer and the circuit chemically and cause defects accordingly 7 Electrostatic discharge can make Damage There are electro static sensitive components such as CMOS in LCD Module Please earth human body when handle the LCD In addition please do not touch the interface connector pin with bare 8 Do not operate for a long time under the same pattern Operating LCD for a long time under the same pattern can cause image persistence and can damage it Please follow following guidance 1 Turn the power off when do not use 2 Change the pattern periodically L5A TECHNICAL SPECIFICATION PAL B G I D K SECAM Adaptive 4H 2H Upto SXGA at 75Hz 8 to 10 bit L
9. SV 12V 10 SV_STBY U603 LMIII7 4 3 3V_STBY S1 DI PANEL POWER gt 3 3V_STBY Gl DI 2 02 9 Trio G2 D2 SI9933ADY 204 C205 93207 470016 C200 100N 100U16V GND GND Q200GND BC848B R200 470R GND100N GND R203 SCLSV SCLSV CVBS lt SDASV 0605 LM1117 1 8V 2 SV_STBY SV_STBY 1 8V_STBY GND C206 100N 100U16V TUNER_PHILIPS Q202 Q201GND BC858B BC848B R202 470R SC1_OUT_V gt 208 470 GND LM1117 3 3V IN OUT ADJ 628 100U16V 100U16V SUBWOOFER 3 3V_STBY 3 3V_AVDD 1500 10uH omn C500 Less d _ Lag Zo C543 lL T 22U E 100N B IOO
10. 152 GPIO1 VOACON gt 100R OR R 2 ee gt I Ora YCOE gt LED_RED EBO Ve Be 182 GPIO3 lt VS_PC gt 155 VSYNC GPpIO4 L833 LED _EIL gt gt ADC_TEST RESERVED 88 EB2 GPIO5 lt ST BY gt 118 GPIO6 8 SPLWE 549 9 5 5 Aus GPIO7 IRQin BANY 100R 3 3V_STBY 192V TB IOOR 5509 _ aa RT GPIOS RQout ARE M FB SC gt 1504 3 3V_AVDD 92SCL3V Lo 45V STBY 1 EBG R506 GPIO9SCL lt SCL3V gt P _____ RMADDRO 208 RXL GPIOI SDA SPAY O SDA3V 2 SCLSV OR mE IK L504 2 RXO d GND 3 lt SCLSV EGO RMADDRI 3 3V_DVDD dn RX0 m BRTADI 4 0501 SCL3V 10K RXC GPIOII PWMO 548 2TED 5 Iz EG2 RMADDR2 ouis 539 lt RXC GPIO127PWMI 521101 KEYBOARD 6 EG3 10K GPIO13 PWM2 lt 5221 102 FRESE 7 2N7002 EG4 RMADDR3 GNDIOON 250R 1 CLKOUT RESERVED GPIO14 PWM3 MUTE gt OMNES GND 8 534 535 EGS 206 510 10 F m US01 R511 MOLCON8 RMADDRS M29W040B70K1 REXT eprols E e 10K RMDATAO 13 12 RMADDRO RMADDR17 183 0500 45V STBY 4 D 33V STBY Dot P RMADDRI RMADDR O 17 RMADDRIG 184 EAD RESERVED VBUFC_RPLL BC848B R513 10K 2 10 RMADDR2 RMADDRIS 185 3 VBUFC DVI RESERVED RMADDR6 DQ2 A2 ROM ADDRIS 536 ER3 9 RMADDR3 RMADDR14 186 DQ3 ROM_ADDR14 GND 537 10K ER4 8 RMADDR4 RMADDRI3 1
11. 19125 19125 20000 CH 9 20325 19925 199 25 20800 13 5375 4575 19625 CH 4 6225 5375 21025 CH 15 8225 6175 CH 166 155 6975 J CH 17 1825 9525 2 CH 8 925 9 202 CH 9 21025 Channel Number BG 1 wit 711 25 719 25 727 25 735 25 H 743 25 H 751 25 759 25 767 25 775 25 60 78325 78325 78325 78325 791 25 799 25 807 25 815 25 823 25 66 83125 83125 83125 83125 839 25 68 84725 84725 84725 84725 69 85525 85525 85525 85525 70 86325 86325 87125 722 5792 1 88725 16000 74 6925 17200 75 7625 22000 76 8325 23200 77 9025 24400 9725 25600 79 5925 26800 80 9325 28000 116 75 128 75 140 75 152 75 164 75 6 14025 143 25 14325 176 75 188 75 8 15425 15925 15925 200 75 9 16125 16725 16725 212 75 224 75 236 75 248 75 260 75 4 25225 26325 263 25 27275 T TT 2 x las fasi 2 2 2 2 CH ORE CH CH CH CH CH CH CH CH _ CH CH CH CH CH
12. 390P 2 GNIP2U GNDIOON GNDIOON Bonn GND GND GND U100 GND GND GND R102 3 3V_M 33V M lt CVBS_TXT gt PEEPI L102 d A Ae 7 2 2 E 2 10uH C312 C307 C308 TM me R117 gt 145 C144 U301 GNDIOON GNDIOON 22K gt gt 100U16V 100N GNIP2U GNDIOON GNDIOON m RES Rp SDA5550 A0 18 U300 ad 63 19 29LV040 n SS moma 3 608HM601 m2 58 gt gt gt gt PL 66 17 K6T1008V2E TB an A A0 poo 2 bo P0 3 Al DQI GND vox mi SA omm C142 P0 5 15 A mE Al 8 102 73 m an 4 129 P0 6 A14 A2 103 i 4 DQ4 lt SVHS_Y 73 A13 17 25 D3 5 15 27 05 x 7 72 22 P0 7 A13 A3 104 A5 DQ5 VINI 72 12 4 16 26 D4 AG 14 28 D6 lt SVHS_C C100 zd on Pio AS 15 105 27 5 AT 3 AT po7 D7 sm 10N P1 1 10 1 83 a gt A6 4 A6 107 28 Ds 48 3 C130 C131 73 Ao 7 A9 E 7 3 147 29 D7 ZNAD 277125 lt SC2 IN V itr Si SH VIN2 P13 ag _ AB E E A8 A T 10 lt re VIN3 m A 114 7 10 31 1m AID 12 pn 7 76 All 1 ii A13 4 A13 C132 470N 75 6 8 5 12 12 1 A14 5 SNY A2 63V VIN4 PL 80 A4 A13 4 15 A mo SIE a lt FB TXT P3 1 a 3 7 AIS 17 5 16 18 G1 Y1IN A15 30 3
13. S VHS input RCA input and analog PC video input The analog RGB signals coming from the PC input via D Sub15 connector P401 are directly connected to the gm2221 analog input port One EDID IC U400 is provided on board to support VESA standard plug and play compatibility the board high quality video decoder 0100 is provided VPC3230D of Micronas to process video inputs coming from the video sources The video processor can process 3 composite video inputs and 1 S Cideo input from the NTSC PAL video sources The CVBS output recovered from the tuner module is made available to one of the video inputs of the video decoder The digitized video output in ITU 656 format from U100 is fed to the dedicated video Port of gm2221 for decoding and processing Gm2221 makes it possible to perform scaling and de interlacing for the video input A 4Mbit serial flash ROM U503 is used for storing system firmware Also the footprint for a parallel flash ROM which can be upto 2Mbits is available on the board This option can be used either for development or for production purposes The gm2221 provides direct connect via the integrated LVDS transmitters to LCD panels with integrated LVDS receivers Both single LVDS via S503 and double LVDS via S502 panels can be supported directly from the L5 A main board For single LVDS panels only 503 connector is soldered on the main board which is a 20 pin connector For Double LVDS panels
14. only S502 connector is soldered on the main board which is a 30 pin connector For supporting different LVDS panels different LVDS cables either single or double LVDS can be made used For supporting different single or double TTL panels a daughter board interface is used via 40 pin S506 connector On this connector the signals are 3x8bit RGB with TTL control signals i e HSync VSync CLK O E etc to support a wide variety of LCD panels Depending on the panel used different daughter boards will be used to support that particular panel For single TTL panels the daughter board will just be a routing the RGB and control signals to the particular connector interface for that particular panel For double TTL panels there will be two LVDS receiver IC s on the daughter board double TTL is not directly from GM2221 but double LVDS is supporter due to IC packaging problems to demodulate double LVDS signal into double TTL signal The LCD panel resolution supported can be up to SXGA at 75 Hz or UXGA at 60 Hz It is important to note that at any point in time gm2221 could drive only one type of Panel When LVDS Panel is connected to connector S503 or S502 ensure that the panel backlight is connected to S508 The integrated PWM output from gm2221 is used to control the LCD panel backlight intensity for dimming functions The on screen display is implemented using OSD capability of gm2221 Infra Remote IR controller connector S507 is provi
15. processing de interlacing using spatial VT vertical temporal diagonal interpolation The on chip turbo x86 micro controller is used as the system CPU The on chip OSD controller is available for creating bitmapped OSD menus The keypad buttons utilize the input of the on chip low bandwidth ADC Software IR decoders is used with an external remote controller One of the on chip PWM outputs is used for controlling back light intensity e Integrated LVDS transmitters to LCD panels with integrated LVDS receivers The LCD panel resolution supported can be up to SXGA resolutions 6 LCD PANEL INTERFACE The L5 A board can drive panels both with LVDS and TTL interfaces The footprints for single LVDS and double LVDS connectors are available on the board S503 and S502 respectively Either of these connectors can be used without any changes on the board The TTL interface is supported by a daughter board S506 is the connector for the daughter board For the TTL case connecting the daughter board to the connector will be sufficient A Hirose 30 pin connector S502 is used for double LVDS link from the board to various LVDS panels This connector can also be used for single LVDS but another connector footprint S503 is available for single LVDS purposes Using only S503 for single LVDS panels decreases the cost The LVDS traces are routed differentially from the gm2221 IC to the connector These are 100 Ohm differential traces 5 SERVICE MENU
16. 0 3 P3 4 CSI ise NDI MS 7 RI CRIIN P3 5 4 DD 4 OR 1305 6 WE 7 _ 5 B2 CB2IN i 6 D6 33V Kis OR WE 2 2 Y2IN 8 D5 7RAMRD 7307 32 8 WPC3230D En D LH awe 5006 8 27 INV 12 D3 gt 307 a LLC2 58 D 5 II D2 LLC1 OR TP100 P23 pi 2 DI 78 53 C143 7 D0 uc GND DO 123 REP E 57 4 10 P42 p C139 10U P4 3 GND FF n LM GND P4 7 VS OE 124 47N 5622 lt CVBS_TXT CVBS 100 66 MSY HS R113 HSSC 18 VRT FSY HC 3 __ 4K7 100N ROE FPDAT 100P XTAL2 300 ENG XTALI RST 16 17 p SND _ D3 D2 R ESEN ZD SCL G D5 x DO SDA CLKS B A3 IPSEN A4 A3 XTAL2 FFRSTW Als HE XTALI FFWE E a gt ALB DCSEL s ar a Ai 10 lt TEST HEADER2X16 20 25MHz ANZAZLZAZLZZZ 9 2 3P3 GND 599999999494 1100 lt 10K 24LC16 GND 1N4148 DAUGTH ER BOARD 2 IN biol kis KEYBOARD MODULE OPTION SCLIN V gt 5 J Vs FERRITE BEAD um 3 R 3 R409 SR 10uF 10V as 2 GND GND IOuF 10V ISOR LED BLUE 33V GND gp RED 3 IR CONN DIN4 24LC02 4 o 1 400 i f SCART 1 C414 lt DDC SDA VGA
17. 87 STI TM2 RESERVED RMADDR7 DQ4 A4 ROM ADDRI3 10K ER5 DOS As CZ RMADDRS RMADDRI2 188 ADDRI2 CRVSS RESET ERG RMADDRS 006 6 RMADDR6 RMADDRII _ 189 ADDRIL CRVSS OK ERT 3 RMADDR7 RMADDRIO 192 CRVSS FL SDA3V RMADDR9 DQ7 AT ROM_ADDR10 4 CLK As 27 RMADDRS RMADDR9 193 ROM ADpgo CRVSS NS RMADDRIO 26 RMADDR9 RMADDRS 194 CRVSS lt SDASV A9 3 3V_DVDD ROM_ADDR8 M HS NADOR Ajo 23 RMADDRIO RMADDR7 195 7 CRVSS 1506 DE AM 25 RMADDRII RMADDR6 196 ROM ADDRG CRVSS 45V STBY 8519 jok 4 RMADDRI2 GND RMADDRS5 197 ADDRS CRVSS OR 28 RMADDRI3 RMADDR4 198 ADDRA CRVSS 10K RADDRI3 L 29 RMADDRI4 RMADDR3 199 ROM apps CVSS Als 3 RMADDRIS RMADDR2 200 ADDR CRVSS 10K RMADDRI4 415 2 RMADDRI6 RMADDRI 201 ADDRI CRVSS AD RMADDR17 _ 202 ROM ADDRO GND_RPLL R522 10K SMATDDRIS 18 GND_ADC 3 3V_AVDD Components designated by the safety symbol should only be replac ed by original parts produced and proofed by the manufacturer C GND 10K ROM_OEN 5 ee RMADDRI6 SOM WEN 3 ROM Sicherheitsbautelle im Sinn der sicherheitsbestimmung Diese Teile durfen nur durch Originalteile ersetzt werden 10K er RMADDRI7 ROM_CSN ROM CSn S500 C di 1 id d H bi ini li d 1 173 ontrassegno di sicurezza componenti devono corrispondere a ricambi originali devono essere montati a regola d arte 10K
18. CH CH CH _ CH CH CH CH n Channel Number BG 1 DK wi ns oper qon 3025 30325 311 25 319 25 327 25 335 25 343 25 351 25 359 25 367 25 375 25 383 25 391 25 399 25 407 25 415 25 423 25 43125 439 25 447 25 4 4625 46325 46325 46325
19. ELETEXT NO TEXT FAST FAST amp TOP e MSP CLIP REDUCE VOL REDUCE TONE COMPROMISE DYNAMIC TUNER TYPE One of two supported tuner can be selected from this item System must be restarted for this change to take effect TELETEXT NO TEXT Teletext is totally disabled TXT MIX button will not be functional AUTO picture format mode will be disabled in RF F AV and SHVS modes Naming and sorting functionality during Autoprogramming will be disabled FAST TOPtext functionality will be disabled FAST amp TOP TOPtext functionality is enabled TIMER MODE If OFF TIMER is selected the user will be able to enter time of the day info for the TV to switch off If SLEEP TIMER is selected the user can specify some time period after which the TV will go to stand by automatically MSP CLIP This selection identifies which method will be used by the sound processor to prevent clipping effects on volume Details can be found in data sheet msp34x0g_4pd pdf page 30 AUTOPROGRAMMING When the user selects the Autoprogram item in Setup menu Country Selection menu is opened The user must select a country before the Autoprogramming starts Broadcast system will be selected according to the country selected Broadcast systems according to countries BELGIUM BG CROATIA BG CZECH REP DK DENMARK BG FINLAND BG FRANCE L BG GERMANY BG GREECE BG HUNGARY DK IRELAND ITALY BG NETHERLANDS BG NORWAY BG POLAND DK PORTUGAL BG SPA
20. IN BG SWEDEN BG SWITZERLAND BG TURKEY BG UNITED KINGDOM For countries France Belgium Switzerland autoprogramming is done twice For Belgium and Switzerland first BG channels will be searched after the search in BG is done searching will restart for L standard If the selected country is France the sequence of standards is reversed thus first L then BG TELETEXT LANGUAGES L5A SW decides which teletext language group will be used for teletext decoding according to the country selected for autoprogramming Teletext languages according to countries EAST EUROPE CROATIA CZECH_REP POLAND WEST EUROPE BELGIUM DENMARK FINLAND UK FRANCE GERMANY IRELAND ITALY NETHERLANDS NORWAY PORTUGAL SPAIN SWEDEN SWITZERLAND HUNGARY TURKISH GREEK GREECE TURKEY PC MODE PC mode can be entered by pressing PC button on the remote controller User can return back to TV mode by pressing the PC or TV buttons After the switching to PC mode VGA input will be displayed on screen as soon as the mode input resolution and frequency is determined If there is no input from the VGA input NO SIGNAL dialog will be displayed for 15 seconds At the end of this period if there is no signal from VGA input the TV will go to Sleep State While in the sleep state the TV will keep monitoring the VGA input If VGA signal is detected the TV will wake from Sleep State to PC mode Alternatively the user may select to switch the TV o
21. LBADC INI GND 7 LBADC_IN2 ur 6 304 ROM_DATA7 LBADC_IN3 lt SC2_PIN ADJ 0503 541 T csse 5 ROM_DATA6 LBADC_RETURN GND y 5 4 RMDATAS __207 5 ak L GND 6 3 ANRA EEEE EE NEU ND 5 ROM_DATA3 55555555 GND 8 12 1 3 3V_DVDD RMDATAI ROM_DATA2 Gx GND 9 ROM DATAT SQQQQ 0 MOLCON7 ROM_DATAO 50900099005 RMDATA0 7 99999999999 vc 12 GND gt 22222222222 53398 1290 5V GND 0502 10K gt 0 7 gt 33 _5 529 TP534 U503 GND R502 9504 ROM CSN il 8 gt 3 SCL BC848B CE 33V DVDD R543 5 4 5 RMADDRIS 2 7 GND SDA 100R R544 SO HOLD 3 3V_DVDD R533 505 SPL WE 3 6 RMADDR17 5 BLK EN Q5 33V DVDD 4 77 WP 5 5 RMADDRIG 10K 24 16 R503 BC848B 10K GND vss SI lt YUV O 7 gt SDA3V 25VF040 GND 100R Subject to change without notice 0 8 96 14 20 LCD TV VIDEO m TELETEXT 3 3V lt 1101 104 5 lt is UR C105 C106 CI 108 TR UP C310 1 cao 100U16V C126 a GNIP2U GNDIOON GNDIOON GNDIOON 100U16V 42 5V eus C121 C136 C122 GND C311 C304 R101 C135 T oNT INS 390P 220 INS lt SC2_OUT_V Q100 C137
22. LV_O CHOP_LV_O EB2 24 1550 RGS04 AGND_IMB CHON LV OfB3 L 3 DFI4A 30P 1 25C C705 45V STBY AGND_RX2 add AGND AGND_RXO Ene AGND_RXC ERG AGND BLUE EB AGND GREEN RCATR i95 AGND RED E EB2 C548 158 AGND ORO ITAG RESET 37 EBI T a AGND_RPLL ORI RESERVED EG7 MEE EG6 136 LBADC_GND OR2 RESERVED EGS d is EG4 1 GND_RXPLL OR3 RESERVED EG3 10 EG2 549 500 170 OR4 RESERVED 61 90 100 4 14318MHz 169 ORS RESERVED ER7 ER6 3 3V_AVDD XTAL OR6 RESERVED ERS is 16 ER4 sp ORT RESERVED c ER3 E ER2 71 OGO JTAG_TDO ERI gt ERO 72 HOST SCL UART DI OGI RESERVED PANEL_POWER PANEL_POWER 77 HOST_SDA UART_DO OGS TTAG 5 1 21 22 1 lt DDC_SCL_VGA gt zg DDC_SCL_VGA 5 23 24 DDC_SDA_VGA 3 3V 0205 5 47 DE gt RT 5V 8 1050 DDC_SDA_DVI DEN 7718 HS 218359 BC848B 59 30 C534 DHS 565 VS T VS gt TP564 HS 313 GND RESETn 5 R500 563 2 47R 29 2 lt DDC_SDA_VGA gt lt BLUE BLUE e j GND EL 37 38 lt BLUE 0 45 BLUE PPWR es EN gt EN dey aga 39 40 2 509 5 SOG_MCSS PBIAS A gt 147 HEADER2X20 GREEN GREEN S 148 R501 GND lt GREEN 81 a RED gt Hl GPIOO d 1546
23. N 100N DECO 1 100N 100N 220P T 3 3V_STBY _ GND 3 3V_DVDD AVDD 1 8 CVDD 1 8 i 5503 C520 Cs38 C513 C314 _ C515 C516 C519 2 8502 2207 T 100N T 100N 100 T 100N 100N 100 GND 3 1 RG300 2 3 GND 4 1 8V_STBY CVDD 1 8 33 AVDD 33 DVDD 5 1502 6 Y NY 7 So tt Le ee Tem le Tos los es Tos os AVDD LV E 33 ki AVDD_LV_E 33 aaa BK1608HM601 gt gt gt VCO_LV RESERVED L700 22U 100N 100N 100N I100N 100N 100N 100N 220P 220P AVDD lv 33 gt Gee HRI GND AVDD_LV_O 33 gt HIN LV HERI RG47R 1 8V_STBY AVDD 1 8 AVDD LV 33 CKP HERO AVDD_IMB_3 3 1503 AVDD R33 CLKN_LV_E ER3 0502 703 CH2P LV E ER4 EGO 100U16V 10uH C540 AVDD 3 3 CHIN LV BERS 5 C529 530 531 532 533 C546 0547 AVDD 0 33 2N_LV_E ERS 220 1004 100 1005 100N 100 220 220P AVDD_RXC_3 3 lt PANEL POWER PANEL POWER i 20 h gt CENE LV E EGO A 20P 1 25C X 33 E GND AVDD RED 33 LV GNDL 2L RG47R AVDD ADC 33 RG503 RG47R LBADC_VDD_3 3 CH3P_LV_O EG2 Lay BG AVDD RPLL 3 3 CH3N LV O EG3 U700 CLKP LV O EG4 AVSS LV E CLKN_LV_O EGS 733 2 lv 2 33 1526 27 1608 601 30 CH2P_LV_O EG6 UR AVSS IV E 34 1527 28 EBI L701 AVSS_LV CH2N_LV_OIEGT 7735 OR 29 2 CHIP_LV_O EBO OR 1528 2 15 STBY AVSS 36 1529 30 EB3 CHIN LV O EBI 220N AVSS_
24. ORY MEMORY 29 040 25 40 OPTIONAL 505 PROGRAMING CON L5A POWER SUPPLY BLOCK DIAGRAM 3 3V STBY LM1117 3 3V 15V STBY 15V 12V LM2576 LM1117 1 8V STBY 1 8V U605 LM117 3 3V 0604 INPUT 12V FOR 14 15 17 INCH U602 15V FOR 20 22 INCH SDI9933ADY 24V FOR 23 INCH ONLY FOR 23 ONLY FOR 20 22 23 5602 Panel Power PNL EN Power STBY L5 A Low to Mid End LCD TV BOARD OVERVIEW L5 A Low to Mid End LCD TV board incorporates the LCD Controller gm2221 to create a high quality stand alone LCD based TV system for consumer applications Figure 1 illustrates the Block diagram of the board This board supposed to have two versions 1 Low End to drive 14 15 4 3 panels 2 Mid End to drive 17 20 4 3 and 17 22 23 16 9 panels LOW TO MID END LCD TV WITH GM2221 Graphics Upto SXGA at 75Hz UXGA at 60Hz GM2221 ADC PLL ITU 656 ine De interlace Decoder Scaling 24 bit TTL VPC 3230D MCU X86 HS VS DE Scart RGB FB bi OSD 4bit pixel Upto SXGA at 75Hz 2 LVDS Tx 5V 3 3V2 5V1 8V Decoder porn MSP 3410G amp Lineer Regulators Teletext Decoder MC SDA5550 84 gou X9 alaL Figure 1 System Block Diagram L5 A board supports 5 types of video and graphics inputs These inputs are Analog terrestrial tuner input for multisystem PAL SECAM transmission SCART input x2
25. Service Menu is entered by pressing 9 3 0 1 keys on the remote controller when the Picture icon is highlighted in the Main Menu Service Menu has 3 sub menus These are e Options e Adjustments e Selections Navigation through these menus can be done by pressing OK button Every adjustment made in this menu is saved automatically OPTIONS Options are adjustments that the user can select On or Off BG DK e e LL e SCART 2 FAV SVHS e HOTEL MODE e STAND BY e MSP CARRIER MUTE e WSS SCART e FIRST ATS BG DK I L Enabling or disabling these options will remove add these standards to Manual Install menu SYSTEM item SCART 2 FAV SVHS If a source is disabled in the Service Menu it will be skipped during source switches If SCART2 is enabled SW assumes that the FAV source share the same path as the SVHS source on the HW If it is disabled it is assumed that FAV and SVHS share separate paths TUNER and SCART1 are enabled by default HOTEL MODE Enabling Hotel Mode has two effects First SETUP menu is no longer accessible by the user Second maximum adjustable volume value is limited to HOTEL VOLUME value This value can be adjusted in the ADJUSTMENTS sub menu of the Service Menu STAND BY If this Option is OFF the TV will stay in Stand By mode after a Power On If this Option is ON the TV will recall its last stand by status before the Power Off and switch on from Stand By automatically if the last st
26. UT YES Receiving System Comb Filter Gamma Correction Histogram Equalization Stereo Decoding German A2 Nicam BTSC Stereo L RIn Stereo L R Out German A2 Nicam 3 2x3W 2x5W for 22 W Audio Output Power RMS in at 10 THD Level 1 5 2 5 Teleweb Teletext 1 5 Fast Top Simple Simple Fast Top Page Memory 250p or 10p Teletext Picture Formats 4 3 16 9 14 9 Panorama LetterBox Subtitle etterbox WSS Wide Screen Signalling ATS Automatic Tuning System Manual Search Number of Program Storage No Ident Timer Picture Freeze Frequency Search Channel Table Search Zapping AVL Automatic Volume Level Sound Status Memory Picture Status Memory Child Lock Program Lock Picture Format Switching Thru Pin 8 Auto RGB Detect Thru Pin 16 PC Plug amp Play DDC CI Off Timer Sleep Timer On Timer Timer Picture Smart User Soft Natural Rich Sound Smart User Music Sports Cinema Speech Scart S video DIN AV In 3 RCA AV Out 3 RCA ee m sexrs SmpeFas Top NE eg ss Wide Screen Signating e ATS Automatic Tuning System MamuiSemch haa Search Number ot Program Stora _ Picture Freeze SSS SS Emme E mem ll AVL Automatic Volumeteve sl Program Lock Picture Format Switching Truna Auto RGB Detect Th
27. anagement ACM II provide flesh tone compensation and image enhancement for video preset modes like sport nature e Adaptive Contrast and Color ACC ensures full dynamic range is used in video content On chip Versatile OSD Controller e On chip RAM for high quality programmable menus e 1 2 and 4 bit per pixel character cells e Horizontal and vertical stretch of OSD menus e Blinking transparency and blending e Supports two independent OSD menu rectangles e Proportional fonts Embedded X86 On chip Microcontroller e High performance X86 MCU with on chip RAM and ROM e External parallel ROM or serial SPI ROM interface e Unified memory architecture simplifies chip programming 23 general purpose inputs outputs GPIOs available e 2 wire serial bus master to control NVRAM video decoder e Two DDC2Bi ports with DMA buffer to internal RAM e Four PWM outputs for analog backlight control audio etc e General purpose ADC s for keypad and temperature sensing e Integrated reset circuit e Slow clock mode for 50mW sleep mode power consumption e JTAG debug support for firmware debugging Built in Test Pattern Generator e Simplifies manufacturing test Energy Spectrum Management ESM e Digital clock spectrum management e Eliminates EMI suppression components and shielding Built in LVDS Transmitters e Four channel 6 8 bit LVDS transmitter e Support for 8 or 6 bit panels with high quality dithering e Single
28. ate was Stand by On MSP CARRIER MUTE If this option is ON sound processor s carrier mute functionality will be enabled The MSP will mute the sound automatically if the signal quality is bad Setting this option Off will disable this functionality WSS RF WSS SCART Automatic picture format switching for WSS and Pin8 can be enabled or disabled through this option If WSS SCART is set to OFF AUTO picture format mode will be disabled for SCART1 and SCART2 modes Pin8 source switching will still be operational but no picture format changes from Pin8 voltage level will be ignored ATS If this option is set to ON TV will display Country Selection menu in the next start After some country is selected the user will be prompted for the start of AutoProgramming process ADJUSTMENTS This sub menu contains numeric adjustments These items are e WHITER e WHITE e WHITE B e PRESCALE FM PRESCALE NICAM PRESCALE SCART e HOTEL VOLUME WHITE WHITE WHITE B These are used for color bias adjustment Unlike other items in the service menu changes will take effect immediately PRESCALE FM PRESCALE NICAM PRESCALE SCART These are prescale values that will be used for the initialization of the sound processor MSP at the next switch on HOTEL VOLUME This value is used as the volume limit when the Hotel Mode is on SELECTIONS This sub menu contains selections e TUNER TYPE SAMSUNG PHILIPS e T
29. ction Black line detector Scan velocity modulation output Video Decoding High performance H V deflection Horizontal scaling 0 25 to 4 Separate ADC for tube measurements Panorama vision EHT compensation Black level expander Dynamic peaking Miscellaneous Soft limiter gamma correction Color transient improvement One 20 25MHz crystal few external components Embedded RISC controller 80 MIPS 2 Bus interface Single 5V power supply Submicrom COMS technology 64 pin PSDIP package Block Diagram VIN1 VIN2 VIN3 VIN4 VOUT RGB YCbCr RGB YCbCr Analog Front End Adaptive Comb Filter Color Decoder NTSC PAL SECAL Saturation Tint 2D Scaler PIP Panorama Mode Contrast Brightness Peaking Output Formatter ITU R 656 ITU R 601 Memory Control ANALOG Component Front End 4x ADC Processing Matrix Contrast Saturation Brightness Tint SYNC Clock Generation 20 25 2 O Y OUT O CrCb OUT O YCOE FIFO CNTL LL Clock H Sync Vsync CNTL AVIO Video Processing VPC3230D Pin Pin Name Type Short Description N _ Analog Imou N Analog Component Inour NN Reaticr analog Component moui Bea cb2 analog Component
30. ded as a primary control interface for connecting IR detector to the GPIO of gm2221 An IR remote controller unit and detector provide remote OSD menu access at user convenience A keypad connector S507 is provided which utilizes the integrated low bandwidth ADC gm2221 for scanning 5 6 keys menu V V P P keys standard source key optional on the keypad The keypad allows access to the OSD without using the remote IR controller The L5 A board also has In System Programming ISP capability for the external flash ROM using DDC2Bi This be done using the D Sub 15 PC connector on the board ISP can also be performed using G probe through the RS232 interface One channel of the dual channel FET power switch U602 is used to control the power sequencing to the LCD panel Depending on the type of the panel the input voltage to this FET device can be chosen as shown below For 3 3V panels J601 is soldered on the main board For 5V panels J600 is soldered on the main board 12V panels J603 is soldered on the main board An LM2576 a step down regulator IC U600 is used to generate the main 5V_STBY voltage on the board This IC can deliver up to 3 Ampers of 5Volts There is no stand by control for this regulator which means this is always on soon as power is supplied to the board U603 3 3V_STBY and U605 1 8V_STBY linear regulators are used to supply the voltage necessary for the GM2221 IC and some perip
31. double wide up to SXGA 75Hz output Pin swap odd even swap and red blue group swap of RGB outputs for flexibility in board layout Highly integrated System on a Chip e All system clocks synthesized from a single external crystal e 50mW power saving mode e 5 Volt tolerant inputs e Two Layer PCB support e On chip reset feature to eliminate external reset component e Integrated Schmitt trigger for HSYNC and VSYNC PACKAGE e 208 pin PQFP 3 3V 10 1 8V core power supplies 2 gm5221 Pinout The gm5221 devices are packaged in a 208 pin Plastic Quad Flat Pack ROM_DATA3 ROM_DATA2 ROM_DATA1 ROM_DATAO ROM_OEn ROM_WEn ROM_CSn CRVSS CVDD_1 8 RESERVED AVDD LV E 3 3 AVSS LV E LV E ERO CH3N LV E ER1 LV E ER2 CLKN_LV_E ER3 CH2P_LV_E ER4 CH2N_LV_E ER5 CH1P_LV E ERG CH1N_LV_E ER7 CHOP_LV_E EGO CHON_LV_E EG1 AVSS LV E AVDD LV E 3 3 AVSS LV AVDD LV 3 3 AVDD LV O 3 3 AVSS LV LV O EG2 CH3N LV CLKP LV O EG4 LV 5 CH2P_LV_O EG6 CH2N_LV_O EG7 CH1P_LV_O EBO CH1N_LV_O EB1 CHOP_LV_O EB2 CHON_LV_O EB3 AVSS_LV O AVDD_LV 3 3 CVDD_1 8 CVSS EB4 EB5 EB6 EB7 DEN DHS DVS RVDD_3 3 CRVSS NIC ok mo ook oo toc Ede 2 a5 2 62 09 02 0 09 02 02 02 rrer
32. eatures General Feature selection via special function register Simultaneous reception of TTX VPS PDC and WSS line 23 Supply Voltage 2 5 and 3 3 V ROM version package P SDIP 52 P MQFP64 Romless version package P MQFP100 P LCC84 External Crystal and Programmable clock speed Single external 6MHz crystal all necessary clocks are generated internally CPU clock speed selectable via special function registers Normal Mode 33 33 Mhz CPU clock Power Save mode 8 33 Mhz Microcontroller Features Bbit 8051 instruction set compatible CPU 33 33 MHz internal clock max 0 360 us min instruction cycle Two 16 bit timers Watchdog timer Capture compare timer for infrared remote control decoding Pulse width modulation unit 2 channels 14 bit 6 channels 8 bit ADC 4 channels 8 bit UART Pin Configuration P LCC 84 ROMless Version top view TVTEXT PRO SDA 55XX P LCC 84 BLOCK DIAGRAM Vcci2 53 3 Address 20 bit Data 8 bit Port 0 8 bit Port 1 TVTEXT PRO 8 bit Port 2 4 bit Port 3 8 bit Port 4 6 bit 028 9G 14 20 LCD TV LM2576 FBK 1602 54040 gt 5 _5 TCPQ9091PD28A 604 C600 5 1000U16V iooNGNDI ON OFF 2 GND GND D601 1N5820 100uH C617 1000U16V C601 100N 41792 2 L603 L201 10uH 208 C203 100U16Y 100N AUDIO OUT SIF OUT VIDEO OUT
33. herals These voltages are also available in stand by mode to power the microprocessor inside gm2221 LED IR receiver IC and EEPROM These devices are necessary to wake up the board from stand by state Second channel of the dual channel FET power switch U602 is used to control cut some voltages in stand by mode These voltages are 5V 3 3V and 2 5V These voltages are used by the video processor 32300 audio processor MSP 34x0G teletext processor SDA5550 tuner and some peripheral IC s and circuitry In order to limit the stand by power consumption these voltages are not available in stand by mode Also the audio amplifier TDA1517 is also in its stand by mode using its dedicated stand by pin The board employs MSP3410G a multi system audio processor solution from Micronas The system supports 4 audio input ports one of which is not used on the L5 A board Audio output is provided with speaker and headphone jacks S409 S401 provided on the board The sound IF signal from the tuner is connected to the audio processor directly 4 GM2221 LCD CONTROLLER The gm2221 IC is a highly integrated single channel scaler that can be used for both LCD monitors up to SXGA UXGA resolutions and rear projection systems with DLP and HTPS LCD engines up to 1280x720 720P Some of the key features include e Single processing channel e RGB and YUV signal processing with RGB to YUV and YUV to RGB color space converters e Video signal
34. n from Sleep State just like switching on from Stand by In this case the set will switch on from TV mode OPTIONS DEFAULT ITEM NAME VALUES OR VALUES SETUP OPTIONS eS sous FAV ON OFF ON CART 2 ON OFF Fav ONO ON SVHS ON OFF ON ow ow or BACKLIGHT POL ON OFF OFF FACTORY MODE ONOFF ADJUSTMENTS 0 255 a T PRESCALE SCART 0 127 27 HOTEL VOLUME 16 23 SELECTIONS PHILIPS Uae ne SAMSUNG FAST amp TOP TELETEXT NO TEXT FAST FAST amp TOP REDUCE TONE MSP CLIP COMPROMISE DYNAMIC DYNAMIC GENESIS GM5221 LCD TV CONTROLLER The gm5221 is an LCD TV controller supporting resolutions up to SXGA 1280x1024 The gm5221 leverages Genesis patented advanced image processing technology as well as a proven integrated ADC PLL and an Ultra Reliable DVI compliant digital receiver to provide excellent image quality gm5221 also integrates a microcontroller an OSD controller advanced color management and dual LVDS transmitters 1 1 gm5221 System Design Example Figure 1 below shows a typical dual interface LCD TV system based on the gm5221 Designs based on the gm5221 have reduced system cost simplified hardware and firmware design and increased reliability because only a minimal number of components are required in the system N AUDIO AUDIO PROCESSOR AMPL Figure 1 gm5221 System Design E
35. o Processing VPC3230D gt gt uN ir Og Ot lt 5 gt gt 54 5 2 os ON gt gt gt lt 00000050000 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 GNDF YO VRT M1 I2CSEL Y2 ISGND VSUPF VSUPY VOUT GNDY CIN Y4 VPC3230D ms VIN2 Y6 Y7 VIN4 GNDLLC VSUPAI VSUPLLC GNDAI LLC1 VREF LLC2 FB1IN VSUPPA AISGND GNDPA 1 2 3 4 5 6 78 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 OO aa GOG QQQ CO OoO gt 5 OSOON gt 02 08 2 gt m x M 5 LL Video Processing VPC3230D 1 Features Video Decoding RGB Processing 4 Composite inputs 1 S VHS input Programmable RGB matrix Composite video amp sync output Digital color bus interface integrated high quality A D converters Additional analog RGB Fast blank input Adaptive 2H comb filter Y C separator Half contrast switch 1H NTSC comb filter Picture frame generator Multi standard color decoder 1 Crystal Multi standard sync decoder Defle
36. ruPint6 O Timer User Sof Natural 212 Eum ECC C omy 1 ONLY L R Headphone CVBS In Y C In RGB FB Video RGB HS VS In Graphics CVBS Out PANEL SPECIFICATION Samsung Manufacturer AUO 2 Samsung Samsung MIO Samsung AUO Sanyo Interface Single LVDS Double TTL Single Oyal LVDS Single LVDS Single TTLSingle Single LVDS 0 0 LVDS LVDS VGA 640x480 XGA 1024x768 SXGA 1280x1024 WXGA 1280x768 R WXGA 1280x720 WXGA 1280x768 Response Time Viewing Angle R L H L gt 85 85 85 85 60 60 40 50 70 70 60 60 70 70 50 60 80 80 60 60 85 85 85 85 85 85 85 85 Power consumptions 100W Input Range 100 240V 50 60Hz 100 240 50 60Hz 100 240 50 60Hz 100 240 50 60Hz 100 240V 50 60Hz 100 240V 50 60Hz 100 240V 50 60Hz BLOCK DIAGRAM OF MAIN CHASSIS L5A SVHS Y C SC1 RGB Video Decoder Tunes VPC 3230D EEPROM 24LC02 Teletext Decoder SDA 5550 K6T1008V2E M29W040 SRAM Flash Optional Memory TDA1571 Stereo MSP3410G AUDIO DECODER TDA1308 Headphone Amplifier SIF AM mono BLOCK DIAGRAM SCALER BAC LIGHT UNIT Panel_En Standby Mute Reset 5508 LVDS S500 TTL BR1 ADJ BLK_EN GM 5221 0500 CONNECTOR gt VGA_RGB LCD 20 OR 30 PINS CONTROLLER 5503 5502 VGA HS VS BOARD FOR TTL INTERFACES U501 PARALEL U503 KEYBOARD FLASH SERIAL FLASH CON S509 MEM
37. t lt 2 2 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 CAPL M 39 AHVSUP 38 37 SC1 OUT L 36 SC1 OUT 35 VREF1 34 SC2_OUT_L 33 SC2_OUT_R 32 ASG3 31 30 DACM_SUB 29 NC 28 DACM 27 DACM R 26 VREF2 25 L MSP3410D Audio Processing MSP3410D Pin p Short Description No Pin Name Short Description Suppy Votage Chroma reu Not connected 26 V SUPPA BUPPLYD IN OUT I2Cclock 27 LLC2 OUT IN OUT I2C data 28 LLC1 IN OUT IN OUT I2S clock 29 VSUPLLCSUPPLYD IN OUT I2S word strobe 30 GND LLC BUPPLYD OUT 125 data output U N 1251 data input OUT OUT ADR data output 33 Y5 OUT OUT ADR word strobe 34 Y4 OU 35 GND Y BUPPLYD 36 V SUPY BUPPLYD 37 OUT 38 Y2 OU 39 Y1 OU OUT UT U 43 C5 OU 44 C4 OUT 45 VSUPC BUPPLYD 46 GNDC BUPPLYD 47 C3 OUT 48 C2 OUT 49 C1 OUT 50 OUT 2C_CL 2C_DA 25 25 WS 25 25 DA DR_DA CD DR_WS DR CL BUPPLYD Supply Voltage Digital Circuitry VSUP BUPPLYD Ground Digital Circuitry DVSUP SUPPLYD Ground VSUP IN OUT 2 C Bus Clock VSS IN OUT 12 Bus Data VSS VSS 25 1 2 A o x e Reset Input Active Low IN Tes
38. t Circuitry Susp Velsge Ground Chroma Output Circuitry Picture Bus Chroma Picture Bus Chroma Video Processing VPC3230D Pin in pi 52 SUPSY BUPPLYH Supply Voltage Sync Pad Circuitry 74 To UPPLY 9 5 Short Description Chroma Analog Video 5 Input Video 1 Analog Input Video 2 Analog Input OU OU Video 3 Analog Input Video 4 Analog Input Inputs Front End Ground Analog Component Inputs Front End Reference Voltage Top Analog Component Inputs Front End Fast Blank Input Signal Ground for Analog Component Inputs connect to GND Al EJEIEIEIEI OU Vertical Sync Pulse 58 FPDAT IN OUT Front End Back End Data 79 FB1IN 5 VSTBY BUPPLYA Standby Supply Voltage NC sa asar _ V SUPF Supply Voltage Analog Front End 70 VOUT OUT Analog Video Output CLK5 OUT CCU 5 MHz Clock Output 52 83 55 56 58 59 62 83 164 65 66 B E 70 Audio Processing MSP3440G AVSUP AVSUP ANA_IN1 ANA_IN2 TESTEN XTAL_IN XTAL_OUT TP AUD_CL_OUT NC NC D CTR 1 D 0 ADR SEL STANDBYQ z BE E 2 2 2 2 2 Eu 882 255 CO 0 0 0 0 O OUO I OO 2 2 gt lt lt lt lt l
39. t Pin connect to GND D N VGAV Input Y C Output Enable Input Active Low OUT FIFO Input Enable OUT FIFO Write Enable 1 RESET_Q OUT FIFO Reset Write Read 22 NC OUT FIFO Read Enable 23 NC OUT FIFO Output Enable 24 DACA R IN OUT Main Clock Output 20 25 MHz 25 SUPPLYD Ground N 2 Picture Bus Chroma Picture Bus Chroma LSB A 12 DVSUP RESET_Q nc ne DACAR DACA R NINI Short Description GND SY BUPPLYD Ground Sync Pad Circuitry 52 VSUPSY BUPPLYD Supply Voltage Sync Pad Circuitry 3 INTLC OU Interlace Output 5 9 5 5 N sa VREFTOP LN AVSS LN c 2 if IF input1 is also in use IF input can be left vacant only if IF input1 is also not in use 71 XTAL IN IN Crystal oscillator 65 AVSUP YS ANA IN N N N N ANA 2 N N 55 56 58 59 62 83 65 88 70 7 Audio Processing MSP3440G Pin No Pin Name 72 XTAL OU OUT REL pee 74 AUD CL OUT e sle 77 D Il IN OUT 78 D I d IN OUT 79 ADR_SEL IN IN Short Description Crystal oscillator Test pin Audio clock output 18 432MHz Not connected Not connected D CTR l O 1 D l O 0 I2C Bus address select Stand by low active SDA5550 MICROCONTROLLER F
40. xample 1 2 gm5221 Family Features Intelligent Image Processing e Fully programmable zoom ratios e High quality shrink capability from UXGA resolution e Programmable coefficients for variable sharpness control e RealRecovery provides full color recovery image for refresh rates higher than those supported by the LCD panel Analog RGB Input Port e Supports SDTV RGB inputs in interlaced mode e Supports EDTV 480p up to 1080i HDTV inputs e Supports mid level clamp for YPbPr inputs e Macro vision decoding e Supports up to 162 MHz SXGA 75 2 UXGA 60Hz e On chip high performance PLLs single reference crystal required e Composite sync Sync on Green SOG and Sync on Y SoY support e Input format detection e Phase and image positioning Ultra Reliable DVI Compliant Input Port e Operating up to 165 MHz up to UXGA 60Hz e Direct connect to all DVI 1 0 compliant transmitters e High bandwidth Digital Content Protection HDCP Note HDCP function is available H version only CCIR 656 8 bit Video Input Port e Supporting NTSC PAL interlaced and progressive e Direct connect to commercially available video decoders e Spatial de interlacing Advanced Color Management e Programmable gamma correction CLUT e TV color controls including hue and saturation controls e Full color matrix allows end users to experience the same colors as viewed on CRTs and other displays e g sRGB compliance Advanced Active Color M

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