SERVICE MANUAL
Contents
1. 10 21 0081 PAD IO 68 B 0051 K 4 i s pae1Bo MIUB 2051 3 GND AD DDCR DA PAD TCONS TUNER RESET FOCAL DIM 222079 3 MIUA DQS1B _ B15 PAD 10122 00518 PAD iO o9B 50518 GND cian PAD_TCON4 GND 3 DQMO M23 __ MIUB_DQMO K 5 TCONB SC 3 IO 73 B MIUB 3 GND 4 KEY2 in IR PAD TCONG PCM 3 MIUA_DQM1 pap 5 72 DaM1 M24 DOM SS MUB DOMI IR SYNC PAD DET lt DET 9 MIUA_MCLK MIUB_MCLK GND Fy G5 C12 MCLK C173 MUA NORS PAD_IO 12 A_MCLK PAD_IO 59 B_MCLK MCLKZO2MIUB MCLK 3 GND PAD TCONS COMP DET 4 3 MIUA_MCLKZ Meke 1H _ PAD_IO 57 B_MCLKz 25 MUB MCLKZ 3 GND GND 1 RA XTAL PAD_TCON10 HP_DET yg E 3 MIUA MCKE UA C21 pap JO 37 A CKE PAD IOj84 B LIESE SS MUB GND GND 400 __ PAD_TCON11 HP_MUTE MUTE_HP GND GND 3 3VA 3 3VU b172 PT 3 WEZ MUA BAS _ 36 _ PAD lO 83 B WEZ B25 MUB Rasz 22MIUB WEZ 3 GND GND pare2. 50 6 K 0 6pF 0 6pF 0 6 K 0 6pF lt 0 6pF IN N NB 8 2 Me e NNNNNNNNNND lt 0 6 lt 0 6 RXBON RXBOP RXB1N RXB1P RXB2N RXB2P RXBCLKN RXBCLKP DDCBSCL DDCBSDA DB2 lt 0 6pF 0083 NC ESD 0402 RXAON RXAOP RXA1N RXA1P RXA2N RXA2P RXACLKN RXACLKP DDCASCL DDCASDA DA2 NC ESD 0402 0 6pF DD91 DC2 0 6pF DD99 NC ESD 0402 RXBON RXBCLKN RXBCLKP DDCBSCL DDCBSDA HDMI CEC Size Document Number Rev A2 6 10 0 1 Date Thursday July 28 2011 Sheet 6 of 10 1 VGA INPUT Analog Video amp Audio in T gt gt RGBO SOG VGA R TM gt RGBO_GIN VGA VS 33R C57 gt gt RGBO BIN DDC SCLIN VGA RX gt gt ISP RXD A 125 2 2 HD Rin AOR DDC SDAIN RA C58 RIN VGA NC ESD 0402 025 amp ISP TXD C90 BIN VGA HS 80 04087 ESD 0402 688 C91 0 07 NC ESD 0402 NC ESD 0402 gt RGBO_GIN RIRIA eus pa HD Lin
3. 25 32 Figure 2 BLOCK DIAGRAM FUNCTIONAL BLOCK DIAGRAM superFlash Decoder gt Buffers and Latches S Y Decoder VO Buffers Control Logic and Data Latches Serial Interface CLK DI DO HOLD 21 Block Diagram EN25F32 SIGNAL DESCRIPTION Serial Data Input 01 The SPI Serial Data Input DI pin provides a means for instructions addresses and data to be serially written to shifted into the device Data is latched on the rising edge of the Serial Clock CLK input pin Serial Data Output DO The SPI Serial Data Output DO pin provides a means for data and status to be serially read from shifted out of the device Data is shifted out on the falling edge of the Serial Clock CLK input pin Serial Clock CLK The SPI Serial Clock Input CLK pin provides the timing for serial input and output operations See SPI Mode Chip Select CS The SPI Chip Select CS pin enables and disables device operation When CS is high the device is deselected and the Serial Data Output DO pin is at high impedance When deselected the devices power consumption will be at standby levels unless an internal erase program or status register cycle is in progress When CS is brought low the device will be selected power consumption will increase to active levels and instructions can be written to and data read from the device After power up
4. A2 5 RR 7 SEUIMSD30 6 E DVDD_MIUB GND 9 mE AC e 6 93 pan PAD SPDIF our P lt SPDIFO 7 PAD Y GND 32 3 A3 25 2 PAD 421 AVDD1P2 20 4 GND M10 DCR OUT 26 GND DCR IN U2E MSD309PX 4 2 5 GND 1 DCR OUT lt lt DCRDCR O 1 PAD_VIFM IFM 4 N10 24 1 0 RGB CVBS SIFP Fito ias c 21156 D AVDD2P5_ADC GND BO FLASH D Fass 5 ist RIN RINOM CVBSO GND B2 2 7 RGBO_RIN PADA_RINOP PADA CVBS1 SV2Yn 7 2124 pap pr IFAGC ADS T AVDD25_REF 10 14 7 RGBO_GIN PADA_CVBS2 Sv2 Cin 7 9 pap AD 15 TAGC AVDD25_REF GND EL 12 REI 7 RGBO_GIN PADA_GINOP CVBS3 AAS PF CEOZ H 10 84 7 BIN PADA CVBS4 W2 7 220 12 4 8 _ 025 GND GND GND LAD2 lt i 7 RGB0_BIN PADA_BINOP 55 lt 820 OEZ DEMOD RESET 5V Tuner GND 6 GND GND aec SOG
5. _ Power Consumption 8 Isolation Resistance 4 9 Leakage Current 5 mApp Power Cord Captivity 40 N Flammability Back Cover PASS Sharp Edge PASS UL Compliance NO FCC Compliance NO 15 Radiation Compliance NO 16 CSA Compliance NO CEB Compliance NO CE Compliance Base on different order He cBCompane ____________ 5 Video H UmewtyOsomon veia h 2 Linearity Distortion Horizontal 1 Distortion Vertical t Trapezoidal Distortion Horizontal Over Scan Vertical os L Over Scan Horizontal o3 95 o7 00 4 FOR 42LED p eme Video Noise Limited 9 dBUV Video Noise Limited 54 dBUV Sensitivity S N 30db Technical Specification ri Selectivtysem 2 Resolution Horizontal 1366 Lines 1920 For 42LED Resolution Vertical 768 1080 For 421 6 Chroma 1 White Balance Xaxis 0 2 White Balance Ya _ du White Balance Color Temperature 6500 9800 12500 12500 266 276 9800 280 290 6500 313 329 z ColorSensitvity 5 CobrBustlockinRange ______ CoorKWersenstvy
6. Close to DRAM MA 0080 A MVERF MIUA ODT R13 75R MA ODT Eg MA CKE 5951 B 75RX4 80584 12 22RX4 RP15 WEZ D E MIUA MCKE 1 p 0015 2 2 DQMO 6012 8 MA 008 2 DQMO 2 2 MIUA BAO 6014 Do 6013 Close to MSD306 006 9 007 Close to MSD306 001 8 000 DQ2 2 MIUA A 0 13 E mas MA MA 4 RP5 75 4 4 15 9 ODT ae z 2 MIUA_DQ O 15 2 0011 RP1 22RX4 MA DQ11 8 2 57 Close to DRAM MIUA_DQ12 A11 A11 8 609 m 509 m db de gem 6014 2 A1 MA A0 MIUA RP2 2284 MA DQ6 RP6 75RX4 5 A10 zi 10 5 NB A4 1 uuu 1 N G 504 Madii y AAT pum 0015 22RX4 0015 12 RP7 75RX4 12 12 508
7. FLASH WP PAD QUTP 15 B 000 5 LVACN LVACP PAD_IO 17 A_DQ7 PAD 10 64 8 DQ7 GND _ __ 2 8 WP OUTN_CH 15 PAD_B_ODD 4 D15 LVASP LVASNORKd PAD 1 18 DQ8 PAD 1065 008 DVDD_NODIE 10 PADA_OUTP_CH 16 PAD_B_ODD 3 ang LVAN 2 ee PAD 10 29 DQ9 PAD 10 76 8 009 DVDD_NODIE Ni4 UART I2CS QUTN CH 16 B 000 2 018 2 POE PAD 1 19 0010 PAD 10 66 DQ10 GND QUTP CH 17IPAD B ODDI1 A517 LVAAN ae PAD_IO 30 A_DQ11 PAD 10 77 8 0011 C52 R14 m OUTN ODDIO PAD IO 28I A DQ12 PAD 10 751 0012 114 KEYBO ARD DDCA PAD_IO 16 A_DQ13 PAD 10 63 8 0013 GND DDCA_DA 10 27 0014 PAD 10 74 8 0014 PAD 0015 10 67 8 0015 5 2050 MIUB_DQSO GND 12 AMO 3 MUA Dosos 418 PAD IO 23 A 0050 PAD 0050 Mus DASO GND m AA23 PAD boeR ck _TCON Ct RED L R INDICATOR 3 MIUA DQSOB MUA DST H PAD 0508 PAD L23 Tr B pas 02 GND 10 SDA PAD_DDCR MONITOR T 3 MIUA_DQS1
8. CHF OUT 4 11 e vss 0 v OAD_DVDD T a a to DVSS 0 864 NC STSFLGO ADI_AIP Tu 10603 TS a ADQ 28 lt lt OUT 4 11 TS m el 53 5 26 C870 0 1 TS 02 RLOCK AD_VREFN 2872 RP61 33RX4 98 RSEORF AD_VREFP C873 4 1 2VO VDDC VSS AD_AVSS PBVAL AD_AVDD OAD_AVDD VN 9 881 1500 TSSTART 20 BBYTE FIL 5 20 OPLLVDD TS_CLK 19 C882 18 C883 28 1 2 RP62 33RX4 10 xo 18 R519 25 4MHz B4 1 240 63 8520 a o E 83 VDDS 2 P oz ET PLLVSS al C884 18p ood 020 o A 000 x 26120 FXX gt H Ddod lt gt gt gt 1K2 TC90517FG 3 3V_Demod 979 ANA 9 N x a O 555 85 amp 8 TS D7 R522 NC 33R lt lt 2 NG 4 C893 100nF C0402 3 3 Demod 8533 Close to tuner 535 7 T_IFAGC T IFAGC 4 11 100nF da ISDB TC90517FG Size Document Number Rev 2 Demodulator 1 0 Date Tuesday May 17 2011 Sheet ___10 15 1 Skyworth SKYWORTH R amp D CENTER Power Supply Service Manual PA
9. DQ8 7 ftd e 7 7 K WEZ 2010 m DQ10 9 itm 9 MIUA_DQ13 e DQ13 MIUA RP4 2284 DQ7 2 RP48 76RX4 2 2 DQO 2 MIUA AD R 602 a MIUA_CASZ_ 7 MIUA 005 005 2 87 x MIUA RASZ MA RASZ MIUA 13 383 A 758 A13 13 Close to DRAM x a Close to MSD309 ala 1 8VA c R107 10k A_MVERF RP40 22 4 2 MIUB 0080 2 MIUB 0080 2 MIUB MCLK 1 2 MIUB_MCLKZ ls 2 MIUB 0081 ds 1 0050 2 yp MIUB_ODT R380 758 MB_ODT MB 2 mm 75RX4 MB_DQSB1_Ag MB_MCLKZ MIUB WEZ RP47 e MB WEZ 2 MIUB WEZ 2 MIUB 2 MB ME DA ao 2 MIUB POMY 2 BAT MB_DQ9 D _ 2 MB D D9 MB 0013 Close to MSD306 MB 9 MB 007 MB_DQ1 8 000 2 A13 H MIUB 4 RP8 75RX4 _ 4 MIUB DQ 0 15 rl V a 9 MB_ODT 2 MIUB DQ 015 2 MIUB 0011 RP11 228 4 MB DQ11 MIUB A8 Pf
10. L OFF EN R18 2K_1 For MCU 2010 3 14 1 CON25 J25 14 1 8 DC DC 5V DC DC 051 1482 Note 103 104 close to CON6 for EMI 10k 1482 18 1482COMP18 1482FB18 100uF 16V 18 12VA 24VA 70UF 16V R58 10K_1 Low ESR 116 For DDR VCC Panel 150 1100mA 110 407 410 412 C399 C400 C401 C394 NC O 1u NC O 1u 0 1u 0 1 0 1 0 1 037 NC O 1u AMS1117 3 3V CA10 1O0uF 16V CEM9435A 2 TOOuF 16V C442 C473 C450 C438 C436 C452 0 1 0 1 0 1 0 1 0 1u 038 300mA DDR2 C432 C445 C441 C468 C443 C427 C429 C444 0 1u 0 1u 0 1u 0 1u 0 1u 0 1u 0 1u 0 1u Inverter Interface 5 R20 10K R21 100RPB ON OFF 1K Q407 ON 1 3904 L ON C334 H OFF 1n USB Power For Power Drop U5 12VA 18 MPS1482 R1 0 22 PB ADJUST 255 0406 NC O tu 3904 25 4 GND 100uF 16V 10uF 6 comp K_1 34 4A70uF 16V D tuF USB Note Left C255 NC if want to output puls EN R46 10K_1 5V_USB Power trace width 8 USB lt HOK 5V DC DC should be gt 40mil
11. _______ 60 SRDT O Serial TS ata o tput Fo o 621 vss Dita OND Comets to 63 42V powersupply digital 1 2 V typ 64 VDDS Shor supply Con nects to digital 3 3 V typ Note 2 AGND is for analog GND DGND is the abbreviation for digital GND Note 3 is used for the pre shipment test only Make sure that processing is performed as Remarks column Any other method will lead to malfunction or failure Note 4 type of the cell used It may be different from the pin function because a test is conducted Note 5 tes an I O with a pull up resistor 50 k X typ and PD indicates an I O with a pull down resistor 50 ulling down the PU pin or pulling up the PD pin outside the IC sometimes changes the electric al to the midpoint resulting in instability Caution is required Not nused output pins must be open and fixed to L by setting the output enable control register of each pin or noise reduction or teethe output OFF state Note D indicates an open To use the pin for output pull up the resistance outside the IC The following pins are added with the upgrade from TC90507 to 90517 except the changes of power supply and GND pins Pin ADQ AIN Added for IQ input differential ADQ AIP Added for IQ input AGCI Added to passthrough the AGC control signal of other ICs SLOCK Chan
12. 130 dmw Audio Item 1 Audio Noise Limited Sensitviy os daw 2 Audio Noise Limited Sensitiviy VHF H dw 3 Audio Noise Limited Sensitivity 28 Buzz S N Ratio Distortion 3 Audio Output L R at 10 THD 7 Audio Output Center BP 8 9 p mum otereo Separation opeaker Impedance 10 Speaker Power Rating Technical Specification 8 Power DC Voltage Audio 2 DC Voltage Tuner 5 5 9 External Interface 2 Video Frequency Response 145 ME 3 VdeomuSN 4 Audio os Wm 5 Input Frequency Response 18 _ 6 Audio 7 Audio 8 Input V 9 Video 10 Output Freauency Response 42 ME SS Hi VdeoOupuSN e evel bos Wm Audio Output Frequency Response 80 15 audio oston h 6 Technical Specification Video Input Level R G B Video Input Level Component Y Ps RGB Input Resolution Vertical 080 For 42LED 75 ohm RGB Input Resolution Horizontal 920 For
13. ceramic ____6 ____ Inductor jin Connect this pin to the switching ron 1 Output Feedback Pin Connect this pin to tlie Center point of the output resistor divider as shown in Figure 1 to program output voltage Vout 0 6 1 R1 R2 2 LEN Enable control Pull high to turp not float NC 37 fNocomection VIN 12 2 5V L 22uH Cout 10uF 25 C IouT 1A unless otherwise specified E Hest Conditions rapt Votage Rage 2 4 Curent Feedback Reference REF 0 Voltage CFB a Vg Sa Top FETRON Bottom FETRON 74 lm FET Limit ku PEN Rising Threshold Veg EN Falling Threshold 94 V Wingo ff UVLO Hysteresis T_T 393 y Freeney Foe Luxe g e Low Thermal Shutdown Temperature Skyworth 168P P32EWM KO Service manual 3 3 The LED driver chip 3 3 1 General description 079967 is an LED controller that drives a number of LEDs connected in serial or parallel configuration 3 3 2 The chip block diagram VIN VREF ENA GNDA 5 m a 55 DIM Current Regulator S
14. Fs gt nm i o 2 24 Block Diagram 4 Pin Functions This specification indicates pins and their signals in upper case letters and registers and their signals in lower case letters Note4 Note5 7 3 2 6 1 I Shut dom Normal operation 1 Shut down 2 Crystal frequency division ratio 1 Set according to crystal frequency EN XSELO frequency division ratio 0 Set according to crystal frequency vss jComecstoDGND 19 Slave aderese according to slave address SLADRSO jSlaveaddressO to slave address QM pas nga Connects Ben when S INFO jPinforpre shipmenttest _ DGND of AGCCNTI 10 PD AGCcontrloutput to tuner pin Connects to tuner x AGCCNTR mo control output Open fixed to when S NN __ Pin for pre shipment test Connects to DGND 1 126 e VDDS power supply 3 V typ omen S to Tz data pin Hon wo Pull up pertorr ed outside IC 15 vss Digital GND Congects f amp PGND 1 2 V
15. 10 Technical Specification Compatible audio format if DVD USB MP3 WMA AAC MPEG1 Playable Discs CD CD R RW CD ROM DVD R RW R RW reader format compatibility No Macrovision Yes VR Yes FOR USB Network No User convenience OSD Language MP3 WMA depending on license UU English Spanish Portuguese French OSD Positioning SD Timeout Adjust No Customer Brand name LOGO Yes B languages English ATV Program Numbers example 99 3AV input 99 7 DTV Program Numbers 370 Program edit naming sorting skip swap Skip Delete Auto Naming Auto Sorting No TV Guide DTV EPG EPG next Seven day Favorite program Yes Number of buttons on cabinet Power Vol Pr Menu 4 5 o lt gt o Vol CH Menu Source Standby optional Main switch button yes No Yes CCD Closed Caption V CHIP Yes No Text Standard Top FLOF No Teletext Level 2 5 1 5 Pages for teletext Teletext character sets DVB T teletext Real clock From DIV 10 240 Min Turn On Off Program Switch Sleep timer Timer Parent Control Source and Channel lock Input code for certain channel Parent Control Child lock set the lock of the keyboard only the RCU can control the TV Yes No Parent Control Kid pass preset the ontime channel for each day of the week No Pa
16. Skyworth 168P P32EWM KO Service manual Features SMPS controller IC enabling low cost applications Large input voltage range 12 V to 30 V Very low supply current during start up and restart typically 10 Low supply current during normal operation typically 0 5 mA without load Overpower or high low line compensation Adjustable overpower time out Adjustable overpower restart timer Fixed switching frequency with frequency jitter to reduce EMI Frequency reduction with fixed minimum peak current to maintain high efficiency at low output power levels Slope compensation for CCM operation Low and adjustable OverCurrent Protection OCP trip level Adjustable soft start operation 2 2 2 the LED driver ofthe circuit MICRO ELECTRONICS OZ9967 6 0V 33V Maximum Operating Junction Temp 125 COMP 1 6 ISW 40 VREF ENA STATUS OVP SSTCMP LCT DRV TIMER RANGLED UVLS 0 0V to VREF 100kHz 1MHz 1002 10 2 20 10 85 40 C to 85 C 125 C LED Current per Strine 10mA 350mA Thermal Impedance Ou a 28 pin SSOP 15 C W 78 C W 28 pin TSSOP C W 28 Skyworth 168P P32EWM K0 Service manual 3 The main chip description 3 1 The main chip 3 1 1 The main chip general description The main chip of power supply 15 the TEA1733P which is produced by NXP corporation The operating mode is CCM continuous conduction mode and t
17. 2 5 gt cold 7800 e m4 ssaa 5 5 8 9814 zi 1 8 0099 588 egaa 5 1800 2800 2 amp 9778 LOSY 25 Orly 6 44 or a e o a Lely 108 RP7 RPG RPISRPZ amp RPS7RP3 amp 9 9068 9 BLog Jc oo 506 x 7500 PG 59 651 2 9559 m CEDE n E 55 584 8 0 4 m 0855 cy 6v 3 0544 u Sog i OSEA C393 y 5 588 5 5 269 IBI CO eS 79 5 lt amp 2 pore 1869 5 9713 4292 8 a Un lt o 24069 6059 3 x gt o ld 9 rro 6272 c R374 CA55 CA80 9689 amp 2 8 009 C248 8 854 9629 R295 SEA te R155 R306 0447 ag M 33 5158 c 2800622 R22 5 294 5 8 gt 5 amp 5 lt 5 8579 14 5 5 5 5 5 3 5 2 is R293 Rn o 5 L2 5 2 gt 1504 5 8622 194 e 2920 5 osn 19 5 894 037 o gt gt U3 Wo e E amp 5 92 6779 6
18. 7 MB_RASZ Close to DRAM 0012 x m MB 0012 MIUB A11 MB A11 MB BA1 8 MIUB 099 299 p CASZ MIUB 0914 m 0014 a 1 MB MB A0 MIUB RP14 22RX4 MB DQ6 MIUB RP9 75RX4 5 10 MIUB_DQ1 MB_DQ1 MIUB_A10 MB A10 5 N N8 MB_A4 MIUB_DQ3 1 5 MIUB 004 004 S gt 9 MIUB 0015 21 22RX4 0015 MIUB 12 RP10 75RX4 12 12 ut p MIUB 008 MB_DQ8 MIUB A7 7 7 K MB WEZ MIUB_DQ10 2 m 0010 MIUB 9 mi dr MB 9 7 0013 Es MB 0013 MIUB mh amm MB A3 RC RFU MIUB 007 ___ 22RX4 MB 007 MIUB 2 19 75RX4 2 2 E 000 MB_DQO MIUB_AO R Guo 4000 ae MIUB_DQ2 002 CASZ e 5 MB CASZ RFUZZZ 55555 MIUB 005 005 2 MIUB RASZ MIUB_RASZ MB_RASZ 2 ad ne 07 i lt 2 0 0 A13 R396 4 4 758 13 13 Close to DRAM 11 Close to MSD309 1 8VA R310 10k 431 47n ize Document Number Rev 3 10 0 1 Date Tuesday May 17 2011 heet 3 of 10 ISDB T TU
19. Title POWER Size Document Number Rev A2 1 10 0 1 Date Saturday July 02 2011 Sheet 1 of 10 1 w U2C MSD309PX U2B MSD309PX 2010 3 31 U21 HDMI AUDIO PCMCIA TS1 pour PAD RXON A PAD LINEIN LO EM Dii gt W21 pap PCM 00 PAD TS4 00 46 AO vec PAD_RXOP_A PAD_LINEIN_RO 7 xti PAD PCM 1 PAD TS1 D 1 A1 WP 6 A PAD L
20. AE11 P1 PAD GPIO13 AMP SDA LES 55 IPOD TX 016 GND GND GND GND GND PAD 3 ABEx GND E PAD_GPIO_PM1 5V_HDMI_1 GND GND H PAD GPIO PM4 POWER 2 GND GND Eid PAD GPIO PM5 5V 2 44 poniak 100 GND GND 4 P493 PAD_GND_EFUSE PAD_GPIO_PM11 DSUB_DET 5 GND E117 PAD PAD GPIO 12 R155 n ANCHOQ GND 3D FLAG R164 DCR OUT T 20100122 330 331 0 1uF 5VU i RESET LED 3D Mode Selection DEBUG PORT IR SYNC 10K 125 OUT SD 8350 21 NCHOK 125 OUT 10k R349 222 C309 10 125 OUT 8351 4 7K H 1 HW RST Close to MSD309 10 PWM1 NC JOK 8352 R126 ISE BXD 22R UART RX R249 100RHW RST R347 100R LED R 1 LEDR ES 888 NC CON4 2 0mm SSP Tp R252 Debug Port 100 C307 1n MSD309 Document Number 2 10 0 1 Date Friday July 08 2011 Sheet 2 of 10 1 RP50 22RX4 MA 0080 2 MIUA 0080 2 2 MIUA MCLK TS 2 0081 2 0081 2 215 smana y
21. CS must transition from high to low before a new instruction will be accepted Hold HOLD The HOLD pin allows the device to be paused while it is actively selected When HOLD is brought low while CS is low the DO pin will be at high impedance and signals on the DI and CLK pins will be ignored don t care The hold function can be useful when multiple devices are sharing the same SPI signals Write Protect WP The Write Protect WP pin can be used to prevent the Status Register from being written Used in conjunction with the Status Registers Block Protect BPO BP1and 2 bits and Status Register Protect SRP bits a portion or the entire memory array can be hardware protected Table 1 PIN Names semicon NN po smono Block Diagram TOSHIBA CONFIDENTIAL TC90517FG Toshiba products specification Tentative 2 Configuration All functions required for ISDB T demodulation and error correction are built into the TC90517 The input signals to be supported are a low IF intermediate frequency signal and direct IF signal Baseband IQ signals can also be input The output signal is an MPEG 2 transport stream TS in serial format Note that a TS in parallel format can be output by setting registers aee re eer Ns X phase preecho postecho m correctio Suppression CPE extraction filter Y 1 AGC con
22. PAD XTAL IN 3 RASZ MUA RASZ PAD 1015618 RASZ E23 WI CASZ 29MIUB RASZ 3 GND 395 PAD XTAL OUT 3 MIUA CASZ MUA BA AH PAD CASZ CASZ 24 MUB BA 22 MIUB CASZ 3 GND DiS11535132 D138 15 5 1 DET 3 MIUA BAO MIUA BAT PAD 10186 8 24MB Ba BAO GND 3 MIUA MUA BR 821 PAD PAD_10 85 B_BA1 285 22 MIUB 3 GND wy RESET 3 MIUA_BA2 MUA ODT 22 PAD_10 40 A_BA2 PAD 10 87 BA2 MUB ODT 3 GND 010 HERST ES GPIO 3 3VA 3 MIUA ODT OUT 11 pap ODT PAD 1015818 24 MEE VO SS MIUB 3 GND 9 9 SD GND VPORT NC 4 7K 2010 4 14 PAD_GPIOO NTP_MUTE WERE GND 16 PAD_GPIO1 AMP_RST _5 11 22 GND 16 USB PAD_GPIO2 INV_CTL 4 ___SSon_PBACK 1 GND GND PAD_GPIO3 PANEL_CTL 4 SON PANEL 1 GND GND 2 8 USB DP C2 pAp pP PAD GPIO4 USB 3 S RF SW2 11 GND GND 8 USB DM 4 B1 PAD PAD GPIOS ERROR OUT 04 GND 16 8 USB1 11 1 GPIO12 AMD 501 GND GND 2 8 USB1 DM4
23. PAD PCM A 10 PAD TSO 5 03 10 6 DDCBSCL DDCDB CK 15 pap A 11 PAD TSO 0 S D4 10 6 DDCBSDA DDCDB DA 125 2 2 2 2 PAD PCM A 12 PAD 80 D 5 S D5 10 VDDC4 2V 6 HOTPLUGB amp Ae 12 OUT x PAD PCM A 13 PAD TSO D 6 5 06 VDDC1 2V 125 OUT PAD 14 TSO 07 VDDC1 2V VD NN 6 RXCON PAD RXON C PAD 125 OUT SD B3 125 OUT SD PAD PCM RESET PAD TS CLR S CLK 10 VDDC1 2V enD L 5 6 PAD C PAD 125 OUT WS B 55 our X DR PAD 150 VLD SVALID 10 VDDC1 2V GND 6 RXC1N PAD_RX1N_C PAD 125 OUT BCK PAD PCM IRQA PAD 50 SYNC SSTART 10 VDDC1 2V GND 0 6 PAD C Y13 pap OE N VDDC1 2V CON3 6 RXC2N PAD RX2N C PAD 125 IN BCK USB etx eee SF PAD_PCM_IORD_N VDDC1 2V GND 6 2 PAD RX2P 128 SD LED ON H5 PAD PCM VDDC1 2V GND I2C SCL 46 GND GND I2C SDA PAD 125 WS WARM LED 86 4 PAD VDDC1 2V 22 SCL SDA 6 DDCCSCL M FRONT END C171 R381 2 2 T 40 CND GND 8 6 DDCCSDA DDCDC_DA PAD_PCM_IOWR_N PAD 8382 22 4 8 E At 6 HOTPLUGC HOTPLUGC SPDIF PAD PCM REG N PAD 2 DVDD_MIUA 8
24. 22uF 100V 22uF R418 Q411 1M R401 150V 10A R401 PER 00 ET R412 10 10 10K R419 C411 47K NC CN400 7 Us 12V ZD401 C413 LEDB1 LEDB6 LEDB3 LEDB4 5 LEDB2 C402 2 2uF R425 R433 R445 1 COMPB20 COMPB4 VIN 10 C404 5 1K 5 1K 5 1K R410 ISEN6 OISENB6 Q400 0401 Q402 Q403 Q404 Q405 100K mu 50V 0 5W 50V 0 5W 50V 0 5W 50V 0 5W 50V 0 5W 20 5 5 50V 0 5W C405 R413 21 R422 R430 R442 LCT ISENB5 PWM SOENS ISENB1 ISENB20 15 4 ISENB50 ISENB 0 22 lovs COMP4 1K 1K 1K 1K R4 R416 23 ISEN4 OISENB4 R423 R424 R428 R431 R432 R436 pe d R443 R444 5 1 4 7 4 7 4 7 4 7 4 7 10K STATUS COMP 3 OCOMPB3 5 1 51 DIM C409 ISEN3 OISENB3 22 VSEN 26 1017 R417 o ovp 2 OCOMPB2 C410 100K 27 aNGLED ISEN2 2 o 28 lisen V ISENBI 029967 5V O4 412 maay lt 510K R421 220K 14
25. 3 GND SPLSDI MUARI PAD_IO 8 A_AO PAD_IO 55 B_AO VDDP GND LVDS AZ PAD A1 PAD 10 88 8 A1 VDDP GND LLLI PWMO LVBOP LVBON ORX4 52 MIUA A3 PAD IO SIA A2 PAD 10 52 8 A2 H WW 555 OUTP R 24 BON TVBOD 2 OOF RA PAD PAD_IO 91 B_A3 G18 MEMPLL GND gt 26 PAD ADA_OUTN_CH 6 PAD_R_ODD 6 A024 LVB1P MUAAS PAD 1 A4 PAD 1 50 4 GND HI 1 ADJ PWM PAD PWN2 PADA OUTP CHI7IPAD R ODDIB ADA EVBTN PAD 5 PAD 10 90 8 5 GND 208mil gt DS amp PAD_PWM3 PADA OUTN R ODDI4 ENIN ra PAD_IO 6 A_A6 PAD_IO 53 B_A6 1 8VA GND AE24 M PADA_OUTP_CH PAD_R_ODD 3 2 3 MUA AE PAD_IO 45 A_A7 PAD 1019218 A7 GND OUTN R ODDIZ 28 2 RXOC PAD PAD 101518 A8 GND HY A PADA_OUTP_CH 9 PAD_R_ODD 1 TVB N EVBC RXOG PAD_IO 46 A_A9 PAD IO 93IB A9 AVDD_DDRA GND SATH KEYO J5 PADA_OUTN_CH 9 PAD_R_ODD 0 22 lt RP54 RXO3 A11 PAD_10 42 A_A10 PAD 108918 A10 AVDD GND SAUN 7 04 PAD_SARO PADA_OUTP_CH 10 PAD_G_ODD 7 ARA LVB3N LVB3P MNA PAD A11 PAD 104918
26. 42LED RGB Input Horizontal Frequency RGB Input Frame Rate 10 The others iem 1 Search gt Glock realtime gain ortoss secnerda 3 Soft ware Functionality Tes 4 REMOCON Working Sensiviy Swag 8 5 REMOCON working 5 8 m 6 Caption Sensitviy ______ l Resonance of unit Sweep freq 50 1000 11 Customer Menu Setup as shipped condition 20 input Mode mp 6 Customer Menu Language Bae on diferent order _ 8 Sleep Timer d O 9 Auto Sleee OR 10 00 02 112 Caption OR 27 Technical Specification 12 Reliability 3 Surge mmuiy 1 0 1000 4 6 4 Voltage Dip Test ms 1 5 Voltage Test ims 1 6 operation Temperature J 8 StregeTempeaue 9 MTBF Confidence Level 90 96 Technical Specification DTV PRODUCTOINS SPECIFICATION 42 55 Country West Eu East Eu Russia AP US S A Japan Brazil amp Argentina Skyworth ODM Panel technology LCD PDP LED Market Position High Mid A
27. A11 AVDD DDRA GND FLASH WP PAD_SAR1 OUTN CH TOPAD 6 0200161 LVBAN 4 MIUA A13 PAD 35 12 PAD 10 82 12 AVDD_DDRA GND c d co 224 PAD_SAR2 POWER_DET PADA OUTP CH 1TJPAD G 000 5 4021 PAD 1 A13 PAD 104718 A13 AVDD_DDRA 5 5 5 8 PAD_SAR3 PADA OUTN ODDI4 3 DQ 0 15 MIUB_DQ 0 15 3 D14 C336 10 4 VVAON DEX pss 000 10 61 8 090 AVDD_DDRB 244 SPI PADA OUTP CH 12 PAD G ODD 3 AGAN EVAON EVADE R PAD IO 32 A DQ1 PAD 10 79 8 001 AVDD DDRB PADA OUTN CH 12IPAD G ODDI2 021 EVASM PNET PAD_IO 15 A_DQ2 PAD_IO 62 B_DQ2 AVDD_DDRB Seen PAD_GPIO_PM6 BOOT_FLASH_CS PADA_OUTP_CH 13 PAD_G_ODD 1 EVASM VASE PAETI PAD_IO 33 A_DQ3 PAD_IO 80 B_DQ3 AVDD_DDRB 4 AD20 J17 H 5 RSGEPL SCKI Ag PAD SPI CZ BACKUP FLASH CS PADA OUTN CH I3IPAD G ODDIO A219 LVA2P EVAONBWXT PAD 1 34 DQ4 PAD 108118 004 AVDD DDRB SPLSDDOR VY RSGPL SDI 55 PAD SPI CK PADA OUTP B ODD 7 cis EVAGE PAD IO 13I A 005 PAD 10 60 005 24 SP SDODR PAD SPI Di PADA OUTN CH 4 PAD B ODDIB Aci LVACP EVAN 2 I EXE PAD 006 PAD 10 78 8 006
28. PIP AV No Dynamic Backlight Control LED Backlight Yes Deinterlacer No linerar motion adaptive motion 30 compensative Film mode reverse 32122 pull down Full HD support 1080P Yes Single scan Dual scan 12082 Yes Yes Yes Yes Zoom type Auto by SCART Pin8 and WSS Yes Yes 3D Panel Type PR SG 30 20 Yes 2D To 3D Y N Yes Left Right Swap For PR Panel Yes Sound Sound type Mono AV stereo Stereo Music Power Watt RMS Power Waitt Tone control Bass amp Treble Graphic Equalizer Special sound effect AVL WIDE Pseudo AVL Suround system Dolby VD SRS Sound control Volume Balance Mute Sound quality High Mid Low Mid 54MHz 864MHz VHF 177 213 MHZ UHF 473 803 MHZ Audio Standard B G H D K K I L L M N Stereo audio system Nicam MTS A2 BISC SAP Video standard NTSC 3 58 4 43 AV PAL 60 NTSC 3 58 4 43 PAL DTV SD support DVB T S C QAM ISDB T DTV HD Support MPEG2 MPEGA H 264 No Yes 720p 10801 1080 24 50 60 2 480i p 576i p Up to 1280X1024 60Hz Up to 1080P 24 50 60HZ PC capability up to maximum format HDMI capability CAV PC Format Compatible video format if DVD USB DviX VCD SVCD JPEG AVI MPEG2 WMV HD SD JPEG MPEG2 MPEG4 H 264 DivX depending on license e lt rm 3 lt 70 U
29. Pin for pre shipmenttest Open or connects to digital 3 3 V yp 41 TSMDi Piforpreshipmenttest ConnecstoDGND 42 SYRSIN VO OD System resetinput imputat specified timing at power DRVDD 2 5V power supply Connects to digital 25V 44 vss Digital GND to DN Connects to 12C clock bus 45 sa 0120 0 WA NA 46 SDA I2C data I O for host CPU Connects to 12 data Qu Pull up performed buide 47 55 O O 7 Digita GND Connects to 50 vss Digital GND 51 STSFLGO PD flag 0 whennotused 02 sequence 8 higher 153 O RS decoding error output 2 fixed to L when 02 154 O 5 decoding error free flag output fixed to L when not used 02 55 RSEORF O J TSerorflagoutput fixed to L whennotused 02 56 1 2 Vpowengupply QY Connects digital 1 2 Vtyp 57 vss Connectsto DGND 02 58 O _ 5 X Open fixed to L whennotused 02 59 SBYTE _ TSsynchrafiiZation byte output Open fixed to L when
30. 0 4 22 al R66 10K Q632 3906 CVBS_OUT 0 22 R62 AR AVOUT V C271 1000 16 1 5 4 77 33R C46 C96 RGB 33R C51 RGB 68R C59 gt RGB1_B 68R C60 gt RGBI_G 68R C61 R 338 __ 42 gt ysv2 in R A 77 SPDIF Coaxial Out FOR UN USED PORTS REQ A ASSR C47 REA A 883R C78 R78 R346 330R NC 100R 12 SPDIF gm ESD 0402 CLOSED TO MSD309 itle AV IN amp OUT Bize Document Number A1 710 Thursday July 28 2011 Bheet 5 4 058 058 2 USB DP 2 USB DM D58 lt 2pF NC ESD 0402 lt 2 NC ESD 0402 0581 0581 DMO 2 0881 D 2 0881 D 064 lt 2 NC ESD 0402 lt 2pF C ESD 0402 ON USB MOS 1 45V USB CA110 100uF 16V close to USB connector 0581 USB1 DPO USB DMO USB DPO itle USB Size Document Number A 8 10 Date Thursday July 28 2011 Sheet 8 of 10 Rev 0 1 Power Down MUTE AMPLIFIER AUDIO pre ap HeadPhone Out R283 10K PHONEJACK STEREO SW 180d 24 SHUTDOWN 1N4148 270 1 414
31. 17L ADJ L Package SOT 223 3 INPUT 2 OUTPUT 1 ADJ GND PIN ASSIGNMENT The package of AX3113 is SOP 8L the pin assignment is given by Feedback pin Top View Power off pin normal operation Step down L Step down operation stopped All circuits deactivated Add an external resistor to set max switch output current IC power supply pin Switch pin Connect external inductor amp diode here SOP 8L 17 Block Diagram LM4558 SOIC 8 DIP 8 1 Yee OUTPUT 2 INPUT 2 1 INPUT 2 Figure 2 Pin Configuration of LM4558 Top View MP1482DS TOP VIEW SS EN COMP GND FB 18 Block Diagram W25X40BVSNIG PWP TSSOP PACKAGE TOP VIEW PVCCL 10 PGNDL SD 2 PGNDL PVCCL 3 LOUT MUTE 4 BSL LIN 5 RIN 6 AVCC BYPASS T7 GAINO AGND 8 AGND BSR PVCCR ROUT VCLAMP PGNDR PVCCR PGNDR PIN CONFIGURATION PAD CONFIGURATION SOIC 150 MIL 208 MIL WSON 6X5 MM ics ics 21 a vec DO HOLD 2 7 C PNP CLK 3 6 GND GND 4 50 Dio CONFIGURATION PDIP 300 MIL 19 Block Diagram EN25F32 Figure 1 CONNECTION DIAGRAMS 8 LEAD SOP DIP 8 CONTACT VDFN HOLD amp 2 01 3 NC NC 6 NC T GND DO 8 WPS 16 LEAD SOP 20 Block Diagram
32. 2 a a A 98664 0632 1613 erro 2 x 5 04140 amp QN9 ON 5 A VAS 2 wo 95 g gt 7682 ipeo 82 9 ot 9882 011 8889 19952 8 69825 0 82 2189 1 82 18 8071 6982 1880 88 o5 188 1180 19 88 0063 6158 os P5 les 9 R300 5 gt Nau R301 5 lt o 020202 Zo ea 5 33892383 7 R438 pod 2222020288 R437 a 8 194 BBB BIS 2 TT lt 5 681 SEO vao 9 1684 en 4 5 5 lt 3 030 5 2 69v 9019 5 224 4447 81 um S9y v2 ecu aH 1098 1759 us 3 7 5 88 23 8062 6654 R5 E 8728 9159 1012 7640 El R20 2854053 94 9LEY 8 2 49491 amp CN a lt U2 erg 2900 5 7602 1018 Doo 924 Gli Oreo 9n 2899 EN 892 1194 Oc 22a C439 99 014 S 25 fe 999 Ke n 55 amp BLZ 1649529 8219 5 2 EY 0269 LEZI
33. 8 4uF 35V Place close to OP D40 D 41 33K 416 341 R286 3 MT NC 10K 2 3906 0622 R288 47K AMP PLout R337 2 2 E_TDA3121 HIGH uF 16V 6248 R442 24K AMP PLout AUOUTL2 gt AUOUTL2 C340 2 2uF 100uF 16V C344 NC 2b0P 4 83364 IFADPHONE DET 2 CA81 E LOW 497 1N4148 AMP LIN OP VCC1 U45B OP VCC1 R443 24K AMP PRout AUOUTR2 gt AUOUTR2 C343 2 2 100uF 16V 470 TLO62 AMP_RIN 100 R461 C496 100 2010 5 8 Close to MSD309PX TDA3121 R365 1 5K OuH Inductor 220uF 35V 220uF 35V T 220uF 35V C252 20 35 AUOUTLO R278 PVCCL SD PVCCL MUTE C258 0 22uF RIN BYPASS poa 0 22uF PVCCR VCLAMP C251 C26BC26 P LIN R395 R401 PVCCR THERMAL C264 12 1uF TPA3121 MUTE PIN LOW OPERATING HIGH MUTE H18 5 LOC HOLE T NC LOC HOLE CON2 1 EMI Cover Near MST IC Ground in the middle of the L R H14 H13 1 HaT H11 H10 TPAD TPAD TPAD TPAD
34. 94 5 2 2 Ord 5 o 2 8 o o 5 29 N uo oo 35 glu vid 1070 29050 ica 5 58 61 5 58 3 4 3 888882285 8 54228202225 Bee 9820 19 Lr 5 8011 5 lt SNOO 7 09 85 lt 5 5 5 252 Fara 0 gt 95 6 44 888 5mm eo 30 15mm 2 bDIE PAW pe ME L7BE7WeC AIDEO vuajo IL t 6 bb bb quo M quo Quo quo Quo 92 MC ACC 22 TAN 1852 2820 YAY SHA SHA ISA ISA end bM bB bB OM OEE ACC TIAN Y IU M KEAO uui 861 31 Power Input 1 32V DC DC DC DC Module U50 MP1482 U3 12VA L2 81482 IN 2 R4 100K 1 0 6 14820UT 137 5VU 12 24 10k 1482 1482 100uF 16V 1482FB COMP 2 PWR ON OFF gt
35. BT RXBON DBO R14 10R RXBCLKP 8 R1 10R RXBCLKN 9 DBO R14 10R DDCBSDA 0 CLKB Po R146 10R DDCBSCL CLKB 18 HDMIB 5V Q 157 ESD 0402 HDMIB HP R152 10K ESD 0402 ESD 0402 R153 1QK lt 20 555020 4 5 R353 must pull up to HDMI 5V 2 HOTPLUGB 3904 R161 lt lt 2 1 2 R134 10R 2 R1 10R RXA2N 3 DA2 R1 10R RXA1P 4 DA1 R1 10R RXA1N R14 10R 6 DA1 R14 10R RXAON DAO R14 10R RXACLKP 8 R1 10R RXACLKN 9 DAO R1 10R DDCASDA 0 CLKA 12 R14 10R DDCASCL CLKA cec DDCASCL1 16 DDCASDA1 HDMIA_5V 18 ESD 0402 Q a E ESD 0402 ESD 0402 R158 1K R183 1QK 006679 5VA R353 must pull up to HDMI_5V 2 HOTPLUGA kiss lt lt HOTPLUGA 2 1 DC2 RXC2P R1 10R RXC2N 3 DC2 RIZ 4 DC1 R1 10R RXC1N 108 RXCOP 6 DC1 JOR RXCON DCO Rig 108 RXCCLKP 8 1 5 V 10R RXCCLKN 9 DCO R1 10R DDCCSDA 0 CLKC RIRS 7 108 DDCCSCL CLKC cec DDCCSCLi 16 DDCCSDA1 HDMIC 5V N N 8 R193 R190 R197 E n 5 HK e 5 2 92 HOTPLUGC lt HOTPLUGC 2 R358 must pull up to HDMI_5V 12215 23 21 DATA2
36. DATA2 SHIELD DATA2 DATA1 DATA1 SHIELD DAT1A DATAO SHIELD DATAO CLK CLK SHIELD CLK DDCBSCL1 NC ESD 0402 lt 0 6pF DD82 SCL eae DDCBSDA1 HDMIB_5V DDC CEC GND 5V POWER 70 HOTPLUGB1 HDMI V J as ae ae ga gt s a 8 a B sg a 8 5 5 5 5 5 5 5 9 9 9 9 9 9 5 o 5 5 0 6 0 6 K 0 6pF 0 6 K 0 6pF 0 6pF IN 5 5 8 2 21 DATA2 DATA2 SHIELD DATA2 DATA1 DATA1 SHIELD DAT1A DATAO DATAO SHIELD DATAO CLK CLK SHIELD CLK DDCASCL1 DDCASDAT 5V DDC CEC GND 5V POWER 1 1 gt 1 1 1 5 lt lt Pi e a e 5 8 5 5 5 5 5 9 o 9 9 9 9 9 A5 A5 A5 0 6 K 0 6pF 0 6pF 0 6pF K 0 6pF lt 0 6pF WE 5 8 WE Q RXC2P 2 RXC2N 2 2 RXCIN 2 2 RXCON 2 RXCCLKP 2 RXCCLKN 2 DDCCSCL 2 DDCCSDA 2 d Ga dea zi a sg a 8 gs 9 8 O 5 5 5 5 5 5 5 9 9 9 9 9 9 9 5 5 5 5
37. INEIN L1 AVi Rin AV1 Lin 9 PAD PCM 0021 PAD 751 D 2 A2 SCL 6 PAD A PAD LINEIN R1 VGA Lin AV1 Rin 2 PCM 0031 PAD 751 D 3 GND SDA 6 RXA2N PAD RX2N A PAD LINEIN L2 VGA Rin GA Lin 7 12 PAD 4 PAD 751 014 6 RXA2P PAD RX2P A PAD LINEIN R2 HD2 Lin GA Rin T PAD PCM 0151 PAD 751 D 5 I2C add 6 RXACLKN PAD_RXCN_A PAD_LINEIN_L5 HDA Ri SSAV2Lin PAD PCM 0161 751 address E PAD RXCP PAD LINEIN R5 AV2 Rin PAD PCM 07 PAD TS1 D 7 OxAO DDCDA CK PAD TS1 6 DDCASDA DDCDA DA PAD LINEOUT LO UOUTLO 9 224 pap PCM AIO PAD 51 6 HOTPLUGA amp HOTPLUGA PAD_LINEOUT_RO UOUTRO 9 PAD PCM A 1 PAD TS1 SYNC SCL FIN 3 PAD LINEOUT L3 UOUTL1 PAD PCM A 2 En EO C HONORES PAD RXON B PAD LINEOUT R3 UOUTR1 PAD PCM SDA PAD B gt PAD PCM 6 1 PAD_RX1N_B PAD_EARPHONE_OUTL 8 PAD A 5 50 m m Bese ae E eg PAD RX1P B PAD EARPHONE OUTR BES SS AUOUTR2 9 PAD 6 p I2C SDA PAD_RX2N_B PAD PCM TSO 00 6 2 PAD RX2P B PAD TS0 Dii S D1 10 MSD309Px 6 PAD 5 PAD PCM TSO 02 10 B AUVRM tous 1 32V 6 RXBCLKP PAD_RXCP_B AVSS_VRM_ADC_DAC C36
38. INO 120 pap WEZ TGPIOZ TUNER SCL AVDD25_MOD GND LM PAD_HSYNCO CVBS QUTI CS Yves OUT 7 P12 pap F RBZ PAD_TGPIO3 TUNER_SDA AVDD25_MOD GND 75 VEC B 5 5 R176 C44 0 1 ad AVDD25 PGA GND 7 Beate papa 11478 82 G8RA 8504 10K s GND conss 7 TR PADA_RIN1P zn US U8 aves GND 7 PADA GIN1M gt RF 4 141 GND FS 7 RGB1G PADA GIN1P 166 3 3VU GND 7 RGB1_B PADA_BIN1M yi GND 7 PADA_BIN1P GND 7 PADA SOGIN1 AVDD_DVI GND 6 pad doe FE AVDD 2 16 VSYNC1 Tuner 9 AVDD GND FLASH AVDD_DVI GND 7 COMP_R PADA_RIN2M TEDA AVDD_DVI GND 7 COMP_R 2 R217 100 T SCL T_SDA 4 11 GND 7 Y GIN2M 20 4 11 4 8194 _ GND 7 CoM PADA GIN2P GND 7 TB PADA_BIN2M 1 3 AVDD3P3 ADC GND 7 B 2010 9 10 For IIC selection AVDD3P3 ADC 7 506 PADA_SOGIN2 GND HY PAD HSYNC2 4 K9 _ GND da GND H __ MSD309PXx ene MX25L6445E 3 3VA GND Basa o GND T iis 306 amp MIUB 5 2 HS SPI SCK 3 0 13 lt lt MIUA AO gt gt MIUB_A 0 13
39. NER TUNER POWER RF AGC Switch Q6044ElTtuner RFAGCH KE VA1P1BF8401 VA1P1BF8402 T_RF_AGC LM7805 IFD_OUT1 IF AGC IFD OUT1 IF 5V TUNER IFA OUT VCC 5V SDA IFD OUT2 AS NC NC RFAGC M IFA OUT VCC 5V SDA SCL AS NC NC RFAGC M SDA E lt T_IFAGC 10 41 lt T_IFAGC 1011 IF OUT 10 11 IF OUT 10 11 OUT 10 11 OUT 10 11 10 11 IF DVB T IFAGC SAW Drive 5V TUNER close together Close to MSD309 itle TUNER Size Document Number Rev Custpm4 10 0 1 Date Thursday July 28 2011 Sheet 4 of 10 P1 2DATA2 SHIELD DATA2 DATA1 DATA1 SHIELD DAT1A DATAO DATAO SHIELD DATAO CLK CLK SHIELD CLK SDA DDC CEC GND 5V POWER HOT PLUG 2 2DATA2 SHIELD DATA2 DATA1 DATA1 SHIELD DAT1A DATAO DATAO SHIELD DATAO CLK CLK SHIELD 22 23 SCL SDA DDC CEC GND 5V POWER HOT PLUG 2DATA2 SHIELD DATA2 DATA1 DATA1 SHIELD DAT1A DATAO DATAO SHIELD DATAO CLK CLK SHIELD CLK SDA DDC CEC GND 5V POWER HOT PLUG 21 DATA2 21 DATA2 21 DATA2 HDMI Input cec pperscit 16 DDCBSDA1 1 DB2 106 RXB2P R1 10R RXB2N 3 DB2 10R 4 DB1 R1 10R RXB1N R1 10R RXBOP 6 D
40. RT NO 168P P32EWM KO DESCRIPTION VERSION NO 1 0 PAGE 13 DESCRIBED Zhou Cong CHECKED Hu xiangfeng APPROVED Bao xiaojie Released Date 2012 07 21 Skywortn 168 2 Service manual Modification record Modification Edition Record Described Checked Approved ate 2012 7 21 o 121 Hu Xiangfeng Hu Xiangfeng Bao Xiaojie Bao Xiaojie Skywortn 168 2 Service manual Contents NO Main contents Page General Introduction of Circuit Skyworth 168P P32EWM K0 Service manual Warning This manual is only used for the experienced service person and does not apply to the general consumer The manual does not have warnning or alert for the potential hazards caused of the non technical personnel attempting to repair this product Electrical products should be an experienced professional and technical personnel for maintenance and repair any other person attempts to maintain and repair the products covered by this manual will likely be seriously hurt or even life threatening 1 General Description 1 1 General description of power supply This power apply to 32 inch universal standard power interface the total standby power consumption less than 1W 5V DC the Load 50mA protection functions low cost mature power supply structure the voltage range is 90 264V and wide supply voltage input For 32 LED panel s
41. SERVICE MANUAL 8M79B CHASSIS Design and specifications are subject to change without prior notice Only Referrence Description SERVICE MANUAL 8M79B MODEL Brand Name SKYWORTH Artwork By Date 2012 02 04 SIZE A5 Engineering Dept Conte 2 Technical Specification 3 13 8M79 Block Diagram 14 List of key LM 15 BLOCK Diagram 16 29 MAIN 2a cce 30 MAIN 31 Circuit Diagrams 32 40 2 Technical Specification 1 Application Area This product standard is used for LCD 8M79B chassis 2 Specification the standard are measured under following conditions without other specification 2 1 Ambient Temperature 20 5 C 2 2 Relative Humidity 65 10 2 3 Power Supply Voltage Standard Input Voltage 100V 240Vac 50 60Hz 2 4 Adjust after 20 minutes warm up 3 Test and check method 3 1 Capability According to nation test standard 3 2 Safety standard EMC standard Technical Specification 4 Safety and Regulation
42. TATUS 3 3 3 The chip pin information Skyworth 218 3 3 4 The pin description and the voltage COMP1 ISEN2 COMP2 ISEN3 COMP3 ISEN4 COMP4 ISENS COMPS ISENG DRV VREF SW oo CMP LCT UVLS j 5 M D STATUS TIMER OYP RANGLED ISEN1 _ 8 8 o WX ES __ 2 gt gt 24 HS ENE NN _ _ 168P P32bEWM KO Service manual Control signal for LED balance switch 1 LED current sense signal 2 Control signal for LED balance switch 2 LED current sense signal 3 Control signal for LED balance switch 3 LED current sense signal 4 Control signal for LED balance switch 4 LED current sense signal 5 Control signal for LED balance switch 5 LEDcurentsensesignalG 0 Control signal for LED balance switch 6 Power ground MOSFET drive signal 0 Reference voltage 0 20 Timing resistor and capacitor for high frequency oscillator Signal ground Fower MOSFET current sense signal Input voltage Enable signal SOft start and compensation Timing resistor and capacitor for low oscillator frequency Input voltage under voltage protection imming control signal Controller status indicator Timing capacitor for delay timer Over voltage protection sense signal short protection threshold curre
43. TPAD 2 0 0 0 H15 H16 H2 7 l TPAD TPAD 1 TPAD 1 TPAD TPAD Title AUDIO Size Document Number Rev A2 9 10 0 1 Date Thursday August 04 2011 Sheet 9 of 10 5 4 3 2 1 5 60mA 3 3V_Demod 1406 B3_3 3V 0603 C859 861 jm closed to Demod 1 2V Demod 1410 FB220 300mA B4 1 2V 120 2 5V Demod 1441 AD DVDD FB0603 C886 888 1u 1u closed to Demod L10 2 5VA FB 2 5V_Demod dn m C897 100uF 16V N1 AMS1117 3 3V 3 3V_Demod 100uF 16V 100uF 16V N2 AMS1117 1 2V 1 2 Demod 3 3V_Demo 4 C892 C890 C891 0 10 889 0 1u 100uF 16V 2 5 Demod L407 DR2VDD 0603 g o e o 1u 2 5V_Demod L408 AD_AVDD FB0603 869 C871 0 1u 2 5V_Demod L412 R532 NC 1K IF AGC CIRCULT 3 3V_Demod R509 4 7k 2 Demod_RST R51 008 5 SCL 2 SDA E gt gt gt 45 4 oo ws T1 B4 12V a mom Q 19 OA Yo 5 tr inc B3_3 3V 055 3 T um 9 49 R51 3R VDDS 35998858 x 2988828 C866 R51 R OUT 05 lt lt gt gt 57
44. Team Power Supply R amp D Center Hu Xiangfeng and Zhou Cong Email huxiangfeng skyworth com zhoucong skyworth com 7 Schematic diagram C210 C301 R301 R210 1301 24 2 0301 gt 6303 0304 0205 SERO Q303 Q301 N gt R306 n Q201 cds SUE 5 R308 0206 R303 gt 306 R307 R300 R203A R302 R304 Ds R207 268 8209 T R202A R203 8204 0302 TEAL TSS 20205 4 R211 R212 C312 0300 C314 20302 Visense Isense 309 C310 C311 ses Protect Driver S C206 208 R213 R326 VDR101 ino 2 vcc H 0303 20308 0207 215 8317 W 20201 6297 il ia 1 301 R205 c24 C205 R206 iN Sw 1303 5 0 5 PNS 0202 8 ix im S lt gt 4 C322 AN 8 R319 R311 R323A R323 20304 L 5 2 0305 7 A R327 SPECIFICATION C330 gt pape INPUT 90 264V AC R316 R316A OUTPUT 24V 2A lt 7 412V 2A 5VSB 0 5A D402 bi 100V 5A L401 VOUTB D401 CON 9 68uH 5A ON OFF 100V 5A C401 100V
45. _ RIN VGA VS 68R C92 4 DDC SDAIN A100RDDC SDA NC ESD 0402 4 DDC SCLIN RUS A100RDDC SCL gt STEREO SW 1804 _806 Videoin 6100 020100 0410 4 RA 66 2 2 gt gt VGARIn Videoin RA A 33 101 47 33R C49 33R 45 6100 266010 1500 C68 cn R95 _ 200 2200 756 33R 48 COMP R ESD 0402 NC ESD 0402 1 68R C76 Y 688 C81 B 68R C88 NC 24C02 VCLK SCL SDA DDC SCL DDC SDA VGA Lin1 4 C63 2 2 gt VGALn 020 C65 U6 24C01 24C02 solder R125 and left R120 float 200 PSA 6100 020000 0410 VGA AUDIO ESD 0402 5 56 100R AVOUT V XGA HSYNC veri 15 AVOUTV 100R 2 VGA VSYNC VGA VS INEOUTR DDC SDAIN DDC SCLIN FOR UN USED PORTS VIDEO OUT 5VA O 201
46. anual 5 3 Key components and service parts list Material Position Substitute Material number Function Remark models number Material 4706 B 17330 0080 TEA1733P 100 47 581721 0080 SY8172Y IC301 DC DC chip LED driver 476 799671 0280 OZ9967GN 400 chip D301 Secondary 451F 210200 0000 10200 D302 Schottky 47 817 0 04 817 Optocoupler pf 0 4 Storage transportation and using conditions 5 4 1 Package Box must have the product name model identification quality inspection department certification the date of manufacture and so on 5 4 2 Transportation The productor adapted to cars boats aircraft transport Transportation should be covered prevented sunshine and loading lightly 5 4 3 Storage Products should be stored in a box if it is not used The storehouse environment temperature is from 40 55 relatived humidity is from 10 to 95 The storehouse must not allow any harmful gases flammable explosive and corrosive product chemicals and must not strong mechanical vibration shock and strong magnetic field Boxes should be at least 20cm high from the ground The distance from the wall heat source windows or air enter is at least 50cm The storage period is about two years more than two years should be re tested under the regulation 13 Skyworth 618 168P P32bEWM KO Service manual 6 Information of Power supply designers
47. bit at EMR 1 A10 EMRS command Data Strobe for Upper Byte Output with read data input with write UDQS data for source synchronous operation Edge aligned with read data B7 A8 UP Data Strobe center aligned with write data UDQS corresponds to the data 008 0015 only used when differential data strobe mode is enabled via the control bit at EMR 1 A10 EMRS command All commands are masked when is registered Bi directional data bus F7 E8 Chip Select HIGH provides for external bank selection on systems with multiple ranks is considered part of the command code RAS CAS Command Inputs 22 along with define the command being DM is an input mask signal for write data Inout data is masked when K7 L7 K3 UDM Inout Data Mask is sampled high coincident with that input data during Write B3 F3 LDM access is sampled on both edges of 205 Although DM pins input only the DM loading matches the DQ and 005 loading CLK and CLK are differential clock inputs All address and control CLK Differential Clock input signals are sampled on the crossing of the positive edge of CLK J8 K8 PU Inputs and negative edge of CLK Output read data is referenced to the crossings of CLK and CLK both directions of crossing CKE registered HIGH activates and CKE registered LOW i deactivates clocking circuitry on the DDR2 SDRAM VREF Reference Voltage VREF is r
48. ccess Class Cabinet Design Example 01 23 series E72 Product Nb Chassis solution MSD309 ISDB T Demod 8M79B Chassis name Chassis PCB Standard Skyworth RGB New Standard Predecessor replace MP date requested ETD MP date confirmed by supplier ETD ETA otatus Pre Finish Regional requirement 2011 8 Homologation 5 Power supply 100 240V AC 10 100 240 20 10 Power consumption working Annual Power consumption standby Power plug VDE UL BS Picture displa Screen size diagonale inch 42 47 55 io 16 9 4 3 1 15 9 16 9 1st panel supplier panel suppliers LG UCIEE 2pins st panel supplier panel reference Panel Display Type MVA PVA IPS TFT LCD st panel supplier resolution 42 47 55 1920x1080 210000 1 Dynamic contrast ratio lt gt 5 5 5 Comb Filter 20 30 Noise Reduction adaptative 3D Picture improvement LTI CTI BLE WLE U LTI CTI Color process Gama correction Skin correction Follow main Colour preset Cool Normal Warm Personal Neutral Cool Warm and Personal in PC mode Picture control Bright Con Sharpness Color Tint Yes Picture presets Standard Bright Soft User Normal Soft Personal Bright i L Technical Specification Picture freeze Yes Multi picture
49. eference voltage for inputs VDD Power Supply Power Supply 1 8 0 1V C1 C3 C7 C9 E9 G3 G7 G9 A NO A1 E1 J9 M9 R1 A3 E3 J3 N1 P9 ME VDDQ DQ Power Supply DQ Power Supply 1 8V 0 1 4 VSSQ DQ Ground DQ Ground Isolated on the device for improved noise immunity A2 E2 L1 R3 R7 R8 NO VSSDL DLL Ground DLL Ground VDDL DLL Power Supply DLL Power Supply 1 8V 0 1 28 Block Diagram PRELIMINARY W9751G6JB winbond 6 BLOCK DIAGRAM DLL BUFFER CONTROL SIGNAL GENERATOR COMMAND DECODER COLUMN DECODER COLUMN DECODER CELL ARRAY BANK 0 CELL ARRAY BANK 1 ROW DECODER ROW DECODER MODE REGISTER SENSE AMPLIFIER SENSE AMPLIFIER ADDRESS BUFFER PREFETCH REGISTER COUNTER COUNTER DATA CONTROL BUFFER CIRCUIT CONTROL REFRESH COLUMN DECODER CELL ARRAY BANK 2 CELL ARRAY BANK 3 ROW DECODER ROW DECODER SENSE AMPLIFIER SENSE AMPLIFIER NOTE The cell array configuration is 8192 1024 16 29 15mm mw 5 e 5 28 0094 2674 6075 9013 814 m CON7 ib one ow ne emm 225 2222 22289532 ag 2828 2528 900 824 5858 79008624 99 6689 6882 8680 2682 299
50. ged from conventional FLOCK Block Diagram PRELIMINARY W9751G6JB aaa Winbond sama 4 BALL CONFIGURATION 1 2 9 8 9 ies rss ve oes ore pua resa ren pue rss rers pm pe Tes sa favs one pe psa ve oni one o CALA oor 2 Block Diagram PRELIMINARY W9751G6JB _ winbtbond 5 BALL DESCRIPTION Provide the row address for active commands and the column M8 M3 M7 N2 N8 N3 address and Auto precharge bit for Read Write commands to select N7 P2 P8 P3 M2 P7 0 12 Address one location out of the memory array in the respective bank Row address 12 Column address 9 A10 is used for Auto precharge BAO BA1 define to which bank an ACTIVE READ WRITE is RIGO PRECHARGE command is being applied G8 G2 H7 H3 H1 H9 D F1 F9 C8 C2 D7 D3 DQ0 DQ15 ata Input D1 D9 B1 B9 Output K9 ODT On Die Termination ODT registered HIGH enables termination resistance internal to the Control DDR2 SDRAM Data Strobe for Lower Byte Output with read data input with write 1008 data for source synchronous operation Edge aligned with read data LOW Data Strobe center aligned with write data LDQS corresponds to the data LDQS 000 007 LDQS is only used when differential data strobe mode is enabled via the control
51. ghing 7 GrossWeightin Kg Design Mechanical eee Yes Adaptor for VESA wallmount compatibility accessory ref Yes Panel Tilt Fowards Backwards Rotation Glass shield yes No Fmshonsde OSS Finish on stand Detachable speaker yes No 13 Uplayer1 p KEY PAD IR Receiver Ambient Sensor AJ 002 S PDIF Side Terminals 14 List of key parts SL R3018H 3E 5600 106154 0060 Speaker YDG3040 2 5600 708254 00 Ge 24401 4900 744015 0 00 4903 4900 125453 000 3 MP1482DS 476A M14820 0080 MP1482DS 476A M14820 0080 MP1482DS 476A M14820 0080 MP1482DS 476A M14820 0080 W9751G6JB 25 4737 W975 11 0840 W9751G6JB 25 4737 W975 11 0840 Ic A11170 AS1117L 3 3 47B6 A11170 03 A11175 TPA3121D2PWPR 4722 T31210 0240 U HC 49U S 4900 124053 000 EN25F32 100HIP 471 R N25321 0080 TC90517FG 4701 T905 10 0640 AS1117L 3 3 47B6 A11170 03 38 AS1117L 3 3 47B6 A11170 03 AS1117L 1 2 47B6 A11175 0300 MSD309PX LF ZI SB 475C M30900 5230 Block Diagram Pin Configurations AS1117L 3 3 L Package U Package SOT 223 SOT 89 3 INPUT 2 ourPuT Vout 1 ADJ GND T Package R Package TO 220 TO 252 3 an Vout 2 4 OUTPUT ADJ GND 5 Package 263 INPUT OUTPUT ADJ GND 16 Block Diagram Pin Configurations AS11
52. he operating frequency is 65KHz 3 1 2 The chip pin information 2130 3 1 3 The chip block diagram vccstart D 21V 400 mV gt 12V E VOCstop camp 5v gt LatchReset GND OSCILLATOR MODULATION DutyMax 4 Freg reduction CTRL DRIVER PROTECT BLANK stat to OCP VINSENSE OVER POWER CORRECTION INSENSE DIGITAL CONTROL Skyworth 168P P32EWM K0 Service manual 3 1 4 IC pin description Symbol Pin Description VCC 1 supply voltage GND 2 ground DRIVER 3 gate driver output ISENSE 4 current sense input VINSENSE 5 input voltage protection input PROTECT 6 general purpose protection input CTRL 7 8 overpower and restart timer 3 2 The DC DC chip 3 2 1 General description The DC DC used for standby chip using SY8172Y double synchronous rectification and operating frequency is 700KHz 3 2 2 The chip block diagram PWM Control amp Protection Logic Skyworth 168P P32EWM K0 Service manual 3 2 3 The chip pin information 3 2 4 The pin description and the voltage Pin Name Pin Number Pin Description m 5 Boot Strap Pin Supply high side gate driver Decouple pin to LX pin with pf 0 luF ceramic cap 2 Input pin Decouple this pin to GND pin with
53. k 12 V voltage of the MOS transistor Q300 S pole is normal or abnormal if it is normal please check the MOS transistor Q300 peripheral circuit is normal or not If the 12 V voltage of the MOS transistor Q300 S pole is abnormal please check the IC100 circuits 3 5VSB is abnormal Check the 5 VSB feedback loop and the reference voltage of the IC301 is normal or not 10 Skywortn 168 2 Service manual 5 2 Service process NO 5VSB Check 5V output Whether the short circuit Examine the reason Is IC301 damaged Change the damaged component Y _ Check the peripheral circuit of 01 Examine positive voltage of C312 11 8V 12 2V Is IC100 damaged Change the damaged component Y Examine the reason and Change the damaged component Check the peripheral circuit of C100 N Examine overvoltage detection circuit Q304 ZD304 ZD302 ZD303 amp Change the damaged component 11 Skywortnh 168 2 Service manual 5 2 Port and the connection defined 5 2 1 PINIO CN400 Connection And Function Note CN400 TYPE 2 0mm 5 2 2 14 CN300 Connection And Function _ 24V DC OUTPUT EUN Note CN300 TYPE 2 5mm 12 Skywortn m
54. nt sense signal 1 Skyworth 168P P32EWM K0 Service manual 4 TopOverlay and BottomOverlay 4 The power supply TopOverlay E 34 85 5 5 bar code E L T ru 140 5 imm iB 222 Cmm Y TT FT cL a CWI SBS lt 200 amp mm amp 208 mm 4 2 The power supply BottomOverlay Skywortn 168 2 Service manual mm lt ET IPLE e atto p N 7 P Ji a as AN _ 200 208 5 Maintenance instructions 5 1 Common Fault Analysis and Notes 1 No 5VSB output voltage If there is 5VSB output voltage we should focus on checking the DC DC IC IC301 and judge whether the IC is operating Monitor its VIN pin and check voltage is normal or abnormal If it is normal firstly check the DC DC IC peripheral circuit Secondly check DC DC IC IC301 and judge it has broken or not If the VIN pin voltage is abnormal you need to check the IC100 power circuits 2 5VSB output is normal 12V output is abnormal First chec
55. power supply to digital 1 2 V typ PLLVSS Clock PLL to AGND to crystal osl 1 and open when an external reference clock is input Crystal refe amplitude is 0 5 to PLLVDD when external reference clock is input 20 puvo H cockpit Connects o anatog __________ x FL 7 to AGND via 22 AD_AVDD analdtypowaP supply Connects to analog 255 0 2 AD AVSS aopa 24 lab voltage output 4176 V typ Connects to AGND Va PC 725 AD_VREFN voltage output 4076 V typ Connects to Single ended IF Connects to AGND V signal differential negative side Differential IF Connects to AGND PC 2d ADQ AIN ie Single ended IQ Connects to AGND via PC Differential IQ Connects to tuner Q output after the DC component was cut Single ended IF Connects to AGND via PC Differential IF Connects to AGND via PC 28 CN Q signal differential positive side Single ended IQ Connects to tuner Q output after input the DC component was cut Differential 10 Connects to tuner output after the DC component was cut Single ended IF Connects to AGND via PC IF signal differential negative
56. rent Control Channel lock For digital transmission and DVD program to filter some programms Calendar Games Yes No 15 mins T B D No program auto switch off Hotel mode Y N DVD player No slot tray No Tuner FM yes No No software download RS232 CI USB OAD USB Factory reset Yes 11 Technical Specification 02000 BueBak Connectors Rear Scart CVBSingout RGB SVIDEO CINCH audio out volumpe control Audio 0 out can be jack 3 5mm Swoon Component Video Component Audio VGA Audio L R Jack audio 3 5mm VGA dia 3 5mm for audio in Audio input for DV CINCH subwoofer out Coaxial out S PDIF Headphone output connector mm CINCH subwoofer out Coaxial out S PDIF out Coaxial 85232 YIN VGA or DBO por EN NN Card Readers USB slot 1 1 2 Software update JPEG MP3 WMA RMVB DivX Multimedia on license 1 Software update JPEG MP3 WMA RMVB DivX Multimedia USB slot No 1 1 2 depends on license DVB Cl commoninterfacs BINA E um Accessoesinduded 12 Technical Specification English Yes Audio Cord Jack 3 5mm in 1 YPbPr 8 CVBS cable adapter General Size Wx H x D with stand in mm Sze WxHxD Package Size W x x D without stand in mm me NeWe
57. side Differential IF Connects to tuner IF output after 29 ADI AIN input or signal differential component was cut x negative side input Single ended IQ Connects to AGND via PC Differential IQ Connects to tuner output after the DC component was cut Single ended IF Connects to tuner IF output after the DC component was cut IF signal differential positive side Differential IF Connects to tuner IF output after 30 ADI AIP input or signal differential the DC component was cut positive side input Single ended IQ Connects to tuner output after the DC component was cut Differential 10 Connects to tuner output after the 25 Block Diagram TOSHIBA CONFIDENTIAL TC90517FG Toshiba products specification Tentative oe componentwascut SSS rar AD DVSS omects to EN 32 AD DVOD ADC digital powersupply Connectstodigtal 25 vss bigien Connects to DON 34 DRIVDD Digital 1 2 power supply Connects to digital 12 V yp 35 voos power supply Con nects to digital 36 Digtal 1 2V powersupply Connectstodiital12Vtyp vss pigital GND 0 P Status flag output fxedtoLwhennotused 39 PD Pin for pre shipmenttest OpenorconnecstoDGND 40 DIMB PU
58. trol Synchroni Control FFT windo CSI Equalization control reliability zation detection detection External AGC AGC distortion signa Tuner Layer TMCC Host control isolation demodulation Crystal Clock PLL Frequency d a Viterbi Energy RS Error Synchroni reference clock deinterleaving processing decoding despreading decoding detection zation flag ud a X Time Demapping CSI 2 4 TC90517FG Block Diagram Energy despreading Modulation division Bit deinterleaving TS multiplex Energy despreading Byte deinterleaving processing 23 Block Diagram TOSHIBA CONFIDENTIAL TC90517FG Toshiba products specification Tentative 3 Pin Assignment Top view ou 5 gt v cc 49 VDDSA 7 DVDD 32 B50 vss AD DVSS 31 STSFLGO SLOCK RERR ADQ AIP RLOCK ADQ AIN 27 RSEORF VDDC AD VREFN 25 VSS AD_VREFP PBVAL AD_AVSS SBYTE AD_AVDD SRDT FIL 218 SRCK PLLVDD 20 VSS 19 63 VDDC 18 ADI AIP cc 64 VDDS nA A PLLVSS 17 cc m G m lt A a Ann n x a e x x HHA
59. upplies 4 channels each channel nominal current value is 130mA 1 2 Main technical specifications 1 2 1 Input Electrical Characteristics Input voltage range 90 to 264Vac Rated voltage range 100Vac to 240Vac Frequency range 50Hz 60Hz 5 0 85 at 100Vac input amp full load condition 1W 240Vac input 50mA Load of 5V 1 2 2 Output Electrical Characteristics Output Regulation Min current Rated current Peak current Note pulse width within 100ms Skyworth 618 1 2 3 Output ripple and noise Output Voltage Ripple amp Noise Max 168P P32bEWM KO Service manual 5VSB 100mVp p 25 200mVp p 10 C Note 1 Measurements shall be made with an oscilloscope with 20MHz bandwidth 2 Outputs shall be bypassed at the connector with a 0 10 ceramic capacitor and 10uF electrolytic capacitor to simulate system loading 2 Circuit description 2 1 The power circuit diagram Boost LED DRIVER Main power Secondary 24VDC control filter circuit circuit Output AC Standby control signal Overvoltage detection circuit 2 2 Each part of the circuit description 2 2 1 main part of the circuit NXP TEA1733P Switching 12VDC VDC Ema circuit Output Filter circuit Optical coupler DC DC Standby Output
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