TR-67J60LAN_USB取扱説明書 Ver1.0
Contents
1. 13 TR 67J60LAN USBI IP 3 IP 192 168 11 50 3 192 168 11 50 Enter IP 8 DHCP 8 IP 8 DHCP 0 EEPROM 14 ITR 67J60LAN USB 7 7 1 6 6 1 6 7 11 11 3 TR67J60LAN LED 2 LED 4 3 LCD 12. L1 CN1 GND 2 GND 3 3V 5 4 3 3V 33uH RD2 RD1 L RDO gt 1 8 RE5 en RE4 34 9 0 R2 R3 0 1uF RE2 99 lt RE1 lt SIB SIR gt 1 1 5 6 RB2 Ai papapa 009 TPoUT 170 RB3 SS 7 8 22 MCLR X E Z Z E E E R1 4 RG4 19 20 RF7 22k 3 3V TPouT 2 TD RF6 RF5 23 24 2 4 TPIN 3 RD RF2 9 25 26 X FFI T oa F HEADER13X2 7 TPN gt RD i 519999 9 599 9 N NC GND 2 2 OO 89 2 ms R7 330R CHS GND 3 3V 3 4 3 3V 51 4 SIR LED L A RC3 SCL 5 6 QQ RC4SDA BE gt OE gt LEDE K RA3 6 2 e RE 380R 5 00 9 RA4 TS LEDA 12 LED R A 4 LED R RC6 TX1 SS 3 4 RCT7 RX1 RE1 lt lt L BE1 P2C e 48
3. 5 3 IP TOP IP Microchip Microchip Ethernet Discoverer Microchip TCP IP Stack C Microchip Solutions NMicrochip TCPIP Stack Utilities 29 Microchip TCPIP Stack v4 55 Ethernet Discoverer TCP IP Stack PIC 6 1 P102 8 ITR 67J60LAN USB 0 Microchip Ethernet Device Discoverer 921681122 TRLANF922 00 10 47 9 22 _ Other Info TRLANxxxx MAC IP xxxx MAC 2byte
4. CN4 ICSP C Microchip web ICSP ICD2 ICD3 PICkit2 ICSP 12 ITR 67J60LAN USB 6 2 1 USB PC SW1 USB JP1 SW1 JP1 SW1 Demo E RRO WEO MED Dag 53 DA Microchip TCP IP Config Application v4 55 Sep 11 2009 Change serial number 63778 Change host name TRLANF922 Change static IP address 192 168 1 105 Change static gateway address 192 168 1 1 Change static subnet mask 259 259 259 0 Change static primary DNS server 192 168 1 1 Chang
5. gt R10 ITR 67J60LAN USB TR 67J60LAN USB 10 5 G5 UTK TOP 192 168 11 11 PR 10 ITR 67J60LAN USB 6 IP 6 1
6. Discover Devices http 192 168 11 22 5 3 TR 67JepLaN usB P go E 192168 w AN2 3 AN2 AN3 Coe HAMT N B 4 1 4 RB0 3 Hi Lo A D AN2 915 920 LED1 2 LED1 2 ON OFF 1 gt Hi 2 gt Hi 3 gt Hi 4 gt Hi LED1 OFF F LEDI gt gt 72 gt OON OFF LED2 LED2 ON OFF
7. 3 3V CN1 CN2 1 0 3 3V 300mA 3 5 LAN 10BASE T Ethernet HUB 3 6 USB USB1 1 B COM 3 LED LED1 RD1 59Pin LED2 RD2 58Pin LED3 ITR 67J60LAN USB 3 8 SW1 RC5 10kO IP 3 9 ICSP In Circuit Serial Programming CN4 Microchip ICD2 PICKit2 Pin CPU MCLR 7 3 GND ITR 67J60LAN USB 4 4 1 CNI
8. UART ITR 67J60LAN USB 5 2 IP DHCP LAN DHCP DHCP DHCP DHCP _6 IP LAN TR 67J60LAN USB MBR go ie 192168 v x REO y gt http trlanxxxx Gongle f LAN xxxx MAC 2byte p LAN MAC 2pyte TR 67J60LAN USB p TOP 00 10 47 FC F9 22 http trlanf922
9. 1 Pin RE1 P2C RBO INTO FLTO RB3 INT3 RG4 CCP5 P1D RF7 SS1 RF5 AN10 CVref RF4 AN9 RF2 AN7 C1OUT RF1 AN6 C2OUT ITR 67J60LAN USB 42 CN2 2 Pin CPU 1 GND SDA 7 RA3 AN3 Vref 21 9 RA5 AN4 27 12 RCO T1OSO T13CKI 30 FT232RL 15 RC2 ECCP1 P1A 33 UU UI U 5V 43 CN3 ITR 67J60LAN USB 5 5 1 LAN LAN 1 USB 5V CN3 JP 1 2 USB USB JP1 USB COM UART 3 USB JP1 5V CN3 USB USB COM
10. 17 EBRA 0 18 TR 67J60LAN USBI 1 TR 67J60LAN USB 1 JP1 1 2 320 0844 8 1 2 4 TEL 028 633 4343 FAX 028 633 5105 TR 67J60LAN USB CPU PIC18F67J60 I PT DC5V 170 mA 72mmx47mm FR 4 t 1 6mm I O 35 2 USB 25MHz 41 666MHz I O 26Px1 2 1 LAN TOBASE T RJ 45 USB USB1 1 Mini B ICSP 6P LED x1 x2 1 ITR 67J60LAN USB 3 3 1 LAN USB CZ
11. 5 6 _ gt 2 VddRx RC2 RC5 REO RE0 P2D TPIN TPIN 13 FG lt Z 8 2 al a6 lt 1 RB5 o RB4 RBO RBO INTO FLTO TPIN TPIN 14 FG 5V 3 20 2 5 RB1 lt lt r _ RB1 INT1 vsshz 48 HC49 ZENNA HEADER10X2 RB2 6 2 RB2 INT2 RB4 KBI0 gt RB4 lt J0011D21B RB3 RB3 INT3 RB5 KBI1 RB5 FG MCLR lt RB6 KBI2 PGC 41 PGC d 22pF RG4 lt 8_ RG4CCP5 P1D Vss P 40 OSC2 2 10 Vss OSC2 CLKO 3 DS jj Vddcore_ OSC1 CLKI x C6 RF7 lt L L RF7 SS1 Vdd 3 3 3V Y 22 sev 1ouF RF6 RF6 AN11 RB7 KBI3 PGD PGD i RF5 lt 13 RFs AN10 CVref lt RC5 SDO1 28 RC5 Le RF4 lt lt t _ RF4 AN9 T ncaspn jspaAi 35 RDR rS 15 JX 34 C4 RF3 RF3 AN8 95 RC3 SCK1 SCL1 D1 16 33 0 1uF RF2 RF2 AN7 C1out PAES BE RC2 ECCP1 P1A gt gt RC2 E A lt lt Am 3 3V 182076A gt gt OB 3 3V 3 3V IC2 5V IC4 3 3V 9 99908 590045 T 1 8 1 TA48M033F S VCC A0 SNE 2282215585 ouF elWP IN lt lt gt gt R8 ro SCL A2 1 dodd ddyd PIC18F67J60 VPT 10k 1ok SDANSS I eiuF 47uF B2B XH A MS N N 1222 RC4 SDA lt otroc
12. gt lt gt lt T 2889 66 8 3 3V 3 3V 33v R13 330R LED3 OSNG3133A 3 3V A EEDA R10 10k AYA RC7RX1 1 28 R11 330R ena EP OSDR31334 MCLR gt 11 DTR osci RD1 gt AA 4 2 3 RTS TEST 26 3 4 x R12 330R LED2 OSDR3133A 4 VCCIO AGND 25 4 LED2A RC6 TX1 5 RXD H RD2 gt AA PeC gt gt 2 e RA EE XG8S 0231 CN5 6 7 22 VBUS 1 NR CBUST 2 USBDM 2 VBUS 3 3V SZ HEADER 6P R NC GND 21 USBDP D 0 DSR vcc 20 DCD RESET X H CTS 218 4 012 2 SGND 12 CBUS4 3VsouT H FG 16 0 1uF 7 SW1 10k 13 CBUS2 USBDM 18 cls FG itie CBUS3 USBDP o RC5 PI 18 LAN uB OOO TR6 60LAV UB VLO PASER SKHUAAA010 Size Document Number Re x X60A MB 5ST x A4 TR 67J60LAN_USB B Date Tuesday September 01 2009 Sheet 1 of 1 4 3 2 1
13. A Ig t f USB IC ICSP 3 2 USB FT232RL E PROM CPU PIC18F67J60 3 3V 3 w ITR 67J60LAN USB 3 3 DC 5V USB 5V CN3 JP1 CN2 GND PIN USB 400mA JP1 USB USB HUB JP1 USB 3 4 3 3V CPU 1 0 3 3V
14. IP TCPIPConfig h define STACK_USE_DHCP_CLIENT MACADD_USE_EEPROM MACADD_USE_EEPROM EEPROM IC2 application Options 5 J WW Application Level Module Selectinn Uncomment or comment the following lines to enable disabled the following high leyel application modules Hdef ine STACK_USE_UART Application demo using UART for ad i def ine STAEK_USE _JART2 TCP _BRIDGE UART to TCP Bridge application exampl Wdefine STACK _USE_ IP _GLEANINGI Hdef ine STACK _USE _ICMP _SERVER Hdef ine STACK _USE _ICMP _ELIENT Hdefine
15. 2 5 P91 2 6 1 6 5 1 1 3 A TR67J60LAN HardwareProfile h elif defined YUUR_BUARD Define your own board hardware profile here define LEDO_TRIS TRISDbits TRISD1 gt RDI define LED0_IO PRTDbits RD def ine LED1_TRIS TRISDbits RE3 gt RD2 LED1_ID hita D2 define 1 _10 PORTEbits RE4 define LED3_TRIS SE define LED3_II PRTEbits RE5 TRIS define LED5 TRIS TRISEbits RD1 gt def ine 05 10 PHRTEbits define LED6_TRIS TRISEbits RD2 gt RE3 katino LERE 10 SPORTER Ika E3 def ine LED _IH PORTEbits RED define LED_IO volatile unsigned char amp PORTE def ine BUTTONO_TRIS TRISBbits TRISB3 def ine BUTTONO IO PRTBbits RB3 define BUTTON1_TRIS TRISBbits TRISB2 def ine BUTTON1_IO PORTBbits RB2 define BUTTON2_TRIS TRISBbits TRISB1 def ine BUTTON2_IO PHRTBbits RB1 define BUTTONS _TRIS TRISBbits TRISBI def ine BUTTIN3_In PHRTBhits RBI define BUTTON _SET_TRIS TRISBbits TRISB4 def
16. STAEK_USE_HTTP_SERVER Old HTTP server def ine STACK_USE_HTTP2 _SERYER New HTTP server with POST Cookies i def ine STAEK_USE_ SSL SERVER SSL server socket support Requires ne y SSL client socket support Requires 5 maerime STACK USE CLIENT STAEK USE FTP SERVER Wdefine STACK USE SMTP_CLIENTI Data Storage plionsi W MPFS Configuration is automatically included whgn required for other applications If your custom application requires il 1 a otherwise uncomment the approprikte selection 1 fdefine STACK_USE_MPFS1 STAEK_USE_MPFS2 fe NPFS Storage Location If html pages are stored in internal program comment both MPFS_USE_EEPR MPFS_USE_SPI_FLASH then include an MPFS image slfile in the project 1 If html pages are stored in ext rnal memory uncomment the 1 appropriate definition Supported serial flash parts i i def ine MPFS_USE_EEPROM define MACADD_USE EEPROM 1925MAC7 2l E2PROMW W EEPROM Addressing Selectioni If using the 1MbIt EEPROM uncomment this linet lude the SST25VWFxxxB series 1 11 ITR 67J60LAN USB TCPIPConfig h MAC IP Default Network Con
17. PIC TR 67J60LAN USB V1 0 2009 09 21 Trinity http www itrinityJp ITR 67J60LAN USB DAA 1 CA 1 I CEC 2 p Wp Wl Zm gA Gr op a a We oe 2 3 2 2 3 3 3 34 HERA e e lt w w w 6 k w e 6 6 w w q s w s w Se 3 35 LAN 3 3 6 USB CE 3 37 LED gt e e e e e 3 3 8 e 4 3 9 ICSP 4 4 4 4 4 4 4 Byaba O b Si DN Garik 5 41 CNT xe eDec C s sse e e e al ltlltl vllgs lt t e 5 42 CN2 F 44444445455 6 43 CN3 e c cc l CLCCLlICl Lo 6 e BAR OE Say 7 7 5 2 CC 8 i A ve 9 IP 11 6 1 PC 1 6 2 1 13 PC 15 7 1 PC 15 7 2 6 1 6 5 1 1 3 s e e 4 4 15 7 3 6 6 6 7 99080 16
18. e static secondary DNS server 192 168 1 1 Disable DHCP amp IP Gleaning DHCP is currently enabled Download image Save amp Quit enu choice 19200 8 N 1 1 9 Enter 0 EEPROM Settings saved MAC MAC 1 Change serial number 1 MAC 2byte 2byte 16 10 0 65535 Enter MAC 00 10 47 FC F9 22 2byte F9 22 16 F922 10 63778 1 63778 Enter 4byte MAC
19. figuration These settings only used if data is not found in EEPROM clear EEPROM hold reset the board and continue holding until the LEDs flash Release and reset def ine MY_DEFAULT_ HOST _NAME TR67J60LAN define MY_DEFAULT_MAC BYTE1I 0 00 MY_DEFAULT_MAC_BYTE2 H def ine MY_DEFAULT_MAC_BYTE3 0x4 x def ine MY_DEFAULT_MAC_BYTE4 0 def ine WY_DEFAULT_MAC_BYTES 0xF3 def ine MY_DEFAULT_MAE_BYTEE 0x22 MY_DEFAULT_IP_ADDR_BYTE1I define MY_DEFAULT_IP_ADDR_BYTE2 168ul Pe x def ine MY_DEFAULT_IP_ADDR_BYTE3 101 IP def ine MY_DEFAULT_IP_ DDR_BYTE4 10501 def ine MY_DEFAULT_MASK_BYTE1I 25501 def ine MY _DEFAULT_MASK_BYTE2 255ul def ine MY_DEFAULT_MASK_BYTE3 255 def ine MY_DEFAULT_MASK_BYTE4 001 def ine MY_DEFAULT_GATE_BYTE1 192ul def ine MY_DEFAULT_GATE_BYTE2 16801 def ine MY_DEFAULT_GATE_BYTE3 101 def ine MY_DEFAULT_GATE_BYTE4 1 def ine MY_DEFAULT_PRIMARY_DNS_BYTE1 19201 def ine MY_DEFAULT_PRIMARY_DNS_BYTE2 168ul def ine MY_DEFAULT_PRIMARY_DNS_BYTE3 lul def ine MY_DEFAULT_PRIMARY_DNS_BYTE4 1ul def ine MY_DEF AULT_SEEUNDMRY_DNS_BYTE1 19201 def ine MY_DEFAULT_SEEHNDIRY_DNS_BYTE 16801 def ine MY_DEFAULT_SEEUNDIRY_DNS_BYTE3 101 def ine MY_DEFAULT_SECHND RY_DNS_BYTE4 101
20. har amp PURTE define BUTTONO_TRIS TRISBbits TRISB3 def ine BUTTONO_IO PHRTBbits RB3 define BUTTON1_TRIS TRISBbits TRISB2 def ine BUTTON1_IO PURTBbits RB2 def ine BUTTON2_TRIS TRISBbits TRISB1 def ine BUTTON2_IO PORTBbits RB1 define BUTTON3_TRIS TRISBbits TRISBO define BUTTON3_IO PORTBbits RB0 define BUTTON_SET_TRIS TRISBbits TRISB4 def ine BUTTON_SET_IO PURTBbits RB4 LCD 1 0 pins def ine LCD_DATA_TRIS TRISF define LCD_DATA_ID LATF define LCD_RD_WR_TRIS TRISFbits TRISF1 ine LCD_RD_WR_IO LATFbits LATF1 define LCD_RS_TRIS TRISFbits TRISF2 ifdef ine LCD_RS_IO LTFbits LATF define LCD_E_TRIS TRISFbits TRISF3 10 LATFbits LATF3 6 6 6 7 LED2 3 PC TR67J60LAN LED1 LED2 LED 16 PIC18F67J60 LAN USB Board e FT232RL e e lt 2 V1 0 2009 09 01 PIC18F67J60 Ethernet Board With USB TR 67J60LAN USB5V1 0 2009090 CN2
21. ine BUTTON_SET_IO PHRTBhits RB4 LCD 1 0 pins define LCD_DATA_TRIS TRISF define LCD DATA 10 LATF ifdef ine LCD_RD_WR_TRIS TRISFbits TRISF1 define LCD_RD_WR_IO LTFbits LaTF1 define LCD_RS_TRIS TRISFbits TRISF2 LCD_RS_IO LATFbits LATF2 ifdef ine LCD_E_TRIS TRISFbits TRISF3 REdef ine LCD_E_ID LATFbits LATF3 LED0_IO LED1 LED1_IO LED2 TR67J60LAN LEDI 0 5 15 ITR 67J60LAN USB 7 3 6 6 6 7 TR67J60LAN HardwareProfile h elif defined YHUR_BHARD Define your own board hardware profile here 0 define LEDO_TRIS TRISEbits TRISE2 10 PURTEbits RE2 define LED1_TRIS TRISEbits TRISE3 define TU PORTEbits RE3 i LED2_TRIS 3 LED2_ID PORTDbits LED3_TRIS TRISDbits define LED3 ID PORTDbits RD2 def ine LED4_TRIS TRISDbits TRISDI define LED4_ID PHRTDbits RD0 LED5_TRIS LED5_ID PORTEbits LED6_TRIS TRISEbits LED6_In PURTEbits def ine LED _TRIS TRISEbits TRISED define LED _10 PURTEbits REI define LED_ID unsigned c
Download Pdf Manuals
Related Search