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MVME2500-ECC Installation and Use

1. 139 Sicherheitshinweise award 143 8 MVME2500 ECC Installation and Use 6806800N30F List of Tables va Table 1 1 Key Features ofthe MVME2500 ECC 19 Table 1 2 Board Standard Compliances 22 Table 1 3 Mechanical Datal ahenea ane LES 25 Table 1 4 Available Board Variants 2 25 Table 1 5 Available Extended Temperature Variants 25 Table 1 6 Available Board Accessories 26 Table 2 1 Environmental Requirements 31 Table 2 2 Power Requirements 255 52 hU EFE eld ea 33 Table 3 1 FrontPanel LEDs ether x ee E ER 44 Table 3 2 Onboard LEDs Stats usa ee ee ze ee Aa Qha mee 45 Table 3 3 Front Panel Tri Speed Ethernet Connector J1 46 Table 3 4 Front Panel Serial Port J4 47 Table 3 5 USB 25 ved Dee a 48 Table 3 6 VMEbus P1 Connector 2 48 Table 3 7 VMEbus P2 Connector ausser kika PE 50
2. 41 3 11 Board Layout cette nen 41 3 2 Front Panel ur care en vad er xe Reena ea 42 3 2 1 Reset a ie Ib rs 43 SE JP 43 3 321 FrontPanelilEDs nen DUE RN E Y e es 43 3 3 2 Onboard LEDS ete t au eese cse nee RR ERR ER esI 45 3 4 saya as E aate e Heaton tpe 45 3 4 1 Front Panel Connectors 46 3 4 1 1 RJ45 with Integrated Magnetics J1 46 3 4 1 2 Front Panel Serial Port J4 47 MVME2500 ECC Installation and Use 6806800N30F 3 Contents 3 4 1 3 USB Connector J5 48 3 4 1 4 VMEbus P1 Connector 48 3 4 1 5 VMEbus P2 Connector ws ss een nee ne een 50 3 4 2 Onboard Connectors 51 3 4 2 1 Flash Program 7 51 3 4 2 2 SATA Connector 3 52 3 4 2 3 ee a 53 3 4 2 4 JTAG Connector P6 58 3 4 2 5 COP Connector P6 6
3. 103 5 5 External Timer Registers 104 5 5 1 Prescaleri Registers u au secede en euere sn in 104 5 5 2 Control Registers EUER EN an 105 5 5 3 Compare High and Low Word Registers 106 5 5 4 Counter High and Low Word Registers 107 6 IOS TII P0 109 Gall OVEN AE RES 109 6 2 Accessing U Boot ae a bad abe ee ew b ees 109 6 3 BOOt OPTIONS ne en 110 6 3 1 Booting from a 2 110 6 3 2 Booting from an Optional SATA 111 6 MVME2500 ECC Installation and Use 6806800N30F Contents 6 3 3 Booting from a USB Drive 4 111 6 3 4 Booting from an SD 4 112 6 3 5 Booting VxWorks Through the Network 112 6 4 Using the Persistent Memory Feature 113 6 5 MVME2500 ECC Specific U Boot 114 6 6 Updating U Boot u a ee ee E 116 7 Programming Model eu 119 MB 119 7 2 Reset Configuration 2 24 24 4 4 119 7 3 Interript Cont
4. PMCIO 2 PMC IO PMC IO 4 PMCIO5 33 34 35 36 PMC IO 33 PMC IO 37 PMC IO 6 PMC IO 38 PMC IO 7 PMC IO 39 b NI 8 PMCIO 9 PMCIO 10 41 42 PMCIO 11 43 PMCIO 40 PMCIO 41 PMCIO 42 PMC IO 43 PMC IO 12 44 PMC IO 44 PMC IO 13 45 PMC IO 45 14 7 1 14 6 8 9 17 4 5 4 6 16 4 7 4 PMC IO 46 PMC IO 47 PMC IO 48 PMC IO 49 18 PMC IO 18 PMC IO 50 19 PMC IO 19 PMC IO 51 20 MVME2500 ECC Installation and Use 6806800N30F PMC IO 20 PMC IO 52 57 Controls LEDs and Connectors Table 3 13 J14 Connector continued Pi Signal Description 2 PMCIO 21 PMC IO 53 2 2 in Pin 1 53 3 55 4 56 Signal Description PMCIO 23 PMCIO 55 2 PMCIO 24 PMC IO 56 25 PMC IO 25 57 PMC IO 57 26 PMC IO 26 58 PMC IO 58 27 PMC IO 27 59 PMC IO 59 30 PMC IO 30 62 PMC IO 62 31 PMC I0 31 63 PMC IO 63 32 PMC IO 32 64 PMC IO 64 3 4 2 4 JTAG Connector The JTAG Connector can be used in conjunction with the JTAG board and ASSET hardware Table 3 14 JTAG Connector P6 NC 3 3V FROM 5V SPI HOLD 0 SPI CS 0 SPI CLK 6 SPI CS 1 SPI HOLD 1 8 SPI MOSI SPI MISO 10 GND SPI VCC SCAN 1 TCK SCAN 1 TDI GND SCAN 1 TRST SCAN 1 TDO SCAN 1 TMS 3 3V 58 MVME2500 ECC Installation and U
5. The system and DDR clock is driven by ICS8405071 The following table defines the clock frequency Table 7 7 System Clock SYSCLK CORE CCB Clock Platform DDR3 800 1200 MHz 400 MHz 400MHz 25MHz 100MHz 128 MVME2500 ECC Installation and Use 6806800N30F Programming Model 7 7 2 Real Time Clock Input The RTC clock input is driven by a 1 MHz clock generated by the FPGA This provides a fixed clock reference for the QorlQ P20x0 PIC timers which the software can use as a known time reference 7 7 3 Local Bus Controller Clock Divisor Thelocal bus controller LBC clock output is connected to the FPGA for LBC bus transaction It is also the source of 1 MHz CPU RTC and FPGA tick timers MVME2500 ECC Installation and Use 6806800N30F 129 Programming Model 130 MVME2500 ECC Installation and Use 6806800N30F Replacing the Battery wiuu iw w M A 1 Replacing the Battery The figure below shows the location of the board battery This section applies only to the MVME2500 ECC commercial temperature board The MVME2500ET ECC does not have a battery to be replaced MVME2500 ECC Installation and Use 6806800N30F 131 Replacing the Battery Battery Location Figure A 1 H TE MVME2500 ECC Installation and Use 6806800N30F 132 Replacing the Battery The battery provides seven years of data retention summing up all periods of actual data use Artesyn Embedded
6. UART3 FPGA Timers 10 10 0 0011 0011 0011 0011 0011 0011 0011 CN 5 8 _ 0 EHTR 0 EAD 0 0 0 0 0 0 0 Field Description BCTLD Buffer control disable 0 LBCTL is asserted upon access to the current memory bank CSNT Chip Select negation time 1 LCSn and LWE are negated one quarter of the bus clock cycle earlier ACS Address to chip select setup 10 LCSn is outputted one quarter bus clock cycle after the address lines XACS Extra Address to chip select setup 0 Address to chip select setup is determined by ORx ACS SCY Cycle length in bus clocks 0011 Three bus clock cycle wait state 126 MVME2500 ECC Installation and Use 6806800N30F Programming Model SETA External address termination 0 Access is terminated internally by the memory controller unless the external device asserts LGTA earlier to terminate the access TRLX Timing Relaxed 0 Normal timing is generated by the GPCM EHTR Extended hold time on read accesses 0 The memory controller generates normal timing No additional cycles are inserted EAD External address latch delay 0 No additional bus clock cycles LALE asserted for one bus clock cycle only 7 7 Clock Distribution The clock function generates and distributes all of the clocks required for system operation The ICS9FG108 is used to generate all the required PCI E clocks The 25 MHz clocks for the Ethernet PHY and SATA bridge
7. du 5 MVME2500 ECC Installation and Use 6806800N30F 77 Functional Description 4 9 1 4 9 2 78 5 IEEE Standard P1386 2001 for Standard for Common Mezzanine Card Family 6 IEEE Standard P1386 1 2001 for Standard Physical and Environmental Layer for PCI Mezzanine Card 7 VITA 42 for 8 VITA 42 3 PCle for XMC sites are keyed for 3 3V PMC signaling PMC and add on cards must have a hole in the 3 3 V PMC keying position in order to be populated on the MVME2500 ECC The XMC specification accommodates this since it is expected that carrier cards will host both XMC and PMC capable add on cards MVME2500 ECC utilizes the P20x0 x2 link PCI Express interface It is designed such that the same PCI E interface is used for either PMC or XMC through Pericom s PI2PCIE2412 It is PCI E Gen2 compliant with four differential channel input and 2 1 MUX switch with single enable The enable pin is controlled by FPGA through onboard switch Theonboard switch S2 4 determines the direction of the PCI E MUX switch The default setting OFF routes the differential lines to the PMC Otherwise it is routed to the XMC connector PMC Add on Card The MVME2500 ECC PMC interface utilizes IDT s 51384 as the PCie PCI X bridge It can support up to 8 5 Gbps 64 bits x 133 Mhz The onboard switch 52 5 configures the TSI384 to run on either 100 Mhz or 133 Mhz with 133 Mhz as default The MVME2500 ECC supports multi funct
8. 1 Turn OFF all equipment and disconnect the power cable from the AC power source 2 Remove the chassis cover 3 Remove the filler panel s from the appropriate card slot s at the rear of the chassis if the chassis has a rear card cage MVME2500 ECC Installation and Use 6806800N30F 35 Hardware Preparation and Installation 2 5 2 36 Install the top and bottom edge of the transition module into the rear guides of the chassis Ensure that the levers of the two injector ejectors are in the outward position Slide the transition module into the chassis until resistance is felt Move the injector ejector levers in an inward direction Verify that the transition module is properly seated and secure it to the chassis using the 9 two screws adjacent to the injector ejector levers Connect the cables to the transition module To remove the transition module from the chassis reverse the procedure and press the red locking tabs IEEE handles only to extract the board PMC XMC Support Installation Procedure Read all notices and follow these steps to install a PMC on the baseboard NOTICE Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage Inserting or removing modules with power
9. 4 2 13 Common On Chip Processor COP 71 4 2 14 P20x0 Hardware Configuration 71 4 3 System Memo csse 71 AA Re ee aye ware ec 71 4 MVME2500 ECC Installation and Use 6806800N30F Contents 441 RealTimeClock von ee Pes 71 4 4 2 Internal Timer en ee ren 72 4 4 3 Watchdog ccc cece cece ccc ence nee ehe hh hh hh n 72 4 4 4 FPGATICK Timer a aan ee eee aan 72 4 5 Ethernet Interfaces 72 4 6 SPIBUS Sew aes EVE ERR ERR 73 4 6 1 SPI Flash Memory 73 4 6 2 SPIFlash Programming 73 4 6 3 Firmware Redundancy 74 46 4 REGOVElY EET 76 4 7 Front aaa ann ae 77 4 8 Rear UART Control u nee ee odes nern res 77 4 9 PMC XMC Sites erative eek 77 491 PMCAdd on Card 78 4 9 2 XMGCAd ON Card z u et PEE TUR e sere ER OLD Re ye 78 4 10 SATA Interface east EUR UC aS ies 79 VMESUpDBOLEs ee eph PPP EN 79 4 11 1 Tsi14
10. Amber This indicator is lit when the early 3 3V power supply fails User Defined Amber Controlled by the FPGA r User Defined Amber Controlled by the FPGA 3 4 Connectors This section describes the pin assignments and signals for the connectors on the MVME2500 ECC MVME2500 ECC Installation and Use 6806800N30F 45 Controls LEDs and Connectors 3 4 1 Front Panel Connectors The following connectors are found on the outside of the MVME2500 ECC These connectors are divided between the front panel connectors and the backplane connectors The front panel connectors include the 1 and 5 connectors The backplane connectors include the P1 and P2 connectors 3 4 1 1 RJ45 with Integrated Magnetics 1 The MVME2500 ECC uses an X2 RJ45 Table 3 3 Front Panel Tri Speed Ethernet Connector J1 2A NC 3A Port A TRD3 4A Port ATRD3 Port A TRD2 5A 8A Port ATRD1 9A Port A TRDO 10A Port ATRDO DIA Port A Green LED1 Anode Yellow LED1 Cathode Port A Yellow LED1 Anode Green LED1 Cathode Port A Green LED2 Anode Yellow LED2 Cathode D4A Port A Yellow LED2 Anode Green LED2 Cathode 1B GND 2B NC 3B Port B TRD3 46 MVME2500 ECC Installation and Use 6806800N30F Controls LEDs and Connectors Table 3 3 Front Panel Tri Speed Ethernet Connector J1 continued Pin Name Signal Description Port B TRD2 Port B TRDO Port B TRDO Port B Green LED1
11. LA 29 31 CONFIG SELECTION 41 CCB CLOCK 400 MHz REMARKS DDR PLL Config TSEC_1588_CLK_O UT TSEC_1588_PULSE_ OUTI TSEC 1588 PULSE OUT2 8 1 DDR PLL 800 MHz DDR rate is twice the value of the DDR controller frequency which is then divided by two through the software Core 0 PLL LBCTL LALE LGPL2 LOE LFRE 3 1 CORE CLOCK PLL 1200 MHz 2 1 CORE CLOCK PLL 800 MHz For 1200 MHz board configuration For 800 MHz board configuration Core 1 PLL 5 CPU Boot Config LWEO UART_SOUT1 LA27 LA16 3 1 CORE CLOCK PLL 1200 MHz For 1200 MHz board configuration 2 1 CORECLOCK PLL 800 MHz e500 core O is allowed to boot without waiting for configuration by an external master while e500 core 1 is prevented from booting until configured by an external master or the other core For 800 MHz board configuration MVME2500 ECC Installation and Use 6806800N30F 119 Programming Model Table 7 1 POR Configuration Settings continued CONFIG Boot Sequence Memory Debug Config DDR Debug Config CONFIG PINS LGPL3 LFWP LGPL5 DMA2_DACKO DMA2_DDONEO CONFIG SELECTION CFG_BOOT_SEQ 1 0 BOOT SEQUENCE DISABLED Debug information from the DDR SDRAM controller is driven on the MSPCID and MDVAL signs default Debug information is not driven on ECC pins ECC function in their normal mode default REMARKS ELBCECC Enabl
12. P7 The Flash Program Connector is depopulated in the production version of the MVME2500 ECC However each pin is exposed for the 60 pin header connector for the JTAG boundary scan Table 3 8 Flash Programming Header P7 Signal Description HOLD 1 Chip Select 1 Chip Select 0 Programmer s VCC Master In Slave OUT MISO HOLD 0 Keying 8 CLOCK MVME2500 ECC Installation and Use 6806800N30F 51 Controls LEDs and Connectors Table 3 8 Flash Programming Header P7 continued Description e Master OUT Slave IN MOSI 3 4 2 2 SATA Connector The onboard customized SATA connector is compatible with the Artesyn SATA kit namely VME 64GBSSDKIT and IVME7210 MNTKIT Table 3 9 Custom SATA Connector 3 Pin Description Pin Signal Description GND SATA POWER ENABLE SATA DETECT SATA RX NC SATA RX 52 MVME2500 ECC Installation and Use 6806800N30F Controls LEDs and Connectors 3 4 2 3 Table 3 9 Custom SATA Connector 3 continued Pin Signal Description Pin Signal Description PMC Connectors The MVME2500 ECC supports only one site It utilizes 14 to support PMCI O that goes to the RTM PMC The tables below show the pinout detail of 11 J12 J13 and J14 See Figure 3 1 forthe location of the PMC connectors Table 3 10 PMC 11 Connector Pin Signal Description Pin Signal Description JTAG TCK 33 F
13. Table 3 8 Flash Programming Header P7 2 51 Table 3 9 Custom SATA Connector J3 un an ee une ne 52 Table 3 10 PMG TT Connector ern aa 53 Table 3 11 PMCJ12 Connector saurer 54 Table 3 12 13 Connector ERR een rn 55 Table 3 13 PMC T4 Connector isis ues ke Reseau en en aa 57 Table 3 14 TAG Connector Pb u en ne nent ne meh Rare lee Vie ee 58 Table 3 15 COP Header PTO i i EE a 60 Table 3 16 SD Connector 2 ar a nk ER ER PEERS 60 Table 3 17 Connector XJ2 Pinout 61 Table 3 18 P20x0 Debug Header 2 62 Table 3 19 Geographical Address Switch 64 Table 3 20 Geographical Address Switch Settings 65 Table 4 1 Voltage Supply Requirement 81 Table 4 2 Thermal Interrupt 0 4 2 83 Table 4 3 Real Time Clock Battery 84 Table 4 4 POST Code Indicatoronthe LED 84 Table 4 5 Transition Module Features 86 Table 5 1 Physical Address u uu een ala a ne pa 87 Tabl
14. depending on the internal device configuration with x8 x16 x32 data ports Chip set interleaving and partial array self refresh Data mask signal and read modify write for sub double word writes when ECC is enabled e Double bit error detection and single bit error correction ECC 8 bit check work across 64 bit data e Address parity for registered DIMMs e Automatic DRAM initialization sequence or software controlled initialization sequence and automatic DRAM data initialization e Write leveling for DDR3 memories and supports up to eight posted refreshes 68 MVME2500 ECC Installation and Use 6806800N30F Functional Description 4 2 3 4 2 4 4 2 5 4 2 6 4 2 7 PCI Express Interface The PCI Express interface is compatible with the PCI Express Base Specification Rev 1 0a The PCI Express controller connects the internal platform to a 2 5 GHz serial interface The P20x0 has the options for up to three PCI E interfaces with up to x4 link width The PCI E controller can be configured to operate as either PCI E root complex RC or as an endpoint EP device Local Bus Controller LBC The main component of the enhanced LBC is the memory controller that provides a 16 bit interface to various types of memory devices and peripherals The memory controller is responsible for controlling eight memory banks shared by the following a general purpose chip select machine GPCM a flash controller machine FCM and user p
15. setenv File_ramdisk lt ramdisk gt saveenv 3 Initialize SD card mmcinfo 4 Load the files from the SD card to the memory option mmc interface 0 1 device 0 partition 1 fatload mmc 0 1 1000000 File_ulmage fatload mmc 0 1 2000000 File_ramdisk fatload mmc 0 1 c00000 File_dtp 5 Bootthe Linux in memory bootm 1000000 2000000 c00000 6 3 5 Booting VxWorks Through the Network In this mode the U Boot downloads and boots VxWorks from an external TFTP server 1 Make sure that the VxWorks image is accessible by the board from the TFTP server 2 Configure U Boot environment variables setenv ipaddr lt IP address of MVME2500 ECC gt setenv serverip lt IP address of TFTP server gt setenv gatewayip lt gateway IP gt setenv netmask lt netmask gt setenv vxboot tftpboot vxbootfile amp amp setenv bootargs Svxbootargs amp amp bootvx setenv vxbootfile lt VxWorks_image gt setenv vxbootargs motetsec 0 0 lt IP address of TFTP server gt VxWorks h lt IP address of TFTP server gt e lt IP address of MVME2500 gt ffffff00 b lt unused IP u vxworks pw vxworks f 0x80 saveenv 112 MVME2500 ECC Installation and Use 6806800N30F Boot System 6 4 3 TFTP the files from the server to local memory then boot run vxboot Using the Persistent Memory Feature Persistent memory means that the RAM s memory is not deleted during a reset Power cycling or by temporarily removing the power and then powering u
16. 0 interface and three PCI express controllers MVME2500 ECC Installation and Use 6806800N30F 67 Functional Description This section describes the protocol and interfaces provided in the QorlQ P20x0 integrated and is utilized by the MVME2500 ECC 4 2 1 e500 Processor Core The QorlQ integrated processors offer dual high performance e500v2 core P2020 and a single e500v2 core P2010 It operates from 800 MHz up to 1 2GHz core frequency The e500 processor core is a low power implementation of the family of reduced instruction set computing RISC embedded processor that implement the Book E definition of the PowerPC architecture The e500 is a 32 bit implementation of the Book E architecture using the lower words of 64 bit general purpose registers GPRs while E500v2 uses 36 bit physical addressing and some improvement from the previous version 4 2 2 Integrated Memory Controller A fully programmable DDR SDRAM controller supports most standard DDR2 and DDR3 memories available Unbuffered registered DIMMs are also supported A built in error checking and correction ECC ensures very low bit error rates for reliable high frequency operation The memory controller supports the following 16 GB of memory e Asynchronous clocking from platform clock with programmable settings that meets all the SDRAM timing parameters e Upto four physical banks each bank can be independently addressed to 64 Mbit to 4 Gbit memory devices
17. 02120201S MVME2500 021CC 2500 0161 MVME2500ET 0163 MVME2500ET 0171 MVME2500ET 0173 has been designed and manufactured to the following specifications EN55022 2006 Class A EN55024 A1 2001 A2 2003 1998 2011 65 EU RoHS Directive As manufacturer we hereby declare that the product named above has been designed to comply with the rele vant sections of the above referenced specifications This product complies with the essential health and safety requirements of the above specified directives We have an internal production control system that ensures compliance between the manufactured products and the technical documentation ae Tom Tuttle Manager Product Testing Services Date MM DD YYYY C EMBEDDED TECHNOLOGIES 03 11 2014 MVME2500 ECC Installation and Use 6806800N30F 1 3 1 4 Introduction Mechanical Data The following table provides details about the dimensions and weight of the board Table 1 3 Mechanical Data Feature Height 233 44 mm 9 2 inches Depth 160 0 mm 6 3 inches Front Panel Height 261 8 mm 10 3 inches Width 19 8 mm 0 8 inches Max Component Height 14 8 mm 0 58 inches Weight 400 grams standard variant 700 grams ET variants Ordering Information Table 1 4 Available Board Variants MVME2500 02120201E QorlQ P2020 1 2GHz IEEE MVME2500 02120201S QorlQ P2020 1 2GHz SCANBE MVME2500 01080101E QorlQ P2010 800 MHz IEEE MVME250
18. Abort switch Fail LED and User LED PMC XMC front panel I O optional VME Bus RTM I O through VME P2 PMC XMC I O with P4 I O Two 10 100 1000BASE T Ethernet Four UART RTM I2C Presence Power Expansion Expansion site 1 PMC supporting PCI X 64 33 interface XMC supporting PCI E 1 0a x2 interface Expansion site 2 drive kit Boot Flash 16 MB SPI Flash Persistent Data Storage User Flash I2C Devices CPLD 512 KB MRAM SDHC Socket Real Time Clock Board Temperature Sensor 8 KB VPD EEPROM Two 64 KB User EEPROM Watchdog timers and registers Boot Firmware U Boot based firmware image in 16 MB SPI Flash This flash is split into two 8 MB chips 20 MVME2500 ECC Installation and Use 6806800N30F Introduction Table 1 1 Key Features of the MVME2500 ECC continued Function Features Operating System Based from BSP provided by Freescale which is based from standard Linux version 2 6 32 rc3 Development tool is Itib 9 1 1 Linux Target Image Builder from Freescale VxWorks Figure 1 1 MVME2500 ECC IEEE Board MVME2500 ECC Installation and Use 6806800N30F 21 Introduction 1 2 22 Figure 1 2 MVME2500 ECC SCANBE Board Standard Compliances The product is designed to meet the following standards Results are pending until testing is finished Table 1 2 Board Standard Compliances EN 60950 1 A11 2009 Safe
19. BCM54616 3 Other Software Considerations This section provides programming information in relation to various board components MRAM The MVME2500 ECC provides 512 K bytes of fast non volatile storage in the form of Magnetoresistive Random Access Memory MRAM The MRAM is directly accessible by software using processor load and store instructions similar to the DRAM The difference is that the MRAM retains its contents even if the board is power cycled The MRAM is accessed through the LBC Real Time Clock The MVME2500 ECC provides a battery backed up DS1375 Real Time Clock RTC chip The RTC chip provides time keeping and alarm interrupts It is an I2C device and is accessed through the I2C bus address at 0x68 Quad UART The MVME2500 ECC console RS232 port is driven by the UART built into the P20x0 QorlQ chip Additionally the MVME2500 ECC has a Quad UART chip which provides four additional 16550 compatible UART These additional UART are internally accessed through the LBC bus The Quad UART chip clock input which is internally divided to generate the baud rate is 1 8432 MHz The four physically connect to RS232 DB9 serial ports through the RTM MVME2500 ECC Installation and Use 6806800N30F 125 Programming Model 7 6 4 LBC Timing Parameters The following table defines the timing parameters for the devices on the local bus Table 7 5 LBC Timing Parameters 0 1 2 3 4 5 6 MRAM UARTO UART1 UART2
20. Controls LEDs and Connectors Table 3 6 VMEbus P1 Connector continued Pin Row A Row B Row C Row D Row Z SYSCLK BGIN3 GND SYSRESET 3 3V not used GND 13 050 BRI GA2 NC WRITE 3 3V not used GND GND GA3 NC DTACK 3 used GND 17 AM 1 ADD 25 NC 18 AM 2 ADD 26 3 3V not used GND NC NC 3 3V not used GND IACKIN NC NC IACKOUT 3 3V notused GND NC NC 3 3V notused GND NC NC 3 3V notused GND NC NC 3 3V notused GND ADD2 IRQ2 ADD 37 NC NC ADD 1 IRQ1 ADD 38 3 3V not used GND 12V 12V 12V 32 5V 5V 5V 5V MVME2500 ECC Installation and Use 6806800N30F 49 Controls LEDs and Connectors 3 4 1 5 VMEbus P2 Connector The VME P2 connector is a 160 pin DIN Row B of the P2 connector provides power to the MVME2500 ECC and to the upper eight VMEbus address lines and additional 16 VMEbus data lines The Z A C and D pin assignments for the P2 connector are the same for both the MVME2500 ECC and MVME7216E MVME721E and are as follows Table 3 7 VMEbus P2 Connector Pin RowA Row B Row C Row D Row Z 1 PMCIO 2 5V PMCIO 1 _0 Serial 1 RX 2 PMC IO 4 GND 3 0 GND 3 PMC IO 6 RETRY PMCIO5 GND Serial 1 TX 4 PMCIO 8 ADDRESS 24 PMC IO 7 GE3_1 GND 5 PMCIO 10 ADDRESS 25 PMC IO 9 GE3 1 Serial 1 CTS 6 PMCIO 12 ADDRESS 26 PMCIO 11 GND GND 7 PMCIO 14 ADDRESS 27 P
21. IEEE Standard Test Access Port and Boundary Scan Architecture IEEE Std 1149 1 2001 Low Pin Count Interface Specification LPC Revision 1 1 PCI Express Base Specification Revision 2 0 PCI Local Bus Specification PCI Rev 3 0 PCI X Electrical and Mechanical Addendum to the PCI Local Bus Specification PCI X EM Revision 2 0a PCI X Protocol Addendum to the PCI Local Bus Specification PCI X PT Revision 2 0a MVME2500 ECC Installation and Use 6806800N30F Related Documentation Table B 3 Related Specifications Organization Document Serial ATA International Serial ATA SATA Specification Revision 2 6 Serial ATA Il Extensions to Serial ATA 1 0 Revision 1 0 SATA IO Trusted Computing TPM Specification 1 2 Level 2 Revision 103 Version 1 2 Group TCG USB Implementers Universal Serial Bus Specification USB Revision 2 0 Forum USB IF MVME2500 ECC Installation and Use 6806800N30F 137 Related Documentation _ re wi 138 MVME2500 ECC Installation and Use 6806800N30F Safety Notes EN This section provides warnings that precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed during all phases of operation service and repair of this equipment You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment Failure to comply with these precautions or with
22. Manual Term Definition DUART Dual Universal Asynchronous Receiver Transmitter EEPROM Erasable Programmable Read Only Memory Federal Communications Commission Gigabits per second Institute of Electrical and Electronics Engineers Multi Chip Package Magnetoresistive Random Access Memory Printed Circuit Board Peripheral Component Interconnect PCI Express Peripheral Component Interconnect eXtended PCI Mezzanine Card Input Output Module Programmable Logic Device PCI Mezzanine Card IEEE P1386 1 Processor PCI Mezzanine Card Real Time Clock Rear Transition Module Serial Advanced Technology Attachment Universal Asynchronous Receiver Transmitter VITA VMEbus International Trade Association UL MN Versa Module Eurocard PCI eXpress Mezzanine Card 14 MVME2500 ECC Installation and Use 6806800N30F About this Manual Conventions The following table describes the conventions used throughout this manual Courier Bold Notation Description 0x00000000 Typical notation for hexadecimal numbers digits are 0 through F for example used for addresses and offsets 0b0000 Same for binary numbers digits are 0 and 1 bold Used to emphasize a word Screen Used for on screen output and code related elements or commands in body text Used to characterize user input and to separate it from system output Reference File gt Exit text text Used for refer
23. Product Damage RJ 45 connectors on modules are either twisted pair Ethernet TPE or E1 T1 1 network interfaces Connecting E1 T1 1 line to an Ethernet connector may damage your system e Make sure that TPE connectors near your working area are clearly marked as network connectors e Verify that the length of an electric cable connected to a TPE bushing does not exceed 100 meters e Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits SELV circuits If in doubt ask your system administrator MVME2500 ECC Installation and Use 6806800N30F 141 Safety Notes Battery 142 Board System Damage Incorrect exchange of lithium batteries can result in a hazardous explosion When exchanging the on board lithium battery make sure that the new and the old battery are exactly the same battery models If the respective battery model is not available contact your local Artesyn sales representative for the availability of alternative officially approved battery models Data Loss Exchanging the battery can result in loss of time settings Backup power prevents the loss of data during exchange Quickly replacing the battery may save time settings Data Loss If the battery has low or insufficient power the RTC is initialized Exchange the battery before seven years of actual battery use have elapsed PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB
24. and 1 Gbps Ethernet IEE 802 3 networks as well as to devices with generic 8 to 16 bit FIFO ports The MVME2500 ECC uses the eTSEC using the RGMII interface General Purpose I O GPIO The P20x0 has a total of sixteen I O ports Four of these ports are alternately used as external input interrupt All sixteen ports have open drain capabitilies The 20 0 processor provides a Serial Rapid 1 0 interface However this interface is not utilized by the MVME2500 ECC Security Engine SEC 3 1 Theintegrated security engine ofthe P20x0 is designed to off load intensive security functions like key generation and exchange authenticaion and bulk encryption from the processor core It includes eight different execution units where data flows in and out of an EU MVME2500 ECC Installation and Use 6806800N30F Functional Description 4 2 13 4 2 14 4 3 4 4 4 4 1 Common On Chip Processor COP The COP is the debug interface of the QorlQ P20x0 Processor It allows a remote computer system to access and control the internal operation of the processor The COP interface connects primarily through the JTAG and has additional status monitoring signals The COP has additional features like breakpoints watch points register and memory examination modification and other standard debugging features P20x0 Hardware Configuration Pins Aseries of strapping pins are required to initialize the P20x0 These pins are samples during the assert
25. are supplied by ICS83905 Most of the QorlQ P2020 clocks are generated by 5840507 chip Additional clocks required by individual devices are generated near the devices using individual oscillators The following table lists the clocks required on the MVME2500 ECC along with the frequency and source Table 7 6 Clock Distribution Device Clock Signal Frequency Clock Tree Source QorlQ P20x0 CPU_SYSCLK 100MHz ICS8405071 3 3V P20x0 CPU_DDR_CLK 100MHz QorlQ P20x0 CLK PCI BR3 133Mhz QorlQ P20x0 EC_GTX_CLK125 125Mhz 1 58405071 CLK_25MHZ_ICS840S07 ICS83905AGILF 88SE6121 CLK_88SE6121_25MHZ ICS83905AGILF ICS9FG108 CLK_25MHZ_ICS9FG108 ICS83905AGILF BCM54616S BP_PHY_25MHZ_CLK ICS83905AGILF 546165 FP 25 7 ICS83905AGILF MVME2500 ECC Installation and Use 6806800N30F 127 Programming Model Table 7 6 Clock Distribution continued Device Clock Signal Frequency Clock Tree Source VIO TSI384 CLK_PCIEC1 100MHz ICS9FG110 DIFF TSI384 CLK_PCIEC3 100MHz ICS9FG111 DIFF 88SE6121 CLK_88SE6121_PCIE_100MH 100MHz ICS9FG112 DIFF 7 CLK_CPLD 1 8432MHz 3 3V USB CLK_USB_1_24MHZ 24MHz 3 3V QorlQ P20x0 CPU_RTC 1MHz FPGA 3 3V PMC CLK_PMC1 33 66 100 133M TSI384 3 3V hz 151148 CLK_PCI_BR3 133Mhz 1 58405071 3 3V FPGA CPU_LCKO 25MHz 3 3V QUART CLK_QUART 1 8432MHz FPGA 3 3V 1 583905 CLK_25MHZ_ICS9FG108 25Mhz ICS83905AGILF 3 3V 7 7 1 System Clock
26. configuration consists of two RJ45 10 100 1000BASE T Ethernet ports USB 2 0 port a Micro DB9 RS 232 serial console port and a reset abort switch It also has an LED to signal board failure and another LED that can be configured in the LED register The rear I O includes support for VMEbus Legacy VME VME 64 VME64x and 2eSST rear I O RTM I O through VME P2 two 10 100 1000BASE T Ethernet four UART and RTM I2C Presence Power See the table below for a summary of the features of the MVME2500 ECC Table 1 1 Key Features of the MVME2500 ECC Function Features Processor Freescale QorlQ P2010 single core or P2020 dual core 800 MHz or 1000 MHz core frequency 512 KB L2 cache Three 10 100 1000 Mbps enhanced three speed Ethernet controllers eTSECs Two PCI E 1 0a x1 interface controllers One PCI E 1 0a x2 interface controller USB 2 0 interface Enhanced secure digital host controller DDR3 memory controller at 800 MT s SPI interface four chip selects but only two are used on the board Enhanced local bus controller UART Two I2C interfaces Programmable interrupt controller 1 GB or 2 GB DDR3 soldered chip memory with ECC MVME2500 ECC Installation and Use 6806800N30F 19 Introduction Table 1 1 Key Features of the MVME2500 ECC continued Function Front panel I O Backplane I O Features Micro DB9 RS 232 serial console port USB 2 0 Two RJ45 10 100 1000BASE T Ethernet Reset
27. from within the U Boot For details refer to the U Boot documentation MVME2500 ECC Installation and Use 6806800N30F 109 Boot System 3 Boot the MVME2500 ECC 4 When prompted press the h key U Boot aborts the boot sequence and enters into a command line interface mode Enterthe command setenv bootdelay 1 saveenv to disable the U Boot auto boot M feature and let the U Boot directly enter the command line interface after the next reboot power up 6 3 Boot Options 6 3 1 Booting from a Network this mode U Boot downloads and boots the Linux kernel from an external TFTP server and mounts a root file system located on a network server 1 Makesurethatthekernel dtb and ramdisk are accessible to the board from the TFTP server 2 Configure U Boot environment variables setenv ipaddr IP address of MVME2500 ECC setenv serverip IP address of TFTP server setenv gatewayip gateway IP setenv netmask lt netmask gt setenv bootargs root dev ram rw console ttyS0 9600n8 ramdisk_size 700000 cache sram size 0x10000 saveenv 3 Transfer the files through the TFTP from the server to the local memory tftp 1000000 lt kernel_image gt tftp 2000000 lt ramdisk gt tftp C00000 lt kernel dtb gt 4 Bootthe Linux from the memory bootm 1000000 2000000 c00000 110 MVME2500 ECC Installation and Use 6806800N30F Boot System 6 3 2 6 3 3 Booting from an Optional SATA Drive 1 Mak
28. indicator 1 2V Supply power good indicator 1 8V Supply power good indicator 3 3V Supply power good indicator 2 5V Supply power good indicator 1 2V SW Supply power good indicator 1 5V Supply power good indicator 1 Supply Good and Stable 0 Otherwise MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 4 7 5 4 8 PLD LED Control Register The MVME2500 ECC PLD provides an 8 bit register which controls the eight LEDs Table 5 9 PLD LED Control Register REG PLD LED CTRL OxFFDFOO1C Field D1 D35 D34 D33 D38 D37 D2Red D2 Yellow OPER R W RESET 1 1 LEDon 0 LED off For more information on LEDs refer to Table Front Panel LEDs on page 44 and Table Onboard LEDs Status on page 45 PLD PCI PMC XMC Monitor Register The MVME2500 ECC PLD provides an 8 bit register which indicates the status of the PCI PMC XMC interface signals Table 5 10 PLD PCI PMC XMC Monitor Register REG PCI_PMC_XMC_MNTR OxFFDFOO1D Field RSVD RSVD RSVD PMC X PMCI E ee UE PCI1 PC MC SEL READY IXCAP OPER EE MVME2500 ECC Installation and Use 6806800N30F 93 Memory Maps and Registers Field Description PMC_XMC_SEL XMC or PMC Selection Switch 1 PMC 0 XMC PMC1_EREADY Indicates that the PrPMC module is installed in PMC site 1 PrPMC is ready for enumeration or no PrPMC is installed 0 PrPMC is not ready for enumeration PMC1P_
29. line Load binary file over serial line ymodem mode loop Infinite loop on address range md Memory display memmap Displays memory map mii utility commands Memory modify auto incrementing address mmc MMC sub system mmcinfo Display MMC info moninit Reset nvram serial and write monitor to SPI flash mtest Simple RAM read write test mw Memory write fill Boot image through network using NFS protocol Memory modify constant address pci List and access PCI Configuration Space pci info Show information about devices on PCI bus ping Send ICMP ECHO REQUEST to network host printenv Print environment variables Boot image through network using RARP TFTP protocol MVME2500 ECC Installation and Use 6806800N30F 115 Boot System 6 6 116 Table 6 1 MVME2500 ECC Specific U Boot Commands continued Command Description Run commands in an environment variable Save environment variables to persistent storage Run a delimited terminated list of commands scsi SCSI sub system scsiboot Boot from SCSI device setenv Set environment variables setexpr Set environment variable as the result of eval expression Print local hushshell variables sleep Delay execution for some time soft_reset Soft reset the board source Run script from memory test Minimal test like bin sh Boot image through network using TFTP protocol Initialize a
30. or the battery holder To prevent damage do not use a screw driver to remove the battery from its holder MVME2500 ECC Installation and Use 6806800N30F Sicherheitshinweise aa Dieses Kapitel enth lt Hinweise die potentiell gef hrlichen Prozeduren innerhalb dieses Handbuchs vorrangestellt sind Beachten Sie unbedingt in allen Phasen des Betriebs der Wartung und der Reparatur des Systems die Anweisungen die diesen Hinweisen enthalten sind Sie sollten au erdem alle anderen Vorsichtsma nahmen treffen die f r den Betrieb des Produktes innerhalb Ihrer Betriebsumgebung notwendig sind Wenn Sie diese Vorsichtsma nahmen oder Sicherheitshinweise die an anderer Stelle diese Handbuchs enthalten sind nicht beachten kann das Verletzungen oder Sch den am Produkt zur Folge haben Artesyn Embedded Technologies ist darauf bedacht alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen Da es sich jedoch um ein komplexes Produkt mit vielf ltigen Einsatzm glichkeiten handelt k nnen wir die Vollst ndigkeit der im Handbuch enthaltenen Informationen nicht garantieren Falls Sie weitere Informationen ben tigen sollten wenden Sie sich bitte an die f r Sie zust ndige Gesch ftsstelle von Artesyn Embedded Technologies Das Produkt wurde entwickelt um die Sicherheitsanforderungen f r SELV Ger te nach der Norm EN 60950 1 f r informationstechnische Einrichtungen zu erf llen Die Verwendung
31. process only to show the current board and CPU temperature This interrupt is routed directly to one of the processor s IRQ4 The table below shows the low and high threshold temperature in order for the interrupt to be asserted Table 4 2 Thermal Interrupt Threshold Board Variant Standard Variant Board Temperature Limit 0 to 55 C CPU Temperature Temperature Limit Limit Extended Temperature Variant 55 C to 71 C MVME2500 ECC Installation and Use 6806800N30F 83 Functional Description 4 19 4 20 4 20 1 Real Time Clock Battery A back up battery based on the CR2325 specification is provided It helps support the RTC hold up requirements that maintain the correct date and time after the backplane power is switched off Table 4 3 Real Time Clock Battery ENP1 210688 BR2325 30C to 80C ENP2 6006801A05 Renata 40C to 85C CR2325 Note The above temperature ranges do not support the storage temperatures specified for the boards The battery life will be reduced if the batteries are stored at temperatures outside their range Typically the BR series battery is the industrial type and the CR is the commercial In this case the Renata battery specification is better than the BR type The battery type used on the ENP2 board is the CR2325 from Renata Debugging Support The following information shows the details of Artesyn d
32. using the two screws located adjacent to the injector ejector levers 8 Connect the appropriate cables to the board To remove the board from the chassis reverse the procedure and press the red locking tabs IEEE handles only to extract the board 38 MVME2500 ECC Installation and Use 6806800N30F Hardware Preparation and Installation 2 7 Completing the Installation The board is designed to operate as an application specific computer blade or an intelligent I O board carrier It can be used in any slot VME chassis Once the board is installed you are ready to connect peripherals and apply power to the board NOTICE Product Damage RJ 45 connectors on modules are either twisted pair Ethernet TPE or E1 T1 J1 network interfaces Connecting an E1 T1 J1 line to an Ethernet connector may damage your system Make sure that TPE connectors near your working area are clearly marked as network connectors Verify that the length of an electric cable connected to a TPE bushing does not exceed 100 meters Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits SELV circuits If in doubt ask your system administrator The console settings for the MVME2500 ECC are Eight bits per character One stop bit per character Parity disabled no parity Baud rate of 9600 baud Verify that hardware is installed and the power peripheral cables connected are appropriate for your system con
33. watchdog timeout of 60 seconds 5 5 External Timer Registers The MVME2500 ECC provides a set of tick timer registers to access the three external timers implemented in the timers registers PLD These registers are 32 bit and are word writable The following sections describe the timer prescaler and control registers 5 5 1 Prescaler Register The prescaler adjust value is determined by this formula Prescaler Adjust 256 CLKIN CLKOUT CLKIN is the input clock source in MHZ and CLKOUT is the desired output clock reference in MHz Table 5 21 Prescaler Register Prescaler OxFFC80100 15 13 12 10 Field RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD Prescaler Register 8 bits OPER RESET 0x00e7 The prescaler provides the clock required by each of the three times The tick timers require a 1 MHz clock input The input clock to the prescaler is 25 MHz The default value is set for 0x00E7 which gives 1 MHz reference clock for a 25 MHz input clock source 104 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 5 2 Control Registers Table 5 22 Control Registers Tick Timer 0 Control Register OxFFC80202 Tick Timer 1 Control Register OxFFC80302 REG Tick Timer 2 Control Register OxFFC80402 15 R W 0x0000 Field Description ENC Enable counter When the bit is set the counter increments When the bit is cleared the counter doe
34. 0 3 4 2 6 SD Connector 2 s rre Fee qupusqa 60 3 4 2 7 Connector XJ2 61 3 4 2 8 Miscellaneous P2020 Debug Connectors 62 3 5 SWItENES Jer 63 3 5 1 Geographical Address Switch 51 2 2 63 3 5 2 SMT Configuration Switch S2 65 4 Functional Description scorsi oett nen 67 4 1 Block Diagramm een en 67 4 2 cos 67 4 2 1 6500 Processor Core Rer kx ORDER EXE Y UR T 68 4 2 2 Integrated Memory Controller 68 4 2 3 PCI Express Interface 69 4 2 4 Local Bus 24 69 4 2 5 Secure Digital Hub Controller SDHC 69 4 2 6 I2Clnt rface anne a en 69 4 2 7 AJSBiIntertace au uns nee 69 4 3 8 DUAR uu nenne een ae en 70 4 2 9 Controller ee ae nen i ka 70 4 2 10 Enhanced Three Speed Ethernet Controller eTSEC 70 4 2 11 General Purpose I O GPIlO 70 4 2 12 Security Engine 5 3 1 70
35. 0 01080101S QorlQP2010 800 MHz SCANBE Table 1 5 Available Extended Temperature Variants MVME2500ET 02100202E QorlQ P2020 1000MHZ MVME2500ET 02100202S QorlQ P2020 1000MHZ Ejector IEEE ENP2 SCANBE ENP2 MVME2500 ECC Installation and Use 6806800N30F 25 Introduction As of the printing date of this manual the following board accessories are available Table 1 6 Available Board Accessories VME HDMNTKIT VME HD mounting kit for standard temp variants VME HDMNTKIT2 VME HD MOUNTING KIT ENP2 VME 64GBSSDKIT VME 64GB SSD and mounting kit ACC CABLE SER DTE 6E SERIAL CABLE 2m cross connected 9 pin micro DSUB to standard 9 pin DSUB SERIAL MINI D2 SERIAL CABLE MICRO D SUB CONNECTOR TO STANDARD DB9 MVME7216E 101 VME RTM IEEE handle MVME7216E 102 VME RTM SCANBE Handle MVME721ET 101 VME RTM Extended Temperature IEEE handle MVME721ET 102 VME RTM Extended Temperature SCANBE Handle SERIAL MINI D 30 Female to male micro mini DB 9 to DB9 adapter cable W2400E01A Note VME HDMNTKIT can only be used with standard temp boards MVME2500 01080101E MVME2500 01080101S MVME2500 02120201E and 2500 021202015 VME HDMNKIT2 can only be used with extended temp boards MVME2500 02100202E and MVME2500 02100202S 26 MVME2500 ECC Installation and Use 6806800N30F Introduction eee si 1 5 Product Identification The following graphics shows the locati
36. 0 ECC Installation and Use 6806800N30F 29 Hardware Preparation and Installation 2 2 2 3 30 Unpacking and Inspecting the Board Read all notices and cautions prior to unpacking the product e Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life e Before touching the board or electronic components make sure that you are working in an ESD safe environment Shipment Inspection 1 Verify that you have received all items of your shipment 2 Check for damage and report any damage or differences to customer service 3 Remove the desiccant bag shipped together with the board and dispose of it according to your country s legislation The product is thoroughly inspected before shipment If any damage occurred during transportation or any items are missing contact customer service immediately Requirements Make sure the board meets the requirements specified in the next sections when the board is operated in your particular system configuration MVME2500 ECC Installation and Use 6806800N30F 2 3 1 Hardware Preparation and Installation Environmental Requirements Operating temperatures refer to the temperature of the air circulating around the board and not to the component temperature Table 2 1 Environmental Requirements Characteristics Applicable Variants Commercial Versions MVME2500 01080101E 2500 010801015 MVM
37. 2500 ECC Installation and Use 6806800N30F 123 Programming Model 7 4 12C Bus Device Addressing The following table contains the 12 devices used for the MVME2500 ECC and its assigned device address Table 7 3 I2C Bus Device Addressing SPD 256x8 ADT 7461 Temperature Sensor N A DS 1375 real time clock N A VPD 8192x8 1 0x55 RTM EEPROM 8192X8 1 2 0x56 XMC EEPROM N A 3 1 Thisis a dual address serial EEPROM 2 TheRTM Bus address can be manually changed through the 51 Switch on RTM The default switch configuration will set the address to 0x55 Make sure that the address is unique to the RTM Bus address when setting the switch 3 The address of the EEPROM is configured through Geographic Address resistor on board 7 5 Ethernet PHY Address The assigned Ethernet PHY on the management bus is shown in the following table Table 7 4 PHY Types and MII Management Bus Address PHY MIIM Ethernet Port Function Location PHY Types Address TSEC1 Gigabit Ethernet port routed to front panel BCM54616 124 MVME2500 ECC Installation and Use 6806800N30F 7 6 7 6 1 7 6 2 7 6 3 Programming Model Table 7 4 PHY Types and MII Management Bus Address continued PHY MIIM Ethernet Port Function Location PHY Types Address Gigabit Ethernet port routed to front or back panel BCM54616 7 set by GBE_MUX_SEL in 52 TSEC3 Gigabit Ethernet port routed to back panel
38. 5 4 Programmable Logic Device PLD Registers 89 5 4 1 PLD Revision Register ernennen nin 89 5 4 2 PLD YearRegister 50 ic ag shades Cee iad Radke eee sr 90 5 4 3 PLD Month Register 90 5 44 PLD Day Register aad scan ee eek ss 91 54 5 PLD Sequence Register u 20 ei er Y Y e ror EE 91 5 4 6 PLD Power Good Monitor Register 92 5 4 7 PLD LED Control Register 93 5 4 8 PLD PCI PMC XMC Monitor Register 93 5 4 9 PLD U Boot and TSI Monitor Register 94 5 4 10 PLD Boot Bank 95 5 4 11 PLD Write Protect and I2C Debug Register 97 5 4 12 PLD Test Register sea ee agi UN RR EL ES 99 5 45 PLD Test satten 99 5 4 14 PLD GPIO2 100 5 4 15 Reset Control and Reset Reason Register 101 5 4 16 PLD Watchdog Timer Refresh Register 102 5 4 17 PLD Watchdog Control Register 103 5 4 18 PLD Watchdog Timer Count
39. 8 VME Controller 79 4 De AY SB uM 79 4 13 I2C Devices dy AWA un 80 4 14 Reset Contro lFPGA 80 4 15 Power Management 4 a ner ES XT a wayaw 80 4 15 1 Onboard Voltage Supply Requirement 81 4 15 2 Power Up Sequencing 81 4 16 Clock Structuri s see ee ee 82 4 17 Reset SUUE u u ee a ee nee 82 4 17 1 5 u u mener ee 83 4 18 Thermal Management 2 24 22 4 83 4 19 Real Time Clock Battery 84 4 20 Debugging Support u on worse saunas ene eee earner a bach 84 4 20 1 POST 2 2 2222 4 2 84 4 20 2 Custom Debugging 22 2 4 85 4 21 Rear Transition Module RTM 85 MVME2500 ECC Installation and Use 6806800N30F 5 Contents 5 Memory Registers osse eine insi nn 87 9 1 inc DET 87 5 2 Memory nen pex X eee ee EET 87 5 3 Linux Devices Memory 2 2 88
40. Anode Yellow LED1 Cathode Port B Yellow LED1 Anode Green LED1 Cathode Port Green LED2Anode Yellow LED2 Cathode Port B Yellow LED2 Anode Green LED2 Cathode 3 4 1 2 Front Panel Serial Port There is one front access asynchronous serial port interface that is routed to the micro mini DB 9 front panel connector A male to male micro mini DB9 adapter cable is available under Artesyn part number SERIAL MINI D 30 W2400E01A The pin assignments for these connectors are as follows Table 3 4 Front Panel Serial Port 4 NC RX TX NC RTS CTS NC MVME2500 ECC Installation and Use 6806800N30F 47 2 3 6 7 8 9 Controls LEDs and Connectors 3 4 1 3 3 4 1 4 48 USB Connector J5 The MVME2500 ECC uses upright USB receptable mounted in the front panel Table 3 5 USB Connector 5 1 GND Mounting Ground Mounting Ground MTG Mounting Ground MTG Mounting Ground VMEbus P1 Connector The VME P1 connector is a 160 pin DIN The P1 connector provides power and VME signals for 24 bit address and 16 bit data The pin assignments for the P1 connector is as follows Table 3 6 VMEbus P1 Connector Row Z NC BCLR DATA 9 GND ACFAIL DATA 10 NC NC BGINO DATA 11 NC GND BGOUTO DATA 12 NC NC 8 DATA 7 BGIN2 DATA 15 NC GND 9 GND BGOUT2 GND GAP NC MVME2500 ECC Installation and Use 6806800N30F
41. E2500 02120201E 2500 021202015 MVME2500 02100202E MVME2500 02100202S Extended Temperature Versions Cooling Method Forced Air 27 CFM Forced Air 27 CFM Operating Temperature Storage Vibration Sine 10min axis 0 to 55 C 40 C to 85 C 2G 5 to 2000 Hz 40 C to 71 C 50 C to 100 C 10G 15 to 2000 Hz Vibration Random 1hr axis 0 01g2 Hz 15 to 2000 Hz 0 04g2 Hz 15 to 2000 Hz 8 GRMS Shock Humidity 1 ft3 min minimum 20g 11 ms to 95 RH non condensing 304 11 5 to 100 RH non condensing 2 Hat 15 1000Hz 6db octave 1000Hz 2000Hz MIL STD 810F Figure 514 5C 17 MVME2500 ECC Installation and Use 6806800N30F 31 Hardware Preparation and Installation NOTICE Product Damage High humidity and condensation on the board surface causes short circuits Do not operate the board outside the specified environmental limits Make sure the board is completely dry and there is no moisture on any surface before applying power 2 3 2 Power Requirements The board uses 5 0 V from the VMEbus backplane On board power supply generates the required voltages for the various ICs The MVME2500 ECC connects the 12 V and 12 V supplies from the backplane to the PMC sites while the 3 3 V power supplied to the PMC sites comes from the 5 0 V backplane power A maximum of 10 A of 3 3 V power is available to the PMC sites however the 90 W 5 0
42. E2500 ECC Installation and Use 6806800N30F 113 Boot System 6 5 2500 Specific U Boot Commands Table 6 1 MVME2500 ECC Specific U Boot Commands base Print or set address offset bdinfo Print board info structure boot Boot default i e run bootcmd Boot default i e run bootcmd Boot from an ELF image in memory bootm Boot application image from memory bootp Boot image through network using BOOTP TFTP protocol bootvx Boot VxWorks from an ELF image Memory compare cmp Print console devices and information cpu Multiprocessor CPU boot manipulation and release Checksum calculation Get set reset date amp time Runs POST diags ext2load Load binary file from a Ext2 file system ext2ls List files in a directory default fatinfo Print information about file system fatload Load binary file from a DOS file system List files in a directory default Lr Flattened device tree utility commands Start application at address addr 114 MVME2500 ECC Installation and Use 6806800N30F Boot System Table 6 1 MVME2500 ECC Specific U Boot Commands continued Command ee Print header information for application image imxtract Extract a part of a multi image interrupts Enable or disable interrupts itest Return true false on integer compare loadb Load binary file over serial line kermit mode Load S Record file over serial
43. Ebus chassis It connects directly to the VME backplane in chassis with 80 mm deep rear transition area The MVME721X RTM is designed for use with the MVME7100 MVME2500 ECC MVME2500ET ECC iVME7210 and MVME 4100 It has the following features Table 4 5 Transition Module Features Function Features One five row P2 backplane connector for serial and Ethernet I O passed from the SBC Four RJ 45 connectors for rear panel I O four asynchronous serial channels Two RJ 45 connectors with integrated LEDs for rear panel I O two 10 100 1000 Ethernet channels One PIM site with rear panel I O For more information refer to the MVME721x RTM Installation and Use See Appendix B Related Documentation on page 135 for details on how to obtain and download the document MVME2500 ECC Installation and Use 6806800N30F Memory Maps Registers 5 1 Overview System resources including system control and status registers external timers and the QUART are mapped into 16 MB address range accessible from the MVME2500 ECC local bus through the P20x0 Q or IQ LBC 5 2 Memory The following table shows the physical address map of the MVME2500 ECC Table 5 1 Physical Address Map Device Name Start Address End Address Size DDR 0x0000_0000 0x7fff_ffff 2 PCIE 3 IO 0xffc0_0000 OxffcO ffff PCIE 210 Oxffc1 0000 0 1 PCIE 110 Oxffc2_0000 Oxffc2_ffff UARTO Oxffc4_0000 OxffcA_ffff UART1
44. G PLD Shutdown and Reset Reason OxFFDFOOFF Field AUTO_SH Shutdown Soft_RST Clear_Cause CPU_RESET WD_TIME LRSTO Sft_RST DN_MASK OUT R OPER R W W W W RESET 0 0 0 0 X X X X Note Changing a Reserved Register setting may cause damage to the board damage or malfunction Reserved register settings should not be changed Field Description AUTO SHDN MASK Automatic Shutdown Mask 1 Auto Shutdown Mask Enable 0 Auto Shutdown Mask Disable Note Automatic shutdown is generated after 1 second whenever a power good signal de asserts Shutdown Board Shutdown Register 1 Shutdown Enable 0 Shutdown Disable Note If a board entered the shutdown state by writing a this register the chassis power needs to be cycled to power up the board again Soft RST Board Soft Reset self clearing 1 Execute soft reset 0 No reset MVME2500 ECC Installation and Use 6806800N30F 101 Memory Maps and Registers Clear_Cause Clear Reset Reason self clearing 1 Clear Reason 0 None CPU_RESET CPU_HRESET_REQ_L Reset Reason 1 Reset is due to CPU_HRESET_REQ_L signal 0 None WD TIMEOUT Watchdog Timeout Reset Reason 1 Reset is due to watchdog timing out 0 None LRSTO TSI LRSTO Reset Reason 1 Reset is due to LRSTO signal 0 None Sft_RST Soft Reset Reset Reason 1 Reset is due to Soft_RST register being set or the front panel switch being pressed more than three 0 None 5 4 16 PLD Watchd
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46. MC IO 13 GE3_2 Serial 1 RTS 8 PMCIO 16 ADDRESS 28 PMCIO 15 2 GND 9 PMCIO 18 ADDRESS 29 PMCIO 17 GND Serial 2 RX 10 PMC IO 20 ADDRESS 30 PMCIO 19 GE3_3 GND 11 PMC IO 22 ADDRESS 31 PMCIO 21 GE3_3 Serial 2 TX 12 PMCIO 24 GND PMC IO 23 GND GND 13 PMC IO 26 5V PMCIO 25 2 DATA Serial 2 CTS 14 PMCIO 28 DATA 16 PMCIO 27 I2C CLK GND 15 PMC IO 30 DATA 17 PMC IO 29 GE3_LINK_LED Serial 2 RTS 16 PMC IO 32 DATA 18 PMCIO 31 GE3_ACT_LED GND 17 PMC IO 34 DATA 19 PMC IO 33 GE4_LINK_LED Serial 3 RX 18 PMC IO 36 DATA 20 PMCIO 35 GE4_A_LED GND 19 PMC IO 38 DATA 21 PMC IO 37 GND Serial 3 TX 20 PMC IO 40 DATA 22 PMC IO 39 GE4_3 GND 21 PMC IO 42 DATA 23 PMCIO 41 GE4_3 Serial 3 CTS 22 PMC IO 44 GND PMC IO 43 GND GND 50 MVME2500 ECC Installation and Use 6806800N30F Controls LEDs and Connectors Table 3 7 VMEbus P2 Connector continued Pin RowA Row B Row C Row D Row Z 23 PMC IO 46 DATA 24 PMCIO 45 2 Serial 3 RTS 24 PMCIO 48 DATA 25 PMC IO 47 GE4_2 GND 25 PMC IO 50 DATA 26 PMC IO 49 GND Serial 4 RX 26 PMCIO 52 DATA 27 PMCIO 51 1 GND 27 PMCIO 54 DATA 28 PMC IO 53 GE4_1 Serial 4 TX 28 PMC IO 56 DATA 29 PMCIO 55 GND GND 29 PMCIO 58 DATA 30 PMCIO 57 GE4_0 Serial 4 CTS 30 PMC IO 60 DATA 31 PMCIO 59 4_0 GND 31 PMC IO 62 GND PMCIO 61 GND Serial 4 RTS 32 PMC IO 64 5V PMC IO 63 5V GND 3 4 2 Onboard Connectors 3 4 2 1 Flash Program Connector
47. MVME2500 ECC Installation and Use P N 6806800N30F August 2014 EEE m z A a r wen B Eu EMBEDDED TECHNOLO Om ng Copyright 2014 Artesyn Embedded Technologies Inc All rights reserved Trademarks Artesyn Embedded Technologies Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies Inc 2014 Artesyn Embedded Technologies Inc All other product or service names are the property of their respective owners Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries Java and all other Java based marks are trademarks or registered trademarks of Oracle America Inc in the U S and other countries Microsoft Windows and Windows Me are registered trademarks of Microsoft Corporation and Windows XP is a trademark of Microsoft Corporation PICMG CompactPCI AdvancedTCA and the PICMG CompactPCI and AdvancedTCA logos are registered trademarks of the PCI Industrial Computer Manufacturers Group UNIX is a registered trademark of The Open Group in the United States and other countries Notice While reasonable efforts have been made to assure the accuracy of this document Artesyn assumes no liability resulting from any omissions in this document or from the use of the information obtained therein Artesyn reserves the right to revise this document and to make changes from time to
48. N PMC Presence Indicator 1 PMCis not present 0 5 present XMCP1_N XMC Presence Indicator 1 XMCis not present 0 is present PCI1_PCIXCAP PCI Capability Indicator 1 PCI X capable 0 PCI capable 5 4 9 PLD U Boot and TSI Monitor Register The MVME2500 ECC PLD provides an 8 bit register which indicates the status of the U Boot s normal environment switch and TSI interface signals Table 5 11 PLD U Boot and TSI Monitor Register 94 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers Field Description BDFAIL_N 151148 BDFAIL_N Pin out 1 TSI Fail 0 TSI Fail NORMAL_ENV Normal Environment Switch Indicator 1 Use safe ENV 0 Use normal ENV SCON System Controller Indicator 1 System Controller 0 Non system Controller 5 4 10 PLD Boot Bank Register The MVME2500 ECC PLD provides an 8 bit register which is used to declare successful U Boot loading indicating the SPI boot bank priority and actual SPI bank it booted from Table 5 12 PLD Boot Bank Register REG PLD Boot Bank OXFFDF0050 SPI_GOODReg BOOT_B BOOT_S write OxA4 into this reg to indicate successful loading of the U PI Boot MVME2500 ECC Installation and Use 6806800N30F 95 Memory Maps and Registers Field Description BOOT_BLOCK_A Boot Block Manual Selector Switch 1 SPIO 0 SPI BOOT_SPI Actual Boot Bank 1 SP1 0 SPIO NOTE If a boot failure leads to autom
49. N mode which works in conjunction with the VME SCON SEL switch 2 The VME SCON SEL switch is OFF to select non SCON mode The switch is ON to select always SCON mode This switch is only effective when the VME SCON MAN switch is MVME2500 ECC Installation and Use 6806800N30F 3 5 2 Controls LEDs and Connectors SMT Configuration Switch S2 This eight position SMT configuration switch controls the flash bank write protect selects the flash boot image and controls the safe start ENV settings The default setting on all switch positions is OFF and is indicated by brackets in Table 3 20 Figure 3 6 Normal ENV Boot Block A Flash WP N PMC XMC SEL PMC 133 Master WP Disabled GBE MUX SEL Reserved SMT Configuration Switch Position Signal Name NORMAL ENV switch is OFF Description Safe Start switch is ON Notes MVME2500 ECC Installation and Use 6806800N30F OFF Flash Block A FLASH BLOCK FLASH BLOCK B switch is OFF switch is ON OFF WP Disabled WP Disabled switch is SPI Flash Write Protect OFF OFF EEPROM WP Disabled EEPROM WP Disabled switch is OFF switch is ON OFF 133 MHz PMC 133 PCI frequency selection 65 Controls LEDs and Connectors Table 3 20 Geographical Address Switch Settings continued SW2 DEFAULT Signal Name Description Notes OFF WP Enabled MASTER_WP_DISABLED Write Protect Disable F
50. Oxffc5_0000 Oxffc5 ffff 64 KB UART2 Oxffc6_0000 Oxffc6_ffff 64 KB Oxffc7_0000 Oxffc7 ffff Oxffc8 0000 Oxffc8 Oxffdf 0000 Oxffdf Offf 0 0 0000 Oxffef_ffff MRAM 0 0 0000 Oxfff7_ffff 512 MVME2500 ECC Installation and Use 6806800N30F 87 Memory Maps and Registers 5 3 Linux Devices Memory Map The table below lists the memory ranges designated to different devices in Linux Table 5 2 Linux Devices Memory Map Ram Mem 0x00000000 Ox7fffffff PCIE3 Mem 0x80000000 Ox9fffffff PCIE2 Mem 0xa0000000 Oxbfffffff Mem 0xc0000000 Oxdfffffff 512MB MRAM Oxfff00000 Oxfff7ffff 512KB PCIE3 IO Oxffc00000 OxffcOfff PCIE2 IO Oxffc10000 Oxffc1ffff PCIE1 IO Oxffc20000 Oxffc2ffff QUARTO Oxffc40000 OxffcAffff QUARTI Oxffc50000 Oxffc5ffff 64 KB QUART2 Oxffc60000 Oxffceffff 64 KB QUART3 Oxffc70000 Oxffc7ffff Timer Oxffc80000 Oxffc8ffff FPGA Oxffdf0000 OxffdfOfff ecm local access window CCSR Oxffe00000 Oxffeooffff ecm Error Correction Module CCSR Oxffe01000 Oxffe01 fff 4KB Memory Controller CCSR 0xffe02000 0xffe02fff I2C1 CCSR Oxffe03000 Oxffe03 Off 12 2 CCSR Oxffe03100 Oxffed3 1 ff UARTO CCSR Oxffe04500 0xffe045ff UART1CCSR Oxffe04600 Oxffe046ff ELBC CCSR Oxffe05000 0xffe05fff SPICCSR Oxffe07000 0xffe07fff PCIE3 CCSR Oxffe08000 0xffe08fff 4KB 88 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 4 5 4 1 Tab
51. Produktes Hohe Luftfeuchtigkeit und Kondensat auf der Oberfl che des Produktes k nnen zu Kurzschl ssen f hren Betreiben Sie das Produkt nur innerhalb der angegebenen Grenzwerte f r die relative Luftfeuchtigkeit und Temperatur Stellen Sie vor dem Einschalten des Stroms sicher dass sich auf dem Produkt kein Kondensat befindet MVME2500 ECC Installation and Use 6806800N30F Sicherheitshinweise Besch digung von Schaltkreisen Elektrostatische Entladung und unsachgem er Ein und Ausbau des Produktes kann Schaltkreise besch digen oder ihre Lebensdauer verk rzen Bevor Sie das Produkt oder elektronische Komponenten ber hren vergewissern Sie sich da Sie in einem ESD gesch tzten Bereich arbeiten Fehlfunktion des Produktes Schalter die mit Reserved gekennzeichnet sind k nnen mit produktionsrelevanten Funktionen belegt sein Das Andern dieser Schalter kann im normalen Betrieb St rungen ausl sen Verstellen Sie nur solche Schalter die nicht mit Reserved gekennzeichnet sind Pr fen und ggf andern Sie die Einstellungen der nicht mit Reserved gekennzeichneten Schalter bevor Sie das Produkt installieren Installation Datenverlust Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmemass beendet wurde kann zu partiellem Datenverlust sowie zu Sch den am Filesystem f hren Stellen Sie sicher dass s mtliche Software auf dem Bo
52. RAME 12V 34 GND GND GND 35 INT C 38 5V PRESENT SIGNAL 39 PCIXCAP 5V MVME2500 ECC Installation and Use 6806800N30F 53 Controls LEDs and Connectors 54 Table 3 10 11 Connector continued Pin Signal Description 12V 33 GND JTAG TRST 34 IDSELB JTAG TMS JTAG TDO 3 TRDY 5 MVME2500 ECC Installation and Use 6806800N30F Controls LEDs and Connectors Table 3 11 PMC 12 Connector continued I Signal Description PCI RESET Signal Description CBE1 in Pin 2 44 3 45 14 BUSMODE3 PULLED DWN 15 3 3V 16 BUSMODE4 PULLED DWN EREADY GND RSTOUT 31 AD 16 63 GND 32 CBE2 64 NC Table 3 12 J13 Connector Pin Signal Description Pin Signal Description MVME2500 ECC Installation and Use 6806800N30F 55 Controls LEDs and Connectors Table 3 12 13 Connector continued Pin Signal Description Pin Signal Description 56 MVME2500 ECC Installation and Use 6806800N30F Controls LEDs and Connectors Table 3 12 13 Connector continued Pin Signal Description Pin Signal Description 32 GND 64 NC Table 3 13 PMC J14 Connector Pin Signal Description Pin Signal Description PMCIO 1 KR WwW
53. Technologies therefore assumes that there is usually no need to replace the battery except for example in case of long term spare part handling Board System Damage Incorrect replacement of lithium batteries can result in a hazardous explosion e When replacing the on board lithium battery make sure that the new and the old battery are exactly the same battery models e ifthe respective battery model is not available contact your local Artesyn sales representative for the availability of alternative officially approved battery models Data Loss e Replacing the battery can result in loss of time settings Backup power prevents the loss of data during replacement e Quickly replacing the battery may save time settings Data Loss e ifthe battery has low or insufficient power the RTC is initialized e Replace the battery before seven years of actual battery use have elapsed PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder To prevent damage do not use a screw driver to remove the battery from its holder MVME2500 ECC Installation and Use 6806800N30F 133 Replacing the Battery eee Replacement Procedure To replace the battery proceed as follows 1 Remove the old battery 2 Install the new battery with the plus sign facing up 3 Dispose of the old battery according to your country s legislation and in an environmentally safe wa
54. Timer 0 Counter Value Low Word OxFFC8020A Tick Timer 1 Counter Value Low Word REG Tick Timer 2 Counter Value Low Word OxFFC8040A TickTimer Counter Value Low Word 16 bits R W 0x0000 MVME2500 ECC Installation and Use 6806800N30F 107 Memory Maps and Registers iyuuuuuu im muu wawa 9 108 MVME2500 ECC Installation and Use 6806800N30F Chapter 6 Boot System eee 6 1 Overview The MVME2500 ECC uses Das U Boot a boot loader software based on the GNU Public License It boots the blade and is the first software to be executed after the system is powered on Its main functions are e Initialize the hardware Pass boot parameters to the Linux kernel e Start the Linux kernel e Update Linux kernel and U Boot images This section describes U Boot features and procedures that are specific to the MVME2500 ECC For general information on U Boot see http www denx de wiki UBoot WebHome 6 2 Accessing U Boot 1 Connect the board to a computer with a serial interface connector and terminal emulation software running on it The serial connector of the board is found on the face plate 2 Configure the terminal software to use the access parameters that are specified in U Boot By default the access parameters are as follows e Baud rate 9600 e PCANSI 8 data bits e No parity 1 stop bit These serial access parameters are the default values These can be changed
55. V limit must be observed as well as any cooling limitations 32 MVME2500 ECC Installation and Use 6806800N30F Hardware Preparation and Installation The following table provides an estimate of the typical and maximum power required Table 2 2 Power Requirements Maximum Calculated Typical Measured Operating MVME2500 01080101E 18 5 W 14 8 W 2500 010801015 18 5 W 14 8 W MVME2500 02120201E 24W 16 6 W 2500 021202015 24W 16 6 W MVME2500 02100202E 24W 16 6 W MVME2500 02100202S 24W 16 6 W The power is measured when the board is in standby Linux prompt Power will significantly increase when adding hard drives or a card The following table shows the power available when the MVME2500 ECC is installed in either a three row or five row chassis and when PMCs are present Chassis Type Available Power Power With PMCs Five Row 90 W maximum below 90 W vty Keep below power limit Cooling limitations must be considered 7 MVME2500 ECC Installation and Use 6806800N30F 33 Hardware Preparation and Installation 2 3 3 Equipment Requirements The following are recommended to complete a MVME2500 ECC system VMEbus system enclosure e System console terminal e Operating system and or application software e Transition module and connecting cables 2 4 Configuring the Board The board provides software control over most options Settings can be modified to fit th
56. aintained EMC Results pending testing This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications MVME2500 ECC Installation and Use 6806800N30F 139 Safety Notes Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Changes or modifications not expressly approved by Artesyn Embedded Technologiescould void the user s authority to operate the equipment Board products are tested in a representative system to show compliance with the above mentioned requirements A proper installation in a compliant system will maintain the required performance Use only shielded cables when connecting peripherals to assure that appropriate radio frequency emissions compliance is maintained Operation Product Damage High humidity and condensation on the board surface causes short circuits Do not operate the board outside the specified environmental limits Make sure the board is completely dry and there is no moist
57. applied may result in damage to module components Before installing or removing additional devices or modules read the documentation that came with the product MVME2500 ECC Installation and Use 6806800N30F Hardware Preparation and Installation 1 Attach an ESD strap to your wrist Attach the other end of the strap to the chassis as a ground Make sure that it is securely fastened throughout the procedure 2 Remove the PMC XMC filler plate from the front panel cut out 3 Slide the front bezel of the PMC XMC into the cut out from behind The front bezel of the PMC XMC module will be flushed with the board when the connectors on the module align with the mating connectors on the board 4 Align the mating connectors properly and apply minimal pressure to the PMC XMC until it is seated to the board 5 Insert the four PMC XMC mounting screws through the mounting holes on the bottom side of the board and then thread the four mount points on the PMC XMC Tighten the screws 6 Install the board into the appropriate card slot Make sure that the board is well seated into the backplane connectors Do not damage or bend connector pins 7 Replace the chassis or system cover 8 Reconnect the system to the power source and then turn on the system When removing the PMC XMC hold it by its long side and exert minimal force when pulling L it from the baseboad to prevent damage 2 6 Installing and Removing the Boar
58. ard ordnungsgemass beendet wurde bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen Besch digung des Produktes Fehlerhafte Installation des Produktes kann zu einer Besch digung des Produktes f hren Verwenden Sie die Handles um das Produkt zu installieren deinstallieren Auf diese Weise vermeiden Sie dass das Face Plate oder die Platine deformiert oder zerst rt wird Besch digung des Produktes und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen kann zur Besch digung des Produktes und der Zusatzmodule f hren Lesen Sie daher vor der Installation von Zusatzmodulen die zugeh rige Dokumentation MVME2500 ECC Installation and Use 6806800N30F 145 Sicherheitshinweise Kabel und Stecker Batterie 146 Besch digung des Produktes Bei den RJ 45 Steckern die sich an dem Produkt befinden handelt es sich entweder um Twisted Pair Ethernet TPE oder um E1 T1 1 Stecker Beachten Sie dass ein versehentliches Anschlie en einer E1 T1 1 Leitung an einen TPE Stecker das Produkt zerst ren kann e Sie deshalb TPE Anschl sse in der N he Ihres Arbeitsplatzes deutlich als Netzwerkanschl sse e Stellen Sie sicher dass die L nge eines mit Ihrem Produkt verbundenen TPE Kabels 100 m nicht berschreitet e Das Produkt darf ber die TPE Stecker nur mit einem Sicherheits Kleinspannungs Stromkreis SELV verbunden werden Bei Fragen wenden Sie sich an Ihren Systemver
59. atic reboot from the alternate bank and the original bank is then corrected power must be cycled in order for SPI to continue to provide accurate status The following is an example of a proper sequence This example assumes S2 2 is setto select SPI Flash 0 for booting It also assumesthat SPI Flash 0 is corrupted and that SPI Flash 1 is good Board powers on but fails to boot due to corrupted SPI Flash 0 e Board automatically switches to and successfully boots from the good SPI Flash 1 User replaces the image in SPI Flash 0 with a new good one User power cycles the blade in order to ensure continued accuracy of BOOT SPI 96 MVME2500 ECC Installation and Use 6806800N30F 5 4 11 Memory Maps and Registers PLD Write Protect and I2C Debug Register The MVME2500 ECC PLD provides an 8 bit register which is used to indicate the status of I2C and SPI write protect manual switches and is used to control the SPI write enable I2C debug ports are also provided in this register which can be used in controlling the bus status Table 5 13 PLD Write Protect and I2C Debug Register PLD Write Protect I2C OxFFDF0054 6 3 2 1 0 Field RSVD MASTER FLASH_ I2C_DEB SERIAL I2C 1 I2C_1_C _WP_DI WP_N UG_EN FLASH_ SABLED WP R R W RESET 0 1 0 0 1 0 1 1 Field Description MASTER_WP_DISABLED 12 devices manual switch write protect status 1 Write protect enabled 0 Write pro
60. blications 2 135 Table B 3 Related Specifications u en ae an 136 10 MVME2500 ECC Installation and Use 6806800N30F List of Figures _ Figure 1 1 MVME2500 ECC IEEE Board 21 Figure 1 2 MVME2500 ECC SCANBE Board 22 Figure 1 3 Declaration of Conformity 24 Figure 1 4 Serial Number Location 27 Figure 3 1 Component Layout erisera lees 41 Figure 3 2 Front Panel LEDs Connectors and Switches 42 Figure 3 3 Front Panel LEDS L m ne ea ine 43 Figure 3 4 Onboard 06 eene e pa rende oe DOR RU re 45 Figure 3 5 Geographical Address Switch 64 Figure 3 6 SMT Configuration Switch Position 65 Figure 4 1 Block Diagram iiec rr pb ee 67 Figure 4 2 SPI Device Multiplexing Logic 75 Figure 4 3 Clock Distribution Diagram 82 Figure A 1 Battery LOCAHON an 132 MVME2500 ECC Installation and Use 6806800N30F 11 List of Figures m 12 MVME2500 ECC Installation and Use 6806800N30F About this Manual ee Overview of Contents This manua
61. ctor has integrated speed and and activity status indicator LEDs Isolation transformers are provided onboard for each port MVME2500 ECC Installation and Use 6806800N30F 4 6 4 6 1 4 6 2 Functional Description SPI Bus Interface The enhanced serial peripheral interface eSPI allows the device to exchange data with peripheral devices such as EEPROMs RTC Flash and the like The eSPI is full duplex synchronous character oriented channel that supports a simple interface such as receive transmit clock and chip selects The 5 receiver and transmitter each have a FIFO of 32 Bytes P20x0 supports up to four chip selects and RapidS full clock cycle operation It can operate both full duplex and half duplex It works with a range of 4 bit to 16 bit data characters and is a single master environment MVME2500 ECCis configured such that the eSPI can operate up to 200 MHz clock rate and can support booting process The firmware boot flash resides in the 20 0 eSPI bus interface SPI Flash Memory The MVME2500 ECC has two 8 MB onboard serial flash Both contain the ENV variables and the U Boot firmware image which is about 513 KB in size Both SPI flash contain the same programming for firmware redundancy and crisis recovery The SPI flash can be programmed through the JTAG interface or through an onboard SPI flash programming header SPI Flash Programming The MVME2500 ECC has three headers a 10 pin header for SPI Flash progra
62. d This section describes the recommended procedure for installing the board in a chassis Read all warnings and instructions before installing the board The MVME2500 ECC does not support hot swap Power off the slot or system and make sure that the serial ports and switches are properly configured MVME2500 ECC Installation and Use 6806800N30F 37 Hardware Preparation and Installation Damage of Circuits e Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life e Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage e Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction 1 Attach an ESD strap to your wrist Attach the other end of the strap to an electrical ground Make sure that it is securely fastened throughout the procedure Remove VME filler panels from the VME enclosures as appropriate Install the top and bottom edge of the board into the guides of the chassis Ensure that the levers of the two injector ejectors are in the outward position Slide the board into the chassis until resistance is felt Simultaneously move the injector ejector levers in an inward direction A Verify that the board is properly seated and secure it to the chassis
63. d by Chip Select 0 External SPI multiplexing logic is implemented on the MVME2500 ECC to accomodate this chipset limitation 74 MVME2500 ECC Installation and Use 6806800N30F Functional Description The MVME2500 ECC FPGA controls the chip select to SPI devices A and B The FPGA chip select control is based on the Switch Bank 52 2 Figure 4 2 Device Multiplexing Logic ON SEL B OFF SEL A P20x0 SPI_SELO SPI_SEL1 SPI BUS SPI DEVICE A SPI DEVICE B At power up the selection of the SPI boot device is strictly based upon the Switch Bank 52 2 setting Depending on the S2 2 setting SPI_SELO is routed to one of two SPI devices The selected SPI device must contain a boot image Once the boot image is copied into memory and executed the FPGA will wait and once the P20x0 will write on one bit of the FPGA watchdog register the FPGA will then pass through the SPI chip select from the 20 0 to SPI device chip selects The software can now perform read write processes on any SPI device including copying from one SPI device to another With this flexible approach to firmware redundancy one should always be able to recover from a corrupt active firmware image as long as a healthy firmware image is maintained in the alternate backup SPI Device MVME2500 ECC Installation and Use 6806800N30F 75 Functional Description The MVME2500 ECC supports automatic switch over If booting one device is not succ
64. des Produkts in einer anderen Anwendung erfordert eine Sicherheits berpr fung f r diese spezifische Anwendung Einbau Wartung und Betrieb d rfen nur von durch Artesyn Embedded Technologies ausgebildeter oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgef hrt werden Die in diesem Handbuch enthaltenen Informationen dienen ausschlie lich dazu das Wissen von Fachpersonal zu erg nzen k nnen dieses jedoch nicht ersetzen Halten Sie sich von stromf hrenden Leitungen innerhalb des Produktes fern Entfernen Sie auf keinen Fall Abdeckungen am Produkt Nur werksseitig zugelassenes Wartungspersonal oder anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen um Komponenten zu ersetzen oder andere Anpassungen vorzunehmen Installieren Sie keine Ersatzteile oder f hren Sie keine unerlaubten Ver nderungen am Produkt durch sonst verf llt die Garantie Wenden Sie sich f r Wartung oder Reparatur bitte an die f r Sie zust ndige Gesch ftsstelle von Artesyn Embedded Technologies So stellen Sie sicher dass alle sicherheitsrelevanten Aspekte beachtet werden MVME2500 ECC Installation and Use 6806800N30F 143 Sicherheitshinweise EMV Betrieb 144 Das Produkt wurde in einem Artesyn Standardsystem getestet Es erf llt die f r digitale Ger te der Klasse A g ltigen Grenzwerte in einem solchen System gem den FCC Richtlinien Abschnitt 15 bzw EN 55022 Klasse A Diese Grenzwerte sollen einen a
65. e Config Platform Speed MSRCIDO Default operation eLBC ECC checking is disabled PLAT SPEED 1 CCB CLOCK gt 333 MHz CORE 0 Speed COREO SPEED 1 C ORE FREQ gt 1000 MHz For 1200 MHz board configuration CORE 1 Speed COREO SPEED 0 C ORE FREQ 1000 MHz CFG_CORE1_SPEED 1 C ORE FREQ gt 1000 MHz For 800 MHz board configuration For 1200 MHz board configuration CFG_CORE1_SPEED 0 C ORE FREQ lt 1000 MHz For 800 MHz board configuration DDR Controller Speed Engineering use LA 22 20 UART SOUT O TRIG OUT MSRCID 1 MSRCID 4 DMA1_DDONE_B 0 111111 11 CFG_DDR_SPEED 1 DDR FREQ gt 500 MHz Default for future use 17 SerDes Ref TSEC_1588_ALARM 1 SerDes expects a 100 Clock Config _OUT1 MHz reference clock frequency default 120 MVME2500 ECC Installation and Use 6806800N30F Programming Model Table 7 1 POR Configuration Settings continued CONFIG ETSEC2 SGMII Mode CONFIG PINS CONFIG SELECTION eTSEC2 Ethernet interface operates in standard parallel interface mode and uses the TSEC_2 pins default REMARKS ETSEC3 SGMMI Mode TSEC_1588_ALARM _OUT2 eTSEC3 Ethernet interface operates in standard parallel interface mode and uses the TSEC_3 pins default ETSEC1 and ETSEC2 Width eTSEC1 and eTSEC2 Ethernet interfaces operate in reduced pin mode either RTBI RGMI RMII
66. e user s specifications To configure set the bits in the control register after installing the board in a system Make sure that all user defined switches are properly set before installing a PMC XMC module For more information see Switches on page 63 34 MVME2500 ECC Installation and Use 6806800N30F Hardware Preparation and Installation 2 5 Installing Accessories 2 5 1 Rear Transition Module The MVME2500 ECC does not support hot swap Remove power to the rear slot or system before installing the module A PCMI O Module PIM needs to be manually configured and installed before placing the transition module NOTICE Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage e Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction Board Malfunction e Switches marked as reserved might carry production related functions and can cause the board to malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation Installation and Removal Procedure
67. e 5 2 LinuxDevices Memory nr ess 88 Table 5 3 PLD Revision Register s2 20 ra 89 MVME2500 ECC Installation and Use 6806800N30F 9 List of Tables Table 5 4 PLD Year Registern u 22255 aves cant een 90 Table 5 5 PLD Month Register u ee ne ee en 90 Table 5 6 PLD Register uuu aca aa 0 5 PE Far eee tU LR eier ins 91 Table 5 7 PLDSSeque c Regist r nn ns a 91 Table 5 8 PLD Power Good Monitor 92 Table 5 9 PLD LED Control 2 93 Table 5 10 PLD PCI PMC XMC 93 Table 5 11 PLD U Boot and TSI Monitor Register 94 Table 5 12 PLD Boot Bank Register 2 95 Table 5 13 PLD Write Protect and I2C Debug Register 97 Table 5 14 PLD Test REGISCGE 1 ae aa kama pee nn 99 Table 5 15 PLD Test Register2 2 passat et be 99 Table 5 16 PLD GPIO2 InterruptRegisten ea a 100 Table 5 17 PLD Shutdown and Reset Control and Reset Reason Register 101 Table 5 18 PLD Watchdog Timer Refresh Register 102 Table 5 19 PLD Watchdog Control R
68. e micro DB9 to standard DB9 cross connected serial console cable available under Artesyn partnumber ACC CABLE SER DTE 6E and is 2m long Only 115200 bps and 9600 bps are supported The default baud rate on the front panel serial is 9600 kbps Rear UART Control The MVME2500 ECC utilizes the Exar ST16C554 quad UART QUART to provide four additional ports to the RTM These devices feature 16 bytes of transmit and receive first in first out FIFO with selectable receive FIFO trigger levels and data rates of up to 1 5 Mbps Each UART has a set of registers that provide the user with operating status and control The QUART are 8 bit devices connected to the processor through the local bus controller using LBC chipset CS1 CS2 CS3 and CS4 These four serial interfaces are routed to P2 I O for RTM accessibility There are a total of five serial ports available on the MVME2500 ECC Sites The MVME2500 ECC hosts only one PMC XMC site and accepts either a PMC or an XMC add on card Only an XMC or a PMC may be populated at any given time as both occupy the same physical space on the PCB Combination PMC XMC cards are not supported by the MVME2500 ECC This PMC site also provides a rear I O The PMC site is fully compliant with the following 1 VITA 39 PCI X for PMC VITA 35 2000 for PMC P4 to VME P2 Connection PCI Rev 2 2 for PCI Local Bus Specification PCI X PT 2 0 for PCI X Protocol Addendum to the PCI Local Bus Specs
69. e surethatthekernel dtb andramdiskare saved inthe SATA drive with ext2 partition Configure U Boot environment variable setenv File ulImage kernel image setenv File dtp kernel dtb gt setenv File ramdisk lt ramdisk gt Saveenv Copythe files from the SATA drive to the memory option scsi interface 0 1 device 0 partition 1 ext2load scsi 0 1 1000000 File_ulmage ext2load scsi 0 1 2000000 File_ramdisk ext2load scsi 0 1 00000 SFile dtp Boot the Linux in memory bootm 1000000 2000000 c00000 Booting from a USB Drive 1 Make sure thatthe kernel dtb and ramdisk are saved in the USB drive with FAT partition Configure the U Boot environment variable setenv File ulImage kernel image setenv File dtp kernel dtb gt setenv File ramdisk lt ramdisk gt saveenv Initialize USB drive usb start Load the files from the USB drive to the memory option usb interface 0 1 device 0 partition 1 fatload usb 0 1 1000000 File_ulmage fatload usb 0 1 2000000 File_ramdisk fatload usb 0 1 c00000 File_dtb Bootthe Linux in memory bootm 1000000 2000000 c00000 MVME2500 ECC Installation and Use 6806800N30F 111 Boot System 6 3 4 Booting from an SD Card 1 Make sure thatthe kernel dtb and ramdisk are saved in the SD card with partition 2 Configure the U Boot environment variable setenv File_ulmage lt kernel_image gt setenv File_dtp lt kernel dtb gt
70. ebugging support as applied to the MVME2500 ECC POST Code Indicator The following table shows the LED status of the POST Codes For the location of the POST Code LEDs see Onboard LEDs on page 45 Logic 1 means LED is ON Logic 0 means LED is OFF Table 4 4 POST Code Indicator on the LED Sequence D33 D35 Description U boot has been copied from SPI flash to CPU cache 84 MVME2500 ECC Installation and Use 6806800N30F Functional Description Table 4 4 POST Code Indicator on the LED continued Sequence D33 D32 D35 Description 2 0 1 0 Serial console has been initialized some text is visible on the terminal 3 0 1 1 DDR has been initialized using SPD parameters Execution is still in the cache 4 1 0 0 Execution has been relocated to RAM 5 1 0 1 PCI has been initialized 6 1 1 0 POST routines are finished 7 1 1 1 Additional SW routines are finished 8 0 0 0 U boot prompt is visible on the terminal can start loading OS image from USB Ethernet SATA SSD SD 4 20 2 Custom Debugging Custom debugging makes use of the common on chip processor Refer to Common On Chip Processor COP on page 71 for details 4 21 Rear Transition Module RTM The MVME2500 ECC is compatible with the MVME721x RTM MVME2500 ECC Installation and Use 6806800N30F 85 Functional Description 86 The MVME721X RTM is for I O routing through the rear of a compact VM
71. ed Processor Reference Manual Rev 0 Tundra Semiconductor Tsi148 PCI X to VME Bus Bridge User Manual March 2009 Corporation MVME2500 ECC Installation and Use 6806800N30F 135 Related Documentation B 3 136 Related Specifications For additional information refer to the following table for related specifications As an additional help a source for the listed document is provided Please note that while these sources have been verified the information is subject to change without notice Table B 3 Related Specifications Organization American National Standards Institute ANSI VITA Standards Organization VITA Standards Organization Document ANSI VITA 1 0 1994 R2002 VME64 Standard ANSI VITA 1 1 1997 R2003 VME64x Extensions ANSI VITA 1 5 2003 VME 2eSST ANSI VITA 35 2000 Pin Assignments for PMC P4 Connector ANSI VITA 39 2003 PCI X for PMC and Processor High Speed Switched Interconnect Protocols on PMC VITA 42 0 2005 XMC General Purpose I O Standard VITA 42 10 XMC PCI Express Protocol Layer Standard VITA 42 3 2006 IEEE Peripheral Component Interconnect Special Interest Group PCI SIG IEEE 802 3 LAN MAN CSMA CD Access Method IEEE 802 3 2005 IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards IEEE Standard for a Common Mezzanine Card CMC Family IEEE Std 1386 2001 PMC IEEE Std 1386 1 2001
72. egister 103 Table 5 20 PLD Watchdog Timer Count Register 103 Table 5 21 Prescaler Register 2 104 Table 5 22 Control Registers u ee DRE RE ADU sod Fired se 105 Table 5 23 Compare High Word Registers 106 Table 5 24 Compare Low Word 106 Table 5 25 Counter High Word Registers 107 Table 5 26 Counter Low Word Registers 107 Table 6 1 MVME2500 ECC Specific U Boot Commands 114 Table 7 1 POR Configuration Settings 2 119 Table 7 2 MVME2500 ECC Interrupt List 123 Table 7 3 I2C Bus Device 124 Table 7 4 PHY Types and MII Management Bus Address 124 Table 7 5 Timing Parameters ee 126 Table 7 6 Clock Distribution RR ee ne Ba esas 127 Table 7 7 System Clock nen Br dels 128 Table B 1 Artesyn Embedded Technologies Embedded Computing Publications 135 Table B 2 Manufacturers Pu
73. ences and for table and figure descriptions Notation for selecting a submenu Notation for variables and keys Notation for software buttons to click on the screen and parameter description Repeated item for example node 1 node 2 node 12 Omission of information from example command that is not necessary at the time being Ranges for example 0 4 means one of the integers 0 1 2 3 and 4 used in registers MVME2500 ECC Installation and Use 6806800N30F Logical OR 15 About this Manual Notation XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXNXXXXXXXXXXXXXXXXXXXXX 300O0000000000000000000000000000000000000000000000 C XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Description Indicates a hazardous situation which if not avoided could result in death or serious injury Indicates a hazardous situation which if not avoided may result in minor or moderate injury XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Indicates a property damage message i XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Q XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX No danger encountered Pay attention to important information Su
74. essful the watchdog will trigger the board reset and it will automatically boot on the other device 4 6 4 Crisis Recovery The MVME2500 ECC provides an independent boot firmware recovery mechanism for the operating system The firmware recovery can be performed without leaving the firmware environment During crisis recovery the healthy boot image contained in SPI Device B is copied to SPI Device A replacing the corrupt boot image contained in SPI Device A Crisis recovery is performed as follows 1 on aM FW Power off the board Set Switch S2 2 to ON to point to SPI Device B crisis image Power on the board Press h on the keyboard to go to the U Boot prompt Type moninit fru to copy the crisis image to SPI Device A Once the U Boot prompt is visible power off the board Set the 52 3 back to OFF to point to the SPI Device Power on the board to boot from the newly recovered image on the SPI Device A YE The board will automatically switch over if one of the devices is corrupted 7 76 MVME2500 ECC Installation and Use 6806800N30F Functional Description 4 7 4 8 4 9 Front UART Control The MVME2500 ECC utilizes one of the two UART functions provided in the male micro mini DB 9 front panel A male to male micro mini DB 9 to DB9 adapter cable is available under Artesyn Part Number SERIAL MINI D 30 W2400E01A and is approximately 12 inches 25 cm in length There is also a a male to mal
75. evice Addressing on page 124 Reset Control FPGA The FPGA provides the following functions e Power control and fault detection Reset sequence and reset management e Status and control registers e Miscellaneous control logic e Watchdog timer 32 bit Tick Timer e Clock generator e Switch decoder and LED controller Power Management The MVME2500 ECC backplane is utilized to derive 3 3V 2 5V 1 8V 1 5V 1 2V 1 05V voltage rail Each voltage rail is controlled by the FPGA through an enable pin of the regulator while the output is monitored through power good signal If a voltage rail fails the FPGA will disable each supply To restart the system the chassis power switch must be powercycled MVME2500 ECC Installation and Use 6806800N30F Functional Description 4 15 1 4 15 2 Onboard Voltage Supply Requirement The onboard power supply is considered to be out of regulation if the output voltage level is below the minimum required power or goes beyond the maximum Table 4 1 Voltage Supply Requirement Voltage Rail Requirement Voltage Rail Minimum Maximum 1 8V 1 5V 1 2V 1 2 V_SW Power Up Sequencing Requirements The power up sequence describes the voltage rail power up timing which is designed to support all the chip supply voltage sequencing requirement MVME2500 ECC Installation and Use 6806800N30F 81 Functional Description 4 16 Clock Structure A total o
76. f three IDT chips a discrete oscillator and crystal to support all the clock requirements of MVME2500 ECC Figure 4 3 Clock Distribution Diagram 100 MHz lt 100 TSI384 51284 25 MHz LVCMOS ICS9FG108 100 MHz 100 100 MHz PCIE SATA BRIDGE 25 MHz L VCMOS PHY ICS83905 25 MHz LVCMOS PCIE SATA BRIDGE 25 MHz LVCMOS GBE SWITCH 25 MHz LVCMOS BP GBE PHY 25 MHz LVCMOS 125 MHz LVCMOS CPU GBE REF 100 MHz LVCMOS CPU DDRCLK ICS840S071 100 MHz LVCMO CPU SYSCLK 123 MHz TSI384 Bridge TSI148 Bridge 1 8432 MHz OSC 18MHz P FPGA 1 a MHz QUART 24 OSG 24 MHz USB TRANSGEIVER 4 17 Reset Structure MVME2500 ECC reset will initiate after the power up sequence if the 1 5 V power supply is GOOD When the board is at ready state the reset logic will monitor the reset sources and implement the necessary reset function 82 MVME2500 ECC Installation and Use 6806800N30F Functional Description 4 17 1 4 18 Reset Sequence The timing of the reset sequence supports each chip reset requirements with respect to the power supply Thermal Management The MVME2500 ECC utilizes two on board temperature sensors one for the board and the other for the CPU temperature sensor The board temperature sensor is located near the dual RJ45 connector near the front panel The CPU temperature sensor is located near the P2020 CPU The MVME2500 ECC thermal management support will interrupt the
77. figuration Replace the chassis or system cover reconnect the chassis to power source and turn the equipment power on MVME2500 ECC Installation and Use 6806800N30F 39 Hardware Preparation and Installation iy 0 40 MVME2500 ECC Installation and Use 6806800N30F Chapter 3 Controls LEDs and Connectors 3 1 Board Layout The following figure shows the components and connectors on the MVME2500 ECC applicable to both standard and extended variants Figure 3 1 Component Layout 51 Switch 3 3V Supply 1 8V Supply SATA Controller U12 60 pin Header 1 1 5V Supply SATA Connector CPU Debug P4 Battery Connector Flash A eon U30 TSI148 058001 Flash u aio m PMC Connectors U35 E am SDRAM Chips i E COP Header P50 P2020 P2010 GbE PHY U7 GbEPHY 1050 U8 017 supply QUART 412V SW Supply MVME2500 ECC Installation and Use 6806800N30F 41 Controls LEDs and Connectors 3 2 FrontPanel Thefollowing components are found on the MVME2500 ECC front panel for both the standard and ET variants Figure 3 2 Front Panel LEDs Connectors and Switches MVME2500 ECC SCANBEE MVME2500 ECC IEEE PMC XMC Front I O COMM 1 USER 1 Reset Switch Fail GENET 1 GENET 2 SPEED and ACT LEDs are both for GENET 1 and GENET 2 42 MVME2500 ECC Instal
78. for the SerDes PLL to lock default SYSCLOCK is above 66 MHz SDHC Card Detect Polarity TSEC2_TXD_5 Not Inverted RAPID System Size 122 Default RapidlO is not used MVME2500 ECC Installation and Use 6806800N30F Programming Model 7 3 Interrupt Controller The MVME2500 ECC uses the MPC8548E integrated programmable interrupt controller PIC to manage locally generated interrupts Currently defined external interrupting devices and interrupt assignments along with corresponding edge levels and polarities are shown in the following table Table 7 2 MVME2500 ECC Interrupt List Interrupt Usage Interrupt Line Schematic Interface to CPU Description Reserved for VME interrupt QUART_IRQ1 RTB Quart Interrupt QUART_IRQ2 RTB Quart Interrupt QUART_IRQ3 RTB Quart Interrupt Temperature Two onboard Thermal Sensors Interrupt one is for CPU temp and the other is for board temp Ethernet 1 Management I2C Ethernet interrupt is handled by PHY Connected for flexibility Ethernet 3 Management I2C Ethernet interrupt is handled by PHY Connected for flexibility IRQ7 GPIOO Ethernet 2 Management I2C Ethernet interrupt is handled by PHY Connected for flexibility IRQ8 GPIO1 RTC Real Time IRQ9 2 1 NMI and 3 Tick Timer Interrupts IRQ10 FPGA Interrupt Power Interruption IRQ11 GPIOA QUART IRQO RTB Quart Interrupt MVME
79. ion PMCs and processor PMCs PrPMCs The PMC site has two IDSELs two REQ GNT pairs and EREADY to support PrPMC as defined by VITA39 XMC Add on Card The x2 links the PCI E Gen 1 and is directly routed to the P15 XM connector through Pericom MUX Switch The onboard switch S2 4 should be set to add on cards are required to operate at 5V or 12V from carrier to The MVME2500 ECC provides 5V to the XMC VPWR Variable Power pins The MVME2500 ECC does not provide 12V to the XMC VPWR pins Voltage tolerances for VPWR and all carrier supplied voltage 3 3 V 12 V 12 V are defined by the base XMC standard MVME2500 ECC Installation and Use 6806800N30F 4 10 4 11 4 11 1 4 12 Functional Description SATA Interface The MVME2500 ECC supports an optional 2 5 SATA HDD The connector interface is compatible with the Artesyn SATAMNKIT which contains the following one SSD HDD one SATA board screws and a mounting guide The SATA connector can support a horizontal mounted SSD HDD The MVME2500 ECC uses Marvell s 88SE6121B2 NAA2C000 SATA controller and supports up to 1 5 Gbps SATA Gen 1 For status indicators it has an onboard green LED D12 and D13 for SATA link and SATA activity status respectively VME Support The MVME2500 ECC can operate in either System Controller SCON mode or non SCON mode as determined by the the switch setting of 51 1 and S1 2 The P20x0 x1 link is used for the VME bac
80. ion of HRESET and return to their assigned function after HRESET is deasserted System Memory The processor integrated memory controller supports one channel of DDR3 memory with either 1GB DDR3 1Gbx8 devices or 2GB DDR3 2Gbx8 devices The MVME2500 supports two banks of memory It comes with either 1 GB or 2 GB ECC SDRAM The MVME2500 is produced in a memory down configuration rather than a SODIMM configuration This enables product ruggedization for more demanding operating environments Eighteen memory devices provide 2 GB of ECC memory using 1 Gbit 256M x8 device densities or 2GB of ECC memory using 2 Gbit 256M x8 device densities The MVME2500 ECC has a total of six board variants four of which are commercial temperature and have both 2GB and 1GB of memory whereas the other two variants are Extended Temperature ET and have 2GB of memory Timers The MVME2500 ECC platform implements the following timer functions Real Time Clock This operates on a 3 3 V supply monitoring and battery control function MAX6364PUT29 a 32 768 KHz clock generator DS32KHZS and an RTC with alarm DS1375T MVME2500 ECC Installation and Use 6806800N30F 71 Functional Description 4 4 2 4 4 3 4 4 4 4 5 72 See Real Time Clock Battery on page 84 for more information on the real time clock back up battery Internal Timer The processor s internal timer is composed of eight global timers divided into two groups of four timer
81. ister 2 OxFFDF0081 PLD Test Register 2 OxFFDFO081 _____ Bt WT E owe j o TEST REG2 C Field Description TEST REG2 General purpose 8 bit R W field MVME2500 ECC Installation and Use 6806800N30F 99 Memory Maps and Registers 5 4 14 PLD GPIO2 Interrupt Register The Abort switch Tick Timer 0 1 and 2 interrupts are ORed together The MVME2500 ECC provides an interrupt register that the system software reads to determine which device the interrupt originated from GPIO2 will be driven low if any of the interrupts asserts Table 5 16 PLD GPIO2 Interrupt Register PLD Write Protect I2C OxFFDF0095 RSVD RSVD RSVD RSVD PME TICKO INT TICK1 INT TICK2 INT OPER i Field Description NMI Abort switch interrupt if pressed less than three seconds 1 Interrupt enabled 0 No Interrupt TICKO_INT Tick Timer 0 interrupt 1 Interrupt enabled 0 No Interrupt TICK1_INT Tick Timer 1 interrupt 1 Interrupt enabled 0 No Interrupt TICK2_INT Tick Timer 2 interrupt 1 Interrupt enabled 0 No Interrupt 100 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 4 15 Reset Control and Reset Reason Register The MVME2500 ECC provides an 8 bit register to execute the shutdown and reset commands The board s reset reason is also included in this register Table 5 17 PLD Shutdown and Reset Control and Reset Reason Register RE
82. kplane connectivity through the Tsi384 PCI E PCI X and 751148 PCI X VMEBus bridges See VMEbus P1 Connector on page 48 and VMEbus P2 Connector on page 50 for more information Tsi148 VME Controller The VMEbus interface for the MVME2500 ECC is provided by the Tsi148 VMEbus controller The Tsi148 provides the required VME VME extensions and 2eSST functions SN74VMEH22501 transceivers are used to buffer the VME signals between the Tsi148 and the VME backplane Refer to the Tsi148 user s manual for additional details and or programming information USB The MVME2500 ECC processor implements a dual role DR USB 2 0 compliant serial interface engine DC power to the front panel USB port is supplied using a USB power switch which provides soft start current limiting over current detection and power enable for port 1 MVME2500 ECC Installation and Use 6806800N30F 79 Functional Description 4 13 4 14 4 15 80 12 Devices The MVME2500 ECC utilizes one of the two I2C ports provided by the board s processor The 2 bus is a two wire serial data SDA and serial clock SCL synchronous multi master bi directional serial bus that allows data exchance between this device and other devices such as VPD SPD EEPROM RTC temperature sensor RTM XMC and IDT clocking RTM I2C address can be configured by the user and should not contain duplicate addresses to avoid conflict For more information see 2 Bus D
83. l is divided into the following chapters and appendices e Introduction gives an overview of the features of the product standard compliances mechanical data and ordering information e Hardware Preparation and Installation outlines the installation requirements hardware accessories switch settings and installation procedures e Controls LEDs and Connectors describes external interfaces of the board This includes connectors and LEDs e Functional Description includes a block diagram and functional description of major components of the product Memory Maps and Registers contains information on system resources including system control and status registers and external timers Boot System describes the boot loader software e Programming Model contains additional programming information for the board Replacing the Battery contains the procedures for replacing the battery Related Documentation provides a listing of related product documentation manufacturer s documents and industry standard specifications e Safety Notes summarizes the safety instructions in the manual e Sicherheitshinweise is a German translation of the Safety Notes chapter Abbreviations This document uses the following abbreviations Term Definition CPLD Complex Programmable Logic Device DDR Double Data Rate DDR3 Double Data Rate 3 DMI Direct Media Interface MVME2500 ECC Installation and Use 6806800N30F 13 About this
84. lation and Use 6806800N30F Controls LEDs and Connectors 3 2 1 3 3 3 3 1 Reset Switch The MVME2500 ECC has a single push button switch that has both the abort and reset functions Pressing the switch for less than three seconds generates an abort interrupt to the P20x0 QorlQ PIC Holding it down for more than three seconds will generate a hard reset The VME SYSRESET is generated if the MVME2500 ECC is the VMEbus system controller LEDs The MVME2500 ECC utilizes light emitting diodes LEDs to provide a visible status indicator on the front panel These LEDs show power failures power up states Ethernet link speed ethernet activity SATA link and activity and PCI E valid lane status There are also a few user configurable LEDs Each LED description is necessary for troubleshooting and debugging Front Panel LEDs The front panel LEDs are listed below Figure3 3 Front Panel LEDs SPEED SPEED USER 1 FAIL Ex p GENET 1 GENET 2 MVME2500 ECC Installation and Use 6806800N30F 43 Controls LEDs and Connectors Table 3 1 Front Panel LEDs Label Function User Defined Location Front panel Color Off Yellow Red Description By default User Software Controllable Refer to the User LED Register User Software Controllable Refer to the User LED Register Board Fail Front panel Off Normal operation after successful firmware boot One or more on board p
85. le 5 2 Linux Devices Memory Map continued Device Memory Range Memory Area Size PCIE2 CCSR Oxffe09000 0xffe09fff PCIEICCSR Oxffe0a000 0xffe0afff DMA2 CCSR 0 0 100 Oxffe0c303 516B GPIO CCSR OxffeOfc00 OxffeOfcff L2 Cache CCSR Oxffe20000 0xffe20fff DMA1 CCSR Oxffe21100 Oxffe21303 USB CCSR Oxffe22000 Oxffe22fff ETSEC1 CCSR Oxffe24000 Oxffe24fff ETSEC2 CCSR Oxffe25000 Oxffe25fff ETSEC3 CCSR Oxffe26000 Oxffe26fff SDHCI CCSR Oxffe2e000 Oxffe2efff Crypto CCSR Oxffe30000 Oxffe3ffff msi CCSR Oxffe41600 Oxffe4167f mpic CCSR Oxffe40000 Oxffe7ffff 256 KB Global Utilities CCSR Oxffee0000 OxffeeOfff L2 Cache Mem OxfOf80000 OxfOffffff 512KB Programmable Logic Device PLD Registers PLD Revision Register The MVME2500 ECC provides a PLD revision register that can be read by the system software to determine the current version of the timers registers PLD Table 5 3 PLD Revision Register REG PLD Revision Register OXFFDF0000 Bit 7 6 5 4 3 2 1 0 MVME2500 ECC Installation and Use 6806800N30F 89 Memory Maps and Registers 5 4 2 5 4 3 90 Table 5 3 PLD Revision Register continued REG PLD Revision Register OXFFDF0000 Field Description PLD_REV 8 bit field containing the current timer register PLD revision The revision number starts at 01 PLD Year Register The MVME2500 ECC PLD provides an 8 bit register which contains the build year of the timers regis
86. malfunction if their settings are changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation Geographical Address Switch 51 The Tsi148 VMEbus Status Register provides the VMEbus geographical address of the MVM2500 ECC The switch reflects the inverted states of the geographical address signals Applications not using the five row backplane can use the geographical address switch to assign a geographical address based on the following diagram MVME2500 ECC Installation and Use 6806800N30F 63 Controls LEDs and Connectors 64 Note that this switch is wired in parallel with the geographical address pins on the 5 row connector These switches must be in the OFF position when installed in a 5 row chassis in order to get the correct address from the P1 connector This switch also includes the SCON control switches Figure 3 5 Geographical Address Switch i 1 C Sie Table table 2 See Table See Table 3 GAP 0 GAP 1 M GA4 0 GA4 1 5 0 1 GA2 0 GA2 1 7 GA1 0 GA1 1 8 GAO 0 GA0 1 Table 3 19 Geographical Address Switch Position Function Default VME SCON Auto Auto SCON VME SCON SEL2 Non SCON GAP GAP4 1 GAP3 1 GAP2 1 1 The VME SCON MAN switch is OFF to select Auto SCON mode The switch is ON to select manual SCO
87. mmary of Changes This manual has been revised and replaces all prior editions Part Number Publication Date Description 6806800N30A November 2011 First edition 6806800N30B May 2012 ECCrelated updates 16 MVME2500 ECC Installation and Use 6806800N30F About this Manual Part Number Publication Date Description 6806800N30C January 2013 Updated Standard Compliances on page 22 6806800N30D August 2013 Updated Table 1 6 Table 1 4 Table 2 1 Table 2 2 Table 3 20 Chapter 4 Functional Description Chapter 5 Programmable Logic Device PLD Registers and Chapter 5 PLD Boot Bank Register on page 95 6806800N30E December 2013 Updated Chapter 4 PMC Add on Card on page 78 and Chapter 5 PLD PCI PMC XMC Monitor Register on page 93 6806800N30F August 2014 Re branded to Artesyn template Added Declaration of Conformity on page24 MVME2500 ECC Installation and Use 6806800N30F 17 About this Manual 18 MVME2500 ECC Installation and Use 6806800N30F Chapter 1 Introduction 1 1 Overview The MVME2500 ECC is a VMEbus board based on the Freescale QorlQ P2010 single core or P2020 dual core processor It has a 6U form factor and has an expansion slot for an optional PCI Mezzanine Card PMC or PCI eXpress Mezzanine Card XMC It comes with either 1 GB or 2 GB of DDR3 SDRAM and is offered with either IEEE 1101 10 compliant or SCANBE ejector handles The front panel I O
88. mming an 80 pin header for the JTAG connectivity and a 20 pin JTAG header for ASSET hardware connectivity The following options are used to program the onboard flash e Using onboard SPI header The MVME2500 ECC uses the 10 pin header with a Dual SPI Flash in circuit programming configuration The pin connection is compatible with DediProg SPI Unversal Pin Header e Using 60 pin external JTAG header An external JTAG board with a JTAG multiplexer is compatible with the MVME2500 ECC and can be attached using an external cable It can be used to update the boot loader in the field Using this method programming can be done through the JTAG interface or by using the dedicated SPI Flash programming header on the JTAG board MVME2500 ECC Installation and Use 6806800N30F 73 Functional Description e Factory Pre Programming Programming the SPI Flash usually takes a while Ideally the SPI Flash should be pre programmed in the factory before shipment ICT Programming This programming is done on exposed test points using a bed of nails tester The board power should be switched on before programming The switch S2 8 should also be v M powered on to successfully detect the SPI Flash chip 4 6 3 Firmware Redundancy The MVME2500 ECC uses two physically separate boot devices to provide boot firmware redundancy Although the P20x0 provides four SPI Bus chip selects the P20x0 is only capable of booting from the SPI Device controlle
89. nd configure Tundra Tsi148 usb USB sub system usbboot Boot from USB device version Print monitor version Updating U Boot To update the U Boot place the image in the RAM address 0x1000000 in this example before copying it to the SPI flash The following procedure will replace the image in SPI bank 0 1 Disable SPI write protect in FPGA register Chapter 5 PLD Write Protect and 2 Debug Register 2 Ensure FLASH_WP_N in SMT Configuration Switch S2 is in the OFF position MVME2500 ECC Installation and Use 6806800N30F Boot System eee 3 Select SPI flash 0 sf probe 0 4 Erase 0x90000 bytes starting at SPI address 0 sf erase 0 0x90000 5 Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0 sf write 0x1000000 0 0x90000 To replace the image in SPI bank 1 replace step 2 with Select SPI flash 1 sf probe 1 MVME2500 ECC Installation and Use 6806800N30F 117 Boot System m 118 MVME2500 ECC Installation and Use 6806800N30F Programming Model __ wFW 7 1 Overview Chapter 7 This chapter includes additional programming information for the MVME2500 ECC 7 2 Reset Configuration The MVME2500 ECC supports the power on reset POR pin sampling method for processor reset configuration Each option and the corresponding default setting are described in the following table Table 7 1 POR Configuration Settings CONFIG CCB Config CONFIG PINS
90. ngemessenen Schutz vor St rstrahlung beim Betrieb des Produktes in Gewerbe sowie Industriegebieten gew hrleisten Das Produkt arbeitet im Hochfrequenzbereich und erzeugt St rstrahlung Bei unsachgem em Einbau und anderem als in diesem Handbuch beschriebenen Betrieb k nnen St rungen im Hochfrequenzbereich auftreten Wird das Produkt in einem Wohngebiet betrieben so kann dies mit grosser Wahrscheinlichkeit zu starken St rungen f hren welche dann auf Kosten des Produktanwenders beseitigt werden m ssen nderungen oder Modifikationen am Produkt welche ohne ausdr ckliche Genehmigung von Artesyn Embedded Technologies durchgef hrt werden k nnen dazu f hren dass der Anwender die Genehmigung zum Betrieb des Produktes verliert Boardprodukte werden in einem repr sentativen System getestet um zu zeigen dass das Board den oben aufgef hrten EMV Richtlinien entspricht Eine ordnungsgem sse Installation in einem System welches die EMV Richtlinien erf llt stellt sicher dass das Produkt gem ss den EMV Richtlinien betrieben wird Verwenden Sie nur abgeschirmte Kabel zum Anschluss von Zusatzmodulen So ist sichergestellt dass sich die Aussendung von Hochfrequenzstrahlung im Rahmen der erlaubten Grenzwerte bewegt Warnung Dies ist eine Einrichtung der Klasse A Diese Einrichtung kann im Wohnbereich Funkst rungen verursachen In diesem Fall kann vom Betreiber verlangt werden angemessene Ma nahmen durchzuf hren 1 Besch digung des
91. og Timer Refresh Register The MVME2500 ECC provides a watchdog timer refresh register Table 5 18 PLD Watchdog Timer Refresh Register REG PLD Watch Dog Timer Load OxFFC80600 Field Description Refresh Counter Refresh When the pattern 0x00DB is written the watchdog counter will be reset to zero 102 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 4 17 PLD Watchdog Control Register The MVME2500 ECC provides a watchdog control register Table 5 19 PLD Watchdog Control Register REG PLD Watch Dog Timer Load OxFFC80604 ee Te mem To 8 F T FP R OPER R RESET 0000 Field Description EN Enable If cleared the watchdog timer is disabled If set the watchdog timer is enabled 5 4 18 PLD Watchdog Timer Count Register The MVME2500 ECC provides a watchdog timer count register Table 5 20 PLD Watchdog Timer Count Register PLD Watchdog Timer Count Oxffc80606 15 0 Count R W OxEA60 60secs MVME2500 ECC Installation and Use 6806800N30F 103 Memory Maps and Registers Field Description Count Count These bits define the watchdog timer count value When the watchdog counter is enabled it will count up from zero reset value with a 1 ms resolution until it reaches the COUNT value set by this register Watchdog will generate a soft reset signal if it bites Setting this register to OXEA60 or 60 000 counts will provide a
92. on of the serial number label Figure 1 4 Serial Number Location Serial number MVME2500 ECC Installation and Use 6806800N30F 27 Introduction iy u M 28 MVME2500 ECC Installation and Use 6806800N30F Chapter 2 Hardware Preparation and Installation EMI 2 1 Overview This chapter provides installation and safety instructions for this product Installation instructions for the optional PMC and transition module are also included A fully implemented MVME2500 ECC consists of the base board plus e Mezzanine Card PMC or PCI eXpress Mezzanine Card for added versatility Rear Transition Module RTM SATA kit The following are the things that need to be done before using the board Be sure to read the entire chapter including all caution and warning notes before you begin 1 2 S Unpack the hardware Refer to Unpacking and Inspecting the Board on page 30 Configure the hardware by setting jumpers on the board and RTM Refer to Configuring the Board on page 34 Install the transition module in the chassis Refer to Rear Transition Module on page 35 Install PMC module if required Refer to Support on page 36 Install XMC span module if required Refer to PMC XMC Support on page 36 Install the board in the chassis Refer to Installing and Removing the Board on page 37 Attach cables and apply power Refer to Completing the Installation on page 39 MVME250
93. onnector 2 continued Controls LEDs and Connectors CARD DETECT 12 GND 3 4 2 7 Connector 2 The MVME2500 ECC has one connector X 2 that supports cards with 15 connector It can also support cards with 16 connector without encountering any mechanical interference Table 3 17 Connector 2 Pinout Pin Row A Row B Row C Row D Row E RX1 Row F 3 3V 2 GND GN JTAG TRST HRESET 3 3V 3 3V JTAG TCK MRSTO PULLED UP 3 3V JTAG TMS 8 GND GND JTAG TMS GND 3 3V MVME2500 ECC Installation and Use 6806800N30F 61 Controls LEDs and Connectors Table 3 17 XMC Connector XJ2 Pinout continued UP 3 3V GA 1 PRESENT NC 3 3V 12 DATA I2C CLOCK ROOTO PULLED UP 3 4 2 8 Miscellaneous P2020 Debug Connectors Table 3 18 P20x0 Debug Header Pin Signal Description MSRCDIO MSRCDIT MDVAL MSRCDI2 TRIG OUT MSRCDI3 62 MVME2500 ECC Installation and Use 6806800N30F Controls LEDs and Connectors 3 5 3 5 1 Table 3 18 P20x0 Debug Header continued Pin Signal Description C um Switches These switches control the configuration of the MVME2500 ECC NOTICE Board Malfunction e Switches marked as reserved might carry production related functions and can cause the board to
94. or 8 bit FIFO mode ETSEC1 Protocol TSEC1_TXDO TSEC1_TXD7 The eTSEC2 controller operates using the protocol or if configured in reduced mode if its not configured to operate in SGMII mode ETSEC2 Protocol 23 ETSEC3 Protocol TSEC2 TXDO TSEC2 TXD7 UART_RTSO UART_RTS1 10 The eTSEC2 controller operates using the protocol if configured in reduced mode if its not configured to operate in SGMII mode The eTSEC3 controller operates using the RGMII protocolif not configured to operate in SGMII mode MVME2500 ECC Installation and Use 6806800N30F 121 Programming Model Table 7 1 POR Configuration Settings continued CONFIG BOOT ROM Location Host Agent Config Port Select DDR SDRAM TYPE SerDes PLL Time Out Enable System Speed CONFIG PINS TSEC1_TXD 6 4 TSEC1_TX_ER LWE1 LBS1 LA 18 19 TSEC1_TXDJ 3 1 TSEC2_TX_ER TSEC2_TXD1 TRIG_OUT LA 28 CONFIG SELECTION On chip boot ROM SPI configuration x 0 SDHC x 1 REMARKS The processor acts as the host root complex for all PCI E Serial Rapid interfaces default PCI E 1 x1 2 5 Gbps SerDes lane 0 PCI E 2 x1 2 5 Gbps SerDes lane 2 PCI E 3 x2 2 5 Gbps SerDes lane 2 3 DDR31 5 V CKE low at reset default Disable PLL lock time out counter The power on reset sequence waits indefinitely
95. or I2C write protect switch only OFF Front GBE_MUX_SEL User Defined switch that will select if the GBE PHY will function on the front panel or on the Back PLANE OFF CPU Reset Reserved Should be OFF for Deasserted normal operation 66 MVME2500 ECC Installation and Use 6806800N30F Chapter 4 Functional Description 4 1 4 2 Block Diagram The MVME2500 ECC block diagram is illustrated in Figure 4 1 All variants provide front panel access to one serial port via a micro mini DB 9 connector two 10 100 1000 Ethernet port oneis configurable to be routed on the front panel or to the rear panel through a ganged RJ45 connector and one Type A USB Port It includes Board Fail LED indicator user defined LED indicator and a ABORT RESET switch Figure4 1 Block Diagram 1GB or 2 HOSS Sao Freescale QorlQ abb cman P20x0 x2 PCle E as Genes PCle to PCI X Bridge pci x PCI X to 54 133 VME Bridge Chipset The MVME2500 ECC utilizes the QorlQ P20x0 integrated processor It offers an excellent combination of protocol and interface support including dual high performance CPU cores a large L2 cache a DDR2 DDR3 memory controller three enhanced three speed Ethernet controllers two Serial RapidlO interfaces with a messaging unit a secure digital interface a USB 2
96. ower rails has failed and the board has shutdown to protect the hardware Normal during power up during hardware reset such as a front panel reset May be asserted by the BDFAIL bit in the Tsi148 VSTAT register GENET1 TSEC1 Front panel No link SPEED Link Speed Integrated 1 0 1 OOBASE T operation 1000 BASE T operation GENET1 TSEC1 Front panel Off No activity ACT Activity Integrated Blinking Green Activity proportional to bandwidth RJ45 LED utilization GENET2 TSEC2 Front panel Off No link SPEED Link Speed Integrated Amber 10 100BASE T operation RJ45 LED nn Green 1000BASE T operation GENET2 TSEC2 Front panel Off No activity ACT Activity Integrated Blinking Green Activity proportional to bandwidth RJ45 LED utilization 44 MVME2500 ECC Installation and Use 6806800N30F Controls LEDs and Connectors 3 3 2 Onboard LEDs The onboard LEDs are listed below To view its location on the board see Figure 3 1 on page 41 Figure3 4 Onboard LEDs D33 D34 D35 D36 D37 D38 09 Table 3 2 Onboard LEDs Status Power Fail Red This indicator is illuminated when one or more of the on board voltage rails fails D33 User Defined Amber Controlled by the FPGA Used for boot up sequence indicator D34 User Defined Amber Controlled by the FPGA Used for boot up sequence indicator D35 User Defined Amber Controlled by the FPGA Used for boot up sequence indicator D36 Early Power Fail
97. p the blade again will delete the memory content Persistent memory feature is enabled by default This feature can be useful in many situations including e Analyzing kernel logs after a Linux kernel panic e Defining a particular memory region for the persistent storage of application specific data Analyzing Kernel Log Files after a Kernel Panic When a board that is running the Linux OS indicates a kernel panic issue a reset through the face plate button for example to analyze the cause then subsequently analyze kernel log files The persistent memory feature keeps the log files available in the memory To analyze the kernel log files 1 Issue areset 2 Connect to U Boot For more information see Accessing U Boot on page 109 3 Enter the following command to obtain memory addresses of the kernel log files Tocate kernel log 1 The memory addresses of any found kernel log files will be displayed 4 Enter the following command to display the kernel logfile at any of these memory addresses printf memory address gt The persistent memory is useful in application specific data storage The standard U Boot variable pram can be used to reserve a memory region at the end of the physical memory to prevent it from being overwritten U Boot reports less memory to the Linux kernel through the mem parameter indicating that the operating system should not use it either For more information see the U Boot documentation MVM
98. rogrammable machines UPMs Secure Digital Hub Controller SDHC The SDHC eSDHC provides an interface between the host system and the memory cards such as the MMC and SD It is compatible with the SD Host Controller Standard Specification Ver 2 0 and supports the following SD miniSD SD Combo MMC and RS MMC card Interface The MVME2500 ECC uses only one of the two independent I C buses on the processor For more information see 2 Devices on page 80 USB Interface The P20x0 implements a USB 2 0 compliant serial interface engine For more information see USB on page 79 MVME2500 ECC Installation and Use 6806800N30F 69 Functional Description 4 2 8 4 2 9 4 2 10 4 2 11 M 4 2 12 70 DUART The chipset provides two universal asynchronous receiver transmitter UART each of which acts independently of the other Fach UART is clocked by the CCB clock and is compatible with PC16522D As a full duplex interface it provides a 16 byte FIFO for both transmitter and receiver mode DMA Controller The DMA controller transfers blocks of data between the various interfaces and functional blocks of P20x0 that are independent of the e500 cores The P20x0 DMA controller has three high speed DMA channels all of which capable of complex data movement and advanced transaction chaining Enhanced Three Speed Ethernet Controller eTSEC The eTSEC controller of the device communicates to the 10 Mbps 100 Mbps
99. roll t ziii scel en aeri TEn o OE Rd e 123 7 4 12 Device Addressing 124 7 5 Ethernet PHY Address 124 7 6 Other Software Considerations 125 1 6 MRAM i ae VERE UR ute RU EPA UN enc ael idR FR 125 7 6 2 RealTime Glock au eet a 125 7 6 3 Quad oer eor anna an 125 7 6 4 LBCTiming Parameters 126 7 7 Glock Distribution auch CU CH Ie m 127 7 1 1 System Clock cesse xot been ER este 128 7 7 2 Real Time 24 2 2 129 7 7 3 Local Bus Controller Clock Divisor 129 A Replacing the Battery deu 131 Replacing the Battery 131 B Related Documentation u us nn 135 B 1 Artesyn Embedded Technologies Embedded Computing Documentation 135 B 2 Manufacturers Documents 135 B 3 Related Specifications 136 MVME2500 ECC Installation and Use 6806800N30F 7 Contents eee Safety
100. rollover time for the counter is 71 6 minutes Since the processor is 16 bits and the tick timer is 32 bits the compare register was split in half Accessing the whole register will require two transactions Table 5 23 Compare High Word Registers Tick Timer 0 Compare Value High Word OxFFC80204 Tick Timer 1 Compare Value High Word OxFFC80304 REG Tick Timer 2 Compare Value High Word OxFFC80404 E A ee EUN ELDER COR Field TickTimer Compare Value High Word 16 bits OPER R W RESET 0x0000 Table 5 24 Compare Low Word Registers Tick Timer 0 Compare Value Low Word OxFFC80206 Tick Timer 1 Compare Value Low Word OxFFC80306 REG Tick Timer 2 Compare Value Low Word OxFFC80406 TickTimer Compare Value Low Word 16 bits R W 0x0000 106 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 5 4 Counter High and Low Word Registers When enabled the tick timer counter register increments every microsecond Software may read or write the counter at any time Table 5 25 Counter High Word Registers Tick Timer 0 Counter Value High Word OxFFC80208 Tick Timer 1 Counter Value High Word OxFFC80308 REG Tick Timer 2 Counter Value High Word OxFFC80408 Ce a PUP EEE e Field TickTimer Counter Value High Word 16 bits OPER R W RESET 0x0000 Table 5 26 Counter Low Word Registers Tick
101. s each Each timer has four individual configuration registers and they cannot be cascaded together Watchdog Timer The onboard FPGA provides programmable 16 bit watchdog timers It has a 1 ms resolution and generates a board reset when the counter expires Interrupt is generated to the processor when this occurs Default value is 60 seconds FPGA Tick Timer The MVME2500 ECC supports three independent 32 bit timers that are implemented on the FPGA to provide fully programmable registers for the timers Ethernet Interfaces The MVME2500 ECC has three eTSEC controllers Each one supports and SGMII interface to the external PHY All controllers can only be untilized when using the RGMII interface Using the GMII allows only up to two usable controllers MVME2500 ECC provides two 10 100 1000 Ethernet interfaces on the front panel and another two are routed to the RTM through the backplane connector Due to controller limitations one controller is designed to be routed to the front panel or to the RTM This setting is possible by using a third party gigabit Ethernet LAN switch with a single enable switch such as PERICOM s P13L301D The routing direction can be configured through the on board dip switch Each Ethernet controller has a single dedicated Broadcom 546165 with integrated MAC and PHY The registers of the PHY can be accessed through the processor s two wire Ethernet management interface The front panel RJ45 conne
102. s not increment COC Clear Counter on Compare When the bit is set the counter is reset to 0 when it compares with the compare register When the bit is cleared the counter is not reset COVF Clear Overflow Bits The overflow counter is cleared when 1 is written to this bit OVF Overflow Bits are the output of the overflow counter It increments each time the tick timer sends an interrupt to the local bus interrupter The overflow counter can be cleared by writing a 1 to the COVF bit ENINT Enable Interrupt When the bit is set the interrupt is enabled When the bit is cleared the interrupt is not enabled CINT Clear Interrupt INTS Interrupt Status RSVD Reserved for future implementation MVME2500 ECC Installation and Use 6806800N30F 105 Memory Maps and Registers 5 5 3 Compare High and Low Word Registers The tick timer counter is compared to the Compare Register When the values are equal the tick timer interrupt is asserted and the overflow counter increments If the clear on compare mode is enable the counter is also cleared For periodic interrupts this equation should be used to calculate the compare value for a specific period T Compare register value T us When programming the tick timer for periodic interrupt the counter should be cleared to zero by software and then enabled If the counter does not initially start at zero the time to the first interrupt may be longer or shorter than expected Note that the
103. se 6806800N30F Table 3 14 JTAG Connector P6 continued Controls LEDs and Connectors Pi Signal Description 1 2 2 2 SCAN 2 TCK Signal Description n Pin 3 24 5 26 NC 3 3V FROM 5V 27 GND 28 SCAN 2 TDI 29 NC 30 NC 3 SCAN 3 TMS SCAN 3 TDI 1 32 37 38 SCAN 3 TCK1 SCAN 3 TCK 2 GND 39 SCAN 3 TRST 40 SCAN 3 TCK3 41 SCAN 4 1 42 SCAN 4 TMS SCAN 4 3 5 SCAN 4 TDO GND 44 GND 48 0 43 45 49 SCAN 4 TRST 51 SCAN 5 TMS 52 SCAN 5 53 SCAN 5 54 GND 5 3 3V 5 5 MVME2500 ECC Installation and Use 6806800N30F 5 56 7 SCAN 5 TDI 58 9 SCAN 5 TRST 60 SCAN5 TCK2 59 Controls LEDs and Connectors 3 4 2 5 3 4 2 6 60 COP Connector P6 The COP header is used for the CPU debug The pin assignment is dictated by Freescale and is compatible with the processor s debugging tool Table 3 15 COP Header P10 Signal Description COP QACK JTAG COP TRST n BR WN COP RUNSTOP Pulled UP 5 COP VDD SENSE b mes COP CHECK STOP IN 9 JTAG TMS 10 NC P2020 SW RESET COP PRESENT COP HARD RESET 14 KEYING 15 COP CHECK STOP OUT 16 GND SD Connector J2 Table 3 16 SD Connector J2 Pin Signal Description 1 DATA 3 MVME2500 ECC Installation and Use 6806800N30F Table 3 16 SD C
104. specific warnings elsewhere in this manual could result in personal injury or damage to the equipment Artesyn intends to provide all necessary information to install and handle the product in this manual Because of the complexity of this product and its various uses we do not guarantee that the given information is complete If you need additional information ask your Artesyn representative This product is a Safety Extra Low Voltage SELV device designed to meet the EN60950 1 requirements for Information Technology Equipment The use of the product in any other application may require safety evaluation specific to that application Only personnel trained by Artesyn or persons qualified in electronics or electrical engineering are authorized to install remove or maintain the product The information given in this manual is meantto complete the knowledge of a specialist and must not be used as replacement for qualified personnel Keep away from live circuits inside the equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided Contact your local Artesyn representative for service and repair to make sure that all safety features are m
105. tect disabled FLASH_WP_N SPI devices manual switch write protect status 1 Write protect disabled 0 Write protect enabled MVME2500 ECC Installation and Use 6806800N30F 97 Memory Maps and Registers 2 DEBUG EN I2C debug ports I2C 1 DandI2C 1 C enable 1 Drive Enabled 0 Drive Disabled SERIAL FLASH WP SPI devices write protect register 1 Write protect enabled 0 Write protect disabled I2C 1 D I2C debug port Data 2 DEBUG 0 HiZ Tri Stated I2C_DEBUG_EN 1 1 Driven High 0 Driven Low I2C_1_C I2C debug port Clock 12C_DEBUG_EN 0 HiZ Tri Stated I2C_DEBUG_EN 1 1 Driven High 0 Driven Low When SERIAL_FLASH_WP is set to Low this port will automatically read as low due to AND connection between the two ports 98 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 4 12 PLD Test Register 1 The MVME2500 ECC PLD provides an 8 bit general purpose read write register which can be used by the software for PLD testing or general status bit storage Table 5 14 PLD Test Register 1 REG PLD Test Register 1 OXFFDF0080 Field OPER R W RESET 00 Field Description TEST_REG1 General purpose 8 bit R W field 5 4 13 PLD Test Register 2 The MVME2500 ECC PLD provides an 8 bit general purpose read write register which can be used by the software for PLD testing or general status bit storage Table 5 15 PLD Test Register 2 PLD Test Reg
106. ters PLD Table 5 4 PLD Year Register REG PLD Year Register OXFFDF0004 PLD Month Register The MVME2500 ECC PLD provides an 8 bit register which contains the build month of the timers registers PLD Table 5 5 PLD Month Register REG PLD Year Register OXFFDF0005 MVME2500 ECC Installation and Use 6806800N30F Memory Maps and Registers 5 4 4 5 4 5 Table 5 5 PLD Month Register REG PLD Year Register OXFFDF0005 PLD Day Register MVME2500 ECC PLD provides an 8 bit register which contains the build day of the timers registers PLD Table 5 6 PLD Day Register REG PLD Revision Register OxFFDF0006 7 PLD Rev PLD Sequence Register The MVME2500 ECC PLD provides an 8 bit register which contains the sequence of the PLD which is in synchrony with the PCB version Table 5 7 PLD Sequence Register REG PLD Revision Register OxFFDF0007 w p B F P PE m p PLD Rev MVME2500 ECC Installation and Use 6806800N30F 91 Memory Maps and Registers 5 4 6 PLD Power Good Monitor Register The MVME2500 ECC PLD provides an 8 bit register which indicates the instantaneous status of the supply s power good signals Table 5 8 PLD Power Good Monitor Register Field Description PWR_V1P05_PWRGD PWR_V1P2_PWRGD PWR_V1P8_PWRGD PWR_V3P3_PWRGD PWR_V2P5_PWRGD PWR_V1P2_SW_PWRG D PWR_V1P5_PWRGD 92 1 05V Core supply power good
107. time in the content hereof without obligation of Artesyn to notify any person of such revision or changes Electronic versions of this material may be read online downloaded for personal use or referenced in another document as a URL to an Artesyn website The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without the permission of Artesyn It is possible that this publication may contain reference to or information about Artesyn products machines and programs programming or services that are not available in your country Such references or information must not be construed to mean that Artesyn intends to announce such Artesyn products programming or services in your country Limited and Restricted Rights Legend If the documentation contained herein is supplied directly or indirectly to the U S Government the following notice shall apply unless otherwise agreed to in writing by Artesyn Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph b 3 of the Rights in Technical Data clause at DFARS 252 227 7013 Nov 1995 and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252 227 7014 Jun 1995 Contact Address Artesyn Embedded Technologies Artesyn Embedded Technologies Marketing Communications Lilienthalstr 17 19 2900 S Diablo Way Suite 190 85579 Neubiberg Munich Tempe Ari
108. ty Requirements legal IEC 60950 1 2005 2nd Edition CAN CSA C22 2 No 60950 1 MVME2500 ECC Installation and Use 6806800N30F Introduction Table 1 2 Board Standard Compliances continued Standard Description FCC Part 15 Subpart B Class A non EMC requirements legal on system level residential predefined Artesyn system ICES 003 Class A non residential EMC Directive 89 336 EEC EN55022 Class B EN55024 AS NZS CISPR 22 Class A EN300386 ETSI EN 300 019 series Environmental Requirements Directive 2011 65 EU Directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment RoHS MVME2500 ECC Installation and Use 6806800N30F 23 Introduction Figure 1 3 24 Declaration of Conformity EC Declaration of Conformity According to EN 17050 1 2004 Manufacturer s Name Artesyn Embedded Technologies Embedded Computing Manufacturer s Address Zhongshan General Carton Box Factory Co Ltd No 62 Qi Guan Road West Shiqi District 528400 Zhongshan City Guangdong PRC Declares that the following product in accordance with the requirements of 2004 108 EC 2006 95 EC 2011 65 EU and their amending directives Product MVME2500 Series Single Board Computers Model Name Number MVME2500 01080101E MVME2500 01080101S MVME2500 0161 MVME2500 0163 MVME2500 0171 MVME2500 0173 MVME2500 02100202E MVME2500 02100202S MVME2500 02120201E MVME2500
109. ure on any surface before applying power Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life Before touching the board or electronic components make sure that you are working in an ESD safe environment Board Malfunction Switches marked as reserved might carry production related functions and can cause the board to malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation Installation Data Loss Powering down or removing a board before the operating system or other software running on the board has been properly shut down may cause corruption of data or file systems 140 MVME2500 ECC Installation and Use 6806800N30F Safety Notes Make sure all software is completely shut down before removing power from the board or removing the board from the chassis Product Damage Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction Product Damage Inserting or removing modules with power applied may result in damage to module components Before installing or removing additional devices or modules read the documentation that came with the product Cabling and Connectors
110. walter Besch digung des Blades Ein unsachgem er Einbau der Batterie kann gef hrliche Explosionen und Besch digungen des Blades zur Folge haben Verwenden Sie deshalb nur den Batterietyp der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung Datenverlust Wenn Sie die Batterie austauschen k nnen die Zeiteinstellungen verloren gehen Eine Backupversorgung verhindert den Datenverlust w hrend des Austauschs Wenn Sie die Batterie schnell austauschen bleiben die Zeiteinstellungen m glicherweise erhalten MVME2500 ECC Installation and Use 6806800N30F Sicherheitshinweise Datenverlust Wenn die Batterie wenig oder unzureichend mit Spannung versorgt wird wird der RTC initialisiert Tauschen Sie die Batterie aus bevor sieben Jahre tats chlicher Nutzung vergangen sind Sch den an der Platine oder dem Batteriehalter Wenn Sie die Batterie mit einem Schraubendreher entfernen k nnen die Platine oder der Batteriehalter besch digt werden Um Sch den zu vermeiden sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden Umweltschutz Entsorgen Sie alte Batterien und oder Blades Systemkomponenten RTMs stets gem der in Ihrem Land g ltigen Gesetzgebung wenn m glich immer umweltfreundlich MVME2500 ECC Installation and Use 6806800N30F 147 Sicherheitshinweise 148 MVME2500 ECC Installation and Use 6806800N30F A mS Y SAI r Eu EMBEDDED TEC
111. y 134 MVME2500 ECC Installation and Use 6806800N30F Appendix Related Documentation wwia 1 2 Artesyn Embedded Technologies Embedded Computing Documentation The publications listed below are referenced in this manual You can obtain electronic copies of Artesyn Embedded Technologies Embedded Computing publications by contacting your local Artesyn sales office For released products you can also visit our Web site for the latest copies of our product documentation 1 Goto www artesyn com computing 2 Under SUPPORT click TECHNICAL DOCUMENTATION 3 Under FILTER OPTIONS click the Document types drop down list box to select the type of document you are looking for 4 Inthe Search text box type the product name and click GO Table B 1 Artesyn Embedded Technologies Embedded Computing Publications Document Title Publication Number MVME7216 RTM Installation and Use 6806800M42C MVME7216 RTM Quick Start Guide 6806800M53A MVME7216 RTM Safety Notes 6806800M54A Manufacturers Documents For additional information refer to the following table for manufacturers data sheets or user manuals As an additional help a source for the listed document is provided Please note that while these sources have been verified the information is subject to change without notice Table B 2 Manufacturers Publications Company Document Freescale Freescale Semiconductor QorlQ P2020 Integrat
112. zona 85282 Germany Contents About this Manual aan ua 13 1 Introduction 19 y csc cent en ER Renee 19 1 2 Standard Compliances en ee ee a a 22 1 3 Mechanical Data an ek ea 25 1 4 Ordering Information 25 1 5 Product ide tificatiofii uus uses dr res ee a 27 2 Hardware Preparation and Installation 29 2 1 OVENIEW a een 29 2 2 Unpacking and Inspecting the Board 30 2 3 Requirements aT nea hee GEAR e aee 30 2 3 1 Environmental Requirements 31 2 3 2 PowerRed lremen s ier ee ses 32 2 3 3 Equipment 2 34 2 4 Configuring the Board 24 34 2 5 Installing Accessories ns ed er ea 35 2 5 1 Rear Transition 2 4 4 35 2 5 2 PMC XMC Support C E A 36 2 6 Installing Removing the 0 2 37 2 7 Completing the Installation 4 2 2 39 3 Controls LEDs and

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