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Evaluation Board User Guide

1. U6 VDD 002 GND VOA CFl DUT CE2 HAEADY VOB 13__ CF2 HREADY DIT e E CF3 HSCLK 9 VIC voc 12__ CF3 HSCLX DUT T 4 VID g VE2 5 e GND1 ADUM3401CRWZ DNL La AGND DGND 07 955 16 1 DGND mas 15 002 5 c 14 9 02 5 AGND s5 1 via Most ___ voB 5 SCLK 12 5 VOC VIC l6 o gt MISO HSD VID g VE VE u GND2 GND1 m e ADUM3401CRWZ DNI 0 1CF ADUM 250ARZ Figure 49 Isolation Circuitry Rev 0 Page 42 of 56 10385 049 MCU VDD TDO MCU RST R43 85111008 2 DGND 8 8 JTAG DEBUG INTERFACE PORT 2 Figure 50 JTAG Interface Port 28 54 71 96 13 42 84 10 12 19 u8 V o o al o o VREF 8888 888 toot 888 XTAL2 aaa RICX2 ER 5 5 5 P1 0 TXDO E SCL Iso RTOXI P1_1_ENET_TXD1 Q x RESET 4 TX 30 30 USB DN 8 CRS DGND 24 28 50
2. Figure 77 Layer 3 Rev 0 Page 52 of 56 eq 104 aav 431 95 quoa exp os Bi os o MI mi os 95 81 ohonoa os 81 Br es tanda EL gra Bo o 1 goo O o 1 5 8N2 8I 8M2 AI Q E 01 og Q O s 1 Q O ASAL E 5001 506 om Bra 180 00 100 00 aava 8T323A aanaa TUO o QNA o aea 92 aea 98 sod sear oon oon 8N2 8 AV Win OO OO m OO ole o O O s 1 i s 829 yy YOA38HNS32 GERI 32 Figure 78 Bottom Layer Rev 0 Page 53 of 56 se 3 SE oo g o 519 50 00 asa eog ong eath oon B 05258 ano Be cef ven g en ean 022 8 e ranam lo ama 9 o n 2321 30 lo
3. PHASE CURRENT JP3C JP5C 4 E1 C BFRG69157 152 BHRG69157 02 1 GRY ICP IN R13 R21 e 1 2 100 1K AGND ICN 1500 OHMS 100 IR JP4C JP6C ICN g 679 69157 122 BERG69157 702 Figure 68 Phase C Current R28 PHASS C VOLTAGE 1MEG D GRY R31 1K TO eo LD 7 22 AGND E amp C 5 V Sal Bi 3PIN JUMPER TH 9 5 oce N N 825 m USUS JP8C Fi i 3 gt SOLDF3 8 Figure 69 Phase C Voltage Rev 0 Page 49 of 56 10385 068 PS CONNECTIONS DUT 1 RED VDD C1 10UF C2 C 1UF VDD AGND ANALOG SUPPLY DAvoD 1 GRY AVZD E S SFS E 5 I DIGITAL SUPPLY 1 ISO SUPPLY DUT SIDE vop2 180 sXI Iz o o 3PIN 1 DVD2 10385 070 Figure 70 Power Supply Connections REFERENCE DECOUPLING AND EXTERNAL REF ADR280ARTZ M XREF XREF REF REF VoD 1 GRY is 2 1 1 V VO 2 5 o l V RG69157 2 BE3G69157 02 2 E e AGND PLACE C35 C3 AS CLOSE TO DUT PIN 17 AS POSSIBLE Figure 71 Reference Voltage Circuit VDD lt 6 RESETB Figure 72 ADE7880 Reset Circuit Rev 0 Page 50 of 56 10385
4. 881 0 80 3012 0232 i Groots 021 132 021 132 o o o o 1 10385 078 ORDERING INFORMATION BILL OF MATERIALS Table 34 Designator Description Manufacturer Part Number 1 Al IC 1 2 V ultralow power high PSRR voltage reference Analog Devices ADR280ARTZ 1 A2 IC swappable dual isolator Analog Devices ADuM1250ARZ 10 AGND1 to AGND10 Connector PCB test point black COMPONENTS_CORPORATION TP 104 01 00 30 IAN IAP IBN Connector PCB test point grey ICN ICP INN INP PMO REF VAP VBP VCP AVDD DVDD XREF CLKIN IRQO IRQ1 CLKOUT RESET SS HSA MISO HSD MOSI SDA SCLK SCL CF3 HSCLK CF2 HREADY COMPONENTS CORPORATION TP 104 01 08 5 C1 C8 C61 C62 C64 Capacitor monolithic ceramic 10 uF Murata GRM21BR61C106KE15L 20 C9 to C28 Capacitor ceramic chip COG 0603 2 2 nF TDK C1608C0G1H222J 27 C2 C7 C33 to C35 C37 Capacitor X7R 0805 100 nF C38 C40 to C46 C48 to C60 Murata GRM21BR71H104KA01L 4 C29 C30 C65 C66 Capacitor monolithic ceramic COG 0402 20 pF Murata GRM1555C1H200JZ01D 3 C3 C5 C36 Capacitor ceramic 0805 X5R 4 7 Taiyo Yuden EMK212BJ475KG T 3 C32 C67 C68 Capacitor ceramic 1206 X7R 1 Taiyo Yuden GMK316B7105KL T 2 C4 C6 Capacitor ceramic X7R 0 22 uF Phycomp Yageo 2222 780 15654
5. oe RAL R42 CR5 a Figure 75 Layer Layer Rev 0 Page 51 of 56 RESB CTRL PML_CTRL cra 150 cre 150 67 R75 EE 1_150 MCU 10385 075 Evaluation Board User Guide Figure 76 Layer 2
6. T P12 FILTER NETWORK ADE7880 DIGITAL INP ISOLATORS P15 OPTIONAL EXTERNAL OPTIONAL 1 2 REFERENCE ADR280 EXTERNAL C CONNECTOR TO PC COM PORT FILTER NETWORK AND ATTENUATION JTAG INTERFACE P5 ee olo Pezlele s ele J2 5 VN GND VCP GND VBP GND VAP GND 2 1 10385 001 1 Rev 0 Page of 56 EVALUATION BOARD HARDWARE POWER SUPPLIES The evaluation board has two power domains one domain supplies the microcontroller and one side of the isocouplers and one domain supplies the other side of the isocouplers and the ADE7880 The ground of the microcontrollers power domain is connected to the ground of the PC through the USB cable The ground of the ADE7880 power domain is determined by the ground of the phase voltages VAP VBP VCP and VN and must be different from the ground of the microcontroller s power domain The microcontroller 3 3 V supply is provided by the PC through the USB cable Alternatively if Jumper JP24 is connected between Pin 1 and Pin 2 the 3 3 V supply can be provided at the P12 connector The ADE7880 3 3 V supply is provided at the P9 connector Ensure that Jumper JP11 is connected between Pin 1 and Pin 2 to ensure the same 3 3 V supply from the ADE7880 is also provided at the isocouplers ANALOG INPUTS P1 TO P4 AND P5 TO P8 Current and voltage signals are connected at the screw terminals P1to P4 an
7. 4 M number of bytes to be read from the address above M can be 1 2 4 or 6 Table 14 Data Read Answer from the Microcontroller to the PC Byte Description 0 0x52 1 MSB of the address 2 LSB of the address 3 Byte 5 Byte 3 Byte 1 or Byte 0 MSB read at the location indicated by the address The location may contain 6 4 2 or 1 byte The content is transmitted MSB first 4 Byte 4 or Byte 2 or Byte O 5 Byte 3 or Byte 1 6 Byte 2 or Byte O 7 Byte 1 8 Byte 0 Rev 0 Page 26 of 56 Table 15 Interrupt Setup Message from the PC to the Microcontroller Byte Description 0 J 0x4A 1 8 number of bytes transmitted after this byte 2 MSB of the MASK1 31 0 or MASKO 31 0 register 3 LSB of the MASK1 31 0 or MASKO 31 0 register 4 Byte 3 of the desired value of the MASKO 31 0 or MASK1 31 0 register 5 Byte 2 6 Byte 1 7 Byte 0 8 Timeout byte time the MCU must wait for the interrupt to be triggered It is measured in 3 sec increments Timeout byte 0 means that timeout is disabled 9 IRQ timer time the MCU leaves the IROx pin low before writing back to clear the interrupt flag It is measured in 10 ms increments Timer 0 means that timeout is disabled Table 16 Interrupt Setup Message from the Microcontroller to the PC Byte Description 0 R 0x52 1 Byte 3 of the STATUSO 31 0 or STATUS1 31 0 register If the progr
8. ByteO 38 Byte 1 of M Mis a 16 bit number The number of 32 bit samples acquired by the microcontroller is 2 x M 4 1 x 67 per channel 39 Byte 0 of M Rev 0 Page 29 of 56 After receiving the command the microcontroller enables the HSDC port and acquires 67 x 7 x 4 1876 bytes into BUFFERO As soon as BUFFERO is filled data is acquired in BUFFERI equal in size to BUFFERO while 2 x 3 x 67 402 bytes 134 24 bit words from BUFFERO are transmitted to the PC As soon as BUFFERI is filled data is acquired into BUFFERO while 402 bytes from BUFFERI are transmitted to the PC Only the least significant 24 bits of every 32 bit instantaneous value are sent to the PC to decrease the size of the buffer sent to the PC The most significant eight bits are only an extension of a 24 bit signed word therefore no information is lost The protocol used by the microcontroller to send data to the PC is shown in Table 21 Table 21 Acquire HSDC Data Continuously Answer from the Microcontroller to the PC Byte Description 0 0 52 1 Byte 2 MSB of Word 1 2 Byte 1 of Word 1 3 Byte 0 LSB of Word 1 4 Byte 2 MSB of Word 2 5 Byte 1 MSB of Word 2 402 Byte 0 LSB of Word 134 STARTING THE ADE7880 DSP This function orders the microcontroller to start the DSP The microcontroller writes to the run register with 0 1 Table 22 Start ADE7880 DSP Message from the PC to the Microcontroller Byte
9. PHASE B CURRENT SIGNAL COMING FROM ADC PHASE CURRENT SIGNAL COMING FROM ADC ADE7880 eval software lvproj My Computer lt lt 10385 023 Figure 23 Mean Absolute Value Current Panel RMS Voltage When RMS Voltage is selected on the Front Panel the Voltage RMS panel is opened see Figure 24 This panel is very similar to the Current RMS panel Clicking the Read Setup button executes a read of the xVRMSOS 23 0 and xVRMS 23 0 registers Clicking Write Setup writes the xVRMSOS 23 0 registers into the ADE7880 The Start Digital Signal Processor button manage the Run 15 0 register When the Read xVRMS registers button is clicked the xVRMS 23 0 registers are read 500 consecutive times and the average is displayed The operation is repeated until the button is clicked again Note that the ZXVA ZXVB and ZXVC zero crossing interrupts are not used in this case because they are disabled when the voltages go below 1096 of full scale This allows rms voltage registers to be read even when the phase voltages are very low 6 LPF PHASE A EE VOLTAGE SIGNAL T FROM HPF B DI _ R INTEGRATOR F ENABLED 10385 024 Figure 24 Voltage RMS Panel Power Quality The Power Quality panel is accessible from the Front Panel and is divided into two parts see Figure 25 The lower part displays registers that manage the power quality measurement functions for the Active Measurement
10. All Registers Access The Registers Access panel is accessible from the Front Panel and provides read write access to all ADE7880 registers Because there are many registers the panel scrolls up and down and has multiple read write and exit buttons see Figure 33 and Figure 34 The registers are listed in columns in alphabetical order starting at the upper left The panel also allows you to save all control registers into a data file by clicking the Save AII Regs into a file button By clicking the Load Regs from a file button you can load all control registers from a data file Then by clicking the Write Regs button you can load these values into the ADE7880 Registers STATUSO and STATUSI are also written so interrupt status flags can be cleared and IRQO and IRQI lines brought high The order in which the registers are stored in a file is shown in the Control Registers Data File section om Ee a ___ OMEN cum Es ___ S Figure 34 Panel Giving Access to All ADE7880 Registers 2 Quick Startup The Quick Startup panel is accessible from the Front Panel and can be used to rapidly initialize a 3 phase meter see Figure 35 Rev 0 Page 21 of 56 10385 033 10385 034 psm quick startup vi Est yew Project Qnerme Toss Window t dotal ntagraters There 5 one bk that enables dsables the ntegraters the that enab
11. Rev 0 Page 10 of 56 VOLTAGE SOURCE JP24 CLOSED BETWEEN PIN 2 AND PIN 3 JP11 CLOSED BETWEEN PIN 2 AND PIN 1 USB CABLE CONNECTED BETWEEN THE BOARD gm AND PC 8 PHASEC PHASE B V PHASE A P4 A IAP 2 IAP JP1A JP2A OPEN mr j IAN 2 JP4A CLOSED 9 i IAN JP5A JP6A OPEN P2 2 IBP JP1B JP2B OPEN 4 j IBN gt CLOSED 5 IBN JP5B JP6B OPEN P3 o 2 ICP JP1C JP2C OPEN mr 3 ICN JP3C JP4C CLOSED 2 ICN JP5C JP6C OPEN e P4 INP JP1N JP2N CLOSED INP INN 2 1 gt JP3N CLOSED l INN JP5N JP6N CLOSED P8 R26 o VAP JP7A UNCONNECTED SOLDERED Q g BETWEEN PIN 2 AND PIN 1 4 JP9A CLOSED P7 CONNECTED VBP VBP BETWEEN PIN 2 AND PIN 3 JP8B SOLDERED BETWEEN PIN 2 AND PIN 1 JP9B CLOSED P6 R28 i VCP o VP UNCONNECTED JP8C SOLDERED Q BETWEEN PIN 2 AND PIN 1 9 CLOSED LOAD E R25 VN VN gt JP7N UNCONNECTED s o 8 4 Figure 7 Typical Setup for the ADE7880 Evaluation Board for 3 Phase 3 Wire Delta Distribution Systems Rev 0 Page 11 of 56 EVALUATION BOARD SOFTWARE The ADE7880 evaluation board is supported by
12. register that is used to access PSM2 low power mode see Figure 36 You can edit the LPOIL 2 0 and LPLINE 4 0 bits The value shown in the LPOILVL 7 0 register is composed from these bits and then displayed Note that you cannot write a value into the register by writing a value in the LPOILVL 7 0 register box psm0 psm2 settings vi Edit View Project Operate Tools Window Help 10385 036 7880 eval software lvproj My Computer Figure 36 PSM2 Settings Panel PSM1 MODE Enter PSM1 Mode When Enter PSM1 mode is selected on the Front Panel the microcontroller manipulates the and pins of the ADE7880 to switch the ADE7880 into PSM1 reduced power mode The submenu then allows access only to the Mean Absolute Value Current function because this is the only ADE7880 functionality available in this reduced power mode see Figure 37 Rev 0 Page 22 of 56 DER File Edit View Project Operate Tools Window Help 2 Please choose the COM port ADE78xx Eval Board is in use by ADE78xx eval board connected at port 8 wi Please select serial communication activated on ADE78XX eval board Configure Communication Total Active Power Harmonic Calculations Fundamental Active Power Fundamental Reactive Power Apparent Power RMS Current Mean Absolute Value Current Enter PSM2 mode
13. together with the active reactive and apparent powers the power factor and harmonic distortion on each harmonic for all phases Total harmonic distortion THD is computed for all currents and voltages This user guide describes the ADE7880 evaluation kit hardware firmware and software functionality The evaluation board contains an ADE7880 and an LPC2368 microcontroller from NXP Semiconductors The ADE7880 and its associated metering components are optically isolated from the microcontroller The microcontroller communicates with the PC using a USB interface The ADE7880 evaluation board and this user guide together with the ADE7880 data sheet provide a complete evaluation platform for the ADE7880 The evaluation board has been designed so that the ADE7880 can be evaluated as an energy meter Using appropriate current transducers the evaluation board can be connected to a test bench or high voltage 240 V rms test circuit On board resistor divider networks provide the attenuation for the line voltages This user guide describes how the current transducers should be connected for the best performance The evaluation board requires two power supplies one external supply of 3 3 V and one supply provided by connecting a USB cable between a PC and the board Appropriate current transducers are also required Rev 0 Page 1 of 56 TABLE CONTENTS dedu uut ETE MUI 1 GeneralDescriptioDusna ceti dites ettet 1 Revisiori
14. 072 4 70 10385 071 R81 P15 AAA MCU VDD 1 10K RXD 2 TXD 3 4 DGND E SAMTECTSW 0608GS4PIN UART 8 Figure 73 UART Circuit USB INTERFACE D IS gt P14 27 2 1 vBUS 3 D MC RIS D 6 VBUS 5V CR6 R76 R66 E UP al MCU VDD VV KI A 680 1 5K GND SEIELD D D VREF MCU WITH GND FROM CONN TO MCU Figure 74 USB Interface LAYOUT VDD F AGND 1B SMB IBP IAN IA SMB lo P9 150 VDD VDD AGNDS ADE7880 LFCSP EVAL Z 10385 074 32 000000000600000090 000000900000000 25 PRIMARY SIDE 08 031887 REV B DVDD RESETB g AGNDS 14 3 2 33 90 0 1201 Lspr 5
15. CF3 and line accumulation buttons are clicked in the Read Energy Registers panel It is recommended that a timeout always be used when dealing with interrupts By default the timeout is set to 10 indicating a 30 sec timeout and the timer is set to 0 indicating that the STATUSx 31 0 and energy registers are read immediately after the IRQO pin goes low When clicked on the Front Panel the Fundamental Active Power and Fundamental Reactive Power buttons open panels that are very similar to the Total Active Power panel These panels are shown in Figure 15 and Figure 16 10385 015 10385 016 Figure 16 Fundamental Reactive Power Panel Harmonic Calculations When Harmonic Calculations is selected on the Front Panel the panel shown in Figure 17 is opened The panel is divided into two parts The upper half provides status information buttons to read and write registers related to the harmonic calculations and the Exit button The lower half contains harmonic calculations windows divided for each phase and neutral current The phase used as the time base for the harmonic calculations is selected by the button on the upper left side of the panel Bits 9 8 ACTPHSEL in the HCONFIG register are managed through this button The harmonic indexes status window indicates what phase is under analysis and what harmonic indexes have been set into HX HY and HZ registers The ADE7880 status window indicates the power mode
16. Description 0 Ox4E 1 number of bytes transmitted after this byte 1 2 Any byte Table 23 Start ADE7880 DSP Answer from the Microcontroller to the PC Byte Description 0 0x52 1 OX7E to acknowledge that the operation was successful STOPPING THE ADE7880 DSP This function orders the microcontroller to stop the DSP The microcontroller writes to the run register with 0 0 Table 24 Stop ADE7880 DSP Message from the PC to the Microcontroller Byte Description 0 0 4 1 number of bytes transmitted after this byte 1 2 Any byte Table 25 Stop ADE7880 DSP Answer from the Microcontroller to the PC Byte Description 0 R 0x52 1 Ox7E to acknowledge that the operation was successful Table 26 Harmonic Calculations Management Message from the PC to the Microcontroller Byte Description 0x53 number of bytes transmitted after this byte 7 MS Byte 3 of the number of samples samples Byte 2 of the number of samples samples Byte 1 of the number of samples samples LS Byte 0 of the number of samples N samples o Rev 0 Page 30 56 Byte Description 6 Phase A Phase B or Phase C variables under analysis 0 VRMS IRMS 1 2 WATT and VAR 2 VA and 3 VHD and IHD Neutral current and ISUMHD and 7 MS byte of HCONFIG 8 LS byte of HCONFIG SUM variables und
17. EXT 117 HSCLK EXT d F2 HREADY EXT B CFl EXT a A 150 M T 0 150 to RESB CTRL e t CTRL RST HSCLK SAMTSW 30 C8 GD WHETIONLNOO 5 10385 055 Figure 55 Interface Header When MCU is Bypassed POWER SUPPLY DECOUPLING MCU CIRCUIT VIDA PIN 10 PIN 12 oN 19 0 1UF L 0 1UF 0 1UF C60 PLACE CAPS AS CLOSE TO DESIGNATED PIN AS POSSIBLE Figure 56 Power Supply Decoupling MCU POWER SUPPLY SELECT P12 Gm EXT VOD 2 5 USB VDO reet mek DGND 24 JUMPER TH USB POWERED EXT CONN P12 Figure 57 MCU Power Supply Selection Rev 0 Page 45 of 56 MCU VDD 1 RED MCU VDD 10385 057 0 1UF 10385 056 MCU POWER SUPPLY FROM USB 5V 3 3V JP22 ADP1713AUJZ 3 3 R7 VBUS e 1 IN JP23 0 T 3 OUT 1 SB VDD 0 28 BYP GND 2 5 9 ug 315 O a Am 822 8 DGND 5 Figure 58 Power Supply Regulator TOGGLE SWITCHES MCU 2 SDENB MCU VDD
18. Figure 63 Output LED Circuit Rev 0 Page 47 of 56 10385 063 VN 10385 062 PEASE CURRENT 7 JP3A JP5A e A a o IAP E1A 569157 102 269121 102 1 GRY IA IN R9 R17 1 2 VNAVM 100 1K 1500 5 2 Ep S Ls z S P1 1 M c3 e wu x ae AGND AGND WETTANT S 16 2253 b c aC 22 o 2 DNI 5 4 1 72 4 RIY eS RIS o IAN IN 100 1 1 GRY 1500 5 JP4A JP6A IAN c o 2 e 5 o BE2G69157 102 69151 102 Figure 64 Phase A Current R26 PHASE A VOLTAGE Pe VAP 1500 OHMS z AGND 5 E ele OT 9 AGND 3PIN JUMPER TH S VN AGND Oo o SOLDER JUMPER Figure 65 Phase A Voltage PHASE B CURRENT JP3B 47 So D E1B BERG69157 102 BERG69157 162 1 GRY IBP_IN R11 R19 IDE E _ 1900 5 E E a RC gijm OS DUE er B AGND AGND AGND Ju z 5 E2B 5 1 2 IBN IN 1500 OHMS 55 69157 202 353269151 102 Figure 66 Phase B Current Rev 0 Page 48 of 56 10385 064 10385 065 10385 066 PEASE B VOLTAGE 1500 OEMS Figure 67 Phase B Voltage VBP 102 69157 BE 10385 067
19. History ee tette rete ren eere 2 Evaluation Board Connection Diagram sss 3 Evaluation Board Hardware see 4 Power Supplies oU ERU e 4 Analog Inputs P1 to and P5 to 8 4 Setting Up the Evaluation Board as an Energy Meter 9 Evaluation Board Software seen 12 Installing and Uninstalling the ADE7880 Software 12 Front Panel eee RR RA HR 12 5 Mode Normal Power Mode sss 13 PSM1 Mode PSM2 Mode REVISION HISTORY 2 12 Revision 0 Initial Version Mode 24 Managing the Communication Protocol Between the Microcontroller and the ADE7880 sse 25 Acquiring HSDC Data Continuously sss 28 Starting the ADE7880 DSP sse 30 Stopping the ADE7880 DSP sse 30 Upgrading Microcontroller Firmware eee 35 Control Registers Data File sse 36 Evaluation Board Schematics and 38 Schematic cte p ERU RIDERE 38 ieu 51 Ordering Informati Nissisen 54 tre retinentes 54 Rev 0 Page 2 of 56 EVALUATION BOARD CONNECTION DIAGRAM VDD GND IBN IBP IAN IAP VDD2 GND2 2 rz eje ele e _ i 4 MCU_GND
20. One is supplied by the PC through the USB cable and is used for the NXP LPC2368 and one side of the isocouplers The other is an external 3 3 V supply used for the ADE7880 domain and the other side of the isocouplers Because the two domains are isolated to ensure that there is no electrical connection between the high voltage test circuit and the control circuit the external power supply should have floating voltage outputs Figure 7 shows a setup for the ADE7880 evaluation board as an energy meter for a 3 phase 3 wire delta distribution system The Phase B voltage is used as a reference and the VN pin of the ADE7880 is connected to it The evaluation board is connected to the PC using a USB cable supplied with the board When the evaluation board is connected to the PC the enumeration process begins The PC recognizes new hardware and asks to install the appropriate driver The driver can be found in the VirCOM Driver XP folder on the CD for a Windows PC in the VirCom Driver 7 64bit for a Windows 7 64 bit PC After the driver is installed the supplied evaluation software can be started The Evaluation Board Software section describes the ADE7880 evaluation software in detail and how it can be installed and uninstalled Activating Serial Communication Between the ADE7880 and the NXP LPC2368 The ADE7880 evaluation board provides communication between the ADE7880 and the NXP LPC2368 that is set through the SPI ports The
21. Panel Figure 26 Neutral Current Mismatch Panel When the WAIT FOR INTERRUPTS button is clicked the interrupts that you enabled in the MASK1 31 0 register are monitored When the IRQ pin goes low STATUS1 31 0 register is read and its bits are displayed The ISUM 27 0 PHSTATUS 15 0 IPEAK 31 0 VPEAK 31 0 ANGLEO 15 0 ANGLEI 15 0 and ANGLE2 15 0 registers are also read and displayed A timeout should be introduced in 3 sec increments to ensure that the program does not wait indefinitely for interrupts A timer in 10 ms increments is provided to allow reading of the registers with a delay from the moment that the interrupt is triggered The Active Measurement Zero Crossing button provides access to the Zero Crossing Neutral Current Mismatch Overvoltage and Overcurrent Measurements Peak Detection Sag Detection Panel and Time Intervals Between Phases panels see Figure 25 through Figure 30 10385 027 The line frequency is computed using the xPERIOD 15 0 register based on the following formula _ 256 000 Period The cosine of the ANGLEO 15 0 ANGLE1 15 0 and ANGLE2 15 0 measurements is computed using the following formula Hz cos ANGLEx ANGLES 256 000 10385 028 Figure 28 Peak Detection Panel Rev 0 Page 19 of 56 Evaluation Board User Guide 10385 029 10385 030 Figure 30 Time Intervals Between Phases Panel Waveform Sampling The Waveform
22. R32 when JP7A is unconnected Use this configuration when using a high voltage signal source in the VAP data path in 3 phase 4 wire and 3 phase 3 wire configurations Open Disables the resistor divider composed by R26 R29 and R32 when JP7A is closed between Pin 1 and Pin 2 Use this configuration when using a low voltage signal source in the VAP data path JP9B Closed default Enables the resistor divider composed by R27 R30 and R33 when JP7B is unconnected Use this configuration when using a high voltage signal source in the VBP data path in 3 phase 4 wire and 3 phase 3 wire configurations Open Disables the resistor divider composed by R27 R30 and R33 when JP7B is closed between Pin 1 and Pin 2 Use this configuration when using a low voltage signal source in the VBP data path JP9C Closed default Enables the resistor divider composed by R28 R31 and R34 when JP7C is unconnected Use this configuration when using a high voltage signal source in the VCP data path in 3 phase 4 wire and 3 phase 3 wire configurations Open Disables the resistor divider composed by R28 R31 and R34 when JP7C is closed between Pin 1 and Pin 2 Use this configuration when using a low voltage signal source in the VCP data path JP10 Soldered between Pin Connects the on board 16 384 MHz crystal Y1 to the CLKIN pin of the ADE7880 Use this 2 and Pin 1 default configuration when Crystal Y1 is used as the clock source for the ADE7880 Soldere
23. Sampling panel see Figure 31 is accessible from the Front Panel and uses the HSDC port to acquire data from the ADE7880 and display it It can be accessed only if the communication between the ADE7880 and the NXP LPC2368 is through the I C interface See the Activating Serial Communication Between the ADE7880 and the NXP LPC2368section for details on how to set PC communication on the ADE7880 evaluation board Psm0_cont_waveform_sampling vi fex GS Yew peet Queste gt jew 10385 031 Figure 31 Waveform Sampling Panel The HSDC transmits data to the NXP LPC2368 at 4 MHz because this is the maximum speed at which the slave SPI of the NXP LPC2368 can receive data The panel contains some switches that must be set before acquiring data e One switch chooses the quantities that are displayed phase currents and voltages or phase powers For every set of quantities only one can be acquired at a time This choice is made using the Select Waveform button e second switch allows acquired data to be stored in files for further use This switch is set with the Write waveforms to file No writing to files button e The acquisition time should also be set before an acquisi tion is initiated By default this time is 150 ms but any value in milliseconds can be introduced The NXP LPC2368 executes three tasks in real time using the ping pong buffer method continuously receiving data from HSDC storing the
24. Windows based software that allows the user to access all the functionality of the ADE7880 The software communicates with the NXP LPC2368 microcontroller using the USB as a virtual COM port The NXP LPC2368 communicates with the ADE7880 to process the requests that are sent from the PC INSTALLING AND UNINSTALLING THE ADE7880 SOFTWARE The ADE7880 software is supplied on one CD ROM It contains two projects one that represents the NXP LPC2368 project and one LabVIEW based program that runs on the PC The NXP LPC2368 project is already loaded into the processor but the LabVIEW based program must be installed 1 To install the ADE7880 software place the CD ROM the CD ROM reader and double click LabView project installation files Wetup exe This launches the setup program that automatically installs all the software components including the uninstall program and creates the required directories 2 launch the software go to the Start Programs ADE7880 Eval Software menu and click ADE7880 Eval Software Both the ADE7880 evaluation software program and the LabVIEW run time engine are easily uninstalled using the Add Remove Programs option in the Control Panel l Before installing a new version of the ADE7880 evaluation software first uninstall the previous version 2 Select the Add Remove Programs option in the Windows Control Panel 3 Select the program to uninstall and click the Add Remove button FRONT PANE
25. data into its USB memory and sending the data to the PC Transmitting seven phase currents and voltages at 4 MHz takes 103 25 us which is less than 125 us therefore the HSDC update rate is 8 kHz HSDC_CFG 0x0F Transmitting nine phase powers takes 72 us again less than 125 us therefore the HSDC update rate is also 8 kHz HSDC 0x11 To start the acquisition click the ACQUIRE DATA button The data is displayed on one plot If you click the Write waveforms to file No writing to files switch to enable the writing of waveforms to a file the program asks for the name and location of the files before storing the waveform Rev 0 Page 20 of 56 Evaluation Board User Guide Checksum Register The Checksum Register panel is accessible from the Front Panel and provides access to all ADE7880 registers that are used to compute the CHECKSUM 31 0 register see Figure 32 You can read write the values of these registers by clicking the Read and Write buttons The LabVIEW program calculates the value of the CHECKSUM 31 0 register and displays it whenever one of the registers is changed When the Read button is clicked the registers are read and the CHECKSUM 31 0 register is read and its values displayed This allows you to compare the value of the CHECKSUM 31 0 register calculated by LabVIEW with the value read from the ADE7880 The values should always be identical 10385 032 Figure 32 Checksum Register Panel
26. data path Open default Enables the phase antialiasing filter composed by R18 and C18 in the IAN data path JP6B Closed Disables the phase antialiasing filter composed by R20 and C20 in the IBN data path Open default Enables the phase antialiasing filter composed by R20 and C20 in the IBN data path JP6C Closed Disables the phase antialiasing filter composed by R22 and C22 in the ICN data path Open default Enables the phase antialiasing filter composed by R22 and C22 in the ICN data path JP6N Closed Disables the phase antialiasing filter composed by R24 and C24 in the INN data path Open default Enables the phase antialiasing filter composed by R24 and C24 in the INN data path JP7A Closed between Pin 2 Disables the resistor divider composed by R26 R29 and R32 when JP9A is open Use this and Pin 1 configuration when using a low voltage signal source in the VAP data path Closed between Pin 2 Connects the VAP pin of the ADE7880 to AGND Use this configuration when no signal source is and Pin 3 desired in the VAP data path Unconnected default Enables the resistor divider composed by R26 R29 and R32 when JP9A is closed Use this configuration when using a high voltage signal source in the VAP data path in 3 phase 4 wire and 3 phase 3 wire configurations JP7B Closed between Pin 2 Disables the resistor divider composed by R27 R30 and R33 when JP9B is open Use this and Pin 1 configuration when using a low voltage sig
27. is monitored the F components are set to 0 Bits 3 0 identify the fundamental component to monitor 0 2 no fundamental component to monitor 1 FVRMS 2 FIRMS 3 FWATT 4 FVAR 5 FVA 6 7 8 ITHDN Bits 7 4 identify the HX component to monitor 0 no HX component to monitor 1 HXVRMS 2 HXIRMS 3 HXWATT In neutral current case this option is reserved 4 HXVAR In neutral current case this option is reserved 5 HXVA In neutral current case this option is reserved 6 HXPF In neutral current case this option is reserved 7 8 HXIHD 3 Byte identifying the HY and HZ components to monitor Bits 3 0 identify the HY component to monitor 0 2 no HY component to monitor 1 HYVRMS 2 HYIRMS 3 HYWATT In neutral current case this option is reserved 4 HYVAR In neutral current case this option is reserved 5 HYVA In neutral current case this option is reserved 6 HYPF In neutral current case this option is reserved 7 HYVHD 8 HYIHD Bits 7 4 identify the HZ component to monitor 0 no HZ component to monitor 1 HZVRMS 2 HZIRMS 3 HZWATT In neutral current case this option is reserved 4 HZVAR In neutral current case this option is reserved 5 HZVA In neutral current case this option is reserved 6 HZPF In neutral current case this option is reserved 7 HZVHD 8 HZIHD Byte equal to the LS byt
28. register are common to all data paths independent of the phase shown When these registers are updated all the values in all data paths are updated Bit 0 HPFEN of the CONFIG3 7 0 register is included twice in the data path but only the bit value from the current data path is written into the ADE7880 All the other instances take this value directly 1 Click the Read Configuration button to read all ADE7880 registers that manage the total active power Registers from the inactive data paths are also read and updated 2 Click the Write Configuration button to write all registers that manage the total active power into the ADE7880 Registers from the inactive data paths are also written The ADET7880 status box shows the power mode that the ADE7880 is in it should always be PSMO in this window the active serial port and the CHECKSUM 31 0 register After every read and write operation the CHECKSUM 31 0 register is read and displayed 3 Click the CFx Configuration button to open a new panel see Figure 13 This panel gives access to all bits and registers that configure the CF1 CF2 and CF3 outputs of the ADE7880 The Read Setup and Write Setup buttons update and display the CF1 CF2 and output values 9220 Please select Sum of Phase Apparent Powers at CF1 pn Sum of Fundamental Phase Actve Powers at pn Sum of Fundamental Phase Resctve Powers at CF1 pin 5 3 CF2SEL ef CFMOGE 15 0 Please sele
29. the ADE7880 the constant n WTHR VARTHR VATHR VLEVEL and VNOM After these values are calculated you can overwrite these values You can also click the Update Registers button to cause the program to do the following e Initialize the gain CFIDEN CF2DEN CF3DEN WTHR VARTHR VATHR VLEVEL and VNOM registers e Enable the CF1 pin to provide a signal proportional to the total active power the CF2 pin to provide a signal proportional to the fundamental reactive power and the pin to provide a signal proportional to the apparent power e Select the state of Bit 14 SELFRQ in the COMPMODE register based on the nominal line frequency fn e Enable disable the digital integrators in the phase and neutral current data paths by setting the Bit 0 INTEN of the CONFIG register and Bit 3 ININTEN ofthe CONFIGS register accordingly At this point the evaluation board is set up as a 3 phase meter and calibration can be executed To store the register initializa tions click the Save Regs into file button in the Registers Access panel see Figure 33 After the board is powered down and then powered up again the registers can be loaded into the ADE7880 by loading the contents of the data file To do this click the Load Regs from a file button in the Registers Access panel PSM2 Settings The PSM2 Settings panel which is accessible from the Front Panel provides access to the LPOILVL 7 0
30. the HX HY or HZ registers Type a number between 1 and 63 into the HX HY or HZ window set HPGAIN the harmonic power gain register the offset registers HX HY HZWATTOS HX HY HZVAROS HX HY HZIRMSOS and HX HY HZVRMSOS and then click the Write button Then press Read button to read back the values of the registers together with the harmonic calculations results related to the panel HX HY HZWATT HX HY HZVAR HX HY HZIRMS HX HY HZVRMS HX HY HZVA HX HY HZPF HX HY HZIHD HX HY HZVHD Figure 19 shows the Phase A Harmonic X panel Note that the neutral current selection does not have a panel to manage the fundamental information As for neutral current the fundamental information is managed through the HX HY or HZ registers Set one of these registers to 1 to analyze the fundamental information related to neutral current and the sum of the phase currents Rev 0 Page 16 of 56 mema Pent movie rumen emere rts 10385 019 Figure 19 Phase A Harmonic X Panel Each phase and neutral has a panel called Real Time Monitoring see Figure 20 This panel allows the user to monitor up to four ADE7880 harmonic calculation outputs one on the fundamental one on harmonic HX one on harmonic HY and one on harmonic HZ Select the quantity to monitor introduce the harmoni
31. the serial cable 3 Plug the USB2UART board into the P15 connector of the ADE7880 evaluation board with the VDD pin of the USB2UART aligned at Pin 1 of P15 4 Supply the microcontroller side of the board by connecting a USB cable between a PC and the P1 connector of the board 5 Press the S3 button The P2 10 EINTO pin of the microcontroller is now connected to ground 6 While keeping the 53 button pressed press and release the reset button 52 on the ADE7880 evaluation board Then release 53 7 Launch Flash Magic and do the following a Selecta COM port as seen in the Device Manager Set the baud rate to 115 200 Select the NXP LPC2368 device Set the interface to none ISP Set the oscillator frequency MHz to 12 0 Select Erase all Flash Code Rd Block Choose ADE7880_Eval_Board hex from the Debug Exe project folder h Select Verify after programming The Flash Magic settings are shown in Figure 41 Flash Magic NON PRODUCTION USE ONLY File ISP Options Tools Help 99 gt 9 5 Step 1 Communications Step 2 Erase COM Port COM 5 Baud Rate 115200 Device LPC2368 Interface None 15 Erase all Flash Code Rd Prot Oscillator MHz 12 000000 4 Hes File C Documents and Settings PMinciu My Documents MyWork ene Browse Modified Wednesday June 8 2011 10 20 43 more info Step 5 Start Set Code Read Prot Te
32. winding outputs Care should be taken when using a current transformer as the current sensor If the secondary is left open that is no burden is connected a large voltage may be present at the secondary outputs This can cause an electric shock hazard and potentially damage electronic components For this particular example burden resistors of 50 O signify an input current of 7 05 A rms at the ADE7880 ADC full scale input 0 5 V In addition the PGA gains for the current channel must be set at 1 For more information about setting PGA gains see the ADE7880 data sheet The evaluation software allows the user to configure the current channel gain Using a Rogowski Coil as the Current Sensor Figure 4 shows how a Rogowski coil can be used as a current sensor in one phase of a 3 phase 4 wire distribution system Phase A The other two phases and the neutral current require identical connections The Rogowski coil does not require any burden resistors therefore R1 and R2 should not be populated The antialiasing filters should be enabled by opening the JP5A and JP6A jumpers To account for the high frequency noise introduced by the coil an additional antialiasing filter must be introduced by opening the and JP4A jumpers Then to compensate for the 20 dB dec gain introduced by the di dt sensor the integrator of the ADE7880 must be enabled by setting Bit 0 INTEN of the CONFIG register The integrator has a 20 dB dec attenua
33. 1 C63 Capacitor ceramic X7R 0 01 uF AVX 0306ZC103KAT2A 3 CF1 ISO to CF3 ISO Connector PCB coax vertical BNC 50 O Tyco Electronics 5227699 2 5 CRI to CR5 Diode LED green SMD Chicago Mini Lamp CMD28 21VGCTR8T1 2 CR6 CR7 LED green surface mount Lumex SML LXTO805GW TR 1 D1 Diode 6 2 V Zener SMA Micro Commercial Co SMAJ4735A TP 12 E1A to E3A to E3B Inductor chip ferrite bead 0805 E1C to E3C to E3N 15000 Murata BLM21BD152SN1D 1 EXT CLKIN Connector PCB coax SMB RA Johnson 131 3701 301 13 HSA ISO SCL ISO Connector PCB test point white SDA ISO SSB ISO MISO ISO MOSI ISO CTRL PM1 SCLK ISO IROOB ISO IRQ1B ISO RESB HSDATA ISO COMPONENTS CORPORATION TP 104 01 09 10 JP11 JP24 JP31 to JP34 3 pin jumper JP7A JP7B JP7C JP7N N A 29 JP12 JP1A to JP6A JP1B Connector PCB Berg jumper ST male to JP6B JP1C to JP6C 2 pin JP1N to JP6N JP21 JP9B JP9C BERG 69157 102 2 JP22 JP23 Resistor jumper SMD 1206 short Panasonic ERJ 8GEYJO O 2 JP61 JP62 Resistor jumper SMD 0805 open Panasonic ERJ 6GEYJO O 2 VDD MCU VDD Connector PCB test point red COMPONENTS CORPORATION TP 104 01 02 3 to MGND3 Connector PCB test point green COMPONENTS CORPORATION TP 104 01 05 11 P1 to P10 P12 Connector PCB term black 2 pin ST Weiland 25 161 0253 Rev 0 Page 54 of 56 Oty Desi
34. 10 P1 9 Po 26 ADO 3 ACUT RXD3 P1 0 RXD1 B Po 24 ADO 1 I SRX WS CAP3 1 14 FR 22 56 Mosi ISO 22 56 22 81 MCIDATO TD P 15 REF CLK SSB ISO p 58 20 DTR1 NCICMD SCL1 18 MDC WHT 60 0 18 pcp1 MOSI P1 17 i 63lpo_16_RXD1_SSELO_SSEL P1 16 USB UP LED 1 49 po 11 RXD2 SCL2 1 19 1 HSA ISO IRQ1B ISO 78lpq_9 25 SDA VAT2 3 P1 20 PWM1 2 5 0 ai HSDATA ISO IRQ0B 50 WHT 78 0 7 125 8 MAT2 1 P1 21 SSELO eae NEP 9 WHT 0 RD1 TXD3 SDA1 P122 MATI 0 R77 1 TD1 RXD3 5 11 P123 4 MISO0 AM 7 2 TXDO P1 24 5 MOSIO di 3 RXDO 25 MATI 1 4 2SRX RD2 CAP2 0 P1 26 PWMI 6 RESB CTRL WET I2SRX_WS_TD2 CAP2 1 P1 27 1 NET 1 6 I2SRX SDA SSEL MAT2 0 P1 28 PCAP1 0 MATO 0 SCLK_ISO 8 125 WS MISO1 MAT2 2 P129 1 MATO 1 o WHT 10 2 SDA2 0 P1 30 VBUS ADO 4 15 TXD1 8 SCK P1 31 SCK1 00 5 5 ISO 17 CTS1 MISO0 MISO P2 0 PWM1 1 TXD1 TRACECLK T 19 0541 MCICLK SDA1 P2 1 2 RXD1 PIPESTATO 21 MCIPWR RD1 2 PWM1 3 CTS1 SDA 150 23 ADO 0 258 0 P2 3 PWM1 4 DCD1 WHT P0_25_AD0_2_12SRX_SDA_TXD3 P2_4 PWM1_5 DSR1_TRACESYNC 6 5lpo 27 SDAO P2 5 1 6
35. 2 of the Channel IN pin connector P4 to AGND Use this configuration in conjunction with JP4N and JP6N to short the INN pin of the ADE7880 to AGND Open default Pin 2 of the Channel IBN pin connector P2 is left floating Use this configuration in normal operation when driving a differential input to IBN JP3A Closed default Disables the phase compensation network composed by R9 and C9 in the IAP data path Open Enables the phase compensation network composed by R9 and C9 in the IAP data path JP3B Closed default Disables the phase compensation network composed by R11 and C11 in the IBP data path Open Enables the phase compensation network composed by R11 and C11 in the IBP data path JP3C Closed default Disables the phase compensation network composed by R13 and C13 in the ICP data path Open Enables the phase compensation network composed by R13 and C13 in the ICP data path JP3N Closed default Disables the phase compensation network composed by R15 and C15 in the INP data path Open Enables the phase compensation network composed by R15 and C15 in the INP data path JP4A Closed default Disables the phase compensation network composed by R10 and C10 in the IAN data path Open Enables the phase compensation network composed by R10 and C10 in the IAN data path JP4B Closed default Disables the phase compensation network composed by R12 and C12 in the IBN data path Open Enables the phase compensation network composed by
36. 21 jumper This tells the NXP LPC2368 to set all of its I O ports high to allow the other microcontroller to communicate with the ADE7880 After JP21 is closed the 52 reset button should be pressed low to reset the NXP LPC2368 This is necessary because the state of JP21 is checked inside the NXP LPC2368 program only once after reset Rev 0 Page 9 of 56 JP24 CLOSED BETWEEN PIN 2 AND PIN 3 JP11 CLOSED BETWEEN PIN 2 AND PIN 1 USB CABLE CONNECTED BETWEEN THE BOARD AND PC VOLTAGE SOURCE PHASE PHASE B P1 2 IAP JP1A JP2A OPEN 7 KA op m 1 JP6A OPEN 2 JP1B 2 OPEN ______ gt 7 5 IBN JP5B JP6B OPEN P3 2 ICP ICP JP1C JP2C OPEN E 5 gt JP3C JP4C CLOSED JP5C 6 OPEN P4 INP INP JP1N JP2N OPEN EI m gt TOT a INN 5 JP6N OPEN R26 n VAP JP7 A UNCONNECTED V BETWEEN PIN 2 AND PIN 1 NEUTRAL NEUTRAL lt gt v R32 C28 JP9A CLOSED lt R27 VBP B UNCONNECTED JP8B SOLDERED BETWEEN PIN 2 AND PIN 1 JP9B CLOSED R28 VCP JP7 C UNCONNECTED JP8C SOLDERED 3 BETWEEN PIN 2 AND PIN 1 e JP9C CLOSED UN R25 n JP7N UNCONNECTED a o R33 C27 lt 25 10385 006 Figure 6 Typical Setup for the ADE7880 Evaluation Board for 3 Phase 4 Wire Wye Distribution Systems
37. 52 R73 53 R59 10K 10K 215 C67 4 C68 DGND B3S1000 DGND 835 900 1UF 1UF MRESET SERIAL DOWNLOAD ENABLE Figure 59 MCU Reset and Boot Switches XTAL CIRCUIT Y2 MCU 1 1 2 MCU XT2 il m 12 000MHZ To 1_ 1 O A N N DGND DGND 8 Figure 60 Clock Circuit NEUTRAL CURRENT JP3N JP5N CO 5 o INP E1 N BERG69157 102 BERG69157 02 1 GRY ANE o 12 252 b INP 100 1K 1500 OHMS nu 5s N N n AGND AGND AGND 5 S x 5 gt R16 R24 EN AAA ANA 100 1K GRY JP4N JP6N INN 5 2 2 69157 102 PERG69157 102 Figure 61 Neutral Current Circuit Rev 0 Page 46 of 56 10385 061 NEUTRAL VOLI AGE VN GRY E3N 7 R25 1 2 1500 OHMS Al TISS S 5 e S JP7N 3PIN JUMPER TH AGND Figure 62 VN Circuit OUTPUT LED CIRCUIT VDD2 1 R69 R60 10K 10K 2 Q1 S 8 2 3 215 1 F Q2 3 Q3 aloe BITE 85225 e gt gt 2 s ai i A amp Bw a SV S 5 AGND AGND AGND zan oo 11 8 LE OUT 2 Q4 ei LED OUT 9 LED OUT 2 235 2 IRQOB MISO HSDATA gt IRQ1B MOSI SDA gt SEZ JP65 CONFIG SZE 7 66 CONFIG i5 lt z 5 AGND AGND
38. 9 2 MEND MGND Figure 43 Isolated Connections of CF Pins Rev 0 Page 38 of 56 CF3 HSCLK ISO 5227699 2 10385 043 HSDATA ISO MISO ISO DUT COMM PROTOCOL SELECT MISO HSD ISO ALIGN JP32 JP33 AND JP34 AS CLOSE HSDC JP31 3PIN JUMPER TH MOSI SDA SDA TO ISOLATORS AS POSSIBLE SPI PUT JP31 ON MCU SIDE OF ISOLATION I2C JP32 3PIN JUMPER TH PLACE LABELS ear ON SILKSCREEN ON EITHER SIDE E JUMPERS Figure 44 Communication Protocol Selection EXTRA GROUND TP FOR PROBING at AGNDS qux BLK BLK AGND6 um AGND10 1 BLK 1 BLK 1 BLK Tus V Figure 45 Ground Connections Rev 0 Page 39 of 56 SCLK SCL SCL I2C JP33 3PIN_JUMPER_TH HSACTIVE 55 TIN HSDC JP34 3PIN JUMPER TH 10385 044 10385 045 7 M 8S0 HSD 8 9 CF3 HSCLK 0 1 11 CF2 HREADY 13 CEL 15 IRQ IRQO DEVICE INTERFACE HEADER 4 9 RESET 21 1 L2 3 31 23 EXT CLKIN 27 CLKOUT SAMTSW 39 D8 GD V Figure 46 Device Interface Header Rev 0 Page 40 of 56 10385 046 MISO HSD EXT HSDATA ISO MISO ISO SPI 3PIN SOLDER JUMPER CFl DUT XTAL CKT CLKOUT GRY 1 C29 CLKOUT 5 20PF AGND 030 20PF PED CLKIN EXT CLKIN E Joms 32 2 01 302 CLAIN EX
39. ANALOG DEVICES Evaluation Board User Guide UG 356 One Technology Way P O 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 Fax 781 461 3113 www analog com Evaluating the ADE7880 Energy Metering IC FEATURES Evaluation board designed to be used with accompanying software to implement a fully functional 3 phase energy meter Easy connection of external transducers via screw terminals Easy modification of signal conditioning components using PCB sockets LED indicators on the CF1 CF2 CF3 IRQO and IRQ1 logic outputs Optically isolated metering components and USB based communication with a PC External voltage reference option available for on chip reference evaluation PC COM port based firmware updates GENERAL DESCRIPTION The ADE7880 is a high accuracy 3 phase electrical energy measurement IC with serial interfaces and three flexible pulse outputs The ADE7880 device incorporates second order sigma delta Z A analog to digital converters ADCs a digital integrator reference circuitry and all of the signal processing required to perform the total fundamental and harmonic active and apparent energy measurements rms calculations and fundamental only active and reactive energy measurements In addition the ADE7880 computes the rms of harmonics on the phase and neutral currents and on the phase voltages PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS
40. DE7880 P NEUTRAL PHASEA 10385 005 Figure 5 Phase A Voltage Input Structure on the Evaluation Board The maximum signal level permissible at the VAP VBP and VCP pins of the ADE7880 is 0 5 V peak Although the ADE7880 analog inputs can withstand 2 V without risk of permanent damage the signal range should not exceed 10 5 V with respect to AGND for a specified operation Rev 0 Page 5 of 56 Table 1 Recommended Settings for Evaluation Board Connectors Jumper Option Description JP1A Closed Connects Pin 1 of the Channel IA pin connector P1 to AGND Use this configuration in conjunction with JP3A and to short the IAP pin of the ADE7880 to AGND Open default Pin 1 of the Channel IA pin connector P1 is left floating Use this configuration in normal operation to drive IAP with analog signal JP1B Closed Connects Pin 1 of the Channel IB pin connector P2 to AGND Use this configuration in conjunction with JP3B and JP5B to short the IBP pin of the ADE7880 to AGND Open default Pin 1 of the Channel IB pin connector P2 is left floating Use this configuration in normal operation to drive IBP with analog signal JP1C Closed Connects Pin 1 of the Channel IC pin connector P3 to AGND Use this configuration in conjunction with JP3C and JP5C to short the ICP pin of the ADE7880 to AGND Open default Pin 1 of the Channel
41. DTR1_TRACEPKTO 29 USB DP P2 6 0 P3 25 MATO 0 PWM1 2 P2 7 RD2 81 6 26 MATO 1 P2 8 TD2 TXD2 TRACEPKT3 28 2 0 TXD3 P2 9 USB CONNECT RXD2 P4 29 2 1 P2 10 EINTO P2 13 EINT3 125 SDA P2 1 1 I2STX P2 12 EINT2 MCIDAT2 125 WS vss VSSA 15 s 72 11 LPC2368FBD100 4 DGND Figure 51 LPC2368 Schematic Rev 0 Page 43 of 56 10385 051 LEFT MOST PINS SHOULD FURTHEST FROM DUT GND TESTPOINTS DISTRIBUTE AROUND MCU CIRCUIT gt MGND3 1 GRN 1 GRN 1 GRN DGND 10385 052 Figure 52 Ground Test Points MCU OVERRIDE JP21 MEU VER OUT ON BOARD MCU 0 2 4 IN EXT MCU VIA P17 R55 1 ich 2 R51 ANA 4 AM 10K BERG69157 102 10K DGND 5 Figure 53 Override MCU PIN CONNECTIONS DO NOT INSTALL ALIGN PORTS AS DRAWN NEXT TO MCU SIDE WITH PINS1 25 DO NOT INSTALL ALIGN PORTS AS DRAWN NEXT TO MCU SIDE WITH PINS26 50 DO NOT INSTALL ALIGN PORTS AS DRAWN NEXT TO MCU SIDE WITH PINS51 75 DO NOT INSTALL ALIGN PORTS 5 DRAWN NEXT TO MCU SIDE WITH PINS76 100 p Figure 54 MCU Pin Connections Rev 0 Page 44 of 56 10385 054 C HREADY DUT vob MOSI SDA EXT SCLK SCL EXT SSB HSA EXT MISO HSD
42. Description Byte 2 of Sample 0 of Q1 Byte 1 of Sample 0 of O1 Byte 0 of Sample 0 of Q1 Byte 2 of Sample 0 of Q2 Byte 1 of Sample 0 of Q2 Byte 0 of Sample 0 of Q2 Byte 2 of Sample 0 of Q3 Byte 1 of Sample 0 of Q3 Byte 0 of Sample 0 of Q3 Byte 2 of Sample 1 of O1 30 NN 10 Byte 1 of Sample 1 of O1 11 Byte 0 of Sample 1 of O1 12 Byte 2 of Sample 1 of Q2 13 Byte 1 of Sample 1 of Q2 14 Byte 0 of Sample 1 of Q2 15 Byte 2 of Sample 1 of Q3 16 Byte 1 of Sample 1 of Q3 17 Byte 0 of Sample 1 of Q3 Rev 0 Page 33 of 56 Byte Description 3 x 3 x N_sample 3 Byte 2 of Sample N_sample 1 of Q3 3 x 3 x N_sample 2 Byte 1 of Sample N_sample 1 of Q3 3 x 3 x N_sample 1 Byte 0 of Sample N_sample 1 of Q3 Answer from the microcontroller to the PC if three quantities Q1 Q2 O3 are monitored Table 32 Real Time Monitoring of Harmonics Byte Description Byte 2 of Sample 0 of O1 Byte 1 of Sample 0 of Q1 Byte 0 of Sample 0 of O1 Byte 2 of Sample 0 of Q2 Byte 1 of Sample 0 of Q2 Byte 0 of Sample 0 of Q2 Byte 2 of Sample 0 of Q3 Byte 1 of Sample 0 of Q3 Byte 0 of Sample 0 of Q3 Byte 2 of Sample 0 of Q4 Byte 1 of Sample 0 of Q4 Byte 0 of Sample 0 of Q4 Byte 2 of Sample 1 of O1 ON A 13 Byte 1 of Sample 1 of O1 14 Byte 0 of Sample 1 of O1 15 Byte 2 of Sample 1 of Q2 16 Byte 1 of Sample 1 of Q2 17 Byte 0 of Sample 1 of Q2 18 Byte 2 of Sample 1 o
43. IC pin connector P3 is left floating Use this configuration in normal operation to drive ICP with analog signal Closed Connects Pin 1 of the Channel IN pin connector P4 to AGND Use this configuration in conjunction with JP3N and JP5N to short the INP pin of the ADE7880 to AGND Open default Pin 1 of the Channel IN pin connector P4 is left floating Use this configuration in normal operation to drive INP with analog signal JP2A Closed Connects Pin 2 of the Channel pin connector P1 to AGND Use this configuration in conjunction with JP4A and JP6A to short the IAN pin of the ADE7880 to AGND Open default Pin 2 of the Channel IA pin connector P1 is left floating Use this configuration in normal operation when driving a differential input to IAN JP2B Closed Connects Pin 2 of the Channel IB pin connector P2 to AGND Use this configuration in conjunction with JP4B and JP6B to short the IBN pin of the ADE7880 to AGND Open default Pin 2 of the Channel IB pin connector P2 is left floating Use this configuration in normal operation when driving a differential input to IBN JP2C Closed Connects Pin 2 of the Channel IC pin connector P3 to AGND Use this configuration in conjunction with JP4C and JP6C to short the ICN pin of the ADE7880 to AGND Open default Pin 2 of the Channel IC pin connector P3 is left floating Use this configuration in normal operation when driving a differential input to ICN JP2N Closed Connects Pin
44. Increment Bytel 5 Increment AVA Byte2 6 0 7 Increment Byte2 If BVA is to be acquired Byte 7 Byte 8 and Byte 9 are 1 Otherwise they are 0 8 Increment BVA Bytel 9 Increment BVA ByteO 10 0 11 Increment CVA Byte2 If CVA is to be acquired Byte 11 Byte 12 and Byte 13 1 Otherwise they 0 12 Increment CVA Bytel 13 Increment CVA ByteO 14 0 15 Increment AWATT 2 If AWATT is to be acquired Byte 15 Byte 16 and Byte 17 1 Otherwise they 0 16 Increment AWATT Bytel 17 Increment AWATT ByteO 18 0 19 Increment BWATT Byte2 If BWATT is to be acquired Byte 19 Byte 20 and Byte 21 are 1 Otherwise they are 0 20 Increment BWATT 1 21 Increment BWATT ByteO 22 0 23 Increment CWATT 2 If CWATT is to be acquired Byte 23 Byte 24 and Byte 25 are 1 Otherwise they 0 24 Increment CWATT Bytel 25 Increment CWATT ByteO 26 0 27 Increment Byte2 If AVAR is to be acquired Byte 27 Byte 28 and Byte 29 1 Otherwise they are 0 28 Increment AVAR Bytel 29 Increment AVAR ByteO 30 0 31 Byte2 If BVAR is to be acquired Byte 31 Byte 32 and Byte 33 are 1 Otherwise they are 0 32 Increment BVAR Bytel 33 Increment BVAR ByteO 34 0 35 Increment CVAR Byte2 If CVAR is to be acquired Byte 35 Byte 36 Byte 37 are 1 Otherwise they are 0 36 Increment CVAR Bytel 37 Increment
45. JP31 JP32 JP33 and JP34 jumpers are closed between Pin 2 and Pin 3 The SPI port should be chosen as the active port in the ADE7880 control panel Communication between the ADE7880 and the NXP LPC2368 is also possible using the ports To accomplish this the JP31 JP32 JP33 and JP34 jumpers should be closed between Pin 2 and Pin 1 In this case the port should be chosen as the active port in the ADE7880 control panel see Table 2 Note that the HSDC port of the ADE7880 also becomes available to communicate with the NXP LPC2368 in this case Table 2 Jumper State to Activate SPI or Communication Active Communication Jumpers JP31 JP32 JP33 JP34 SPI Default Closed between Pin 2 and Pin 3 Closed between Pin 2 and Pin 1 Using the Evaluation Board with Another Microcontroller It is possible to manage the ADE7880 mounted on the evalua tion board with a different microcontroller mounted on another board The ADE7880 can be connected to this second board through one of two connectors P11 or P17 P11 is placed on the same power domain as the ADE7880 P17 is placed on the power domain of the NXP LPC2368 and communicates with the ADE7880 through the isocouplers If P11 is used the USB cable should not be connected between the PC and the board to avoid supplying the power domain of the NXP LPC2368 If P17 is used a conflict may arise with the NXP LPC2368 I O ports To avoid this conflict close the JP
46. L When the evaluation board software is launched the Front Panel is opened This panel contains three areas the main menu at the left the sub menu at the right and a box that displays the name of the communication port used by the PC to connect to the evaluation port also at the right see Figure 8 The COM port used to connect the PC to the evaluation board must be selected first The program displays a list of the active COM ports allowing you to select the correct part To learn which COM port is used by the evaluation board launch the Windows Device Manager the devmgmt msc file in the Run window on the Windows Start menu By default the program offers the option of searching for the COM port The serial communication between the microcontroller and the ADE7880 is selected using a switch in the LabVIEW software By default the SPI port is used Note that the active serial port must first be set in the hardware See the Activating Serial Communication Between the ADE7880 and the NXP LPC2368 section for details on how to set it up The main menu has only one choice other than Exit enabled Find COM Port Clicking it starts a process in which the PC tries to connect to the evaluation board using the port indicated in the Start menu It uses the echo function of the communica tion protocol see the Managing the Communication Protocol Between the Microcontroller and the ADE7880 section It displays the port that matches the proto
47. M2 are not available because they must be initialized in PSMO before the ADE7880 can be used in PSM1 or PSM2 Rev 0 Page 12 of 56 Eval front panel vi Edit View Project Operate Tools Window Please choose the COM port ADE78xx Eval Board is in use by ADE78xx eval board connected at port lect fr llowi TUUS Please select ram the following opti activated on ADE78XX eval board Configure Communication Total Active Power Harmonic Calculations Fundamental Active Power Please select from the following options Fundamental Reactive Power Find COM Port S Apparent Power Enter 5 mode RMS Current Enter PSM1 mode Mean Absolute Value Current Enter PSM2 mode RMS Voltage Enter PSM3 mode Power Quality Exit Waveform Sampling Checksum Register Phase Current Monitoring All Registers Access PSM2 settings Quick Startup Exit 10385 009 ADE7880_eval_software lvproj MMy Computer lt Figure 9 Front Panel After the COM Port Is Identified PSMO MODE NORMAL POWER MODE Enter PSMO Mode When the evaluation board is powered up the ADE7880 is in PSM3 sleep mode When Enter PSMO mode is selected the microcontroller activates the and pins of the ADE7880 to switch it into PSMO mode It waits 50 ms for the circuit to power up and if SPI communication is activated on the board it executes three SPI write opera
48. M3 mode Exit Phase Current Monitoring PSM2 settings Quick Startup ext xj o ADE7880 eval software lvproj My Computer IE 8 Figure 10 Front Panel After the ADE7880 Enters PSMO Mode Reset ADE7880 When Reset ADE7880 is selected on the Front Panel the RESET pin of the ADE7880 is kept low for 20 ms and then is set high If the operation is correctly executed the message ADET7880 was reset successfully is displayed and you must click OK to continue The only error that may occur during this operation is communication related if this happens the following message is displayed The communication between PC ADE7880 evaluation board or between LPC2368 and ADE7880 did not function correctly There is no guarantee the reset of ADE7880 has been performed Configure Communication When Configure Communication is selected on the Front Panel the panel shown in Figure 11 is opened This panel is useful if an ADE7880 reset has been performed and the SPI is no longer the active serial port Select the SPI port by clicking the I2C SPI Selector button and then click OK to update the selection and lock the port If the port selection is successful the following message is displayed Configuring LPC2368 ADE7880 communication was successful and you must click OK to continue If a communication error occurs the following message is displayed Configuring LPC2368 ADE7880 communication was not succe
49. R12 and C12 in the IBN data path JP4C Closed default Disables the phase compensation network composed by R14 and C14 in the ICN data path Open Enables the phase compensation network composed by R14 and C14 in the ICN data path JP4N Closed default Disables the phase compensation network composed by R16 and C16 in the INN data path Open Enables the phase compensation network composed by R16 and C16 in the INN data path JP5A Closed Disables the phase antialiasing filter composed by R17 and C17 in the IAP data path Open default Enables the phase antialiasing filter composed by R17 and C17 in the IAP data path JP5B Closed Disables the phase antialiasing filter composed by R19 and C19 in the IBP data path Open default Enables the phase antialiasing filter composed by R19 and C19 in the IBP data path Rev 0 Page 6 of 56 Jumper Option Description JP5C Closed Disables the phase antialiasing filter composed by R21 and C21 in the ICP data path Open default Enables the phase antialiasing filter composed by R21 and C21 in the ICP data path JP5N Closed Disables the phase antialiasing filter composed by R23 and C23 in the INP data path Open default Enables the phase antialiasing filter composed by R23 and C23 in the INP data path JP6A Closed Disables the phase antialiasing filter composed by R18 and C18 in the IAN
50. RMS Voltage Enter PSM3 mode Power Quality E Waveform Sampling Checksum Register Phase Current Monitoring Registers Access PSM2 settings Quick Startup Bit id ADE7880 software Computer x gt Figure 37 Front Panel After the ADE7880 Enters PSM1 Mode Mean Absolute Value Current in PSM1 Mode The Mean Absolute Value Current panel which is accessible from the Front Panel when Enter PSM1 mode is selected is very similar to the panel accessible in PSMO mode see the Mean Absolute Value Current section for details The only difference is that ADE7880 status does not show the 31 0 register because it is not available in PSM1 mode see Figure 38 BE File Edit View Project Operate Tools Window Help E GE PHASE A CURRENT SIGNAL COMING FROM ADC gt 10385 037 PHASE B CURRENT SIGNAL COMING FROM ADC PHASE C CURRENT SIGNAL COMING FROM ADC ADE7880_eval_software lvproj My Computer lt gt 10385 038 Figure 38 Mean Absolute Value Current Panel in PSM1 Mode PSM2 MODE Enter PSM2 Mode When Enter PSM2 mode is selected on the Front Panel the microcontroller manipulates the and pins of the ADE7880 to switch the ADE7880 into PSM2 low power mode The submenu the allows access only to the Phase Cur
51. T TBD0805 TBD0805 DNI AGND 10385 047 Figure 47 ADE7880 Clock Circuitry EXT I O SELECT MOSI SDA EXT MOSI 180 SSB HSA EXT 558 130 Njo 120 I2C SPI ESDC SPI JP73 JP74 3PIN SOLDER JUMPER 3PIN SOLDER JUMPER 3PIN SOLDER JUMPER 1 150 C 2_HREADY ISO CF3 ESCLK ISO CFl EXT CF2 HREADY DUT CF2 HREADY EXT CF3 HSCLK DUT CF3 HSCLK EXT DUT JP75 3PIN SOLDER JUMPER EXT DUT EXT DUT EXT JP77 3PIN SOLDER JUMPER JP76 3PIN SOLDER JUMPER Figure 48 I O Selection 10385 048 Rev 0 Page 41 of 56 MCJ VDD ix ISOLATION CIRCUIT 855 82 16 1 45 002 VDD GND2 GND1 nal E AGND VOA VIA RESB CTRL DGND ni PXO vos VIB 4 wo 12 vic CTRL NSACTIVE 11 VID 6 ESA ISO 7 o 5 2 S un GND2 GND1 gt DNI DNI P ADUM3401CRWZ 2 4 AGND DGND p S28 e moo 5 252 2 001 002 5 3 ONDI GND2 1800 via VOA o 5 4 VOB c Sluc Sb 6 VID 11 sbENB 150 IRQ INEN 5 AGND 10 g GND2 D DNI i ADUM3401CRWZ 4 AGH DGND
52. VAROS 32 CFVRMSOS 33 CFWATTOS 34 CIGAIN 35 CIRMSOS 36 COMPMODE 37 CONFIG 38 CONFIG2 39 CONFIG3 40 CPHCAL 41 CPGAIN 42 CVGAIN 43 CVRMSOS 44 CWATTOS 45 DICOEFF 46 GAIN 47 HCONFIG 48 HPGAIN 49 HSDC_CFG Rev 0 Page 36 of 56 Line Number Register 50 HX 51 HXIRMSOS 52 HXVAROS 53 HXVRMSOS 54 HXWATTOS 55 HY 56 HYIRMSOS 57 HYVAROS 58 HYVRMSOS 59 HYWATTOS 60 HZ 61 HZIRMSOS 62 HZVAROS 63 HZVRMSOS 64 HZWATTOS 65 ISUMLVL 66 LCYCMODE 67 LINECYC 68 LPOILVL 69 MASKO 70 MASK1 71 MMODE 72 NIGAIN 73 NIRMSOS 74 OILVL 75 OVLVL 76 PEAKCYC 77 RUN 78 SAGCYC 79 SAGLVL 80 VANOLOAD 81 VARNOLOAD 82 VARTHR 83 VATHR 84 VLEVEL 85 VNOM 86 ZXTOUT 87 WTHR Rev 0 Page 37 of 56 EVALUATION BOARD SCHEMATICS AND LAYOUT SCHEMATIC 1 GRY M1S0 HSD 3 MISO HSD 4 GRY GRY CF3 HSCLK SS HSA QI SSIHSA CF2 HREADY CF2 HREADY GRY 4 D RESET PAD CN 1 E IRQ 22885835885 U1 GRI IRQO 30 1 GRY 29 IRQO 28 CLKOUT 27 CLKIN 26 vpp 25 24 AVDD 23 VAP 22 vBP 21 CO OO 02 10 0016 22 3 AY g ej o o zi 2 53 H Hi H H gt 8 Figure 42 ADE7880 Schematic ISOLATED CONNECTIONS OF CF PINS CF1 ISO CF2 50 CF3 ISO 150 5227699 2 CF2 HREADY ISO 522769
53. am waited for x 3 sec and the interrupt was not triggered then Byte 3 Byte 2 Byte 1 Byte 0 OxFF 2 Byte 2 of the STATUSO 31 0 or STATUS1 31 0 register 3 Byte 1 of the STATUSO 31 0 or STATUS1 31 0 register 4 Byte 0 of the STATUSO 31 0 or STATUS1 31 0 register The microcontroller executes the following operations after the interrupt setup command is received 1 Reads the STATUSO 31 0 or STATUS1 31 0 register depending on the address received from the PC and if it shows an interrupt already triggered one of its bits is equal to 1 it erases the interrupt by writing it back 2 Writes to the MASKO 31 0 or MASK1 31 0 register with the value received from the PC 3 Waits for the interrupt to be triggered If the wait is more than the timeout specified in the command 0xFFFFFFFF is sent back 4 Ifthe interrupt is triggered the STATUSO 31 0 or STATUS1 31 0 register is read and then written back to clear it The value read at this point is the value sent back to the PC so that the user can see the source of the interrupts 5 Sends back the answer Table 17 Interrupt Pins Status Message from the PC to the Microcontroller Byte Description 0 0x48 1 1 number of bytes transmitted after this byte 2 Any byte This value is not used by the program but it is used the communication because must not be equal to 0 Table 18 Interrupt Pins Status Answer from the Microcont
54. button in the upper part of the panel The upper part also displays the ADE7880 status and the buttons that manage the measurements When the READ CONFIGURATION button is clicked all power quality registers MASKI 31 0 STATUS1 31 0 ZXTOUT 15 0 APERIOD 15 0 BPERIOD 15 0 CPERIOD 15 0 MMODE 7 0 ISUM 27 0 OVLVL 23 0 OILVL 23 0 PHSTATUS 15 0 IPEAK 31 0 VPEAK 31 0 SAGLVL 23 0 SAGCYC 7 0 ANGLEO 15 0 ANGLEI 15 0 ANGLE2 15 0 COMPMODE 15 0 31 0 PEAKCYC 7 0 and ISUMLVL 23 0 are read and the registers that belong to the active panel are displayed Based on the APERIOD 15 0 BPERIOD 15 0 and CPERIOD 15 0 registers the line frequencies on every phase are computed and displayed in the lower part of the panel Zero Crossing Measurements Based on the 15 0 registers cos ANGLEx is computed and displayed in the Time Intervals Between Phases panel that is accessible from the Active Measurement Zero Crossing menu box see Figure 25 When the WRITE CONFIGURATION button is clicked ZXTOUT 15 0 MMODE 7 0 OVLVL 23 0 OILVL 23 0 SAGLVL 23 0 SAGCYC 7 0 15 0 PEAKCYC 7 0 and ISUMLVL 23 0 are written into the ADE7880 and CHECKSUM 31 0 is read back and displayed in the CHECKSUM 31 0 box at the top of the upper part of the panel Rev 0 Page 18 of 56 Evaluation Board User Guide 10385 025 Figure 25 Power Quality Zero Crossing Measurements
55. c that is monitored using the HX HY and HZ registers select the number of samples to acquire in real time select the HCONFIG register settings and click the Start Analysis button If four quantities are monitored only up to 2433 samples can be acquired If three quantities are monitored up to 3244 samples can be acquired If two quantities are monitored up to 4866 samples can be acquired If only one quantity is monitored up to 9732 samples can be acquired The program then displays the samples on up to four diagrams computes the mean maximum and minimum values of the acquisitions and displays them at the right side of every drawing 10385 020 290 Figure 20 Phase Real Time Monitoring Panel Apparent Power When Apparent Power is selected on the Front Panel a new panel is opened see Figure 21 Similar to the other panels that deal with power measurement this panel is divided into two parts the lower half shows the apparent power data path of one phase and the ADE7880 status the upper half shows the bits registers and commands necessary for power management 10385 021 Figure 21 Apparent Power Panel RMS Current When RMS Current is selected on the Front Panel a new panel is opened see Figure 22 data paths of all phases are available 10385 022 Figure 22 Current RMS Panel Click the Read Setup button to read all registers shown in the panel Click the Write Setup but
56. chnical on line articles about 8051 and programming esacademy com fag docs 10385 041 Figure 41 Flash Magic Settings 8 ClickStart to begin the download process 9 After the process finishes remove the USB cable from the P1 connector and reinsert it Supply 3 3 V at P9 connector to supply the ADE7880 side of the board The board is now ready to operate 10 When the PC recognizes the evaluation board and asks for a driver select the project VVirCOM Driver XP folder if Windows XP is the operating system The 7880 eval board vircomport inf file is the driver If the operating system is Windows 7 64 bit the driver is in the VirCOM Driver W7 64bit folder The ADE7880 _ eval board vircomport W7 64bit inf file is the driver Rev 0 Page 35 of 56 CONTROL REGISTERS DATA FILE Table 33 shows the order in which the control registers of the ADE7880 are stored into a data file when you click the Save Regs into a file button in the All Registers Access panel Table 33 Control Register Data File Contents Line Number Register 1 ACCMODE 2 AFIRMSOS 3 AFVAROS 4 AFVRMSOS 5 AFWATTOS 6 AIGAIN 7 AIRMSOS 8 APHCAL 9 APGAIN 10 APNOLOAD 11 AVGAIN 12 AVRMSOS 13 AWATTOS 14 BFIRMSOS 15 BFVAROS 16 BFVRMSOS 17 BFWATTOS 18 BIGAIN 19 BIRMSOS 20 BPHCAL 21 BPGAIN 22 BVGAIN 23 BVRMSOS 24 BWATTOS 25 CF1DEN 26 CF2DEN 27 CF3DEN 28 CFCYC 29 CFIRMSOS 30 CFMODE 31 CF
57. col and then sets it to 115 200 baud eight data bits no parity no flow control one stop bit Ele Edit Project Operate Tools Window Help 21 l Please choose the COM port E ADE78xx Eval Board is in use ADE78xx eval board connected at port Please select from the follow Please select serial communication activated on ADE78XX eval board Configure Communication Total Active Power Harmonic Calculations Fundamental Active Power Fundamental Reactive Power Apparent Power RMS Current Mean Absolute Value Current RMS Voltage Power Quality Waveform Samplng Checksum Register Phase Current Monitoring All Regsters Access Enter PSMO mode Enter PSM1 mode Enter PSM2 mode Enter PSM3 mode Ext hil lt lt 10385 008 ADE7880 eval software vproj My Computer lt 1 4 I iB Figure 8 Front Panel of the ADE7880 Software If the evaluation board is not connected the port is displayed as XXXXX In this case the evaluation software is still accessible but no communication can be established Whether the search for the COM port is successful or not the cursor is positioned at Please select from the following options in the main menu Find COM Port is grayed out and the other main menu options are enabled see Figure 9 These options allow you to command the ADE7880 in either the PSMO or PSM3 power mode The other power modes PSM1 and PS
58. ct from the folowing optons Sirs of Total Phase Powers at CF2 pr Reserved Sum of Phaze Apparent Powers at n Bits 56 CFISEL of CFMODE IS 0 Please select the foloning options Tota Phase Active Powers at CF3 pr Reserved E Sum of Fundamental Phase Reactve Powers at pri 10385 013 Figure 13 CFx Configuration Panel Like the Total Active Power panel the CHECKSUM 31 0 register is read back whenever a read or write operation is executed in the CFx Configuration panel To select more than one option for a TERMSELx bit in the 15 0 register press the CTRL key while clicking the options you want Clicking the Exit button closes the panel and redisplays the Total Active Power panel When the Read Energy Registers button in the Total Active Power panel is clicked a new panel is opened see Figure 14 This panel gives access to bits and registers that configure the energy accumulation The Read Setup and Write Setup buttons update and display the bit and register values The CHECKSUM 31 0 register is read back whenever a read or write operation is executed in the Read Energy Registers panel Click the Read all energy registers button to read all energy registers immediately without regard to the modes in which they function Rev 0 Page 14 of 56 4 98 amapis BARDEN gts pts cuam g
59. d P5 to P8 respectively All analog input signals are filtered using the on board antialiasing filters before the signals are connected to the ADE7880 The components used on the board are the recommended values to be used with the ADE7880 Current Sense Inputs P1 P2 P3 and P4 The ADE7880 measures three phase currents and the neutral current Current transformers or Rogowski coils can be used to sense the currents These sensors cannot be mixed together for the phase currents sensing but the neutral current may be sensed using a different sensor The ADE7880 contains different internal PGA gains on phase currents and on the neutral current therefore sensors with different ratios can be used The only requirement is to have the same scale signals at the PGA outputs otherwise the mismatch functionality of the ADE7880 is compromised see the ADE7880 data sheet for more details about neutral current mismatch Figure 2 shows the structure used for the Phase A current the sensor outputs are connected to the P1 connector ADE7880 JP4A JP6A 10385 002 Figure 2 Phase A Current Input Structure on the Evaluation Board The R1 and R2 resistors are the burden resistors and by default they are not populated They can also be disabled using the JP1A and JP2A jumpers The R9 C9 and R10 C10 RC networks are used in conjunction with Rogowski coils They can be disabled using the JP3A and JP4A jumpers The R17 C17 and R18 C18 RC network
60. d between Pin Disconnects the on board 16 384 MHz crystal Y1 from the CLKIN pin of the ADE7880 Use this 2 and Pin 3 configuration when an external clock is used This clock can be connected to the EXT_CLKIN connector JP11 Closed between Pin 2 Connects the supply of the secondary side of the isocouplers VDD2 to VDD the supply of the and Pin 1 default ADE7880 Closed between Pin 2 Connects the supply of the secondary side of the isocouplers VDD2 to a 3 3 V supply provided and Pin 3 at the P10 connector JP12 Closed Connects the ADR280 voltage reference to the pin of the ADE7880 Use this configuration when the ADE7880 is configured to use an external reference Open default Disconnects the ADR280 voltage reference from the REFin our pin of the ADE7880 Use this configuration in normal operation when the ADE7880 is configured to use the internal reference JP21 Closed Signals the NXP LPC2368 microcontroller to declare all I O pins as outputs Use this configuration when another microcontroller manages the ADE7880 through the P17 socket Open default Disables the option to use another microcontroller to manage the ADE7880 through the P17 socket Use this configuration in normal operation to allow the NXP LPC2368 microcontroller to manage the ADE7880 JP24 Closed between Pin 2 Selects an external 3 3 V power supply provided at P12 connector to power the domain that and Pin 1 includes the NXP LPC2368 and one side of the isoco
61. d by the LPOILVL 7 0 register and can be modified only in mode The panel offers this option by switching the ADE7880 into PSMO mode and then back to PSM2 mode when the READ LPOILVL WRITE LPOILVL button is clicked To avoid toggling both the PMO and pins at the same time during this switch the ADE7880 is set to PSM3 mode when changing modes g Edit View Project Operate Tools Window Help m eiu 9 1 Read LPOILVL 7 0 register by first setting SetLPOILVL 7 0 register by first setting ADE7880 in PSMO mode and then ADE7880 in PSMO mode and then returning it into PSM2 mode returning it into PSM2 mode Phase currents status based IRQipnstaus sn TROD and IRI pins status 100 pin low 7880 eval software lvproj My Computer lt 10385 040 Figure 40 Panel Managing Current Monitoring in PSM2 Mode Rev 0 Page 23 of 56 PSM3 MODE this mode You can click the Enter PSM0 mode Enter PSM1 mode or Enter PSM2 mode button to set the ADE7880 to one of these power modes Enter PSM3 Mode In PSM3 sleep mode most of the internal circuits of the ADE7880 are turned off Therefore no submenu is activated in Rev 0 Page 24 of 56 MANAGING THE COMMUNICATION PROTOCOL BETWEEN THE MICROCONTROLLER AND THE ADE7880 This section lists the protocol commands that have been implemented to manage the ADE7880
62. e Byte 0 of HX register Byte equal to the LS byte Byte 0 of HY register Byte equal to the LS byte Byte 0 of HZ register MS byte of the number of samples N samples LS byte of the number of samples samples MS byte of HCONFIG 0 LS byte of HCONFIG OMAN AWM A Rev 0 Page 32 of 56 Table 29 Real Time Monitoring of Harmonics Byte Description 0 Byte 2 of Sample 0 1 Byte 1 of Sample 0 2 Byte 0 of Sample 0 3 Byte 2 of Sample 1 4 Byte 1 of Sample 1 5 Byte 0 of Sample 1 3x N sample 3 Byte 2 of Sample sample 1 3x N sample 2 Byte 1 of Sample sample 1 3x N sample 1 Byte 0 of Sample sample 1 Answer from the microcontroller to the PC if one quantity is monitored Table 30 Real Time Monitoring of Harmonics Byte Description Byte 2 of Sample 0 of Q1 Byte 1 of Sample 0 of O1 Byte 0 of Sample 0 of O1 Byte 2 of Sample 0 of Q2 Byte 1 of Sample 0 of Q2 Byte 0 of Sample 0 of Q2 Byte 2 of Sample 1 of O1 Byte 1 of Sample 1 of Q1 Byte 0 of Sample 1 of O1 Byte 2 of Sample 1 of Q2 0 Byte 1 of Sample 1 of Q2 1 Byte 0 of Sample 1 of Q2 AU 3 x 2 x N_sample 3 Byte 2 of Sample N_sample 1 of Q2 3 x 2 x N_sample 2 Byte 1 of Sample N_sample 1 of Q2 3 x 2 x N_sample 1 Byte 0 of Sample N_sample 1 of Q2 Answer from the microcontroller to the PC if two quantities Q1 and Q2 are monitored Table 31 Real Time Monitoring of Harmonics Byte
63. e 8 Reset Answer from the Microcontroller to the PC Byte Description 0 0 52 1 7 to acknowledge that the operation was successful Table 9 I C SPI Select Configure Communication Message from the PC to the Microcontroller Byte Description 0 D 0x44 select and SPI and initialize them then set CONFIG2 7 0 0x2 to lock in the port choice When is selected also enable SSPO of the LPC2368 used for HSDC 1 2 Data Byte 0 0x00 1 0x01 SPI Table 10 12 Select Configure Communication Answer from the Microcontroller to the PC Byte Description 0 0x52 1 0x7E to acknowledge that the operation was successful Table 11 Data Write Message from the PC to the Microcontroller Byte Description 0 0x45 1 number of bytes transmitted after this byte can be 1 2 2 2 4 2 2 2 MSB of the address 3 LSB of the address 4 Data Byte 3 MSB 5 Data Byte N 4 6 Data Byte N 5 N 2 Data Byte 1 N 3 Data Byte 0 LSB Table 12 Data Write Answer from the Microcontroller to the PC Byte Description 0 0 52 1 0 7 to acknowledge that the operation was successful Table 13 Data Read Message from the PC to the Microcontroller Byte Description 0 F 0x46 1 2 number of bytes transmitted after this byte 3 2 MSB of the address 3 LSB of the address
64. er analysis 0 ISUMRMS NIRMS D Table 27 Harmonic Calculations Management Answer from the Microcontroller to the PC Byte Description 0 LS Byte 0 of 64 bit fundamental of the first quantity Q1 to monitor VRMS or WATT or VA or VHD 1 Byte 1 of 64 bit fundamental Q1 2 Byte 2 of 64 bit fundamental Q1 3 Byte 3 of 64 bit fundamental Q1 4 Byte 4 of 64 bit fundamental Q1 5 Byte 5 of 64 bit fundamental Q1 6 Byte 6 of 64 bit fundamental Q1 7 MS Byte 7 of 64 bit fundamental Q1 8 LS Byte 0 of 64 bit fundamental of the second quantity Q2 to monitor IRMS or VAR or PF or IHD 9 Byte 1 of 64 bit fundamental Q2 10 Byte 2 of 64 bit fundamental Q2 11 Byte 3 of 64 bit fundamental Q2 12 Byte 4 of 64 bit fundamental Q2 13 Byte 5 of 64 bit fundamental Q2 14 Byte 6 of 64 bit fundamental Q2 15 Byte 7 of 64 bit fundamental Q2 16 LS Byte 0 of 64 bit Harmonic 2 O1 24 LS Byte 0 of 64 bit Harmonic 2 Q2 32 LS Byte 0 of 64 bit Harmonic 3 Q1 40 LS Byte 0 of 64 bit Harmonic 3 Q2 62 x 16 992 LS Byte 0 of 64 bit Harmonic 63 1 8 62 16 1000 LS Byte 0 of 64 bit Harmonic 63 Q2 1007 MS Byte 7 of 64 bit Harmonic 63 Q2 Rev 0 Page 31 of 56 Table 28 Real Time Monitoring of Message from the PC to the Microcontroller Byte Description 0 T 0x54 1 number of bytes transmitted after this byte 9 2 Byte identifying the fundamental and HX components to monitor If neutral current
65. f Q3 19 Byte 1 of Sample 1 of Q3 20 Byte 0 of Sample 1 of Q3 21 Byte 2 of Sample 1 of Q4 22 Byte 1 of Sample 1 of Q4 23 Byte 0 of Sample 1 of Q4 3 x 4x N_sample 3 Byte 2 of Sample N_sample 1 of Q4 3 x 4x N_sample 2 Byte 1 of Sample N_sample 1 of Q4 3 x 4x N_sample 1 Byte 0 of Sample N_sample 1 of Q4 Answer from the microcontroller to the PC if four quantities 01 Q2 Q3 and Q4 are monitored Rev 0 Page 34 of 56 UPGRADING MICROCONTROLLER FIRMWARE Although the evaluation board is supplied with the microcontroller firmware already installed the ADE7880 evaluation software CD provides the NXP LPC2368 microcontroller project developed under the IAR embedded workbench environment for ARM Users in possession of this tool can modify the project at will and can download it using an IAR J link debugger As an alternative the executable can be downloaded using a program called Flash Magic available on the evaluation software CD or at the Flash Magic website Flash Magic uses the PC COM port to download the micro controller firmware The procedure for using Flash Magic is as follows 1 Pluga serial cable into connector P15 of the ADE7880 evaluation board and into a PC COM port As an alternative use the ADE8052Z DWDLI ADE downloader from Analog Devices Inc together with a USB cable 2 Launch the Device Manager under Windows XP by writing devmgmt msc into the Start Run box This helps to identify which COM port is used by
66. from the PC using the microcontroller command and sends an answer to the PC The PC should wait for the answer before sending a new command to the micro controller The microcontroller is a pure slave during the communication process It receives a command from the PC executes the Table 3 Echo Command Message from the PC to the Microcontroller Byte Description 0 0x41 1 number of bytes transmitted after this byte 2 Data Byte 1 MSB 3 Data Byte N 2 4 Data Byte N N Data Byte 1 N 1 Data Byte 0 LSB Table 4 Echo Command Answer from the Microcontroller to the PC Byte Description 0 0 52 1 0x41 2 number of bytes transmitted after this byte 3 Data Byte 1 MSB 4 Data Byte N 2 1 Data Byte 1 N 2 Data Byte 0 LSB Table 5 Power Mode Select Message from the PC to the Microcontroller Byte Description 0 B 0x42 change PSM mode 1 N 1 2 Data Byte 0 0x00 PSMO 0x01 PSM1 0x02 PSM2 0x03 PSM3 Table 6 Power Mode Select Answer from the Microcontroller to the PC Byte Description 0 1 0x52 OX7E to acknowledge that the operation was successful Table 7 Reset Message from the PC to the Microcontroller Byte Description 0 C 0x43 toggle the RESET pin and keep it low for at least 10 ms 1 1 2 Data Byte 0 this byte can have any value Rev 0 Page 25 of 56 Tabl
67. gnator Description Manufacturer Part Number 2 P11 17 Connector PCB header SHRD ST male 32 pin Samtec TSW 1 30 08 G D 1 P13 Connector PCB header ST male 20 pin Samtec TSW 110 08 G D 1 P14 Connector PCB USB Type B R A through hole AMP 4 1734376 8 1 P15 Connector PCB header ST male 4 pin Samtec TSW 104 08 G S 1 P16 Connector PCB straight header 3 pin Molex 22 03 2031 5 Q1 to Q5 Trans digital FET P channel Fairchild FDV302P 8 R9 to R16 Resistor precision thick film chip R1206 1000 Panasonic ERJ 8ENF 1000V 15 R17 to R25 R29 to R34 Resistor precision thick film chip 805 Panasonic ERJ 6ENF 1001V 3 R26 to R28 Resistor precision thick film chip 805 1 Panasonic ERJ 6ENF 1004V 37 R37 R43 to R56 R59 to Resistor precision thick film chip 805 R65 R67 to R75 R77 R81 10 kO to R85 Panasonic ERJ 6ENF 1002V 5 R38 to R42 Resistor precision thick film chip R1206 499 0 Panasonic ERJ 8ENF4990V 1 R57 Resistor film SMD 0805 220 Multicomp MC 0 1W 0805 196 220K 1 R58 Resistor film SMD 0805 330 kO Panasonic ERJ 6GEYJ334V 1 R66 Resistor PREC thick film chip R1206 1 5 kO Panasonic ERJ 8ENF1501V 2 R76 R80 Resistor film SMD 0805 680 O Multicomp MC 0 1W 0805 1 680R 2 R78 R79 Resistor film SMD 1206 27 Phycomp Yageo 9C12063A27ROFKHFT 3 S1 to 53 SW SM mechanical key switch Omron B3S1000 4 U3 U4 U6 07 IC quad channel digital isolator Analog Devices ADuM3401CRWZ 1 U8 IC ARM7 MCU fla
68. iness at One Technology Way Norwood 02062 USA Subject to the terms and conditions of the Agreement ADI hereby grants to Customer a free limited personal temporary non exclusive non sublicensable non transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above and agrees not to use the Evaluation Board for any other purpose Furthermore the license granted is expressly made subject to the following additional limitations Customer shall not i rent lease display sell transfer assign sublicense or distribute the Evaluation Board and ii permit any Third Party to access the Evaluation Board As used herein the term Third Party includes any entity other than ADI Customer their employees affiliates and in house consultants The Evaluation Board is NOT sold to Customer all rights not expressly granted herein including ownership of the Evaluation Board are reserved by ADI CONFIDENTIALITY This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not di
69. les Gsables the integrator n the neutral current data path S P on begin Comput t execute amants to access the ful cala voRage VFS and the ful scale Then CFDEN THR VLEVEL and parameters CF10EN 2 and CFJDEN regaters THR d pto register The program selects t 10385 035 Figure 35 Panel Used to Quickly Set Up the 3 Phase Meter The meter constant MC in impulses kWh the nominal voltage VN in V rms units the nominal current IN in A rms units and the nominal line frequency fn either 50 Hz or 60 Hz must be set using the panel controls Phase current phase voltage and neutral current PGA settings must also be provided If Rogowski coils are used to sense the phase and neutral currents integrators in the corresponding data paths must be enabled Then phase voltages and phase currents must be provided through the relative sensors Clicking the Begin Computations button starts the program that reads rms voltages and currents and calculates the full scale voltage and currents used to further initialize the meter This process takes 7 sec as the program reads the rms voltages 100 times and the rms currents 100 times and then averages them this is because the PC reads the rms values directly and cannot synchronize the readings with the zero crossings The program then computes the full scale voltages and currents and the constants that are important for setting up
70. lter in the VN data path Use this configuration when the ADE7880 voltage channels are differential in 3 phase 4 wire and 3 phase 3 wire configurations JP8A Soldered between Pin Connects C28 to AGND Use this configuration when the ADE7880 voltage channels are 2and Pin 1 default differential in 3 phase 4 wire and 3 phase 3 wire configurations Soldered between Pin Connects C28 to VN Use this configuration with JP7N connected between Pin 2 and Pin 3 when 2and Pin 3 the ADE7880 voltage channels are single ended JP8B Soldered between Pin Connects C27 to AGND Use this configuration when the ADE7880 voltage channels are 2and Pin 1 default differential in 3 phase 4 wire and 3 phase 3 wire configurations Soldered between Pin Connects C27 to VN Use this configuration with JP7N connected between Pin 2 and Pin 3 when 2andPin 3 the ADE7880 voltage channels are single ended JP8C Soldered between Pin Connects C25 to AGND Use this configuration when ADE7880 voltage channels are differential in 2and Pin 1 default 3 phase 4 wire and 3 phase 3 wire configurations Soldered between Pin 2 and Pin 3 Connects C25 to VN Use this configuration with JP7N connected between Pin 2 and Pin 3 when the ADE7880 voltage channels are single ended Rev 0 Page 7 of 56 Jumper Option Description JP9A Closed default Enables the resistor divider composed by R26 R29 and
71. nal source in the VBP data path Closed between Pin 2 Connects the VBP pin of the ADE7880 to AGND Use this configuration when no signal source is and Pin 3 desired in the VBP data path such as 3 phase 3 wire configuration Unconnected default Enables the resistor divider composed by R27 R30 and R33 when JP9B is closed Use this configuration when using a high voltage signal source in the VBP data path in 3 phase 4 wire configuration JP7C Closed between Pin 2 Disables the resistor divider composed by R28 R31 and R34 when JP9C is open Use this and Pin 1 configuration when using a low voltage signal source in the VCP data path Closed between Pin 2 Connects the VCP pin of the ADE7880 to AGND Use this configuration when no signal source is and Pin 3 desired in the VCP data path Unconnected default Enables the resistor divider composed by R28 R31 and R34 when JP9C is closed Use this configuration when using a high voltage signal source in the VCP data path in 3 phase 4 wire and 3 phase 3 wire configurations JP7N Closed between Pin 2 Disables the antialiasing filter composed by R25 and C25 in the VN data path Use this and Pin 1 configuration when normal single ended signals are connected to the ADE7880 voltage channels Closed between Pin 2 Connects the VN pin of the ADE7880 to AGND Use this configuration when the ADE7880 voltage and Pin 3 channels are connected to AGND Unconnected default Enables the antialiasing fi
72. of the ADE7880 the active serial port and the last read CHECKSUM register value When the Read button is pressed all the gain and offset registers that belong to the harmonic calculations are read together with all registers containing the harmonic calculations results When the Write button is pressed all the gain and offset registers that belong to the harmonic calculations are written into the ADE7880 Rev 0 Page 15 of 56 meret retta Homonczinfs Femencansy mme 10385 017 po Figure 17 Harmonic Analysis Panel Immediately after launch the default panel is set to execute the harmonic analysis on Phase A The user can select two quantities to analyze current and voltage rms active and reactive powers apparent power and power factor or current and voltage distortions The program reads information starting with the fundamental and ending with Harmonic 63 Note that the pass band frequency of the ADE7880 harmonic calculations is 2 8 kHz and any harmonic that is placed after that frequency is attenuated Next the user can select how many samples are averaged before displaying the results The default is 100 samples The program automatically displays the average time it takes for the samples to be acquired based on HCONFIG register settings placed on the same panel Bit 0 HRCFG Bit
73. ot directly or indirectly export the Evaluation Board to another country and that it will comply with all applicable United States federal laws and regulations relating to exports GOVERNING LAW This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts excluding conflict of law rules Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County Massachusetts and Customer hereby submits to the personal jurisdiction and venue of such courts The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed 2012 Analog Devices Inc All rights reserved Trademarks and ANALOG registered trademarks are the property of their respective owners UG10385 0 2 12 0 DEVICES www analo g com Rev 0 Page 56 of 56
74. rent Monitoring function because this is the only ADE7880 functionality available in this low power mode 2 front panel vi Ele Edit View Project Operate Tools Window Help jeu Please choose the COM port ADE78xx Eval Board is in use by ADE78xx eval board connected at port Please select serial communication activated on ADE78XX eval board Configure Communication Total Active Power Harmonic Calculations Fundamental Active Power Please select from the following options A Fundamental Reactive Power Find COM Port Apparent Power Enter 5 mode RMS Current Mean Absolute Value Current RMS Voltage Power Quality Waveform Sampling Checksum Register Phase Current Monitoring All Registers Access 2 settings Quick Startup Exit ADE7880 eval software lvproj My Computer Figure 39 Front Panel After the ADE7880 Enters PSM2 Mode 10385 039 Phase Current Monitoring The Phase Current Monitoring panel is accessible from the Front Panel when Enter PSM2 mode is selected it allows you to display the state of the IRQO and IRQ1 pins because in PSM2 low power mode the ADE7880 compares the phase currents against a threshold determined by the LPOILVL 7 0 register see Figure 40 Clicking the READ STATUS OF IRQO AND IRQ PINS button reads the status of these pins and displays and interprets the status This operation is manage
75. roller to the PC Byte Description 0 0x52 1 number representing the status of the IRQO IRQ1 pins 0 IRQO low low 1 IRQO low IRQ1 high 2 IRQO high IRO1 low 3 IRQO high high The reason for the IRQO and 1801 order is that on the microcontroller I O port IRQO PO 1 and 1801 0 0 Rev 0 Page 27 of 56 ACQUIRING HSDC DATA CONTINUOUSLY This function acquires data from the HSDC continuously for a defined time period and for up to two variables The microcontroller sends data in packages of 4 kB Table 19 describes the protocol when two instantaneous phase currents or voltages are acquired Table 19 Acquire HSDC Data Continuously Message from the PC to the Microcontroller If Phase Currents and Voltages Are Acquired Byte Description 0 0x47 1 number of bytes transmitted after this byte 32 2 0 corresponds to Byte 3 of IA Because this byte is only a sign extension of Byte 2 it is not sent back by the microcontroller 3 Increment Byte2 If IA is to be acquired Byte 3 Byte 4 and Byte 5 1 Otherwise they 0 4 Increment IA Bytel 5 Increment IA Byte2 6 0 7 Byte2 If VA is to be acquired Byte 7 Byte 8 and Byte 9 are 1 Otherwise they are 0 8 Increment VA Bytel 9 Increment VA ByteO 10 0 11 Increment IB Byte2 If IB is to be acquired Byte 11 Byte 12 and Byte 13 are 1 O
76. s 4 3 HSTIME and Bits 7 5 HRATE When the Start Analysis button is pressed the program instructs the ADE7880 to read all harmonic information transfer it to the PC and then displays it in dB relative to the acquired maximum harmonic value Every phase has separate panels in which information on one single harmonic or on the fundamental can be managed Figure 18 shows the Phase A Fundamental Info panel APGAIN the Phase A power gain register together with offset compensation registers AFWATTOS AFVAROS AFIRMSOS and AFVRMSOS can be set in this panel and then by pressing the Write button in the upper half part the values can be written into the ADE7880 When the Read button is pressed all the control registers together with the harmonic calculations results related to the panel FWATT FVAR FIRMS FVRMS FVA FPE ITHDN and VTHDN are read and then displayed Penh Neural nent itn hamoni xit Herne zine icon 10385 018 Figure 18 Phase A Fundamental Info Panel Similarly each phase and neutral have panels dedicated to the three harmonics that the ADE7880 can monitor at a time The neutral line is analyzed together with the sum of the phase currents that the ADE7880 calculates into the ISUM register In addition to the Phase Fundamental info panel these panels contain options to select a harmonic index using one of
77. s are the antialiasing filters The default corner frequency of these low pass filters is 72 KHz 1 2 2 nF These filters can easily be adjusted by replacing the components on the evaluation board All the other current channels that is Phase B Phase C and the neutral current have an identical input structure Using a Current Transformer as the Current Sensor Figure 3 shows how a current transformer can be used as a current sensor in one phase of a 3 phase 4 wire distribution system Phase A The other two phases and the neutral current require similar connections JP3A JP5A ADE7880 IMAX 6 ARMS T 1 2000 10385 003 JP4A JP6A Figure 3 Example of a Current Transformer Connection The and R2 burden resistors must be defined as functions of the current transformer ratio and the maximum current of the system using the following formula RI R22 1 2 x 0 5 N2 x N Irs where 0 5 2 is the rms value of the full scale voltage accepted at the ADC input Nis the input to output ratio of the current transformer Figure 3 shows an example for 2000 Irs is the maximum rms current to be measured The JP1A and JP2A jumpers should be opened if R1 and R2 are used The antialiasing filters should be enabled by opening the J5A and J6A jumpers see Figure 3 Rev 0 Page 4 of 56 The secondary current of the transformer is converted to a voltage by using a burden resistor across the secondary
78. sassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board including but not limited to soldering or any other activity that affects the material content of the Evaluation Board Modifications to the Evaluation Board must comply with applicable law including but not limited to the RoHS Directive TERMINATION ADI may terminate this Agreement at any time upon giving written notice to Customer Customer agrees to return to ADI the Evaluation Board at that time LIMITATION OF LIABILITY THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED AS IS AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS ENDORSEMENTS GUARANTEES OR WARRANTIES EXPRESS OR IMPLIED RELATED TO THE EVALUATION BOARD INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY TITLE FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER S POSSESSION OR USE OF THE EVALUATION BOARD INCLUDING BUT NOT LIMITED TO LOST PROFITS DELAY COSTS LABOR COSTS OR LOSS OF GOODWILL ADI S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS 100 00 EXPORT Customer agrees that it will n
79. sh 512K 100 LOFP NXP LPC2368FBD100 1 U9 IC 300mA low dropout CMOS linear regulator Analog Devices ADP1713AUJZ 3 3 R7 1 Y1 IC crystal 16 384 MHz Valpey Fisher Corporation VM6 1D11C12 TR 16 384 MHz 1 Y2 IC crystal quartz 12 0 MHz ECS ECS 120 20 4X Rev 0 Page 55 of 56 NOTES PC refers to a communications protocol originally developed by Philips Semiconductors now NXP Semiconductors ESD Caution ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge without detection Although this product features patented or proprietary protection circuitry damage may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Legal Terms and Conditions By using the evaluation board discussed herein together with any tools components documentation or support materials the Evaluation Board you are agreeing to be bound by the terms and conditions set forth below Agreement unless you have purchased the Evaluation Board in which case the Analog Devices Standard Terms and Conditions of Sale shall govern Do not use the Evaluation Board until you have read and agreed to the Agreement Your use of the Evaluation Board shall signify your acceptance of the Agreement This Agreement is made by and between you Customer and Analog Devices Inc ADI with its principal place of bus
80. ssful Please check the communication between the PC and ADE7880 evaluation board Rev 0 Page 13 of 56 psm config co File Edit View Project Operate Tools Window jen pi Update Selection and I2C SPI Selector Lock the Port CONFIG 1 PORT LOCK CONFIG2 7 0 Please press EXIT button to exit this function ADE7880 eval software lvproj My Computer lt 10385 011 Figure 11 Configure Communication Panel The CONFIG2 7 0 register is written with Bit 1 I2C_LOCK set to 1 so that you do not need to remember to set it once the communication is set The contents of CONFIG2 7 0 are then read back and displayed with Bit 1 12 LOCK To close the panel click the Exit button the cursor is positioned at Please select from the following options in the submenu of the Front Panel Total Active Power When Total Active Power is selected on the Front Panel the panel shown in Figure 12 is opened The screen has an upper half and a lower half the lower half shows the total active power data path of one phase and the upper half shows bits registers and commands necessary for power management 10385 012 Figure 12 Total Active Power Panel The Active Data Path menu manages which data path is shown in the bottom half Some registers or bits such as the WTHR 7 0 register or Bit 0 INTEN of the CONFIG 15 0
81. t BEIARPRI1 0 E graec 10385 014 Figure 14 Read Energy Registers Panel The panel also gives the choice of reading the energy registers synchronous to CFx interrupts pulses or using line cycle accumulation mode When the Read energy registers synchronous with CF1 pulses button is clicked the following Occurs 1 The 5 50 31 0 register is read and then written back to so that all nonzero interrupt flag bits are cancelled 2 Bit 14 CF1 in the MASKO 31 0 register is set to 1 and the interrupt protocol is started see the Managing the Communication Protocol Between the Microcontroller and the ADE7880 section for protocol details 3 microcontroller then waits until the IRQO pin goes low If the wait is longer than the timeout you indicate in 3 sec increments the following error message is displayed No pulse was generated Verify all the settings before attempting to read energy registers in this mode 4 When the TRQO pin goes low the STATUSO0 31 0 register is read and written back to cancel Bit 14 CF1 then the energy registers involved in the signal are read and their contents are displayed A timer in 10 ms increments can be used to measure the reaction time after the IRQO pin goes low 5 The operation is repeated until the Read energy registers synchronous with CF1 pulses button is clicked again The process is similar when the other CF2
82. therwise they are 0 12 Increment Byte 13 Increment IB ByteO 14 0 15 Increment VB Byte2 If VB is to be acquired Byte 15 Byte 16 and Byte 17 are 1 Otherwise they are 0 16 Increment VB Bytel 17 Increment VB ByteO 18 0 19 Increment IC Byte2 If IC is to be acquired Byte 19 Byte 20 and Byte 21 are 1 Otherwise they are O 20 Increment Bytel 21 Increment IC ByteO 22 0 23 Increment VC Byte2 If VC is to be acquired Byte 23 Byte 24 and Byte 25 are 1 Otherwise they are 0 24 Increment VC Bytel 25 Increment VC ByteO 26 0 27 Increment IN Byte2 If IN is to be acquired Byte 27 Byte 28 and Byte 29 are 1 Otherwise they are 0 28 Increment IN Bytel 29 Increment ByteO 30 Byte 1 of M Mis a 16 bit number The number of 32 bit samples acquired by the microcontroller is 2 x 1 x 67 per channel 31 Byte 0 of M Rev 0 Page 28 of 56 If two ofthe phase powers are to be acquired the protocol changes see Table 20 Table 20 Acquire HSDC Data Continuously Message from the PC to the Microcontroller If Phase Powers Are Acquired Byte Description 0 0x47 1 number of bytes transmitted after this byte 38 2 0 corresponds to Byte 3 of AVA Because this byte is only a sign extension of Byte 2 it is not sent back by the microcontroller 3 Increment Byte2 If AVA is to be acquired Byte 3 Byte 4 and Byte 5 1 Otherwise they 0 4
83. tion and a phase shift of approximately 90 and when combined with the di dt sensor results in a magnitude and phase response with a flat gain over the frequency band of interest Voltage Sense Inputs P5 P6 P7 and P8 Connectors The voltage input connections on the ADE7880 evaluation board can be directly connected to the line voltage sources The line voltages are attenuated using a simple resistor divider network before they are supplied to the ADE7880 The attenuation network on the voltage channels is designed so that the 3 dB corner frequency of the network matches that of the antialiasing filters in the current channel inputs This prevents the occurrence of large energy errors at low power factors ADE7880 ROGOWSKI 10385 004 JP4A JP6A Figure 4 Example of a Rogowski Coil Connection Figure 5 shows a typical connection of the Phase A voltage inputs the resistor divider is enabled by opening the JP7A jumper closing JP9A and connecting JP8A to AGND Pin 1 The antialiasing filter on the VN data path is enabled by opening the JP7N jumper The VN analog input is connected to AGND via the R25 C25 antialiasing filter using the P5 connector The attenuation networks can be easily modified by the user to accommodate any input level However the value of R32 1 should be modified only together with the corresponding resistors in the current channel R17 and R18 on the Phase A current data path R26 A
84. tions to Address OxEBFF of the ADE7880 to activate the SPI port If the operation is correctly executed or if PC communication is used the message Configuring LPC2368 ADE7880 communication was successful is displayed and you must click OK to continue The only error that may occur during this operation is communication related if this happens the following message is displayed Configuring LPC2368 ADE7880 communication was not successful Please check the communication between the PC and ADE7880 evaluation board and between LPC2368 and ADE7880 Bit 1 2 LOCK of the CONFIG2 7 0 register is now set to 1 to lock in the serial port choice Then the DICOEFF register is initialized with OXFFF8000 and the DSP of the ADE7880 is started when the software program writes RUN 0 1 At the end of this process the entire main menu is grayed out and the submenu is enabled You can now manage all functionality of the ADE7880 in PSMO mode To switch the ADE7880 to another power mode click the Exit button on the submenu The state of the Front Panel is shown in Figure 10 Ele Edit View Project Operate Tools Window Help eju 9 Please choose the COM port in use by ADE78xx eval board Please select serial communication activated on ADE78XX eval board gt Please select from the following options Find COM Port Enter PSMO mode Enter PSM1 mode Enter PSM2 mode Enter PS
85. ton to write to the xIRMSOS 23 0 registers You can use the Start Digital Signal Processor and Stop Digital Signal Processor buttons to manage the Run 15 0 register and the Read xIRMS registers button which uses the ZXIA ZXIB and ZXIC interrupts at the pin to read the xIRMS 23 0 registers 500 consecutive times and then compute and display their average If no interrupt occurs for the time indicated by the timeout in 3 sec increments the following Rev 0 Page 17 of 56 message is displayed No ZXIA ZXIB or ZXIC interrupt was generated Verify at least one sinusoidal signal is provided between IAP IAN IBP IBN or ICP ICN pins A delay can be introduced in 10 ms increments between the time that the IRQ pin goes low and the moment the xIRMS registers are read The operation is repeated until the button is clicked again Mean Absolute Value Current When Mean Absolute Value Current is selected on the Front Panel a new panel is opened see Figure 23 When the Read xIMAV registers button is clicked the xIMAV 19 0 registers are read 10 consecutive times and their averages are computed and displayed After this operation the button is returned to high automatically The ADE7880 status is also displayed DE File Edit View Project Operate Tools Window Help en ae ADE7880 status 1 PHASE CURRENT AIMAV 23 0 SIGNAL COMING FROM ADC
86. uplers Use this configuration if USB provided power supply is not desired Closed between Pin 2 Selects the USB provided power supply to power the domain that includes the NXP LPC2368 and and Pin 3 default one side of the isocouplers Use this configuration in normal operation to provide power to the NXP LPC2368 and one side of the isocouplers from the PC JP31 JP32 Closed between Pin 2 When communication between the NXP LPC2368 and the ADE7880 is used the HSDC port of JP33 JP34 and Pin 1 the ADE7880 is also enabled and the SPI port of the ADE7880 is disabled Use this configuration when communication is selected Closed between Pin 2 and Pin 3 default When SPI communication between the NXP LPC2368 and the ADE7880 is used the IC HSDC ports of the ADE7880 are disabled Use this configuration when SPI communication is selected Rev 0 Page 8 of 56 SETTING UP THE EVALUATION BOARD AS AN ENERGY METER Figure 6 shows a typical setup for the ADE7880 evaluation board In this example an energy meter for a 3 phase 4 wire wye distribution system is shown Current transformers are used to sense the phase and neutral currents and are connected as shown in Figure 6 The line voltages are connected directly to the evaluation board as shown Note that the state of all jumpers must match the states shown in Figure 6 equal to the default states in Table 1 The board is supplied from two different power supplies

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