SERDESUB-16USB User's Guide Table of
Contents
1. papua ajBujs iugo Qs 1 ALON 5 5 O D gt V gt 5 2 312 ij en Su z 3 ema EE TL T LT Ez 3 Ei LE S 6 m ded e ENIG Natt EN sie BD INI _ _ ______ lt 7 EP a ES Hr S S R 5 D O N x2 1 dz ssa 55 e lgga lt lt jo 00 45 5 INSTRUMENTS lt HOLISANNOD Uu AS xL 069 0650 e TWNOLLAO 200 Buyjdnoseq 10641106501 uid JESU sJE d 812 lt lt 387887 AE EGGA TYNOILdO2. lt lt Logo uid Jeau anze 052 9000A lt lt 507 Jeau anzz 52 32500 lt 5 55500 T t peog OWS 606910654 QGA OKIOA OT TOGA SSA lt lt 100 62 32 AEEGGA s jndui eu19 x3 TYNOILdO solv Ings AGE 91 AS ado SSA uada 00 WuoLlvInoaH OLAS AAD SSA uedo OOLYAS n P C T e C r2 gt a m z I c gt 02 edi lt HOLISANNOD 2 AS e TWNOLLAO 200 SSA 55 3 uada oo 1 bot CO D m O 9 5 So 5 lt 2 e SSA U ut t 22 92 P Ag TOGA Po SSA m npg nz 1919 PhO 5 m HOL23NNO2 SNLU100 April 2012 SERDESUB 16USB User s Guide 38 45 5 INSTRUMENTS BOM Bill of Materials Serializer Demo PCB DS90UB901 Tx Demo Board Board Stackup Revised Tuesday July 27 2010 DS90UB90
3. X 0 040 76 Yes 003 SILKSCREEN ASSY SIDE 2 ASSEMBLY SDE oie 2 0 043 4 YES 003 0 065 4 YES 003 B 2 ves 003 C 0 156 4 YES t 003 ETIN D 0 265 2 YES 004 120 X 032 SLOT P ou THRU HOLE SLOT SEE DETAIL 0 032 5 YES 005 FULL i 140 X 032 SLOT FULL TYP FULL DETAIL SCALE 1 1 ROT 90 CW e NOTE 032 DRILL AT SLOT CENTER e NOTES UNLESS OTHERWISE SPECIFIED 12 1 PRIMARY COMPONENT SIDE IS SHOWN 4 PLCS 2 DELETED FABRICATE USING MASTER FILM PWB 551600394001 REV A USE GERBER FILE A674BOA PHO FOR BOARD ROUTE 4 4 ACCEPTABILITY SHALL BE BASED ON IPC A 600 CLASS 2 Jp B 5 MATERIAL BASE MATERIAL IS FR 370HR OR EQUIVALENT COLOR GREEN oo 5 0 062 INCH NOM THICKNESS COPPER CLADDING SHALL BE 1 07 6 PLATING ALL HOLES AND CONDUCTIVE SURFACES SHALL BE PLATED mm O WITH MIN OF 001 INCH COPPER EXPOSED PADS TRACES SHALL BE PLATED 000030 MIN COLD OVER NICKEL 000150 MIN 7 FABRICATION TOLERANCES END PRODUCT CONDUCTOR WIDTHS AND LAND DIAMETERS SHALL NOT VARY MORE THAN 002 INCH FROM THE 1 1 DIMENSIONS US OF THE MASTER PATTERN THE CONDUCTIVE PATTERN SHALL XX BEX u 55 BE POSITIONED SO THAT THE LOCATION OF ANY LAND SHALL BE WITHIN 010 INCH DIAMETER TO THE TRUE POSITION OF THE 4 500 zx HOLE IT CIRCUMSCRIBES THE MINIMUM ANNULAR RING SHALL BE
4. 6 INSTRUMENTS 5 Host controller to load and transmit write transaction to register byte 0 13 OxFF Note default of register 0x13 0x00 6 Host controller to read back Serializer OxBO register 0x13 OxFF ES Read data from OxCO Write Verify OxC Reg 0 07 OxBO Register 0x07 OxBO Read data from OxBO Register 0 13 0x00 NO Write to OxBO Reg 0x13 OxFF Read data from OxBO Register 0x13 OxFF NO Data received NO match Serializer ADDR OxBOh Master mode MODE Deserializer ADDR OxCOh Reg 0 01 0 04 Slave mode MODE BISTEN L LOCK H Read Deserializer Register 0x07 SER DEV ID Write command to Deserializer Reg 0x07 SER DEV ID Send Read command to Serializer Reg 0x13 GPCR Read Back Serializer Reg 0x13 GPCR Send Write command to Serializer Reg 0x13 GPCR Send Read command to Serializer Reg 0x13 GPCR Read Back Serializer Reg 0x13 GPCR Figure 6 Bi directional Control Channel Flowchart in Camera Mode SNLU100 April 2012 SERDESUB 16USB User s Guide 23 435 TEXAS INSTRUMENTS Display Mode In Display mode I2C transactions originate from the controller attached to the Serializer The 2 slave core in the Serializer will detect if a transaction targets local registers within the Serialier or the
5. NOTE The DS9UB901Q and DS9UB902Q are NOT USB compliant and should not be plugged into a USB device nor should a USB device be plugged into the demo boards If the demo boards are not performing properly use the following as a guide for quick solutions to potential problems If the problem persists please contact the local Sales Representative for assistance QUICK CHECKS 1 Check that Powers and Grounds are connected to both Serializer and Deserializer boards 2 Check the supply voltage typical 1 8V and also current draw with both Serializer and Deserializer boards The Serializer board should draw about 7OmA with clock all data bits switching at 43 MHz The Deserializer board should draw about 100mA with clock and all data bits switching at 43 MHz 3 Verify input clock and input data signals meet requirements VIL VIH tset thold Also verify that data is strobed on the selected rising falling RFB register edge of the clock 4 Check that the Jumpers and Switches are set correctly 5 Check that the cable is properly connected TROUBLESHOOTING CHART Problem There is only the output clock There is no output data No output data and clock Power ground input data and input clock are connected correctly but no outputs The devices are pulling more than 1A of current After powering up the demo boards the power supply reads less than 1 8V when it is set to 1 8V 28 SERDESUB 16USB User s
6. 4 6 INSTRUMENTS NATIONAL SEMICONDUCTOR CORP NATIONAL SEMICONDUCTOR CORP 980600594 FPD LINK Ill RX EVB 980600594 FPD LINK Ill RX EVB PWB 551600394 001 REV PWB 551600394 001 REV PRIMARY COMP SIDE SOLDER MASK LAYER 1 SECONDARY COMP SIDE SOLDER MASK LAYER 4 e e 71 71 1 NATIONAL SEMICONDUCTOR CORP NATIONAL SEMICONDUCTOR CORP 980600394 FPD LINK RX EVB 980600394 FPD LINK Ill RX EVB PWB 551600394 001 REV A PWB 551600394 001 REV PRIMARY COMP SIDE SOLDER PASTE SECONDARY COMP SIDE SOLDER PASTE MASK SNLU100 April 2012 SERDESUB 16USB User s Guide 47 45 5 INSTRUMENTS SILKSCREEN ASSY SIDE 1 HOLE CHART ASSEMBLY SIDE 1 SOLDERMASK ASSY SIDE 1 PRIMARY COMP SIDE 1 OZ LAYER 1 SUE SUE zs PLATED ET PREPREG 007 THK Q 227 102 LAYER 2 0 006 28 YES 003 POWER PLANE 1 OZ LAYER 3 X 0 010 20 YES t 003 062 005 2 PREPREG 007 THK 0 016 46 YES 003 SECONDARY COMP SIDE 1 07 LAYER 4 Dm T _
7. HOLY INY 1 ALE 0 AS T LLIN gt g e T c I Em 0 L2 Mos en uado wyci Ln yo uid Jeau M2 1 am jnzz 812 Ssh _ lt OOLYAS lt lt ONINAVA Lrigo uid Jeau Ange 5 6f YO Sf niy 1 jj40 28uuoo auo niyy Jamod jndu 3 1 o 55 TWNOUdO e en AAD SSA SSA uado 00 YAS br uid Jeau anp dano npg 822 Tro Cyry3ggn lt lt l der LN NI 19330 SNLU100 April 2012 SERDESUB 16USB User s Guide 34 peog Cwag 6069100650 94102 p epris g cm IMEEM EUM L zo eue d S30 TT 6
8. Additionally there are six user configurable GPIO General Purpose 10 for sending control data This interface allows transparent full duplex communication over a single high speed differential pair carrying asymmetrical bi directional control information without the dependency of video blanking intervals The Serializer and Deserializer chipset is designed to transmit data at PCLK clocks speeds ranging from 10 to 43 MHz and I2C bus rates up to 100 kbps at up to 10 meters cable length over 40 to 105 Deg C The Serializer board accepts 1 8V 3 3V parallel input signals FPD Link Serializer converts the 1 8V 3 3V LVCMOS parallel lines into a single serialized data pair with an embedded clock The serial data line rate switches at 28 times the base clock frequency With an input clock at 43 MHz the transmission line rate for the FPD Link III is 1 20Gbps 28 x 2 The user needs to provide the proper 1 8V 3 3V LVCMOS inputs and 1 8V 3 3V LVCMOS clock to the Serializer and also provide a proper interface from the Deserializer output to test equipment The Serializer and Deserializer boards can also be used to evaluate device parameters A cable conversion board or harness scramble may be necessary depending on type of cable connector interface used on the input to the DS90UB901Q and to the output of the 0590089020 The demo boards are not intended for EMI testing The demo boards were designed for easy accessibility to device pins with t
9. LAYER 2 CORE 039 THK CODE SIZE QTY PLATED TOL POWER PLANE 107 LAYER 3 062 006 2 007 THK A SECONDARY COMP SIDE 1 OZ LAYER 4 ASSEMBLY SIDE 1 lt m I c Ox lt lt m 1 lt gt m gt gt SILKSCREEN ASSY SIDE 2 SOLDERMASK ASSY SIDE 2 on 1 m gt X Bo rri mi I C lt lt m m I 11 1 5 Ag TER rri en 420 X 032 SLOT FULL R TYP NC Na 420 X 032 SLOT 140 X 032 SLOT FUHR FULL R TYP DETAIL THRU HOLE SLOT SEE DETAIL SCALE 11 ROT 90 CW de NOTE 032 DRILL AT SLOT CENTER ES PER NC DRILL FILE NOTES UNLESS OTHERWISE SPECIFIED 12 R 4 PLCS 1 PRIMARY COMPONENT SIDE IS SHOWN 2 DELETED FABRICATE USING MASTER FILM PWB 551800595 001 REV USE GERBER FILE FOR BOARD ROUTE 4 ACCEPTABILITY SHALL BE BASED ON 600 CLASS 2 5 MATERIAL BASE MATERIAL IS FR
10. T 54 002 INCH BOW AND TWIST SHALL NOT EXCEED 010 INCH PER INCH 8 SOLDERMASK BOTH SIDES PER 5 840 TYPE A CLASS COLOR GREEN THERE SHALL BE SOLDERMASK ON ANY LAND XXXX E xx 9 SILKSCREEN THE LEGEND ON BOTH SIDES USING NON CONDUCTIVE zu an EPOXY INK COLOR WHITE THERE SHALL BE NO INK ON ANY LAND x X 10 THE 00975 TRACES LAYER 1 TO BE 50 OHM SINGLE ENDED IMPEDANCE x AND THE DIELECTRIC REFERENCED IN BOARD STACK DETAIL IS SUGESTED 4 HOWEVER TRACE WIDTHS AND OR DIELECTRIC THICKNESS eee MAY MICRO MODIFIED IN ORDER TO FABRICATE BOARDS TO THE REQUIRED IMPEDANCE 5 TO A TOLERANCE OF 10 0 11 PCB MUST BE MADE OF US RECOGNIZED MATERIAL AND TRACEABLE FOR 94V 0 MINIMUM FLAMMABILITY RATING AND MANUFACTURED BY A UL NATIONAL SEMICONDUCTOR CORP RECOGNIZED PRINTED CIRCUIT BOARD SUPPLIER PCB MUST BE PERMANENTLY REN MARKED WITH UL RECOGNIZED MANUFACTURER S LOGO AND TYPE CODE AS DRILL DRAWING DESIGNATED IN THE UL RECOGNIZED DIRECTORY 3 050 9 250 48 SERDESUB 16USB User s Guide SNLU100 April 2012 Warning This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general customer use It generates uses and can radiate radio frequency energy and has not been tested for compliance with the li
11. amp n R10 55 ocon euo RR oo eoogc ch mammam m in d 17 000000 ms RE ae 9 DIN 10 EET E YRI DIN 15 C 8 DU 455 i DI 227 yoo I2C on Du 126 JP StL 056 VID SDA D RED 55 vss vss VDDIO NOT FOR EMI TESTING ASSY 980600393 NATIONAL SEMICONDUCTOR CORP 980800393 FPD LINK TX EVB PWB 551600393 001 REV PRIMARY COMP SIDE SILKSCREEN LAYER 1 MADE IN U S PWB 551600393 001 REV hijo awa 048 eu L NATIONAL SEMICONDUCTOR CORP 980600393 FPD LINK TX EVB PWB 551600395 001 REV SECONDARY COMP SIDE SILKSCREEN LAYER 4 SNLU100 April 2012 SERDESUB 16USB User s Guide 41 435 TEXAS INSTRUMENTS OH oU HOLD OC OU E 1 1 NATIONAL SEMICONDUCTOR CORP NATIONAL SEMICONDUCTOR CORP 980600393 FPD LINK TX EVB 980600393 FPD LINK Ill TX EVB PWB 551600395 001 REV PWB 551600393 001 REV PRIMARY COMP SIDE LAYER 1 GROUND PLANE LAYER 2 U MI 2 i e 100 awd e NATIONAL SEMICONDUCTOR CORP NATIONAL SEMICONDUCTOR CORP 980600393 Ill TX EVB 980600393 FPD LINK Ill TX EVB PWB 551600595 001 REV PWB 551600393 001 REV A POWER PLANE
12. remote registers within the Deserializer or a remote slave connected to the I2C master interface of the Deserializer Commands are sent over the forward channel link to initiate the transactions The Deserializer will receive the command and generate I2C transaction on its local I2C bus At the same time the Deserializer will capture the response on the 2 bus and return the response as a command on the bi directional control channel The Serializer parses the response and passes the appropriate response to the Serializer I2C bus Note The default settings for this EVK are shipped with a camera mode configuration but this EVK also supports a display mode This mode is suitable for setups where a host controller is connected to the DS90UB901Q Serializer end and a display module is connected to the DS90UB902Q Deserializer end The 2 Master would need to be connected to the DS90UB901Q Serializer end A typical setup for display mode is shown below 1 8V 3 3V 1 8V 3 3V 3 3V DIN 13 0 HS VS PCLK VDDIO PDB LOCK GPU FPGA GPIoo D890UB901Q 1 8V DS90UB902Q GPIO1 Serializer Deserializer 10k GPIOO GPIO1 MODE 5 MODE S RESO __ BISTEN RESO y Figure 7 Example of DS90UB901Q 902Q in Display Application 24 SERDESUB 16USB User s Guide SNLU100 April 2012 45 5 INSTRUMENTS Procedure Display Mode 1 Connect the 1 8V and 3 3V power with 1 8V and 3 3V supplies a
13. secet reus edic tci c ead hu ou E ER cesa dta di adu M FEE Tag dd RUE 48 SNLU100 April 2012 SERDESUB 16USB User s Guide 1 435 TEXAS INSTRUMENTS Introduction Texas Instruments Automotive Serdes DS90UB901Q 902Q FPD Link III evaluation kit contains one 1 DS90UB901Q Serializer board one 1 05900 9020 Deserializer board and one 1 two 2 meter high speed USB 2 0 cable Note the chipset can support up to ten 10 meters The 05900 9010 9020 chipset supports a variety of automotive vision applications over two 2 wire serial stream The single differential pair FPD Link III is well suited for direct connections between camera systems and Host Controller Electronic Control Unit ECU FPGA The bidirectional control channel of the DS90UB901Q 902Q provides seamless communication between the image sensor and ECU FPGA Other typical automotive vision systems may include rear view side view camera lane departure warning parking assistance blind spot view etc This kit will demonstrate the functionality and operation of the DS90UB901Q and DS90UB902Q chipset The chipset enables transmission of a high speed video data along with a low latency bi directional control bus over a single twisted pair cable The integrated control channel transfers data bi directionally over the same serial video link The transport delivers 16 bits of parallel data together with bidirectional control channel that supports an I2C bus
14. 1100 0000 h CO 7b 110 0001 h 61 8b 1100 0010 h C2 7b 110 0110 vos 8b 1100 1100 h CC SNLU100 April 2012 SERDESUB 16USB User s Guide 15 435 TEXAS INSTRUMENTS Deserializer Bidirectional Control Bus SCL SDA 12 Compliant Reference Description Settings Connectr J8 I2C Port I2C Input Closed Open Port 2 power is VDD I2C power is YDDIO applied through the applied externally VDD lac VDDIO source with Note when JPS onboard 1 0Kohm connecting the bus pull up resistors externally the Default target source must have external pull up resistor 16 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS JP5 Output Lock Monitor Output L Output H __ 5 __ Receiver PLL LOCK Unlocked Note LOCK DO NOT SHORT M JUMPER IN JP5 JP5 JP4 Output Pass Monitor PASS CRC BIST modes Note DO NOT SHORT JUMPER IN JP4 Power wire in USB cable thru J2 and J11 not tied to VSS mounted connector Default Jumper RED to VSS recommended Note Normally VDD in USB application bd L4 Power wire in USB cable Black wire Black wire thru J2 and J11 not tied to VDD tied to VSS mounted connector Default Jumper BLACK to VSS recommended Note Normally VSS in USB application Red wire floating not recommended Black wire floating not recommended SNLU100 April 2012 SERDESUB 16USB User s Gui
15. 6 4901 2031 037 vaa 6090 lt 5578 087 031 Zorg 12560 Yunopy 4124 SA SH EL 0 LNOY uo 3384 payne 2 259 UO os 1 SION ppr rrpp IP E E IPI ess 2 9 gm Su sss sss ELE 8 8 lt 2 1 7 f 4 1 En EE E EA 1 5 SS SE g _ ues 808 gt Um 5 17 gt S 1oy 7 2 rr 054 ET a 40 aus a 00785 if lOldo 5 5 7 ood 5 Lu gt SSA lt 55 2 ogg K N 3 1 45 5 37 SERDESUB 16USB User s Guide SNLU100 April 2012 45 5 INSTRUMENTS Logo uid Jeau 8 2 lt lt 000 amp giaga L40 uid Inge WI200 rog 140 uid Jeau jnzz 59
16. Guide Solution Make sure the data is applied to the correct input pin Make sure data is valid at the input Make sure Power is on Input data and clock are active and connected correctly Make sure that the cable is secured to both demo boards Check the Power Down pins of both Serializer and Deserializer boards to make sure that the devices are enabled PDB Vdd for operation Check for shorts in the cables connecting the Serializer and Deserializer boards Use a larger power supply that will provide enough current for the demo boards a 500mA minimum power supply is recommended SNLU100 April 2012 4 6 INSTRUMENTS Note Please note that the following references are supplied only as a courtesy to our valued customers It is not intended to be an endorsement of any particular equipment or supplier Cable References The FPD Link interface cable included in the kit is a standard off the shelf high speed USB 2 0 with a 4 pin USB A type on one end and a 5 pin mini USB on the other end and is included for demonstration purposes only NOTE The DS9UB901Q and DS9UB902Q are NOT USB compliant and should not be plugged into a USB device nor should a USB device be plugged into the demo boards The inclusion of the USB cable in the kit is for 1 Demonstrating the robustness of the FPD Link III link over standard twisted pair data cables 2 Readily available and in different lengths without having custom c
17. LAYER 1 SNLU100 April 2012 e Exc muc muc e Eac cse E amp 9320 ft TIE LJ 9 3 JP1 m e C46 EE C47 mR 48 RI C49 R20 R 1 lg oz m 2099 e R23 e f eeee MADE IN U S PWB 551600594 001 REV EL 19 0007 sl 1 eb aco 75907 aD 1157 sss EE Py vs ET x og m Te og ses 12 es T 0 NATIONAL SEMICONDUCTOR CORP 980600394 FPD LINK Ill RX EVB PWB 551600394 001 REV SECONDARY COMP SIDE SILKSCREEN LAYER 4 SERDESUB 16USB User s Guide 435 TEXAS INSTRUMENTS ee eee NATIONAL SEMICONDUCTOR CORP NATIONAL SEMICONDUCTOR CORP 980600394 FPD LINK RX EVB 980600394 FPD LINK Ill RX EVB PWB 551600394 001 REV PWB 551600394 001 REV PRIMARY COMP SIDE LAYER 1 GROUND PLANE LAYER 2 e U MI 30AM e V38 100 2020029102 899 NATIONAL SEMICONDUCTOR CORP NATIONAL SEMICONDUCTOR CORP 980600394 FPD LINK RX EVB 980600394 FPD LINK Ill RX EVB PWB 551600394 001 REV PWB 551600394 001 REV POWER PLANE LAYER 5 SECONDARY COMP SIDE LAYER 4 e 46 SERDESUB 16USB User s Guide SNLU100 April 2012
18. Module Video Data Ctrl DS90UB901Q Serializer 122 FPD LINK III DS90UB902Q Deserializer Host Controller FPGA Video Processor LCD Display 20 cr i Video Data Ctrl 435 TEXAS INSTRUMENTS Figure 2 Typical DS90UB901Q 902Q Camera System Diagram Figure 1 and Figure 2 illustrate the use of the Chipset Serializer Deserializer in a Camera to Host MCU FPGA Controller Refer to the proper datasheet information on Chipsets Serializer Deserializer provided on each board for more detailed information 4 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS How to set up the Demo Evaluation Kit DS90UB9010Q 902Q evaluation boards consist of two sections The first part of the board provides the point to point interface for transmitting parallel video data The second part of the board allows bi directional control communication of 2 bus control of using a MCU FPGA to programming a remote peripheral device the Deserailizer The PCB routing for the Serializer input pins DIN accept incoming parallel video data at 1 8V 3 3V LVCMOS signals from J1 IDC connector The FPD Link interface uses single twisted pair cable provided The output pins ROUT are accessed through a 7 IDC connector Please follow these steps to set up
19. TEXAS INSTRUMENTS Configuration Settings for the Serializer Demo Board VDDI 1 8V or 3 3V LVCMOS INPUT OUTPUT SELECTION 1 8V VDDI 3 3V JP2 VDDI LVCMOS I O level configuration VDDI 1 8V 3 3V IN VDD mel gt apply external 3 3V LVCMOS LVCMOS inputs inputs 1 Serializer Input Features Selection Reference InptzL Input H S ____ I2C Master Slave Master Slave MODE select Default PDB PowerDown Bar Powers Operational Down Default RES 0 MUST be C IMPORTANT tied low for See user note below normal operation Default Note In user layout RES 0 pin 7 MUST be tied low for proper operation 8 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS JP4 VR3 Address Decoder Reference Description ___ Setting Connector DS90UB901Q Enabled VSS I2C Device ID Address With jumper Default address Selection Default Default address OxBO h JP4 JP4 VRI VRI CAD 55 value adjustment Clockwise Counter via screw Clockwise JP4 MUST have a jumper to m use VR3 potentiometer o VR3 00 to 100 Decreases Increases Rip value Rip value The ID x CAD pin is used to set the physical slave address of the DS90UB901Q I2C only to allow up to six devices on the bus using only a single pin The Address Decoder employs a 10 pull up resistor to 1 8V and
20. a variable potentiometer VR3 for the pull down resistor to GND to generate six unique values based on the table below Once the address bits are latched on power up the device will keep the slave address until a power down or reset condition occurs 1 8V Serializer ID x or Deserializer Figure 3 ID x Pin Connection Diagram SNLU100 April 2012 SERDESUB 16USB User s Guide 9 435 TEXAS INSTRUMENTS Table 1 ID x Resistor Value 05900 9010 Slave Address Address 8 b Rid Resistor O Address 7 b 0 appended WRITE 75 101 1000 h 58 8b 1011 0000 7b 101 1001 2 8b 1011 0010 7b 101 1110 8b 1011 1100 A Serializer Bidirectional Control Bus SCL SDA I2C Compliant Reference Description Settings _ Connector __ 2 Port VDD I2C JP8 I2C Input Closed Open Port 12C power is VDD 12 power is applied through the applied externally VDDIO source with Note when onboard 1 connecting the bus pull up resistors externally the Default target source must have external pull up resistor 10 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS JP6 JP7 USB Red and Black wire Power wire in USB cable Red wire tied Red wire Red wire thru P3 and P2 not tied to VSS floating mounted connector Default not Jumper RED to VSS recommended recommended JP6 JP6 JP6 Note Normally VDD in USB app
21. application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI products or services might be or are used EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range specified in datasheet Exceeding the specified input range may cause unexpected operation and or irreversible damage to the EVM If there are questions concerning the input range please contact a TI field representative prior to connecting the input power Applying loads outside of the specified output range may result in unintended operation and or possible permanent damage to the EVM Please consult the EVM User s Guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 85 C The EVM is designed to operate properly with certain components above 60 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors and current sense resistors These types of devices can be identified using the EVM schematic located in the EVM User s Guide When placing measurement probes near these devices during operation please be aware th
22. or implied is granted under any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice Tl is not responsible or liable for such altered documentation Resale of TI products or services with statements different from or beyond the parameters stated by for that product or service voids all express and any implied warranties for the associated product or service and is an unfair and deceptive business practice Tl is not responsible or liable for any such statements Tl products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal in
23. 0 01 1 Verify that LOCK is lit This indicates the chipset is Locked 9 After initialization the camera PCLK clock and input data can begin transmission to the Serializer The Serializer locks onto PCLK input if present otherwise the on chip oscillator 25 MHz is used as the input clock source Note the MCU controller should monitor the LOCK pin and confirm LOCK H before performing any I2C communication across the link DS90UB901 Serializer OxBO DS90UB902 Deserializer 0 OxAO Figure 5 Virtual device addressing from MCU FPGA 12C controller Communication over Bi directional Control Channel in Camera Mode This section provides instructions for a simple 2 Read Write transaction over the bi directional control channel validating the interface between the host and Deserializer to Serializer 1 Check the Deserializer SER DEV ID register 0x07 contents 2 The value entered in Deserializer register 0x07 sets the target Serializer device to communicate with Load the Serializer slave address register 3 Host controller to load and transmit data byte to Serializer address OxBO 4 For verification purposes Serializer register 0 13 General purpose register will be exercised for reading and writing data Other Serializer registers can be programmed to check internal functions such as register 0x03 b 0 22 SERDESUB 16USB User s Guide SNLU100 April 2012 4
24. 1 Tx Demo Board Revision 1B Bill Of Materials Item Quantity Reference 1 2 1 12 2 2 13 2 3 4 C3 C4 C8 C9 4 2 C5 C6 5 6 C7 C16 C19 C20 C23 C27 6 2 C10 C11 7 6 14 15 18 26 28 29 8 5 17 21 22 24 25 9 2 C30 C31 10 3 JP1 JP3 JP8 11 5 JP2 JP4 JP5 JP6 JP7 12 1 JP9 13 1 J1 14 1 J2 15 2 3 4 16 1 45 17 1 J6 18 2 J8 J7 19 1 P1 20 1 P2 21 1 P3 22 18 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 23 1 R19 24 1 R20 25 4 R21 R35 R36 R37 26 1 R22 27 2 R24 R23 28 1 R25 29 1 R26 30 4 R27 R28 R33 R34 31 2 R29 R30 32 1 R31 33 1 R32 34 1 R38 35 2 R40 R39 36 1 1 37 1 U1 38 2 U2 U3 39 2 VR1 VR2 40 1 VR3 41 2 X2 X1 42 1 Y1 SNLU100 April 2012 Part 2 2uF 0 1uF 10uF open 0 1uF 0 1uF 22uF 22uF 0 01uF 100pF 2 Pin Header 3 Pin Header 2X10 Pin Header open HEADER 19x2 CONN JACK PWR open BANANA 2x4 pin Jumper open IDC1X4 SMA_open HSD 2X2 open mini USB 5pin open USB A 49 open 49 9 open 100K open 10K 0 Ohm 0402 open 82 5ohm open 100ohm open FB 1000 Ohm 0402 FB 1000 Ohm 0402 0 ohm open 0 ohm 0 ohm 0 Ohm 0402 1 0K SW DIP 3 DS90UB901Q LM1117IMP ADJ SOT223 open SVR100 open PCB Footprint 3528 21 CAP HDC 1206 CAP B CAP HDC 0603 CAP HDC 0603 CAP N CAP EIA B 3528 21 CAP HDC 0603 CAP HDC 0201 Header 2P Header 3P Header 2X10P 2x19 0 1 3 terminal thru hole power jack CON BANANA S IDC 2x4 IDC 1x4 Edge mo
25. 37O0HR OR EQUIVALENT COLOR GREEN 0 062 INCH NOM THICKNESS COPPER CLADDING SHALL BE 1 07 6 PLATING ALL HOLES AND CONDUCTIVE SURFACES SHALL BE PLATED WITH A MIN OF 001 INCH COPPER EXPOSED PADS TRACES SHALL BE PLATED 000030 MIN GOLD OVER NICKEL 000150 MIN 7 FABRICATION TOLERANCES END PRODUCT CONDUCTOR WIDTHS AND LAND DIAMETERS SHALL NOT VARY MORE THAN 002 INCH FROM THE 1 1 DIMENSIONS OF THE MASTER PATTERN THE CONDUCTIVE PATTERN SHALL BE POSITIONED SO THAT THE LOCATION OF ANY LAND SHALL BE WITHIN 010 INCH DIAMETER TO THE TRUE POSITION OF THE HOLE IT CIRCUMSCRIBES THE MINIMUM ANNULAR RING SHALL 002 INCH BOW AND TWIST SHALL EXCEED 010 INCH PER INCH 8 SOLDERMASK BOTH SIDES PER IPC SM 840 TYPE A CLASS B XXX COLOR GREEN THERE SHALL BE NO SOLDERMASK ON ANY LAND 9 SILKSCREEN THE LEGEND ON BOTH SIDES USING NON CONDUCTIVE EPOXY INK COLOR WHITE THERE SHALL BE NO INK ON ANY LAND 10 THE 00975 TRACES LAYER 1 TO BE 50 OHM SINGLE ENDED IMPEDANCE AND THE DIELECTRIC REFERENCED IN BOARD STACK DETAIL 15 SUGESTED HOWEVER TRACE WIDTHS AND OR DIELECTRIC THICKNESS MAY BE MICRO MODIFIED IN ORDER TO FABRICATE BOARDS TO THE REQUIRED IMPEDANCE NOMINALS TO A TOLERANCE OF 10 11 PCB MUST BE MADE OF US RECOGNIZED MATERIAL AND TRACEABLE FOR CROSTINI EVE 94V 0 MINIMUM FLAMMABILITY RATING AND MANUFACTURED BY A UL PWE 551600393 001 REV RECOGNIZE
26. 4 6 User s Guide NSTRUMENTS SNLU100 April 2012 SERDESUB 16USB User s Guide Table of Contents TABLE OF CONTENTS EK cn 1 2 CONTENTS OF THE DEMO EVALUATION 3 DS90UB901Q 902Q SERDES TYPICAL APPLICATION 3 HOW SET THE DEMO EVALUATION 5 BI DIRECTIONAL CONTROL BUS AND 12 MODES 0 0 00110 100000000207 6 DEMO BOARD POWER 6 DS9UB901Q SERIALIZER BOARD 2 7 CONFIGURATION SETTINGS FOR THE SERIALIZER DEMO BOARD 0 0 8 SERIALIZER LVCMOS AND FPD LINK
27. 5 1 i 2 ad 1 20 eue d pumos T zo eprs queuoduoo FX 989L 0 jo Yoed uo 02u8J9 0 HH0LE M4 pJepuejs esr 2 p4eoq p 4 SALON LNOAVT 1 TEXAS INSTRUMENTS 35 SERDESUB 16USB User s Guide SNLU100 April 2012 INSTRUMENTS 4X TEXAS peog OWS 606910654 HOLLO 3usuoduo2 Sg 195 995 2000 blLnod np as nz H A 12d oR p Haa d 2n T JU qva 59021 ajus wyo Qc FOCU 1244 125 was 2OSSUUA 58221 papue wya 06 ciu now LLLNOY Dos 0 LL YO m uno 001 BLNOY 5004 alinoy Dz0eanoesd T Potes SION 1n0AVT LLNOY ee E LT o mL sino Po zx Fino WAS OSH e inow iino olLnow LHOOgA HoldS Br 23500 SNLU100 April 2012 SERDESUB 16USB User s Guide 36 peog twag 6069100650
28. 5 INSTRUMENTS xL 069 0650 4OLVTTIOSO 317157141 OL SSA 01 HOLVT1 250 4350 OL GGA A 30 E Nid dH3dWnr 4351 4 1 eprs qusuaduoo ashi S 1100 z e E cy ili 3 ul i a 1 Log lt in S84 TeX SSA X yoo 804 __ 1T1dO0dA Ee 2 i 92 7118004 T amp x inod 210gA lonia 5 8 a2uepadur WYO 004 310N anoa 8 Gog 50 T as 310N 6 20004 a EL 6 Nid yog c 0 ___ 2 1 300190 Oldo alNid 2 se INO 59 ode Ya 0199 BNIG 8 20700 S5A 7 6290 1250 JJA OND BIno un en 53381 Papua ajBuis 05 papua wyo 05 SNLU100 April 2012 SERDESUB 16USB User s Guide 32 33 BOO OLUS X dia JUIN 10 o1 91915500 50 2 se L 001d9 79 SA SH uo Yj bua PONEN 92580 uo
29. D PRINTED CIRCUIT BOARD SUPPLIER PCB MUST BE PERMANENTLY DRILL DRAWING MARKED WITH UL RECOGNIZED MANUFACTURER S LOGO AND TYPE CODE AS 3 050 DESIGNATED IN THE UL RECOGNIZED DIRECTORY 4 500 DIX bd ed ibd bd I xl bled xL DLP PATE PEPERIT XXXX 0 000 NATIONAL SEMICONDUCTOR CORP 250 44 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS Deserializer Rx Demo PCB Layout T3 5V Bs C 48V National Semiconductor 5 E AN 226 R1 T c4 EN R JP YDE YDD RED BLK VSS VSS PASS LOCK LEES GPO 2 ROUTO GPIO 1 GPIO 3 ROUTI JP4 2 nmm 51 VRI CAD 51 55 L LES T uM Le 2 VDD 120 VDD 122 SCL SDA VSS NOT FOR EMI TESTING ASSY 980600394 BI VDD 46 RI US National Semiconductor _ 3 3 _IN JPG JP vpn RED BLK ygs 1 vs Jum VDDIO scl 3 E VOD Hp em 55 S YR NOT FOR EMI TESTING ASSY 980600394 MEM L NATIONAL SEMICONDUCTOR CORP 980600394 FPD LINK Ill RX EVB PWB 551600394 001 REV PRIMARY SIDE SILKSCREEN
30. Ill PINOUT BY CONNECTOR 12 DS9UB902Q DESERIALIZER BOARD nnnm nnn nnn 13 CONFIGURATION SETTINGS FOR THE DESERIALIZER DEMO BOARD 14 DESERIALIZER FPD LINK 1 PINOUT AND LVCMOS BY CONNECTOR 18 TYPICAL CONNECTION AND TEST EQUIPMENT 19 EVALUATION OF THE BI DIRECTIONAL CONTROL 3 20 E A 20 I COMMUNICATION OVER BI DIRECTIONAL CONTROL CHANNEL IN CAMERA 22 24 I C COMMUNICATION OVER BI DIRECTIONAL CONTROL CHANNEL IN DISPLAY MODE 26 TROUBLESHOOTING DEMO SET UP ih RnB REV RR Rn Rn 28 APPENDS GET c Em 30 SERIALIZER AND DESERIALIZER DEMO PCB SCHEMATICS 30 BOM BILL OF MATERIALS SERIALIZER DEMO inva PU SUCH REA 39 BOM BILL OF MATERIALS DESERIALIZER 40 DEMO POB LAYOUT 41 SERIALIZER TX DEMO PCB STACKUP 44 DESERIALIZER RX DEMO PCB LAYOUT isset reato ed eerta SER RUE 45 DESERIALIZER RX DEMO PCB
31. LAYER 5 SECONDARY COMP SIDE LAYER 4 42 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS e Bg oa m oon F ee 1 eoeou le 6 NATIONAL SEMICONDUCTOR CORP FPD LINK TX EVB PWB FPD LINK Ill TX REV 1 2 oe e SECONDARY COMP SIDE SOLDER MASK LAYER 4 ams NATIONAL SEMICONDUCTOR CORP 980600393 FPD LINK TX PWB 551600595 001 REV PRIMARY COMP SIDE SOLDER PASTE MASK SNLU100 April 2012 a m 0 M qm es Hee que LA A ean oe 26 e ee ee ae sm UB HE 5 a oe ee e 0 4 2 a eom a EN ee HH oux eec E gg e e um e le NATIONAL SEMICONDUCTOR CORP FPD LINK TX EVB PWB FPD LINK TX REV 1 PRIMARY COMP SIDE SOLDER MASK LAYER 1 E NATIONAL SEMICONDUCTOR CORP 980600393 FPD LINK Ill TX EVB PWB 551600393 001 REV A SECONDARY COMP SIDE SOLDER PASTE MASK ee SERDESUB 16USB User s Guide 43 4 5 INSTRUMENTS Serializer Tx Demo PCB Stackup SILKSCREEN ASSY SIDE 1 SOLDERMASK ASSY SIDE 1 PRIMARY COMP SIDE 1 OZ LAYER 1 PREPREG 007 THK HOLE CHART GROUND PLANE 1 OZ
32. ables made For optimal performance we recommend Shielded Twisted Pair STP 100 differential impedance and 24 AWG or larger diameter cable for high speed data applications Leoni Dacar 538 series cable WwWw leoni automotive cables com Rosenberger HSD connector www rosenberger de en Products 35 Automotive HSD php Equipment References Corelis CAS 1000 I2C E I2C Bus Analyzer and Exerciser Products www corelis com products I2C Analyzer htm SNLU100 April 2012 SERDESUB 16USB User s Guide 29 435 TEXAS INSTRUMENTS Appendix Serializer and Deserializer Demo PCB Schematics 30 SERDESUB 16USB User s Guide SNLU100 April 2012 peog twag xL 1069 0650 94102 p epris g cm IMEEM EUM L zo 1 9 i 9430 6 eue d punous Z Tt L T zo eprs queuoduoo 9GL 0 pieoq 10 19 102 Yoesd Syopue s F HH04 44 2 peog L SALON LNOAV 1 1 TEXAS INSTRUMENTS 31 SERDESUB 16USB User s Guide SNLU100 April 2012 45
33. ap points for monitoring or applying signals additional pads for termination and multiple connector options 2 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS System Requirements In order to demonstrate the following are required 1 Video source with 1 8V or 3 3V LVCMOS parallel interface 2 Microcontroller MCU or FPGA with I2C interface bus 12 master a slave clock stretching must be supported by the I2C master controller MCU 3 External peripheral device that supports 12 slave mode 4 Power supply for 1 8V required and 3 3V optional Contents of the Demo Evaluation Kit 1 One Serializer board with the DS90UB901Q 2 One Deserializer board with the 05900 9020 3 One 2 meter high speed USB 2 0 cable 4 pin USB A to 5 pin mini USB 4 Evaluation Kit Documentation this manual 5 0590089010 9020 Datasheet DS90UB901Q 902Q Serdes Typical Application Camera Module Image Sensor Video Data Video Data Pixel Clock MCU FPGA aT Ln 000000000000 Bidirectional 0590089010 DS90UB902Q Bidrectional Control Bus Serializer Deserializer Control Bus Figure 1 Typical Application The diagram above illustrates a typical application of DS90UB901Q 902Q chipset The MCU FPGA can program device registers on the DS90UB901Q 05900 9020 and remote peripheral device such as a camera SNLU100 April 2012 SERDESUB 16USB User s Guide 3 Camera
34. at these devices may be very warm to the touch Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2012 Texas Instruments Incorporated NOTES IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete products are sold subject to 115 terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed Tl assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express
35. below SNLU100 April 2012 SERDESUB 16USB User s Guide 5 435 TEXAS INSTRUMENTS Bi Directional Control Bus And 12 Modes In order to communicate and synchronize with remote devices on the I2C bus through the bi directional control channel slave clock stretching must be supported by the 12 master controller MCU The chipset utilizes bus clock stretching holding SCL line low during data transmission where the 2 slave pulls the SCL line low prior to the 9th clock of every I2C data transfer before the ACK signal The bidirectional control bus supports is a I2C compatible interface that allows programming of the DS90UB901Q 05900 9020 or an external remote device such as a camera or display Register programming transactions to from the DS90UB901Q 902Q chipset are employed through the clock SCL and data SDA lines These two signals have open drain I Os and must be pulled up to VDDIO by external resistors The boards have an option to use the on board 1 pull up resistors tied to VDDIO or connected through external pull ups at the target Host The appropriate pull up resistor values will depend upon the total bus capacitance and operating speed The DS90UB901Q 902Q 12C bus data rate supports up to 100 kbps according to I2C specification To start any data transfer the DS90UB901Q 902Q must be configured in the proper I2C mode Each device can function as 2 slave proxy or master proxy depending on the mo
36. ccordingly Keep the power off 2 Verify that all the jumper positions and switches are correctly set NOTE For Display Mode the default settings for switch 51 5 on 51 for the 05900 9010 Serializer and D590UB902Q Deserializer boards must be reversed 227 059008901 Q board S1 3 Connect the USB interface cable between P3 DS90UB901Q board connector and J2 connector 05900 9020 board 4 Set hardware configuration for DS90UB901Q Serializer and DS90UB902Q Deserializer devices a Peripheral device display address is set to b Set to Display mode Serializer MODE M_S pin H and Deserializer MODE M 5 L c Serializer and Deserializer 2 slave address ID x CAD pin i Serializer Rid Oohm Serializer 12C slave address is 0 0 ii Deserializer Rid Oohm Deserializer I2C slave address is OxCO 5 Turn on the 1 8V and 3 3V power supplies 6 Before initiating any I2C commands the Serializer needs to be programmed with the target slave device address and Deserializer device address DES DEV ID Register OxO6h sets the Deserializer device address and SLAVE D register Ox7h sets the remote target slave address If the I2C slave address matches any of registers values the I2C slave will hold the transaction allowing read or write to target device Note In Display mode operation registers OxO8h 0x17h Deserializer must be reset to 0 00 7 Execute I2C instructions to write the fo
37. de 17 435 TEXAS INSTRUMENTS Deserializer FPD Link Pinout and LVCMOS by Connector The following three tables illustrate how the Deserializer connections mapped to the IDC connector J7 the mini USB connector J2 and the mini USB connector J11 pinouts Note labels are also printed on the demo boards for both the FPD Link LVCMOS inputs outputs J7 J2 J11 LVCMOS topside bottom side FPD Link Ill not mounted FPD Link pin no name GND 18 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS Typical Connection and Test Equipment The following is a list of typical test equipment that may be used to generate signals for the Serializer inputs 1 Digital Video Source for generation of specific display timing such as CMOS imager or Graphics Controller with digital video signals 1 8V 3 3V LVCMOS 2 Any other signal generator video source that generates the correct input levels The following is a list of typical test equipment that may be used to monitor the output signals from the Deserializer 1 Controller or capture card which supports digital video signals 1 8V 3 3V LVCMOS 2 Video capture card 3 Microcontroller or FPGA with an 2 interface 4 Optional Logic Analyzer or Oscilloscope 5 Any SCOPE with a bandwidth of at least 2 for 1 8V 3 3V LVCMOS and or 1 5GHz for observing differential signals Figure 4 below illustrates an applica
38. de determined by MODE M 5 pin Note the MODE pin is label as M S on the boards The Ser Des interface acts as a virtual bridge between Master controller MCU and the remote device When the MODE M 5 is set to High the device is treated as a slave proxy acts as a slave on behalf of the remote slave When addressing a remote peripheral or Serializer Deserializer not wired directly to the the slave proxy will forward any byte transactions sent by the Master controller to the target device When MODE M 5 pin is set to Low the device will function as a master proxy device acts as a master on behalf of the I2C master controller Note that the devices must have complementary settings for the MODE configuration For example if the Serializer MODE M S is set to High then the Deserializer MODE M S pin must be set to Low and vice versa Demo Board Power Connections The Serializer and Deserializer boards must be powered by supplying power externally through J3 VDD and J4 VSS on Serializer Board and J4 VDD and J5 VSS on Deserializer board Note 2 5V is the MAXIMUM voltage that should ever be applied to the Serializer J3 or Deserializer J4 VDD terminal Serializer JP1 and Deserializer VDDIO JP1 must never exceed 4 0V Damage to the device s can result if the voltage maximum is exceeded 6 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS DS9UB901Q Serializer Board Descr
39. enabled to receive data directly from the 2 Master Controller 2 transfers are processed in one byte basis After receiving one byte the Deserializer slave will need to acknowledge ACK the transfer to receive the next following byte The Deserializer slave holds SCL low clock stretch for the required period until an ACK or NACK is established and then releases it The Deserializer I2C slave acknowledges all the transfers addressed to Deserializer Serializer or remote device 7 Before initiating any 12C commands the Deserializer needs to be programmed with the target slave device addresses and Serializer device address SER DEV ID Register 0x07h sets the Serializer device address SLAVE x SLAVE x INDEX registers 0x08h 0x17h set the remote target slave addresses In slave mode the address register is compared with the address byte sent by the I2C master If the addresses are equal to any of registers values the 2 slave will acknowledge and hold the bus to propagate the transaction to the target device otherwise it returns no acknowledge 8 Execute I2C instructions to write the following registers a Assign ID Match values for camera address on Deserializer i Write OxAO to Register 0x08 of Deserializer 0xCO li Write OxAO to Register 0x10 of Deserializer 0xCO SNLU100 April 2012 SERDESUB 16USB User s Guide 21 435 TEXAS INSTRUMENTS b 0590089020 Deserializer 0xCO i Write 0 04 to Register
40. ey use any non designated products in automotive applications TI will not be responsible for any failure to meet such requirements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive DSP dsp ti com Broadband www ti com broadband Interface interface ti com Digital Control www ti com digitalcontrol Logic logic ti com Military www ti com military Power Mgmt power ti com Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Security www ti com security RFID www ti rfid com Telephony www ti com telephony Low Power www ti com lpw Video amp Imaging www ti com video Wireless Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2012 Texas Instruments Incorporated
41. he specifications indicated in the User s Guide the board kit may be returned within 30 days from the date of delivery for a full retund THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE The user assumes all responsibility and liability for proper and safe handling of the goods Further the user indemnifies TI from all claims arising from the handling or use of the goods Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive Tl assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the User s Guide and specifically the Warnings and Restrictions notice in the User s Guide prior to handling the product This notice contains important safety information about temperatures and voltages For additional information on environmental and or safety programs please contact the
42. iption The 2x17 pin IDC connector J1 accepts 16 bits of 1 8V or 3 3V data along with the PCLK clock input must be set externally for 1 8V 3 3V LVCMOS inputs The Serializer board is powered externally from the J3 VDD and J4 VSS connectors shown below For the Serializer to be operational the 51 switch on S1 must be set HIGH S1 RESO must be set LOW Master or slave mode is user selected on S1 M S MODE please refer to DS90UB901 902 datasheet for details The USB connector P3 USB A side on the bottom side of the board provides the interface connection to the Deserializer board Note P2 mini USB on the top side is un stuffed and not to be used with the cable provided in the kit 4 T T RO D FPD Link III 1 VDD and VSS MUST be 7 NI 2 LVCMOS INPUTS lied externally f oe 2 5 lm M 3 FUNCTION CONTROLS 2 VDDI 3 3V should be applied separately on JP1 with default jumper on JP2 4 POWER SUPPLY 2 1 VR VDDI 3 3V otherwise jumper VDDI to LH C 1 8V National 12C BUS CONTROL Semiconductor 2 em J1 U1 mun cic N Connect cable USB A side to P2 on BACKSIDE D P3 BACKSIDE D P2 TOPSIDE 51 3 UNSTUFFED VDD d E Je JP8 NOT FOR EMI TESTING ASSY 980600393 SNLU100 April 2012 SERDESUB 16USB User s Guide 7 435
43. jury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or support that may be provided by Further Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the products are specifically designated by as military grade or enhanced plastic Only products designated by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which has not designated military grade is solely at the Buyer s risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use TI products are neither designed nor intended for use in automotive applications or environments unless the specific Tl products are designated by as compliant with ISO TS 16949 requirements Buyers acknowledge and agree that if th
44. lication Power wire in USB cable Black wire Black wire Black wire thru P3 and P2 not tied to VDD tied to VSS floating mounted connector Default not Jumper BLACK to VSS recommended recommended VDD VDD VDD JP7 Hm JP7 7 VSS VSS VSS Note Normally VSS in USB application i mounted solder side SNLU100 April 2012 SERDESUB 16USB User s Guide 11 435 TEXAS INSTRUMENTS Serializer LVCMOS and FPD Link III Pinout by Connector The following three tables illustrate how the Serializer connections mapped to the IDC connector J1 the FPD Link I O on the USB A connector P3 and the mini USB P2 not mounted pinouts Note labels are also printed on the demo boards for both the LVCMOS inputs outputs and FPD Link I Os J1 P3 P2 LVCMOS I O bottom side topside FPD Link Ill not mounted GND GPIO 0 FPD Link Ill HEN Dow 12 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS DS9UB902Q Deserializer Board Description The USB connector J2 mini USB on the topside of the board provides the interface connection for FPD Link III signals to the Serializer board Note J11 mini USB on the bottom side is un stuffed and not used with the cable provided in the kit The Deserializer board is powered externally from J4 VDD and J5 VSS connectors shown below For the Deseria
45. lizer to be operational the S1 switch PDB must be set HIGH S1 RESO BISTEN Normal mode must be set LOW Master or slave mode is user selected on S1 M 5 The 2x17 pin IDC Connector J7 provides access to the 16 bit 1 8V or 3 3V LVCMOS and PCLK clock outputs 4 J4 5 JP1 Note 1 VDD and VSS MUST be applied externally from here 2 VDDI 3 3V should be applied separately on JP1 with default jumper on JP2 VDDI 3 3V otherwise jumper VDDIO to 1 8V National Semiconductor _ D FPD Link III 2 LVCMOS OUTPUTS Cop se map 3 FUNCTION CONTROLS mini USB side to J2 in i RO POWER SUPPLY on TOPSIDE vss vss es IS D J2 TOPSIDE i CD J11 BACKSIDE UNSTUFFED 9 s 5 JP8 JP9 J8 TESTING ASSY 980600394 SNLU100 April 2012 SERDESUB 16USB User s Guide 13 435 TEXAS INSTRUMENTS Configuration Settings for the Deserializer Demo Board VDDIO 1 8V or 3 3V LVCMOS INPUT OUTPUT SELECTION 1 8V VDDIO 3 3V VDDIO VDDIO LVCMOS VDDIO 1 8V VDDIO 3 3V I O level configuration Default apply external LVCMOS 3 3V LVCMOS 51 Deserializer Input Features Selection Input L Input H S1 __ PowerDown Bar Power Operational Down Default Disabled BISTEN BIST Enable Pin Normal BIST Mode is operating mode BIST is disabled Defa
46. llowing registers 05900 9010 Serializer OxBO b Set target slave device address on the Serializer i Write to Register 0 07 of Serializer OxBO SNLU100 April 2012 SERDESUB 16USB User s Guide 25 435 TEXAS INSTRUMENTS 1 Verify that LOCK LED2 is lit This indicates the chipset is Locked 8 After initialization the PCLK clock and input data can begin transmission to the Serializer The Serializer locks onto PCLK input if present otherwise the on chip oscillator 25 MHz is used as the input clock source Note the user should monitor the LOCK pin and confirm LOCK H before performing any I2C communication across the link LCD DS90UB902 DS90UB901 Display Deserializer Serializer OxAO OxCO OxBO Figure 8 Virtual device addressing from GPU FPGA 12 controller Communication over Bi directional Control Channel in Display Mode This section provides instructions for a simple 2 Read Write transaction over the bi directional control channel validating the interface between the host and Serializer to Deserializer 26 1 Check the Serializer DES DEV ID register 0x06 contents 2 The value entered in Serializer register 0x06 sets the target Deserializer device to communicate with Load the Deserializer slave address register 3 Host controller to load and transmit data byte to Deserializer address OxCO 4 For verification purposes Deserializer register Ox13 General purpose register will be exerci
47. mits of computing devices pursuant to part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference EVALUATION BOARD KIT IMPORTANT NOTICE Texas Instruments TI provides the enclosed product s under the following conditions This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use Persons handling the product s must have electronics training and observe good engineering practice standards As such the goods being provided are not intended to be complete in terms of required design marketing and or manufacturing related protective considerations including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards This evaluation board kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility restricted substances RoHS recycling WEEE FCC CE or UL and therefore may not meet the technical requirements of these directives or other related directives Should this evaluation board kit not meet t
48. r jack 19 2 J4 J5 BANANA CON BANANA S 20 1 J6 2x4 pin Jumper open IDC 2x4 21 1 J7 HEADER 19x2 2x19 0 1 22 1 J8 IDC1X4 IDC 1x4 23 2 J10 J9 SMA open Edge mount 24 1 J11 mini USB 5pin open mini B USB surface mount 25 1 LED1 0402 orange LED 402 26 1 LED2 0603 green LED 0603 Super Thin 27 1 P1 USB A open USB TYPE A 4 28 2 R1 R2 49 90hm open RES HDC 0201 29 1 R3 100K open RES HDC 0603 30 5 R4 R19 R20 R21 R22 10K RES HDC 0603 31 1 R5 0 Ohm 0402 open RES HDC 0402 32 2 R6 R7 82 5 RES HDC 0603 33 1 R8 100ohm open RES HDC 0603 34 6 R9 R10 R11 R16 R17 R18 FB 1000 Ohm 0402 RES HDC 0402 35 2 R12 R13 0 ohm open RES HDC 0201 36 2 R14 R15 0 ohm RES HDC 0201 37 1 R23 0 Ohm 0402 RES HDC 0402 38 2 R25 R24 1 0K RES HDC 0603 39 1 S1 SW DIP 4 DIP 4 40 1 U1 DS90UB902Q 40ld LLP 41 2 U2 U3 LM11171MP ADJ SOT223 open SOT223 42 2 VR2 VR1 SVR100 open Surface Mount 43 1 VR3 SVR100K Surface Mount 44 2 X2 X1 TP_0402 TP 0402 40 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS Serializer Tx Demo PCB Layout National Semiconductor Poor Bee C 6 N N N N N N N N N N 7279 ama CO Cn d Ca ND 255 Ip T 7 VDD VDD RED BLK VSS NOT FOR EMI TESTING 0 2 ASSY 980600393 YR2 National Semiconductor Au EE CE Cet 1 00000000 2 LT gt
49. sed for reading and writing data Other Deserializer registers can be programmed to check internal functions such as register 0x03 b 0 RRFB 5 Host controller to load and transmit write transaction to register byte 0x13 OxFF Note default of register 0x13 0x00 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS 6 Host controller to read back Deserializer OxCO register 0 13 OxFF Read data from OxBO Write Verify 0 0 Reg 0x06 0 0 Read data from 0 0 Register 0 13 0 00 Write to OxCO Reg 0x13 OxFF Read data from 0 0 Register 0 13 OxFF Data received match NO Configuration Serializer ADDR OxBOh Slave mode MODE H PDB H Deserializer ADDR OxCOh Master mode MODE BISTEN L PDB H LOCK H Read Deserializer Register 0x06 SER DEV ID Write command to Deserializer Reg 0x06 SER DEV ID Send Read command to Serializer Reg 0x13 GPCR Read Back Serializer Reg 0 13 GPCR Send Write command to Serializer Reg 0x13 GPCR Send Read command to Serializer Reg 0x13 GPCR Read Back Serializer Reg 0x13 GPCR Figure 9 Bi directional Control Channel Communication Flowchart in Display Mode SNLU100 April 2012 SERDESUB 16USB User s Guide 27 4 6 INSTRUMENTS Troubleshooting Demo Setup
50. the command and generate an I2C transaction on its local 2 bus At the same time the Serializer will capture the response on the I2C bus and return the response on the forward channel link The Deserializer parses the response and passes the appropriate response to Deserializer 2 bus 20 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS Procedure Camera Mode 1 Connect the 1 8V and 3 3V power with 1 8V and 3 3V supplies accordingly Keep the power off 2 Verify that all the jumper positions and switches are correctly set as per default positions defined in Configuration Settings for the Serializer Deserializer Demo Board tables 3 Connect the USB interface cable between 05900 9010 board connector and J2 connector 05900 9020 board Note that hot plugging assertion of cable between Serializer and Deserializer is not supported 4 Set hardware configuration for DS90UB901Q Serializer and D590UB902Q Deserializer devices a Verify peripheral device camera address is set to b Setto Camera mode Serializer MODE M S pin L and Deserializer MODE M S pin c Set Serializer and Deserializer 2 slave address ID x CAD pin i Serializer Rid Oohm Serializer 12C slave address is 0 0 ii Deserializer Rid Oohm Deserializer 12C slave address is 5 Turn on 1 8V and 3 3V power supplies 6 The DS90UB902Q Deserializer 2 slave is
51. the evaluation kit for bench testing and performance measurements 1 A two 2 meter high speed USB 2 0 cable has been included in the kit Connect the 4 pin USB A side of cable harness to the serializer board and the other side of the harness the 5 pin mini USB jack ELA to the Deserializer board This completes the FPD Link interface connection NOTE The DS9UB901Q and DS9UB902Q are NOT USB compliant and should not be plugged into a USB device nor should a USB device be plugged into the demo boards 2 Jumpers and switches have been configured at the factory they should not require any changes for immediate operation of the chipset See text on Configuration settings and datasheet for more details 3 From the video source connect a flat cable not supplied to the Serializer board and connect another flat cable not supplied from the Deserializer board to the controller Note For 50 ohm signal sources provide 1 8V 3 3V LVCMOS input signal levels into DIN 13 0 H5 V5 and and add 50 ohm parallel termination resistors R3 R19 on the DS9UB901Q Serializer board 4 Connect the Serializer 12C ports to the 12C of the peripheral slave device Connect the Deserializer 2 ports to the I2C bus of the MCU FPGA I2C master 5 Power for the Serializer and Deserializer boards must be supplied externally through Power Jack VDD Grounds for both boards are connected through Power Jack VSS see section
52. tion using a camera connected to DS90UB901Q with 2 bus and MCU FPGA controller connected to DS90UB902Q with I2C bus Both Camera video and control information are transferred on the same serial video link SNLU100 April 2012 SERDESUB 16USB User s Guide 19 435 TEXAS INSTRUMENTS Evaluation of the Bi directional Control Channel This section describes how to perform 12C instructions between MCU FPGA and a remote peripheral device through the 05900 9020 and 0590089010 pair configured in a camera type of application Figure 4 shows the configuration of evaluation boards for 2 communication A MCU FPGA controller with an 2 interface is required Refer to the DS90UB9010Q 902Q datasheet for the definition of each register 1 8V 3 3V 1 8V 3 3V 3 3V 1 0 Camera 3 3V I O Module DIN 13 0 ROUT 13 0 HS VS HS VS PCLK PCLK P PDB GPiog DS90UB901Q DS90UB902Q MCU FPGA GPIO1 Serializer Deserializer 1 Host PASS LOCK MODE M S BISTEN RESO OxBO J OxCO Figure 4 Example of DS90UB901Q 902Q in Camera Application Camera Mode In Camera mode 2 transactions originate from the Master controller at the Deserializer side Figure 4 The 12 slave core in the Deserializer will detect if a transaction is intended for the Serializer or a slave at the Serializer Commands are sent over the bi directional control channel to initiate the transactions The Serializer will receive
53. ult 5 2 Master Slave Master Slave MODE select Default RES O Reserved MUST be IMPORTANT tied low for See user note below normal operation Default Note In user layout RES 0 pin 39 MUST be tied low for proper operation enabled 14 SERDESUB 16USB User s Guide SNLU100 April 2012 4 6 INSTRUMENTS JP8 VR3 Address Decoder Reference JP8 0590089020 I2C Device ID Address Selection Default address OxCO h Rip value adjustment via screw JP8 MUST have a jumper to use VR3 potentiometer VR3 00 to 100 Description Enabled With jumper t 4 CAD 55 Clockwise VRS Setting Connector VSS Default address Default VRI CAD VSS Counter Clockwise VR3 Increases Rip value The ID x CAD pin is used to set the slave address of the DS90UB902Q I2C only to allow up to six devices on the bus using only a single pin The Address Decoder employs a 10 kQ pull up resistor to VDD 1 8V and a variable potentiometer VR3 pull down resistor Rip to generate six unique values based on the table below Once the address bits are latched on power up the device will keep the slave address until a power down or reset condition occurs Table 2 ID x Resistor Value DS90UB902Q Slave Address Address 8 b Rid Resistor Address 7 b 0 appended WRITE 7100000 60 8b
54. unt CON HSD 4P mini B USB surface mount USB TYPE A 4 RES HDC 0201 RES HDC 0805 RES HDC 0603 RES HDC 0603 RES HDC 0402 RES HDC 0603 RES HDC 0603 RES HDC 0402 RES HDC 0402 RES HDC 0201 RES HDC 0201 RES HDC 0201 RES HDC 0402 RES HDC 0603 DIP 3 32ld LLP SOT223 Surface Mount SVR100K Surface Mount _0402 TP 0402 OSC4 SM 4 PIN SMT SERDESUB 16USB User s Guide 39 4 6 INSTRUMENTS BOM Bill of Materials Deserializer Demo PCB DS90UB902 Rx Demo Board Board Stackup Revised Tuesday July 27 2010 DS90UB902 Rx Demo Board Revision 1B Bill Of Materials Item Quantity Reference Part PCB Footprint 1 4 C1 C2 C6 C7 10uF open CAP B 2 1 C3 0 1uF open CAP HDC 0402 3 4 C4 C5 C12 C13 0 1 0603 4 2 C8 C11 220 5 2 9 14 2 2UF 3528 21 6 2 15 10 0 1 1206 7 21 16 17 18 19 20 21 0402 0402 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 8 7 C37 C38 C41 C50 C51 C54 22uF CAP EIA B 3528 21 C55 9 6 C39 C42 C45 C46 C49 C53 O 1uF CAP HDC 0603 10 6 C40 C43 C44 C47 C48 C52 0 01 CAP HDC 0603 11 2 C56 C57 100pF CAP HDC 0201 12 3 JP1 JP3 JP9 2 Pin Header Header 2P 13 4 JP2 JP6 JP7 JP8 3 Pin Header Header 3P 14 2 JP5 JP4 2 Pin Header open Header 2P 15 1 JP10 2X10 Pin Header open Header 2X10P 16 1 J1 HSD 2X2 open CON HSD 4P 17 1 J2 mini USB 5pin mini B USB surface mount 18 1 J3 CONN JACK PWR open 3 terminal thru hole powe
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