Texas Instruments TA5704EVM User's Manual
Contents
1.2. 9 5 Top Layer Composte ee een 14 6 TOP LAY a a 15 7 Bottom 16 List of Tables 1 Recommended Power Supplies ee ne REEF PESE EE CS 10 2 TAS5704 SDINX Source aD 11 3 TAS5 7 04 Gain Configuration 12 4 1AS5704 Data Eee 5 DIR9001 SPDIF Output Data 12 6 TAS5704 Qutp t Gonfiguraliona ae E nee ie 13 7 Bill of Materials for TAS5704EVM nannennennnannnunannnannnunnnnnunnnannannannnannannnunnannannnannnunnnnnannnen nun 17 List of Figures SLOU224 April 2008 Submit Documentation Feedback I TEXAS Preface INSTRUMENTS SLOU224 April 2008 Read This First About This Manual This manual describes the operation of the TAS5704EVM evaluation module from Texas Instruments How to Use this Manual This document contains the following chapters Chapter 1 Overview Chapter 2 System Interfaces Chapter 3 Jumpers and Control Utilities on TAS5704 Chapter 4 TAS5704EVM Layout Information About Cautions and Warnings This manual may contain cautions and warnings CAUTION This is an example of a caution statement A caution statement describes a situation that could potentially damage your software or e
3. Table 5 DIR9001 SPDIF Output Data Format 1 1 0 0 16BIT 0 1 24BIT RJ 1 0 24BIT LJ 1 1 24BIT I2S Default SHUNT IN 0 SHUNT OUT 1 See schematic for details CONFIG Jumpers CFG1 and CFG2 jumpers are used to select the output configuration between single ended outputs and bridge tied outputs or a combination of the two options See Table 6 for summary of possible settings TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control SLOU224 April 2008 Submit Documentation Feedback TEXAS INSTRUMENTS www ti com Jumpers and Control Utilities Table 6 TAS5704 Output Configuration Jumper CFG2 Jumper CFG1 Shunt IN 0 Shunt IN 0 GAIN dB 2 Channel BTL Mode AD Modulation Connect speakers across OUTA OUTB and g OUTC OUTD 0 1 2 Channel BTL Mode BD Modulation Connect speakers across OUTA OUTB OUTC OUTD 2 Channel SE Mode AND 1 Channel BTL Mode AD Modulation Connect Left Right 1 0 speakers across OUTA Center terminal side of speaker connected to OUTA and OUTB Center terminal side of speaker connected to Center terminal Connect Subwoofer across OUTC D Remove jumpers JP3 JP6 4 Channel SE Mode AD Modulation Connect Speakers across OUTA Center OUTB Center and OUTC Center OUTD Center OUTB and OUTD are inverted internally connect side of speaker to center terminal GND
4. C20 C21 C22 R11 R13 R14 R15 45 Schematic The schematics are appended to this document SLOU224 April 2008 Submit Documentation Feedback TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 19 SPDIF RECEIVER ENGINEERING EVALUATION ONLY SCKO R43 MN 47 LOCK R66 U2 1 2 R64 1 00M 2 1 CKSEL m PGND m 7 50K error 27 100 3 C88 R65 1 5 INV2 JFSOUT1 R63 4 99K 1 2 iid 1 e D 5 Lon m 3 3V i 047ufd 16V JAAHETGUGA 47ufd 16V 3 3V Vdd ini PGND 22e 74 16004 6 o PGND Vec 3 3V SPDIF RCA INPUT a PGND PGND AGND AGND SPDIF SPDIF FORMAT x R32 1 5 FILT PGND penny De ses T ads 4 FMTO zz co 12 288MHz TERTS _ E 24Bit MSB RJ L C65 33pfd 50V ae 2 4 OPTO INPUT pos Pauls 1 RSV 873 SHUNTS IN 0 3 3V Vee OUT 11 Bcko BFRAME SHUNTS OUT 1 JUMPER NOTES emp 7 PGND 1 2 SPDIF CLOCKS DATA li 3 pscko uour Zu 2 3 CLOCKS DATA PSIA TO PGND TORX147LFT 14 psck MCLK TAS5704 DIR9001PW E PGND W 499K JP1 IN SCKO 512 Fs pour er
5. so that OUTB and OUTD will be in phase with OUTA and OUTC Remove jumpers JP3 JP6 and JP7 JP10 3 7 Switches RESET is an active low function Pressing master reset switch 52 resets TAS5704 and DIR9001 Releasing the switch will take the devices out of reset POWER DOWN function is an active low function Pressing the power down switch S3 powers down TAS5704 outputs remain switching at 5096 duty cycle Releasing the switch will take the device out of power down MUTE is an active low function Pressing the mute switch 84 mutes TAS5704 Releasing the switch will take the device out of mute SLOU224 April 2008 Submit Documentation Feedback TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 13 5 INSTRUMENTS Board Layout Bill of Material and Schematics www ti com 4 Board Layout Bill of Material and Schematics 41 TAS5704EVM Board Layout m un View Figure 5 Top Layer Composite 14 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control SLOU224 April 2008 Submit Documentation Feedback TEXAS INSTRUMENTS www ti com Board Layout Bill of Material and Schematics 42 TAS5704EVM Board Layout Layer View Figure 6 Top Layer SLOU224 April 2008 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 15 Submit Documentation Feedback TEXAS INSTRUMENTS Board Layout Bill of Material and Schematics www
6. 1 2 SCLK 1 2 LRCLK 1 2 DAUGHTERCARD HW3 T 7 _ GND LOOP TAS5601EVM2 5 5 SH6 SH7 SHB J1 jus 15 2 3 16 2 3 GAINO GAIN1 GND LOOP BENT N E PGND Y SH9 SH10 SH11 2 FMO FM1 PWM B RESET PAT SHUTDOWN PROJECT TAS5704 EVALUTION MODULE TO FROM Ti Design Team RYAN TAS5704 EXAS Schematic Rev NC Mod PCB Rev NC Sheet 4 of 6 INSTRUMENTS Save Date JULY 10 2007 Print Date Tue Jul 10 2007 Filename TAS5704EVM SCH Drawn By LDN REVISION CHANGES REVISION DESCRIPTION DATE APPROVAL cx PROJECT TAS5704 EVALUTION MODULE 4 Design Team RYAN TEXAS Schematic NC Mod NC PCB Rev NC Sheet 5 of 6 INSTRUMENTS Save Date JULY 10 2007 Print Date Tue Jul 10 2007 Filename TAS5704EVM SCH Drawn By LDN TEXAS INSTRUMENTS DISCLAIMER DISCLAIMER The information and materials Materials provided here are provided by Texas Instruments Incorporated TI as a service to its customers and or suppliers and may be used for informational purposes only and only subject to the following terms By downloading or viewing these Materials you are signifying your assent to these terms 1 These preliminary evaluation schematics are intended for use for PRELIMINARY ENGINEERING DEVELOPMENT AND EVALUATION PURPOSES ONLY and are not considered
7. 1 42 4CH 4xSE DEFAULT 3 3 m VALID i SHUTDOWN SHUTDOWN AMn R19 10K 06 PROJECT TAS5704 EVALUTION MODULE FROM SUBWOOFER DAUGHTERCARD SHEER Xv NA A P I Desion Team RYAN _ 2 Yellow 392 Y PGND Yellow 392 TEXAS SHUTDOWN SHUTDOWN 9 2 BKND ERR Schematic NC Mod NC PCB Rev 3 of 6 EN INSTRUMENTS Save Date JULY 10 2007 Print Date Tue Jul 10 2007 Filename TAS5704EVM SCH Drawn By LDN POWER SUPPLIES HIGH VOLTAGE POWER INPUTS EMI PVCC SNUBBERS TO TAS5704 Red PVCC B gn BES 2 3 5 gW e 075 ER ee PGND PGND D 5 F PVCC 10 26V s 5 asx PGND PGND 954 23 x 5 e WPGND WPGND TO SUBWOOFER DAUGHTERCARD 3 3V TO TAS5704 3 3V TO ADC pac c LOW VOLTAGE sv POWER INPUTS VIN VR1 3 3V 1A TO ADC 5 6 e Re Q 5V 5 E IN our 5 3 3V gt gt Ze NC R61 ats Black o D Ro TEN i o ER PX uj 2 8 9 5 Gnd 2 2 Es 85 mE B 5 ul 2 GND wPGND StS 873 19 SN TPS767330D 249 STE 915 9159865 2164 2 IN a 5 ose 9 PGND a uen PGNDW PGNDW PGNDW PGND 228 a PGND PGND PGND PGND SUBWOOFER CONNECTOR BOM ONLY TO SH1 SH2 SHS SUBWOOFER pie MCLK 1 2 SDATA
8. 26 vss i a C13 4748 63 ee sr s uvSN PGND 27 Wm Dic 1 0ufd 25V PGND AGND PGND d SE SHUNTS OUT 5 C25 Q 1ufd 16V 95 45 28 1 0 22ufd 25V WY PGND 29 T oe O 52 3 T m TE 2 GAIN1 GAINO CHANNEL GAIN dB 30 FORMAT2 as g i Pvee e 51 gt UC EM ee a 1000ufd 35V E 2 S S S C40 c50 C34 R15 2 R1 0 0 20 DEFAULT 31 FORMATI amp LH 9 m T 1 2 0 4 26 a x o B gi aah 88 99 ou c 4 D PS ely ik S 1 0 44 50 9 1 44 50 3 3 gt 100K 9 ad FORMATO 88 55 Sag 9595 O L5 OT s RS B 1 2 SE 1 1 36 as 5 35 E 9 C227 JP10 Tro woo u PGND R23 10K TK d Eu OUT C C FORMAT CONTROL 3 30 NN CFG2 OUT D OUT W PGND FM2 FM1 FMO SERIAL DATA FORMAT 3 37 Re NAVAS e 3 3V RAW o ETT 5 DEFAULT JUMPERED 4xSE MODE 16Bit RJ NASA 4 gt gt gt 18Bit RJ 8 D 8 20Bit RJ iy SUO TEN 24Bit RJ TE B 5 eG ES 16 24Bit I2S DEFAULT SUBP S 16 24Bit LJ 5 4 RESERVED MCLKO 4 SUBMO 7 W PGND PGND W PGND TESTMODE CONFIG CONTROL VALIDO CFG2 CFG1 OUTPUT MODE MCLK SUB_PWM SUB_PWM ES PWM_A 0 0 AD xj SUB PWM ae TO SUBWOOFER CONNECTOR i 2 1CH 2xSE 1xBTL 9 5 t 2 VALID VALID AAA RESET PAT
9. ECJ 1VB1C104K DIGI KEY PCC1762TR PCC1762CT C25 C55 66 68 C70 C71 C73 80 83 C90 C93 CAP 0 1uF 50V CERM 0603 X7R C9 C47 2 Murata GRM188R71H104KA93D Digi Key 490 1519 2 490 1519 1 0 22uF 25V CERM 0603 X7R C1 C16 C23 4 Murata Electronics GRM188R71E224KA88D Digi Key 490 3290 2 490 3290 1 C26 CAP 1 0uF 25V CERM 0603 X5R C2 C18 C24 3 Panasonic ECJ 1VB1E105K Digi Key PCC2422TR PCC2422CT CAP 4 7uF 6 3V CERM 0603 X5R C13 1 TDK Corp C1608X5R0J475M Digi Key 445 1417 2 445 1417 1 CAP 0 14F50V CERM 0805 X7R C15 C29 C35 4 Panasonic ECJ 2YB1H104K Digi Key PCC1840TR PCC1840CT C44 CAP 1 0uF 50V CERM 0805 Y5V 0 Yuden UMK212F105ZG T Digi Key 587 1308 2 587 1308 1 CAP 1 0uF 50V METAL Polyester film 048 050 C79 4 EPCOS B32529C5105J Digi Key 495 1087 B32529C105J MKT 1uF 50V RAD ALUM ELEC FC C86 C87 2 Panasonic Digi Key P10312 No ALT Part No CAP 10uF 16V RAD ALUM ELEC KGA C46 C53 C54 11 Panasonic ECE A1CKG100 Digi Key P910 No ALT Part No C57 C689 C72 C74 C76 C84 C85 C92 CAP 15uF 50V RAD ALUM ELEC FC C37 1 Panasonic EEU FC1H150 Digi Key P10317 No ALT Part No CAP 22uF 10V RAD ALUM ELEC KGA C6 C60 2 Panasonic ECE A1AKG220 Digi Key P905 No ALT Part No CAP 47uF 16V RAD ALUM ELEC FC C4 1 Panasonic EEU FC1C470 Digi Key P11196 No ALT Part No CAP 220uF 50V RAD ALUM ELEC FC C3 C28 C36 4 Panasonic EEU FC1H221 Digi Key P10325 No ALT Part No C38 CAP 470uF 50V RAD A
10. P3 3PCT RES 4 7 Q 1 8W 5 SMD 1206 R33 Panasonic ERJ 8RQJ4R7V Digi Key P4 7PTR P4 7PCT FERRITES AND INDUCTORS nductor series 11RHBP 15UH L1 L4 4 Toko America A7503AY 150M Toko A7503AY 150M No ALT Part No America HEADERS AND JACKS Header 2 Pin Male Straight Gold JP1 JP10 Sullins 2 025 Digi Key 51011 02 No ALT Part No CFG1 CFG2 FMO 19 Sullins 2 025 Digi Key 51011 02 No ALT Part 1 FMTO FMT1 FM2 GAINO GAIN1 Header 3 Pin Male Straight Gold JP11 JP16 6 Sullins PZCO3SAAN Digi Key S1011 03 No ALT Part No Socket header 2x8 Pin Female Gold J1 1 Samtec SSW 108 02 G D RA Samtec SSW 108 02 G D RA No ALT Part No PCB RA JACK RCA PCB RA ECONO All metal RCA 1 CUI Stack RCJ 017 Digi Key CP 1466 No ALT Part No Jack RCA PCB Vertical Black LIN RIN 2 CUI Stack RCJ 051 Digi Key CP 1424 No ALT Part No SHUNTS Shunt Black AU Flash 0 100 JP2 11 Sullins SPCO2SYAN Digi Key 59001 ALT Part No JP11 1 2 JP12 1 2 JP13 1 2 JP14 1 2 JP15 2 3 JP16 2 3 GAINO GAIN1 FMO FM1 TESTPOINTS AND SWITCHES PC Testpoint Orange BKNDERR Keystone 5003 Digi Key 5003K No ALT Part No LRCLK MCLK Electronics MUTE PDN RESET SCLK 18 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control SLOU224 April 2008 Submit Documentation Feedback TEXAS INSTRUMENTS www ti com Board Layout Bill of Material and Schematics Table 7 Bill
11. TI to be a finished end product fit for general consumer use It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range PVCC and VIN correspondingly of 26 V at 3 A 5 V at 500 mA and output power of 20 W maximum Exceeding the specified input range may cause unexpected operation and or irreversible damage to the EVM If there are questions concerning the input range please contact a TI field representative prior to connecting the input power Applying loads outside of the specified output range may result in unintended operation and or possible permanent damage to the EVM Please consult the EVM User s Guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 The EVM is designed to operate properly with certain components above 60 as long
12. describes the TAS5704EVM board in regards to power supply PSU and system interfaces PSU Interface The TAS5704EVM module is powered using two power supply sources a 10 26V power supply and a 5V VIN power supply The 3 3V voltage levels are generated on the board using voltage regulators from VIN supply Note The length of power supply cable must be minimized Increasing length of PSU cable is equal to increasing the distortion for the amplifier at high output levels and low frequencies Maximum output stage supply voltage depends on the speaker load resistance Check the recommended maximum supply voltage in the TAS5704 data sheet 5105563 SLOU224 April 2008 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 9 Submit Documentation Feedback TEXAS INSTRUMENTS System Interfaces www ti com 2 2 2 3 2 4 Table 1 Recommended Power Supplies Description Voltage Limitations Current Recommendations 8 Q load System power supply 5V 500 mA Output power stage supply 10 26 V SAC 0 rated current correspond to 2 channels at 20W per channel PSC Connector e Connect the positive node of the 5V VIN power supply to the red binding post marked VIN e Connect the GND node of the 5V power supply to the black binding post marked GND Connect the positive node of the high voltage power supply to the red binding post marked PVCC Connect the ne
13. ne nnn nnn nnn 11 3 4 GAIN JUMPE S o 12 3 5 Data Format JumpetsS a esters aratan a a EE ANE LEM 12 3 6 CONFIG J MPErS cds 12 3 7 e m 13 4 Board Layout Bill of Material and Schematics 14 4 1 TAS5704EVM Board Layout Top Composite View 2 2 2 244 4444 2 2 2 2724 4 4 14 4 2 TAS5704EVM Board Layout Top Layer 15 4 3 TAS5704EVM Board Layout Bottom Layer III mn mmn nnne 16 4 4 Bill Of MaterlalS p AF RE NE 17 4 5 SONS MAC M 19 Important piter 20 SLOU224 April 2008 Table of Contents 3 Submit Documentation Feedback 4 TEXAS INSTRUMENTS www ti com List of Figures 1 2 Channel BTL Configuration with External Subwoofer EVM 5601 2 2 2 Channel SE 1 Channel BTL Configuration 8 3 4 SE ere PP 8 4 Top Composite View of TASSZ04EVM osea emu
14. stated by TI for that product or service voids all express and any implied warranties for the associated product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or support that may be provided by TI Further Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the TI products are specifically designated by TI as military grade or enhanced plastic Only products designated by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which TI has not designated as
15. ti com 43 TAS5704EVM Board Layout Bottom Layer View Figure 7 Bottom Layer 16 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control SLOU224 April 2008 Submit Documentation Feedback TEXAS INSTRUMENTS www ti com Board Layout Bill of Material and Schematics 4 4 Bill of Materials Table 7 Bill of Materials for TAS5704EVM Description RefDes QTY MFR MFR Part Vendor Vendor Part No ALT Part No TI SEMICONDUCTORS Modulator HBRIDGE U1 Texas Instruments TAS5704PAP Texas TAS5704PAP No ALT Part No TQFP64 PAP Instruments Single Inverter Gate SOT23 DBV5 INV1 INV2 2 Texas Instruments SN74AHC1GU04DBVR Digi Key 296 1095 2 296 1095 1 Single 2 to 1 MUX W Common Strobe MUX Texas Instruments SN74LVC2G157DCTR Digi Key 296 13266 2 296 13266 1 TSSOP8 DCT Processor Supervisor Circuit 3 3V U3 Texas Instruments TPS3825 33DBVT Digi Key 296 2636 2 296 2636 1 Voltage Regulator LDO Fast Trans Texas Instruments TPS76733QD Digi Key 296 2738 5 No ALT Part No 3 3Vdc 1 0A SOP8 D S Ended ANA IN 24BIT 96kHz Stereo ADC Texas Instruments PCM1808PW Digi Key 296 19773 No ALT Part No ADC TSSOP14 PW Digital Audio interface receiver 02 TI Burr Brown DIR9001PW Digi Key 296 21389 5 No ALT Part No TSSOP28 PW SEMICONDUCTORS Optical rec
16. ADC is an additional feature to this board to provide flexibility in sourcing audio signal to 55704 Please review the datasheet of PCM1808 for detail description of the ADC on this EVM Board Power up General Guidelines After connecting the loud speakers loads power supply and data line power up the VIN power supply Then power up the PVCC power supply It is recommended to set the PVCC level to 10 volts and then ramp it up to 20 volts to verify the cable connection functionality It is recommended to set the gain to 3dB at start by having both GAIN GA NO and GAINT jumpers inserted Note that the gain settings marked on the EVM are not correct Please see Table 3 on the next page for the correct settings Having jumpers FMO and 1 inserted and FM2 removed sets the data format for the device to 125 format Make sure the SPDIF format jumpers FMTO and FMT1 are removed to set the receiver format to 125 It is important to note that a device RESET S2 on the top of the board labeled MASTER HESET needs to be applied after each gain format or configuration change in order for the device to latch in the new settings Finally install jumpers CFG1 and CFG2 in the Config Control to select 2 CH BTL AD mode Jumpers and Control Utilities Clock Frequency Change Jumper JP1 In the presence of a valid digital signal input when SPDIF lock occurs the user may use JP1 to change LR clock and BIT clock When a shunt is inserted the SCKO 512Fs an
17. LRCK SCLK IT PCM1808PW PGND VW PGND MCLK LRCLK SCLK SCLK JP15 NOTE 1 2 SDIN1 SDIN2 3 3V DECOUPLING 5V DECOUPLING 2 3 SDIN1 SPDIF PSIA DEFAULT R34 ADC 4 ADC 4 R35 ADC 3 ADC 3 3 37 AAA AAA 1 SVA ADC 2 1 Q 1ufd 16V AGND ADC cx 55704 EVALUTION MODULE wip Design Team RYAN TEXAS Schematic Rev NC Mod NC Rev NC Sheet 2 of 6 INSTRUMENTS Save Date JULY 10 2007 Print Date Tue Jul 10 2007 Filename TAS5704EVM SCH Drawn By LDN TAS5704 MASTER RESET 3 3V DECOUPLING 01 35 01 15 R37 01 10 TO SPDIF R37 a Vdd Reset RESET 9 0 Ond Reset ORESET Pv TPS3825 33DBVT Red Bo gt gt 5 PGND 8 8 D sr rm Gav c77 As STs 9 975 1 C42 NC PGND 1 n 2 15H Lor rm Se RESET 4700p
18. LUM ELEC FC C58 C59 2 Panasonic EEU FC1H471L Digi Key P11260 No ALT Part No SLOU224 April 2008 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 17 Submit Documentation Feedback TEXAS INSTRUMENTS Board Layout Bill of Material and Schematics www ti com Table 7 Bill of Materials for TAS5704EVM continued Description RefDes QTY MFR MFR Part No Vendor Vendor Part No ALT Part No CAP 1000uF 35V RAD ALUM ELEC FC C51 C52 C62 4 Panasonic EEU FC1V102 Digi Key P10305 No ALT Part No C75 RESISTORS RES 0 0 1 16W 5 SMD 0603 R29 R32 R35 3 Panasonic ERJ 3GEYOROOV Digi Key PO 0GTR P0 0GCT RES 3 3 1 16W 5 SMD 0603 R11 R13 R15 4 Yageo 9C06031A3R30JLHFT Digi Key 311 3 3GTR 311 3 3GCT RES 47 1 16W 5 SMD 0603 R8 R16 R30 8 Yageo 9C06031A47ROJLHFT Digi Key 311 47GTR 311 47GCT R43 R44 R47 R48 R57 RES 75 0 1 16W 1 SMD 0603 R49 1 Panasonic ERJ 3EKF75ROV Digi Key P75 0HTR P75 0HCT RES 100 Q 1 16W 5 SMD 0603 R58 R59 R64 4 Yageo 9C06031A1000JLHFT Digi Key 311 100GTR 311 100GCT R65 RES 470 Q 1 10W 5 SMD 0603 R7 R9 R40 3 Panasonic ERJ 3GEYJ471V Digi Key P470GTR P470GCT RES 332 1 16W 1 SMD 0603 R4 R5 R26 5 Panasonic ERJ SEKF3320V Digi Key P332HTR P332HCT R55 R56 RES 392 1 10W 1 SMD 0603 R3 R45 R70 3 Panasonic ERJ SEKF3920V Dig
19. NOTICE Texas Instruments TI provides the enclosed product s under the following conditions This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use Persons handling the product s must have electronics training and observe good engineering practice standards As such the goods being provided are not intended to be complete in terms of required design marketing and or manufacturing related protective considerations including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards This evaluation board kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility restricted substances RoHS recycling WEEE FCC CE or UL and therefore may not meet the technical requirements of these directives or other related directives Should this evaluation board kit not meet the specifications indicated in the User s Guide the board kit may be returned within 30 days from the date of delivery for a full refund THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE The user assumes all responsibility and liabil
20. TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control User s Guide is TEXAS INSTRUMENTS Literature Number SLOU224 April 2008 SLOU224 April 2008 Submit Documentation Feedback TEXAS INSTRUMENTS Contents Prelato e M 5 1 el Bj eT 7 1 1 57 Feature 8 1 2 Basic Tools for Initial Board Power up IH HI HH hm hne enne nnn 9 2 System Interfaces ETESPS DOT D UU UIT UTEM 9 2 1 ET D I I UM 9 2 2 10 2 3 Loudspeaker and Subwoofer Connectors 2 Channel BTL Configuration 10 2 4 Digital Audio Interface SPDIF 1 2 44 2 2 4 441 411 nn 10 2 5 Died D 4 11 2 6 Board Power up General enne emen nnn nnn 11 3 Jumpers and Control Utilities 11 3 1 Glock Frequency Change Jumpers amare din da Dr aru mE MUI ui ufo 11 3 2 SPDIF PSIA Utilization Jumpers a eie nennen rmn nn 1 3 3 Data Routing Jumpers nh emn enhn nmn ne nnn ne e nnn
21. as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors and current sense resistors These types of devices can be identified using the EVM schematic located in the EVM User s Guide When placing measurement probes near these devices during operation please be aware that these devices may be very warm to the touch Mailing Address Texas Instruments Post Office Box 655308 Dallas Texas 75265 Copyright 2008 Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liabi
22. ax TAS5704 2CH Analog Input from Other Source Digital Out SPDIF Optical Coax LC LFront Cap LC RFront TAS5704 2CH Analog Input from Other Source Digital Out f Figure 3 4 SE Configuration 1 1 TAS5704EVM Features Self contained protection systems and control pins Standard 126 data input using optical or RCA inputs Analog input through analog to digital converter Subwoofer connection PWM terminal to provide signal and power to an external subwoofer board 55601 2 Double sided plated through PCB layout 202 copper 2mm Access to control signal gain output configuration and data format on the EVM board using jumpers 8 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control SLOU224 April 2008 Submit Documentation Feedback l TEXAS INSTRUMENTS www ti com System Interfaces 1 2 2 1 12 an SHUTDOWN 16 Figure 4 Top Composite View of TAS5704EVM Basic Tools for Initial Board Power up Up to 26V power supply e 5V 500mA power supply VIN Banana cables for power supplies and speakers Optical or coaxial cable SPDIF interface based on signal source Two 80 speakers BTL or 40 speakers SE Resistive loads can also be used e Optional TAS5601EVM2 for subwoofer connection when using BTL configuration System Interfaces This chapter
23. by Texas Instruments to be fit as a basis for establishing production products or systems This information may be incomplete in several respects including but not limited to information relating to required design marketing and or manufacturing related protective considerations and product safety measures typically found in the end product incorporating the goods 2 Accordingly neither TI nor its suppliers warrant the accuracy or completeness of the information text graphics links or other items contained within the Materials may make changes to the Materials or to the products described therein at any time without notice makes no commitment to update the Materials 3 assumes no liability for applications assistance customer product design software performance or services that may be described or referenced in the Materials The user assumes all responsibility and liability for proper and safe design and handling of goods Accordingly the user indemnifies TI from all claims arising from its use of the Materials 4 TI currently deals with various customers for products and therefore our arrangement with the user will not be exclusive TI makes no representations regarding the commercial availability components that may be referenced in the Materials 5 No license is granted under any patent right or other intellectual property right of TI covering or relating to any combination machine or process i
24. d when the shunt is removed the SCKO 256Fs Default is SCKO 256Fs In the absence of a valid digital signal DIR9001 clock outputs switch to the frequency of crystal Y1 If the crystal is chosen to be 24MHz the LR clock will be 96KHz and if the crystal is chosen to be 12MHz the LR clock will be 48 2 SPDIF PSIA Utilization Jumpers The jumpers MCLK LRCK SCLK SDATA allow the user to switch between the internal clock and data sources and external clock and data sources for instance PSIA from AP instrument The default configuration of these jumpers is SPDIF as it is marked on the EVM with a white arrow PSIA outputs may be utilized using pins 2 and 3 of the jumpers Keep in mind that pin 3 of each jumper is connected to GND Thus the user must pay attention to the polarity of the PSIA output cables at the time of insertion Data Routing Jumpers Jumpers SDIN1 SDIN2 These jumpers enable the user to assign a data source to TAS5704 SDIN1 and SDIN2 pins See Table 2 Table 2 TAS5704 SDINx Data Source Jumper JP15 SDIN1 Jumper JP16 SDIN2 SDIN1 Source SDIN2 Source Position Position 1 2 1 2 ADC ADC 1 2 2 3 SPDIF PSIA SPDIF PSIA 2 3 1 2 SPDIF PSIA ADC 2 3 2 3 SPDIF PSIA SPDIF PSIA SLOU224 April 2008 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 11 Submit Documentation Feedback 3 4 3 5 3 6 TEXAS INSTRUMENTS Jumpers and Control Utilities www ti com GAIN Jump
25. eiver 3 3V PCB RA ROHS OPTO 1 Toshiba TORX147LFT Digi Key TORX147LFT TORX141 Crystal 12 288MHz HC49US Y1 1 ECS 5 122 8 5 4 Digi Key X174 No ALT Part No Transistor NPN 50V PreBiased 4 7K Q3 1 Diodes Inc DDTC143TCA 7 Digi Key DDTC143TCADITR DDTC143TCADICT 100mA SOT23 DBV3 Transistor PNP 50V PreBiased 4 7K Q1 Q2 Q4 Q6 5 Diodes Inc DDTA143TCA 7 Digi Key DDTA143TCADITR DDTA143TCADICT 100mA SOT23 DBV3 LED Green 2 0V SMD0805 LED1 LED2 5 Lumex Optical SML LXT0805GW TR Digi Key 67 1553 2 67 1553 1 LED4 LEDS5 LED7 LED Red 2 0V SMD0805 LED9 1 Lumex Optical SML LXT0805IW TR Digi Key 67 1552 2 67 1552 1 LED Yellow 2 0V SMD0805 LED6 LED8 3 Lumex Optical SML LXTO805YW TR Digi Key 67 1554 2 67 1554 1 LED10 LED Blue SM1206 LED3 1 Avago HSMR C150 Digi Key 516 1436 2 516 1436 1 Technologies CAPACITORS CAP 33pF 50V CERM 0603 NPO C64 C65 2 Panasonic ECJ 1VC1H330J Digi Key PCC330ACVTR PCC330ACVCT CAP 4700pF 50V CERM 0603 X7R C42 C43 C61 3 Panasonic ECJ 1VB1H472K Digi Key PCC1780TR PCC1780CT CAP 0 01uF 16V CERM 0603 X7R C78 C91 2 Murata Electronics GRM188R71C103KA01D Digi Key 490 1525 2 490 1525 1 0 01uF 50V CERM 0603 X7R C7 1 Panasonic ECU V1H103KBV Digi Key PCC103BVTR PCC103BVCT CAP 0 047uF 16V CERM 0603 X7R C10 C41 C88 4 Panasonic ECJ 1VB1C473K Digi Key PCC1758TR PCC1758CT C89 0 068uF 16V CERM 0603 X7R 063 1 Panasonic ECJ 1VB1C683K Digi Key PCC1760TR PCC1760CT CAP 0 1uF 16V CERM 0603 X7R C5 C8 C11 17 Panasonic
26. ers GAINO and GAIN1 jumpers enable the user to change the gain of the device It is important to assert RESET S2 labeled MASTER RESET after each gain change in order for the device to recognize the new gain configuration The truth table is shown below and also it is marked on the EVM board However the gain settings are WRONG on the EVM silkscreen Refer to Table 3 for the correct gain settings Table 3 TAS5704 Gain Configuration Jumper GAIN1 Jumper GAINO GAIN dB Shunt IN 0 Shunt OUT 1 0 0 3 0 1 3 1 0 9 1 1 12 Data Format Jumpers FM1 and FM2 are used to change the data format by which TAS5704 operates FMTO and FMT1 jumpers associated with DIR9001 in SPDIF interface enables the user to change the data format of DIR9001 so that the data format is in sync with TAS5704 data format Both TAS5704 and DIR9001 are set by default to operate at 24 bit 125 format It is important to assert RESET after each format change order for the device to recognize the format change The truth tables below indicate the jumper configuration and the data format of TAS5704 and DIR9001 SPDIF Table 4 TAS5704 Data Format FM2 1 7 DATA FORMAT 0 0 0 16BIT RJ 0 0 1 18BIT RJ 0 1 0 20BIT RJ 0 1 1 24BIT RJ 1 0 0 16 24BIT I2S Default 1 0 1 16 24bit RJ 1 1 0 RESERVED 1 1 1 TEST MODE 0 SHUNT IN 0 SHUNT OUT 1 see schematics for details
27. fd 50V 4700pfd 50V ci4 7079 LC112 R11 lt R12 4 3 R7 R9 PGND NC amp t eutd 50v 1ufd 5ev 3 3 gt 100K S 4 NN ANAN OUT A A bi P 1 2 SE BTL Yellow R36 047ufd 16V 470 047ufd 16V 470 OUT B OUT B C177 JP4 ANN is 7 7 E BLT SHUNTS IN En EX SE SHUNTS OUT a 2 8 8 m OUT B 64 OUT B 53 PDN 8 0 SUR 55 22 US 22 1 e DOWN ee COUR IN ERN E DOWN 8 L5 L2 C75 61 j C inme MUTE za m PGND V PS 5185582 lt 15 ii 55 R17 lt fs C39 7 C48 c19 R13 2 R38 2 1 19 c2 N 1 2 05 RES N als 22 100K PGND BORD POND W PGND W PGND NC Is 1 0 44 50 0 1 44 50 JP5 MUTEG 20 55 1 Qufd 25V PGND i SE PGND C20 JP6 C16 3 302 bii 14 21 en F 22ufd 25V 9 01 44 50 PET SAUNT IN Y SE SHUNTS OUT GND 10K ACC PVCC LRCLK SCLKO MT NES V PGND e E 313812942 rut ste 1 BYPASS 2 5 5 SEHE 22 TAS5704PAP 1 25 AGND S 15uH E Qufd S m 35V OUTC SDIN2 24 5 2 c32 7 C49 C27 R14 2 R2 C23 33 1 2 son 25 spin1 ast o 99 Ap AGND AGND AGND NC Ja 1 04 50 1ufd 5ov 100K JP7 0 22ufd 25V SE BTL x
28. gative node of the high voltage power supply PGND to the black binding post marked PGND There is no specific power up sequence for TAS5704 but it is recommended to power up the VIN supply first while reset is kept low for at least 1ms and then power up the PVCC Loudspeaker and Subwoofer Connectors 2 Channel BTL Configuration CAUTION Both positive and negative speaker outputs are floating and may not be connected to ground e g through an oscilloscope Connect the positive and negative nodes of the left speaker to the corresponding metal binding post marked OUTA and OUTB on TAS5704EVM board Connect the positive and negative nodes of the right speaker to the corresponding metal binding post marked OUTC and OUTD on TAS5704EVM board e Install jumpers JP3 JP6 and JP7 JP10 for BTL configuration e The subwoofer is an option on this EVM which is provided through connecting TAS5601EVM2 to the TAS5704EVM using connector J1 Connector J1 provides the power and corresponding PWMs to the 55601 2 subwoofer amplifier TAS5601EVM2 is configured in PBTL and is able to provide 40W to an 8 speaker Connect the subwoofer positive and negative nodes to the corresponding metal binding posts on the TAS5601EVMa2 Digital Audio Interface SPDIF J1 OPTO The Digital Audio Interface contains digital audio signal data 125 See TAS5704 Data sheet SLOS563 for signal timing and details not explained in thi
29. i Key P392HTR P392HCT RES 510 Q 1 10W 5 SMD 0603 R28 1 Yageo 9C06031A5100JLHFT Digi Key 311 510GTR 311 510GCT RES 680 1 10W 5 SMD 0603 R42 1 Yageo 9C06031A6800JLHFT Digi Key 311 680GTR 311 680GCT RES 1 1 16W 5 SMD 0603 R54 1 Yageo 9C06031A1001JLHFT Digi Key 311 1 0KGTR 311 1 0KGCT RES 2 00kO 1 16W 1 SMD 0603 R67 1 Panasonic ERJ SEKF2001V Digi Key P2 00KHTR P2 00KHCT RES 2 49kO 1 16W 1 SMD 0603 R62 1 Panasonic ERJ SEKF2491V Digi Key P2 49KHTR P2 49KHCT RES 4 99kO 1 16W 1 SMD 0603 R31 R39 R41 5 Panasonic ERJ SEKF4991V Digi Key P4 99KHTR P4 99KHCT R46 R63 R1 R2 R12 R38 RES 7 50 1 16W 1 SMD 0603 R68 Panasonic ERJ SEKF7501V Digi Key P7 50KHTR P7 50KHCT RES 10kQ 1 16W 5 SMD 0603 R18 R25 R27 15 Panasonic 9C06031A1002JLHFT Digi Key 311 10KGTR 311 10KGCT R36 R50 R53 R69 RES 18 2kO 1 10W 1 SMD 0603 R17 Yageo 9C06031A1822FKHFT Digi Key 311 18 2KHTR 311 18 2KHCT RES 249 1 16W 1 SMD 0603 R61 Panasonic ERJ SEKF2493V Digi Key P249KHTR P249KHCT RES 1 00MQ 1 16W 1 SMD 0603 R66 Panasonic ERJ SEKF1004V Digi Key P1 00MHTR P1 00MHCT RES 0 0 1 10W 5 SMD 0805 R10 R60 2 Panasonic ERJ GEYOROOV Digi Key PO OATR RES 3 3 1 10W 5 SMD 0805 R34 Panasonic ERJ 6RQJ3R3V Digi Key P3 3BTR P3 3BCT RES 100kQ 1 10W 1 SMD 0805 0 Panasonic ERJ 6ENF1003V Digi Key P100KCTR P100KCCT RES 0 0 Q 1 8W 5 SMD 1206 R37 Panasonic ERJ 8GEYOROOV Digi Key PO OETR RES 3 3 1 4W 5 SMD 1206 R6 Panasonic ERJ 8RQJ3R3V Digi Key P3 3PTR
30. ity for proper and safe handling of the goods Further the user indemnifies TI from all claims arising from the handling or use of the goods Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive TI assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the User s Guide and specifically the Warnings and Restrictions notice in the User s Guide prior to handling the product This notice contains important safety information about temperatures and voltages For additional information on 5 environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI products or services might be or are used FCC Warning This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by
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33. n 9 Kinie SDATA JP1 OUT SCKO 256 Fs DEFAULT JP13 LK BCKO R44 AN 47 Dn i 2 SC Re rn 21714 LRCLK SPDIF MUX PGND INPUT i L 5 RXIN RXIN SELECT JUMPER NOTES 6 1 2 OPTO INPUT 3 us 1 2 SPDIF CLOCKS DATA DEFAULT 2 3 COAX INPUT asus naar 2 3 CLOCKS DATA PSIA PGND FROM MASTER RESET RESET DECOUPLING DECOUPLING 1 5 INV2 5 9 T 02 24 02 24 3 3V SPDIF C74 FR 10ufd 16V C70 C66 8 1ufd 16V 7 Q 1ufd 16V cx PROJECT TAS5704 EVALUTION MODULE AGND SPDIF X Design Team RYAN KEHR TEXAS Schematic NC Mod NC PCB Rev Sheet 1 of 6 INSTRUMENTS Save Date JULY 10 2007 Print Date Tue Jul 10 2007 Filename TAS5704EVM SCH Drawn By LDN 1 ufd 16V C53 at 79 e ANALOG TO DIGITAL CONVERTER ANALOG INPUTS C86 R58 LIN LEFT IN AAA ge E en 1ufd 5 V 100 C87 R59 ri A da 2 AGND ADC 5 128 8 Bs 5 5 5 5 5 AGND ADC ADC SDIN CONFIGURATOR 1 amp 2 VINL JP16 NOTE at 5 QD SVA ADC vec 1 2 SDIN2 DEFAULT ii 9 5 cc c 2 3 SDIN2 SPDIF PSIA TO S 5 TAS5704 R57 7 SDIN2 LRCLK
34. n which such TI products or services might be or are used Except as expressly Spare Gate Table provided herein and its suppliers do not grant any express or implied right to you under any patents copyrights get used Not Used Spore Gates trademarks or trade secret information BKNDERR c93 6 Performance tests and ratings to the extent referenced in the Materials are measured using specific computer crez systems and or components and reflect the approximate performance of TI products as measured by those tests Any FMTI difference in system hardware or software design or configuration may affect actual performance Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing GND4 7 Resale of Tl s products or services with statements different from or beyond the parameters stated by TI for that GPLI product or service in official TI data books or data sheets voids all express and any implied warranties for the associated INV2 TI product or service and is an unfair and deceptive business practice and TI is not responsible for any such use d 8 The Materials are copyrighted and any unauthorized use may violate copyright trademark and other laws You may LED1O only download one copy for your internal use only unless you are specifically licensed to do otherwise by TI in writing This is a license not a transfer
35. of Materials for TAS5704EVM continued Description RefDes QTY MFR MFR Part No Vendor Vendor Part No ALT Part No SHUTDOWN 11 Keystone 5003 Digi Key 5003K No ALT Part No SUBM SUBP Electronics VALID Switch Momentary SMT Short Black 52 54 3 Panasonic EVQ PPBA25 Digi Key P8086STR P8086SCT Tab 160g Switch SPST VERT PCB ROHS 51 1 NKK Switches G12AP RO Digi Key 360 1758 360 1701 NON INSULATED WIRE GROUND LOOPS Non insulated bus wire 10MM Length PGND PGND 2 Belden CDT 8019000100 Mouser 566 8019 No ALT Part No 18 Bend the wire lengths into a U shape and solder to the board Leave a gap of around 0 3 inch between the board and the wire BINDING POSTS Binding post 15A uninsulated OUTA OUTB 6 Johnson 111 2223 001 Digi Key J587 No ALT Part No OUTC OUTD Components GND GND Binding post Red 15A ECONO PVCC VIN 2 Keystone 7006 Digi Key 7006K No ALT Part No Electronics Binding post Black 15 PGND 2 Keystone 7007 Digi Key 7007K No ALT Part No GND PGND Electronics STANDOFFS AND HARDWARE Standoff 4 40 Threaded M F 0 75 in HW1 HW6 6 Keystone 8403K Digi Key 8403K No ALT Part No ALUM HEX Electronics Hex Nut 4 40 Zinc Steel HW1 HW6 6 Building Fasteners HNZ440 Digi Key H216 No ALT Part No Component Count 262 COMPONENTS NOT ASSEMBLED C77 C14 C32 C39 C40 C30 C45 C56 C31 C33 C12 C19 C27 C34 C17
36. of title and is subject to the following restrictions You may not MCLK a modify the Materials including any associated warranties conditions limitations or MUX notices or use them for any commercial purpose or any public display performance sale or OUTA rental oure b decompile reverse engineer or disassemble software Materials except and only to the OUTD extent permitted by applicable law remove any copyright or other proprietary notices from the Materials d transfer the Materials to another person You agree to prevent unauthorized copying RESET of the Materials TI may terminate this license at any time if you are in breach of the terms RIN of this Agreement Upon termination you will immediately destroy the Materials 5 11 SHUTDOWN 9 THE MATERIALS ARE PROVIDED AS IS WITHOUT ANY EXPRESS OR IMPLIED WARRANTY OF ANY KIND zum INCLUDING WARRANTIES OF MERCHANTABILITY NONINFRINGEMENT OF INTELLECTUAL PROPERTY OR U3 FITNESS FOR ANY PARTICULAR PURPOSE IN NO EVENT SHALL TI OR ITS SUPPLIERS BE LIABLE FOR ANY CD DAMAGES WHATSOEVER INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION LOSS OF INFORMATION ARISING OUT OF THE USE OF OR INABILITY TO USE THE M MATERIALS EVEN IF TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 35 TEXAS INSTRUMENTS EVALUATION BOARD KIT IMPORTANT
37. quipment WARNING This is an example of a warning statement A warning statement describes a situation that could potentially cause harm to you The information in a caution or a warning is provided for your protection Please read each caution and warning carefully Related Documentation from Texas Instruments The following table contains a list of data manuals that have detailed descriptions of the integrated circuits used in the design of the TAS5704EVM The data manuals can be obtained at the URL http www ti com Part Number Literature Number TAS5704 Data Sheet SLOS563 DIR9001PW SLES198 PCM1808PW SLES177A TPS76733QD SLVS2081 TAS5601 SLAS585 SLOU224 April 2008 Preface 5 Submit Documentation Feedback TEXAS INSTRUMENTS Additional Documentation www ti com Additional Documentation General Application Notes EVM Warnings Restrictions and FCC Warning See the Evaluation Board Kit Warnings and Restrictions page towards the end of this User s Guide 6 Read This First SLOU224 April 2008 Submit Documentation Feedback User s Guide SLOU224 April 2008 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 1 Overview TAS5704 customer evaluation module EVM demonstrates the integrated circuit IC TAS5704 from Texas Instruments TAS5704 is a 4 channel device with an I2S RJ LJ digital audio stream input and amplified PWM signal o
38. s document RCA connector and OPTO connector are the two SPDIF interfaces The switch S1 is used to toggle between OPTO and RCA connector based on available signal source Once the RCA cable or optical cable is connected and the signal source is powered up please verify the SPDIF lock indicator blue LED3 to make sure there is viable signal available to the device The format of the DIR9001 SPDIF receiver can be changed using jumpers FMTO and FMT1 Jumpers installed 0 Jumpers removed 1 The description of possible modes is printed on the EVM See the schematic of TAS5704EVM and the DIR9001 device for detail information on method by which the data and clocks are provided to TAS5704 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control SLOU224 April 2008 Submit Documentation Feedback 1 INSTRUMENTS www ti com Jumpers and Control Utilities 2 5 2 6 3 1 3 2 3 3 ADC Interface In the absence of digital signal source ADC PCM1808 may be used to convert an analog audio signal to digital signal and provide it to TAS5704 DIR9001 still provides clocks to ADC in this process The frequency of the oscillator selected for DIR 9001determinse the sampling frequency in the absence of digital signal If the OSC is 24MHz the sampling frequency will be set at 96kHz and if the OSC is selected to be 12MHz the sampling frequency will be defaulted to 48kHz when there is no signal on SPDIF input terminals
39. ut The subwoofer PWM signal is provided to an external class D power stage TAS5601 which uses a LC demodulation filter to drive a subwoofer For detail information about the TAS5704 device review the device data sheet document number SLOS563 TAS5704 is designed to drive two 8 loudspeakers up to 20W per channel 1096 THD N in BTL configuration The TAS5704EVM can also be configured to drive four 4 speakers in a single ended SE configuration Finally the TAS5704EVM can be configured to drive 2 single ended speakers plus 1 bridge tied speaker 2 1 mode Review the board schematic and TAS5601 documents for additional information and more specific application information on the subwoofer daughter card and connector TAS5704EVM together with other components on this board is a complete 4 channel digital audio amplifier system which includes digital input SPDIF analog inputs via ADC and other features like mute power down output configuration control format control and gain control Left SPDIF Optical Coax Right Subwofer PWM out TAS5704 2CH Analog Input from Other Source Digital Out TAS5601EVM2 Figure 1 2 Channel BTL Configuration with External Subwoofer TAS5601EVM2 SLOU224 April 2008 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 7 Submit Documentation Feedback Overview TEXAS INSTRUMENTS www ti com SPDIF Optical Co
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