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SUPER MICRO Computer C2SBA+II Laptop User Manual

1. Del key to enter SETUP 4 3 Main BIOS Setup All Main Setup options are described in this section The Main BIOS Setup screeen is displayed below Use the Up Down arrow keys or the Tab key to move among the different settings in the above menu Press the Esc key to exit the CMOS Setup Menu and use the Left and Right arrow keys to enter other categories of BIOS settings The next section describes in detail how to navigate through the menus 4 2 Chapter 4 Award BIOS Main BIOS Setup Menu Bete Sen dd uv The 3H pami Tima Chhitemioe 1T i ZH Bele HH XS ined pups Ld a P du Hoas 1 Change the day manehe E 32A NM Neira eiii parage en 1 IDE Tweinserg ilaun IDE Secendary Flazter IDE Secendary Flare Uidau LEGE UGR 1 Halt On A1 But Beyboard J Hara Henarg i aH Extended Fensry 55454 Total Heeory 1824H Main Setup Features Date Time Set the system date and time Key in the correct information in the mm dd and yy fields Press the Enter key to save the data Drive A Drive B These settings allow the user to set the type of floppy disk drive installed in the system The options are None 360K 5 25 in 1 2M 5 25 in 720K 3 5 in 1 44M 3 5 in and 2 88M 3 5 in Default settings are 1 44 3 5 in for Drive A and None for Drive B Swap Floppy Drive This setting allows the user to swap the designation A and B of the floppy disk drives install
2. AwardBIOS POST Codes POST hex Description 2Dh I Initialize multi language 2 Put information on screen display including Award title CPU type CPU speed 2Eh Reserved 2Fh Reserved 30h Reserved 31h Reserved 32h Reserved 33h Reset keyboard except Winbond 977 series Super I O chips 34h Reserved 35h Reserved 36h Reserved 37h Reserved 38h Reserved 39h Reserved 3Ah Reserved 3Bh Reserved 3Ch Test 8254 3Dh Reserved 3Eh Test 8259 interrupt mask bits for channel 1 3Fh Reserved 40h Test 8259 interrupt mask bits for channel 2 41h Reserved 42h Reserved 43h Test 8259 functionality 44h Reserved 45h Reserved 46h Reserved 47h Initialize EISA slot 48h Reserved 49h 1 Calculate total memory by testing the last double word of each 64K page 2 Program writes allocation for AMD K5 CPU 4Ah Reserved 4Bh Reserved 4Ch Reserved 4Dh Reserved 4Eh 1 Program MTRR of M1 CPU 2 Initialize L2 cache for P6 class CPU amp program CPU with proper cacheable range 3 Initialize the APIC for P6 class CPU 4 On MP platform adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical 4Fh Reserved 50h Initialize USB 51h Reserved 52h Test all memory clear all extended memory to 0 53h Reserved 54h Reserved 55h Display number of processors multi proc
3. Build amp update ESCD Set CMOS century to 20h or 19h Load CMOS time into DOS timer tick Build MSIRQ routing table Boot attempt INT 19h ABWNRINEINDAUNBR WN B 5 SUPER P3TDDR User s Manual Notes Appendix C AwardBIOS Beep Codes Appendix C AwardBIOS Beep Codes This section lists the Award BIOS Error Beep Codes Beep Code Error Message Description 1 short beep 2 short beeps 1 long 1 short 1 long 2 short 1 long 3 short 1 long 9 short Long beeps High beeps System boot Incorrect CMOS setting DRAM error VGAerror Keyboard error ROM error Memory module error Power error C 1 SUPER P3TDDR User s Manual Notes
4. F2 at the same time then turn on the power with these keys pressed until your floppy drive starts reading Your screen will remain blank until the BIOS program is done f the system reboots correctly then the recovery was successful The BIOS Recovery Procedure will not update the boot block in your BIOS Question What s in the CD that came with my motherboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include VIA Pro 266 chipset drivers for Windows plus security and audio drivers Question Why can t turn off the power using the momentary power on off switch Answer The instant power off function is controlled in BIOS by the Power Button Mode setting When the On Off feature is enabled the motherboard will have instant off capabilities as long as the BIOS has control of the system When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count the first screen that appears when the system is turned on the momentary On Off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the motherboard Question installed my microphone correctly but I can t record any sound What should do Answer Go to Start Programs Accessories Ent
5. The P3TDDR has four DIMM sockets that support up to 4 GB of PC1600 or PC2100 DDR RAM at their respective speeds DDR RAM speeds should not be mixed The P3TDDR can accept any combination of registered unregistered and ECC non ECC memory however it is recommended that different such combinations be used across the memory installation To Install Insert module vertically and press down until it snaps into place Pay attention to the alignment notches Figure 2 2 Installing DDR RAM into DIMM Slot Notch Notch pen Note Notch boe should align with the receptive point on the slot 2 4 Chapter 2 Installation Top View of DDR Slot Release Tab I Il Release Tab To Remove Use your thumbs gently to push each release tab outward to release the DIMM from the slot 2 5 I O Port Control Panel Connector Locations The I O ports are color coded in conformance with the PC99 specification to make setting up your system easier See Figure 2 3 below for the colors and locations of the various I O ports Figure 2 3 I O Port Locations and Definitions Mouse Parallel Port Green Burgundy 9 Keyboard USB Ports COMI Port VGA Port LAN1 LAN2 Purple Turquoise Blue Port Port 2 5 SUPER P3TDDR User s Manual Front Control Panel JF1 contains header pins for various front control panel con
6. and Off Gate A20 Option This option allows the user to determine if the chipset or the keyboard controller should have the control over Gate A20 The settings are Normal and Fast If set to Normal a pin in the keyboard controller controls Gate A20 If Fast is selected the chipset will have the control over Gate A20 The default setting is Fast Typematic Rate Setting If Enabled the option allows the user to set the number of times a key stroke repeats itself in a second when the key is held down If Disabled the keyboard controller sets the rate 4 7 SUPER P3TDDR User s Manual Typematic Rate Chars Sec You may change this setting only if the Typmatic Rate Setting is enabled This setting allows the user to set the number of times a key stroke repeats itself in a second when the key is held down The options are 6 8 10 12 15 20 24 and 30 Typematic Delay You may change this setting only if the Typmatic Rate Setting is enabled This setting sets the delay time after a key is held down before it begins to repeat the keystroke The settings are 250 500 750 and 1000 OS Select For DRAM 64MB This setting should be changed only if using OS2 and your system has more than 64 MB of RAM The options are OS2 and Non OS2 PWRON After PWR Fail This setting allows the user to specify how the system will respond when power is reapplied after the system has gone down due
7. 26 GHz proces sors including low power Pentium III processors at Front Side system Bus speeds of 133 100 66 MHz Note Please refer to the support section of our web site for a complete list of supported processors You must use the server version of the processors mentioned above Memory Four DIMM sockets to support up to 4 GB PC1600 or PC2100 DDR RAM Chipset VIA Apollo Pro 266T Expansion Slots Three 3 32 bit PCI 33 MHz BIOS 4 Mb Award Flash ROM ACPI APM Power Management PAC 99 color coded I O connectors One WOL Wake On LAN connector One WOM Wake On Modem connector Internal control of Power On Mode for recovery from AC power loss PC Health Monitoring Seven onboard voltage monitors for CPU core chipset voltage 3 3V 5V and 12V Four fan status monitor with firmware software on off control Environmental temperature monitor and control CPU fan auto off in sleep mode Power up mode control for recovery from AC power loss System overheat LED and control System resource alert Hardware BIOS virus protection Auto switching voltage regulator for the CPU cores Slow blinking LED for suspend state indicator BIOS support for USB keyboard 1 7 SUPER P3TDDR User s Manual ACPI PC 98 Features Microsoft OnNow Real time clock wake up alarm Main switch override mechanism External modem ring on Onboard I O AIC 7899 for dual channel Ultra160 SC
8. GND 60 MSG 27 GND 61 SEL 28 GND 62 CD 29 GND 63 REQ 30 GND 64 IO 31 GND 65 DB 8 32 GND 66 DB 9 33 GND 67 DB 10 34 GND 68 DB 11 2 17 SUPER P3TDDR User s Manual 2 9 Installing Software Drivers After all the hardware has been installed you must install the software drivers The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard After inserting this CD into your CDROM drive the display shown in Figure 2 5 should appear If this dis play does not appear click on the My Computer icon and then on the icon representing your CDROM drive Finally double click on the S Setup icon EEDEXIEDEXLCLTTTTIDTITEIAEUSE 1 xj VIA din Drese Eun Masher Uira ATA B Deren P Vig Diese AHF Dreeer 1 201 aj Hiceoolt Diet B D Drivers amp Tools ATI B Giver For PT DOR VIA Apolla Fre 2667 amp Jobber iota Chipset D al ide LL Ch B 1 tor IIDA DE PIT DOR P3TDDRK igs PROMSE Fasiikeck Miliy 5 Duk driver chokes Tend Manus j Hess CD Auto Stat Lin Meat Tere Fase none ini pimelbion leere essit SLIPE RAM DAD web sies SUPERMICR amp Figure 2 5 Driver Tool Installation Display Screen Click the icons showing a hand writing on paper to view the readme files for each item Click the tabs to the right of these in order from top to bottom to install each item one at a time After installing each item you must reboot the system before mo
9. I O provides functions that comply with ACPI Advanced Con figuration and Power Interface which includes support of legacy and ACPI power management through an SMI or SCI function pin It also features auto power management to reduce power consumption The IRQs DMAs and I O space resources of the Super I O can flexibly adjust to meet ISA PnP requirements which suppport ACPI and APM Ad vanced Power Management Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices ElectroStatic Discharge ESD can damage electronic components To pre vent damage to your system board it is important to handle it very carefully The following measures are generally sufficient to protect your eguipment from ESD Precautions Use a wrist strap designed to prevent electrostatic discharge that is grounded to the computer chassis Touch a grounded metal computer object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components periph eral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Put the motherboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides ex cellent conductivity amongst the power supply the case the mounting fasteners and the motherboard Unpacking The motherboard is shipped in antistatic packaging
10. IRQ jumper JP10 is used Jumper Position Definition to allow BIOS to select the VGA IRQ 15 rable Interrupt Request See the table 2 3 Disabled on the right for jumper settings Speaker Enable Disable Speaker Enable Disable Jumper Settings JP8 Jumper JP8 is used to enable or dis iia SON able the system speaker See the i iig Isable table on the right for jumper set tings LAN Enable Disable LAN1 2 Enable Disable Jumper Settings JPL1 2 Jumper JPL1 and JPL2 allow you to enable Position Definition or disable onboard LAN1 and LAN2 S E MPs ico pen Disabled respectively See the table on the right for jumper settings 2 14 Chapter 2 Installation 2 8 Parallel Port Floppy Hard Disk Drive and SCSI Connections Note the following when connecting the floppy and hard disk drive cables The floppy disk drive cable has seven twisted wires Ared mark on a wire typically designates the location of pin 1 Asingle floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B The 80 wire ATA66 100 IDE hard disk drive cable that came with your system has two connectors to support two drives This special cable should be used to take advantage of the speed this new technology offers The
11. If you have installed a new add on device and this add on device has caused conflicts in system configuration and has resulted in system boot up failure then select Enabled to reset Extended System Configuration Data ESCD for the OS to reboot the system The settings are Enabled and Disabled Resources Controlled By The Award BIOS can automatically configure all the boot devices and all Plug and Play compatible devices However if this item is set to Auto ESCD the user is not able to set the IRQ DMA and memory address since the Award BIOS will automatically assign the values to these fields The settings are Auto ESCD and Manual When Auto ESCD is chosen the following three fields will be available for the user to change IRQ x Assigned to Here you can choose where to assign the various IRQs IRQ3 4 5 7 9 10 11 12 14 and 15 The settings are PCI Device and Reserved 4 18 Chapter 4 Award BIOS PCI VGA Palette Snoop For best system performance this item has been pre set to Disabled by the manufacturer The settings are Enabled and Disabled Assign IRQ for VGA The Enabled setting allows the AwardBIOS to assign an IRQ for the VGA devices The settings are Enabled and Disabled Assign IRQ for USB The Enabled setting allows the AwardBIOS to assign IRQ for the USB devices The settings are Enabled and Disabled 4 6 Power Management When the Item Power is hi
12. VT8653 Host System Controller provides superior performance between the CPU DIMMs AGP bus and V Link inferface with pipelined burst and concurrent opera tion The VT8233 V Link Client controller is a highly integrated PCI LPC controller Its internal bus structure is based on a 66 MHz PCI bus that provides a 2x bandwidth The VT8233 integrated Clint V Link controller which supports a 266 MB bandwidth between the Host Client V Link inter face provides a V Link PCI and V Link LPC controller It supports five PCI slots arbitration and decoding for all integrated functions and an LPC bus Memory Support and AGP Capability The VT8653 supports up to 4 GB of PC1600 and PC2100 DDR RAM The DDR RAM controller supports both SDRAM and VCSDRAM Virtual Channel SDRAM in a flexible mix match manner The SDRAM interface allows for zero wait state bursting between the DRAM and the data buffers at 66 100 133 MHz The VT8633 Controller also supports full AGP v 2 0 capability for maximum bus utilization including 2x and 4x mode transfer SBA Side Band Address ing Flush Fence commands and pipelined grants The VT8633 also pro vides flexible CPU AGP PCI remapping control which supports major AGP based 3D and DVD multimedia accelerators Recovery from AC Power Loss The BIOS provides a setting that alllows you to determine how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain power
13. must enable the LAN Wake Up setting in BIOS to use this function You must also have a LAN card with a Wake on LAN connector and cable to use this feature Wake On Ring WOM1 Wake On Modem The Wake On Ring header is lo eene aon cated at WOM1 See the table on Number Definition 1 5V Standb the right for pin definitions You 2 Ground must enable the Ring Wake Up set 3 Makeup ting in BIOS to use this function This feature requires a modem connected to the computer that has a Wake on Ring connector and cable Note NC indicates no connnection 2 10 Chapter 2 Installation Fan Headers Fan Header Pin Definitions The CPU thermal control and Pin chassis fan headers are desig Number Definition 1 Ground black nated CPU Fan1 CPU Fan2 Over 2 412V red heat Fan Chassis Fan1 Chassis 3 Tachometer Caution These fan headers use Fan2 and Chassis Fan3 respec DC power tively See the table on the right for pin definitions Chassis Intrusion Chassis Intrusion Pin Definitions JL1 The Chassis Intrusion header is Pin Number Definition located at JL1 See the board lay 1 Intrusion Input out in Chapter 1 for its location 2 Soung Refer to the table on the right for pin definitions 2 11 SUPER P3TDDR User s Manual 2 7 Jumper Settings Explanation of Jumpers Connector B To modify the operation of the d e motherboa
14. not contain the proper system boot files Insert a system disk into Drive A and press lt Enter gt If you assumed the system would boot from the hard drive make sure the controller is inserted correctly and all cables are properly attached Also make sure the disk has been formatted as a boot device Then reboot the system A 1 SUPER P3TDDR User s Manual DISKETTE DRIVES OR TYPESMISMATCHERROR RUN SETUP The type of diskette drive installed in the system is different from the CMOS definition Run Setup to reconfigure the drive type correctly DISPLAY SWITCH IS SET INCORRECTLY The display switch on the motherboard can be set to either monochrome or color This indicates that the switch is set to a different setting than indicated in Setup Determine which setting is correct and then either turn off the system and change the jumper or enter Setup and change the VIDEO selection DISPLAY TYPE HAS CHANGED SINCE LAST BOOT Since last powering off the system the display adapter has been changed You must configure the system for the new display type ERRORENCOUNTERED INITIALIZING HARD DRIVE The hard drive cannot be initialized Be sure the adapter is installed correctly and all cables are correctly and firmly attached Also be sure the correct hard drive type is selected in Setup ERRORINITIALIZING HARD DISK CONTROLLER Cannot initialize the controller Make sure the cord is correctly and firmly installed in the bus Be sure
15. of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product Unless you request and receive written permission from SUPER MICRO COMPUTER you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2002 by SUPER MICRO COMPUTER INC All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the SUPER P3TDDR motherboards The SUPER P3TDDR supports single or dual Pentium Ill FCPGA 500 MHz 1 26 GHz processors including low power Pentium Ille processors at Front Side Bus speeds of 133 100 and 66 MHz Please refer to the support section of our web site http www supermicro com TechSupport htm for a complete listing of supported processors Intel FCPGA processors are housed in a 370 pin package Manual Organization Chapter 1 includes a checklist of what should be included in your mainboard box describes the features specifications and performance of the SUPER P3TDDR mainboards and provides detailed info
16. set to Always On the video device and the monitor will always be on when the system is in the suspend mode When set to Suspend Off the video device and the monitor will be turned off when the system is in the suspend mode Video Off Method This item determines the manner in which the monitor is turned off The settings are Blank Screen V H SYNC Blank and DPMS Select V H SYNC Blank to turn off the vertical and horizontal synchronization ports and the monitor Select Blank Screen to turn off the video buffer and the monitor Select DPMS to initiate display power management signals Modem Use IRQ This item allows the AwardBIOS to assign the IRQ to be used by the Modem The settings are NA 3 4 5 7 9 10 and 11 Soft off by PWR BTTN This item determines the system s Soft off mode when the user presses the power button The settings are Instant off and Delay 4 Sec POWER ON Function This option allows the user to determine the method by which the system activates the power on function The settings are Password Hot Key Mouse Left Mouse Right Any key Button Only and Keyboard 98 KB Power On Password This item allows the user to set the password to activate the keyboard power Press the Enter key to enter the password 4 21 SUPER P3TDDR User s Manual Hot Key Power On This option allows the user to set a hot key for activating the power on function The
17. settings are Ctrl F1 Ctrl F2 Ctrl F3 Ctrl F4 Ctrl F5 Ctrl F6 Ctrl F7 Ctrl F8 Ctrl F9 Ctrl F10 Ctrl F11 and Ctrl F12 RTC Alarm Resume If Enabled this option will allow the AwardBIOS to resume the RTC Real Time Clock Alarm activities The default settings are Enabled and Disabled 4 7 Boot up Devices When the Item Boot is highlighted on the main menu bar you should see the following screen Award BIOS attempts to load the operating system from devices specified by the users in a user specified sequence Boot ROM Order This item allows the user to set the order of the boot up devices The settings are Adaptec 7899 and Any PCI Slot 4 22 Chapter 4 Award BIOS First Boot Device This item allows the user to set the first boot up device The settings are Floppy LS120 HDD 0 SCSI CDROM HDD 1 HDD 2 HDD 3 ZIP100 LAN and Disabled Second Boot Device This item allows the user to set the second boot up device The settings are Floppy LS120 HDD 0 SCSI CDROM HDD 1 HDD 2 HDD 3 ZIP100 LAN and Disabled Third Boot Device This item allows the user to set the third boot up device The settings are Floppy LS120 HDD 0 SCSI CDROM HDD 1 HDD 2 HDD 3 ZIP100 LAN and Disabled Boot Other Device If enabled this option enables the BIOS to load the OS from another device rather than the ones
18. that have been specified as the first second and third boot up devices The settings are Enabled and Disabled Virus Warning This item allows the user to choose the Virus Warning feature for the IDE Hard Drive Disk boot sector protection If this function is enabled and someone attempts to write data into this area then the BIOS will display a warning message and the audible alarm will be activated The settings are Enabled and Disabled Boot Up Floppy Seek Set this option to Enabled to allow the BIOS to test floppy drives to determine whether they have 40 tracks or 80 tracks The settings are Enabled or Disabled 4 23 SUPER P3TDDR User s Manual 4 8 Security Setup When the Item Security is highlighted on the main menu bar you should see the following screen Ser User Pascuerd rcurity Option pM Pa ewer Set Supervisor s Password When the item Set Supervisor Password is highlighted on the above screen hit the Enter key When prompted type a password in the dialogue box to set or to change Supervisor s Password Set User s Password When the item Set User s Password is highlighted on the Security Menu hit the Enter key When prompted type a password in the dialogue box to set or to change the User s Password Security Option When the item Security Option is highlighted on the Security Menu hit the Enter key This option allows the user to determine if the passwor
19. the add on cards and cables Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes SUPER P3TDDR User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnos tics card is recommended For I O port 80h codes refer to App B Memory Errors 1 Make sure the DIMM modules are properly and fully installed for the amount of memory desired 2 Determine if different speeds of DIMMs have been installed and verify that the BIOS setup is configured for the fastest speed of memory used Do not mix memory speeds 3 For DIMMs make sure you are using PC1600 200 MHz or PC2100 266 MHz compliant DDR RAM 4 Check for bad DIMM modules or slots by swapping modules between slots and noting the results 5 Make sure all memory modules are fully seated in their slots 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a motherboard manufacturer Supermicro does not sell directly to end users so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please go through the Troubleshooting Procedures and Frequently Asked Question FAQ sections in this chapter or see the FAQs on our web site http www supermicro com techsupport htm before co
20. the correct hard drive type is selected in Setup Also check to see if any jumper needs to be set correctly on the hard drive FLOPPY DISK CNTRLR ERROR ORNO CNTRLR PRESENT Cannot find or initialize the floppy drive controller Make sure the controller is installed correctly and firmly If there are no floppy drives installed be sure the Diskette Drive selection in Setup is set to NONE KEYBOARD ERROR ORNOKEYBOARD PRESENT Cannot initialize the keyboard Make sure the keyboard is attached correctly and no keys are being pressed during boot up If you are intentionally configuring the system without a keyboard set the error halt condition in Setup to HALT ON ALL BUT KEYBOARD This will cause the BIOS to ignore the missing keyboard and continue the boot A2 Appendix A AwardBIOS POST Messages Memory Address Error at Indicates a memory address error at a specific location You can use this location along with the memory map for your system to find and replace the bad memory chips Memory parity Error at Indicates a memory parity error at a specific location You can use this location along with the memory map for your system to find and replace the bad memory chips Memory Verify Error at Indicates an error verifying a value already written to memory Use the location along with your system s memory map to locate the bad chip OFFENDING ADDRESS NOTFOUND This message is used in conjunction with the I O CHAN
21. the previous setting for description The options for this setting are Auto Mode 0 Mode 1 Mode 2 Mode 3 and Mode 4 4 4 Chapter 4 Award BIOS IDE Primary Master Slave UDMA This is available only when your IDE drive supports UDMA and the operating environment also includes a UDMA drive If your IDE hard drive and your system software both support UDMA select Auto to enabled BIOS support The options for this setting are Auto and Disabled Video Use this setting to specify the type of display you are using with the system Options are EGA VGA CGA 40 CGA 80 and MONO Halt On If the system encounters a non specified error during boot up it will come to a halt as directed by these settings You can tell the system to halt on All Errors No Errors All But Keyboard All But Diskette or All But Disk Key Base Memory Extended Memory Total Memory These are displays that inform you how much of each type of memory is recognized as being present in the system 4 5 SUPER P3TDDR User s Manual 4 4 Advanced BIOS Setup Choose Advanced BIOS Setup from the Award BIOS Setup Utility main menu with the Left Right arrow keys You should see the following display Select one of the items in the left frame of the screen to go to the sub screen for that item Advanced BIOS Setup options are displayed by highlighting the option using the arrow keys All Advanced BIOS Setup options are descr
22. to a power failure The options are Off On and Former Sts Full Screen Logo Show The options for this setting are Enabled and Disabled Chapter 4 Award BIOS 4 4 2 Advanced Chipset Features k dwascrd BIG Features E otemrated Peri rales See Level LI i izlete Ra Pia b leacazrab Faatubar HT clack UPAH riningz This section covers the functions used for configuring the system based upon the special features offered by the VIA Apollo 266 chipset The chipset manages the operations of major components of the board Normally the default settings for the Advanced Chipset Features listed in the section are pre configured by the manufacturer for the optimal performance of the system It is recommended that the user does not alter the default settings This section is provided as an emergency measure for the user to restore the functions of the system when the critical data stored in the BIOS is lost When the item in Advanced Chipset Features is highlighted hit the Enter key to activate the screen below Abreni Chipset Peetures Meme Mamry Parity EOC Check Dizahlad im Bite Cochrahlr mom n BIOS Shadow Hamry als HIP CPD ca PCI Hrita Farfar IEnablad E EET ot Sn OE Ghmneli Enabled IH Frufata PES panur ji papo 4 9 SUPER P3TDDR User s Manual Host amp AGP Bridge Control This section documents the AwardBIOS management of the bus links between host and bridge devic
23. 1 370 pin FCPGA l PPGA Dom Processor m s CPU Fan2 CPU1 u a a lt a 370 pin VGA FCPGA PPGA Processor VIA VT8653 LAN1 CPU2 LAN2 ATI s Rage XL 8 JP10 JP3 c3 c3 PCI 1 JPL1 PCI2 a 5 z 8 VIA PCI 3 VT8233 apio DE m o a JP2 a j o o a 5 Qn a o o E 2 Adaptec 59 3 AIC 7899 a ul lt 5 n E 2 JPA2 JPA1 3 o e Overheat Fan JF1 o s N e Y 5 zziz zz 3 z zzz a n n a Chassis ek Fan2 55 Chassis UD Fan1 gt x amp 8 Bios g SUPER I O JP10 a s w e a BATTERY a m o 2 a 2B 5 est z s 28 D OC ups Chapter 1 Introduction P3TDDR Guick Reference Jumpers Description Default Settin JBT1 CMOS Clear Pins 1 2 Normal JPA1 2 SCSI Ch A B Termination Open Enabled JPL1 2 LAN 1 2 Enable Disable Closed Enabled JPWAKE Keyboard Wake Up Pins 1 2 Disabled JP2 SCSI Enable Disable Pins 1 2 Enabled JP3 VGA Enable Disable Pins 1 2 Enabled JP6 JP7 Front Side Bus Speed Select See page 2 12 JP8 Speaker Enable Disable Pins 1 2 Enabled JP10 VGA IRQ Enable Disable Pins 1 2 Enabled Connectors Description AGP AGP Video Output COM1 2 COM1 2 Serial Port Connector Chassis Fan 1 3 Chassis Fan Headers 1 2 and 3 CPU Fan 1 2 CPU 1 and 2 Fan Headers DIMM 1 4 DDR Memor
24. 5V 8 PW OK Fines RE 19 45V 9 5VSB 20 45V 10 12V T T Pin 12 Pin 1 Table 2 1 PS Color Definitions Color Definition Orange 3 3V Black Com n Red 5V Figure B SSI 20 pin power cable White Power OK Yellow 12V Pin 20 Pin 11 Purple 5V standby Brown 5V For reference only T T Pin 10 Pin 1 Infrared Connector Infrared Pin Definitions J10 The header at J10 is for infrared Fin ma Number Definition devices See the table on the right 1 5V 2 K for pin definitions Refer to the 3 RBY Technical Support section of our dE web page for information on the infrared devices you can connect to the system 2 7 SUPER P3TDDR User s Manual Power Button Power Button Pin The PW_ON connector is located hk Definitions JF1 on pins 1 and 2 of JF1 Momen Pin tarily contacting both pins will Number Definition power on off the system The u d user can also configure the power on button to function as a suspend button see the Power Button Mode setting in BIOS To turn off the power when set to suspend mode hold down the power but ton for at least 4 seconds See the table on the right for pin defini tions Reset Button Reset Button Pin The Reset connector is located on Definitions IE pins 3 and 4 of JF1 This connec Fin me Number Definition tor attaches to the hardware reset Een switch on the computer case Gic nd See the
25. CSI manual One 1 set of SCSI driver diskettes One 1 68 pin LVD SCSI cable retail only 1 1 SUPER P3TDDR User s Manual Contacting Supermicro Headguarters Address Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 E mail marketing supermicro com General Information support supermicro com Technical Support Web site www supermicro com Europe Address Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 E mail sales supermicro nl General Information support supermicro nl Technical Support rmaQsupermicro nl Customer Support Asia Pacific Address 3F 4753 Chung Cheng Road Chung Ho City Taipei Hsien Taiwan R O C Tel 886 2 8228 1366 Fax 886 2 8221 2790 Web Site www supermicro com tw Email support supermicro com tw Technical Support Tel 886 2 8228 1366 ext 132 Chapter 1 Introduction SUPER P3TDDR Figure 1 1 SUPER P3TDDR Image 1 3 SUPER P3TDDR User s Manual Figure 1 2 SUPER P3TDDR Layout not drawn to scale KB TWE ATKFOWER J6 CPU Fan 1 Mouse E USB 0
26. EPP Mode Select This option allows the user to select the EPP mode The settings are EPP 1 9 and EPP 1 7 ECP Mode Use DMA This option allows the user to change the ECP Mode Use DMA setting The settings are 1 and 3 4 14 Chapter 4 Award BIOS 4 4 4 Hardware Monitors When the item Hardware Monitors is highlighted press the zEnter key to activate the sub menu shown below CP Warning Tanperaners CPU Warning Temperatures This item allows the user to set the CPU temperature threshold When the CPU temperature reaches the set threshold temperature an alarm will sound and a warning message will be displayed on the screen The settings are Disabled 60 C 140 F 65 C 149 F 70 C 158 F 75 C 167 F 80 C 176 F 85 C 185 F and 90 C 194 F The remaining items listed are monitors not settings and are self explanatory 4 15 SUPER P3TDDR User s Manual 4 4 5 Processor Features Manu Laval P Champs CPU s feature When the item Processor Features is highlighted press the Enter key to activate the sub menu shown below CPU L1 Cache Set this option to Enabled to activate the CPU L1 cache The settings are Enabled and Disabled CPU L2 Cache Set this option to Enabled to activate the CPU L2 cache The settings are Enabled and Disabled 4 16 Chapter 4 Award BIOS CPU L2 Cache ECC Checking Set this option to Enabled to a
27. Generator switch 17 Reserved 18 Detect CPU information including brand SMI type Cyrix or Intel and CPU level 586 or 686 19 Reserved 1Ah Reserved 1Bh Initial interrupts vector table If no special specified all H W interrupts are directed to SPURIOUS_INT_HDLR amp S W interrupts to SPURIOUS_soft_HDLR 1Ch Reserved 1Dh Initial EARLY_PM_INIT switch 1Eh Reserved 1Fh Load keyboard matrix notebook platform 20h Reserved 21h HPM initialization notebook platform 22h Reserved 23h 1 Check validity of RTC value e g a value of 5Ah is an invalid value for RTC minute 2 Load CMOS settings into BIOS stack If CMOS checksum fails use default value instead 3 Prepare BIOS resource map for PCI amp PnP use If ESCD is valid take into consideration of the ESCD s legacy information 4 Onboard clock generator initialization Disable respective clock resource to empty PCI amp DIMM slots 5 Early PCI initialization Enumerate PCI bus number Assign memory amp I O resource Search for a valid VGA device amp VGA BIOS and put it into C000 0 24h Reserved 25h Reserved 26h Reserved 27h Initialize INT 09 buffer 28h Reserved 29h Program CPU internal MTRR P6 amp PII for 0 640K memory address Initialize the APIC for Pentium class CPU Program early chipset according to CMOS setup Example onboard IDE controller Measure CPU speed Invoke video BIOS 2Ah Reserved 2Bh Reserved 2Ch Reserved Appendix B
28. NEL CHECK and RAM PARITY ERROR messages when the segment that has caused the problem cannot be isolated OFFENDINGSEGMENT This message is used in conjunction with the I O CHANNEL CHECK and RAM PARITY ERROR messages when the segment that has caused the problem has been isolated PRESS AKEY TO REBOOT This will be displayed at the bottom screen when an error occurs that requires you to reboot Press any key and the system will reboot PRESS F1 TO DISABLE NMI F2 TO REBOOT When BIOS detects a Non maskable Interrupt condition during boot this will allow you to disable the NMI and continue to boot or you can reboot the system with the NMI enabled RAM PARITY ERROR CHECKING FOR SEGMENT Indicates a parity error in Random Access Memory SYSTEM HALTED CTRL ALT DEL TO REBOOT Indicates the present boot attempt has been aborted and the system must be rebooted Press and hold down the CTRL and ALT keys and press DEL AS SUPER P3TDDR User s Manual FLOPPY DISK S fail 80 amp Unable to reset floppy subsystem FLOPPY DISK S fail 40 Floppy Type dismatch Hard Disk s fail 80 amp HDD reset failed Hard Disk s fail 40 HDD controller diagnostics failed Hard Disk s fail 20 amp HDDinitialization error Hard Disk s fail 10 Unable to recalibrate fixed disk Hard Disk s fail 08 Sector Verify failed Keyboard is locked out Unlock the key BIOS detect the keyboard is locked P17 o
29. OS information that determines the system parameters may be changed by entering the BIOS Setup utility This Setup utility can be ac cessed by pressing the Delete key at the appropriate time during system boot see below Starting the Setup Utility Normally the only visible POST Power On Self Test routine is the memory test As the memory is being tested press the Delete key to enter the main menu of the BIOS Setup utility From the main menu you can access the other setup screens such as the Chipset and Power menus Section 4 3 gives detailed descriptions of each parameter setting in the Setup utility 4 1 SUPER P3TDDR User s Manual 4 2 Running Setup Optimal default settings are in bold text unless otherwise noted The BIOS setup options described in this section are selected by choos ing the appropriate text from the Main BIOS Setup screen All displayed text is described in this section although the screen display is often all you need to understand how to set the options see on next page When you first power on the computer the AwardBIOS is immediately activated While the BIOS is in control the Setup program can be activated in one of two Ways 1 By pressing Delete immediately after turning the system on or 2 When the message shown below appears briefly at the bottom of the screen during the POST Power On Self Test press the Delete key to activate the Main Setup Menu Press the
30. SI 2 IDE bus master interfaces support UDMA 100 1 floppy port interface up to 2 88 MB 2 Fast UART 16550A compatible serial ports 1 EPP Enhanced Parallel Port ECP Extended Capabilities Port supported parallel printer port PS 2 mouse and PS 2 keyboard ports 1 infrared port 4 USB ports 2 Ethernet ports 1 VGA port Other Selectable CPU and chassis fan speed control set in BIOS Fan tachometer is shared between CPU 1 2 fan and chassis 1 2 fan Fan tachometer detection will indicate failure if both a CPU and a chassis fan with the same number are used simultaneously Internal external modem ring on Recovery from AC power loss control Wake on LAN WOL Wake on Modem WOM Multiple FSB clock frequency selections set in BIOS amp on motherboard SCSI RAID option CD Utilities BIOS flash upgrade utility awdflash exe Drivers for the VIA Apollo Pro 266T chipset Dimensions SUPER P3TDDR ATX 11 6 x 11 2 294 64 mm x 284 48 mm 1 8 Chapter 1 Introduction 1 2 Chipset Overview The VIA Apollo Pro 266T chipset is a high performance cost effective and energy efficient chipset for the implementation of AGP V Link PCI LPC com puter systems based on 64 bit 370 pin Pentium III 66 100 133 MHz FSB processors VIA s Apollo Pro 266T chipset consists of two major components the VT8653 V Link Memory Host System controller North Bridge and the VT8233 V Link Client PCI LPC controller South Bridge The
31. SUPERO SUPER PSTDDR USER S MANUAL Revision 1 0a The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at lt http www supermicro com gt SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA The State
32. The auto switching voltage regulator for the CPU core can support up to 20A of current and auto sense voltage IDs ranging from 1 3V to 3 5V This will allow the regulator to run cooler and thus make the system more stable 1 4 ACPI Features ACPI is an acronym for Advanced Configuration and Power Interface The ACPI specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features through out a PC system including its hardware operating system and application software This enables the system to turn on and off peripherals such as CD ROMs network cards hard disk drives and printers automatically This also includes consumer devices connected to the PC such as VCRs TVs telephones and stereos In addition to enabling operating system directed power management ACPI provides a generic system event mechanism for Plug and Play and an oper ating system independent interface for configuration control ACPI lever 1 11 SUPER P3TDDR User s Manual ages the Plug and Play BIOS data structures while providing a processor architecture independent implementation that is compatible with both Win dows 98 Windows NT and Windows 2000 You can check to see if ACPI has been properly installed by looking for it in the Device Manager which is located in the Control Panel in Windows Microsoft OnNow The OnNow design initiative is a comprehensive system wide approach to system a
33. Write PCI Master Write signals will have no delays The settings are Enabled and Disabled PCI Delayed Transition If enabled the PCI signal transition will be delayed The settings are Enabled and Disabled On Chip IDE Channel 10 11 If Enabled the BIOS support of onchip IDE 10 11 will be activated The settings are Enabled and Disabled IDE Prefetch Mode If Enabled the IDE Prefetch Mode function will be activated The settings are Enabled and Disabled On Chip USB Controller If Enabled this option will allow the user to acctivate the BIOS support of the On Chip USB Controllers The settings are All Disabled All Enabled 1 amp 2 USB Ports 2 amp 3 USB Ports 1 USB Port 2 USB Port and 3USB port USB Keyboard Support If Enabled this option allows the user to activate the BIOS support of the On Chip USB Keyboard Controller The settings are Disabled and Enabled SUPER P3TDDR User s Manual 4 4 3 Integrated Peripherals Hanu Leuel nknard Lo LEG De ip M When the item Integrated Peripherals is highlighted press the Enter key to activate the following sub menu screen When the above menu appears select the items and press the Enter key to display the options Onboard FDC Controller Select Enabled if your system has a floppy disk controller FDC installed on the main board and you wish to use it The settings are Enabled and Disabl
34. anty only covers normal consumer use and does not cover dam ages incurred in shipping or from failure due to the alternation misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems SUPER P3TDDR User s Manual Notes Chapter 4 Award BIOS Chapter 4 AwardBIOS 4 1 Introduction This chapter describes the AwardBIOS for the P3TDDR The Award ROM BIOS is stored in a Flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of the Supermicro web site lt http www supermicro com gt for any changes to BIOS that may not be reflected in this manual System BIOS The BIOS is the Basic Input Output System used in all IBM PC XT AT and PS 29 compatible computers The AwardBIOS flash chip stores the system parameters such type of disk drives video displays etc in the CMOS The CMOS memory requires very little electrical power When the computer is turned off a back up battery provides power to the BIOS flash chip enabling it to retain system parameters Each time the computer is powered on the computer is configured with the values stored in the BIOS ROM by the system BIOS which gains control at boot up How To Change the Configuration Data The CM
35. atsinks to the processors Each of your heatsinks should have a 3 pin fan connector which should be connected to the CPU FAN header Make sure that good contact is made between the processors and the heatsinks Insufficient contact incorrect types of heatsinks fans or ther mal compound used or improper amount of thermal compound applied on the CPU die can cause a processor to overheat which may crash the system 2 2 Chapter 2 Installation Notched Corner Processor installed Figure 2 1 FCPGA Socket Empty and with Processor Installed low power Pentium III shown 2 3 Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis Chassis may include a variety of mounting fasteners made of metal or plastic Although a chassis may have both types metal fasteners are the most highly recommended because they ground the motherboard to the chassis For this reason it is best to use as many metal fasteners as possible 2 3 SUPER P3TDDR User s Manual Installing DIMMs CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage Memory Module Installation See Figure 2 2 Insert each DDR RAM memory module vertically into its slot Pay attention to the two notches along the bottom of the module to prevent inserting the DIMM incorrectly Gently press down on the memory module until it snaps into place
36. blue connector connects to the onboard IDE connector inter face and the other connector s to your hard drive s Consult the docu mentation that came with your disk drive for details on actual jumper locations and settings for the hard disk drive Parallel Port Connector The parallel port is located above the VGA port and COM1 Refer to the table below for pin definitions Parallel Printer Port Pin Definitions Pin Number Function Pin Number Function 1 Strobe 2 Auto Feed 3 Data Bit 0 4 Error 5 Data Bit 1 6 Init 7 Data Bit 2 8 SLCT IN 9 Data Bit 3 10 GND 11 Data Bit 4 12 GND 18 Data Bit 5 14 GND 15 Data Bit 6 16 GND 17 Data Bit 7 18 GND 19 ACK 20 GND 21 BUSY 22 GND 23 PE 24 GND 25 SLCT 26 NC 2 15 SUPER P3TDDR User s Manual Floppy Connector The floppy connector is located on J9 Refer to the table below for pin definitions Floppy Connector Pin Definitions J9 Pin Number Function Pin Number Function 1 GND 2 FDHDIN 3 GND 4 Reserved 5 Key 6 FDEDIN 7 GND 8 Index 9 GND 10 Motor Enable 11 GND 12 Drive Select B 13 GND 14 Drive Select A 15 GND 16 Motor Enable 17 GND 18 DIR 19 GND 20 STEP 21 GND 22 Write Data 23 GND 24 Write Gate 25 GND 26 Track 00 27 GND 28 Write Protect 29 GND 30 Read Data 31 GND 32 Side 1 Select 33 GND 34 Diskette IDE Connector Pin Definitions IDE 1 IDE 2 IDE Connectors Pin Number Function Pin Number Function 1 Res
37. computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges SUPER P3TDDR User s Manual 1 6 Super I O The functions of the disk drive adapter for the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selection a clock generator drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports four 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communica tion ports UARTs one of which supports serial infrared communication Each UART includes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTSs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems At any given time the Super I O supports one of the followinga PC com patible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The Super
38. ctivate the ECC checking of the CPU L2 cache The settings are Disabled and Enabled Processor Number Feature Set this option to Enabled to make your CPU identification number available to applications and to be potentially reported The settings are Disabled and Enabled Use Disabled if you are concerned about User ID privacy CPU Ratio This option allows the user to set the CPU clock FSB speed ratio The settings are x3 x3 5 x4 x4 5 x5 x5 5 x6 x6 5 x7 X7 5 x8 x8 5 x9 x9 5 x10 x10 5 x12 x13 x14 x15 and x16 4 5 PnP PCI Configurations Highlight the item PnP PCI on the main menu bar to activate the following screen PGI Glet i ig ulert SUPER P3TDDR User s Manual PCI Slot 1 2 3 IRQ Select This feature allows the user to determine the PCI interrupts or by choosing Auto allows the system to make such a determination The setting options are Auto 3 4 5 7 9 10 and 11 USB and LAN2 IRQ Select This feature allows the user to determine the PCI interrupts or by choosing Auto allows the system to make such a determination The setting options are Auto 3 4 5 7 9 10 and 11 PNP OS Installed Select Yes if you are using an operating system that supports Plug and Play Select No if you need the BIOS to configure non boot PnP devices The settings are Yes and No Reset Configuration Data
39. d is required every time the system boots up or if it is required only when you enter the CMOS setup The settings are System and Setup 4 24 Chapter 4 Award BIOS 4 9 Exit Setup Select Exit from the Main Menu bar to activate the following screen Saee b Exide Setup 4 25 SUPER P3TDDR User s Manual Save amp Exit Setup When the item Save amp Exit is highlighted press the Enter key If you then highlight the letter Y and press Enter you will save the changes you ve made in the BIOS program CMOS and exit Setup Your system should then continue with the boot up procedure The options are Y and N Exit Without Saving When the item Exit Without Saving is highlighted press the lt Enter gt key If you then highlight the letter Y and press lt Enter gt all the changes you ve made in the CMOS will not be saved when you exit the CMOS Setup Your system should then continue with the boot up procedure The options are Y and N Load Fail Safe Defaults When the item Load Fail Safe Defaults is highlighted press the lt Enter gt key If you then highlight the y and press lt Enter gt you will load the BIOS Fail Safe default values for the most stable system operation The settings are Y and N Load Optimal Defaults When the item Load Optimal Defaults is highlighted press the key Y to load the default values that will give you optimal system performance The s
40. ded to the motherboard 1 12 Chapter 1 Introduction External Modem Ring On Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply Wake On LAN WOL Wake On LAN is defined as the ability of a management application to power up a computer remotely that is powered off Remote PC setup updates and asset tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The motherboards have a 3 pin header WOL to connect to the 3 pin header on a Network Interface Card NIC that has WOL capability Wake On LAN must be enabled in BIOS Note that Wake On Lan can only be used with an ATX 2 01 or above compliant power supply 1 5 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates The SUPER P3TDDR accommodates ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2 02 or above Additionally in ar eas where noisy power transmission is present you may choose to install a line filter to shield the
41. do not upgrade your BIOS if you are not experiencing problems with your system Updated BIOS files are lo cated on our web site at lt http www supermicro com gt Please check our BIOS warning message and the info on how to update your BIOS on our web site Also check the current BIOS revision and make sure it is newer than your BIOS before downloading Select your motherboard model and download the BIOS file to your computer Unzip the BIOS update file and you will find the readme txt flash instructions the awdflash exe BIOS flash utility and the BIOS image xxxx bin files Copy these files onto a bootable floppy and reboot your system It is not necessary to set BIOS boot block protection jumpers on the motherboard At the DOS prompt enter the command awdflash Type in the BIOS file that you want to update xxxx bin SUPER P3TDDR User s Manual Question After flashing the BIOS my system does not have video How can correct this Answer f the system does not have video after flashing your new BIOS it indicates that the flashing procedure failed To remedy this first clear CMOS per the instructions in this manual and retry the BIOS flashing proce dure If you still do not have video please use the following BIOS Recov ery Procedure First make sure the JPWAKE jumper is disabled Then turn your system off and place the floppy disk with the saved BIOS image file see above FAQ in drive A Press and hold Alt and
42. ed 4 12 Chapter 4 Award BIOS Onboard Serial Port 1 This option allows the user to set the address and the corresponding IRQ for Serial Port 1 The settings are Disabled 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 and Auto Onboard Serial Port 2 This option allows the user to set the address and the corresponding IRQ for Serial Port 2 The settings are Disabled 3F8 IRQ4 2F8 IRQ3 3E8 IRO4 2E8 IRQ3 and Auto UART Mode Select This option allows the user to select the UART mode for BIOS The settings are IrDA ASKIR and Normal RxD TxD Active This option allows the user to change the settings for the RxD TxD Active function The settings are Hi Hi Hi Lo Lo Hi and Lo Lo IR Transmission Delay If Enabled the transmssion of IR infrared signals will be delayed The settings are Enabled and Disabled UR2 Duplex Mode This option sets the UR2 Duplex Mode The settings are Full and Half Use IR Pins This item sets the mode for Use IR Pins The settings are RxD2 TxD2 and IR Rx2Tx2 Onboard Parallel Port This option allows the user to set the address and the corresponding IRQ for the onboard parallel port The settings are Disabled 378 IRQ7 278 IRQ5 and 3BC IRQ7 4 13 SUPER P3TDDR User s Manual Parallel Port Mode This option sets the mode for the onboard Parallel Port The settings are SPP EPP ECP and ECP EPP
43. ed in the system if there are two floppy disk drives installed on the mainboard The options are Disabled and Enabled IDE Primary Master IDE Primary Slave IDE Secondary Master IDE Secondary Slave These options allow the user to set the parameters of the IDE Primary Master Slave and IDE Secondary Master Slave slots Press Enter to activate the following sub menu screen for detailed options of these items Set the correct configurations accordingly The items included in the sub menu are listed below 4 3 SUPER P3TDDR User s Manual DE Primary Master Hem tate Ca Cy He re La fio Ha Renu Leuel bk fa aubs dmtrct the EDE ize head on this channel E eie Racker pes ity Linder ad PT kime ing Zena ctar inary Mester ena luta 1 1 H H H H H H IDE HDD Auto Detection Press the lt Enter gt key to activate the IDE HDD Auto Detection function which will allow BIOS to automatically detect the status of the IDE HDD installed in the system such as the size and number of cylinders IDE Primary Master This option allows the user to determine the manner in which the AwardBIOS sets the settings for the IDE Primary Master Device The options are None Auto and Manual Access Mode This item determines the location through which the AwardBIOS accesses the IDE Primary Master Device The settings are CHS LBA Large and Auto IDE Primary Master Slave PIO See
44. ed off in which case you must press the power switch to turn the system back on or for it to return automatically to a power on state See the Power Lost Control setting in the BIOS chapter of this manual to change this setting The default setting is Always OFF 1 9 SUPER P3TDDR User s Manual 1 3 PC Health Monitoring This section describes the PC health monitoring features of the SUPER P3TDDR motherboard Seven Onboard Voltage Monitors for the CPU Core Chipset Voltage 3 3V 5V and 12V The onboard voltage monitor will scan these seven voltages continuously If a voltage becomes unstable the monitor will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor Four Fan Status Monitor with Firmware Software On Off Control The PC health monitor can check the RPM status of the cooling fans The onboard 3 pin CPU and chassis fans are controlled by the power manage ment functions The thermal fan is controlled by the overheat detection logic Environmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will activate the thermal control fan whenever the CPU temperature ex ceeds a user defined threshold The overheat circuitry runs independently from the CPU It can continue to monitor for overheat conditions even when the CPU is in sleep mode Once it detects that the CPU temperature is t
45. eed sese 2 12 01V O30 T RR 2 13 Keyboard Wake Up sesessseeeeeeeeee nennen nennen nennen 2 13 SCSI Ch A B Termination eese nennen 2 13 SCSI Enable Disable rete tette teet ace 2 14 VGA Enable Disable essen mene 2 14 VGA IRQ Speaker Enable Disable sse 2 14 LAN Enable Disable ertt rtr 2 14 2 8 Parallel Port Floppy Hard Disk Drive and SCSI Connections 2 15 Parallel Port Connector sessssseeeeenenenee nens 2 15 Floppy Connector ioc Pa e C Rei EE nba se ds 2 16 IDE CONNECTOT S oeste tee Ht eh Ea etc dp vede tege 2 16 Ultra160 SCSI Connector 2 17 2 9 Installing Software Drivers seeneenneenee 2 18 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures sesseeeeneeneeeneeeneeneenne 3 1 Before Power On sse nennen nennen ener enne 3 1 NG IPOWE ue 3 1 NO dre ro 3 1 Memory EFtOF S irpan tam OR HER da SOJ so Pleat rena Ese 3 2 3 2 Technical Support Procedures cececeeseeseeseeeeeeeeeeeeeceeeeeeeaeeaeeeeseeeeeeeeseaees 3 2 3 3 Frequently Asked Questions esee 3 3 3 4 Returning Merchandise for Service ssssssee 3 5 Chapter 4 AwardBIOS 4 1 IntrOQUGtOTa iccirco cree cat XE Re Bad Ren eg NER ease XR ce RE ea RS 4 2 Running Setup estere iege cete ete e d ap du o
46. ertainment and then Volume Control Under the Properties tab scroll down the list of devices in the menu and check the box beside Microphone Chapter 3 Troubleshooting Question How do connect the ATA66 100 cable to my IDE device s Answer The 80 wire 40 pin ATA66 100 IDE cable that came with your system has two connectors to support two drives This special cable must be used to take advantage of the speed the ATA66 100 technology offers Connect the blue connector to the onboard IDE header and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings Table 3 1 Shared IRQs PCI 1 shares an IRQ with the onboard SCSI PCI 2 shares an IRQ with the onboard SCSI PCI 3 shares an IRQ with LAN1 and SCSI RAID Note If the SCSI RAID option is used then PCI 3 is unavailable for use 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be ap plied for all orders that must be mailed when service is complete This warr
47. es Memory Parity ECC Check Enabled adds a parity check to the boot up memory tests Select Enabled only if the system DRAM contains parity Settings are Enabled and Disabled System BIOS Cacheable If enabled the system BIOS information stored in the BIOS ROM Read Only Memory chip will be written and temporarily stored in the cacheable section of the memory so the CPU has faster access to the information The settings are Enabled and Disabled Video BIOS Shadow If enabled the Video BIOS information stored in the BIOS ROM Read Only Memory chip will be written and temporarily stored in the cacheable section of the memory to provide faster access to the information The settings are Enabled and Disabled Memory Hole To improve the performance of the sytem a certain section of the memory will be reserved for the use of the devices installed in the PCI slots This section of memory must be mapped into the memory space below 16MB The settings are 15M 16M and Disabled CPU to PCI Write Buffer To improve the performance of the system a certain section of the memory will be designated as Write Buffer to temporarily store the data CPU writes to PCI to provide faster access This information can be exe codes or operational instructions for the system The settings are Enabled and Disabled 4 10 Chapter 4 Award BIOS PCI Master 0 WS Write If enabled the transimission of PCI Master
48. essor platform 56h Reserved 57h 1 Display PnP logo 2 Early ISA PnP initialization Assign CSN to every ISA PnP device B 3 SUPER P3TDDR User s Manual POST hex Description 58h Reserved 59h Initialize the combined Trend Anti Virus code 5Ah Reserved 5Bh Optional Feature Show message for entering AWDFLASH EXE from FDD optional 5Ch Reserved 5Dh 1 Initialize Init Onboard Super IO switch 2 Initialize Init Onboard AUDIO switch SEh Reserved SFh Reserved 60h Okay to enter Setup utility i e not until this POST stage can users enter the CMOS setup utility 61h Reserved 62h Reserved 63h Reserved 64h Reserved 65h Initialize PS 2 Mouse 66h Reserved 67h Prepare memory size information for function call INT 15h ax E820h 68h Reserved 69h Turn on L2 cache 6Ah Reserved 6Bh Program chipset registers according to items described in Setup amp Auto configuration table 6Ch Reserved 6Dh 1 Assign resources to all ISA PnP devices 2 Auto assign ports to onboard COM ports if the corresponding item in Setup is set to AUTO 6Eh Reserved 6Fh 1 Initialize floppy controller 2 Set up floppy related fields in 40 hardware 70h Reserved 71h Reserved 72h Reserved 73h Optional Feature Enter AWDFLASH EXE if AWDFLASH is found in floppy drive ALT F2 is pressed 74h Reserved 75h Detect amp install al
49. est special keyboard controller for Winbond 977 series Super I O chips 2 Enable keyboard interface 09h Reserved OAh Disable PS 2 mouse interface optional Auto detect ports for keyboard amp mouse followed by a port amp interface swap optional Reset keyboard for Winbond 977 series Super I O chips OBh Reserved OCh Reserved ODh Reserved OEh Test F000h segment shadow to see whether it is R W able or not If test fails keep beeping the speaker Debuggig LED Encoding Post Code Encoded LED Task Cih 001b Memory Detection 05h 010b BIOS Shadowing 07h 011b KEC Initialization OEh 100b Shadow RAM test 14h 101b Chipse defaults loaded 26h 110b Clock generator configured 2Bh 111b ficko initialization 52h 000b Just clear IEDs B 1 SUPER P3TDDR User s Manual POST hex Description OFh Reserved 10 Auto detect flash type to load appropriate flash R W codes into the run time area in F000 for ESCD amp DMI support 11 Reserved 12 Use walking 1 s algorithm to check out interface in CMOS circuitry Also set real time clock power status and then check for override 13 Reserved 14h Program chipset default values into chipset Chipset default values are MODBINable by OEM customers 15 Reserved 16h Initial Early Init Onboard
50. et IDE 2 GND 3 Host Data 7 4 Host Data 8 i Po E ss Data s GS Dad There are no jumpers to config 7 Host Data 5 8 Host Data 10 ure the onboard IDE interfaces 9 Host Data 4 10 Host Data 11 11 Host Data 3 12 Host Data 12 IDE1 and IDE2 Refer to the 13 Hostales dd HostData 13 table on the right for pin defini 15 Host Data 1 16 Host Data 14 17 Host Data 0 18 Host Data 15 tions You must use the 19 GND 20 Key j A 21 DRO3 22 GND ATA100 66 cable included with 23 VO Write 24 GND your system to benefit from the 25 l O Read 26 GND 27 IOCHRDY 28 BALE ATA100 66 technology 29 DACK3 30 GND 31 IRQ14 32 IOCS16 33 Addr 1 34 GND 35 Addr 0 36 Addr 2 37 Chip Select 0 38 Chip Select 1 39 Activity 40 GND 2 16 Chapter 2 Installation Ultra Wide SCSI Connector Refer to the table below for pin definitions for the Ultra Wide SCSI connectors The connectors are located at JA1 JA2 and JA3 Ultra Wide SCSI Connector JA1 JA2 JA3 Pin Number Function Pin Number Function 1 GND 35 DB 12 2 GND 36 DB 13 3 GND 37 DB 14 4 GND 38 DB 15 5 GND 39 Parity H 6 GND 40 DB 0 a GND 41 DB 1 8 GND 42 DB 2 9 GND 43 DB 3 10 GND 44 DB 4 11 GND 45 DB 5 12 GND 46 DB 6 13 GND 47 DB 7 14 GND 48 Parity L 15 GND 49 GND 16 GND 50 Termpwrd 17 Termpwrd 51 Termpwrd 18 Termpwrd 52 Termpwrd 19 GND 53 NC 20 GND 54 GND 21 GND 55 ATTN 22 GND 56 GND 23 GND 57 BSY 24 GND 58 ACK 25 GND 59 RST 26
51. ettings are Y and N 4 26 Appendix A AwardBIOS Post Messages Appendix A AwardBIOS POST Messages During the Power On Self Test POST the BIOS will check for errors If an error is found and a correction is needed the BIOS will activate an alarm or display a message If a message is displayed it will be accompanied by the following PRESSF1TO CONTINUE CTRL ALT ESC OR DELTO ENTER SETUP POST Beep Codes Currently there are two kinds of beep codes used in AwardBIOS One code indicates that a video error has occurred and that the BIOS cannot initialize the video screen to display any additional information This beep code consists of a single long beep followed by two short beeps The other code indicates that a Rambus error has occurred This beep code consists of a single long beep that sounds repeatedly Error Messages One or more of the following messages may be displayed if the BIOS detects an error during the POST This list includes messages for both the ISA and the EISA BIOS CMOSBATTERYHASFAILED The CMOS battery is no longer functional It should be replaced CMOS CHECKSUM ERROR The CMOS hecksum is incorrect This can indicate that CMOS has been corrupted This error may have been caused by a weak battery Check the battery and replace if necessary DISK BOOT FAILURE INSERT SYSTEM DISK AND PRESS ENTER No boot device was found This could mean that either a boot drive was not detected or the drive does
52. f the keyboard controller is pulled low Keyboard error or no keyboard present Cannot initialize the keyboard Make sure that the keyboard is attached correctly and no keys are being pressed during the boot Manufacturing POST loop System will repeat POST procedure infinitely while the P15 of keyboard controller is pulled low This is also used for M B burn in testing BIOS ROM checksum error System halted The checksum of ROM address F0000H FFFFFH is bad Memory test fail BIOS reports the a memory test fail if the onboard memory has an error A4 Appendix B AwardBIOS POST Codes Appendix B AwardBIOS POST Codes This section lists the POST Power On Self Testing Codes for the Award BIOS POST hex Description CH Test CMOS R W functionality COh Early chipset initialization Disable shadow RAM Disable L2 cache socket 7 or below Program basic chipset registers CIh Detect memory Auto detection of DRAM size type and ECC Auto detection of L2 cache socket 7 or below C3h Expand compressed BIOS code to DRAM C5h Call chipset hook to copy BIOS back to E000 amp F000 shadow RAM Ohl Expand the Xgroup codes locating in physical address 1000 0 02h Reserved 03h Initial Superio Early Init switch 04h Reserved 05h 1 Blank out screen 2 Clear CMOS error flag 06h Reserved 07h 1 Clear 8042 interface 2 Initialize 8042 self test 08h 1 T
53. g pate 4 3 Main BIOS Setup neret 4 4 Advanced BIOS Setup 4 5 PCI PnP Configurations ssssseeeeeeenenteeneneneen enne 4 17 4 6 Power Management ncn ten ern ri eere ane ha een 4 19 4 7 Boot up Devices s sssesssesssrnesnsrnsrnnruseanrassnnrasonnrasennnuseatnsnaeasonnenecaneusennensnnnt 4 22 4 8 Security Setup cine nre ERR dd 4 24 SUPER P3TDDR User s Manual 4 9 ExI Set p oer pneter de epa t ttp cotone ts era e ctp od 4 25 Appendices Appendix A AwardBIOS POST Messages ssseeeeeeme A 1 Appendix B AwardBIOS POST Codes Appendix C AwardBIOS Beep Codes vi Chapter 1 Introduction Chapter 1 Introduction 1 1 Overview Checklist Congratulations on purchasing your computer motherboard from an ac knowledged leader in the industry Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in guality and performance Please check that the following items have all been included with your P3TDDR motherboard If anything listed here is damaged or missing con tact your retailer One 1 Supermicro PSTDDDR mainboard One 1 ATA66 100 ribbon cables for IDE devices One 1 floppy ribbon cable One 1 Supermicro CD or diskettes containing drivers and utilities One 1 backpanel shield One 1 User s BIOS Manual One 1 USB cable retail only Two 2 CPU heatsinks retail only SCSI Accessories One 1 S
54. ghlighted on the main menu bar you will see the following screen ACPI Function SUPER P3TDDR User s Manual ACPI Function This item allows you to Enable and Disable the Advanced Configuration and Power Management The settings are Enabled and Disabled ACPI Suspend Type This item allows the user to determine the ACPI Suspend type The settings are 81 POS and S3 STR Power Management Option This option sets the degree of power saving for the system especially for HDD Power Down Doze Mode and Suspend Mode The settings are User Define Min Saving and Max Saving Suspend Mode This item sets the system Suspend Mode The settings are Disabled 1 Min 2 Min 4 Min 6 Min 8 Min 10 Min and 20 Min Wake Up by PME If Enabled the user is able to wake up the system by a Power Management Event The settings are Enabled and Disabled Wake Up by WOL WOM RI If Enabled the user is able to wake up the system by the use of Wake on LAN WOL Wake on Modem WOM or Ring In RI The settings are Enabled and Disabled HDD Power Down If Enabled this option will allow the AwardBIOS to power down the hard disk drive s The settings are Disabled 1 min 2 min 3 min 4 min 5 min 6 min and 7 min 4 20 Chapter 4 Award BIOS Video Off Option This option sets the status of video device and monitor when the system is in the Suspend Mode When
55. ibed in this section d Chipset Features red Feriphere ls Hemi Lewes k Panitarz Uira Pratectian Beat Peg noes s 4 4 1 Advanced BIOS Features When the required item in the Advanced BIOS Features is highlighted press the lt Enter gt key to activate the selection as shown below Advanced MOS Features Init erem Firrt mp Quick Power On alf Tert Enabled Boot U p Statik tw Gate AL ba eae IFazt 1 Tuprematir Setting Disabled E Tupematke Rate Chari far Tupematic Delay Rane Be RPG Jarzira Control Per 0 1 41 SE Pelect Far IMA gt HAF DHsn Ez FURCH After FUA Padl TOFFI Full creen LOGO bou ELEnaklrdl 4 6 Chapter 4 Award BIOS Auto Detect DIMM PCI CLK If enabled this feature will allow the BIOS automatically to detect the status of the DIMM PCI clock The settings are Enabled and Disabled Init Display First This setting allows the user to determine which device will be first displayed when the sytem boots up a device installed in the PCI slot or a device intalled in the AGP slot The options are PCI Slot and AGP Quick Power On Self Test If enabled this feature will speed up the POST Power On Self Test routine after the computer is switched on The settings are Enabled and Disabled If Disabled the POST will run at normal speed Boot Up NumLock Status This option enables the system to check the status of the NumLock key during boot up The settings are On
56. l IDE devices HDD LS120 ZIP CDROM 76h Reserved 77h Detect serial ports amp parallel ports 78h Reserved 79h Reserved 7Ah Detect amp install co processor 7Bh Reserved 7Ch Reserved 7Dh Reserved 7Eh Reserved 7Fh 1 Switch back to text mode if full screen logo is supported If errors occur report errors amp wait for keys If no errors occur or F1 key is pressed to continue Clear EPA or customization logo Appendix B AwardBIOS POST Codes POST hex Description Reserved Reserved 1 Call chipset power management hook 2 Recover the text font used by EPA logo not for full screen logo 3 If password is set ask for password Save all data in stack back to CMOS Initialize ISA PnP boot devices USB final Initialization NET PC Build SYSID structure Switch screen back to text mode Set up ACPI table at top of memory Invoke ISA adapter ROMs Assign IRQs to PCI devices Initialize APM Clear noise of IRQs Reserved Reserved Reserved Reserved Reserved Reserved Reserved Read HDD boot sector information for Trend Anti Virus code Enable L2 cache Program boot up speed Chipset final initialization Power management final initialization Clear screen amp display summary table Program K6 write allocation Program P6 class write combining Program daylight saving Update keyboard LED amp typematic rate Build MP table
57. n tacting Technical Support 2 BIOS upgrades can be downloaded from our web site at http www supermicro com techsupport download htm Note Not all BIOS can be flashed depending on the modifica tions to the boot block code Chapter 3 Troubleshooting 3 If you still cannot resolve the problem include the following information when contacting Supermicro for technical support Motherboard model and PCB revision number BIOS release date version this can be seen on the initial display when your system first boots up System configuration An example of a Technical Support form is on our web site at lt http www supermicro com techsupport contact_support htm gt 4 Distributors For immediate assistance please have your account number ready when placing a call to our technical support department We can be reached by e mail at lt support supermicro com gt or by fax at 408 503 8019 3 3 Frequently Asked Questions Question What are the various types of memory that the P3TDDR motherboard can support Answer The P3TDDR has four 184 pin DIMM slots that support up to 4 GB of registered unregistered ECC and non ECC DDR RAM However all the memory you install must be the same you cannot mix registered unregis tered ECC non ECC memory modules Please refer to Chapter 2 for addi tional information and installation procedures Question How do I update my BIOS Answer It is recommended that you
58. n 1 2 position be fore powering up the system again Do not use the Power Button con nector to clear CMOS Keyboard Wake Up Keyboard Wake Up Jumper Settings The JPWAKE jumper is used to e gether with the Keyboard Wake Up Position Definition function in BIOS Enable both the PUN Mea e jumper and the BIOS setting to al low the system to be woken up by depressing a key on the keyboard See the table on the right for pin definitions Note Your power supply must meet ATX specification 2 01 or higher and supply 720 mA of standby power to use this feature SCSI Ch A B Termination SCSI Channel A B Termination Jumper Settings JPA1 JPA2 The SCSI Channel A B termination Jumper jumpers JPA1 JPA2 are used to Lo Mane enable operation of the onboard Closed Disabled SCSI See the table on the right for jumper settings 2 13 SUPER P3TDDR User s Manual SCSI Enable Disable SCSI Enable Disable Jumper Settings JP2 Jumper JP2 is used to enable or dis Jumper S able the onboard SCSI See the Poston STS table on the right for jumper set ez Disabled tings VGA Enable Disable VGA Enable Disable Jumper Settings JP3 Jumper JP3 is used to enable or dis Jumper Position Definition able the onboard VGA See the Enabled table on the right for jumper set 2 3 Disabled tings VGA IRQ VGA IRQ Jumper Settings JP10 The VGA
59. nd device power control OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other re quests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on BIOS Support for USB Keyboard If the USB keyboard is the only keyboard in the system the keyboard will function as a normal keyboard during system boot up Real Time Clock Wake Up Alarm Although the PC may be perceived to be off when not in use it is still capable of responding to preset wake up events In the BIOS the user can set a timer to wake up the system at a predetermined time Main Switch Override Mechanism When an ATX power supply is used the power button can function as a System suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive s will spin down Depressing the power button again will cause the whole system to wake up During the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no main power will be provi
60. nectors See Figure 2 4 for the pin definitions of the power and reset switches and the overheat NIC1 and 2 hard disk drive and power LEDs Refer to Sections 2 6 for connector pin definitions Figure 2 4 Front Control Panel Connectors gt Power gt HDD LEDs NIC1 NIC2 Overheat X Buttons Reset Power 2 6 Chapter 2 Installation 2 6 Connecting Cables Power Supply Connector Table 2 1a A ATX Power Supply 24 pin Connector The primary power supply connec Pin Definitions ATX POWER tor on the PSTDDR meets the SSI Pin Number Definition Pin Number Definition Wi 18 3 3V 1 3 3V Superset ATX 24 pin specifica E Di je tions however it also supports an 15 COM 3 GOM a 16 PS ON amp 4 5V ATX 20 pin connector Refer to 17 COM 5 COM MOTO 18 COM 6 5V Table 2 1a for pin definitions 19 COM 7 COM Also see Figure A below for con 20 Res NC PWR_OK i 21 5V 9 5VSB nector orientation If a 20 pin 22 5V 10 12V d f 23 45V 11 12V connector is used please refer to 24 COM S 43 3V Figure B below for connector ori entation and Table 2 1c for stan Table 2 1b dard wiring colors ATX Power Supply 20 pin Connector Pin Definitions Pin 4 Definition Pin Definition tt 3 3V 1 3 3V 12 12V 2 3 3V 13 COM 3 COM 14 PS_ON 4 5V 15 COM 5 COM Figure A SSI 24 pin power cable 16 COM 8 1 AON 17 COM 4 COM r 18
61. oo high it will automatically turn on the thermal control fan to prevent any overheat damage to the CPU The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chassis temperature is too high CPU Fan Auto Off in Sleep Mode The CPU fan activates when the power is turned on It can be turned off when the CPU is in sleep mode When in sleep mode the CPU will not run at full power thereby generating less heat Chapter 1 Introduction CPU Overheat LED and Control This feature is available when the user enables the CPU overheat warning function in the BIOS This allows the user to define an overheat tempera ture When this temperature is exceeded both the overheat fan and the warning LED are triggered System Resource Alert This feature is available when used with Intel s LANDesk Client Manager optional It is used to notify the user of certain system events For example if the system is running low on virtual memory and there is insuf ficient hard drive space for saving the data you can be alerted of the potential problem Hardware BIOS Virus Protection The system BIOS is protected by hardware so that no virus can infect the BIOS area The user can only change the BIOS content through the flash utility provided by SUPERMICRO This feature can prevent viruses from infecting the BIOS area and destroying valuable data Auto Switching Voltage Regulator for the CPU Core
62. port is 4 vcc above the keyboard port See Fig ME ure 2 3 for locations Universal Serial Bus USB Universal Serial Bus Pin Definitions USBO USB1 P h Pin Pin Four Universal Serial Bus connec Number Definition Number Definition al 5V 1 5V tors are provided on the P3TDDR 5 Bos M3 Bo USBO and USB1 are ports located 3 PO 3 PO 4 Ground 4 Ground on the backplane near the mouse port USB2 and USB3 are headers located near the battery that may USB2 USB3 be used for front side USB ac Pin Pin 3 Number Definition Number Definition cess See the tables on the right 1 sv m 45V initi 2 Po 2 Po for pin definitions d Boi S dl 4 Ground 4 Ground 5 Ground 5 Ground 2 9 SUPER P3TDDR User s Manual Serial Ports Serial Port One COM serial port connector is Pin Definitions COM1 2 provided on your board See the Pin Number Definition Pin Number Definition table on the right for pin defini 3 sd Ro tions A 10 pin serial ribbon cable 3 SerialOut 8 SIS 4 DTR 9 RI is required to connect a device to 5 Ground 10 NC the COM2 header which is lo cated near the PCI1 slot Wake On LAN WOL1 Wake On LAN Pin Definitions WOL1 The Wake On LAN header is des Geel reifen ignated as WOL1 This function 3 eodd roun allows your computer to receive 8 Wake up and be woken up by an incoming call when in the suspend state See the table on the right for pin definitions You
63. rd jumpers can be used to choose between optional set tings Jumpers create shorts be tween two pins to change the function of the connector Pin 1 is 9 0 i identified with a square solder pad Setting BA on the printed circuit board Pin 1 2 short L Jumper Cap On a 2 pin jumper Closed means the jumper is over both pins to close the connection and Open means the jumper is either off or on a single pin only See the motherboard layout pages for jumper locations Front Side Bus Speed Front Side Bus Speed Jumper Settings JP6 JP7 The FSB speed also known as JPG JP7 FSB Speed system speed is set with JP6 and 1 2 1 2 Roto JP7 See the table on the right for oe Hi 6 MHz 2 8 Open 100 MHz pin definitions Open Open 133 MHz Note The Auto setting allows the CPU Note Most Intel processors have io setthe speed a fixed speed that overrules the setting of JP6 and JP7 2 12 Chapter 2 Installation CMOS Clear Refer to the table on the right for CMOS Clear Jumper Settings instructions on how to clear oarn Jumper CMOS Always remove the AC Position Definition 1 2 N l power cord from the system be 2 3 MORE Giedi fore clearing CMOS Position Position 1 2 2 3 Ed o e o o Note For an ATX power supply you must completely shut down the sys tem remove the AC power cord then use JBAT1 to clear CMOS Replace JBT1 back to the pi
64. rmation about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when you want to install the processors DDR RAM memory modules for the PSTDDR and mounting the mainboard in the chas sis Also refer to this chapter when you want to connect floppy hard disk drives the IDE interfaces the parallel and serial ports and the wires for the power supply the reset button the keylock power LED the speaker and the keyboard If you encounter any problems see Chapter 3 which describes trouble shooting procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions is provided SUPER P3TDDR User s Manual Table of Contents About This Manual 2 irren tienne err diretti ne rne rain iii Manual OrganizatiOh er rre a eR ue ee n RD LEER HD ieee iii Chapter 1 Introduction Ter OVEIVIEW a tct ne thee HR ero ee PR Checklist Contacting Supermicro mni sie a RA aa ie PAGO nennen 1 2 SUPER P8TDDR Image esee 1 3 SUPER P3TDDR EAyOUtE cite eere 1 4 SUPER P3TDDR Quick Reference ssssseeen 1 5 VIA Apollo Pro 266T Chipset System Block Diagram 1 6 Motherboard Features sessssssseeeeeneeeeeeneneneen nennen 1 7 1 2 Chipset Overview nenne nennen ener nene 1 9 1 3 PC Health Monitoring esse
65. s nnne nnne nennen nnne 1 10 154 AGPIF6GalUr6S oar ence i i e ONE RR Re Ren 1 11 1 5 Power Supply 5 er eet te ce T gea tee pareat 1 13 156 SUDOM E cerae recie oem ETSI duce IM RT ER ETC APT 1 14 Chapter 2 Installation 2 1 Static Sensitive IDeviG8s reka i I NI oreste ee ee dee ee eR 2 1 2 2 Processor Installation T 2 3 Mounting the Motherboard in the Chassis esee 2 3 2 4 Installing DIMMS iicet trier icr e rrt ete nece t rna 2 4 2 5 O Port Front Control Panel Connector Locations sesss 2 5 2 6 Connecting Cables sse 2 7 Power Supply Connector 00 ccceccecceceeseeseeeeeeeceeeeeceeeeaeeeseeeeseeseeseeeeaseaes 2 7 Infrared Corinector rccte ie rectae tee nente ren ra n s 2 7 Power Button Reset Buttonr Overheat LED NICT22 LED c Hard Disk Drive LED wencescauea tette dete epe itle Ca 2 9 Power EBD si on eterne ee Rabe 2 9 ATX PS 2 Keyboard Mouse Ports sss 2 9 Universal Serial BUS irsana eee ette enc eder nee 2 9 Serial POLIS Leere dove Her ehe teri P PA ERE ERU ess 2 10 Wake OnsEAN iride eR rr erri eger enden 2 10 Table of Contents Wake On RING nci ot odete cope A Kat TH OR Leti cade 2 10 Earn Headers cR emet io ra cerceuatesens 2 11 Chassis Intrusion n a AR E A Na iiS 2 11 227 Jumper Settings cran E a anaia 2 12 Explanation of Jumpers erret tnn 2 12 Front Side Bus Sp
66. table on the right for pin definitions Overheat LED Overheat LED Pin Definitions JF1 The Overheat LED connector is lo Pin cated on pins 7 and 8 of JF1 It Number Definition v LED attaches to an LED to to provide 8 LED warning of chassis overheating See Table 2 6 for pin definitions NIC1 2 LED NIC1 2 LED Pin Definitions JF1 The NIC1 2 LAN LED connectors UR Definition are located on pins 9 amp 10 11 amp 12 of 9 11 LED 10 12 LED JF1 Attach the NIC LED cable to the correct pins for each LAN See the table on the right for pin definitions 2 8 Chapter 2 Installation Note NC indicates no connnection HDD Hard Disk Drive LED HDD LED Pin Definitions The IDE hard drive LED connector JF1 is located on JF1 Attach the IDE icon Definition hard drive LED cable to pins 13 z cok and 14 of JF1 See the table on the right for pin definitions Power LED Power LED Pin Definitions JF1 The Power LED connector is lo Pin i Number Definition cated on pins 15 to 16 of JF1 See T LEOS the table on the right for pin defini 16 LED tions ATX PS 2 Keyboard and PSr Kenii PS 2 Mouse Ports and Mouse Port Pin Definitions J1 The ATX PS 2 keyboard and the Pin PS 2 mouse are located on J1 Number petaton See the table on the right for pin A ENG roun definitions The mouse
67. to avoid static damage When unpacking the board make sure the person handling it is static pro tected 2 1 SUPER P3TDDR User s Manual 2 2 Processor Installation ZN When handling the processor package avoid placing direct pressure on the label area of the fan The following pages cover the installation procedures You should install the processor in the motherboard first then install the motherboard in the chassis then the memory and add on cards and finally the cables and drivers Following the installation procedures in the order they appear in this chapter should eliminate the most common problems encountered when building a system IMPORTANT Always connect the power cord last and always re move it before adding removing or changing any hardware compo nents Processor You are now ready to install the processors Your PSTDDR motherboard has two 370 pin FCPGA type sockets that support single or dual 370 pin Pentium III FCPGA not SEPP 500 MHz 1 26 GHz processors including low power Pentium III processors at Front Side Bus speeds of 100 and 133 MHz Lift the lever on the FCPGA socket and install with the notched corner of the processor oriented with pin 1 Fully seat the processor into the socket and then close the lever See Figure 2 1 for views of the FCPGA 370 pin socket before and after processor installation Heatsink Follow the instructions that came with your processors and heatsinks to attach he
68. ving on to the next item on the list The bottom icon with a CD on it allows you to view the entire contents of the CD 2 18 Chapter 3 Troubleshooting 3 1 Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or installing any hardware components a A WwW MN Before Power On Make sure no short circuits exist between the motherboard and chassis Disconnect all ribbon wire cables from the motherboard including those for the keyboard and mouse Remove all add on cards Install a CPU making sure it is fully seated and connect the chassis speaker and the power LED to the motherboard Check all jumper settings as well No Power Make sure no short circuits exist between the motherboard and the chassis Verify that all jumpers are set to their default positions Check that the 115V 230V switch on the power supply is properly set Turn the power switch on and off to test the system The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one No Video If the power is on but you have no video remove all
69. y Slots IDE1 IDE2 IDE Hard Disk Drive 1 2 Connectors JA1 SCSI Channel A Connector JA2 3 SCSI Channel B Connectors JA4 SCSI RAID Connector JF1 Front Control Panel Connector JL1 Chassis Intrusion Header J1 PS 2 Keyboard Mouse J6 ATX Power Connector J9 Floppy Disk Drive Connector J10 IR Infrared Connector OH Fan Overheat Fan Header Parallel Port Parallel Printer Port SCSI RAID Optional Add On Card Connector USBO 1 Universal Serial Bus Ports back USB2 3 Universal Serial Bus Ports front VGA VGA Monitor Port WOM 1 Wake On Ring Header WOL1 Wake on LAN Header Also see Chapter 2 for details on the I O ports the Front Control Panel JF1 connectors and the jumper settings Jumpers not indicated are for test pur poses only 1 5 SUPER P3TDDR User s Manual Pentium III FCPGA PPGA CPUs 133 100 66 MHz Host Bus VT8653T Memory Bus 266 MHz 3D Graphics GCLK DDR Vlink Memory Controller AGP Bis Host North MCLK Clock Buffer 552BGA HCLK PCLK Clock L Generator SMBus PCI Slots P PI amp Peripheral Control gui VT8233 ower Plane amp Peripheral Contro Vlink ATA 33 66 100 ACPI Events MII LAN 6x USB Figure 1 3 VIA 266T Chipset System Block Diagram 1 6 Chapter 1 Introduction Motherboard Features CPU Single or dual Intel Pentium III FCPGA 500 MHz 1

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