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IOWizard V.1.30 User`s Manual

1. R8C 2K R8C 2L Group Hardware Manual Hardware specifications pin assignments memory maps 120 stENESAS url http documentation renesas com eng products mpumcu rej09b0406_r8c2k2ihm pdf R8C 2K R8C 2L Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0219_ r8c2k2Iids pdf R8C 32A Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0458_r8c32ahm pdf R8C 32A Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0229 r8c32ads pdf R8C 33A Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0455_ r8c33ahm pdf R8C 33A Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0228 r8c33ads pdf R8C 35A Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0407_r8c35ahm pdf R8C 35A Group Datasheet Co
2. Hardware specifications pin assignments memory maps R8C 2E R8C 2F Group Hardware Manual peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rejO9b0349_r8c2e2fhm pdf R8C 2E R8C 2F Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0222 r8c2e2fds pdf R8C 2G Group Hardware Manual url http documentation renesas com eng products mpumcu rej09b0387_r8c2ghm pdf Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics R8C 2G Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0223 _ r8c2gds pdf R8C 2H R8C 2J Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rejO9b0388_r8c2h2jhm pdf R8C 2H R8C 2J Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0217_r8c2h2jds pdf peripheral specifications electrical characteristics
3. oot NANA Mote weeoocond in oot roaniotaor im CPU Clock On chip oscillatoridetaut Frequency Value 0 125 MHz CPU Clack Division Divide by amp Cdetautt Figure 3 5 Interrupt Setting Window for Interrupt Peripherals 17 fe l0 Wizard Usage Compare Watch Count CMP Output Enable Select Compare U De activate Ss CMPOO Hex FFFF iis eneo Activate Compare 1 CMPO2 Input capture Compare 0 Output CMP 4 Key input interrupt Timer Output compare Output remains M CMP2 Timer 7 Output Level CMPOO to CMPO Internal Count Source Compare 1 Output No aivision aetaut gt f Start with low Mo divisionidetaut i E Output remains ha Setter Counter Reload Output Level CMP10 ta CMP12 f Wo reload f Start with low f Clear TE at CMA O Start with high IMT 1 INT 2 INT 3S Key input interrupt Timer Timer Y Timer 2 Timer cc 4 Comment tcc13 1 Select output compare mode tocol 2 0 iho reload tree run no reload register when compare 1 match tcoutb 0 intial status of output port is low toout 0 Aintial Status of output port is low tecO1 0 tec02 0 count source ft tecd bit 1 and 23 tec 4 0 tec 5 0 ACMIPO output remain unchanged even when compare 0 signal matched tect 6 0 tecl F 0 ACMIFT output remain unchanged even when compare 1 signal matched tmOsINY SLID MAX Alnvalid Input 0000 value lt FFFF tm1 0xFFFF Hoet count value to tr too tm Micskhlod CRAD mi teirt Pe
4. TMRF OCRF 1 0 5 ms x 5 MHz 32 TMRF OCRF 1 78 TMRF OCRF 4D In Hex Decimal Hence TMRF OCRFH 0x00 and TMRF OCRFL 4D CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Internal Count Source Divide by 32 Divide by 16 Divide by 4 Divide by 4 Subclock Formula Duty cycle entered Total of high level pulse widths Conversion period x 100 Total of high level pulse widths PWDR 64 x Internal Count Source Clock x 2 Example to calculate value of PWM PWDRU and PWM PWDRL Desired Duty cycle value entered 10 Based on the formula above if Internal Count Source is Divide by 2 According to datasheet Conversion period is 16384 Clock if input clock is Divide by 2 Duty cycle entered Pulse high width Pulse Cycle x 100 Pulse high width Duty cycle entered 100 x Pulse Cycle For generating 1 Pulse Cycle PWM PWDR 3FFF In Hex Decimal for 14 bit PWM Note 3FFF In Hex Decimal 16383 In Decimal To get the 10 of Pulse high width PWM PWDR 10 100 x 16384 PWM PWDR 1638 4 PWM PWDR 666 In Hexadecimal Hence PWM PWDRU 0x06 and PWM PWDRL O0x66 Conversion period is 3 2768 ms 116 SCl1 Serial Clock Cycle SCI3 Bit Rate for Synchronous mode Same for SCI31 and SCI32 tENESAS CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Clock Division Ratio Divide by 1024 Divide by 256 Divide by 64 Divide by 32 Divide by 16 Divide
5. CHO Match Count TRDIOCO Invalid value entered at Timer RD CHO Match Count TRDIODO Value entered is below minimum value at Timer RD CHO Match Count TRDIODO Value entered exceeded maximum value at Timer RD CHO Match Count TRDIODO Invalid value entered at Timer RD CH1 Match Count TRDIOA1 Value entered is below minimum value at Timer RD CH1 Match Count TRDIOA 1 Value entered exceeded maximum value at Timer RD CH1 Match Count TRDIOA1 Invalid value entered at Timer RD CH1 Match Count TRDIOB1 Value entered is below minimum value at Timer RD CH1 Match Count TRDIOB1 Value entered exceeded maximum value at Timer RD CH1 Match Count TRDIOB1 tENESAS Baud Rate valid range 7200bps 20000bps Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Baud Rate valid range 7200bps 20000bps Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count val
6. Divide by 8 Divide by 32 Stop Bit ic Parity Bit Enable ic m Parity Select ic cr Tranamit Format f LSB first C MSB first Operation Transmitter Receiver CLE Polarity Falling edge 0 Rising edge Secs Transmitter Setting Transmit Data 114111111 bits Data Output Pin ff CMOS C N channel open Serial Data Output ros io Receiver Setting SUCCESSIVE RECEIVE T r INT 3 Key input interrupt Timer Timer Y Timer Z Timer War To UART 4 ckdir_uOmr 0 clkO_uwO0cO 1 clki_uOcO 0 Uform_ uOcO 0 te_u0c1 1 re_u0e1 0 nch_uO0eO 0 internal clack enabled udmr bit 3 HESIO is selected uOco bit 0 and 1 HLS first uOcd bit 7 transmission enabled udc bit 0 ACMOS output selected uOcd bit 5 ckpol_ uOcO 0 ifalling edgefutcd bit 63 uObrg 9 Setting transter clack period for Clock Synchronous Calculated value is r udtbh 0B00000000 St transmission datas bits for Clock Synchronous Set transmission dat UOthl 061 1111111 Wnet transmission datats bits for Clack Synchronous Set transmission dat smd0_u0mr 1 smdl u0mr 0 smd uOmr 0 flock synchronous serial fo mode selectediulmr bit 0 2 set CPU Clack Main clock sin out Frequency alle 6 MHz CPU Clack Division Divide by 6 default Figure 3 22 Serial I O Window E Each serial I O peripheral function has its individual setting window All settings are disabled by default when Disabled is selected from the fi
7. BRG Clock Rx Format SCi3 4 iene G o division WEP Timer A Timer Timer F Timer G AEC Pati Scl gC SC 4 Parameter PCF BIT SPCS1 1 NTXDS1 as output pin selected spcr bit 4 SCI31 SCRS BIT TE 1 S031 SCRS BIT RE 0 Enable transmitter selected scrs bit 4 5 SPER AIT SCIN1 0 MfOutput data inversion swich for LEB 1st SCi3 1 tx sper bitt SCI31 SCRS BIT CKE 0 S031 SMR BIT COM 1 5 Synchronous scra bit0 1 smr bit amp bitz SCl31 SMF BIT CKS 0 ilo division selected smr bit 0 and 1 Cl31 BRR 249 Setting SCI31 baud rate generator max 255 Calculated value is round tot System Clack 5 MHz Sub clack 32 765 KHz ae CPU Clock System Clock Figure 3 49 SCI31 Window E SCI31 and SCI32 have similar window The discussion below referring to SCI31 is also applicable to SCI32 E All settings are disabled by default when Disabled is selected from Communication Mode combobox E SCI31 supports the following serial interface operating modes 1 Synchronous a Transmitter mode b Receiver mode 2 Asynchronous 5 bits a Transmitter mode b Receiver mode 3 Asynchronous 7 bits a Transmitter mode b Receiver mode 4 Asynchronous 8 bits a Transmitter mode b Receiver mode For each operation mode the related function settings are supported while the unrelated setting are disabled 61 sCENESAS E Calculated value for SCI31 BRR is being round to the nearest whole number For example
8. H width calculation Enter value for Timer A1 Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA1 register high order address m value of TA1 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Formula Timer Value entered TA1 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Minimum acceptable value is 0 TA1 valid range 0 65535 Formula 16 bit H width value entered TA1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA1 register high order address m value of TA1 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Formula Timer Value entered TA1 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 f
9. Value entered is below minimum value at Timer Y Primary Period Value entered is below minimum value at Timer Y Secondary Period Value entered exceeded maximum value at Timer Y Primary Period Value entered exceeded maximum value at Timer Y Secondary Period On chip oscillator gt 125kHz Main clock gt 16MHz Internal Count Source No division Divide by 8 fRING Formula Timer Value entered PREY 1 x TYPR 1 x Internal Count Source System Clock In this case PREY is fixed at 249 actual count is 250 Example to calculate value of TYPR Desired timer value entered 10ms Based on the formula above if main clock is chosen and Internal clock source is divide by 8 Note TYPR valid range is 0 255 Timer Value entered PREY 1 x TYPR 1 x Internal Count Source System Clock 10ms 249 1 x TYPR 1 x 8 16MHZz 10ms 250 x TYPR 1 0 5us 250 x TYPR 1 10ms 0 5us 250 x TYPR 1 20000 TYPR 1 20000 250 TYPR 80 1 Therefore TYPR 79 Formula Timer Value entered PREY 1 x TYSC 1 x Internal Count Source System Clock In this case PREY is fixed at 249 250 1 Refer to no 7 example calculation Similar as Timer Y Primary Period Formula Timer Value entered PREY 1 x TYPR 1 x Internal Count Source System Clock PREY is fixed at 249 actual count is 250 Formula Timer Value entered PREY 1 x TYSC 1 x Internal Count S
10. 64 65 66 67 68 69 70 71 72 73 74 Invalid value entered at Timer A4 Count Value Invalid value entered at Timer A4 16 bit H Width Invalid value entered at Timer A4 8 bit H Width Value entered is below minimum value at Timer A4 Timer value Value entered is below minimum value at Timer A4 One shot Timer Value Value entered is below minimum value at Timer A4 Count Value Value entered is below minimum value at Timer A4 16 bit H width Value entered is below minimum value at Timer A4 8 bit H width Value entered exceeded maximum value at Timer A4 Timer Value Value entered exceeded maximum value at Timer A4 One shot Timer Value Value entered exceeded maximum value at Timer A4 Count Value Value entered exceeded maximum value at Timer A4 16 bit H width sQENESAS Enter count value for Timer A4 TA4 valid range 0 65535 Enter value for Timer A4 Formula 16 bit H width value entered TA4 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Enter value for Timer A4 Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA4 register high order address m value of TA4 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculat
11. Example 11110000 is 8 bits Formula s3brg 1 System Clock Internal Count Source 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 13 for example of Transfer Clock Period calculation Formula s3brg 1 System Clock Internal Count Source 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 13 for example of Transfer Clock Period calculation Enter value for Transfer Clock Period Formula s4brg 1 System Clock Internal Count Source 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 14 for example of Transfer Clock Period calculation Enter 8 bits transmission data Example 11110000 is 8 bits Formula s4brg 1 System Clock Internal Count Source 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 14 for example of Transfer Clock Period calculation 98 CENESAS 165 Value entered exceeded maximum Formula value at SI O4 Transfer Clock Period s4brg 1 System Clock Internal Count Source 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 14 for example of Transfer Clock Period calculation 166 Invalid value entered at Multi master Enter value for SCL Frequency Valid range 3 31 I2C bus SCL Frequency 167 Invalid value entered at Multi master Enter even values range from 2 30 I2C bus SCL Release Time 168 Value entered is below minimum value Valid range 3 31 at Multi master 12C bus
12. For each operation mode the related function settings are supported while the unrelated setting are disabled Fixed timings are supported for Timer 8 bits mode Timer 16 bits mode Output Compare Match 8 bits mode and Output Compare Match 16 bits mode User is allowed to select selected timings available from the combobox dropdown list Calculated value is being round to the nearest whole number 4 Timer G supports 2 operating modes Interval Timer mode Input Capture mode For each operation mode the related function settings are supported while the unrelated setting are disabled 57 3 5 6 AEC Window i 10 Wizard Slims Usage Count Up Enable H No Disable fe Yes C Enable Channel Select Count Up Enable L f 46 bit event counter Disable 5 bit event counter l Enable se Portd Port amp R WEE Timer amp Timer Timer F Timer G SEC Feal IO PMR BIT 4EY H 0 AEC ECCSR BIT ZUEH 0 AWDisable count Up enable H selection pmr bite eccsr bits IO PMR BIT AEYL 0 AEC ECCSR BIT CUEL 0 WDizable count Up enable L selection pmr bitr eccer bitz system Clack 5 MHz Ub clock 32 7 6S KHz a CPU Clock System Clock figure 346 AECWindow E User is allowed to choose to use AEC settings All settings are disabled when No radiobutton is selected To enable the settings click on Yes radio button E AEC supports 2 types of Channel Select 1 16 bit event counter 2 8 bit event counter Fo
13. SCL Frequency 169 Value entered is below minimum value Enter even values range from 2 30 at Multi master 12C bus SCL Release Time 170 Value entered exceeded maximum Valid range 3 31 value at Multi master 12C bus SCL Frequency 171 Value entered exceeded maximum Enter even values range from 2 30 value at Multi master 12C bus SCL Release Time 5 4 Example of Computation Values for M16C Tiny Series The table below is a reference list of examples and additional help to assist users to input correct setting Notes and Action CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Internal Count Source No division Divide by 2 Divide by 8 Divide by 32 Sub clock divide 32 Formula Timer Value entered TAi 1 x Internal Count Source System Clock Example to calculate value of TAI Desired timer value entered 1ms Based on the formula above if main clock is chosen and Internal clock source is divide by 2 Timer Value entered TAi 1 x Internal Count Source System Clock ims TAi 1 x 2 20MHz ms TAi 1 x 100ns TAi 1 1ms 100ns TAi 1 10000 99 2tENESAS Hence TAi 10000 1 which is 9999 02 Timer Ai One shot Timer Value CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Internal Count Source No division Divide by 2 Divide by 8 Divide by 32 Su
14. The user assumes the entire risk of using the product A AEE Ne Na ta ta tete ta te te e te Ve te te Ve Ve Ve te e We Ve Ve e Ve Ve Ve e Wa Ve Ve Ve We We Ve Ve Ve We Ve Ve Ve e Wa Ve Ve Ve e Ve Ve Ve Ve e Fe Ve Ve e a Ve Ve Ve e Fe Ve Va Ve We Fe Ve Ve Ve Ye Ve include sfr_R8cliconfig h include config h int i 0 dle maing asmC FCLR I prc 1 fbefinition of R8C 11 SFR Declaration of interrupts and functions f fInterrupt disable Protect off Sf MTEC EE Ve te a Ve Ve Ve ta EET Ve Va a Ve Ve EC HERE HEHE CHE Va Ve Va HCH He He CPU Clock Setting Fi HHHHHHH HHH HHH Note Include asm nop for oscillator s stabilization period after clock setting is done cmoS 1L cm02 0 cm14 0 ocd0 0 ocd1 0 ocd2 1 cm16 0 cm17 0 cmO6 1 prco 0 mito asmC FSET I forki asmC NOP Figure 4 2 PD Config c Notepad File Edit Format View Help f fon chip oscillator selected cmO bit 2 and 5 cml bit 4 ocd bit 0 and 1 f fon chip oscillator selected ocd bit 2 Divide by 8 selected cmo bit 5 fProtect on f fiInital cere Interrupt enabled fmain processing Sample output of Config c 1 roid init void LS FERRE EEEEEEEEREEEEEEEEKEEEEEEEEEEEEEEEE if PortO Setting ff BEER EEEEEEEREEEEEEEEEREEEEREREREEEERE pre2Zz l pd0 0x0F puto 1 pu0l 1 ff FERRE EEEEEEEEREEEEEEEEKEREREEEEERERERE if Portl Setting LL ETREEEREEKEEKEEKEERREEREEKERRERREEEREE p
15. cks1 1 cks0 0 itad selectediadcoani bit 4 bits 0 48 bit mode selectediadconi bit 1 smp 0 Without sample and hold selectediadcon2 bit 0 adst 1 AID conversion starts adcond bit 6 Resolution PU Clock On chip o cillatoridetaut Frequency Value 0 125 MHz a CPU Clock Division Divide by 8 default Figure 3 24 ADC Window E User is allowed to de activate or activate ADC settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button E User is able to do settings like selecting analog input pin operating mode and resolution 33 3 3 8 DAC Window w l0 Wizard Usage C De activate Activate DA0 Output C Alot Used f Used Dad Output C ot Used f Used Timer RF UARTO USRT 1 UART 2 LIM Woet DAT output value to dat om DAO Output alue 255 DA1 Output Value Dec SSU ADC CPU Clock On chip o cillator detauty Frequency Value 0 125 MHz ae CPU Clock Division Divide by 8fdetaull Speeeeeenenenneennneennsnsrneneesnnseeensnseeeensnsesnensenenenestnsnnntnssnsnsnsrsenrsesenrers2e2e2s2eErEeEseeEsEersEseeeeEsEsesesesesesrerseseseseseereeseersesesesesrsesesrsrsrsrsesesrereesesrsrsrsrsrsrsrsrsrsrsrsrsrsrsrersrsrsrsrsrseersrsrsrsrsrsrersrsrerersrersesrsrersrsrsrsrsrersrseerererersrersrsrersrsrsrsrsrsrsss cee eneneneneneneeeneneeeeeeseee en eneeeeeeeueneneneeeeeeen sen eneeee eeeu seen eneeeeeeeee 00085000008
16. 157 Value entered exceeded maximum value at Timer RC TRCIOC Inactive Width 158 Invalid value entered at Timer RC TRCIOD Inactive Width 159 Value entered is below minimum value at Timer RC TRCIOD Inactive Width 160 Value entered exceeded maximum value at Timer RC TRCIOD Inactive Width 161 Invalid value entered at Timer RC Wait Time 162 Value entered is below minimum value at Timer RC Wait Time 163 Value entered exceeded maximum value at Timer RC Wait Time 164 Invalid value entered at Timer RC Active Level Width CENESAS Formula trcgrc 1 Inactive Level Width x Frequency of Count Source Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO Formula trcgrc 1 Inactive Level Width x Frequency of Count Source Formula trcgrc 1 Inactive Level Width x Frequency of Count Source Formula tregrd 1 Inactive Width x Frequency of Count Source Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO Formula tregrd 1 Inactive Width x Frequency of Count Source Formula tregrd 1 Inactive Width x Frequency of Count Source Formula trcgrc 1 Wait Time x Frequency of Count Source Example to calculate value of trcgrc Desired Wait Time entered 0 1ms Based on the formula above if Main Clock 20MHz is chosen and Internal clock source is divide by 8 trdgrc 1 Wait Time entered x Frequency of Count Source trdgrc
17. 65535 Formula Timer value entered TB0O 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation TBO valid range 0 65535 Formula Timer value entered TB0 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation TBO valid range 0 65535 Enter value for Timer B1 Formula Timer value entered TB1 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation Enter value for Timer B1 TB1 valid range 0 65535 Formula Timer value entered TB1 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation TB1 valid range 0 65535 Formula Timer value entered TB1 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation TB1 valid range 0 65535 Enter value for Timer B2 Formula Timer value entered TB2 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation 92 89 90 91 92 93 94 95 96 97 98 Invalid value entered at Timer B1 Count Value Value entered is below minimum value at Timer B1 Timer value Value entered is below minimum value at Timer B1 Count value Value ente
18. File Path CoWiorkSpacelREC propRec_propContiq c od E Cancel Figure 3 11 HEW Project Detected dialog 21 sCENESAS Figure below shows that the newly generated files are being inserted to an existing workspace Demo High performance Embedded Works File Edit View Project Build Debug Setup Tools Osea a G ejo w Dem iy aaa a ra C header file we Configh iodefine h we el sf_R8C1Oconfigh She C source file a Config c Link to HEW feature Generated Files inserted here pen E stacksct h bse E typedefineh z wy afr TES e Figure 3 12 Inserting the generated files into HEW workspace 22 stCENESAS 3 2 4 Save and Load This feature allows user to save and load settings User can perform save and load for settings made in the main window peripheral windows and interrupt setting windows Save Setting eee een au cece enny eeeeanesceeeeane senecens ceeee sen cence es anA YAANNNNNNNNANNENNNANNENNNNNNENANANNANANANNENANANNENANANNENANANNENANANNANANANNANANANNANANANNENANANNANANANNENANANNNNANANNENANANNNNANANNENANANNANANANNANANANNENANANNANANANNANENANNANANANNENANANNANANANNANENANNANANANNANENANNANANANNNNANANNANENANNANENANNNNANANNNNENANNNNANANNNNENANNANENANNANANANNANANANANNENANNANENANNNNENANNANANANNANENANNANENNNNNNANNNNANANANNNENNNNANENNANNANENANNNNENANNNNENAANNNENAANANANANNNNENNNANNANANNANENANANNENANANNENENNNNENENNNNENENEENENEEEEN Port 0 A Usage TRIDA Match Output TRCIOA Initial Outpt TET
19. Segment Driver Frame Frequency Select and Charge discharge Pulse Cycle Duty 63 stENESAS 3 6 End Session To end the IO Wizard Window E Close the window by clicking in the upper right corner of the window Close IO Wizard taskbar button as shown in Figure 3 52 Right click the taskbar button and then click Close amp Restore Minimize Maximize ma lOWizard Figure 3 52 Close IO Wizard by clicking taskbar button 64 CENESAS Section 4 Code Generation 4 1 Generated folder After all settings are done user can click generate button to run code generation With that if all settings made are valid 3 files one c file and two h files will be generated and are stored to the Generated folder Otherwise error report window appears and display error messages if incorrect setting is made No files will be generated when there is error Refer to section 5 error messages for details The following files are present in the Generated folder a Config c Source file Includes system initialization e g system clock setting peripheral setting routines and empty function body b Config h Header file Includes global function declaration and interrupt function declaration c sfr_R8C10config h sfr_R8C11config h sfr_R8C12config h sfr_R8C13config h sfr_R8C 1Aconfig h sfr_R8C1Bconfig h sfr_R8C22config h sfr_R8C23config h sfr_R8C24confi h sfr_R8C2Sconfig h sfr_R8C26config h srf_R8C27config h sfr_R8C28config
20. System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Enter one shot timer value for Timer A1 Formula One shot Timer Value entered TA1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation 86 18 19 20 21 22 23 24 25 26 27 28 29 Invalid value entered at Timer A1 Count Value Invalid value entered at Timer A1 16 bit H Width Invalid value entered at Timer A1 8 bit H Width Value entered is below minimum value at Timer A1 Timer value Value entered is below minimum value at Timer A1 One shot Timer Value Value entered is below minimum value at Timer A1 Count Value Value entered is below minimum value at Timer A1 16 bit H width Value entered is below minimum value at Timer A1 8 bit H width Value entered exceeded maximum value at Timer A1 Timer Value Value entered exceeded maximum value at Timer A1 One shot Timer Value Value entered exceeded maximum value at Timer A1 Count Value Value entered exceeded maximum value at Timer A1 16 bit H width CENESAS Enter count value for Timer A1 TA1 valid range 0 65535 Enter value for Timer A1 Formula 16 bit H width value entered TA1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit
21. u2brg 1 System Clock BRG Clock Select Baud Rate entered x 16 Enter 0 255 only Enter 0 255 only Enter 0 255 only Enter 0 255 only Enter 0 255 only Enter 0 255 only Valid Range 0 lt Value lt 65535 Valid Range 0 lt Value lt 65535 Valid Range 0 lt Value lt 65535 82 134 Invalid value entered at Timer RF Compare 1 Value 135 Value entered is below minimum value at Timer RF Compare 1 Value 136 Value entered exceeded maximum value at Timer RF Compare 1 Value 137 Invalid value entered at Timer RC TRCIOA Compare Value 138 Value entered is below minimum value at Timer RC TRCIOA Compare Value 139 Value entered exceeded maximum value at Timer RC TRCIOA Compare Value 140 Invalid value entered at Timer RC TRCIOB Compare Value 141 Value entered is below minimum value at Timer RC TRCIOB Compare Value 142 Value entered exceeded maximum value at Timer RC TRCIOB Compare Value 143 Invalid value entered at Timer RC TRCIOC Compare Value 144 Value entered is below minimum value at Timer RC TRCIOC Compare Value 145 Value entered exceeded maximum value at Timer RC TRCIOC Compare Value 146 Invalid value entered at Timer RC TRCIOD Compare Value 147 Value entered is below minimum value at Timer RC TRCIOD Compare Value 148 Value entered exceeded maximum value at Timer RC TRCIOD Compare Value 149 Invalid value entered at Timer RC PWM Period 150 Value entered is
22. 20 0E eee EERO ESET EEE OES E EEE ESSE REESE REESE EEE EEE i Figure 3 25 DAC Window E User is allowed to de activate or activate DAC settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button E User is able to do settings like entering DAC output value 34 3 3 9 Comparator Window w l0 Wizard Usage 0 De activate 0 Activate Enable Operation kW Comparator 0 enabled k Comparator 1 enabled ACOUTO output enable C Disable output Key input interrupt Timer RA Timer RB Timer Fic Comparator 0 reference input C AREFO pin input f DA converter 0 output Comparator 0 digital titer Mo filter r Comparator 1 reference input f AYVREF pin input C DA converter 1 output ACOUTO output polarity f Mon inverted comparison re Comparator 1 digital titer Fitter with t5 sampli f Enable output ACOUT output enable Disable output f Enable output Timer RB Timer RE Timer RE UART O LIN Parameter cm por_acmr 0 vrosel_accro 1 vrisel_accr1 0 cmuoe accro 1 cmioe accrl 1 fROO_accrO 0 fit01 accro 0 ftid _accri 0 f 11_accr1 1 cm e_accr 1 emia areri A 4 CPU Clock CPU Clock Division On chip oscillator detaut Divide by 8 detaull Figure 3 26 ACOUT output polarity f Non inverted comparison f Inverted comparison result ADC DAC Comparator Comment Noutput the non inverted comparat
23. Cycle value entered 2 Sawtooth Modulation Mode TA2 System Clock x W phase PWM Duty Cycle value entered Example to calculate value of TA2 in Triangular Modulation Mode Desired W phase PWM Duty Cycle value entered 2ms Based on the formula above if main clock is chosen TA2 System Clock x W phase PWM Duty Cycle value entered 2 TA2 20MHz x 2ms 2 TA2 20000 Example to calculate value of TA2 in Sawtooth Modulation Mode Desired W phase PWM Duty Cycle value entered 2ms Based on the formula above if main clock is chosen TA2 System Clock x V phase PWM Duty Cycle value entered TA2 20MHz x 2ms TA2 40000 CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Formula Triangular Modulation Mode TA4 System Clock x U phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA4 System Clock x U phase PWM Duty Cycle value entered Example to calculate value of TA4 in Triangular Modulation Mode Desired U phase PWM Duty Cycle value entered 2ms Based on the formula above if main clock is chosen TA4 System Clock x U phase PWM Duty Cycle value entered 2 TA4 20MHz x 2ms 2 TA4 20000 Example to calculate value of TA4 in Sawtooth Modulation Mode Desired U phase PWM Duty Cycle value entered 2ms Based on the formula above if main clock is chosen TA4 System Clock x U phase PWM Duty Cycle value entered TA4 20MHz x 2m
24. Desired Bit Rate value entered 1200 bps Based on the formula above if BRG Clock is No Division M 2 power of 2 x 0 M 1 SCI3X BRR Oscillator Clock 64 x M x Bit Rate 1 where M 2 power of 2 x n SCI3X BRR 10 MHz 64 x 1 x 1200 1 Hence the SCI3X BRR is 129 CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz A D Conversion Speed Divide by 62 Divide by 31 Formula A D Conversion Times us Clock Division Ratio Clock x 1000000 Example to calculate A D Conversion Speed Based on the formula above if Clock Division Ratio is Divide by 62 A D Conversion Times us A D Conversion Times us Clock Division Ratio Clock x 1000000 62 5 MHz x 1000000 Hence the A D Conversion Times is 12 4 us 118 tENESAS Appendix A Related Documents for R8C This section contains links to all the related documentation that should be required to familiarise yourself with R8C microcontroller i R8C 10 Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics Description url http documentation renesas com eng products mpumcu rej09b0019_r8c10hm pdf R8C 10 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0035_r8c10ds pdf Hardware specifications pin assignments memory maps peripheral specifications electrical cha
25. E For Port 9 prc2 bit is set to 1 to enable write to PD9 register 41 3 4 3 INT Window 10 Wizard INTO Interrupt Interrupt Priority Level Input Fitter Active Edge f Level 0 Disabled T C Level 1 Low f Falling edge pe f Rising edge Level 2 m Level 3 o Level 4 Level 5 Input Enable Polarity Switch Level 6 f f One edge x F A z z a Level 7 High I f Both edges Key input interrupt Timer A0 Timer 41 Timer A2 Timer 43 Timer 44 w Port1 Port2 Porta Porte Port Porta Porta Port 10 INTO INTI 4 ifsrQ 0 One edge selected ifsr bit 0 intdic 000 Set interrupt piorty level and active edgerint0ic CPU Clock On chip oscillatoridetautt Frequency Value TMHz ae CPU Clock Division Divided by Scdefautt Figure 3 33 INT Window E INT 0 5 have similar windows User is able to do settings like priority level and trigger edge E Key Input Interrupt has its own window User is able to do interupt piority level only Other settings are disabled E Generated code include interrupt function declaration and empty function body Refer to section 4 for details on code generation 42 3 4 4 Timer Window amp 10 Wizard Saks 4 Usage Two Phase Pulse Pulse Output Enable Timer falue f De activate fe f Notdefautt 05 mz f Activate p f Yes One shot Timer Operation Mode Processing Trigger Select Timer fs fs 5 cs Count Value m Internal Count Source Count
26. Figure 4 3 Sample output of Config c 2 67 sCENESAS P Config c Notepad File Edit Format Yiew Help LS FETE EEEKEKKEEEEEKKKEEEEEEEKEREREEEEKREEE ff Timer X Setting fF SEEEEEEKEEEEEREEEREEKKEREREEEEEEEEEEEEE f fNote At the end of Timer X Setting set Timer X count start flag txs 1 to start counting txckO l txckl 1 ffeount source fZi tess bit 0 and 1 prex 249 f fTimer value for timer mode or half period timing for pulse output mode tx 63 f Timer value for timer mode or half period timing for pulse output mode txmod0 0 txmod1l 0 f Timer mode txmr bit 0 and 1 ff FRREREEEKERETEEEEKEEEREEEKEEEREEEKEEEE ff Timer Y Setting fF FETEREEEREREEEEEKRRREREEEREREREEEREEEE f Note At the end of Timer Y Setting set Timer Y count start flag tys 1 to start counting FF REET EREREREEEEREEEREEEREREREEREREEEL ff Timer Z Setting LF FRRETEEEKKERETEEEKKEEEREEEKKEREEEEKEEER f fNote At the end of Timer Z Setting set Timer Z count start flag tzs 1 to start counting f Set P4S INTO pin to output f Set INTO to input direction for INTO one shot trigger enable case tzckO0 0 tzckl 0 ffeount source fli tess bit 4 and 5 prez 249 f Timer value for Programmable Wait tzsc 255 Accuracy level 100 tzpr 127 ffccuracy level 100 tzopl 0 ffTimer Z output level latch pum bit 2 inoseg l intOen l intOpl 0 ff Edge trigger at rising edge pum bit 7 inostg 1 ffINTO pin one shot trigger validi pum bit 6 tzmod0 1 tzmodl l tzwe l
27. Frequency Value 1MHz CPU Clock Division Divided by Stdetault Figure 3 36 UART Window E UART 0 and UART 1 have similar window The discussion below referring UART 0 is also applicable to UART 1 UART 2 has its own window and the operation modes are different from UART 0 and UART 1 All settings are disabled by default when Disabled is selected from Serial Interface Mode combobox UART 0 and UART 1 support the following serial interface operating modes 1 Clock Synchronous a Transmitter mode b Receiver mode 2 UART 7 bits a Transmitter mode b Receiver mode 3 UART 8 bits a Transmitter mode b Receiver mode 4 UART 9 bits a Transmitter mode b Receiver mode mE UART 2 supports the following operating mode 7 Clock synchronous c Transmitter mode 46 d Receiver mode 8 UART 7 bits a Transmitter mode b Receiver mode 9 UART 8 bits a Transmitter mode b Receiver mode 10 UART 9 bits a Transmitter mode b Receiver mode 11 I2C bus mode c Transmitter mode d Receiver mode 12 Special Mode 2 c Transmitter mode d Receiver mode 9 IEBus mode c Transmitter mode d Receiver mode 10 SIM mode c Transmitter mode d Receiver mode 2CENESAS For each operation mode the related function settings are supported while the unrelated setting are disabled E Calculated value for register setting is being round to the nearest whole number For example if uObrg is calculat
28. Minimum acceptable value is 0 TAO valid range 0 65535 Formula 16 bit H width value entered TAO x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TAO register high order address m value of TAO register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Formula Timer Value entered TA0 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TAO x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Maximum acceptable value is 65535 TAO valid range 0 65535 Formula 16 bit H width value entered TAO x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TAO register high order address m value of TAO register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Enter value for Timer A1 Formula Timer Value entered TA1 1 x Internal Count Source
29. Operation UART 0 C Disable Comparator B3 Usage UARTO UART 1 55 D Comparator A Comparator B OTC 4 inticp 1 Comparator B1 operation disabled intcmp bit 0 CPU Clock On chip oscillator defaukt Frequency Value 0 125 MHz s sne Divide by 8 defaul CPU Clock Onision Figure 3 29 Comparator B Window for R8C 32A 33A and 35A E User is allowed to de activate or activate Comparator B settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button E User can make the related interrupt settings through INT 0 INT 3 windows 38 3 3 10 DTC Window rm lO Wizard Fot 4 A Fot 5 7 Port 6 INTO INT 4 INT 2 INT 3 INT 4 Usage f Activate Timer RA Timer RB Timer RC Timer RD Timer RE UART 0 UART 1 JUART 2 LIN SSU ADC DAC Comparator A Comparator B Transfer Block Size Tp 00 UART 1 Para meter nmif 0 dtcedO_addr dtccr_mode 0 dicd0_addr dtccr_rptzele0 dtcd0_addr dtccr_samod 0 dted0_addr dtccr_damod 0 dted0_addr dtecr_chne 0 died0_addr dtecr_rptint 0 dicdO_addr dtble 0x00 dtedO_addr dtect 0 00 dated addr Atrid iini ji CPU Clock On chip oscillator defautt CPU Clock Division Divide by didefault Soca ee eeenaeceeeeeeeeesaeesceeeeneeeeeeeeeaeeeeeaseeeeeeeeeeeeneceeeeeeeeeeeeeeeeseeeeeeseeeeseseeeeeeseeeeeeseeeeeseeeeseseseeeeeeeeeee
30. Operation Put Trigger Mo division dete 4 16 bit H width R mE External Count Source Count Polarity fracta z m ms 5 bit H Width st INTO INT 1 INT J INTS INT4 INTS Key input interrupt Timer oo Tia mro_taOmr 0 WPulse is not outputttalme bit 2 tmodO taQmr 0 trod talmr 0 ATimer made selected taUimr bit 0 and 1 tckO_taQmr 0 tck1 talmr 0 fount source fi tale bit 6 and 7 ta0 499 Enter Timer value for timer mode PU Clock On chip oscillator detaut Frequency Value TMHAz 25 CPU Clock Division Divided by Stdetautt Figure 3 34 Timer Window E Fach timer has its individual window In these timers Timer AO Timer A4 have similar windows and Timer BO Timer B2 have similar windows E User is allowed to de activate or activate Timer settings All settings are disabled when De activate radiobutton is selected To enable the settings click on Activate radio button E The following timers and operation modes are supported 1 Timer AO Timer A4 Timer mode Event counter mode One shot timer mode PWM mode 2 Timer BO Timer B2 Timer mode Pulse period measure mode Pulse width measure mode Event counter mode A D trigger mode available for Timer BO and Timer B1 only 43 3 4 tENESAS Three Phase Motor Control Timer Timer S M16C 28 and M16C 29 Waveform generation mode Timer measurement mode For each operation mode the related func
31. PREZ 1 x TZSC 1 x Internal Count Source System Clock In this case PREZ is fixed at 249 250 1 Refer to no 7 for example calculation Similar as Timer Y Primary Period Formula Timer Value entered PREZ 1 x TZPR 1 x Internal Count Source System Clock In this case PREZ is fixed at 249 actual count is 250 Refer to no 7 example calculation Similar as Timer Y Primary Period Formula Timer Value entered PREZ 1 x TZSC 1 x Internal Count Source System Clock In this case PREZ is fixed at 249 250 1 Refer to no 7 example calculation Similar as Timer Y Primary Period Formula Timer Value entered PREZ 1 x TZPR 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 250 Formula Timer Value entered PREZ 1 x TZSC 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 250 Formula Timer Value entered PREZ 1 x TZPR 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 250 Formula Timer Value entered PREZ 1 x TZSC 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 250 73 22 23 24 25 26 sQENESAS Value entered exceeded maximum value Formula at Timer Z Primary Period Timer Value entered PREZ 1 x TZPR 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 25
32. Shits Falling edge of INTO Hex ooodo Destination Hex oo000 f Repeat transfer v Timer B Timer 51 Timer B2 Three phase motor contral timer TimerS Dhiao 4 F dimbit_dmOcon 0 iMN6 bit transter selectedidmocon bit 0 dimasl_ dmOcon 0 fSingle transter mode selected dmOcon bit 1 ded dmOcon 0 dad _dmocon 0 Source address Fixed direction Destination address Fixed direction dmdc dimsl 000 Request cause Falling edge of INTO pin terl 0 iSet the transter count 1 65536 dimae_dimOcon 1 Enable DMA 2arQ 0 00000 Set DMAO source pointer darQ 000000 Set DMAO destination pointer Transfer Mode f Single transfer CPU Clock On chip oscillatoridetaut Frequency Value MHz on CPU Clock Division Divided by Stdefauit Figure 3 35 DMA Window DMAO and DMA have similar window The discussion below referring to DMAO is also applicable to DMAI User is allowed to de activate or activate DMAQO settings All settings are disabled when De activate radiobutton is selected To enable the settings click on Activate radio button User is able to do settings like Transfer Bit Transfer Mode DMA Request Cause and Source to Destination Direction User is allowed to input address pointer for source address and destination address and transfer count 45 3 4 6 UART Window w 10 Wizard Key input interrupt Timer 40 Timer 41 Timer 42 Timer 43 Timer 44 Timer BO Timer B1 Timer B2 Three phase motor
33. TMRF OCRFH 1 x Internal Count Source Clock Timer Value entered ms TMRF OCRFH 1 x 32 5 MHz 0 1 ms TMRF OCRFH 1 x 32 5 MHz TMRF OCRFH 1 0 1 ms x 5 MHz 32 TMRF OCRFH 1 16 Hence TMRF OCRFH 15 CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Int Count Source L Divide by 32 Divide by 16 Divide by 4 Divide by 4 Subclock Formula Timer Value entered ms TMRF OCRFL 1 x Internal Count Source Clock Example to calculate value of TMRF OCREFL Desired timer value entered 0 5 ms Based on the formula above if Internal Count Source is Divide by 4 Subclock Timer Value entered ms TMRF OCRFL 1 x Internal Count Source Clock Timer Value entered ms TMRF OCRFL 1 x 32 5 MHz 0 5 ms TMRF OCRFL 1 x 32 5 MHz TMRF OCRFL 1 0 5 ms x 32 768 KHz 4 TMRF OCRFL 1 4 Hence TMRF OCRFL 3 115 11 Timer F Output Compare Match 16 bits tENESAS CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Int Count Source L Divide by 32 Divide by 16 Divide by 4 Divide by 4 Subclock Formula Timer Value entered ms TMRF OCRF 1 x Internal Count Source Clock Example to calculate value of TMRF OCRFL and TMRF OCRFH Desired timer value entered 0 5 ms Based on the formula above if Internal Count Source is Divide by 32 Timer Value entered ms OCRF 1 x Internal Count Source Clock 0 5ms TMRF OCRF 1 x 32 5 MHz
34. Value MHz a CPU Clock Division Divided by Scdefautt Figure 3 38 Multi master I2C Bus Window E Multi master I2C bus window is available in M16C 28 and M16C 29 only E User is allowed to de activate or activate Multi master I2C bus settings All settings are disabled when De activate radiobutton is selected To enable the settings click on Activate radio button E User is able to do settings like Clock Select I2C System Clock SCL Mode and ACK Clock E User is allowed to input value for SCL Frequency Control and SCL Release Time Calculated value for SCL Frequency Control and SCL Release Timer will be shown in the comment under the status list 49 3 4 9 CAN Window w l0 Wizard Key input interrupt Timer 40 a Timer 41 Timer A2 Timer AS Timer 44 Timer BO Timer B1 Timer B2 Three phase motor control timer sage f De activate f Activate TEAN Clack Select Mo division x Baud Rate Prescaler Divide hy 1 Z Time Stamp Prescaler 1 bit time Y PTS Control h Y Tq PRS1 Control 2 Tq PRS Contral 2 Tq SY Control h Ta Listen only Mode Disable detautt C Enable Sees Sampling Contral f One time C Three times Message Order f Word access 0 Byte access Basic CAN Enable f Mo f Yes Loop Back Mode Enable f Mo f Yes Multti master 2 bus v UARTO UART 1 UART 2 sd sol Mutti master 20 bus CAN Parameter rently cOcth 0 sam
35. at Timer RA TRAPRE Value Invalid value entered at Timer RA TRA Value Value entered is below minimum value at Timer RA TRAPRE Value entered is below minimum value at Timer RA TRA Value entered exceeded maximum value at Timer RA TRAPRE Value entered exceeded maximum value at Timer RA TRA Invalid value entered at Timer RB Timer Value Invalid value entered at Timer RB Primary Period Invalid value entered at Timer RB Secondary Period Invalid value entered at Timer RB Wait Time Invalid value entered at Timer RB One shot Pulse Output Time Value entered is below minimum value at Timer RB Primary Period tENESAS TMO valid range OOOOh FFFFh TM1 valid range OOOOh FFFFh TM1 valid range OOOOh FFFFh Enter 8 bits transmission data Example 10000111 Enter 8 bits transmission data Example 10000111 TRAPRE valid range 0 255 TRA valid range 0 255 TRAPRE valid range 0 255 TRA valid range 0 255 TRAPRE valid range 0 255 TRA valid range 0 255 Formula timer value entered trobpre 1 x tropr 1 x Internal Count Source System Clock Refer to no 1 example calculation Similar as Timer X Timer Value Formula timer value entered tropre 1 x tropr 1 x Internal Count Source System Clock Refer to no 7 example calculation Similar as Timer Y Primary Period Formula timer value entered tropre 1 x trosc 1 x Internal Cou
36. below minimum value Formula at Timer A2 8 bit H width Value entered exceeded maximum value at Timer A2 Timer Value Value entered exceeded maximum value at Timer A2 One shot Timer Value Value entered exceeded maximum value at Timer A2 Count Value Value entered exceeded maximum value at Timer A2 16 bit H width Value entered exceeded maximum value at Timer A2 8 bit H width Invalid value entered at Timer A3 Timer Value Invalid value entered at Timer A3 One shot Timer Value Invalid value entered at Timer A3 Count Value Invalid value entered at Timer A3 16 bit H Width Invalid value entered at Timer A3 8 bit H Width 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA2 register high order address m value of TA2 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Formula Timer Value entered TA2 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA2 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Maximum acceptable value is 65535 TA2 valid range 0 65535 Formula 16 bit H width value entered TA2 x Internal Count Source System Clo
37. by 8 Divide by 4 Divide by 4 Subclock Formula Serial clock cycle us Clock Division Ratio Clock x 1000000 Example to calculate Serial Clock Cycle Based on the formula above if Clock Division Ratio is Divide by 1024 Serial clock cycle u Clock Division Ratio Clock x 1000000 i 024 5MHz x 1000000s3brg 1 31 25 S Serial clock cycle us Hence the serial clock cycle is 204 8 us CPU Clock Oscillator Clock gt 10 MHz System Clock gt 5 MHz Subclock gt 32 768KHz BRG Clock No division Divide by 2 Divide by 16 Divide by 64 Formula for Synchronous mode SCI3X BRR Oscillator Clock 8 x M x Bit Rate 1 where M 2 power of 2 x n Example to calculate Bit Rate for Synchronous mode Desired Bit Rate value entered 5000 bps Based on the formula above if BRG Clock is No Division power of 2 x 0 SCI3X BRR Oscillator Clock 8 x M x Bit Rate 1 where M 2 power of 2 x n SCI3X BRR 10 MHz 8 x 1 x 5000 1 Hence the SCI3X BRR is 249 117 SCI3 Bit Rate for Asynchronous mode Same for SCI31 and SCI32 ADC A D Conversion Speed tENESAS CPU Clock Oscillator Clock gt 10 MHz System Clock gt 5 MHz Subclock gt 32 768KHz BRG Clock No division Divide by 2 Divide by 16 Divide by 64 Formula for Asynchronous mode SCI3X BRR Oscillator Clock 64 x M x Bit Rate 1 where M 2 power of 2 x n Example to calculate Bit Rate for Asynchronous mode
38. control timer General Setting Serial Interface Mode Clock Synchronou Input value Transter Clock Period 16 us Baud Rate Clock Select Internal C External BRG Clock Select f Blo division Divide by 2 C Divide by amp C Divide by 32 Stop Bit co c Parity Bit Enable Parity Select io m Transmit Format LSB first C MEE first Operation Transmitter C Receiver CLE Polarity Ses Transmitter Setting Transmit Data OOOO0000 bits Data Output Pin Chios f N channel open CTSOMRTSO Pin Shared C Separated Receiver Setting Successive Receive f Falling edge ie C Rising edge io vw Timer B2 Three phase motor control timer Timer DMA DMA UarRTo US 4 gt Comment uform uO0cO 0 ALS firsttuOcO bit 7 te_u0c1 1 re_u0e1 0 crs_u0cO 0 Transmission enabled uOc1 bit 0 nch_uOcO 0 ACMOS output selected uOco bit 5 ckpol_uwOcO 0 Falling edgeculcu bit 6 resp 0 NCTSORTSO shared pin P6_O pin selected ucan bit 6 3 u brg 7 Setting transter clack period for Clock Synchronous Calculated value is r uOthh O0B00000000 Set transmission datats bits for Clack Synchronous Set transmission dat UOthI OBO0000000 Hoet transmission datats bits for Clack Synchronous Set transmission dat sma0_uOme 1smet_uOmr O sind2_uOmr 0 iClock synchronous serial WO mode selected ulmrbitO 2 lt i B bps s CPU Clock On chip o cillatoridetautt
39. gt Programs gt IO Wizard This will invoke IO Wizard Main window as shown in Figure 3 2 us IO Wizard exe Figure 3 1 IO Wizard Icon 14 3 2 Features of IO Wizard Window 3 2 1 GUI Environment IO Wizard offers an easy to use dialog based software environment fe l0 Wizard PLU Clock Clock Frequency On chip oscillator detautt Frequency Value C Main clock Xin xout Series RAC Tiny Series _y MHz CPU Clock Division Divide by 8 detaut ROM Capacity OK bytes Main Clock Drive Capacity cmOs 1 cmo02 0 cml 4 0 ocd0 0 ocd 0 fon chip oscillator selected icm bt 2 and 5 cm1 bit 4 ocd bit 0 and 1 ocd2 1 fon chip oscillator select ediacd bit 2 cmi6 0 cml 0 cmO6 1 NDrvide by 6 selectedicmo bit 5 Figure 3 2 Features of IO Wizard Main Window E Supported devices for R8C Tiny Series are R8C 10 R8C 11 R8C 12 R8C 13 R8C 1A R8C 1B R8C 22 R8C 23 R8C 24 R8C 25 R8C 26 R8C 27 R8C 28 R8C 29 R8C 2A R8C 2B R8C 2C R8C 2D R8C 2E R8C 2F R8C 2G R8C 2H R8C 2J R8C 2K R8C 2L R8C 32A R8C 33A and R8C 35A E Supported devices for M16C Tiny Series are M16C 26A 48 pin device M16C 28 80 pin device and M16C 29 80 pin device E Supported device for H8 SLP Series is H8 38347 100 pin device mE When user selects a part no from the combobox the RAM and ROM size capacity of that part will be reflected on display which is beside the pin configuration picture Data flash size capacity will b
40. h sfr_ R8C29config h sfr_R8C2Aconfig h sfr_R8C2Bconfig h sfr_R8C2Cconfig h sfr_R8C2 Deconfig h sfr_R8C2Econfig h sfr_R8C2Fconfig h sfr_R8C2Gconfig h sfr_R8C2Hconfig h sfr_R8C2Jconfig h sfr_R8C2Kconfig h sfr_R8C2Lconfig h sfr_R8C32Aconfig h sfr_R8C33Aconfig h sfr_R8C35Aconfig h sfr _M16C26Aconfig h sfr_M16C28config h sfr_M16C29config h Note File to be generated will depend on the MCU selected E Header file for SFRs declaration Declares the system settings and specific SFRs definitions like defining individual bit of any specific SFR register For H8 SLP Series the following files are also generated and present in the Generated folder d Intprg c Source file for interrupt functions e lo define h E Header file for definition of I O Register for H8 38347 Group 65 RENESAS Generated Fie Edit wiew Favorites Tools Help sack 7 a gp Search Folders EER Address C Program Files Renesas lOWizard Generated Config c File and Folder Tasks C Source File 7 KB Other Places Config h Header File cy 1oWizard gt KB My Documents o Shared Documents 4 My Computer 44 KE a My Network Places sfr_Re1Oconfig h C Header File Details Figure 4 1 Folder Structure of Generated Folder The output files have to go through code compilation process before user can obtain the object file The files does not include any startup program hence it is a free project User may use Renesas M3T NC8C C comp
41. is allowed to activate more than one peripheral setting Let s look at each window in turn 3 3 1 System Setting Window Re JO Wizard Saks ate N ESAS CPU Clock Clock Frequency On chip oscillator detautt Frequency Value l C Main clock Xin xout eo SEES ReCiTiny Series a l ma Group RECA O Group ha CPU Clock Division Part no RSF21 102FP i Divide by 8 default ROM Capacity BK bytes RAM Capacity a 512 bytes Li cmOs 1 cmO2 0 cm 4 0 ocdO0 0 ocd 0 On chip oscillator selectedicmo bit 2 and 5 cm1 bit 4 ocd bit 0 and 1 ocd2 1 fon chip oscillator selected ocd bit 2 Figure 3 18 System Setting in Main Window JO Wizard supports CPU clock selection of on chip oscillator main clock high speed on chip oscillator and sub clock Default CPU clock source is on chip oscillator in Divide by 8 mode E For setting of main clock frequency user is allowed to make their clock frequency selection from the comobox dropdown list For R8C 10 and R8C 12 the following clock frequencies are supported 8MHz 1OMHz 12MHz and 16MHz For R8C 11 R8C 13 R8C 1A R8C 1B R8C 22 R8C 23 R8C 24 R8C 25 R8C 26 R8C 27 R8C 28 R8C 29 R8C 2A R8C 2B R8C 2C R8C 2D R8C 2E R8C 2F R8C 2K R8C 2L R8C 32A R8C 33A and R8C 35A the following clock frequencies are supported SMHz 1OMHz 12MHz 16MHz and 20MHz Clock frequency for on chip oscillator is 125kHz For R8C 11 13 1A 1B 2G 2H and 2J clock frequency for high
42. is below minimum value at Timer F O p Compare H Value entered exceeded maximum value at Timer F O p Compare H Invalid value entered at Timer F O p Compare L Value entered is below minimum value at Timer F O p Compare L Value entered exceeded maximum value at Timer F O p Compare L Invalid value entered at Timer F 16 bits Timer Value Value entered is below minimum value at Timer F 16 bits Timer Value Value entered exceeded maximum value at Timer F 16 bits Timer Value CENESAS Enter value of O p Compare H Valid range of TMRF OCREH is 0 255 Formula Timer Value entered ms TMRF OCRFH 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 9 for example of timer value for O o Compare H calculation Enter value of O p Compare H Valid range of TMRF OCREH is 0 255 Formula Timer Value entered ms TMRF OCRFH 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 9 for example of timer value for O o Compare H calculation Enter value of O p Compare L for Timer F Formula Timer Value entered ms TMRF OCRFL 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 10 for example of timer value for O o Compare L calculation Enter value of O p Compare L Valid range of TMRF OCREL is 0 255 Formula Timer Value entered ms TMRF OCRFL 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 10 for example of timer value for O o
43. of continuing improvement in design and performance of this software Renesas reserves the right to change wholly or partially the specifications design user s guide and other documentation at any time without notice Target User of the Product This product should only be used by those who have carefully read and thoroughly understood the information as well as restrictions contained in the user s guide Do not attempt to use the product until you fully understand its mechanism Support This is a free of charge and AS IS basis software We will not provide any support for this software ii tENESAS LIMITED WARRANTY Renesas warrants its products to be manufactured in accordance with published specifications and free from defects in material and or workmanship The foregoing warranty does not cover damage caused by fair wear and tear abnormal store condition incorrect use accidental misuse abuse neglect corruption misapplication addition or modification or by the use with other hardware or software as the case may be with which the product is incompatible No warranty of fitness for a particular purpose is offered The user assumes the entire risk of using the product Any liability of Renesas is limited exclusively to the replacement of defective materials or workmanship DISCLAIMER RENESAS MAKES NO WARRANTIES EITHER EXPRESS OR IMPLIED ORAL OR WRITTEN EXCEPT AS PROVIDED HEREIN INCLUDING WITHOUT LIMITATION T
44. s3brg 1 31 25 s3brg 31 25 1 30 25 30 105 ENESAS 14 SI O4 Transfer Clock Period CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Internal Clock Source No division Divide by 2 Divide by 8 Divide by 32 Formula s4brg 1 System Clock Internal Clock Source 2 x Transfer Clock Period entered Example to calculate value of s4brg Desired transfer clock period value entered 25us Based on the formula above if main clock is chosen and BRG clock select is divide by 8 s4brg 1 System Clock Internal Clock Source 2 x Transfer Clock Period entered s4brg 1 20MHz 8 2 x 25us s4brg 1 31 25 s4brg 31 25 1 30 25 30 5 5 Error Message Table for H8 SLP Series When an error occurs in H8 SLP Series settings user should look up the error code number and error description listed in the error report window from the Error Message table below When in doubt refer to the table below for additional notes and advice to input the correct setting No Error Message Notes and Action 01 Invalid value entered at Timer C Enter value for Timer C Timer value Formula for Down counter Timer Value entered ms TMRC TCC 1 x Internal Count Source Clock Formula for Up counter Timer Value entered ms 256 TMRC TCC x Internal Count Source Clock Refer to Section 5 6 Table list no 4 and 5 for example of timer value calcu
45. select is divide by 8 UiIBRG 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered UiIBRG 1 20MHz 8 2 x 50us UiIBRG 1 62 5 UIBRG 62 5 1 61 5 62 104 12 13 UARTi Baud Rate SI O3 Transfer Clock Period tENESAS CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz BRG Clock Select No division Divide by 2 Divide by 8 Divide by 32 Formula UiBRG 1 System Clock BRG Clock Select Baud Rate entered x 16 Example to calculate value of UiIBRG Desired baud rate value entered 9600bps Based on the formula above if main clock is chosen and BRG clock select is divide by 8 UiBRG 1 System Clock BRG Clock Select Baud Rate entered x 16 UiIBRG 1 20MHz 8 9600bps x 16 UIBRG 1 16 3 UIBRG 16 3 1 15 3 21 CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Internal Clock Source No division Divide by 2 Divide by 8 Divide by 32 Formula s3brg 1 System Clock Internal Clock Source 2 x Transfer Clock Period entered Example to calculate value of s3brg Desired transfer clock period value entered 25us Based on the formula above if main clock is chosen and BRG clock select is divide by 8 s3brg 1 System Clock Internal Clock Source 2 x Transfer Clock Period entered s3brg 1 20MHz 8 2 x 25us
46. to begin the installation IF You want to review or change any of your installation settings click Back Click Cancel to exit the wizard InstallShield Figure 2 5 Ready to Install Screen E Click install to begin the installation 11 CENESAS 10 Wizard V 1 00 Release 03 InstallShield Wizard Setup Status IO Wizard Y 1 00 Release 03 is configuring your new software installation Installing C Program Files RenesaslO WizardslO Wizard exe installshield Figure 2 6 Installing IO Wizard Screen E The installer then copies the IO Wizard files to the specified directory 10 Wizard 1 00 Release 03 InstallShield Wizard InstallShreld Wizard Complete The InstallShield Wizard has successtully installed IO Wizard V 1 00 Release 03 Click Finish to exit the wizard install Sie a oe Figure 2 7 Installation Complete Screen E Click on Finish to exit install program 12 2 2 2 Multiple Installation lO Wizard V 1 00 Release 03 InstallShield Wizard Preparing Setup Please wait while the InstallShield Wizard prepares the setup IO Wizard 01 00 Release 03 Setup it preparing the InstallShield Wizard which will guide you through the rest of the setup process Please wait 10 Wizard has been installed on your computer Do you want to continue the current new installation sei Figure 2 8 Multiple Installation Screen 0 WizardSe
47. value entered 2 Sawtooth Modulation Mode TB2 1 System Clock x Carrier Wave Cycle value entered Refer to Section 5 3 Table list no 10 for example of Carrier Wave Cycle value calculation Valid range 1 15 94 sCENESAS 107 Value entered exceeded maximum Formula value at 3 phase Motor Control Timer DTT Dead Time value entered x System Clock Dead Time Refer to Section 5 3 Table list no 6 for example of dead time value calculation 108 Value entered exceeded maximum Formula value at 3 phase Motor Control Timer Triangular Modulation Mode V phase PWM Duty Cycle TA1 System Clock x V phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA1 System Clock x V phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 7 for example of V phase PWM Duty Cycle value calculation 109 Value entered exceeded maximum Formula value at 3 phase Motor Control Timer Triangular Modulation Mode W phase PWM Duty Cycle TA2 System Clock x W phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA2 System Clock x W phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 8 for example of W phase PWM Duty Cycle value calculation 110 Value entered exceeded maximum Formula value at 3 phase Motor Control Timer Triangular Modulation Mode U phase PWM Duty Cycle TA4 System Clock x U phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA4 System Cl
48. 0 Value entered exceeded maximum value Formula at Timer Z Secondary Period Timer Value entered PREZ 1 x TZSC 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 250 Value entered exceeded maximum value Formula at Timer Z Wait Time Timer Value entered PREZ 1 x TZPR 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 250 Value entered exceeded maximum value Formula at Timer Z One Shot Pulse Output Time Timer Value entered PREZ 1 x TZSC 1 x Internal Count Source System Clock PREZ is fixed at 249 actual count is 250 Invalid value entered at UART 0 Transfer CPU Clock Clock Period On chip oscillator gt 125kHz Main clock gt 16MHz BRG Clock Select No division Divide by 8 Divide by 32 Formula uObrg 1 System Clock BRG Clock Select x Transfer Clock period entered 2 Example to calculate value of u0brg Desired baud rate entered 200us Based on the formula above if on chip oscillator is chosen and BRG clock select is no division Note uObrg valid range is 0 255 uObrg 1 System Clock BRG Clock Select x Transfer Clock period entered 2 uObrg 1 125KHZz 1 x 200 2 uObrg 1 25 2 uObrg 1 12 5 uObrg 12 5 1 uObrg 11 5 uObrg 12 Round down to nearest whole number 74 217 28 29 30 31 32 33 34 35 36 3 38 39 Invalid
49. 1 0 1ms x 20MHZ2 8 trdgrc 1 0 1ms x 2500000 trdgrc 1 250 trdgrc 250 1 Therefore trdgraO 249 Formula trcgrc 1 Wait Time x Frequency of Count Source Formula trcgrc 1 Wait Time x Frequency of Count Source Formula trcgrb Active Level Width x Frequency of Count Source Wait Time Example to calculate value of trcgrb Desired Active Level Width entered 0 1ms and Wait Time is 0 1ms Based on the formula above if Main Clock 20MHz is chosen and Internal clock source is divide by 8 trdgrb Active Level Width entered x Frequency of Count Source Wait Time trdgrb 0 1ms x 20MH2z 8 0 1ms x 20MHZz 8 1 trdgrb 0 1ms x 2500000 0 1ms x 2500000 1 trdgrb 250 249 trdgrb 499 Therefore trdgra0 499 84 CENESAS 165 Value entered is below minimum value at Formula Timer RC Active Level Width trcgrb Active Level Width x Frequency of Count Source Wait Time 166 Value entered exceeded maximum value Formula at Timer RC Active Level Width trcgrb Active Level Width x Frequency of Count Source Wait Time 167 Invalid value entered at DTC Block Size Enter 0 OxFF only 168 Invalid value entered at DTC Transfer 169 Invalid value entered at DTC Transfer Count Count Reload 170 Invalid value entered at DTC Source Address Enter 0 OxFF only Enter 0 OxFF only Enter 0 OxFFFF only 171 Invalid value entered at DTC Destination Enter 0 OxFFFF
50. 1 BRR Oscillator Clock 64 x M x Bit Rate 1 Refer to Section 5 6 Table list no 15 for example of bit rate value for SCI31 calculation Enter value of Bit Rate for SCI32 Formula SCI32 BRR Oscillator Clock 8 x M x Baud Rate 1 Refer to Section 5 6 Table list no 14 for example of bit rate value for SCI31 calculation Enter value for Bit Rate Valid range of SCI32 BRR is 0 255 Formula SCI32 BRR Oscillator Clock 8 x M x Baud Rate 1 Refer to Section 5 6 Table list no 14 for example of bit rate value for SCI31 calculation Enter value for Bit Rate Valid range of SCI32 BRR is 0 255 Formula SCI32 BRR Oscillator Clock 8 x M x Baud Rate 1 Refer to Section 5 6 Table list no 14 for example of bit rate value for SCI31 calculation Enter value of Baud Rate for SCI32 Formula SCI32 BRR Oscillator Clock 64 x M x Bit Rate 1 Refer to Section 5 6 Table list no 15 for example of bit rate value for SCI31 calculation Enter value for Bit Rate Valid range of SCI32 BRR is 0 255 Formula SCI32 BRR Oscillator Clock 64 x M x Bit Rate 1 Refer to Section 5 6 Table list no 15 for example of bit rate value for SCI31 calculation 110 tENESAS 36 Malue entered exceeded maximum Enter value for Bit Rate Valid range of SCI32 BRR is 0 255 value at SCI82 Bit Rate Formula SCI32 BRR Oscillator Clock 64 x M x Bit Rate 1 Refer to Section 5 6 Table list no 15 for example
51. 21 TEA OON sc E E EAA ene iesciencees 28 Senal VO Window ee ST ee 30 CAN WindoW seseneeseessessessessessrssrssrsessersessesscssrssresrserseosesscsseesrestssrsersesserseostosesseeeeseeseest 32 ADCN MION ee A AE E E 33 DAC W MANO WV ereina T 34 Cona Vy ON ee E N E E T T EET ET 35 DEC AN ION ea e E E A A A ee 39 Outline of M16C Tiny Series Window eesssssseseenssssssssseerrssssssseceresssssseerersssssssseeresssssssees 40 o a N 16 6 a E E eer SonreTre it tee er 40 POr VV O E E ET EE E EAA 4 MINT AO Wy sao cececc ct detcosee nace A ANAA EA E AE 42 LEEN ON EE EE EEE A AEA 43 DMA Wi1nd0W uu 0 ccc ceccecccssccscccscccsccesccuscesscenscesscesscesseusceuccesscesccesscesseecsesceccesscesseusseuseenss 45 UART Window ou cecccecceccescccccscccnccesccesceuscescenscesscesseessessessenccesscesceusseceeccencss 46 BO nh OF Wy Ose sce EEEE EN AEE seca A see 48 Multi master I2C Bus Window cceccscccscccsccesccescescesscenscescesccenscesseuscessesceesceescss 49 CADW Use se A E A E EAA 50 ADC VV Oy eere EE EEE NEE EEE EE E EEEE EEEE 51 Oucine ot HS SLP Series Window sesssiecoscassnsasasasecesenreensdesscetassassmuaresacexsmensseascuissetepeaaseuauersee 52 E TN Vy TO e EE E E 32 POEN O a A E A E A 53 EONO r E E E E E AET 54 WEP ON a a E EE A E EE E E 55 C VY NOV eE E A E E EE EEA 56 ALC IW O e EE A A T AAA 58 PAM WOO aere EEE E T EER 59 SCHU N ON ee E E A 60 SCLAS CE T N ON A EE EE 6l ADC IN GON eea o E A E EAE E E EE EAE TE EE 62
52. 79 80 81 82 83 84 85 86 87 88 Value entered exceeded maximum value at Timer A4 8 bit H width Invalid value entered at Timer BO Timer value Invalid value entered at Timer BO Count Value Value entered is below minimum value at Timer BO Timer value Value entered is below minimum value at Timer BO Count value Value entered exceeded maximum value at Timer BO Timer value Value entered exceeded maximum value at Timer BO Count value Invalid value entered at Timer B1 Timer value Invalid value entered at Timer B1 Count Value Value entered is below minimum value at Timer B1 Timer value Value entered is below minimum value at Timer B1 Count value Value entered exceeded maximum value at Timer B1 Timer value Value entered exceeded maximum value at Timer B1 Count value Invalid value entered at Timer B2 Timer value CENESAS Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA4 register high order address m value of TA4 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Enter value for Timer BO Formula Timer value entered TB0O 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation Enter value for Timer BO TBO valid range 0
53. 7ds pdf R8C 28 R8C 29 Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rejO9b0279_r8c2829hm pdf R8C 28 R8C 29 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0169_r8c2829ds pdf Hardware specifications pin assignments memory maps R8C 2A R8C 2B Group Hardware Manual peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0324 r8c2a2bhm pdf R8C 2A R8C 2B Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0182_r8c2a2bds pdf R8C 2C R8C 2D Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0339_r8c2c2dhm pdf R8C 2C R8C 2D Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0183_r8c2c2dds pdf
54. ART 2 Transfer Clock Period Value entered is below minimum value at UART 2 Baud Rate Value entered exceeded maximum value at UART 2 Transfer Clock Period Value entered exceeded maximum value at UART 2 Baud Rate Invalid value entered at DAC DAO Output Value Value entered is below minimum value at DAC DAO Output Value Value entered exceeded maximum value at DAC DAO Output Value Invalid value entered at DAC DA1 Output Value Value entered is below minimum value at DAC DA1 Output Value Value entered exceeded maximum value at DAC DA1 Output Value Invalid value entered at Timer RF Compare 0 Value Value entered is below minimum value at Timer RF Compare 0 Value Value entered exceeded maximum value at Timer RF Compare 0 Value u2brg 1 System Clock BRG Clock Select x Transfer Clock Period entered 2 Refer to no 26 example calculation Similar as UART 0 Transfer Clock Period Formula u2brg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to no 27 example calculation Similar as UART 0 Baud Rate Enter 7 9 bits transmission data Example 1111000 is 7 bits 01001111 is 8 bits 100001111 is 9 bits Formula u2brg 1 System Clock BRG Clock Select x Transfer Clock Period entered 2 Formula u2brg 1 System Clock BRG Clock Select Baud Rate entered x 16 Formula u2brg 1 System Clock BRG Clock Select x Transfer Clock Period entered 2 Formula
55. Action Enter only 0 5ms 1ms 2ms or 4ms only CPU Clock On chip oscillator gt 125kHz Main clock gt 16MHz Internal Count Source No division Divide by 2 Divide by 8 Divide by 32 Formula Timer Value entered PREX 1 x TX 1 x Internal Count Source System Clock Example to calculate value of PREX and value of TX Desired timer value entered 1ms Based on the formula above if main clock is chosen and Internal clock source is divide by 2 Timer Value entered PREX 1 x TX 1 x Internal Count Source System Clock ims PREX 1 x TX 1 x 2 16MHz ims PREX 1 x TX 1 x 125ns PREX 1 x TX 1 1ms 125ns PREX 1 x TX 1 8000 Through calculation 250 x 32 8000 Note PREX valid range 0 255 and TX valid range 0 255 PREX 1 250 and TX 1 32 Hence PREX 250 1 which is 249 and TX 32 1 which is 31 Enter value for PREX PREX valid range 0 255 Enter value for TX TX valid range 0 255 Maximum acceptable value is 255 PREX valid range 0 255 Maximum acceptable value is 255 TX valid range 0 255 Enter only 0 5ms 1ms 2ms or 4ms only Formula Timer value entered PREY 1 x TYPR 1 x Internal Count Source System Clock Refer to no 1 example calculation Similar as Timer X Timer Value 71 CENESAS 07 Invalid value entered at Timer Y Primary CPU Clock 08 09 10 11 12 Period Invalid value entered at Timer Y Secondary Period
56. Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation Formula ulbrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Formula ulbrg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation Formula ulbrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Formula u2brg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation 97 CENESAS 152 Invalid value entered at UART2 Baud Formula Rate 153 Invalid value entered at UART2 Transmit Data 154 Value entered is below minimum value at UART2 Transfer Clock Period 155 Value entered is below minimum value at UART2 Baud Rate 156 Value entered exceeded maximum value at UART2 Transfer Clock Period 157 Value entered exceeded maximum value at UART2 Baud Rate 158 Invalid value entered at SI O3 Transfer Clock Period 159 Invalid value entered at SI O3 Transmit Data 160 Value entered is below minimum value at SI O3 Transfer Clock Period Value en
57. Compare L calculation Enter value of O p Compare L Valid range of TMRF OCREL is 0 255 Formula Timer Value entered ms TMRF OCRFL 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 10 for example of timer value for O o Compare L calculation Enter value of 16 bits Timer Value for Timer F Formula Timer Value entered ms 65536 TCF x Internal Count Source Clock Refer to Section 5 6 Table list no 8 for example of timer value calculation Enter value of 16 bits Timer Value Valid range of TMRF TCF is 0 65535 Formula Timer Value entered ms 65536 TCF x Internal Count Source Clock Refer to Section 5 6 Table list no 8 for example of timer value calculation Enter value of 16 bits Timer Value Valid range of TMRF TCF is 0 65535 Formula Timer Value entered ms 65536 TCF x Internal Count Source Clock Refer to Section 5 6 Table list no 8 for example of timer value calculation 108 19 20 21 22 23 24 25 26 2 Invalid value entered at Timer F O p Compare H L Value entered is below minimum value at Timer F O p Compare H L Value entered exceeded maximum value at Timer F O p Compare H L Invalid value entered at PWM Duty Cycle Value entered is below minimum value at PWM Duty Cycle Value entered exceeded maximum value at PWM Duty Cycle Invalid value entered at SCI31 Bit Rate Value entered is below minimum value a
58. Division High speed On chip Sub clock Drive Capacity Frequency alue a MHz z ROM Capacity 4 K bytes Frequency Switching Part no RSF21 207 SNFP Divide by SCdetault RAM Capacity 2 5K bytes Data Flash 1 Kbyte x 2 Parameter emi 3 1 cmOS 0 cml 4 0 hain Clock selected cmd bit 5 cm1 bit 3 and 4 ocd2 0 itiain clack selected for system clock ocd bit 2 cm 5 1 High drive capacity selected for main clockfcrm bit 5 Figure 3 15 Load button in Main Window A Load button is added beside the Next button in the main window it allows user to load any settings made in settings made in prior sessions When user click the lt Load gt button a Open dialog as shown below will pop out to prompt user to open the saved file Once the selected filename iow file is opened all previous settings saved will be updated onto the Fh a ee Look in E Desktop SaveSetting iow TEE File name SaveSetting iow Files of type lOowizard File icwy Cancel Figure 3 16 Open dialog 24 CENESAS 3 3 Outline of R8C Tiny Series Window IO Wizard supports R8C Tiny Series system setting and a selection of peripherals available in R8C 10 11 12 13 1A 1B 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2H 2J 2K 2L 32A 33A and 35A which are Port 0 to Port 9 INT 0 to INT3 Key input interrupt Timer X Y Z C RA RB RC RD RE RF UART 0 to UART2 SSU I2C LIN CAN ADC DAC and Comparator User
59. EDICAL APPLICATIONS without the written consent of the appropriate officer of Renesas Technology Asia Sales company Such use includes but is not limited to use in life support systems Buyers of Renesas Technology s products are requested to notify the relevant Renesas Technology Asia Sales offices when planning to use the products in MEDICAL APPLICATIONS Limited Anticipation of Danger Renesas cannot anticipate every possible circumstance that might involve a potential hazard The warnings in this user s guide and on the product are therefore not all inclusive Therefore you must use the product safely at your own risk CENESAS PREFACE About this manual This user s guide is written for Renesas IO Wizard software It describes the operation and usage Use this guide to get started with using the IO Wizard The manual is organized as follows Section 1 Section 2 Section 3 Section 4 Section 5 About IO Wizard Provides an overview to why the software is created Getting Started Provides step by step guide to IO Wizard installation Operation Guide Presents IO Wizard GUI environment Describes the different features and provides a description on each specific window Code Generation Gives an overview on the generated files Error Messages Provides a description on the error report window and also offers advice to assist user to input the correct setting An appendix containing links of relevant appl
60. Everywhere you imagine sE NI ESAS Microcomputer Development Environment System Renesas Technology Singapore Pte Ltd 2009 05 www renesas com C T D m o lt A D C v ENESAS IO Wizard User s Manual Code Generator for R8C M16C H8 Published by Renesas Technology Singapore Pte Ltd Date May 26 2009 V 1 31 Release 00 Copyright C Renesas Technology Singapore Pte Ltd All rights reserved Trademarks a General All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or organizations b Specific Microsoft Windows is registered trademarks of Microsoft Corporation IBM PC is a registered trademark of International Business Machines Corporation Pentium is a registered trademark of Intel InstallShield is a registered trademark and service mark of Macrovision Corporation and or Macrovision Europe Ltd 2 I C bus is a trademark of Koninklijke Philips Electronics N V IEBus is a trademark of NEC Electronics Corporation tENESAS IMPORTANT INFORMATION READ this user s guide before using this software KEEP the user s guide handy for future reference MCU Throughout this document the term MCU shall be defined as the Renesas R8C Tiny series microcomputers or Renesas M16C Tiny series Improvement Policy Renesas Technology Singapore Pte Ltd hereafter collectively referred to as Renesas pursues a policy
61. Formula TCRO Transfer Count value entered 1 123 Value entered is below minimum value Valid range 00000h FFFFFh at DMAO Source Address Pointer 124 Value entered is below minimum value Valid range 00000h FFFFFh at DMAO Destination Address Pointer 125 Value entered exceeded maximum Valid range 1 65536 value at DMAO Transfer Count Formula TCRO Transfer Count value entered 1 126 Value entered exceeded maximum Valid range 00000h FFFFFh value at DMAO Source Address Pointer 127 Value entered exceeded maximum Valid range 00000h FFFFFh value at DMAO Destination Address Pointer 128 Invalid value entered at DMA1 Enter value for Transfer Count Valid range 1 65536 Transfer Count Formula TCR1 Transfer Count value entered 1 129 Invalid value entered at DMA1 Enter value for Source Address Pointer Valid range 00000h FFFFFh Source Address Pointer 130 Invalid value entered at DMA1 Enter value for Destination Address Pointer Valid range 00000h FFFFFh Destination Address Pointer 131 Value entered is below minimum value Valid range 1 65536 at DMA1 Transfer Count Formula TCR1 Transfer Count value entered 1 132 Value entered is below minimum value Valid range 00000h FFFFFh at DMA1 Source Address Pointer 133 Value entered is below minimum value Valid range 00000h FFFFFh at DMA1 Destination Address Pointer 134 Value entered exceeded maximum
62. H8 SLP for 38347 Group This section contains links to all the related documentation that should be required to familiarise yourself with H8 SLP microcontroller SC Documents Description H8 3847R Group H8 3847S Group H8 38347 Group Hardware specifications pin assignments memory H8 38447 Group Hardware Manual maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0145_ h83847r pdf H8 300L Series Software Manual Software Manual detailed description of the H8 300L instruction url http documentation renesas com eng products mpumcu rej09b0214 h8300l pdf 123 CENESAS Appendix D Other Related Documents Application Notes e Application notes are application examples and sample programs of peripheral functions e Renesas Website contains extensive library of application notes on R8C M16C H8 SLP Listed below are application notes of some peripherals that IO Wizard supports e In Renesas Global Website access Tiny gt R8C Tiny Series gt Application Notes for R8C application notes or Tiny gt M16C Tiny Series gt Application Notes for M16C application notes or Super Low Power gt H8 300L Super Low Power Series gt Application Notes for H8 SLP application notes Renesas Interactive Website Visit Renesas Interactive Website to learn more about the architecture of R8C M16C H8 SLP via interactive courses Access real h
63. HEREOF WARRANTIES AS TO MARKETABILITY MECRCHANTABILITY FITNESS FOR ANY PARTICULAR PURPOSE OR USE OR AGAINST INFRINGEMENT OF ANY PATENT IN NO EVENT SHALL RENESAS BE LIABLE FOR ANY DIRECT INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY NATURE OR LOSSES OR EXPENSES RESULTING FROM ANY DEFECTIVE PRODUCT THE USE OF ANY PRODUCT OR ITS DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES EXCEPT AS EXPRESSLY STATED OTHERWISE IN THIS WARRANTY THIS PRODUCT IS SOLD AS IS AND YOU MUST ASSUME ALL RISK FOR THE USE AND RESULTS OBTAINED FROM THE PRODUCT iii ENESAS All Right Reserved This user s guide and product are copyrighted and all rights are reserved by Renesas No part of this user s guide all or part any be reproduced or duplicated in any form in hardcopy or machine readable form by any means available without Renesas s prior written consent Other Important Things to Keep in Mind 1 Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Renesas Technology s semiconductor products Renesas assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein 2 No license is granted by implication or otherwise under any patents or other rights of any third party or Renesas 3 MEDICAL APPLICATIONS Renesas Technology s products are not authorized for use in M
64. IAr OG BR S16 6 eee enn nee eee S 63 3 6 PIMC SSO er ceo EN E soe cease E E E A A EE A TA 64 SO LOdE e aO E E E veer satandeeasteuneetuce 65 4 1 aenor en E A R 65 4 2 Config c Config h and Todefine bn cee ceccccccccccsssseeseeccecceeeaeeesseeececeeeseseessseeeeeeesessaeeenseeeeess 66 CCH PEO IVS Caceres cece srs E e eaeenceeceoanneuncumn th eseneseenectne 70 5 1 PEO TR COU E E E A A das assandeesd euseestsacnsseeueddatveeremte 70 5 2 Error Message Table for R8C Tiny Series cccccccccccsssseseeeececceeeaeeesesecceeeeeeaaeeseseeeeeeeeaaas 71 5 3 Error Message Table for M16C Tiny Series nnoosssnoennssssssssserrsssssssseeeresssssssseerrssssssseeeeees 85 5 4 Example of Computation Values for M16C Tiny Series cc ccceeeeseecceeeeeeeeeeeeeeeeeeeeeaas 99 5 5 Error Message Tanle for H8 SLP Sets ecscsniecciiniieii nsnsi 106 5 6 Example of Computation Values for H8 SLP Series cccsssesseeeceeceeeeeeeeeeeeeeeeeeeeaas 111 Appendix A Related Documents for R8C essesssseoeessssssssserresssssssceerrssssssscererssssssseeeersssssssseeeressssseees 119 Appendix B Related Documents Tor MOC wcceieaosdnaneccatuswncsiasindcretuawensnahagdensidexqurds Eea aE ea Ea 122 Appendix C Related Documents for H8 SLP for 38347 Group sseesssssssssseerssssssssseerrsssssssserersssssssses 123 Appendix D Other Related DOCUMCMS sisaseccisacscneseerrenaitonsdgaveseicadeen sass essawendoeesdsaceessendeieotesieeeanwsadveosiuaa
65. IGA CMP Value Priority Level Port 1 De activate A Output Output L A 6 Dec E eH s E Activate Output H Po Operation Mode TRCIOB Match Output TRCIO Initial Qutput TRCIOB CMP Value port 4 i p ele P i Enable TROIOA Interrupt Port 5 Output Compe Toggle Output 20000 Dec M Enable TRCIOB Interrupt Fort 6 Output H F s Enable TRCIOc Interru Port 7 Count Source TRIOC Match Output TRO Initial Qutput TRC CMP Value a Port amp F Outout L Enable TROMD Interrupt Port 9 Divide by g YH Output B 30000 ka Dec INT oO fe tput H INT 1 TRCIOc Pin at TRCIOD Match Output TRCIOD Initial Qutput TRCIOD CMP Value Dec l Mot Used INT 3 co C Timer RA Eo TRCIOL Pin at TRCTRG Trigger TRO Counter Clear Digital Fitter Clock Timer RB e Disable C Disable Clear t Clear at Match Timer RD Timer FE Timer RF se INT 1 INT 2 INT 3S Key input interrupt Timer RA Timer FO Timer RE Time 4 Comment toa_trecri 1 UTREDA initial output H selecteditrecri bit 0 tob_trecr1 1 ATRCIOB initial output H selecteditrocri bit 1 E toc_trocr1 1 ATR initial output H selecteditrocri bit 2 7 clr _trecr 1 ATR counter cleard at compare match with TROGRA register trccr bit 7 mettro 1 pyvme_tromr 1 pmb _tromr 0 pyyvine_ Output compare function selected mstcr bit 5 tromr bt 0 1 2 and 3 a tekO_trecr 1 tock _troord 1 tck2_trecr1 0 Mount source 13 selected trecr bt 4 5
66. IS basis software lt No support will be provided for this software The user assumes the entire risk of using the product E kaa i a a a o a a aa a a a HRA a a a aa a eA a a aa a A AAA a a a a o a a a a a a a word inittvoids oraqma INTERRUPT dnto_int oragqma INTERRUPT inti_int oraqma INTERRUPT keyin_int woid intalinttvoid vod intlointtyvoid YOid keyin_int yvoid Figure 4 6 Sample output of Config h iodefine h Notepad File Edit Format View Help ff System Name H amp SLP lOVVWizard Generated Code File Name iodefine h H VWersian 1 01 Release OU ff Contents Definition of KO Register for Ho aos4 Group ff CPU HevS034 Group Toolchain H8S HE00 Standard Toolchain ff Programmer 0O Wizard a a a a a a aa ff ff Copyright 2007 Renesas system Solutions Asia Pte Ltd ff Disclaimer 10O Wizard is a free of charge and AS IS basis sofware ff Mo support will be provided for this software The user assumes the entire risk of using the product ff gf EEE Pas Ge SUPE esha gu ni ro ie on SE asses Pau 7p ERG HPSS SESE aad a iA i Hoya0347 Series Include File r S struct st_flash f struct FLASH union FLMICR1 r unsigned char BYTE Byte Access f Figure 4 7 Sample output of iodefine h 69 CENESAS Section 5 Error Messages 5 1 Error Report The Error Report window provides a form of look up table for user to identify the error occurre
67. NT 2 INT 3S Key inputinterrupt Timer x Tit 4 Timer value for timer mode or half period timing for pulse output mode txmod0 0 txmod Timer modectxmr bit 0 and 13 txckO0 0 teck1 0 count source t1 tess bit 0 and 1 CPU Clock On chip oscillatoridetautt Frequency Value 0 125 MHz aa CPU Clock Division Divide by amp Cdetautt Figure 3 21 Timer Window E Each timer has its individual window for various setting like operation mode and count source E User is allowed to de activate or activate timer settings All settings are disabled when De activate radiobutton is selected To enable the settings click on Activate radio button E Following timers and operation modes are supported 1 Timer X R8C 10 11 12 13 1A and 1B Timer mode Pulse output mode Event counter mode Pulse width measurement mode Pulse period measurement mode 2 Timer Y R8C 10 11 12 and 13 Timer mode Programmable waveform generation mode 3 Timer Z R8C 10 11 12 13 1A and 1B Timer mode Programmable waveform generation mode 28 tENESAS Programmable one shot generation mode Programmable wait one shot generation mode 4 Timer C R8C 10 11 12 13 1A and 1B Input capture mode Output Compare mode 5 Timer RA R8C 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2H 2J 2K 2L 32A 33A and 35A Timer mode Pulse output mode Event counter mode Pulse width measurement mode Pulse period measurement mod
68. Timer A3 Timer value Value entered is below minimum value at Timer A3 One shot Timer Value Value entered is below minimum value at Timer A3 Count Value Value entered is below minimum value at Timer A3 16 bit H width Value entered is below minimum value at Timer A3 8 bit H width Value entered exceeded maximum value at Timer A3 Timer Value Value entered exceeded maximum value at Timer A3 One shot Timer Value Value entered exceeded maximum value at Timer A3 Count Value Value entered exceeded maximum value at Timer A3 16 bit H width Value entered exceeded maximum value at Timer A3 8 bit H width Invalid value entered at Timer A4 Timer Value Invalid value entered at Timer A4 One shot Timer Value CENESAS Formula Timer Value entered TA3 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Minimum acceptable value is 0 TA3 valid range 0 65535 Formula 16 bit H width value entered TA3 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Formula 8 bit H width value entered n x m 1 x Internal Coun
69. Usage Duty SelectionsCommoan Function ae 14 duty COMAto COMI 1 4 duty COM4 to COM a O vies vf LOD Drive Power fe On segment Driver L 5EG 5EG40 1 Display Function w On C ot Frame Freg Select Display Data Control Mo division Subclock i Fahd f Blank Charge discharge Pulse Cycle Duty Drive Waveform at ieee cycle Fix hi A waveform ee gh C B waveform se Timer F Timer G SEC Pabi SCH Soi 5032 ADC LED Parameter LEDLER BIT PSvv 1 ALCO drive power on selected icr bib LCD LCR BIT ACT 1 ALCD cortroller driver operates selected icr bitS LOD LCR BIT DISP 1 WDisplay data control with RAM selected icr bitt LCD LCR2 BIT LOCDAB 0 A waveform selected icr2 bit LOD LPCR BIT DTS 3 LCD LPCR BIT CMx 0 fOuty cycle 4 duty common driver COM4 to COM pcr bitS LCD LPCR BIT SGS 8 LCD LPCR BIT SGX 0 SEGMENT SEG40 1 Clpcr bit0 4 LCD LCR BIT CKS 0 Ao division Subclock hor bit0 3 LOD LOR2 BIT cCDOS 0 itChargefdischarge Pulse Cycle 1 duty cycle Fix high cerz bit0 3 System Clack 5 MHz uUb clock 32 768 KHz ce CPU Clock System Clock Figure 3 51 LCD Window E User is allowed to choose to use LCD settings All settings are disabled when No radiobutton is selected To enable the settings click on Yes radio button E User is able to do settings like selecting LCD Drive Power Display Function Display Data Control Drive Waveform Duty Selection Common Function
70. Valid range 1 65536 value at DMA1 Transfer Count Formula TCR1 Transfer Count value entered 1 135 Value entered exceeded maximum Valid range 00000h FFFFFh value at DMA1 Source Address Pointer 136 Value entered exceeded maximum Valid range 00000h FFFFFh value at DMA1 Destination Address Pointer 137 Invalid value entered at UARTO Formula Transfer Clock Period uObrg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation 96 CENESAS 138 Invalid value entered at UARTO Baud Formula Rate 139 Invalid value entered at UARTO Transmit Data 140 Value entered is below minimum value at UARTO Transfer Clock Period 141 Value entered is below minimum value at UARTO Baud Rate 142 Value entered exceeded maximum value at UARTO Transfer Clock Period 143 Value entered exceeded maximum value at UARTO Baud Rate 144 Invalid value entered at UART1 Transfer Clock Period uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Enter 7 9 bits transmission data Example 1111000 is 7 bits 01001111 is 8 bits 100001111 is 9 bits Formula uObrg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfe
71. _cOconr U megorder cOcth 0 hasiccan_cOcth 0 reset_cOctlr 1 porten_cOcth 1 loopback _cUctlr 0 prcO 1 cclkO 0 clk1 0 cclk2 0 proo 0 bre cOconr 0 teprescale_cOcthr 0 pts _cOconr 0 nhet ieee 4 CPU Clock On chip ascillator detaut CPU Clock Division Divided by 8idetault ADC 4 F Comment MListen only mode is not used icOctlr bit 13 fone time sampling selected cOconr bit 4 Word access selected cUctlr bit 2 iMormal operation mode selected cOctlr bit 3 iMormal operation mode selected cOctl bit 1 fio division selected prer bit 0 cclkr bit 0 2 Divide by 1 of CAN selectedicOconr bit 0 3 Period of 1 bit time selected cUctlh bit amp and 9 MPTS 17Tq selectedicOconr bit 5 7 NOR Ta sealastair ht A ii gt kea Frequency Value 1MHz figure 339 CAN Window E CAN window is available in M16C 29 only User is allowed to de activate or activate CAN settings All settings are disabled when De activate radiobutton is selected To enable the settings click on Activate radio button E User is able to do settings like enabling Listen only Mode Basic CAN Loop Back Mode Enable etc 50 3 4 10 ADC Window 1 2 3 4 5 6 7 8 w IO Wizard Si Eg Key input interrupt Lsage Resolution Clock Source Timer 40 ee Timer 41 C De activate f S bit mode No division Timer 42 Timer 43 Activate 10 bit mode Timer 4 AD Sweep Pin Timer BO Timer BA AD Input Group AD Con
72. a DTT Dead Time value entered x System Clock Example to calculate value of DTT Desired dead time value entered 0 01ms Based on the formula above if main clock is chosen and Internal clock source is divide by 2 DTT Dead Time value entered x System Clock DTT 0 0ims x 20MHz DTT 200 CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Formula Triangular Modulation Mode TA1 System Clock x V phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA1 System Clock x V phase PWM Duty Cycle value entered Example to calculate value of TA1 in Triangular Modulation Mode Desired V phase PWM Duty Cycle value entered 2ms Based on the formula above if main clock is chosen TA1 System Clock x V phase PWM Duty Cycle value entered 2 TA1 20MHz x 2ms 2 TA1 20000 Example to calculate value of TA1 in Sawtooth Modulation Mode Desired V phase PWM Duty Cycle value entered 2ms Based on the formula above if main clock is chosen TA1 System Clock x V phase PWM Duty Cycle value entered TA1 20MHz x 2ms TA1 40000 102 3 phase Motor Control Timer W phase PWM Duty Cycle 3 phase Motor Control Timer U phase PWM Duty Cycle RENESAS CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Formula Triangular Modulation Mode TA2 System Clock x W phase PWM Duty
73. alling edge sensing for pin WWE PSCywegpr bit 5 Falling edge sensing for pin VWWAPECyedgr bit 6 AF alling edge sensing for pin WWE PY ower bit 7 system Clack 5 MHz SuUb clack 32 768 KHz oe awe CPU Clock System Clock Figure 3 44 WKP Window User is able to do settings like Interrupt Enable and trigger edge E Generate interrupt function declaration and empty function body Refer to section 4 for details on code generation 55 3 5 5 Timer Window Fe 10 Wizard Operation Mode Timer Value L Interval timer T Ins Prescaler 5 select Prescaler YY select Divide by 8192 P10 PO Pin io System clack output select Subclock output select e WMormal O Ports Port Port Pot Fot 9S Pot 4 R WEF Timer 4 Timer 4 Parameter IO PMP BIT Thovy 0 HDizable pin TMOVY output function from Timer amp selected pmr bit 0 THIRA THA BIT CKSI 0 MPrescaler S phise 92 tma bit0 3 Overtloy times 419 43ms system Clack 5 MHz Ub cClock 32 765 KAZ ae CPU Clock System Clock Figure 3 45 Timer Window mE Fach timer has its individual window for various setting like operation mode and count source User is allowed to choose to use Timer settings All settings are disabled when No radiobutton is selected To enable the settings click on Yes radio button The following timers and operation modes are supported 1 Timer A supports 4 different ope
74. and 6 ea _trooer 0 joa _trciorO 0 joa trceiorQ 0 joal tt ATRCIOA output H at compare matchttrcoer bit 0 trciorO bit 0 1 and 2 eb trooer 0 job trcior0 0 jobO_ trcior0 1 job1 t ATRCMOB output toggled at compare matchttrcoer bit 1 trcior0 bit 4 5 and E ec _treoer 0 joc treiord 0 jocO_treiord 0 joct tt ATRCWOC output H at compare matchttrcoer bit 2 trciord bit 0 1 and 24 ard tronar d HTEO met aoea fee coded ome ara tranar hi lt Mm gt CPU Clock Main clock in s out Frequency Walue 16 MHz CPU Clock Division Divide by 8idetautt Back Ms ock Division vide by S detautt Figure 3 13 Save button in Peripheral Setting Window User can click lt Save gt button to save all current settings made This includes those settings made in the Main Window A Save As dialog as shown below will pop out to prompt user to save their settings made into a file filename iow for loading in future sessions The iow file can be saved into user desired folder directory Save setting iow File name Saved etting iow save as type lO wizard File icwy bd Cancel Figure3 14 Save As dialog 2 23 Load Setting l0 Wizard Clock Frequency Main Clack Drive Capacity ae CPU Clock u EN ESAS C On chip ozcilatoridetaut Frequency Value ee tain clack Xin xout ied Series RECT iny Series l High speed on chip oo ne Hight detautt C Sub clack Xcin xicouty Group REC2D Group CPU Clock
75. ardware in an online lab to experiment with R8C chip or M16C at no cost url http AWwww renesasinteractive com 124 IO Wizard 2CENESAS Renesas Technology Singapore Pte Ltd
76. arn hAON lt i amp PU Clock On chip oscillatoridetaut Frequency Value 0 125 MHz oni _ CPU Clock Division Divide by 3 default hl Figure 3 6 Code highlighted in red When user inputs an incorrect setting at combo editbox source code shown on the status window will be instantly highlighted in red This error indicator draws user s immediate attention to input the correct setting Note The source code will also be highlighted in red when user made a particular setting whereby the calculated peripheral counter register value is out of range Back Generate Click to go back MCU Clock selection Figure 3 7 Back button User can click lt Back gt button to return to IO Wizard system setting main window to change CPU clock source But please take note of the below precaution before clicking the back button to amend the CPU clock source setting A Precaution All peripheral functions setting will be re initialized to default whenever the CPU clock source is changed This is to ensure correct calculation is being carried out and right counter register values are set for peripheral operations A warning dialog as shown in Figure 3 8 will appear when user clicks the lt Back gt button 18 l0 Wizard Fin Fin Status Drive Capacity Pind Input Pint Input Pinz Input Pins Input key input interrupt Pir Timer Timer Pins Input Timer Z Input Warning Dialog S She Tew n ele C E AE E E
77. ation Enter one shot timer value for Timer A2 Formula One shot Timer Value entered TA2 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Enter count value for Timer A2 TA2 valid range 0 65535 Enter value for Timer A2 Formula 16 bit H width value entered TA2 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Enter value for Timer A2 Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA2 register high order address m value of TA2 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Formula Timer Value entered TA2 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA2 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Minimum acceptable value is 0 TA2 valid range 0 65535 Formula 16 bit H width value entered TA2 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation 88 40 41 42 43 44 45 46 47 48 49 50 sQENESAS Value entered is
78. b clock divide 32 Formula One shot Timer Value entered TAi x Internal Count Source System Clock Example to calculate value of TAI Desired one shot timer value entered 1ms Based on the formula above if main clock is chosen and Internal clock source is divide by 2 One shot Timer Value entered TAi x Internal Count Source System Clock ims TAIi x 2 20MHz ims TAix 100ns TAi 1ms 100ns TAi 10000 03 Timer Ai 16 bit H width CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Internal Count Source No division Divide by 2 Divide by 8 Divide by 32 Sub clock divide 32 Formula 16 bit H width value entered TAi x Internal Count Source System Clock Example to calculate value of TAi Desired H width value entered 1ms Based on the formula above if main clock is chosen and Internal clock source is divide by 2 16 bit H width value entered TAi x Internal Count Source System Clock ims TAIi x 2 20MHz ims TAix 100ns TAi 1ms 100ns TAi 10000 100 04 05 Timer Ai 8 bit H width Timer Bi Timer Value RENESAS CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Internal Count Source No division Divide by 2 Divide by 8 Divide by 32 Sub clock divide 32 Formula 8 bit H width value entered n x m 1 x In
79. below minimum value at Timer RC PWM Period 151 Value entered is exceed maximum value at Timer RC PWM Period 152 Invalid value entered at Timer RC TRCIOB Inactive Width 153 Value entered is below minimum value at Timer RC TRCIOB Inactive Width 154 Value entered exceeded maximum value at Timer RC TRCIOB Inactive Width tENESAS Valid Range Compare 0 Value lt Value lt 65535 Valid Range Compare 0 Value lt Value lt 65535 Valid Range Compare 0 Value lt Value lt 65535 Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Enter 0 65535 only Formula trcgra 1 PWM Period x Frequency of Count Source Refer to no 102 example calculation Similar as Timer RD CHO PWM Period Formula trcgra 1 PWM Period x Frequency of Count Source Formula trcgra 1 PWM Period x Frequency of Count Source Formula trcgrb 1 Inactive Level Width x Frequency of Count Source Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO Formula trcgro 1 Inactive Level Width x Frequency of Count Source Formula trcgrb 1 Inactive Level Width x Frequency of Count Source 83 155 Invalid value entered at Timer RC TRCIOC Inactive Width 156 Value entered is below minimum value at Timer RC TRCIOC Inactive Width
80. bit 2 basiccan_cOctr 1 Basic CAN mode selected cOctir bit 3 reset_cOctlr 1 porten_cOctlr 1 loopback cOcthr 0 Normal operation mode selected icOctlr bit 13 prcO 1 cclkO 0 colk1 0 cclk2 0 proo 0 iho division selected prer bit 0 cclkr bit 0 2 brp_cOconr 0 Divide by 1 of CAN selected cOconr bit 0 3 teprescale_cOctlr 0 Period of 1 bit time s lectedicUctl bit 6 and 9 gts cOconr 0 APTS 1Tq selected cOconr bit 5 7 nhet eNennr d UDATA coloctodf enaner ht BOA lt il amp m ADC 4 hal CPU Clock On chip o cillator detaut Frequency Value 0 125 MHz CPU Clock Division Divide by amp detautt Figure 3 23 CAN Window E User is allowed to de activate or activate CAN settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button E User is able to do settings like CAN clock sampling control and message order 32 3 3 7 ADC Window 0 Wizard Usage Clock Source 0 De activate Operating clock No division C Operating clock divide by 2 Activate Operating clock divide by 4 Analog Input Pin Key input interrupt AN2 Timer Timer Y 0 8 bit mode Timer Z 40 bit mode Timer LISRT O UART 1 AMD Operating Mode AMD Conversion Method One shot f Without sample and hold Repeat f Yvith sample and hold Timer Timer Y Timer Timer UART O UART 1 ADC ma 0 fOne shot mode selectediadcond bit 3
81. ck Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA2 register high order address m value of TA2 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Enter value for Timer A3 Formula Timer Value entered TA3 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Enter one shot timer value for Timer A3 Formula One shot Timer Value entered TA3 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Enter count value for Timer A3 TAS valid range 0 65535 Enter value for Timer A3 Formula 16 bit H width value entered TA3 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Enter value for Timer A3 Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA3 register high order address m value of TA3 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation 89 51 52 53 54 55 56 57 58 59 60 61 62 Value entered is below minimum value at
82. ck period entered 2 Initial Seconds valid range 00 59 Initial Minutes valid range 00 59 Initial Hour valid range 0 11 for 12 hour mode 0 23 for 24 hour mode Compare Data valid range OOh FFh Initial Seconds valid range 00 59 Initial Minutes valid range 00 59 Initial Hour valid range 0 11 for 12 hour mode 0 23 for 24 hour mode Compare Data valid range 0O FFh Baud Rate valid range 7200bps 20000bps Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to no 27 example calculation Similar as UART 0 Baud Rate 77 76 7 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 Value entered is below minimum value at LIN Baud Rate Value entered exceeded maximum value at LIN Baud Rate Invalid value entered at Timer RD CHO Match Count TRDIOAO Value entered is below minimum value at Timer RD CHO Match Count TRDIOAO Value entered exceeded maximum value at Timer RD CHO Match Count TRDIOAO Invalid value entered at Timer RD CHO Match Count TRDIOBO Value entered is below minimum value at Timer RD CHO Match Count TRDIOBO Value entered exceeded maximum value at Timer RD CHO Match Count TRDIOBO Invalid value entered at Timer RD CHO Match Count TRDIOCO Value entered is below minimum value at Timer RD CHO Match Count TRDIOCO Value entered exceeded maximum value at Timer RD
83. d It reflects exactly which setting box is incorrectly set An error number is being assigned to each error message and brief help is provided to assist user to input the correct setting Error Report Help Please refer to user s manual for details Invalid value entered at Timer PRES Value Enter value for PRES PRES valid range 0 255 Value entered is below minimum value at Tim PREY 249 Formula Timer Value entered PREY 1 x TYPR 11 x interns Value entered exceeded maximum value at U Formula u brg 1 i System ClockORG Clock Select Ix Transfer Invalid value entered at UART O Transmit Data Enter 7 9 bits transmission data Example 1111000 is 7 bits 01001117 it 6 bits 100001111 i 9 bits Figure 5 1 Error Report Window 70 CENESAS 5 2 Error Message Table for R8C Tiny Series No 01 02 03 04 05 06 When an error occurs user should look up the error code number and error description listed in the error report window from the Error Message table below When in doubt refer to the table below for additional notes and advice to input the correct setting Error Message Invalid value entered at Timer X Timer Value Invalid value entered at Timer X PREX Invalid value entered at Timer X TX Value entered exceeded maximum value at Timer X PREX Value entered exceeded maximum value at Timer X TX Invalid value entered at Timer Y Timer Value Notes and
84. d that Renesas Technology Corp neither warrants nor grants licenses of any rights to the patents copyrights trademarks or other intellectual property rights owned by Renesas Technology Corp or any third party for the use of the PRODUCT unless otherwise expressly granted to you by Renesas Technology Corp in a contract or other document including without limitation any warranty or license included in the user s manual for the PRODUCT hereinafter referred to as CONTRACTS Please be further advised that Renesas Technology Corp bears no accept the terms of the license agreement Print do not accept the terms of the license agreement InstallShield lt Back new Figure 2 3 License Agreement Screen E Choose I accept the terms of the license agreement and click next to proceed with the installation 10 CENESAS The following dialog box then allows you to select a directory in which to install IO Wizard a 10 Wizard V 1 00 Release 03 InstallShield Wizard Choose Destination Location Select folder where setup will install files Installshield Figure 2 4 Select Destination Directory Screen E Click OK to install into the default directory C Program Files Renesas IO Wizard or specify an alternative directory and click next lO Wizard V 1 00 Release 03 InstallShield Wizard Ready to Install the Program The wizard is ready to begin installation Click Install
85. data Example 1111000 is 7 bits 01001111 is 8 bits and 100001111 is 9 bits Formula uObrg 1 System Clock BRG Clock Select x Transfer Clock period entered 2 Refer to no 26 example calculation Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Formula uObrg 1 System Clock BRG Clock Select x Transfer Clock period entered 2 Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Enter 7 9 bits transmission data Example 1111000 is 7 bits 01001111 is 8 bits and 100001111 is 9 bits Formula ulbrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to no 27 example calculation Similar as UART 0 Baud Rate Formula ulbrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Enter value in the range of 0000h FFFFh Enter value in the range of 0000h FFFFh TMO valid range OOOOh FFFFh 75 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 95 56 Value entered is below minimum value at Timer C Compare Match Count Value entered exceeded maximum value at Timer C Compare Match Count Value entered exceeded maximum value at Timer C Compare Match Count Invalid value entered at SSU SSU Transmit Data Invalid value entered at SSU I2C Transmit Data Invalid value entered
86. dl OxFoO drr 0xF0 putZ 1 pu03 1 LS FEREREEEEEEEEREEEREEEKEEEEEREEEREEEEEE if INTO Interrupt Setting LL EREREEEREEEREKEEEEEEEREKREEREEREREREEEE ffNote Set INTO hardware interrupt pins intOic 0x07 intOen 0x00 intOpl 0x01 intOfO 0x00 intOfl 0x0l1 Lf FERRET EEEEKEREEEEEEEEKEEEREEEEREEEERE if INT1 Interrupt Setting LL TERETE EKEEKEEKEERREEREERERREREEEEEEE f Note f Note Set INT1 hardware interrupt pins Edge trigger selection r0edg is fEnable write to PDO ff Port PO direction register ff Pull ups for POO POS on ff Pull ups for PO4 PO on ff Port Pl direction register ff Port Pl drive capacity control register ff Pull ups for P10 P13 on ff Pull ups for Pl4 P17 on to input ff Set interrupt piority level and active edgefintOic ffInput enable disabled inten bit 0 fBoth edges selected inten bit 1 ffFilter with 8 sampling selected intOf bit O and 1 to input linked to Timer X pulse output mode f fNote The edge polarity is selected with the ROEDG bit in the TXMR register Selection avaliable in Timer X dialog intlic 0x06 Lf FERRER EEEEEREREREREEEREREEEREEERERERER ff Key Input Interrupt Setting LF FERRER EEEEEEREREREEEEEKEREEEEEEEKERERE f Note kupic 0x05 kien 0xlzZ Set key input hardware interrupt ffInterrupt piority level 6 selected intlic bit 0 3 pins to input ffInterrupt piority level 5 selected kupic bit 0 3 ff Set key input enable and input polarity
87. e 6 Timer RB R8C 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2H 2J 2K 2L 32A 33A and 35A Timer mode Programmable waveform generation mode Programmable one shot generation mode Programmable wait one shot generation mode 7 Timer RC R8C 26 27 28 29 2A 2B 2C 2D 2E 2F 2K 2L 32A 33A and 35A Input capture function timer mode Output compare function timer mode PWM mode PWM2 mode 8 Timer RD R8C 22 23 24 25 2A 2B 2C 2D 2K 2L and 35A Input capture function timer mode Output compare function timer mode PWM mode Reset synchronous PWM mode Complementary PWM mode PWM3 mode 9 Timer RE R8C 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2H 32A 33A and 35A Real time clock mode Output compare mode 10 Timer RF R8C 2A 2B 2C 2D 2G 2H and 2J Input capture mode Output compare mode For each operation mode the related function settings are supported while the unrelated setting are disabled E User is allowed to enter timings and compare data in edit field or select them from combobox dropdown list Calculated value for register setting is being round to the nearest whole number 29 l0 Wizard Key input interrupt Timer 3 Timer Y Timer 2 3 3 5 Serial I O Window General Setting Serial Interface Mode Clock Synchronou Input alue Transfer Clock Period 20 US Baud Rate bpa Clock Select Internal External BRIG Clock Select No division
88. e displayed when user selects a part no from R8C 12 R8C 13 R8C 1B R8C 23 R8C 25 R8C 27 R8C 29 R8C 2B R8C 2D R8C 2F R8C 2D R8C 2F R8C 2L R8C 32A R8C 33A R8C 35A M16C 26A M16C 28 or M16C 29 E User inputs the device selection system setting and peripheral operation setting through IO setting area 15 tENESAS ect Click to setup other Peripherals Figure 3 3 Next button shown in Figure 3 2 Click the lt Next gt button to proceed to the next window Settings made in the window will be saved Peripheral Selection List Combobox Combo Editbox amp 10 Wizard Clock Select Parity Select Internal 414444114 bits Radiobutton g g BRE ea EE Transmit Format Tooltip Mo division Don Divide by 8 C N channel open C Divide by 32 MSB first Serial Data Output cz tput pin selection Input walue Operation 1O Stop Bit z i A Transfer Clack Period f 4 stop bit Transmitter Setting a us C 2 stop bits Paraire Receiver Setting Area Baud Rate Parity Bit Enable CLK Polarity SUDDESEIVG Mecaz F 7200 bps Mo Yes ie a Peripheral IMT 3 Key input interrupt Timer Timer r Timer Tiner UAT O UART 4 Tab Bar ckdir_uOmr 0 internal clock enabled udmr bit 3 clkO_uwOcO 0 clk uwoco 0 M1510 js selected udco bit 0 and 1 stps_u0mr 0 MA stop bit selected uOmr bit 4 prye_UOmr 0 Parity disabled uOmr bit 6 Uform wocO 1 MSE first udcd bit 7 te _uwO0e1 1
89. e System Clock Formula timer value entered tropre 1 x tropr 1 x Internal Count Source System Clock Formula timer value entered tropre 1 x trosc 1 x Internal Count Source System Clock Formula timer value entered tropre 1 x tropr 1 x Internal Count Source System Clock Formula timer value entered tropre 1 x trosc 1 x Internal Count Source System Clock Invalid value entered at UART1 Transfer Formula Clock Period Value entered is below minimum value at UART1 Transfer Clock Period Value entered exceeded maximum value at UART1 Transfer Clock Period Invalid value entered at Timer RE Initial Seconds Invalid value entered at Timer RE Initial Minutes Invalid value entered at Timer RE Initial Hour Invalid value entered at Timer RE Compare Data Value entered exceeded maximum value at Timer RE Initial Seconds Value entered exceeded maximum value at Timer RE Initial Minutes Value entered exceeded maximum value at Timer RE Initial Hour Value entered exceeded maximum value at Timer RE Compare Data Invalid value entered at LIN Baud Rate ulbrg 1 System Clock BRG Clock Select x Transfer Clock period entered 2 Refer to no 26 example calculation Similar as UART 0 Transfer Clock Period Formula ulbrg 1 System Clock BRG Clock Select x Transfer Clock period entered 2 ee een Clock BRG Clock Select x Transfer Clo
90. e for SCI31 calculation Enter value for Bit Rate Valid range of SCI31 BRR is 0 255 Formula SCI31 BRR Oscillator Clock 8 x M x Baud Rate 1 Refer to Section 5 6 Table list no 14 for example of bit rate value for SCI31 calculation Enter value for Bit Rate Valid range of SCI31 BRR is 0 255 Formula SCI31 BRR Oscillator Clock 8 x M x Baud Rate 1 Refer to Section 5 6 Table list no 14 for example of bit rate value for SCI31 calculation 109 28 29 30 31 32 33 34 35 Invalid value entered at SCI31 Bit Rate Value entered is below minimum value at SCI31 Bit Rate Value entered exceeded maximum value at SCI31 Bit Rate Invalid value entered at SCI82 Bit Rate Value entered is below minimum value at SCI32 Bit Rate Value entered exceeded maximum value at SCI32 Bit Rate Invalid value entered at SCI82 Bit Rate Value entered is below minimum value at SCI32 Bit Rate CENESAS Enter value of Bit Rate for SCI31 Formula SCI31 BRR Oscillator Clock 64 x M x Bit Rate 1 Refer to Section 5 6 Table list no 15 for example of bit rate value for SCI31 calculation Enter value for Bit Rate Valid range of SCI31 BRR is 0 255 Formula SCI31 BRR Oscillator Clock 64 x M x Bit Rate 1 Refer to Section 5 6 Table list no 15 for example of bit rate value for SCI31 calculation Enter value for Bit Rate Valid range of SCI31 BRR is 0 255 Formula SCI3
91. ead Time Setting 114 Value entered is below minimum value at Timer RD Set PWM Period CENESAS Formula For Reset Syn PWM mode trdgrb0 1 PWM1 Changing Point x Frequency of Count Source For Complementary PWM mode trdgrb0 1 PWM1 Changing Point x Frequency of Count Source 2 Example to calculate value of trdgrb0 for Reset Syn PWM mode Desired Changing Point entered 0 1ms Based on the formula above if Main Clock 20MHz is chosen and Internal clock source is divide by 8 trdgro0 1 Changing Point entered x Frequency of Count Source trdgro0 1 0 1ms x 20MHZz 8 trdgrb0 1 0 1ms x 2500000 trdgrb0 1 250 trdgrbO 250 1 Therefore trdgrbO 249 Example to calculate value of trdgrb0 for Complementary PWM mode Desired Changing Point entered 0 1ms Based on the formula above if Main Clock 20MHz is chosen and Internal clock source is divide by 8 trdgrb0 1 Changing Point entered x Frequency of Count Source 2 trdgrb0 1 0 1ms x 20MHZz 8 2 trdgro0 1 0 1ms x 2500000 2 trdgrb0 1 250 2 trdgrbO 125 1 Therefore trdgrbO 124 Formula For Reset Syn PWM mode trdgra1 1 PWM2 Changing Point x Frequency of Count Source For Complementary PWM mode trdgra1 1 PWM2 Changing Point x Frequency of Count Source 2 Refer to no 110 example calculation Similar as Timer RD PWM1 Changing Point Formula For Reset Syn PWM mode trdgro1 1 PWM3 Changing Point x Frequency of Count So
92. ecified folder option and the Link to HEW option The Link to HEW option allows user to export the generated source codes into HEW The prerequisite for this option to work is that HEW 4 02 or above and HEW Target Server COM has already been installed Below are the steps required to install HEW Target Server and get it running 1 You will need HEW 4 02 or above installed on your machine If HEW is NOT installed on your machine Please contact a Renesas Sales Representative or Distributor and purchase an RSK Renesas Starter Kit These kits come with all the development tools and an AutoUpdate utility that will update the software shipped with the tool to at least version 4 02 If HEW is already installed on your machine please verify it is version 4 2 or above 2 Preparing to use the HEW Target Server COM Add HEWTargetServer exe to your computers registry gt Using Windows Explorer surf to the directory where HEW was installed in most cases this is C Program Files Renesas HEW gt Double click on REGISTERSERVER bat file e HewTargetServer exe will be registered in your computers registry e To remove HewTargetServer exe from the registry double click on the UNREGISTERSERVER bat file located in the same folder E Register the EcxHewTargetServer dll within HEW gt Launch High performance Embedded Workshp e From the Start Menu click on All Programs gt Renesas gt High Performance Embedded Workshop g
93. ed to be 11 5 uObrg value is being round up to 12 If uObrg is calculated to be 11 4 uObrg value is being round down to 11 47 3 4 7 SI O3 and SI O4 Window H 10 Wizard ial im Key input interrupt Timer 40 Usage Clack Select Out Output Enable Timer 41 Timer 42 Timer 43 Tiger ta f Activate f External f Mo Timer BO Timer Bi Transter Clock Period Internal Clock Source Transter Direction Timer BZ Zz Three phase motor control timer 16 bl Pee Mo division LSB first C MSE first C De activate f Internal Yes Transmit Data CLE Polarity o0o00000 bits 0 Falling edge Rising edge 4 Timer S DMAD DMA UART O UART 1 UART2 spo S04 Multimaste 4 am36 1 sm33 1 MAinternal clack selected ssc bit 3 and 6 sma2 0 fSout output enabled sic bit 2 sm35 0 MLSE first selected s3c bit 5 ems4 0 Falling edge selected s3c bit 4 ems30 0 sm31 0 Ainternal synchronous clock f1 ssc bit 0 and 1 s3brq Setting SoS bit rate atrr OB00000000 ifSet transmission datald bits CPU Clock On chip o cillatoridetautt Frequency Value 1MHz ao CPU Clock Division Divided by S detautl Figure 3 37 SI O3 Window SI O3 and SI O4 window is available in M16C 28 and M16C 29 only E SI O3 and SI O4 have similar window The discussion below referring to SI O3 is also applicable to S1 O4 E User is allowed to de activate or activate SI O3 settings All settings are disabled when De activate
94. ed vcaz bit 4 vwici 0 Digital fiter enabled mode is selected vwici bit 1 yw2cl 0 Digital fiter enabled mode is selected vw2cl bit 1 woaz1 1 LCVREF pin input voltage is selected as comparator 41 reference volage wca2 bit 1 yoaz3 1 ALCOVREF pin input voltage is selected as comparator 42 reference vollage wea2 bit 3 weact t yoacz 1 cmZpor 1 Comparator A Compe 4 MBoth edges is 2elected vcac bit 2 Output the inverted comparator 42 comparison result to LYCOUT2 cmpa bit 1 emda Mutant enokhled io salarnrtad remna hr Fi lt Mt gt Back Save kz CPU Clock On chip oscillator detaut Frequency Value 0 125 MHz CPU Clock Division Divide by default Figure 3 28 Comparator A Window for R8C 32A 33A and 35A E User is allowed to de activate or activate Comparator A settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button E Settings are available for Comparator Al and Comparator A2 3 7 w 10 Wizard Port 4 Port 5 Port 6 C De activate INT 0 INT 1 fe Activate INT 2 NOTE INT 3 1 To make INT Input filter selection INT 4 Comparator B1 Operation J To enable INT input Key input interrupt Disable Comparator B1 2 To make INT input polarity selection Timer RA Please make the above selections Timer RB Enable Comparator B1 through INT O INT 3 penpheral Timer RC windows Timer RD Timer RE Comparator B3
95. es 124 tENESAS Section 1 About IO Wizard Renesas is aware that it is necessary for most first time users of our MCU to read the user s manual application notes and technical news in order to proceed with software coding One way to be familiar with any MCU is to study the datasheet and the user manual intensively This actually requires a period of time before the user can embark on the software coding In the light of this learning process IO Wizard an easy to use GUI based standalone software is created specially to expedite the learning curve User can generate start up routines even with limited knowledge of the Renesas MCU IO Wizard serves as a jumpstart for software engineer or student starting Renesas MCU based projects helping them speeds up their software development process Those interested to explore Renesas MCU will also pick up knowledge of the MCU with much ease Best of all IO Wizard is available free for download from the Renesas Web site We encourage user to read through this manual to understand the overall operation of IO Wizard before using the software CENESAS Section 2 Getting Started 2 1 System Requirements IO Wizard requires the following system specification Host Host Machine IBM PC AT compatibles Windows 2000 Windows XP Windows Vista Pentium II 233MHz or higher CPU is recommended 128MB or more system memory is recommended 2 2 Installation 2 2 1 Installation Procedure
96. es supported are 2MWHz SMHz 8MHz E For setting of Frequency Value for Sub clock user is allowed to to make their clock frequency selection from the combobox dropdown list Clock frequencies supported are 32 768KHz and 38 4KHz Click the lt Next gt button to proceed to the Port 1 window 52 3 5 2 Port Window Pin Statue MOS Input Pull Up Input mi Ott f On Input Ott f On Ingut 7 Ott On Input Ott On Input Oo 3 Input Dff On Input Ti Ott On a a on n n O O 7 a a Ott fon c B B 7 Input ft On se Poti Fot 2 Ports Port4 Ports Pot G Port Ports Port 9 Pon A gt Parameter lO PCR 0 00 Port P1 control register IO PUCK B TE 0x00 Port P1 pull up control register System Clack 5 MHz SuUb clock 32 768 KHz ae CPU Clock System Clock Figure 3 42 Port Window Ports have similar windows E User is able to do settings for Pin Status E For Port 1 3 5 and 6 user is also able to do settings for MOS Input Pull Up E For Port 2 user is also able to do settings for Data Output 53 3 5 3 IRQ Window 10 Wizard Port 4 Interrupt Enable Active Edge Port 2 ime Port 3 Mo Yes f Falling Rising Port 4 Ma Yes Falling Rising Port 5 Port 6 Mo Bice Falling Rising Port 7 Port 8 Mo C Yes Falling Rising Port 9 Port A t Mo Yes Falling Rising IR Mo Yes Falling Rising WKP Time
97. eti Sec SCla1 Scla2 AC 4 H IO PMR BIT CK1 1 IO PMR2 BIT 501 1 Transmitter operation selected pmr2 bit amp bitz lO PMR BIT POF 0 WCMOS output selected pmr2 bit 5 SCH SCR BIT MRKONEO SCH SCR BIT SNC 0 Synchronous 8 bits mode selected scri bit5 7 SC SCR BIT CKS 0 Divide by 1024 selected scr1 bit 0 3 Serial Clack Cycle 204 Sus System Clack 5 MHz SuUb clock 32 765 KHz a CPU Clock System Clock Figure 3 48 SCI1 Window E User is allowed to choose to use SCII settings All settings are disabled when No radiobutton is selected To enable the settings click on Yes radio button SCII supports 5 operating modes 1 Synchronous 8 bit mode 2 Synchronous 16 bit mode 3 Synchronized Serial Bus 8 bit mode 4 Synchronized Serial Bus 16 bit mode 5 Continuous clock output For each operation mode the related function settings are supported while the unrelated setting are disabled E Additional information is provided for 5 operating modes Serial Clock Cycle is calculated and displayed on the comment Calculated value is being round to the nearest number with accuracy 0 lus 60 3 5 9 SCI31 and SCI32 Window 10 Wizard Eao Cammunication Made P35 If Pin Multiprocessor Made f TXDS1 output C Synchronous mi kE m Input Value Operation Party Bit Enable Bit Rate f Transmitter i p bps Receiver Bit Rate Tx Format SCI3 1 Parity Mode S000 bps LSB first C MSE firat
98. ication notes and manuals are appended at the end of this manual Article I Article I Section 1 Section 2 2 1 2 2 2 2 1 222 2 29 2 2 4 Section 3 3 1 a2 3 2 1 Dee 3 2 3 3 24 3 3 3 3 1 3 332 3 3 3 3 3 4 3 3 5 3 3 6 3 3 7 3 3 8 3 3 9 3 3 10 3 4 3 4 1 3 4 2 3 4 3 3 4 4 3 4 5 3 4 6 3 4 7 3 4 8 3 4 9 3 4 10 3 5 3 5 1 3 5 2 3 5 3 3 5 4 3 5 5 3 5 6 3 5 7 3 5 8 35 9 3 5 10 Table of Contents Wa Or C On AG ass ec sens ce nsec ss cee denne clonss ace sae E 6 ADDOLI Wy a a E E E A EAEE E EA 8 OC A SCI E E A E EA aon diasece 9 oR CC MRC E een a A E E E 9 AET E a PE EAE EE EE S A E O SEE 9 Installation Procedures cccccecccecceeccesccsscceccesccesccuscesceccenccesccesseusceecsesscesscescesccesccesceussees 9 Marple BIS PAE TOs csrtren cess E E E E E N 13 B T I EE E E ENN OA E SOENE E N AOE O ES EAE ET TE 13 ION aT O O EE E EA EA EEEE 13 OPa T E e E E EE 14 Koa TON a E A E E A EE S newt isaseeuee 14 Features ot LO Wizard WindoW aoe cases sawnancsacecancesuevencnacedamesasenaseraseaenascueuesaneeacesnaconaeeneens 15 GULE OYT ON E e E A 15 EAE e e e e a PEET E T EE E ESE E 19 En CO TW erae E AE AE AE ET AEO AE E AAE 20 SR E O12 6 EE A N SE ANE A NIAE AEE N ENE AA 23 Outline of RSC Tiny Series Window scesecerssevecrsscivaceusvevedandennadedewensutedeacecenewssiedasdanvesiedenacsandanes 23 Y N O A E wri ore ore tr errr aanre tree cere eer 29 POE IN 1016 8 ee EE E TEE EEE 26 WEA U eA AAE EA E E A
99. id range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh 78 Invalid value entered at Timer RD CH1 Match Count TRDIOC1 96 Value entered is below minimum value at Timer RD CH1 Match Count TRDIOC1 97 Value entered exceeded maximum value at Timer RD CH1 Match Count TRDIOC1 98 Invalid value entered at Timer RD CH1 Match Count TRDIOD1 99 Value entered is below minimum value at Timer RD CH1 Match Count TRDIOD1 100 Value entered exceeded maximum value at Timer RD CH1 Match Count TRDIOD1 101 102 Value entered is below minimum value at Timer RD CHO PWM Period 103 Value entered is below minimum value at Timer RD CH1 PWM Period CENESAS Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Match Count valid range OOOOh FFFFh Formula For PWM and Reset Syn PWM mode trdgra0 1 CHO PWM Period x Frequency of Count Source For Complementary PWM mode trdgra0 2 CHO PWM Period x Frequency of Count Source 2 Dead Time Example to calculate value of trdgra0 for PWM and Reset Syn PWM mode Desired PWM period entered 1ms Based on the formula above if Main Clock 20MHz i
100. if SCI31 BRR is calculated to be 11 5 SCI31 BRR value is being round up to 12 If SCI31 BRR is calculated to be 11 4 SCI31 BRR value is being round down to 11 3 5 10 ADC Window fs 10 Wizard BE X Usage AD Conversion Speed C No Divide by 62 Yes Divide by 31 External Trigger Analog Input Pin Disable ANO defautt se Timer Timer F Timer G AEC Pati Sch SCI31 5Ci2 ape LEC 4 AD AMP BIT CK S 0 HAD conversion speediamr bit 7 Conversion Times 12 4us IO PMFA BIT JRG4 0 AD AMR BIT TRGE 0 HEsternal trigger disabletpmr bit 4 amr bith AD AMR BIT CH 4 Analog input pin SAO pin Came bt0 35 System Clack 5 MHz Ub Clack a2 bo KHZ ce CPU Clock System Clock Figure 3 50 ADC Window E User is allowed to choose to use ADC settings All settings are disabled when No radiobutton is selected To enable the settings click on Yes radio button E User is able to do settings like selecting A D Conversion Speed Analog Input Pin and External Trigger Additional information is provided for A D Conversion Speed Conversion times is calculated and displayed on comment Calculated value is being round to the nearest number with accuracy 0 lus If the Conversion times faster than the minimum conversion times warning message is displayed Do not ignore the warning message User should use the conversion times that in the supported range in order to get accurate ADC value 62 3 5 11 LCD Window
101. iler for R8C Tiny Series or Renesas M3T NC30WA to compile the program code Contact your nearest Renesas sales offices to request for this free version software 4 2 Config c Config h and Iodefine h Figure 4 2 to figure 4 5 are screenshots of Config c Under each peripheral heading there are useful additional guidelines to inform user to perform correct settings For example refer to Figure 4 5 AN3 is selected in ADC analog input pin setting and there is a comment Set AN3 pin to input direction to remind user Figure 4 6 is a screenshot of Config h Figure 4 7 is a screenshot of Iodefine h 66 RENESAS P Config Notepad File Edit Format Yiew Help J hahahah eh Na ta ta ta ta Ve te ta ta Ve Ve te ta Ve Ve Ve te Wa Ve Ve Va a Ve Ve Va Va Wa Ve Ve Ve a Wa Ve Ve Ve a Ve Ve Va a a Ve Ve Ve a Va Ve Ve Ve a Ve Ve Va e a Ve Ve Ve e Va We Ve Ve ta Ve Ve Va Va Va We System Name R8C Tiny IO wizard Generated Code File Name config c version 1 0 Release 1 contents Configuration routine for R amp c 11 Group CPU R8C 11 Group Compiler gt M3T NC8CC V 5 xx Programmer I0 wizard F OOOO TEE tE k H H Fte e te ke PeH Pe Pa e Pe P H H Pe Pe We e P H H Pe Pe Pe e P H P Pa Pe We P P H PE PA Pe Pe P P H PA Pa Pe Pe H H H PA Pa Pe WA H H H PA Pe Pe A H H H He copyright 2005 2006 Renesas System Solutions Asia Pte Ltd Disclaimer Io wizard is a free of charge and Aas IS basis software No support will be provided for this software
102. ion Formula Timer Value entered TA4 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA4 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Minimum acceptable value is 0 TA4 valid range 0 65535 Formula 16 bit H width value entered TA4 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA4 register high order address m value of TA4 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Formula Timer Value entered TA4 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA4 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Maximum acceptable value is 65535 TA4 valid range 0 65535 Formula 16 bit H width value entered TA4 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation 91 75 76 17 78
103. ister u0tbh 0 Set transmission data 7 9 bits udtbhl 11111111 f Set transmission data 9 bits LS TFREEEEEREEKEERREREEKEKKEKEREKEKEREEEE HAC ADC Setting ff LEFREEREEKEEREEREEKEEEREREEEEEREERERERE f Note For 8 bit resolution when conversion finished read AD result at AD register i 00C0H f Note For 10 bit resolution when conversion finished read AD result at AD register O0COH O0C1H f Sert ANS pin to input port direction yeut 1l ch0 1l chl 1 chzZ 0 fEN3 is selected adconO bit 0 3 md 1 f f Repeat mode selected adcon0 bit 3 cksl 0 cksO 1 ff ftad 1 fZ selected adconl bit Z and adconOd bit 7 bits 0 f S3 bit mode selectedtadconl bit 1 smp 1 f With sample and hold selected adconzZ bit 0 adst 1 fA D conversion startstadconO bit 6 void intO_int void ffEnter your intO routine void intl_int void f fEnter your intl routine Figure 4 5 Sample output of Config c 4 68 Config Notepad File Edit Format View Help Fi Ci iniia a a a a a a a a a a a a a a a a a a a a a a a a a aa a a a a a a a a a System Name e Io wizard Generated code File Name config wersion 1 0 Release 1 contents configuration routine for R amp C 11 Group CPU RCT Group compiler SMST NCBCEY 5 x Progr ammer I10 wizard Fi EURA E ROE E A A R W A A A A OA A A A A A A AOA R OA E A A E A A ROA A Copyright 2005 2006 Renesas System Solutions Asia Pte Ltd ff Disclaimer I0 wizard is a free of charge and 4s
104. l Timer Interrupt Occurrences CENESAS Enter value for Carrier Wave Cycle Formula Triangular Modulation Mode TB2 1 System Clock x Carrier Wave Cycle value entered 2 Sawtooth Modulation Mode TB2 1 System Clock x Carrier Wave Cycle value entered Refer to Section 5 3 Table list no 10 for example of Carrier Wave Cycle value calculation Valid range 1 15 Formula DTT Dead Time value entered x System Clock Refer to Section 5 3 Table list no 6 for example of dead time value calculation Formula Triangular Modulation Mode TA1 System Clock x V phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA1 System Clock x V phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 7 for example of V ohase PWM Duty Cycle value calculation Formula Triangular Modulation Mode TA2 System Clock x W phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA2 System Clock x W phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 8 for example of W phase PWM Duty Cycle value calculation Formula Triangular Modulation Mode TA4 System Clock x U phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA4 System Clock x U phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 9 for example of U ohase PWM Duty Cycle value calculation Formula Triangular Modulation Mode TB2 1 System Clock x Carrier Wave Cycle
105. lack Drive Capacity CPU Clock Division Patno M30290F AHF Frequency Source a Divided by S detault inal i2ROC 2 Y MHz ie LETT Fon Capacity CLKout Pin Output Division PLL Multiplying Factor AM Capacity ke port F90 Divide by 2 monnum Data Flash 4k bytes On chip oscillator selectedicmi bit 0 cm r 0 cm21 1 cm20 0 cmos 1 fOn chip oscillator selectedicm bit 5 and cme bit 0 and 1 emi 6 0 cmd 7 0 cmO06 1 ACPU clock divide by amp selectedicmd bt 6 cmi bt 6 and 7 rocrO 1 rocr1 0 UART selected rocr bit 0 and 1 rocr2 1 rocr3 0 IACROC divide by 2 selected racr bit 2 and 3 pclkS 0 cmd 0 cmoo 0 WCLKout pin function as normal Wo port PIOfpclkr bit 5 cm bit 0 and 1 Figure 3 31 M16C Tiny Series System Setting in Main Window mE IO Wizard M16C Tiny Series supports CPU clock selection of on chip oscillator main clock sub clock and PLL clock Default CPU clock source is on chip oscillator in Divide by 8 mode E The on chip oscillator source by default is using frequency source f2 ROC 2MHz in Divide by 2 mode On chip oscillator frequency source supported are fI ROC IMHz f2 ROC 2MHz and f3 ROC 16MHz CPU clock source in on chip oscillator is on chip oscillator frequency source selected divided by on chip oscillator division selected For example frequency source 2MHz selected and on chip oscillator divide by 2 mode selected CPU clock freqeuncy will be 2MHz divide by 2 which is 1MHz E F
106. lation 02 Value entered is below minimum value Enter value for Timer C Valid range of TMRC TCC is 0 255 at Timer C Timer value Formula for Down counter Timer Value entered ms TMRC TCC 1 x Internal Count Source Clock Formula for Up counter Timer Value entered ms 256 TMRC TCC x Internal Count Source Clock Refer to Section 5 6 Table list no 4 and 5 for example of timer value calculation 106 03 04 05 06 07 08 09 10 sQENESAS Value entered exceeded maximum Enter value for Timer C Valid range of TMRC TCC is 0 255 value at Timer C Timer value Formula for Down counter Timer Value entered ms TMRC TCC 1 x Internal Count Source Clock Formula for Up counter Timer Value entered ms 256 TMRC TCC x Internal Count Source Clock Refer to Section 5 6 Table list no 4 and 5 for example of timer value calculation Invalid value entered at Timer F 8 Enter value 8 bits Timer H for Timer F bits Timer value H Formula Timer Value entered ms 256 TMRF TCFH x Internal Count Source Clock Refer to Section 5 6 Table list no 6 for example of timer value calculation Value entered is below minimum value Enter value for 8 bits Timer H Valid range of TMRF TCFH is 0 255 at Timer F 8 bits Timer value H Formula Timer Value entered ms 256 TMRF TCFH x Internal Count Source Clock Refer to Section 5 6 Table list no 6 for example of timer value calculation Value e
107. no 7 for example of V phase PWM Duty Cycle value calculation Enter value for W phase PWM Duty Cycle Formula Triangular Modulation Mode TA2 System Clock x W phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA2 System Clock x W phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 8 for example of W phase PWM Duty Cycle value calculation Enter value for U phase PWM Duty Cycle Formula Triangular Modulation Mode TA4 System Clock x U phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA4 System Clock x U phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 9 for example of U ohase PWM Duty Cycle value calculation 93 99 Invalid value entered at 3 phase Motor Control Timer Carrier Wave Cycle 100 Value entered is below minimum value at 3 phase Motor Control Timer Interrupt Occurrences 101 Value entered is below minimum value at 3 phase Motor Control Timer Dead Time 102 Value entered is below minimum value at 3 phase Motor Control Timer V phase PWM Duty Cycle 103 Value entered is below minimum value at 3 phase Motor Control Timer W phase PWM Duty Cycle 104 Value entered is below minimum value at 3 phase Motor Control Timer U phase PWM Duty Cycle 105 Value entered is below minimum value at 3 phase Motor Control Timer Carrier Wave Cycle 106 Value entered exceeded maximum value at 3 phase Motor Contro
108. nt Source System Clock Refer to no 7 example calculation Similar as Timer Y Primary Period Formula timer value entered tropre 1 x tropr 1 x Internal Count Source System Clock Refer to no 7 example calculation Similar as Timer Y Primary Period Formula timer value entered tropre 1 x trosc 1 x Internal Count Source System Clock Refer to no 7 example calculation Similar as Timer Y Primary Period Formula timer value entered trobpre 1 x tropr 1 x Internal Count Source System Clock 76 ay 58 59 60 61 62 63 64 65 66 67 68 69 70 71 T2 73 74 T9 Value entered is below minimum value at Timer RB Secondary Period Value entered is below minimum value at Timer RB Wait Time Value entered is below minimum value at Timer RB One shot Pulse Output Time Value entered exceeded maximum value at Timer RB Primary Period Value entered exceeded maximum value at Timer RB Secondary Period Value entered exceeded maximum value at Timer RB Wait Time Value entered exceeded maximum value at Timer RB One shot Pulse Output Time tENESAS Formula timer value entered tropre 1 x trosc 1 x Internal Count Source System Clock Formula timer value entered tropre 1 x tropr 1 x Internal Count Source System Clock Formula timer value entered tropre 1 x trosc 1 x Internal Count Sourc
109. ntered exceeded maximum Enter value for 8 bits Timer H Valid range of TMRF TCFH is 0 255 value at Timer F 8 bits Timer value H Formula Timer Value entered ms 256 TMRF TCFH x Internal Count Source Clock Refer to Section 5 6 Table list no 6 for example of timer value calculation Invalid value entered at Timer F 8 Enter value for 8 bits Timer L for Timer F bits Timer value L Formula Timer Value entered ms 256 TMRF TCFL x Internal Count Source Clock Refer to Section 5 6 Table list no 7 for example of timer value calculation Value entered is below minimum value Enter value for 8 bits Timer L for Timer F at Timer F 8 bits Timer value L Formula Timer Value entered ms 256 TMRF TCFL x Internal Count Source Clock Refer to Section 5 6 Table list no 7 for example of timer value calculation Value entered exceeded maximum Enter value for 8 bits Timer L for Timer F value at Timer F 8 bits Timer value L Formula Timer Value entered ms 256 TMRF TCFL x Internal Count Source Clock Refer to Section 5 6 Table list no 7 for example of timer value calculation Invalid value entered at Timer F O p Enter value of O p Compare H for Timer F Compare H Formula Timer Value entered ms TMRF OCRFH 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 9 for example of timer value for O o Compare H calculation 107 11 12 13 14 15 16 17 18 Value entered
110. ock Timer Value entered ms 256 TMRF TCFL x Internal Count Source Clock 0 5 ms 256 TMRF TCEFL x 4 32 768 KHz 256 TMRF TCFL 0 5 ms X 32 768 KHz 4 TMRF TCFL 256 0 5 ms x 32 768 KHz 4 Hence TMRF TCFL 252 CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Int Count Source L Divide by 32 Divide by 16 Divide by 4 Divide by 4 Subclock Formula for Up Counter Timer Value entered ms 65536 TCF x Internal Count Source Clock Example to calculate value of TMRF TCFL and TMRF TCFH Desired timer value entered 0 5 ms Based on the formula above if Internal Count Source is Divide by 32 Timer Value entered ms 65536 TCF x Internal Count Source Clock 0 5 ms 65536 TCF x 32 5 MHz 65536 TCF 0 5 ms X 5 MHz 32 TCF 65536 0 5 ms x 5 MHz 32 TCF 65458 TCF FFB2 In Hex Decimal Hence TMRF TCFH OxFF and TMRF TCFL B2 114 09 Timer F Output Compare Match 8 bits Timer F Output Compare Match 8 bits tENESAS CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Int Count Source H Divide by 32 Divide by 16 Divide by 4 Divide by 4 Subclock Formula Timer Value entered ms TMRF OCRFH 1 x Internal Count Source Clock Example to calculate value of TMRF OCRFH Desired timer value entered 0 1 ms Based on the formula above if Internal Count Source is Divide by 32 Timer Value entered ms
111. ock gt 32 768KHz Subclock output select Divide by 32 Divide by 16 Divide by 8 Divide by 4 Formula Clock cycle us Subclock output select Subclock x 1000000 Example to calculate clock cycle Based on the formula above if Subclock output select is Divide by 32 Clock cycle us Subclock output select Subclock x 1000000 Clock cycle us 32 32 768KHz x 1000000 Hence the clock cycle is 977 us CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Prescaler S select Divide by 8192 Divide by 2048 Divide by 512 Divide by 64 Divide by 4 Divide by 4 Subclock Formula for Down Counter Timer Value entered ms TMRC TCC 1 x Internal Count Source Clock Example to calculate value of TMRC TCC Desired timer value entered 1 ms Based on the formula above if Internal Count Source is Divide by 512 Timer Value entered ms TMRC TCC 1 x Internal Count Source Clock 1 ms TMRC TCC 1 x 512 5 MHz TMRC TCC 1 1 ms X 5 MHz 512 TMRC TCC 1 10 Hence TMRC TCC 10 1 which is 9 112 05 Timer C Interval timer Timer auto reload Timer F Timer 8 bits tENESAS CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Prescaler S select Divide by 8192 Divide by 2048 Divide by 512 Divide by 64 Divide by 4 Divide by 4 Subclock Formula for Up Counter Timer Value entered ms 256 TMRC TCC x Internal Count Source Clock Example
112. ock x U phase PWM Duty Cycle value entered Refer to Section 5 3 Table list no 9 for example of U ohase PWM Duty Cycle value calculation 111 Value entered exceeded maximum Formula value at 3 phase Motor Control Timer Triangular Modulation Mode Carrier Wave Cycle TB2 1 System Clock x Carrier Wave Cycle value entered 2 Sawtooth Modulation Mode TB2 1 System Clock x Carrier Wave Cycle value entered Refer to Section 5 3 Table list no 10 for example of Carrier Wave Cycle value calculation 112 Invalid value entered at Timer S Enter value for Divider Valid range 0 255 Divider 113 Invalid value entered at Timer S Set Set width value lt Reset width value 114 width value and Reset width value 115 116 117 Value entered is below minimum value Valid range 0 255 at Timer S Divider 118 Value entered exceeded maximum Valid range 0 255 value at Timer S Divider 119 Invalid value entered at DMAO Enter value for Transfer Count Valid range 1 65536 Transfer Count Formula TCRO Transfer Count value entered 1 120 Invalid value entered at DMAO Enter value for Source Address Pointer Valid range 00000h FFFFFh Source Address Pointer 95 CENESAS 121 Invalid value entered at DMAO Enter value for Destination Address Pointer Valid range 00000h FFFFFh Destination Address Pointer 122 Value entered is below minimum value Valid range 1 65536 at DMAO Transfer Count
113. ode displayed If comment line is long user can use the horizontal scrollbar to view the complete comment IO Setting area User inputs the device selection system setting and peripheral operation setting through this area Tooltip When user places cursor at any of the setting area short guide comments will be displayed to help user in addition to the comment in the status list Radiobutton Only one button can be selected at a time for a setting Checkbox Multiple buttons can be selected at a time Combobox Displays a dropdown list of selectable items Combo Editbox Displays a dropdown list of selectable items It is also a single line edit field that allows user to enter a value for a setting Clock Source Display Displays the clock source selected in the main window When user selects a peripheral which has interrupt setting an interrupt setting window as shown in Figure 3 5 will slide out User can make the interrupt selection in this window Perret eee eee ete etree rere teeter eet et re ete tere rer tater enter ereneetetent eter enteteterteterertet eter eterentetererte tater tet eterteteretteterertetetertet eter et eeteteter inte terertetererteteter et erertetereteetetertetetertetererteteterentetertrtetertetetertntetereeterertetetertntererteterettrtetertrterertnteterttteterenterertrtetetttteterentetertntetetet tater et tetertrteterttteterettetecetettertetetettntetettiet titer ere tet etter titetertnteterenteterttteterente
114. of bit rate value for SCI31 calculation 5 6 Example of Computation Values for H8 SLP Series The table below is a reference list of examples and additional help to assist users to input correct setting No Function Notes and Action 01 Timer A Interval Timer CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Prescaler S select Divide by 8192 Divide by 4096 Divide by 2048 Divide by 512 Divide by 256 Divide by 128 Divide by 32 Divide by 18 Formula Overflow times ms Prescaler S select System Clock x 256 Example to calculate Overflow times Based on the formula above if Prescaler S select is Divide by 8192 Overflow times ms Prescaler S select System Clock x 256 Overflow times ms 8192 5MHz x 256 Hence overflow times is 419 43 ms 02 Timer A System Clock output CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz System clock output select Divide by 32 Divide by 16 Divide by 8 Divide by 4 Formula Clock cycle us System clock output select System Clock x 1000000 Example to calculate clock cycle Based on the formula above if system clock output select is Divide by 32 Clock cycle us System clock output select System Clock x 1000000 Clock cycle us 32 5MHz x 1000000 Hence the clock cycle is 6 4 us 111 03 Timer A Subclock output Timer C Interval timer Timer auto reload tENESAS CPU Clock System Clock gt 5 MHz Subcl
115. on mode SSU function c Transmitter mode d Receiver mode I2C bus interface mode I2C function b Transmitter mode c Receiver mode Clock synchronous serial mode I2C function a Transmitter mode b Receiver mode 31 tENESAS For each operation mode the related function settings are supported while the unrelated setting are disabled E User is allowed to enter transfer clock period and baud rate in edit field or select them from combobox dropdown list Calculated value for register setting is being round to the nearest whole number E Precaution Value set previously for Timer RA and UARTO will be overwritten when LIN is activated Count source for Timer RA is fixed to f1 3 3 6 CAN Window w 10 Wizard SER Usage C De activate f Activate TAM Clack Select No division Baud Rate Prescaler PTS Control i T PBS1 control 2 Ta PBS Control 2 Ta Sampling Control f One time f Three times Message Order f Word access f Byte access Basic CAM Enable f No SAM Control i Tq Listen only Mode Disable detautt l Enable f Yes Divide by 1 Time Stamp Prescaler h bit time kai Loop Back Mode Enable fe flo E Yes Timer RB Timer RE Timer RD UARTO UART 1 LIN Sol CAN Comment rxonky_cOcthr 0 MListen only mode is not usedic ctlr bit 13 sam cOconr U fone time sampling selected cUconr bit 4 megoarder cOcth 0 ford access selected cUctl
116. only Address 5 3 Error Message Table for M16C Tiny Series No 01 02 03 04 05 When an error occurs in M16C Tiny Series settings user should look up the error code number and error description listed in the error report window from the Error Message table below When in doubt refer to the table below for additional notes and advice to input the correct setting Error Message Invalid value entered at Timer AO Timer Value Invalid value entered at Timer AO One shot Timer Value Invalid value entered at Timer AO Count Value Invalid value entered at Timer AO 16 bit H width Notes and Action Enter value for Timer AO Formula Timer Value entered TA0 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Enter one shot timer value for Timer AO Formula One shot Timer Value entered TAO x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Enter count value for Timer AO TAO valid range 0 65535 Enter value for Timer AO Formula 16 bit H width value entered TAO x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Invalid value entered at Timer AO 8 bitEnter value for Timer AO H width Formula 8 bit H width value entered n x m 1 x Internal C
117. or 1 comparison result to ACOUT1 acme SOA converter 0 output is selected accro bit 2 VAYREF1 pin input i selectediaccr1 bit 2 Enable output ic selectediaccrul bit 1 Enable output ic selected iacecr1 bit 1 io filter is selected Fitter with f8 sampling is selected ifomparatoar 0 enabled iCemnmorcatoar A anahla d e E a C Frequency Walue 0 125 MHz Comparator Window for R8C 2E and 2F E User is allowed to de activate or activate Comparator settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button E Settings are available for Comparator 0 and Comparator 1 35 fe 10 Wizard Port 1 Usage Comparator 1 digital filter m Comparator 1 sampling clk Port 3 De activate i fe fiter enabled mode toco s divided by 2 Port 4 Activate Digital fiter disabled mode ai Enable Operation pa 2 digital filter r Comparator 2 sampling clk NT 4 7 En a Digital fiter enabled mode fOCO S divided by 4 Key input interrupt Enable Comparator 1 Digital fiter disabled mode Timer RA Comparator circut ref voltage VCOUT2 output polarity wf imparator i Timer RB M Enable sit raed Internal reference voltage Non inverted comparison Timer RE l in inout vottag ee Timer RF VCMP1 external input fF CVREF pin input volage amp Inverted comparison UART 0 Supply voltage VCC PE 1 circuit edge ee UT1 oupa enable UART 2 VCMP1 pin input vol
118. or example of One shot Timer value calculation Maximum acceptable value is 65535 TA1 valid range 0 65535 Formula 16 bit H width value entered TA1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation 87 30 31 32 33 34 35 36 37 38 39 Value entered exceeded maximum value at Timer A1 8 bit H width Invalid value entered at Timer A2 Timer Value Invalid value entered at Timer A2 One shot Timer Value Invalid value entered at Timer A2 Count Value Invalid value entered at Timer A2 16 bit H Width Invalid value entered at Timer A2 8 bit H Width Value entered is below minimum value at Timer A2 Timer value Value entered is below minimum value at Timer A2 One shot Timer Value Value entered is below minimum value at Timer A2 Count Value Value entered is below minimum value at Timer A2 16 bit H width CENESAS Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA1 register high order address m value of TA1 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Enter value for Timer A2 Formula Timer Value entered TA2 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calcul
119. or setting of main clock frequency user is allowed to make their clock frequency selection from the 40 stENESAS combobox dropdown list Clock frequencies supported are S5MHz 8MHz 1OMHz 12MHz 16MHz and 20MHz E For setting of PLL clock frequency user is allowed to multiply the main clock frequency selection from the combobox dropdown list with PLL multiplying factor combobox dropdown list For example main clock frequency SMHz selected and PLL multiplying factor selected is multiply by 4 The result of CPU clock frequency will be SMHz multiply by 4 which is 20MHz Note user is only allowed to set the clock frequency between 1OMHz and 20MHz Clock frequency for sub clock is 32768Hz Click the lt Next gt button to proceed to Port 0 window 3 4 2 Port Window Fe 1O Wizard Seles Pin Status Drive Capacity fe Input Output Input Output Input Output Input Output Input Output Input Output Input Output E E E E 2 E S Si O N E N a Input Output Pine 0 3 Pull eups On Pine 4 7 Pull ups On Pot og Foti Port Port 3 Port6 Port Port Pots Port id INT O gt Port PO direction register CPU Clock On chip o cillator detaut Frequency Value 1MHz 25 CPU Clock Division Divided by Stdefautt Figure 3 32 Port Window E Ports have similar windows User is able to do settings for port directions and pull up E Drive capacity setting is disabled here as it is not applicable
120. ount Source System Clock n value of TAO register high order address m value of TAO register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation 85 06 07 08 09 10 11 12 13 14 15 16 17 Value entered is below minimum value at Timer AO Timer value Value entered is below minimum value at Timer AO One shot Timer Value Value entered is below minimum value at Timer AO Count Value Value entered is below minimum value at Timer AO 16 bit H width Value entered is below minimum value at Timer AO 8 bit H width Value entered exceeded maximum value at Timer AO Timer Value Value entered exceeded maximum value at Timer AO One shot Timer Value Value entered exceeded maximum value at Timer AO Count Value Value entered exceeded maximum value at Timer AO 16 bit H width Value entered exceeded maximum value at Timer AO 8 bit H width Invalid value entered at Timer A1 Timer Value Invalid value entered at Timer A1 One shot Timer Value CENESAS Formula Timer Value entered TA0 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TAO x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation
121. ource System Clock PREY is fixed at 249 actual count is 250 Formula Timer Value entered PREY 1 x TYPR 1 x Internal Count Source System Clock PREY is fixed at 249 actual count is 250 Formula Timer Value entered PREY 1 x TYSC 1 x Internal Count Source System Clock PREY is fixed at 249 actual count is 250 72 13 14 15 16 17 18 19 20 21 Invalid value entered at Timer Z Timer Value sQENESAS Enter only 0 5ms 1ms 2ms or 4ms only Formula Timer value entered PREZ 1 x TZPR 1 x Internal Count Source System Clock Refer to no 1 for example calculation Similar as Timer X Timer Value Invalid value entered at Timer Z Primary Formula Period Invalid value entered at Timer Z Secondary Period Invalid value entered at Timer Z Wait time Invalid value entered at Timer Z One Shot Pulse Output time Value entered is below minimum value at Timer Z Primary Period Value entered is below minimum value at Timer Z Secondary Period Value entered is below minimum value at Timer Z Wait Time Value entered is below minimum value at Timer Z One Shot Pulse Output Time Timer Value entered PREZ 1 x TZPR 1 x Internal Count Source System Clock In this case PREZ is fixed at 249 actual count is 250 Refer to no 7 for example calculation Similar as Timer Y Primary Period Formula Timer Value entered
122. peration mode the related function settings are supported while the unrelated setting are disabled 51 CENESAS 3 5 Outline of H8 SLP Series Window IO Wizard supports H8 SLP Series system settings and a selection of peripherals available in H8 38347 which are Port 1 to Port 9 Port A IRQO to IRQ4 WKPO to WKP7 Timer A Timer C Timer F Timer G AEC PWM SCI1 SCI31 SCI32 ADC and LCD User is allowed to use more than one peripheral setting But input ports only which are Port C and Port D are not available Let s look at each window in turn 3 5 1 System Setting Window Fe IO Wizard fe oi m cE NESAS Sub clock Sub clock Oscillator Pin Active High Speed Frequency Value oe Hoe From EXCL SEES H amp SLP Series 32 768 E p f From 1idefaut Group Ha38S4F Group CPU operating clack Part no Harses42 A System Clack E F MHz ROM Capacity pees Division RAM Capacity 1K bytes IO PMR BIT EXCL 0 fSub clack Oscillator pin X1 selected pmr2 bit 7 f SCR2 BIT MSON 0 Active high speed mode selected syscr2 bit 2 system clock 5 MHz tosc Figure 3 41 H8 SLP Series System Setting in Main Window E IO Wizard H8 SLP Series supports Operation Mode with Active High Speed Mode only Default of Sub clock Oscillator Pin is From X1 E For setting of System clock frequency as CPU operating clock user is allowed to make their clock frequency selection from the combobox dropdown list Clock frequenci
123. r A Mo Yes Falling Rising Timer Timer F No f Yes Falling Rising Timer G AEC ruta Pine 0 3 Pull upe Gn Pine 4 7 Pull upe On Sc B Scist S132 Y Ports Port4 Ports Porte Port Ports Ports Pot IRG P a Parameter IEMWR1 EY TE 0x00 interrupt enable register 1 for Ra interrupt IFc0 lRo4 EGR B TE 0x00 WRG edge select register System Clack 5 MHz ub clock 32 769 KHz 25 CPU cock System Clock User is able to do settings for Interrupt Enable and Active edge 54 3 5 4 WKP Window w 1O Wizard Interrupt Enable C Disable f Enable Pin AEK FO f Falling edge f Rising edge Pin KF f Falling edge f Rising edge Pin WkiP f Falling edge f Rising edge Pin Wiki Ps f Falling edge 0 Rising edge Pin vuKP4 Falling edge f Rising edge Pin WK PS f Falling edge f Rising edge Pin WEF f Falling edge 0 Rising edge Pin WEPT Falling edge f Rising edge SE se Port4 Ports Pot Port Port Port Port 4 R Wee Timer 4 WWEGR BIT WWKEGSO 0 WEGA BIT WWKEGS1 0 WWEGR BIT WWKEGS2 0 WEGA BIT WWKEGS3 0 WWEGR BIT WWKEGS4 0 WEGA BIT WWHEGS5 0 WEGR BIT WWKEGSB 0 WER BIT WWKEGS 7 0 AF aling edge sensing for pin WwAPOCwedgr bit 0 Falling edge sensing for pin WEP 1Cwegr bit 13 F aling edge sensing for pin WEP 2wegr bit 2 fFalling edge sensing for pin WEK PStyweadr bit 3 AF aling edge sensing for pin WwAP4Cwvegr bit 4 F
124. r Active Edge f Level 0 Disabled f Mo filter f Falling edge Level 1 Low C with fi sampling f Rising edge Level 2 Key input interrupt Level 3 Timer gt Timer 7 Timer Z Level 5 Input Enable Polarity Enable pee Level 6 f No UART 1 Level 7 High f es f Both edges AD f With tS sampling f With t32 sampling Level 4 f One edge Port 0 Port 1 Port 3 Port4 wro INT 1 INT 2 INTS Key input interru 4 fone edge selected inten bit 1 Minput enable disabledtinten bit 0 int ic 0x01 fSet interrupt piority level and active edgetint ic CPU Clock On chip oscillatoridetaut Frequency Value 0 125 MHz 25 CPU Clock Division Divide by 8 default Figure 3 20 INT Window E There are two different windows for INTO INT3 setting and Key Input Interrupt setting E User is able to do settings like priority level and input polarity E For R8C 10 11 12 13 1A and 1B tcc07 bit is set to 0 in INT3 interrupt E Generated code includes interrupt function declaration and empty function body Refer to section 4 for details on code generation 27 3 3 4 Timer Window 10 Wizard ama Usage Enable Pulse Output Timer alue 0 De activate f 0 5 m Activate a Count alue Operation Mode PREX Timer Pulse Output i TR a Period Measurement co Internal Count Source Ext Count Source No divisian detaut fe Width Measurement 4 rae Ports Port4 INTO INT 14 I
125. r clock period calculation Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Formula uObrg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Formula ulbrg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation 145 Invalid value entered at UART1 Baud Formula Rate 146 Invalid value entered at UART1 Transmit Data 147 Value entered is below minimum value at UART1 Transfer Clock Period 148 Value entered is below minimum value at UART1 Baud Rate 149 Value entered exceeded maximum value at UART1 Transfer Clock Period 150 Value entered exceeded maximum value at UART1 Baud Rate 151 Invalid value entered at UART2 Transfer Clock Period ulbrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Enter 7 9 bits transmission data Example 1111000 is 7 bits 01001111 is 8 bits 100001111 is 9 bits Formula ulbrg 1 System
126. r each operation mode the related function settings are supported while the unrelated setting are disabled E User is able to do settings like Count Up Enable H and Count Up Enable L in 8 bit event counter of Channel Select 58 3 5 7 PWM Window w 1O Wizard Usage P30 143 Pin f Alo PYM output e Yes iS Internal Count Source Duty Cycle Divide by 2 ha 10 se Port A R WEF Timer amp Timer Timer F Timer GS AEC Pah Parameter IO PMR BIT Peh 1 PYM output pin function enablefpmes bit 0 Pui Pyle BIT CKS 0 NDivide by 2 selected Conversion period 1636840CLKE pwer bit 0 and 1 PY PYVORL O0x66 Fey PYyDRU 0 06 fEnter value tor Duty Cycle system Clack 5 MHz Sub clack 32 768 KHz CPU Clock System Clock Figure 3 47 PWM Window E User is allowed to choose to use PWM settings All settings are disabled when No radiobutton is selected To enable the settings click on Yes radio button E Fixed Duty Cycle is supported for 14 bit PWM mode User is allowed to select Duty Cycle available from the combobox dropdown list Calculated value is being round to the nearest whole number 59 CENESAS 3 5 8 SCI1 Window w l0 Wizard Usage Operation C No Transmitter e Yes l Receiver Operating Mode Latch Tail Synchronous 8 khit Kz gt o Clock Division Ratio Data Output Pin Divide by 1024 fe CMOS O NMOS open drain v Timer amp Timer Timer F Timer G AEC P
127. racteristics R8C 11 Group Hardware Manual url http documentation renesas com eng products mpumcu rejO9b0062_r8c11hm pdf R8C 11 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0034_r8c11ds pdf Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics R8C 12 Group Hardware Manual url http documentation renesas com eng products mpumcu rej09b0110_r8c12hm pdf R8C 12 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rejO3b0068_r8c12ds pdf Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics R8C 13 Group Hardware Manual url http documentation renesas com eng products mpumcu rej09b0111_r8c13hm pdf R8C 13 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rejO3b0069_r8c13ds pdf Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics R8C 1A R8C 1B Group Hardware Manual url http documentation renesas com eng products mpumcu rej09b0252 r8c1ai1bhm pdf R8C 1A R8C 1B Group Datasheet Covers hardware overview and electrical charac
128. radiobutton is selected To enable the settings click on Activate radio button User is able to do settings like Clock Select Internal Clock Source Sout Output Enable Transfer Direction and Clock Polarity E User is allowed to input value for transfer clock period and transmit data Calculated value for transfer clock period is being round to the nearest whole number For example if s3brg is calculated to be 11 5 s3brg value is being round up to 12 If s3brg is calculated to be 11 4 s3brg value is being round down to 11 48 3 4 8 Multi master I2C Bus Window 8 10 Wizard SEE Key input interrupt Usage SCL Mode Timer AD C De activate Standard clack Timer 4 1 Timer 42 Activate C High speed clock Timer 43 Timer 4 Clock Select SCL Frequency Control Timer B0 f No division 5 Timer B1 Timer B2 C Divide by 2 Three phase motor control timer 2c System Clock ACK Clack f No Divide hy 2 Ka 0 Yes SCL Release Time gt yw DMA UART O UART 1 UART 2 SIO3 SIO4 Multimaster 2 C bus C amp M al gt prcO 1 pclkO 1 proov 0 flock source fi pclkO set clack divider for timer 4 65 dead time timer SI fastmode 0 iStandard clack selected S20 bit 5 ackclk 0 ito ACK clock s20 bit 7 ick4 0 ick3 0 ick2 0 ick1 0 ickO 0 MAIC divide by 2 selected s3d0 bit 6 and 7 s4d0 bit 3 5 s20 3 ASCL clock frequency 20833SHz s2du 2 NWSCL Release Time 6 Ouse CPU Clock On chip o cillator defautt Frequency
129. rating modes Interval Timer mode Real Time Clock mode System Clock output mode Subclock output mode For each operation mode the related function settings are supported while the unrelated setting are disabled Additional information is provided for Interval Timer mode Overflow times is calculated and displayed on the comment Calculated value is being round to the nearest number with accuracy 0 01ms Additional information is provided for System Clock output Clock cycle is calculated and displayed on the comment Calculated value is being round to the nearest number with accuracy 0 lus 56 tENESAS Additional information is provided for Subclock output Clock cycle is calculated and displayed on the comment Calculated value is being round to the nearest number with accuracy lus 2 Timer C supports 3 different operating modes Interval Timer mode Timer auto reload mode Event Counter For each operation mode the related function settings are supported while the unrelated setting are disabled Fixed timings are supported for Interval timer mode and Timer auto reload mode User is allowed to select selected timings available from the combobox dropdown list Calculated value is being round to the nearest whole number 3 Timer F supports 5 operating modes Timer 8 bits mode Timer 16 bits mode Output Compare Match 8 bits mode Output Compare Match 16 bits mode Event Counter mode
130. re_uOc1 0 transmission enabled uOc71 bit 0 nch_udcO 0 NCMOS output selected ullc0 bit 5 Status List u brg 0 Vetting USRTO baud rate generatorimax 255 Calculated value is round to CPU Clack On chip o cillator detauk Frequency value 0 125 MHz Scrollbar oe arene Clock Source Display Figure 3 4 Features of IO Wizard Window To select the specific peripheral dialog window to view you can make the selection from the peripheral selection list available on the left hand corner of the window as shown in Figure 3 4 or click on the peripheral tab to make a peripheral dialog window active The key features of IO Wizard window are described as follows Peripheral Selection List Gives you access to the individual peripheral window Peripheral tab bar Gives you access to the individual peripheral window conveniently by clicking on the respective peripheral tab Use the tab scrolling buttons to scroll through the peripheral tabs Status List This sub window displays the source code in real time according to selection made through the IO setting area When user made an item selection at the IO setting area that particular item will be instantly highlighted in yellow in this window The displayed code shown is simultaneously updated according to current selection made by user 16 tENESAS Comments are display beside each line of code to aid user Use the horizontal scrollbar to browse through the source c
131. red exceeded maximum value at Timer B1 Timer value Value entered exceeded maximum value at Timer B1 Count value Invalid value entered at 3 phase Motor Control Timer Interrupt occurrences Invalid value entered at 3 phase Motor Control Timer Dead Time Invalid value entered at 3 phase Motor Control Timer V phase PWM Duty Cycle Invalid value entered at 3 phase Motor Control Timer W phase PWM Duty Cycle Invalid value entered at 3 phase Motor Control Timer U phase PWM Duty Cycle CENESAS Enter value for Timer B2 TB2 valid range 0 65535 Formula Timer value entered TB2 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation TB2 valid range 0 65535 Formula Timer value entered TB2 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 5 for example of timer value calculation TB2 valid range 0 65535 Enter value for Interrupt occurrences Valid range 1 15 Enter value for Dead Time Formula DTT Dead Time value entered x System Clock Refer to Section 5 3 Table list no 6 for example of dead time value calculation Enter value for V phase PWM Duty Cycle Formula Triangular Modulation Mode TA1 System Clock x V phase PWM Duty Cycle value entered 2 Sawtooth Modulation Mode TA1 System Clock x V phase PWM Duty Cycle value entered Refer to Section 5 3 Table list
132. rst combobox E Following serial I O peripheral funcions and opertion modes are supported 1 UART 0 and UARTI Clock Synchronous a Transmitter mode b Receiver mode UART 7 bits c Transmitter mode d Receiver mode UART 8 bits e Transmitter mode f Receiver mode UART 9 bits g Transmitter mode h Receiver mode 30 tENESAS UART 2 is supported for R8C 2A 2B 2C 2D 2G 2H 2K and 2L It has the similar functions as UART 0 and UART 1 UART 2 is also supported for R8C 32A R8C 33A and R8C 35A The UART 2 for these 3 devices has similar functions as UART 2 in M16C Tiny Series It supports the following operating mode 1 2 3 4 5 6 1 8 2 3 Clock synchronous a Transmitter mode b Receiver mode UART 7 bits a Transmitter mode b Receiver mode UART 8 bits a Transmitter mode b Receiver mode UART 9 bits a Transmitter mode b Receiver mode I2C bus mode a Transmitter mode b Receiver mode Special Mode 2 a Transmitter mode b Receiver mode IEBus mode a Transmitter mode b Receiver mode SIM mode a Transmitter mode b Receiver mode LIN R8C 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2H 2J 2K 2L 32A 33A and 35A Slave mode Master mode SSU R8C 1A 1B 22 23 24 25 26 27 28 29 2A 2B 2C 2D 32A 33A and 35A Clock synchronous communication mode SSU function a Transmitter mode b Receiver mode Four wire bus communicati
133. s E For installation you will need to run the program IO WizardSetup EXE Double click the IO Wizard icon as shown in Figure 2 1 IO Wizardy1 O0ros Setup exe i Mac rovision Corporation Figure 2 1 IO Wizard Setup Icon This will invoke IO Wizard Installer Welcome Screen as shown in Figure 2 2 stCENESAS This runs the InstallShield Wizard and the following screen will be displayed 10 Wizard V 1 00 Release 03 InstallShield Wizard Welcome to the InstallShield Wizard for IO Wizard 1 00 Release 03 The InstallShield Wizard will install I0 Wizard 1 00 Release 03 on your computer To continue click Next instal Sie ps Bet fi Neo Caneel Figure 2 2 IO Wizard Installer Welcome Screen E Click next to proceed with the installation IO Wizard 1 00 Release 03 InstallShield Wizard License Agreement Please read the following license agreement carefully 1 This is a free of charge and AS IS basis software We will not provide any support for this software The user assumes the entire risk of using the product 2 If you use the enclosed software product and any related software products hereafter referred to as PRODUCT before exporting or taking such PRODUCT to other countries or states you must comply with applicable export control laws and regulations of Japan and other countries with jurisdiction and the applicable states and provinces within Japan and such other countries 3 Please be advise
134. s TA4 40000 103 10 11 3 phase Motor Control Timer Carrier Wave Cycle UARTi Transfer Clock Period tENESAS CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Formula Triangular Modulation Mode TB2 System Clock x Carrier Wave Cycle value entered 2 Sawtooth Modulation Mode TB2 System Clock x Carrier Wave Cycle value entered Example to calculate value of TB2 in Triangular Modulation Mode Desired Carrier Wave Cycle value entered 0 1ms Based on the formula above if main clock is chosen TB2 1 System Clock x Carrier Wave Cycle value entered 2 TB2 1 20MHz x 0 1ms 2 TB2 1 1000 TB2 1000 1 999 Example to calculate value of TB2 in Sawtooth Modulation Mode Desired Carrier Wave Cycle value entered 0 1ms Based on the formula above if main clock is chosen TB2 1 System Clock x Carrier Wave Cycle value entered TB2 1 20MHz x 0 1ms TB2 1 2000 TB2 2000 1 1999 CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz BRG Clock Select No division Divide by 2 Divide by 8 Divide by 32 Formula UiIBRG 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Example to calculate value of UiBRG Desired transfer clock period value entered 50us Based on the formula above if main clock is chosen and BRG clock
135. s chosen and Internal clock source is divide by 8 trdgra0 1 PWM period entered x Frequency of Count Source trdgra0 1 1ms x 20MH2z 8 trdgra0 1 ims x 2500000 trdgra0 1 2500 trdgra0 2500 1 Therefore trdgraO 2499 Example to calculate value of trdgra0 for Complementary PWM mode Desired PWM period entered 1ms and Dead Time is 0x10 Based on the formula above if Main Clock 20MHz is chosen and Internal clock source is divide by 8 trdgra0 2 PWM period entered x Frequency of Count Source 2 Dead Time trdgra0 2 ims x 20MHZ2 8 2 16 trdgra0 2 ims x 2500000 2 16 trdgra0 2 2500 2 16 trdgra0 2 1250 16 trdgraO 1266 2 Therefore trdgraO 1264 Formula trdgrai 1 CH1 PWM Period x Frequency of Count Source Refer to no 102 example calculation Similar as Timer RD CHO PWM Period 79 104 Value entered is below minimum value at Timer RD CHO Inactive Width TRDIOBO 105 Value entered is below minimum value at Timer RD CHO Inactive Width TRDIOCO 106 Value entered is below minimum value at Timer RD CHO Inactive Width TRDIODO 107 Value entered is below minimum value at CENESAS Formula trdgrb0 1 CHO Inactive Width x Frequency of Count Source Example to calculate value of trdgra0 Desired Inactive Width entered 0 1ms Based on the formula above if Main Clock 20MHz is chosen and Internal clock source is divide by 8 trdgra0 1 Inactive Width entered x Frequenc
136. seeeeeeeeeeseseeeeeeeeeeeeseseeeeeeeeseseeeeneseeeenesaes DTC Window for R8C 32A 33A and 35A Figure 3 30 Deactivate i Normal Mode Repeat Mode Key input interrupt Repeat Area Chain Transtes Destination Disabled E Transfer Source Enabled oo Source Addr Ctd r Repeat Mode Int Fired Disabled incremented Enabled Transter Mode oo Hex __ SS ee r Transfer Count UART 2 LIN ADE DAC DTC Activation Enable M ANTO ANTI M ANT2 ANTS ANT Iw Enable ated0 M Enable Destination Addr Gti Fired f ncremented tr Data Allocation Transfer Count Reload E E 00 Hex Destination Address r OTE Activation Gd eee Address r NMI not generated EEEE 0000 T Hex NMI generated Hex Comparator A Comparator E DTC Comment ANI not gen erated Normal Mode Transfer destination is the repeat area Source Address is fed Destination Address is fixed Transfer Destination Repeat Interrupt disabled Set DTC Block Size Set DTC Transfer Count Sioat Tranofer Moornt Delonan Denicoter Frequency Value 0 125 MHz cena eaeeeeeeeseeneneseeneneeesneneseeeeeeseeeeaeseseeaeseseeeeeesneeeeeeeeeeeeeneneseseeeeseseeaeseseeeeseseeeeseeeeeeeeeeeeeseseeeeeeseeeeseeeeeeseeeeeeseseeaeeeeeeeeseseeeseeeeeeseseeaenseneeeseseeeeeeeeeeesusneeeeeeee seeeeeeeeeeeeeeeen seeeeeeeeeeeen Seeeeeeeeeseseeeeeeeeee
137. seseseeseseeeeseseseeeeseeeeseseeseseseee E User is allowed to de activate or activate DTC settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button User is able to select Ctrl Data Allocation dtcd0 dtcd23 24 blocks and then tick on the Enable checkbox to configure the settings All the code settings will be prefixed with dtcdi_ i 0 23 E User is able to select DTC Activation Enable dtcen0 dtcen6 7 registers and then tick on the Enable checkbox to show different register bits for subsequent configuration of settings 39 tENESAS 3 4 Outline of M16C Tiny Series Window IO Wizard supports M16C Tiny Series system settings and a selection of peripherals available in M16C 26A 28 and 29 which are Port 0 to Port 3 Port 6 to Port 10 INT 0 to INT 5 Key Input Interrupt Timer AO to Timer A4 Timer BO to Timer B2 Three phase Motor Control Timer Timer S DMAO DMA1 UARTO to UART2 SI O3 S1 O4 Multi master I2C Bus CAN and ADC User is allowed to activate more than one peripheral setting Let s look at each window in turn 3 4 1 System Setting Window Fe 10 Wizard Seles a Pe ENESAS tok Clock Frequency Main Clock Drive Capacity On chip oscillator detautt Frequency alue c C Wain clack in out seles m bLTiny Series gt Sub clock xcin xcout MHz a l C PLL clock Croup nt 629 Group On chip oscillator Sub c
138. speed on chip oscillator is 8MHz For R8C 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2K and 2L clock frequency for high speed on chip oscillator is 40MHz with frequency division from 2 to 9 25 tCENESAS For R8C 24 25 26 27 28 29 2A 2B 2C 2D 2G 2H 32A 33A and 35A sub clock frequency is 32 768kHz Click the lt Next gt button to proceed to windows for peripheral function setting 3 3 2 Port Window fe 10 Wizard Pin Status Drive Capacity 7 C Input Output C 7 Input Output Input Output Input Output Input Output Input Outpt Input Output Se GH Whew Gice Wie igs Sig E en Input Outpt W Pins 0 3 Pull ups On Pine 4 7 Pull ups On Porto Foti Ports Port4 INTO INT 1 INT INTS Key input interru 4 HEnable write to POO ff Pull ups for POO POS on CPU Clock On chip o cillator defautt Frequency Value 0 125 MHz a CPU Clack Division Divide by 8 default Figure 319 PortWindow _ E User is able to do settings for port directions and pull ups E Drive capacity setting is also available for Port 1 R8C 10 11 12 13 1A 1B 26 27 28 29 2E and 2F or Port 2 R8C 22 23 24 25 2A 2B 2C 2D 2K 2L 33A and 35A E For Port 0 prc2 bit is set to 1 to enable write to PDO register E Port Input level select is supported in R8C 32A 33A and 35A 26 lt ENESAS 3 3 3 INT Window i 10 Wizard Wal INTO Interrupt x Interrupt Priority Level Input Fitte
139. stzos 1 Programmable wait one shot generation mode tyzmr bit 4 and 5 set write cont LS FETETEEEKKKEEEEEEKKKEREEEEEKKEREREEEKEEEE ff Timer C Setting fF LETTER EEEEEEEEKKEEEEEEEEREEKEEEEE ffNote At the end of Timer C Setting set tecOO 1 to enable capture function f Set INTS to input when selecting INT3 as measurement pulse tecO 0 ffINTS selected tecOd bit 7 tecOl 0 tccOZ2 0 ffeoount source flitecO bit 1 and 2 tecO3 0 tcecO4 0 fRising edge selectedi teccO bit 3 and 4 teclO0 0 tccll 0 f No filter tecl bit 0 and 1 tecOO0 1 ffcapture enabled for count start tecO bit 0 Figure 4 4 Sample output of Config c 3 PD Config c Notepad File Edit Format View Help f LEFREEREEREEREERKEERREKEEKEEKEEEKEEREEEEE th UART O Setting LL EFREEREEKEEKEEKEEEEEKEREKEEKRERERREREEE ffPoll for the status of Ti Transmit buffer empty flag in your UART 0 routine to check whether transmission has komplet smd0_uOmr 1 smdl_uOmr 0 smdzZ u0mr 0 ffClock synchronous serial I O mode selected uOmr bit 0 2 ckdir_u0mr 0 fInternal clock enabled u0mr bit 3 elkO u0cO 0 clkl udcO 0 f f E1SIO is selected u0cO bit O and 1 nch_uO0cO 0 ff CMOS output selected u0cO bit 5 ckpol_u0cO 0 fffalling edge u0cO bit 6 uform u0cO 0 ffLSB first u0cO bit 7 u0brg 239 f Setting transfer clock period for Clock Synchronous Calculated value is rown te ul0cl l re u0cl 0 ftransmission enabled uOcl bit 0 ti_uOcl 1 f Data present in UOTE reg
140. t High performance Embedded Workshop gt When the Welcome dialog box appears e Click the lt Administration gt button gt When the Tool Administration dialog box appears 20 RENESAS e Click on the lt Register gt button gt When the Select HEW Registration File Window appears surf to the folder in which the High performance Embedded Workshop or Renesas s integrated development environment is installed 1 e C Program Files Renesas HEW System SEC HewTargetServer e Double click on EcxHewTargetServer hrf Registration of EcxHewTargetServer dll has completed NOTE If EcxHewTargetServer dll becomes unnecessary after you have registered it use the Administration Window to unregister it Linking to HEW The Link to HEW option allows user to export the generated source codes into HEW only when HEW workspace is opened If HEW is not opened IO Wizard will help user to invoke HEW When Link to HEW option is selected and OK is being clicked on the Generate dialog a HEW Project Detected dialog as shown below will pop out to inform user that the generated files will be inserted into HEW workspace If there are existing files in the workspace the files will be overwritten HEW Project Detected Current Active Project FReC_pro The following files wil be inserted into the HEW workspace lf the files already exist they will be overwritten 1 config c 2 Config 3 Str Rect Ocoantig h
141. t SCI31 Bit Rate Value entered exceeded maximum value at SCI31 Bit Rate CENESAS Enter value of O p Compare H L for Timer F Formula Timer Value entered ms TMRF OCRF 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 11 for example of timer value for O o Compare H L calculation Enter value for O p Compare H L Valid range of TMRF OCRF is 0 65535 Formula Timer Value entered ms TMRF OCRF 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 11 for example of timer value for O o Compare H L calculation Enter value for O p Compare H L Valid range of TMRF OCRF is 0 65535 Formula Timer Value entered ms TMRF OCRF 1 x Internal Count Source Clock Refer to Section 5 6 Table list no 11 for example of timer value for O o Compare H L calculation Enter value of Duty Cycle for PWM Refer to Section 5 6 Table list no 12 for example of duty cycle value for PWM calculation Enter value for O p Duty Cycle Valid range of PWM PWDR is 0 16383 Refer to Section 5 6 Table list no 12 for example of duty cycle value for PWM calculation Enter value for O p Duty Cycle Valid range of PWM PWDR is 0 16383 Refer to Section 5 6 Table list no 12 for example of duty cycle value for PWM calculation Enter value of Bit Rate for SCI31 Formula SCI31 BRR Oscillator Clock 8 x M x Baud Rate 1 Refer to Section 5 6 Table list no 14 for example of bit rate valu
142. t Source System Clock n value of TA3 register high order address m value of TA3 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Formula Timer Value entered TA3 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Formula One shot Timer Value entered TA3 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation Maximum acceptable value is 65535 TA3 valid range 0 65535 Formula 16 bit H width value entered TA3 x Internal Count Source System Clock Refer to Section 5 3 Table list no 3 for example of 16 bit H width calculation Formula 8 bit H width value entered n x m 1 x Internal Count Source System Clock n value of TA3 register high order address m value of TA3 register low order address Refer to Section 5 3 Table list no 4 for example of 8 bit H width calculation Enter value for Timer A4 Formula Timer Value entered TA4 1 x Internal Count Source System Clock Refer to Section 5 3 Table list no 1 for example of timer value calculation Enter one shot timer value for Timer A4 Formula One shot Timer Value entered TA4 x Internal Count Source System Clock Refer to Section 5 3 Table list no 2 for example of One shot Timer value calculation 90 63
143. tage 7 Output disabled LIN i Both edges Output enabled ee Comparator 2 circuit edge COUT output enable fe Supply voltage VCC One ed g fo utput disabled VCMP2 pin input voltage ff Both edges i Output enabled Set IRQISEL IRO2SE bits YVCOUT1 output polarity Comparator ref voltage f Disabled Non inverted comparison f Internal reference voltage f Enabled i Inverted comparizon CVREF bin input voltage Timer RA Timer RB Timer RE Timer RF UART 0 UART 2 LIN Comparator Comment compasl 1 Comparator 1 and Comparator 2 selected piner4 bit 1 woacit 1 Both edges is selected weac bit 5 voac2 1 Both edges is 2elected weac bit 6 lem por 1 Output the inverted comparator 1 comparison result to YCOUT1 alcemr bit 0 lcm por 1 Output the inverted comparator 2 comparison result to YCOUT2 alcmr bit 1 cmioe 1 Output enabled is selected alcmr bit 2 cmZoe 1 Output enabled is selected alcmr bit 3 ww 1 f0 1 ww f1 0 AAOCO 5 divided by 2 is selected for Comparator 1iww2ec bit 4 and 5 wrea Wei ord APR rrd A WCeamnarater 1 miret enakled irea hi A inude hi TF and 1 lt HM CPU Clock On chip oscilatoridefaut Frequency Value 0 125 MHz CPU Clock Division Divide by 8 default Figure 3 27 Comparator Window for R8C 2G 2H and 2J E User is allowed to de activate or activate Comparator settings All settings are disabled when De activate radio button is selected To enable the settings click on Acti
144. tered exceeded maximum value at SI O3 Transfer Clock Period 16 o_o 162 Invalid value entered at SI O4 Transfer Clock Period 163 Invalid value entered at SI O4 Transmit Data 164 Value entered is below minimum value at SI O4 Transfer Clock Period u2brg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Enter 7 9 bits transmission data Example 1111000 is 7 bits 01001111 is 8 bits 100001111 is 9 bits Formula u2brg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation Formula u2brg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Formula u2brg 1 System Clock BRG Clock Select 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 11 for example of transfer clock period calculation Formula u2brg 1 System Clock BRG Clock Select Baud Rate entered x 16 Refer to Section 5 3 Table list no 12 for example of Baud Rate calculation Enter value for Transfer Clock Period Formula s3brg 1 System Clock Internal Clock Source 2 x Transfer Clock Period entered Refer to Section 5 3 Table list no 13 for example of Transfer Clock Period calculation Enter 8 bits transmission data
145. tererteterttterertrteterertetes fe 1O Wizard E ig SCS Pin Select Sok Open Drain S51 Signal Pin G fe CMOS g 2 C NMOS 2 Port 4 SoU Operation SCS Open Drain Sol TxRx Transter Clack Rate Port 6 Clock synchronous f Transmitter 1256 INT O 4oyvire bus is 0 Receiver INT 1 SSU Transter Order SSOR Clk Polarity Receiver Setting Transmitter Setting SoU Interrupt Priority Level Disabled Conflict error int Fx data full and overrun error int Tx end int INT 3 m l m Mot Used SU Transmit Data Key input interrupt LSB first fo l Timer RA Bidirectional Mode SSCK Cik Phase m ooo00000 x bits Timer FA C 0 Odd edge Timer RE T Timer RO Rx Single Stop Bit Tx Serial Output LARET O SoU Device Selection S50 Open Drain Output high UART 1 e Slave f CMOS ea Output low C Master CY AMS Timer RB Timer RE Timer RD UART O UART 1 LI SSU Comment mls_ssmr 0 Transter data at MEB first semr bit 7 chos_ssmr 0 WH when clock stopstssmr bit 5 chhs_ssmr 0 Change data at odd edgefsemr bit 5 te_sser 1 re_sser 0 rie_sser O teie_sser 0 tie Transmission enabled sser bit 4 a orer_sssr 0 Set overrun error flag to Ofsser bit 2 Interru pt Setti ng Window secri O0x20 The data outputs H after the serial data outputlsscri 200s _ s5mr2 0 NOMS output selected ssmr2 bit 2 ackos ssmr2 0 NOMS output selected ssmrz bit 3
146. teristics url http documentation renesas com eng products mpumcu rej03b0144_ r8c1atbds pdf R8C 22 R8C 23 Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0251_r8c2223hm pdf R8C 22 R8C 23 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rejO3b0097_r8c2223ds pdf R8C 24 R8C 25 Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej0O9b0244 r8c2425hm pdf 119 stENESAS R8C 24 R8C 25 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0117_r8c2425ds pdf R8C 26 R8C 27 Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rejO9b0278_ r8c2627hm pdf R8C 26 R8C 27 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0168_ r8c262
147. ternal Count Source System Clock n value of TAi register high order address m value of TAi register low order address Example to calculate value of TAi Desired H width value entered 1ms Based on the formula above if main clock is chosen and Internal clock source is divide by 2 8 bit H width value entered n x m 1 x Internal Count Source System Clock ims n x m 1 x 2 20MHz ims n x m 1 x 100ns n x m 1 1ms 100ns n x m 1 10000 Let m 1 n n 100 64h m 100 1 99 63h Hence TAIi 6463h CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Internal Count Source No division Divide by 2 Divide by 8 Divide by 32 Sub clock divide 32 Formula Timer Value entered TBi 1 x Internal Count Source System Clock Example to calculate value of TBI Desired timer value entered 1ms Based on the formula above if main clock is chosen and Internal clock source is divide by 2 Timer Value entered TBi 1 x Internal Count Source System Clock ims TBi 1 x 2 20MHz ims TBi 1 x 100ns TBi 1 1ms 100ns TBi 1 10000Hence TBi 10000 1 which is 9999 101 07 3 phase Motor Control Timer Dead Time 3 phase Motor Control Timer V phase PWM Duty Cycle RENESAS CPU Clock On chip oscillator gt 1MHz Main clock gt 20MHz Sub clock gt 32768Hz PLL clock gt 20MHz Formul
148. tion settings are supported while the unrelated setting are disabled For Timer AO A4 and Timer BO B2 user is allowed to enter count value in edit field or select selected timings available from the combobox dropdown list Calculated value for register setting is being round to the nearest whole number For Three phase Motor Control Timer fixed timings are supported in Carrier Wave Cycle Dead Time and PWM 50 Duty Cycle with fixed clock source fl User is allowed to select selected timings available from the combobox dropdown list Calculated value is being round to the nearest whole number Precaution Settings in three phase motor control timer will overwrite the settings made in Timer A1 A2 A4 and B4 in the generated output file For Timer S fixed timings are supported in Default Output Level and SR Waveform Level Set Width and Reset Width User is allowed to select selected timings available from the combobox dropdown list Calculated value is being round to the nearest whole number and is based on free running operation mode 44 3 4 5 DMA Window 10 Wizard Sel Key input interrupt Jzage Source Destination Direction Tranzter Count Timer 40 Timer 41 C De activate f Fixed Fixed fr Timer 42 Timer 43 Activate 0 Fised Forward Timer 4 4 Timer BO C Foryyvard Fixed Timer Bi Transter Bit Ed DMA Request Cause Address Pointer Timer B2 16 bits defautt i Three phase motor control timer SOUrCeE
149. to calculate value of TMRC TCC Desired timer value entered 1 ms Based on the formula above if Internal Count Source is Divide by 512 Timer Value entered ms 256 TMRC TCC x Internal Count Source Clock 1 ms 256 TMRC TCC x 512 5 MHz 256 TMRC TCC 1 ms X 5 MHz 512 TMRC TCC 256 1 ms x 5 MHz 512 Hence TMRC TCC 246 CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Int Count Source H Divide by 32 Divide by 16 Divide by 4 Divide by 4 Subclock Formula for Up Counter Timer Value entered ms 256 TMRF TCFH x Internal Count Source Clock Example to calculate value of TMRF TCFH Desired timer value entered 0 1 ms Based on the formula above if Internal Count Source is Divide by 32 Timer Value entered ms 256 TCFH x Internal Count Source Clock 0 1 ms 256 TMRF TCFH x 32 5 MHz 256 TMRF TCFH 0 1 ms X 5 MHz 32 TMRF TCFH 256 0 1 ms x 5 MHz 32 Hence TMRF TCFH 240 113 07 Timer F Timer 8 bits Timer F Timer 16 bits tENESAS CPU Clock System Clock gt 5 MHz Subclock gt 32 768KHz Int Count Source L Divide by 32 Divide by 16 Divide by 4 Divide by 4 Subclock Formula for Up Counter Timer Value entered ms 256 TMRF TCFL x Internal Count Source Clock Example to calculate value of TMRF TCFL Desired timer value entered 0 5 ms Based on the formula above if Internal Count Source is Divide by 4 Subcl
150. tup allows installation of multiple copies of IO Wizard application If a copy of IO Wizard is already installed on user s computer a dialog will prompt user whether to continue the new installation 2 2 3 Uninstall To uninstall go to Start Menu gt Control Panel gt Add or Remove Programs 2 2 4 IO Wizard folder After installation the following files folders are present in IO Wizard folder 1 IO Files Folder Generated Folder IO Wizard exe IO Wizard ini IO Wizard Read Me txt IO Wizard User s Manual IO Wizard FAQ IO Wizard Quick Start Guide SO NAKARWN 13 I0 Wizard Edit view Favorites Tools File and Folder Tasks Make a new Folder es Publish this Folder to the web Help Generated File Folder Io Files File Folder E3 Share this Folder 10 Wizard FAQ pdf Adobe Acrobat Document Other Places 100 KB 10 Wizard QuickStart pdf Adobe Acrobat Document 63 KE Details I0 Wizard File Folder Date Modified Today Movember 06 2007 11 31 4M L 10 Wizard 1 10 User s Manual pdf Adobe Acrobat Document IO Wizard exe Application IO Wizard Application o 10 Wizard ini Configuration Settings 2 KB IO Wizard Read Me kxt Text Document 7 KB Figure 2 9 IO Wizard Folder Structure Section 3 Operation Guide 3 1 Running IO Wizard E Double click the IO Wizard icon as shown in Figure 3 1 found at C Program Files Renesas IO Wizard or go to Start Menu
151. urce For Complementary PWM mode trdgro1 1 PWM3 Changing Point x Frequency of Count Source 2 Refer to no 110 example calculation Similar as Timer RD PWM1 Changing Point Enter 10h 20h 50h only Formula trdgra0 1 PWM Period x Frequency of Count Source Refer to no 102 example calculation Similar as Timer RD CHO PWM Period 81 tENESAS 115 Value entered is below minimum value at Formula 116 117 Timer RD TRDIOAO Pin Changing Point Value entered is below minimum value at Timer RD TRDIOBO Pin First Changing Point Value entered is below minimum value at Timer RD TRDIOBO Pin Second Changing Point trdgra0 1 TRDIOAO Pin Changing Point x Frequency of Count Source Refer to no 110 example calculation Similar as Timer RD PWM1 Changing Point Formula trdgro1 1 TRDIOB1 Pin First Changing Point x Frequency of Count Source Refer to no 110 example calculation Similar as Timer RD PWM1 Changing Point Formula trdgrb0 1 TRDIOB1 Pin Second Changing Point x Frequency of Count Source Refer to no 110 example calculation Similar as Timer RD PWM1 Changing Point 118 Invalid value entered at UART 2 TransferFormula 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 Clock Period Invalid value entered at UART 2 Baud Rate Invalid value entered at UART 2 Transmit Data Value entered is below minimum value at U
152. value entered at UART 0 Baud Rate Invalid value entered at UART 0 Transmit Data Value entered is below minimum value at UART 0 Transfer Clock Period Value entered is below minimum value at UART 0 Baud Rate Value entered exceeded maximum value at UART 0O Transfer Clock Period Value entered exceeded maximum value at UART O Baud Rate Invalid value entered at UART 1 Baud Rate Invalid value entered at UART 1 Transmit Data Value entered is below minimum value at UART 1 Baud Rate Value entered exceeded maximum value at UART 1 Baud Rate Invalid value entered at Timer C Compare Match Count Invalid value entered at Timer C Compare Match Count Value entered is below minimum value at Timer C Compare Match Count CENESAS CPU Clock On chip oscillator gt 125kHz Main clock gt 16MHz BRG Clock Select No division Divide by 8 Divide by 32 Formula uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 Example to calculate value of u0brg Desired baud rate entered 9600 bps Based on the formula above if main clock is chosen and BRG clock select is no division Note uObrg valid range is 0 255 uObrg 1 System Clock BRG Clock Select Baud Rate entered x 16 uObrg 1 16MHz 1 9600 x 16 uObrg 1 16MHz 153600 uObrg 1 104 166 uObrg 104 166 1 uObrg 103 166 uObrg 103 Round down to nearest whole number Enter 7 9 bits transmission
153. vate radio button E Settings are available for Comparator 1 and Comparator 2 36 Key input interrupt Timer RA Comparator A Comparator B Usage De activate Activate Enable Operation M Enable Comparator At V Enable Comparator 42 LY YCMP1 external input Supply voltage VCC LVCMP4 pin input voltage LY YCMP2 external input Supply voltage VCC C LVCMP pin input voltage Set IRQISELIRG2SE bits Comparator 41 digital filter Digital fiter enabled mode Digital fiter disabled mode Comparator 42 digital filter f Digital fiter enabled mode Digital fiter disabled mode Comparator 41 ref voltage Internal reference voltage f LWREF pin input voltage Comparator 42 ref voltage Internal reference voltage f LWREF pin input voltage Comparator 41 circuit edge Comparator 42 circuit edge Comparator 41 sampling clk fOCO 5 divided by 2 Y Comparator 42 sampling clk fOCO 5 divided by4 LYCOUT1 output polarity Non inverted comparison C Inverted comparison LYCOUT2 output polarity Non inverted comparison Inverted comparison LY YCOUT1 output enable Output disabled Output enabled LYCOUT 2 output enable Output disabled i Output enabled DTC f Disabled f Enabled One edge Both edges Timer RC Timer RE UART 0 UART 1 UART 2 LIN ADC Comment yoaz2 0 HSupply voltage CE is selected veaz bit 2 yoaz4 0 Supply wottage VCC is select
154. vers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0225 r8c35ads pdf 121 tENESAS Appendix B Related Documents for M16C This section contains links to all the related documentation that should be required to familiarise yourself with M16C microcontroller Documents Description M16C 26A Group Hardware Manual Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics url http documentation renesas com eng products mpumcu rej09b0202_ 16c26ahm pdf Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics M16C 28 Group Hardware Manual url http documentation renesas com eng products mpumcu rej09b0047_16c28hm pdf M1i6C 28 Group Datasheet Covers hardware overview and electrical characteristics url http documentation renesas com eng products mpumcu rej03b0151_m30280fxwgds pdf Hardware specifications pin assignments memory maps peripheral specifications electrical characteristics M16C 29 Group Hardware Manual url http documentation renesas com eng products mpumcu rej09b0101_16c29hm pdf 122 ENESAS Appendix C Related Documents for
155. version Method Timer 2 f Without sample and hold Three phase motor control timer i 0 group Shin Z AID Sweep Pin Select Janoct pin zl Trigger Select AMO Z One shet ka Software Trigger f Vith sample and hold Analog Input Pin AWD Operating Mode hMutti master 20 bus CAM xe UART 1 UART 2 isd FL sl Mutti master 2 bus CAM ADE 4 bits 0 f6 bit mode selectedtadcant bit 3 smp 0 Without sample and hold selectediadconz bit 0 adg el0 0 adgqeell U Port P10 group AND selectediadcon2 bit 1 and 2 out 1 chO 0 chi 0 ch2 0 HANO selectediadcond bit 0 2 mdQ 0 mat 0 md2 0 ffone shot mode selectediadcond bit 3 4 adconi bit 2 cks0 0 cke1 1 cke2 0 PAD selectediadcond bit 7 adcon bit 4 adcon2 bit 4 trg 0 MSottyvare trigger selected iadcond bit 5 CPU Clock On chip oscillatoride taut Frequency Value 1MHz ae CPU Clock Division Divided by 8idetault Figure 3 40 ADC Window User is allowed to de activate or activate ADC settings All settings are disabled when De activate radio button is selected To enable the settings click on Activate radio button User is able to do settings like selecting A D input group analog input pin operating mode and resolution ADC supports 8 different types of operating mode One shot mode Repeat mode Single sweep mode Repeat sweep mode 0 Repeat sweep mode 1 Simultaneous sample sweep mode Delayed trigger mode 0 Delayed trigger mode 1 For each o
156. y of Count Source trdgra0 1 0 1ms x 20MHZ 8 trdgra0 1 0 ims x 2500000 trdgra0 1 250 trdgraO 250 1 Therefore trdgra0 249 Formula trdgrc0 1 CHO Inactive Width x Frequency of Count Source Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO Formula trdgrd0 1 CHO Inactive Width x Frequency of Count Source Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO Formula Timer RD CH1 Inactive Width TRDIOB1 trdgrb1 1 CH1 Inactive Width x Frequency of Count Source 108 Value entered is below minimum value at Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO Formula Timer RD CH1 Inactive Width TRDIOC1 trdgrc1 1 CH1 Inactive Width x Frequency of Count Source 109 Value entered is below minimum value at Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO Formula Timer RD CH1 Inactive Width TRDIOD1 trdgrd1 1 CH1 Inactive Width x Frequency of Count Source Refer to no 104 example calculation Similar as Timer RD CHO Inactive Width TRDIOBO 80 110 Value entered is below minimum value at Timer RD PWM1 Changing Point 111 Value entered is below minimum value at Timer RD PWM2 Changing Point 112 Value entered is below minimum value at Timer RD PWM3 Changing Point 113 Value entered is below minimum value at Timer RD D
157. zs z P A A z T All peripherals settings will be reset to default Do you want to continue 4 7 Pull ups On Do not show this message again INT 3 Key input interru 4 ok Cancel l prc2 1 pd0 0 00 Port PO direction register CPU Clock On chip oscillator detaut Frequency Value 0 125 MHz CPU Clock Division Divide by amp default ee EEEEEEEEEEEE Figure 3 8 Warning Dialog Click to generate Files Figure 3 9 Generate button After all settings are done user can click lt Generate gt button to run code generation User is still allow to amend peripheral settings before clicking the button 3 2 2 Keyboard selection User can now use the keyboard to make the selection E Press Ctrl key to move cursor into or out of IO Setting Area and interrupt setting window E Press Tab key to move cursor to next control element E Press Up and Down keys to change selection E Press Space key to check a Checkbox E When the lt Generate gt button is highlighted user can press Space key to generate code 19 3 2 3 Link to HEW Generate f Output Contig c to folder me Figure 3 10 Generate dialog After lt Generate gt botton is clicked a Generate dialog as shown above will pop out to prompt user to save the generated files to their desired folder directory The generate dialog box now support 2 options for user to generate source files They are Output the source files to sp

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