Errata to RX230 Group, RX231 Group User`s Manual: Hardware
Contents
1. e Page 1889 of 1968 Normal output mode row in Table 50 20 Output Values of Voltage 3 is modified as follows Before correction Item Symbol Min Test Conditions omitted Output All output Normal output mode Von VCC 0 8 lon 2 0mA high ports High drive output VCC 0 8 lon 4 0mA mode After correction Item Symbol Min A Test Conditions omitted Output All output Normal Ports 03 05 Von AVCCO 0 8 lon 2 0mMA high ports output 07 ports 40 mode to 47 Ports other VCC 0 8 than above High drive output VCC 0 8 lon 4 0mMA mode Xe Page 6 of 11 8 lt ENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 e Page 1893 of 1968 Figure 50 13 VOH VOL and IOH IOL Voltage Characteristics at Ta 25 C When High Drive Output is Selected Reference Data is corrected as follows Before correction lon lo VS Vou Vor low lot MA Vox Vor V After correction lon lot VS Vou Vor a vcc 5 5v a scot 2 VCC 1 8V low lo MA RE Page 7 of 11 1KENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 e Page 1896 of 1968 Figure 50 18 VOL and IOL Voltage Characteristics of RIIC Output Pin at Ta 25 C Reference Data is corrected as follows Before correction After correction RE Page 8 of 11 sKL2. Increment for IWDT operation Increment for RTC operation Use IWDT Dedicated On Chip Oscillator for clock source RCR3 RTCDV 2 0 set to low drive capacity RCR3 RTCDV 2 0 set to normal drive capacity e Page 1885 of 1968 Operating current for LVD1 LVD2 and CTSU are added to Table 50 11 DC Characteristics 9 as follows Before change Item Typ 7 Test Condition Symbol 0 7 During A D conversion at high speed Analog power Supply current conversion lavcc omitted Temperature sensor 6 lTEMP Comparator B operating current 6 Window mode Comparator high speed mode per channel Comparator low speed mode per lop channel After change Item i Test Condition Symbol During A D conversion at high speed Analog power Supply current conversion lavec omitted LVD1 and LVD2 operating current 6 Per channel livo Temperature sensor 6 Comparator B operating current 6 Window mode Comparator high speed mode _ per channel Comparator channel low speed mode per CTSU operating current 6 When sleep mode Base clock 2 MHz Pin capacitance 50 pF RENESAS Page 4 of 11 RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 e Page 1887 of 1968 Values in Table 50 16 Permissible Output Cur
3. 1 e If the direction setting is for output PORTn PDR 1 the pin is released 1 2 Ports 0 4 Ifthe direction setting is for input PORTn PDR 0 the corresponding pin is connected to AVCCO pulled up via a resistor or to AVSSO pulled down via a resistor 1 e If the direction setting is for output PORTn PDR 1 the pin is released 1 2 VREFHO Connect this pin to AVCCO VREFLO Connect this pin to AVSSO VREFH Connect this pin to AVCCO VREFL Connect this pin to AVSSO e Page 1820 of 1968 Step 3 in Figure 49 13 Procedure to Issue the Program Command for the E2 DataFlash is modified as follows Before correction Set programming data in registers FWB2 and FWB3 After correction Set programming data in registers RE Page 2 of 11 1LKENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 e Page 1873 of 1968 Input voltage row in Table 50 1 Absolute Maximum Ratings is modified as follows Before correction Item Symbol Value Unit omitted Input voltage Except for ports for 5 Vin 0 3 to VCC 0 3 V V tolerant 1 Ports for 5 V 0 3 to 6 5 tolerant 1 After correction Item Symbol Value Unit omitted Input voltage Ports for 5 V Vin 0 3 to 6 5 V tolerant 1 Ports 03 05 07 0 3 to AVCC0 0 3 Ports 40 to 47 Ports other than 0 3 to VCC 0 3 above e Page 1875 of 1968 AVT row in Table 50 3 DC Characteristics 1 is
4. Conditions omitted Voltage detection level Voltage detection circuit LVDO 1 Vaeto_o 3 67 3 84 Vaeto 1 2 70 2 82 Vaeto_2 2 37 2 51 Vaeto_3 1 79 1 90 Figure 50 74 At falling edge VCC Voltage detection circuit LVD1 2 Vaett_o 4 12 4 29 omitted Vaett_p 1 76 1 86 Figure 50 75 At falling edge VCC Voltage detection circuit LVD2 3 Vaet2_0 4 08 4 29 Vaet2_1 3 85 4 14 Vaet2_2 3 82 4 02 Vaet2 3 3 62 3 84 Figure 50 76 At falling edge VCC Note 3 n in the symbol Vdet2_n denotes the value of the LYVDLVLR LVD2LVL 3 0 bits Note 4 Vdet2_0 selection can be used only when the CMPA2 pin input voltage is selected and cannot be used when the power supply voltage VCC is selected After correction Symbol Min Typ Test Conditions omitted Voltage detection level Voltage detection circuit LVDO 1 V deto _0 3 67 3 84 Vaeto 1 2 70 2 82 Vaeto_2 2 37 2 51 Vaeto_3 1 80 1 90 Figure 50 74 At falling edge VCC Voltage detection circuit LVD1 2 Vaett_o 4 12 4 29 omitted Vaett_b 1 80 1 86 Figure 50 75 At falling edge VCC Voltage detection circuit LVD2 3 Vaet2_o 4 08 4 29 Vaet2_1 3 95 4 14 Vaet2_2 3 82 4 02 Vaet2 3 3 62 3 84 Figure 50 76 At falling edge VCC Note 3 n in the symbol Vdet2_n denotes the value of the LVDLVLR LV
5. D2LVL 1 0 bits Page 1959 of 1968 Dimensions in Figure B 100 Pin LQFP PLQP0100KB B are modified as follows Before correction Reference Dimension in Millimeters Symbol Norm D 14 0 A te After correction Reference Dimension in Millimeters Symbol Norm D 14 0 A 7tENESAS Page 10 of 11 RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 e Page 1962 of 1968 Dimensions in Figure E 64 pin LQFP PLQP0064KB C are modified as follows Before correction Reference Dimension in Millimeters Symbol i Norm D 10 0 A ts After correction Reference Dimension in Millimeters Symbol i Norm D 10 0 A 8 Page 1964 of 1968 Dimensions in Figure G 48 pin LQFP PLQP0048KB B are modified as follows Before correction Reference Dimension in Millimeters Symbol i Norm D 7 0 A 8 After correction Reference Dimension in Millimeters Symbol i Norm D 7 0 A te ze Page 11 of 11 8 lt ENESAS
6. Date Oct 27 2015 RENESAS TECHNICAL UPDATE TOYOSU FORESIA 3 2 24 Toyosu Koto ku Tokyo 135 0061 Japan Renesas Electronics Corporation Product ipucu Document TN RX A137A E Rev 1 00 Category No Title Errata to RX230 Group RX231 Group User s Information Technical Notification Manual Hardware Category Lot No Applicable Referenc RX230 Group RX231 Group RX230 Group RX231 Group User s Manual Hardware Products Al Document Rey 1 00 RO1UH0496EJ0100 This document describes additions of electrical characteristics and corrections to the RX230 Group RX231 Group User s Manual Hardware Rev 1 00 e Page 291 of 1968 Description for the VBTLVDLVL 1 0 bits in 12 2 1 VBATT Control Register VBATTCR is modified as follows Before correction VBTLVDLVL 1 0 Bit VBATT Pin Voltage Drop Detection Level Select These bits are used to select the detection voltage level Vdetvbt when the voltage drop detection function of the VBATT pin is enabled After correction VBTLVDLVL 1 0 VBATT Pin Voltage Drop Detection Level Select These bits are used to select the detection voltage level Vdetvbt when the voltage drop detection function of the VBATT pin is enabled VBTLVDLYVLI1 0 bits are enabled when the VBATTCR VBATTDIS bit is 0 battery backup function enabled e Page 292 of 1968 Description for the VBTLVDMON flag in 12 2 2 VBATT Status Register VBATTSR is modified
7. KENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 e Page 1898 of 1968 Note 3 in Table 50 21 Operating Frequency Value High Speed Operating Mode is corrected as follows Before correction Note 3 The VCC_USB range is 3 0 to 3 6 V when the USB clock is in use After correction Note 3 The VCC_USB range is 3 0 to 5 5 V when the USB clock is in use e Page 1898 of 1968 Note 3 in Table 50 22 Operating Frequency Value Middle Speed Operating Mode is corrected as follows Before correction Note 3 The VCC_USB range is 3 0 to 3 6 V when the USB clock is in use After correction Note 3 The VCC_USB range is 3 0 to 5 5 V when the USB clock is in use e Page 1900 of 1968 Operating condition in Table 50 26 Clock Timing is corrected as follows Before correction Test Conditions Main clock oscillator 2 4 lt VCC lt 3 6 oscillation 1 8 lt VCC lt 2 4 frequency z After correction Test Conditions Main clock oscillator 2 4 lt VCC lt 5 5 oscillation 1 8 lt VCC lt 2 4 frequency 2 e Page 1941 of 1968 Value in Table 50 57 Characteristics of Power On Reset Circuit and Voltage Detection Circuit 1 is corrected Note 3 is modified and Note 4 is deleted as follows ze Page 9 of 11 lt ENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Before correction Date Oct 27 2015 Symbol Min Typ Test
8. as follows Before correction VBTLVDMON Flag VBATT Pin Voltage Monitor Flag This flag indicates whether the VBATT pin voltage is below Vdetvbt This flag is enabled only when the battery backup function is enabled the VBATTCR VBATTDIS bit is 0 After correction VBTLVDMON Flag VBATT Pin Voltage Monitor Flag This flag indicates whether the VBATT pin voltage is below Vdetvbt This flag is enabled when the VBATTCR VBATTDIS bit is 0 battery backup function enabled and the VBATTCR VBTLVDEN bit is 1 VBATT pin voltage drop detection enabled c 2015 Renesas Electronics Corporation All rights reserved Page 1 of 11 stENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 e Page 544 of 1968 Table 21 6 Unused Pin Configuration is modified as follows Before correction Pin Name Description omitted Ports 0 to 5 e Ifthe direction setting is for input PORTn PDR 0 the corresponding pin is connected Ports A to E H to VCC pulled up J via a resistor or to VSS pulled down via a resistor 1 e If the direction setting is for output PORTn PDR 1 the pin is released 1 2 VREFHO Connect this pin to AVCCO VREFLO Connect this pin to AVSSO After correction Pin Name Description omitted Ports 1 to 3 5 e Ifthe direction setting is for input PORTn PDR 0 the corresponding pin is connected Ports A to E H to VCC pulled up J via a resistor or to VSS pulled down via a resistor
9. modified as follows Before correction Item Symbol Min i Test Conditions omitted Schmitt trigger Ports 03 05 07 AVT AVCCOx0 1 input voltage ports 40 to 47 RIIC input pin VCCx0 05 except for SMBus Other than RIIC VCCx0 1 input pin After correction Item Min 3 Test Conditions omitted Schmitt trigger Ports 03 05 07 AVCCOXx0 1 input voltage ports 40 to 47 RIIC input pin VCCx0 05 except for SMBus Ports 12 13 16 17 VCCx0 05 Ports B5 Other than RIIC VCCx0 1 input pin e Page 1881 of 1968 Units mA and MHz and value 32 in Figure 50 3 Voltage Dependency in Low Speed Operating Mode Reference Data are corrected as follows Before correction ICC mA ICLK 32MHz After correction ICC uA Xe Page 3 of 11 lt ENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 ICLK 32 768kHz e Page 1882 of 1968 Increment for LPT operation and Increment for IWDT operation are added to Table 50 8 DC Characteristics 6 as follows Before change Item Symbol omitted Test Condition Supply Current After change Increment for RTC operation Item RCR3 RTCDV 2 0 set to low drive capacity RCR3 RTCDV 2 0 set to normal drive capacity Test Condition Symbol omitted Supply Current Increment for LPT operation Icc
10. rents 1 are corrected as follows Before correction Item Permissible output low current Total of ports 40 to 47 ports 03 05 07 Total of ports 12 to 17 ports 20 to 27 ports 30 to 37 port PJ3 omitted Permissible output high current Total of ports 40 to 47 ports 03 05 07 Total of ports 12 to 17 ports 20 to 27 ports 30 to 37 port PJ3 After correction Item Permissible output low current Total of ports 40 to 47 ports 03 05 07 Total of ports 12 to 17 ports 20 to 27 ports 30 to 37 port PJ3 omitted Permissible output high current Total of ports 40 to 47 ports 03 05 07 Total of ports 12 to 17 ports 20 to 27 ports 30 to 37 port PJ3 e Page 1888 of 1968 Value in Table 51 17 Output Permissible Currents 2 is corrected as follows Before correction Item omitted Permissible output high current Ports 40 to 47 ports 03 05 07 ports 36 37 maximum value per pin Ports other than Normal output mode above High drive output mode After correction Item omitted Permissible output high current Ports 40 to 47 ports 03 05 07 ports 36 37 maximum value per pin Ports other than Normal output mode above High drive output mode e Page 1889 of 1968 Normal output mode row in Table 50 18 Output Values of Voltage 1 is modified as follow
11. s Before correction Item Symbol Min Test Conditions omitted Output All output Normal output mode Von VCC 0 5 lon 0 5mA high ports High drive output VCC 0 5 lon 1 0mA mode After correction ze Page 5 of 11 lt ENESAS RENESAS TECHNICAL UPDATE TN RX A137A E Date Oct 27 2015 Symbol Min Test Conditions omitted All output Normal Ports 03 05 Vox AVCCO 0 5 lon 0 5mA ports output 07 ports 40 mode to 47 Ports other VCC 0 5 than above High drive output VCC 0 5 lon 1 0MA mode e Page 1889 of 1968 Normal output mode row in Table 50 19 Output Values of Voltage 2 is modified as follows Before correction Item Symbol in Test Conditions omitted Output RIIC pins Standard mode VoL z lo 3 0MA low Fast mode lo 6 0mMA Output All output Normal output mode Vou lon 1 0mMA high ports High drive output mode lon 2 0mA After correction Item Symbol in Test Conditions omitted Output RIIC pins Standard mode Normal Vor lo 3 0mMA low output mode Fast mode High drive lo 6 0mMA output mode Output All output Normal Ports 03 05 AVCCO 0 8 lon 1 0MA high ports output 07 ports 40 to mode 47 Ports other VCC 0 8 than above High drive output mode VCC 0 8 lon 2 0mA
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