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1. 18 Add touch screen 1C Add GPIB iView external oscilloscope cable kit requires TLA Application SW V5 0 or greater 2C Add USB iView external oscilloscope cable kit requires TLA Application SW V5 8 or greater PO Add accessory pouch TL Add TekLink cable www tektronix com 7 Data Sheet Recommended Accessories Accessory Logic Analyzer Cart LACART K4000 016 1522 xx 020 2664 xx 650 4815 xx Power Plug Options Option A0 A1 A2 A3 A4 A5 A6 A10 A11 A12 A99 Language Options Option LO L5 L10 L99 8 www tektronix com Description 2 shelf Cart 3 shelf Cart Wheeled Transport Case Rackmount Kit Additional Removable Hard Drive Assembly No SW Description North America power Universal Euro power United Kingdom power Australia power 240 V North America power Switzerland power Japan power China power India power Brazil power No power cord or AC adapter Description English Manual Japanese Manual Russian Manual No Manual Service Options Option C3 C5 D1 D3 D5 R3 R5 S1 S3 R3DW RoDW Upgrades Description Calibration Service 3 Years Calibration Service 5 Years Calibration Data Report Calibration Data Report 3 Years with Option C3 Calibration Data Report 5 Years with Option C5 Repair Service 3 Years Repair Service 5 Years On site Service 1 Year On site Service 3 Years with R or C options Repair Service Coverage 3 Years includes prod
2. 4 ns or 8 ns 16 0 ns Setup and Hold Window All channels 625 ps typical Single channel 500 ps typical Minimum Clock Pulse 500 ps 700 ps P6810 Width Active Clock Edge 400 ps Separation Demux Channel Selection Channels can be demultiplexed to other channels through user interface with 8 channel granularity 6 www tektronix com Timing Acquisition Characteristics with P6800 or P6900 Series probes Characteristic MagniVu Timing MagniVu Timing Record Length Deep Timing Resolution Quarter Half Full channels Deep Timing Resolution with Glitch Storage Enabled Deep Timing Record Length Quarter Half Full channels with time stamps and with or without transitional storage Deep Timing Record Length with Glitch Storage Enabled Channel to Channel Skew Minimum Recognizable Pulse Glitch Width Single channel Minimum Detectable Setup Hold Violation Minimum Recognizable Multichannel Trigger Event Description 125 ps max adjustments to 250 ps 500 ps 1 ns and 2 ns 16 Kb per channel with adjustable trigger position 500 ps 1 ns 2 ns to 50 ms 4 ns to 50 ms 8 4 2 Mb 32 16 8 Mb 128 64 32 Mb 512 256 123 Mb per channel Half of default main memory depth 300 ps typical 500 ps P6960 P6964 P6980 P6982 P6860 P6864 P6880 750 ps P6810 250 ps Sample period channel to channel skew Analog Acquisition Characteristics with P6800 or P6900 Series probes
3. Characteristic Bandwidth Attenuation Offset and Gain Accuracy Channels Demultiplexed Run Stop Requirements iCapture Analog Outputs iCapture Analog Output BNC Cable Description 2 GHz typical 10X 1 50 mV 2 of signal amplitude 4 None analog outputs are always active Compatible with any supported Tektronix oscilloscope Low loss 10X 36 in Basic Analog Multiplexer functionality is offered standard on all TLA6000 models This routes 4 fixed channels to the iCapture Analog Output BNCs The outputs cannot be switched to other logic analyzer channels Option AM enables full analog multiplexer control and allows the routing of any 4 logic analyzer channels to the iCapture Analog Output BNCs Trigger Characteristics Characteristic Independent Trigger States Maximum Independent If Then Clauses per State Maximum Number of Events per If Then Clause Maximum Number of Actions per If Then Clause Maximum Number of Trigger Events Number of Word Recognizers Number of Transition Recognizers Number of Range Recognizers Number of Counters Timers Trigger Event Types Trigger Action Types Maximum Triggerable Data Rate Trigger Sequence Rate Counter Timer Range Counter Rate Timer Clock Rate Counter Timer Latency Range Recognizers Setup and Hold Violation Recognizer Setup Time Range Setup and Hold Violation Recognizer Hold Time Range Trigger Position MagniVu
4. Tektronix Logic Analyzers TLA6000 Series Data Sheet voe Q alti t utt Je lt LU t ul Features amp Benefits Comprehensive Set of Signal Integrity Tools that Allow You to Quickly Isolate Identify and Debug Complex Signal Integrity Issues Glitch Trigger and Storage Allows you to trigger on and highlight potential signal integrity problems Not only can the TLA6000 Series trigger on the problem but by highlighting suspected problems in red you will be able to easily determine which signals you need to investigate further iCapture Route the suspected signal to the analog output of the TLA6000 using the exclusive Tektronix iCapture feature This eliminates the need to double probe with an oscilloscope probe reducing time to debug iView Time correlated view of both logic analyzer and oscilloscope data to trace the SI problem across the digital and analog domain Performance and Ease of Use to Debug Validate and Optimize Digital Systems 125 ps Resolution MagniVu Acquisition to Accurately See Signal Relationships in Your System State Speed Sample your fastest synchronous buses with clock rates up to 800 MHz and data rates up to 1 25 Gb s 15 in Display with Optional Touch Screen to See More of Your Data and Navigate Efficiently through Your Data 3 Models with 68 102 136 Channels and Up to 128 Mb Record Length offer Flexible Solu
5. Trigger Position Storage Control Data qualification Description 16 16 18 2 counters timers plus any 16 other resources 16 16 Word Group Channel Transition Range Anything Counter Value Timer Value Signal Glitch Setup and Hold Violation Snapshot Trigger Module Trigger All Modules Trigger Main Trigger MagniVu Store Don t Store Store Sample Increment Counter Decrement Counter Reset Counter Start Timer Stop Timer Reset Timer Snapshot Current Sample Goto State Set Clear Signal Do Nothing 1250 Mb s 4X clocking mode DC to 500 MHz 2 ns 51 bits each gt 50 days at 2 ns DC to 500 MHz 2 ns 500 MHz 2 ns 2 ns Double bounded 408 channel max Can be as wide as any group must be grouped according to specified order of significance From 8 ns before to 7 ns after clock edge in 125 ps increments This range may be shifted towards the positive region by 0 ns A ns or 8 ns From 7 ns before to 8 ns after clock edge in 125 ps increments This range may be shifted towards the positive region by O ns 8 8 ns 4 ns 12 4 ns or 8 ns 16 0 ns Any data sample MagniVu position can be set from 096 to 6096 centered around the MagniVu trigger Global conditional by state start stop block by trigger action or transitional Also force main prefill selection available Tektronix Logic Analyzers TLA6000 Series Ordering Information TLA6202 68 channel Logic Analyz
6. defined Separate selection for each of the clock qualifier channels and one per group of 16 data channels for each 34 channel probe 35 mV 1 2 5 V to 5 0 V 15 V 300 mV single ended Vmax VMN gt 150 mV differential 200 mV ns typical www tektronix com 5 Data Sheet Differential input 150 mV swing each side V V max 1 15 V N aM OV Difference 1V V min Differential equivalent signal input 300 mV swing as viewed by the logic analyzer and the analog probe output 150 mV OV Difference VTH 0V OV _ 150 mV Note For differential inputs the module threshold should be set to OV assuming no common mode error Note See online help for further analog output details State Acquisition Characteristics with P6800 or P6900 Series probes Full Channel Half Channel Quarter Channel 235 MHz 450 MHz 450 Mb s or 450 MHz 900 Mb s 470 Mb s DDR 450 MHz Optional 800 MHz 800 Mb s or 625 MHz 1 25 Gb s 900 Mb s DDR Note When using SQUIRE adapters the maximum clock rate data rate is 300 MHz 600 Mb s Characteristic State Record Length with Time Stamps Description Quarter Half Full channels 8 4 2 Mb 32 16 8 Mb 128 64 32 Mb 512 256 128 Mb per channel Setup and Hold Time Selection Range From 16 ns before to 8 ns after clock edge in 125 ps increments Range may be shifted towards the setup region by 0 ns 8 8 ns 4 ns 12
7. Port USB 2 0 Port Integral Controls Characteristic Front panel Display Simultaneous Display Capability Front Panel Touch Screen 4 www tektronix com 68 channels 4 are clock channels 102 channels 4 are clock and 2 are qualifier channels 136 channels 4 are clock and 4 are qualifier channels No limit to number of groups or number of channels per group all channels can be reused in multiple groups 51 bits at 125 ps resolution 3 25 days duration Asynchronous Synchronous 8 GHz MagniVu high speed timing is available simultaneous with all modes The TLA6000 Series can be used as either a master or expansion mainframe in systems consisting of up to 8 TLA6000 TLA7000 instruments A TL708EX Instrument Hub and Expander is required when connecting 3 8 instruments together using TekLink cables Description Microsoft Windows XP Professional and Multilingual User Interface Pack 2 2 GHz Intel Core 2 Duo T7500 Intel 965GME 1 GB DDR2 expandable to 2 GB DDR memory Line In Line Out and Mic Out connectors 3 5 in 280 GB Serial ATA 7200 RPM Internal 4 7 GB DVD R RW One 1 DVI I primary digital and analog connector and one 1 VGA connector Up to 1600x1200 noninterlaced at 32 bit color each for both primary and secondary displays Two 2 10 100 1000 LAN with RJ 45 connector Seven 7 three 3 in front and four 4 in rear Description Size 15 in 38 1 cm diagonal Type Active m
8. atrix color TFT LCD with backlight Resolution 1024x768 Both the front panel and one external display can be used simultaneously at 1024x768 resolution General purpose knob with dedicated hotkeys and knobs for horizontal and vertical scaling and scrolling Available with Option 18 Integrated View iView Capability Characteristic TLA Mainframe Configuration Requirements Number of Tektronix Oscilloscopes that can be Connected to a TLA System External Oscilloscopes Supported TLA Connections Oscilloscope Connections GPIB iView Opt 1C USB iView Opt 2C Setup Data Correlation Deskew GPIB iView Opt 2C External Oscilloscope Cable Length USB iView Opt 2C External Oscilloscope Cable Length Symbolic Support Characteristic Number of Symbols Ranges Object File Formats Supported Description GPIB iView Opt 1C requires TLA Application Software V5 0 or greater USB iView Opt 2C requires TLA Application Software V5 8 or greater 1 More than 100 For a complete listing of currently supported oscilloscopes please visit our website http www tektronix com iview USB Trigger In Trigger Out Clock Out GPIB Trigger In Trigger Out Clock In when available USB Device Port Trigger In Trigger Out iView external oscilloscope wizard automates setup After oscilloscope acquisition is complete the data is automatically transferred to the TLA and time correla
9. effectively validate and debug the functionality of your digital designs Use the patented 8 GHz MagniVu technology to accurately measure timing relationships The single integrated acquisition architecture of the TLA6000 Series eliminates the timing skew problems inherent in other logic analyzer architectures Capture on buses with clock rates up to 800 MHz and data rates up to 1 25 Gb s Buy the capability you need now and upgrade as your measurement needs grow Quickly isolate events through a simple and intuitive drag and drop trigger setup Easily summarize your design s performance with sophisticated drag and drop measurements such as frequency period pulse width duty cycle and edge count View data in a variety of time correlated formats including waveform listing graph disassembly source code or compare 2 www tektronix com Find Tough Signal Integrity Problems Today s logic analyzers not only need to help troubleshoot functional issues in your design but also need to help find signal integrity problems caused by crosstalk termination mismatches ground bounce and other issues To help debug these problems the TLA6000 Series includes a comprehensive suite of signal debug tools These tools allow you to Use glitch trigger to monitor selected signals in your design and trigger when a signal integrity problem is found on any one of these signals Automatically tag any found signal integrity probl
10. ems allowing you to quickly identify the signals of interest Gain more insight into the problem using the exclusive iCapture functionality to view both digital and analog data through a single probe Use iView to see time correlated digital and analog displays of your data letting you track the signal integrity problem across both analog and digital domains Tektronix Logic Analyzers TLA6000 Series 5_DoR3o 28 8_DOR30_2E 8 00130_26 E DDKdD 28 addr ess Mnemonic Data DESL IGNORE COMMAND T T risale ii ciis IGNORE COMWAND 7 0 oon on n n T Ree EN IGNORE COMMAND IGNORE COMMAND un nn D IGNORE COMMAND IGNORE COMMAND IGNORE CCMMAND SL IGNORE COMMAND _ IM crete nt Le 004 0000 nn nm nen 00 06800060 anis aues ah inset m 00 02000000 10000000 08000000 RA ET 40000000 20000000 E 00000001 80000000 WX DE EEE 00000004 00000002 in IM 6 oooooo nu RD command to erk w h LO gai overdivig sense a RD command to rank with O gating overdriving sense a E RD command to rank with Vo gating overdriving sense a fo dici ee fiers because of write WR or WRA command Rank Memory Chip Interpos
11. er Ne TERN Violation Reporting DDR2 Protocol Debug and Validation DDR2 memory systems are used in many of today s embedded designs commonly implemented as a bus on the microprocessor or as a block in an FPGA The complexity of the DDR2 protocol and the number of command data address signals make it difficult to both visualize the operation of the bus and to isolate any potential problems In addition insi EE designers need to ensure that signal timing and interfaces comply with DDR Analysis JEDEC standards The TLA6000 DDR2x8 and DDR2x16 options provide a complete easy to use DDR2 test solution for embedded DDR2 designs up TLA6000 Selection Guide to DDR2 800 using x4 x8 and x16 data width DDR2 devices Utilization Summary of Data Characteristic TLA6202 TLA6203 TLA6204 These options consist of set of tools designed to provide visibility to all Channels 68 102 136 address data and control signals The bundle includes High speed Timing 8 GHz 125 ps with 16 Kb record length Memory chip interposers that provide a convenient way of probing Maximum Timing 2 GHz 1 GHz 500 MHz embedded DDR memory systems and eliminates the need to design An in probe access points These memory chip interposers work with channel the unique iCapture Analog Mux feature of the TLA6000 to provide Maximum Stale 450 MHz 450 MHz 235 MHz standard a single probing solution for both the logic analyzer and oscillosco
12. er module 8 GHz timing 235 MHz state 2 Mb record length Options for up to 128 Mb record length and or up to 450 MHz state TLA6203 102 channel Logic Analyzer module 8 GHz timing 235 MHz state 2 Mb record length Options for up to 128 Mb record length and or up to 450 MHz state TLA6204 136 channel Logic Analyzer module 8 GHz timing 235 MHz state 2 Mb record length Options for up to 128 Mb record length and or up to 450 MHz state All Include Mini Keyboard 119 7275 xx Optical Wheel Mouse 119 7054 xx Front panel cover 200 4939 xx TLA Application Software CD 063 3881 xx Certificate of Traceable Calibration Note Please specify probe power language and service options when ordering Instrument Options Option Description 1P Add full complement of P6810 General purpose probes 2P Add full complement of P6434 Mictor probes Includes SQUIRE adapters 3P Add full complement of P6960 D Max probes 1S Increase to 8 Mb record length 29 Increase to 32 Mb record length 3S Increase to 128 Mb record length DDR2x8 DDR2 Analysis for x4 and x8 Devices includes Socketed Memory Chip Interposer and necessary cables TLA6203 and TLA6204 only requires TLA Application SW V5 8 or greater DDR2x16 DDR2 Analysis for x16 Devices includes Socketed Memory Chip Interposer and necessary cables TLA6204 only requires TLA Application SW V5 8 or greater 45 Increase state speed to 450 MHz AM Add full analog mux control
13. odules adjustable threshold between 0 5 V and 1 5 V level sensitive Description 90 250 V AC at 45 66 Hz 100 132 V AC at 360 440 Hz 7 A maximum at 90 V AC 70 A surge 750 W maximum Description Operating 5 C to 45 C Nonoperating 20 C to 60 C 20 to 80 Operating s30 C 80 relative humidity 29 C maximum wet bulb temperature Nonoperating 8 to 80 29 C maximum wet bulb temperature Operating 1 000 ft to 10 000 ft 305 meters to 3 050 meters UL3111 1 CSA1010 1 EN61010 1 IEC61010 1 Tektronix Logic Analyzers TLA6000 Series Physical Characteristics Dimensions Height Width Depth Weight Net Shipping Typical mm in 295 11 6 451 17 78 460 18 1 kg Ib 17 1 36 7 30 1 66 7 Input Characteristics with P6800 or P6900 Series probes Characteristic Capacitive Loading Threshold Selection Range Threshold Selection Channel Granularity Threshold Accuracy including probe Input Voltage Range Operating Nondestructive Minimum Input Signal owing Input Signal Minimum Slew Rate Description 0 5 pF clock data P6900 Series 0 7 pF clock data P6800 Series 1 0 pF for P6810 in group configuration From 2 0 V to 4 5 V in 5 mV increments Threshold presets include TTL 1 5 V CMOS 1 65 V ECL 1 3 V PECL 3 7 V LVPECL 2 0 V LVCMOS 1 5 V 0 75 V LVCMOS 1 8 V 0 9 V LVCMOS 2 5 V 1 25 V LVCMOS 3 3 V 1 65 V LVDS 0 V and user
14. pe Clock Rate 625 MHz 800 MHz 450 MHz with Option 45 saving time and minimizing setup complexity Quarter Half Full channel Protocol decode software that shows all of the DDR2 transactions as Maximum State 900 Mb s 470 Mb s 235 Mb s standard well as providing triggering on DDR2 events Data Rate 1 25 Gb s 900 Mb s 450 Mb s with Option 45 Sample point analysis software that automates the process of correctly Sn configuring the TLA6000 Series to accurately sample the DDR2 signals Maximum Record 2 Mb standard Protocol violation software that finds and reports violations of the Length 8 Mb with Option 1S JEDEC defined DDR2 protocol a protoco 128 Mb with Option 3S Analog Mux 4 fixed channels standard Any signal user selectable may be routed to 4 output BNCs with Option AM Probing Options P6810 General purpose probe with Option IP supports single ended and differential signals Mictor connections with Option 2P P6960 D Max probe with Option 3P www tektronix com 3 Data Sheet Characteristics General Characteristic Description Number of Channels All channels are acquired including clocks TLA6202 TLA6203 TLA6204 Channel grouping Time Stamp Clocking Acquisition Modes Expansion Capability PC Characteristics Characteristic Operating System Processor Chipset Memory Sound Removable Hard Drive Optical Drive External Display Port Type External Display Resolution Network
15. t Asia and North Africa 41 52 675 3777 The Netherlands 00800 2255 4835 Norway 800 16098 People s Republic of China 400 820 5835 Poland 41 52 675 3777 Portugal 80 08 12370 Republic of Korea 001 800 8255 2835 Russia amp CIS 7 495 7484900 South Africa 41 52 675 3777 Spain 00800 2255 4835 Sweden 00800 2255 4835 Switzerland 00800 2255 4835 Taiwan 886 2 2722 9622 United Kingdom amp Ireland 00800 2255 4835 USA 1 800 833 9200 European toll free number Ifnot accessible call 41 52 675 3777 Updated 10 February 2011 For Further Information Tektronix maintains a comprehensive constantly expanding collection of application notes technical briefs and other resources to help engineers working on the cutting edge of technology Please visit www tektronix com Copyright Tektronix Inc All rights reserved Tektronix products are covered by U S and foreign patents issued and pending Information in this publication supersedes that in all previously published material Specification and price change privileges reserved TEKTRONIX and TEK are registered trademarks of Tektronix Inc All other trade names referenced are the service marks trademarks or registered trademarks of their respective companies 02 Oct 2011 52W 25734 3 Tektronix
16. ted with the TLA acquisition data The oscilloscope and TLA data is automatically deskewed and time correlated when using the iView external oscilloscope cable 2m 6 6 ft 2 m 6 ft Description Unlimited limited only by amount of virtual memory available on TLA IEEE695 OMF 51 OMF 86 OMF 166 OMF 286 OMF 386 COFF Elf Dwarf 1 and 2 Elf Stabs TSF If your software development tools do not generate output in one of the above formats TSF or the Tektronix symbol file a generic ASCII file format is supported The generic ASCII file format is documented in the TLA User Manual If a format is not listed please contact your local Tektronix representative External Instrumentation Interfaces Characteristic System Trigger Output System Trigger Input External Signal Output External Signal Input Power Characteristic Voltage Range Frequency Input Current Power Consumption Environmental Characteristic Temperature Humidity Altitude Safety Description Asserted whenever a system trigger occurs TTL compatible output back terminated into 50 Q Forces a system trigger triggers all modules when asserted adjustable threshold between 0 5 V and 1 5 V edge sensitive falling edge latched Can be used to drive external circuitry from a module s trigger mechanism TTL compatible output back terminated into 50 Q Can be used to provide an external signal to arm or trigger any or all m
17. tions to Fit Any Budget Drag and Drop Triggering Simply drag any one of eight different trigger types from a table onto the waveform and the TLA will automatically set up the trigger conditions Eliminates errors improves repeatability and saves time Drag and Drop Measurements Simply drag an icon from the measurement toolbar and drop it on your signal of interest and get a table of results Saves time removes complexity and reduces measurement uncertainty Analysis Tools for Debugging and Validating Today s Digital Systems FPGA DDR2 A Broad Selection of Microprocessor and Bus Support MIPI CSI and DSI Debug Applications Digital Hardware Validation and Debug Monitoring Measurement and Optimization of Digital Hardware Performance Embedded Software Integration Debug and Verification Tektronix Data Sheet Efficiently Debug and Validate Your Digital System at a Price You Will Like The affordable TLA6000 Series of logic analyzers offer the performance needed to debug validate and optimize the functionality of your digital system The TLA6000 Series also provides a comprehensive set of signal integrity debug tools that allow you quickly isolate identify and characterize elusive and hard to find problems Add a broad range of support for today s applications and you have the ideal tool to help you meet all of the debug challenges of today s digital designs The TLA6000 Series allows you to
18. uct warranty period 3 year period starts at time of instrument purchase Repair Service Coverage 5 Years includes product warranty period 5 year period starts at time of instrument purchase You can increase the state speed memory depth or add full analog multiplexer capability to existing TLA6000 models by ordering the appropriate upgrade kit Please refer to the TLA Family Upgrade Guide for further details Tektronix is registered to ISO 9001 and ISO 14001 by SRI Quality System Registrar GPIB Product s complies with IEEE Standard 488 1 1987 RS 232 C and with Tektronix GPIB Standard Codes and Formats Tektronix Logic Analyzers TLA6000 Series www tektronix com 9 Data Sheet 10 www tektronix com Tektronix Logic Analyzers TLA6000 Series www tektronix com 11 Data Sheet www tektronix com Contact Tektronix ASEAN Australasia 65 6356 3900 Austria 00800 2255 4835 Balkans Israel South Africa and other ISE Countries 41 52 675 3777 Belgium 00800 2255 4835 Brazil 55 11 3759 7627 Canada 1 800 833 9200 Central East Europe and the Baltics 41 52 675 3777 Central Europe amp Greece 41 52 675 3777 Denmark 45 80 88 1401 Finland 41 52 675 3777 France 00800 2255 4835 Germany 00800 2255 4835 Hong Kong 400 820 5835 India 000 800 650 1835 Italy 00800 2255 4835 Japan 81 3 6714 3010 Luxembourg 41 52 675 3777 Mexico Central South America amp Caribbean 52 55 56 04 50 90 Middle Eas

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