Home

Find the way from C/C++ to SystemC

1. 2010 Green Hills Software Inc Green Hills the Green Hills logo and INTEGRITY are SOFTWARE INC trademarks of Green Hills Software Inc in the U S and or internationally All other trademarks are the property of their respective owners www g hs com The Newest Products For Your Newest Designs Reap the benefits of energy harvesting power micr pelt TE Power PLUS Thermal Energy Harvesting Evaluation Kit mouser com micropelt a 13 TEXAS 2 INSTRUMENTS CYMBET AdoptivEnerqu Authorized Distributor CORPORATION Joule Thief Energy Harvesting Solar Energy Harvesting EnerChip EH CBC5300 Module Random Vibration Joule Thief Module Development Tool eZ430 RF2500 SEH mouser com cymbet_cbc5300 mouser com adaptivenergy_joule thief mouser com ti ez430 rf2500 seh WARNING Designing with Hot New Products May Cause A Time to Market Advantage Get your design ideas going with the latest renewable energy harvesting trends in electronics Experience Mouser s time to market advantage with no minimums and same day shipping of the newest products from more than 400 leading suppliers a tti company mouser com 800 346 6873 Mouser and Mouser Electronics are registered trademarks of Mouser Electronics Inc Other products logos and company names mentioned herein may be trademarks of their respective owners THE OFFICIAL PUBLICATION OF THE EMBEDDED SYSTEMS CONFERENCES AND EMBEDDED COM Learn today Design t
2. p lt 1 sm n LU LB ea COEM a 1 e n r ds m 7 7 D UE oor Me LI gt x 22 2 551 1 me s R B s a KA ly e ate m y E 2 T 3 TI CR x di lA e mt i a TY z iem T TL h mum gt E ey ac oS SG oe D cR Rn X ig ae dv iM Ty kho haraam m d n Aer be ML Ns am cum s Lo L5 v M LS HA f Lp aw ae vu 4 n _ a is flattened into hardwa ito half that taking advan RS mn eme A cp P Se Ez s aoe mmm cover feature It s far easier to do architecture design in SystemC than it is to do itin C and C If co designing hardware and software using high level design methods much of your work will be done in an architecture design phase in SystemC Here s why nsitioning from C C to SystemC n high level design BY JOHN SANGUINETTI 8 B B lt n high level design high level code is put through a series of steps on its way to becoming reg
3. fast Not microseconds but nanoseconds If you don t want to use callable functions fine but you can t use run time speed as an excuse TEST TEST TEST Now we get to what I consider to be the foundation of my pro gramming style I test I test everything A lot The reason may sound odd I test because I hate testing Most programmers do but in my case it s personal I hate test ing because I hate the notion that I wasn t perfect to begin with So I hate testing But if I hate testing I hate testing later even worse I test every line I write right after I write it so I won t have to come back in shame later to put it right In the best tradition of programmed programming I don t want to wait until days or weeks later to find out something s wrong I sure don t want to wait until the entire program is complete like as those poor saps on the Unix system had to do I want to keep that instant gratification going I want to pre serve the expectation of success That s why I test as I write Add a few lines of code three or four then test few consequences fall out of this approach First the term code and unit test implies that you ve got a test driver for every unit And indeed I do No matter how small the unit under test UUT it gets its own test driver And yes I ab solutely did test i scomma Hey it didn t take too long There are only two outcomes after all I m also a big believer in single stepping throu
4. No high level syn thesis tool will recognize them all at least within our lifetimes which means the hardware designer will al ways have a job DESIGN EXPLORATION The architecture design step is also the step where design exploration is done Exploration has been recognized as one of the great benefits of doing high level design since it s relatively easy to con trol the high level synthesis tool to pro duce implementations that have differ ent properties typically area latency or power consumption We usually think of this process as adding either global or local directives to the synthesis tool Examples of global directives are un roll all the loops and flatten all the ar rays An example of a local directive would be set the latency of this block to be three cycles It s easy to see that design exploration can be accomplished by changing these directives for exam ple unroll loop A but not loop B map arrays to memories or set the latency to five cycles However there are occasions where changing the source code can be useful for design exploration Example 3 4x4 matrix multiply shows such case This 1s a 4x4 matrix multiplica tion where the data type of the matrix elements is Mtype Mtype could be changed from integer to fixed point to floating point and this code would not change The conditional code 1f FASTER else endif shows two different implementa
5. dambrosino ubm us com Subscription Customer Service P O Box 2165 Skokie IL 60076 800 577 5356 toll free Fax 847 763 9606 embeddedsystemsdesign halldata com www customerserviceesp com Article Reprints E prints and Permissions Mike O Brien Wright s Reprints 877 652 5295 toll free 281 419 5725 ext 117 Fax 281 419 5712 www wrightsreprints com reprints index cfm magid 2210 Publisher David Blaza 415 947 6929 david blaza amp ubm com Editorial Review Board Michael Barr Jack W Crenshaw Jack G Ganssle Bill Gatliff Nigel Jones Niall Murphy Dan Saks Miro Samek EE TimesGroup Corporate EE Times Group Paul Miller Chief Executive Officer Felicia Hamerman Group Marketing Director Brent Pearson Chief Information Officer Jean Marie Enjuto Financial Director Amandeep Sandhu Manager Audience Engagement Barbara Couchois Vice President Sales Ops UBM Corporate UBM LLC Marie Myers Senior Vice President Manufacturing Senior Vice President Strategic Development and Business Administration Pat Nohilly Android follows Linux s lead wrote a column about a year ago Android is coming where you least expect www embedded com 214501968 talking about how the Android operating system www an droid com will have a place in appli cations other than handsets When Google first developed the operating system well they purchased the company that developed the OS
6. embedded systems design JUNE2010 23 A new aynew Entering into it s 21st year in Boston ESC brings together systems architects design engineers suppliers analysts and media from across the globe With cutting edge product demonstrations visionary keynotes and hundreds of essential training classes ESC is the ideal conference for the embedded design community to learn collaborate and recognize excellence ESC Boston 2010 Tracks Include Aerospace and Military Designing with Open Source Software including Linux and Android Developing tor Windows Embedded Graphics Display and Lighting Industrial Automation and Robotics Medical Multicore and Virtualization Multimedia and Signal Processing Networking Connectivity and Embedded Internet Programmable Logic Project Management Real Time System Development Safety and Security Software Debugging Techniques e Systems Integration and Test Start your own personal development at ESC 2010 You can t afford to miss it Expo Floor Access is FREE Boston Hynes Convention Center Conference September 20 23 2010 Expo September 21 22 2010 Learn today Design tomorrow Minimax fitting is often preferred to regression when the goal is to find a fitting line with minimum tolerance such as some automatic control applications Here s part 1 of 3 on line fitting algorithms Line fitting algorithms for exceptional cases minimax line f
7. www embedded com tigforums thread jspa threadID 11191 Listing 1 The old fashioned way of toggling an LED define LEDS CCunsigned volatile OxFFFF6000 LEDS A 1 lt lt 3 toggle LED3 Listing 2 What Dan Saks recommends LEDS registers const LEDS CLEDS registers OxFFFF6000 LEDS toggle 3 toggle LED3 www embedded com embedded systems design TDD for software and hardware TDD makes a lot of sense Jack Ganssle An interview with James Grenning Part 2 May 2010 p 33 www embedded com 224700535 but why not use it for the software hardware combination Use of Boolean expressions to define the total system in a logical sense would make function trade offs easy Use of English for documentation requirements is im precise By including the standard arith metic operators both control conditions and data manipulation are precisely de fined Arithmetic operators are really Boolean macros In order to keep the microcycle short a quick and easy Boolean simulator can run the tests The RTL simulators and use of HDL for hardware design do not fit well with TDD It is ironic that tool flows are described using a flow dia gram but tools only use HDL input About 30 years ago IBM used pro gramming flow charts to describe hard ware and synthesis generated the hard ware logic Since then designers have been at the mercy of the synthesis pro gram and programmers have been at the mercy of th
8. 2008 I won t say much more about project planning or about requirements analysis here In part it s because using my ap proach the requirements evolve with the code Call it spiral de velopment if you like START WITH CODE The method I use to develop software may surprise you In the worst possible tradition of the anti waterfall plan I jump right into code I sit down at the keyboard flex my fingers crack my knuckles and type void main void That s right I write the null program I do this on every new start If I m in a really adventurous mood add cout lt lt Hello Jack lt lt endl and maybe even 25 3 COUt lt lt X lt lt endl This is not a joke I really really do this Every time Why I think it s just my way of assuring myself that the genie behind the glass screen 1s still awake and still doing his job And my computer and its operating system haven t gone berserk overnight not all that unlikely these days Mostly I do it to get myself in the mode of expecting suc cess not failure Several years ago educators came up with the notion of programmed learning The idea was to write the textbook very much like a computer program complete with loops and goto s After teaching a few facts never more than three or so the text asks a series of questions If you give the right answers you get to skip to the next section Otherwise you may be di rec
9. Inefficient that I ve been berated in the past for nesting my functions too deeply One colleague pointed out that Every time you call a subroutine you re wasting 180 microseconds Well at 180 microseconds per call on an IBM 360 he might have had a point The 360 had no structure called a stack so the compiler had to generate code to implement a function call in software But certainly microprocessors don t have that problem We do have a stack And we have built in 11 and return in structions The cal instruction says simply push the address of the next instruction and jump return means pop and jump On a modern CPU both instructions are ridiculously CONTINUED ON PAGE 33 Extend battery life with the MAXQ610 16 bit microcontroller Up to 12 MIPS in under 4mA industry s highest MIPS mA The MAXQ610 microcontroller is designed for low cost high performance battery powered applications This 16 bit RISC based microcontroller has a wide operating range down to 1 7V for long battery life and ultra low power consumption Its anticloning features and secure MMU enable you to protect your IP Application partitioning Vcc 1 7V to 3 6V and IP protection Microcontroller Peripherals e 16 bit MAXQ RISC core e Two USARTs and one SPI master slave e 64KB flash memory 2KB SRAM communication port e Ultra low supply current Two 16 bit timers counters Active mode 3 75mA at 12MHz e 8kHz nanoring fu
10. a minimax fit is required or when noise varies and affects the linear trend Nonetheless there are many cases where regression is not the best option the sum of the x values X x X the sum of the y values the sum of the x values the sum of the xy values X x y M NeXyy y NeXxx 2x Lx Xy for instance when a minimax fit is required in other words one that minimizes the maximum deviation between line and data Comparison of regression and minimax line fit to noisy data Regression vs minimax o e 25 JN ng m m one 20 E su 20 a ag P ot n 5 Loo ak gt 15 ai E e ia o a Qu Data 10 caet Regression line oo eceee Minimax line oon oa oe 5 oo p e n a Figure 1 Time Web libraries where you can download the Remez algorithm Web library Free Languages address www netlib org Yes Algol www boost org Yes C www mathworks com Yes Matlab www nag co uk No Fortran Matlab Table 1 Program documentation Gives literature Algorithm documentation Gives literature references references Yes Yes contains inaccuracy Yes Yes excellent Yes Gives literature references 26 JUNE 2010 embedded systems design www embedded com the noise varies systematically in such a way that it affects the linear trend e the linear fitting is taki
11. downloadable Remez code available from various Web libraries Table 1 summarizes the results of my investigation Unfortunately all the EE Times Virtua Upcoming Virtual Conferences EE Times Virtua C rference Maximizing the Flexibility of FPGAS When Thurs June 24 2010 11am 6pm EST www eetimes com FPGA On Demand Virtual Conferences Designing with ARM Engineer an Optimal ARM based system www eetimes com arm Motor Control Intelligent Control Maximizes Performance Minimizes Power Cost www eetimes com motor Medical Systems Design www eetimes com medical C rference COMMUNICATIONS CENTER EE Times the leading resource for design decision makers in the electronics industry brings to you a series of Virtual Conferences These fully interactive events incorporate online learning active movement in and out of exhibit booths and sessions vendor presentations and more Because the conference is virtual you can experience it from the comfort of your own desk So you can get right to the industry information and solutions you seek Why you should attend Learn from top industry speakers Participate in educational sessions in real time Easy access to EE Times library of resources e Interact with experts and vendors at the Virtual Expo Floor Find design solutions for your business For sponsorship information please contact David Blaza 415 947 6929 or david blaza ubm com EElTime
12. e at a time 20 JUNE 2010 embedded systems design www embedded com DESIGN OPTIMIZATION It s convenient to use a different lan guage for the architecture design step rather than Plain old C because C does not provide the ability to represent a few key hardware related features notably hierarchy data path widths and con currency SystemC was developed for just this reason SystemC is not a sepa rate language but simply a C class li brary that provides the missing features data e this Example 3 void matmult matrix multiply O 1 DIM for sc uint 3 j 0 j DIM j for sc uint 3 1 0 1 1f FASTER void matmult elementloop sc uint 3 1 Mtype temp c DIM for sc uint 3 k 0 k lt DIM k temp c k A i k B k j j C 1 J temp c 0O temp c 1 te j else smaller void matmult elementloop sc uint 3 1 C 1 7 0 0 for sc uint 3 k 0 k DIM k C 1 L3 1 B k LJ end1f void matmult thread0 do reset while Ctrue read dataQ matrix multiply QO write data Q C can t represent a few key hardware related fea tures notably hierarchy concurrency SystemC It s far easier to do architecture design in SystemC than it is to do it in C Example 1 shows a C algorithm as it would be written for software imple mentation and how it would be modi fied for hardware implementation Making the change to S
13. end CONTINUED ON PAGE 32 end 30 JUNE 2010 embedded systems design www embedded com z d os AM ih MIT Mi NUN ty ch Ub Y i ul i Easy to use low power serial transceivers support up to 3 125Gbps to enable industry standards such as PCle Low voltage option reduces total power consumption by 65 over previous generations Integrated DSP memory controllers and clocking technology simplifies designs High bandwidth serial connectivity with up to 72 low power transceivers supporting up to 11 18Gbps Ultra high performance DSP using up to 2016 low power performance optimized DSP slices Integrated high performance ExpressFabric technology running at 600 MHz clocking and performance tuned IP blocks Proven cost reduction with EasyPath 6 FPGAs Potential Realized Unleash the full potential of your product design with Xilinx Virtex 6 and Spartan 6 FPGA families the programmable foundation for Targeted Design Platforms Reduce system costs by up to 60 Lower power by 65 e Shrink development time by 50 Realize your potential Visit www xilinx com 6 Copyright 2010 Xilinx Inc All rights reserved Xilinx and the Xilinx logo are registered trademarks of Xilinx X N X in the United States and other countries All other trademarks are property of their respective holders CONTINUED FROM PAGE 30 5a if
14. max dist gt max dist2 slope Up max up 1ndex 5b Choose overall maximum distance return line parameters accordingly C YCOUp max index 1 YCUp max up index Up max up 1ndex 1 Point Lo max lo index YC Lo max lo index max dist 2 intercept else slope Lo max lo index2 Point 2 slope Point 1 C YCLoCmax lo index24 1 Y Lo max lo index2 Lo max_ lo index241 Point Up max up index2 Y Up max up index2 max dist2 2 intercept end Line params endfunction line is parallel to the segment 01 1 7 u2 v2 and lies a vertical distance 07 2 above the segment The key remaining task was to ob tain an algorithm for finding the con vex hull A Google search on convex hull algorithm quickly led to the Gra ham scan article on Wikipedia which even contains a pseudocode In the case at hand the algorithm was made even easier by virtue of the fact that the data was sorted in order of increasing x co ordinate and the x coordinates were evenly spaced POSTSCRIPT MORE THAN ONE WAY TO SKIN A CAT As I was researching for this article I discovered a similar but not identical algorithm in the technical literature Rey and Ward 1987 Prototype code The prototype code in Listing 1 is writ ten in Octave an open source Matlab compatible language Caveat No seri ous attempt has been made to optimize the code either for reduced code size
15. mit that if you follow a top down approach to you ll never be able to achieve such reusability To take a ridiculous example I might need in a certain program a vector class that lets me add and subtract them easily But for this program I don t need to compute a cross product So unless I look ahead and anticipate future uses for the class it ll never have the cross product function KISS I ve been using modular designs and information hiding since I first learned how to program It s not because I was so much smarter than my coworkers it s just the opposite I m humble and realistic enough to know that I need to keep it short and simple KISS It always amazes me how little time it takes for me to forget what I wrote a few weeks ago let alone a few years The only way I can keep control over the complexity in herent in any software effort is to keep the pieces small enough and simple enough so I can remember how they work simply by reading the code I was also lucky in that the fellow who taught me to pro gram never bothered to show me how to write anything but modules He had me writing Fortran functions that took passed parameters and returned a single possibly array re sult By the time I found out that other people did things dif ferently it was too late I was hooked small modules The term modularity means different things to different JUNE 2010 embedded systems design www embedded com people
16. plugcomputer Marvell Electronics is the home of the fastest rate of change of about any dis cipline so it s not surprising that so much we take for granted today didn t exist two decades ago Something like 7096 of all 32 bit processors are ARMs yet that processor didn t exist as we know it The market trends for CPUs are completely different now too Then there were a plethora of differ ent architectures with more released on what seemed a daily basis Today the 32 bit trend 1s unifying behind the ARM line and I suspect that as time moves on ARM s market share in high performance embedded systems will be indistinguishable from Intel s on the desktop What s even more remarkable is the 8051 ication of the ARM TI Lu minary ST and others have taken the MCU philosophy of massive part pro liferation to the 32 bit world It s iron ic that the latest generation of these parts in their Cortex MO incarnation sport about the same number of in structions as the very first micro processor the 8008 Few would have predicted that a 32 bit MCU would cost the 0 65 NXP charges for their LPC1100 Even some technology words have disappeared Submicron for in stance was the almost inconceivable realm where transistor geometries were smaller than gasp one micron Today 0 045 micron is not uncommon and 0 022 is on the horizon Back then I was astonished at the notion of fea tures just a single micron long and I remai
17. segment to P P vertical distance is given by 5b If D lt D then the minimax ize Matters j a AP W OME 6 I A GOOD Geist Technology custom designs TINY web enabled modules for your products and applications providing remote monitoring control and data acquisition integration with your product design Visit U e Simple monitoring over web interface Sensors sa e Low Cost e Alarms amp Alerts via SNMP or E mail DO 3 A ICQ en Web Servers 90 Jung 7 9 Ce A e Fast time to market Booth 47 2019 i e We can build your production units o et f Al s From web enabling power control products to monitoring climate SL AAA 5 9 5 5 conditions at remote sites we get products online in record time To order visit GeistTek com book 512 331 8676 GeistTek com Technology www embedded com embedded systems design JUNE2010 29 Listing 1 Minimax fitting Chr1s Thron 18 March 2010 Input to function is the vector of Y coordinates ZX coordinates are assumed to be 1 2 3 user can rescale at will Function returns slope intercept of fitted line a mm function Line params Minimax linel Y 1 find upper and lower envelopes using Graham scan reference Wikipedia Lower and upper envelope begin at the same point Up 1 2 Lo Up Compute Upper envelope via Graham scan for 11 3 1 length CY whi
18. someone working in aroma therapy rather than pushing bits around we ve JUNE 2010 embedded systems design www embedded com got to learn to deal with human nature the design process Most managers would trade their firstborn for an army of Vulcan programmers but until the Vul can economy collapses emo tionless programmer will work for peanuts and logical dis course we ll have to find ways to efficiently use humans with all of their limitations I have the following ques tions Working in aroma thera py rather than pushing bits around what do the both mean and what the writer want to express Trade their firstborn for an army of Vulcan programmers Here I think firstborn maybe his her employees but what Vulcan programmers stand for I have little knowledge about Ro man myth Vulcan economy collaps es Vulcan economy stands for Work for peanuts and logi cal discourse work for peanuts and logical discourse I can t find any clue of a relation between them so I really don t know what the sentence mean I have searched a lot of Web pages about these but failed to get considerable answers sincerely long for and thank you for your help I ve learned how smart and at times funny ESD readers can be Over the two decades of writing for this magazine I ve exchanged over 100 000 e mails with you some of whom have become good friends My e mail inbox is always
19. the paper tape punch we just let it flutter to the floor At the end of the day guess who got to sweep it up I worked on one program where my only compiler was a line by line assembler meaning that it didn t ac cept mnemonic names only absolute addresses The bulk storage device was an audio cassette Just so we re clear this wasn t a homebrew system I cobbled up out of old Intel 4004s pa per clips and chewing gum It was a system built up by serious if bone headed managers in a very large corporation Perhaps because of these nightmare environments I re ally appreciate a good one I es pecially love using integrated development environments IDEs in which all the tools are interconnected preferably by a lovely and fast GUI interface I know I know real men don t use GUIs or IDEs Some folks much prefer to use only command line interfaces and to write ever more complex and inscrutable makefiles If that s you more power to you Whatever works But I can t hide my view that such an approach is an affecta tion involved more with earning one s credentials as a software guru than on producing good code I m sure that there are good valid reasons to write a makefile rather than let the IDE do it for you I just can t think of one at the moment So what do I do when I m told that I must use the en vironment the project managers already picked out First of all I d ask them always discretely of course in
20. you can still tell the customer with a straight face not to worry about all these early versions of the program They are after all only prototypes He doesn t need to know that one of those prototypes is also the final product TOP DOWN OR BOTTOM UP The great racing driver Stirling Moss was once asked if he pre ferred a car with oversteer or understeer He said It really doesn t matter all that much In the end it just depends on whether you prefer to go out through the fence headfirst or tailfirst Ironically Moss had a terrible crash that ended his career He went out through a literal wooden fence headfirst Software gurus have similar differences of opinion on bot tom up vs top down development Purists will claim that the only way to build a system is top down By that they mean de sign and build the outer layer often the user interface first Put do nothing stubs in place until they can be fleshed out Even better put in not quite nothing stubs that return the values you d expect the final functions to return Other practitioners prefer a bottom up approach where you build the lowest level code sometimes the hardware in terfaces first Connect them all together properly and you ve got a working program Paraphrasing Moss s comment it all depends on how you prefer your project to fail You can start with a beautifully per fect top down design only to discover in the end that your software is too slow or
21. 065 9468 For customer service telephone toll free 877 676 9745 Please allow four to six weeks for change of address to take effect Periodicals postage paid at San Francisco CA and additional mailing offices EMBEDDED SYSTEMS DESIGN is a registered trademark owned by the parent company EE Times Group All material published in EMBEDDED SYSTEMS DESIGN is copyright 2010 by EE Times Group All rights reserved Reproduction of material appearing in EMBEDDED SYSTEMS DESIGN is forbidden without permission COLUMNS rammer s oolbox 9 How write software BY JACK CRENSHAW Every programmer has a personal soft ware development methodology Jack describes his and offers tips for staying successful in software break points 34 After 500 000 words BY JACK G GANSSLE The first installation of Breakpoints appeared June 1990 20 years ago this month Jack looks back DEPARTMENTS include 5 Android follows Linux s lead BY RICHARD NASS Like Linux the open source version of Android deserves a look Where you go from there is up to you parity bit 7 marketplace 33 IN PERSON ESC Chicago June 8 9 2010 www embedded com esc Chicago ESC India July 21 23 2010 www esc india com ESC Boston September 20 23 2010 www embedded com esc boston Embedded Live October 20 21 2010 www embedded co uk ESC Silicon Valley May 2 5 2011 www embedded com esc sv ONLINE www embedded com Reliably W
22. At one conference a Navy Admiral gave a paper on the Navy s approach to software development During the ques tion and answer period I heard this exchange Q In the Navy programs do you break your software up into modules A Yes absolutely In fact the U S Navy has been in the fore front of modular design and programming How large is a typical module 100 000 lines of code gt When I say small I mean something smaller than that lot smaller Like perhaps one line of executable code In my old Fortran programs I was forever having to con vert angles from degrees to radians and back It took me 40 years to figure out Dang I can let the computer do that I wrote double radians double x return pi x 180 double degrees double x return 180 x pi j Gee I wish thought of that sooner For the record some folks prefer different names that make the function even more explicit Like RadiansToDegrees or Rad2Deg or even RTD One colleague likes to write ConvertAngleFromRadi ansToDegrees But I think that s crazy He s a weird person Back in my Z80 assembly language days I had a whole se ries of lexical scan functions like i salpha isnum i salnum iscomma etc The last function was cpi ret 1scomma A whole useful function in three bytes When I say small I mean small Is this wise Well it s sure worked for me I mentioned in a recent column It s Too
23. I O devices It took only a day and we walked away with the interface mod ules in hand During the course of the rest of the project it s a good feeling to know that you won t have some horrible sur prise near the end talking to the hardware After all is said and done there s a good and game chang ing reason I assert that a pure top down process won t work It s because we re not that smart ve worked on a few systems where I knew exactly what the program was supposed to do be fore I began Usually it was when the program was just like the previous four But more than once we ve not been able to an ticipate how the program might be used We only realized what it was capable of after we d been using it awhile Then we could see how to extend it to solve even more complex problems In a top down approach there s no room for the Aha moment That moment when you think Say here s an idea That s why I much prefer the spiral iterative approach You should never be afraid to toss one version and build a different one After all by then you ve got the hang of it and much of the lower level modules will still be useful The top down approach isn t saved by object oriented de sign either One of the big advantages of is sup posed to be software reusability In the OOD world that means total reusability meaning that you can drop an object from an existing program right into a new one with no changes I sub
24. The designer No high level synthesis e tool will recognize them all at least within our e lifetimes which means the hardware designer e Will always have a job uses this step to experiment with dif ferent RTL architectures and then uses it to optimize the implementation af ter the architecture has been decided Both architecture exploration and op timization can be done by varying the synthesis direc tives or by changing the high level source code John Sanguinetti is chief technolo gy officer at Forte Design Sys tems and has been active in computer archi tecture perform ance analysis and design verification for 20 years Af ter working for DEC Amdahl ELXSI Ar dent and NeXT computer manufactur ers he founded Chronologic Simulation in 1991 and was president until 1995 He was the principal architect of VCS the Verilog Compiled Simulator and was a major contributor to the resur gence in the use of Verilog in the de sign community Dr Sanguinetti served on the Open Verilog International Board of Directors from 1992 to 1995 and was a major contributor to the working group which drafted the speci fication for the IEEE 1364 Verilog stan dard He was a cofounder of Forte De sign Systems He has 15 publications and one patent He has a Ph D in com puter and communication sciences from the University of Michigan ADDITIONAL READING Black D and J Donovan SystemC From the Ground Up S
25. and lower These two possibilities are shown in vertex x y that corresponds Figure 2 Thinking geometrically about These findings prompted the follow to the overall largest vertical these two possibilities quickly led to sev ing straightforward prescription for an distance D found in 2 eral conclusions shown in Figure 3 algorithm 4 Repeat steps 2 and 3 switching the role of upper envelope U e P and P must be consecutive 1 Find all vertices of the convex hull of and lower envelope L Select points in the convex hull of all data all data points The vertices are di the lower vertices ul vl points This must be true because vided into two sets upper envelope u2 v2 and upper vertex all data points either lie below the U and lower envelope L x y that corresponds to the line P P as in case A or above 2 For every pair of consecutive ver overall largest vertical distance the line P P as in case B tices in U denote these vertices as D e must also be a vertex point on the u1 v1 and u2 v2 5a If D gt D then the minimax convex hull of all data points This 2 1 For all vertices x y in L with line is parallel to the segment holds because all data points lie ei ul lt x lt u2 find the vertex that ul v1 u2 v2 and lies a ther above case A or below case has the largest vertical distance vertical distance DT 2 below B the line through P that is parallel to the upper convex hull This the
26. ation 74 The new standard for pcb assembly
27. but that s another story it was clear that the company wanted to be a player in the handset space And they ve made some significant strides in that space according to the lady sitting next to me on a recent flight the Motorola Droid phone is the best thing ever invented It s not uncommon for one of the building blocks Android in this case to find its way into other areas of the embedded landscape Embedded systems developers are a very resourceful group If they think there s a better and more cost effec tive way to produce a product they re willing to give it a go I m not endorsing Android here as the be all end all OS for embed ded devices but it may be something that deserves a look It s playing out in a similar fashion to where embed ded Linux was a few years ago Al though Linux was touted as a so so OS with a great price free we quickly learned that you get what you pay for The investment in time and or support proved to be higher than many people expected Hence Richard Nass rich nass ubm com is the editorial direc tor of Embedded Systems Design maga zine Embedded com and the Embedded Systems Conference Linux is used in lots of embedded applications but it s far from om nipresent I expect Android to follow a similar path We re now in the let s see what it s all about period That fact was apparent at the recent Em bedded Systems Conference in Sili con Valley We he
28. cing the code itself Annotating schematics was even more interesting as space limitations meant one had to adopt an astonish ingly concise style while conveying lots of information Then I learned that one very effective way to elicit a project s requirements was to write the user s manual first and that a truly well written manual was a joy the customer and a source of pride to the author So it was a natural pro a Caen ed air s s one Mir lus ng h b ng me pas a m The first installation of Breakpoints appeared June 1990 20 years ago this month gression to learning to love the art of writing in other forms as well I cranked out some technical arti cles for a few publications including two for Embedded Systems Program Jack G Ganssle is a lecturer and consultant on embedded development issues He conducts seminars on embedded systems and helps companies with their embedded challenges Contact him at jack ganssle com JUNE 2010 embedded systems design www embedded com By Jack G Ganssle ming this magazine s origi nal name working with the magazine s most colorful editor Tyler Sperry Then he called and asked for a monthly column The first installation of Breakpoints appeared June 1990 20 years ago this month Those two decades have passed at a frightening rate Then mid thirties a baby and one on the way build ing a bus
29. ck 125 Audio Port 3 USB 2 0 Host Ports Fanless ARMS 200MHz CPU 3 Serial Ports RS2232 485 amp SPI SD MMC Flash Card Interface Battery Backed Real Time Clock Up to 64 MB Flash amp 128 MB RAM GPIO A D Timers amp PWM Linux with Eclipse IDE or WinCE 6 0 d WVGA 800 x 480 7 LCD with Touch Prices start at 495 imas Windows CE Since 1985 TERES GRE Ww OVER E FT B T Tom ea YEARS Ol SER sa ee e mm M EE TEM na SINGLE HOARI SOLUTIONS Thermocouples Make Your Own The Hot Spot Welder is a portable capacitive discharge YUA OS wire welding unit that allows thermocouple wire to be formed into free standing bead or butt welded junctions or to be directly welded to metal surfaces The HOT SPOT provides a quick simple accurate low cost means of fabricating thermocouples on a when needed where needed basis Brochure and specification sheet provide photos and descriptions of thermocouple construction and use DCC Corp 7300 N Crescent Blvd Pennsauken NJ 08110 PH 856 662 7272 Fax 856 662 7862 Web www dccCorporation com on Best Practices for Peer Code Review available af Bui Semti Peer Code Reri 8 SmoriBear SOFTWARE P ae Phone 618 529 4525 Fax 618 457 0110 Web www emacinc com Programmer s toolbox from page 14
30. dded program After given the team leader some soft ware I told him I needed to make a change to it He said Well you can t do that now You ll have to wait for the next time we do a build I asked when that would be He said Two or three weeks I go Three weeks Are you kidding me I m used to get ting new builds in three seconds Then and there I resolved to do my unit testing on my own test drivers and save integration until the very last thing The idea worked like a charm During integration we found only one error requiring a change in one single byte Expect success I say Get warm fuzzies often And don t forget to test MI www embedded com embedded systems design JUNE 2010 33 After 500 000 words welve years of Catholic education taught me to hate writing The nuns and Jesuits were very demanding and tolerated neither spelling errors nor grammatical mistakes Get ting a five page paper done seemed to require Her culean longhand efforts My poor mother an Eng lish major typed a lot of these papers for her five kids on an ancient manual Olivetti As an engineer I found that it was happily easy to get buried in a project and respond to non techies with grunts and scribbled schematics They d go away pretty quickly But over time I took more and more pleasure in getting the comments right with enough narrative to ensure one could completely understand the software without referen
31. ds Figure 1 point of being self evident that when that are applied to the design descrip the source code of a design is created tion as it proceeds through the design fewer errors occur if the source is at a flow from creation to final realization higher abstraction level than if it is at a Figure 1 shows the initial steps in lower level However a process is still the high level design HLD flow Fig required to verify the transformations ure 2 shows the flow with the verifica Detailed high level design flow Algorithm design For ARM Application Processors Eclipse based development tools for Linux and Android Support for all ARM application processors High performance debug and trace adapter Verification Architectural design High level synthesis T i www keil com 1 800 348 8051 SIKEIL Tools by Verification Logic synthesis Figure 2 18 JUNE 2010 embedded systems design www embedded com cover feature tion steps and the design loops added for a hardware implementation to rithm By contrast the same algo A verification step after each design use a custom interface rithm implemented in hardware step can result in a loop back to fix a e The cost of memory access in hard can often be done with a much design error Another loop after each ware is much higher than in soft smaller window of the data being of the two synthesis steps can return ware Con
32. e of USB software and hardware to your product Pre configured USB packages with running sample projects are available for most popular microcontroller architectures and development boards www hcc embedded com info hcc embedded com INTEGRITY RTOS has it No one else does National Information Assurance Partnership LL Common Criteria Certificate 227 Eis coniaim realis is awarded to rcr erie renis mA ae 207 AA Meer The IT produs 1 ig assurance security specifications are ze with the provisions of the NILAP ing laboratory in the evaluation ndorsement of the IT product sed or implied j International Corporation Product Name INTEGRITY 178B Separation ment Protection Profile for ments Requiring High System RTOS version IN ICR750 0101 GH01 Re opia PCI a version CPN 944 2021 021 w P The NSA has certified the INTEGRITY RTOS technology to EAL6 INTEGRITY is the most secure real time operating system available and the first and only technology have achieved this level The NSA also certified INTEGRITY to High Robustness an even higher level of security than EAL6 with 133 additional security mandates over and above the 161 required for EAL6 When security is required Green Hills Software s INTEGRITY RTOS technology is the only option Green Hills Copyright
33. e Hardware is hierar chical and the Support for many operating systems including Linux QNX ThreadX and WinCE e Symmetric multiprocessing SMP communication between subunits gt subroutines in software modules in hardware is different While c only a few calling conventions im 20 plement software interfaces there P are many more possibilities for hardware interfaces Plain old C PoC provides call by value which along with the ability to pass point ers suffices for subroutine calls However there is no facility for representing the myriad variations e Bitmap display in the debugger GUI e Fast industry leading support Trace Features e On chip and off chip trace e Powerful and intuitive trace analysis e Sophisticated profiling capabilities e Protocol analysis for USB 12C SPI etc of hardware interfaces For exam ple ready valid trigger done AMBA bus read write custom LAUTE R BACH DEVELOPMENT TOOLS bus there are often good reasons www embedded com embedded systems design JUNE2010 19 cover feature Example 1 for int 1 0 1 lt 1024 1 1buf 1 in getQ int obuf_ptr 0 for int 1 0 1 lt 1024 1 4 obuf obuf_ptr fC ibuf i ibuf i 1 ibufli 2 ibuf i 3 for int 1 0 1 lt 256 i out put obuf i This code fragment reads in a 1024 element array and processes it four elements at a time If it is rewritte
34. e compiler optimizer HDL was created before technology like GPS and Google maps so the old logic diagrams with the shaped block symbols were abandoned I am writing a simulator but a GUI that shows a flow diagram like a street map rather than scrolling through source code would also help shorten the microcycle KarlS CEngine Developer We welcome your feedback Letters to the editor may be edited Send your comments to Richard Nass at rich nass ubm com or fill out one of our feedback forms online under the article you wish to discuss JUNE 2010 1 336 Volts of Green Engineering MEASURE IT FIX IT Developing a commercially viable fuel cell vehicle has been a significant challenge because of the considerable expense of designing and testing each new concept With NI LabVIEW graphical programming and NI CompactRIO hardware Ford quickly prototyped fuel cell control unit iterations resulting in the world s first fuel cell plug in hybrid MEASURE IT Acquire Analyze Present Acquire and Analyze and Present data Design Prototype Deploy Design optimized Prototype designs Deploy to the measure data extract information with HMIs Web from any sensor with signal interfaces or signal processing and reports control algorithms on ready to run hardware platform and systems hardware you choose Ford is just one of many customers using the NI graphical system design platform to improve the world around them Enginee
35. e heck is a databook When was the last time you saw one of those I predicted that integrated develop ment environments IDEs would track function names and tell us what their www embedded com embedded systems design parameters are So there s a hit as many development environments provide plenty of information about functions variables and program structure But I thought that these new help resources would aid in managing a plethora of files whose function was hidden by the eight character file name limitation of DOS and Windows never anticipating that we d even be able to embed spaces in names today It s hard to believe but I figured management would realize how ex pensive we are and backstop us with lower paid paraprogrammers and cler ical help to offload all nonengineering functions from us And I thought pro ductivity killing cubicles would disap pear Perhaps the ultimate irony is that I never imagined that in circuit emula tors would nearly fade away replaced by BDMs and JTAG At the time my company made ICEs Remember Keuf fel and Esser the slide rule company In 1967 they predicted all sorts of fan tastic changes like domed cities to come over the next century They missed the demise of the slide rule just a few years later Predictions are hard Even the Psy chic Friends Network didn t see their 1998 bankruptcy in the tea leaves LESSONS LEARNED To me the most interesting and com pelling as
36. e transformations One can ask why such a manual process is necessary since the promise of high level synthesis is to remove the drudgery of mapping higher level op erations to hardware The answer is that there are many ways to implement an algorithm in hardware and no sin gle choice is the best under all design constraints Some transformations it 22 Your solution Is here Save time and money with embedded software solutions built to run right out of the box Get development started quickly with no integration required and full support for popular tools With Micro Digital you have low cost no royalty licensing full source code and direct programmer support So get your project off to a great start Visit us at www smxrtos com today Free Evaluation Kits www smxrtos com eval Free Demos www smxrtos com demo 08 Micro Digital RTOS INNOVATORS 800 366 2491 sales smxrtos com www smxrtos com ARM e ColdFire Cortex PowerPC s x86 e CodeWarrior s CrossWorks GCC e lf IAR EWARM JUNE 2010 embedded systems design www embedded com could be argued should always be done and could thus be implemented in the high level synthesis tool as in Example 2 However there are a great many examples of code where the high level synthesis tool could in prin ciple recognize the original without requiring the code to be rewritten but in practice requires the designer to do the transformation
37. for minimax polyno mial fitting e Tawfik Sherif Remez Algorithm available for download at www mathworks com mat labcentral fileexchange 8094 accessed 18 March 2010 includes Matlab code and pdf documentation NAG library resources for minimax polynomi al fitting Fortran Library Routine Document 2 Available from www nag co uk nu meric Fl manual pdf E02 e02acf pdf ac cessed 18 March 2010 NAG Toolbox for Matlab e02ac Available from www nag com numeric MB manu al 22 l pdf E02 e02ac pdf accessed 18 March 2010 Netlib library resources for minimax polyno mial fitting ACM Algorithm 414 Chebyshev Ap proximation of Continuous Functions by a Chebyshev System of Functions Available for download from www netlib org toms 414 accessed 18 March 2010 e Golub G H Smith Chebyshev Ap proximation of Continuous Functions by a Chebyshev System of Functions Available from ftp reports stanford edu pub cstr re ports cs tr 67 72 CS TR 67 72 pdf This re port documents the Netlib Algol code Rey C and Ward On Determining The On Line Minimax Linear Fit To A Discrete Point Set In The Plane Information Pro cessing Letters 24 1987 97 101 EMBEDDED SYSTEMS IVIARKETPLACE Low Cost Panel PC he PPC E7 is Compact Panel PC based on 200 Mhz ARM9 processor with the following features Open Frame Design 10 100 BaseT Ethernet Real Time Clo
38. gh my code My pal Jim Adams disagrees with me on this He says that if you re going to use single stepping at all you should only do it once After all he argues the instruction is going to do the same thing each time Maybe so but I do it anyway Consider it part of the pro grammed programming paradigm I never turn down an op portunity to get warm fuzzies Single stepping reminds me in no uncertain terms that my processes mental and computer wise are still working Finally there s an implicit assumption that you have a fast IDE that can give you test results in a hurry I ve been spoiled on this point ever since I fell in love with Turbo Pascal The idea that I could get a compile as fast as I could get my finger off the R button blew me away And spoiled me for life This wasn t a problem for the Unix team The reason the managers imposed that ridiculous no compiling rule was the compiler was slow taking some four hours per build The team should have and could have figured out a way to compile and unit test the individual modules but they didn t For one reason their code was not modular everything depended on everything else So you couldn t just lift out one function for unit testing you had to do the whole megillah The program mers didn t mind though They could launch a build then spend the next four hours playing Unix computer games I once worked on an assembly language program an em be
39. hs ai C A LU saw amp 3 a T x A TY e TI c k E L EE Mul P lar m a E E g m t E ir am EI x C L ao EX SE T EMT A pe n ore 1 E Fr ae M JD EM a i T _ t 7 E 7 e EN o a qe x Ur am im ik SST TT 2 shows 4 S Ww A E NX po ented in hard wg j 2 Learn today Design tomorrow ar F cnm m M _ TT SR 3 2 8 Eu S o mmm _ L EI le an VOLUME 23 NUMBER 5 JUNE 2010 DED SYSTEMS DESIGN 3 X s The Official igi of The 3g v um Conferences and Embedded com Crenshaw s software methodology 9 Minimax line fitting algorithms 25 20 years of Breakpoints 35 Embedded Systems Conference Chicago Donald E Stevens Convention Center Rosemont IL Conference June 7 9 2010 Expo June 8 9 2010 Com USB solutions for embedded applications involve numerous complex issues You can apply HCC s extensive experience and knowledg
40. iness new house and always a crisis at hand Now I find myself with a very different perspective genetically irrelevant watching a new generation of parents starting out en joying friendships forged over many decades and less preoccupied with the exi gencies that always turn out to be so unimportant once a little time passes Those ba bies are grown the business sold long ago and crises rare Everything changes And so much has changed in this industry I don t have a copy of the June 1990 issue of this magazine but the very first ESP issued about a year earlier had by rough count ads from 60 different companies Only a dozen or so of those outfits are still around or selling the same sorts of products Do you old timers remember Ready Systems Huntsville Microsystems Softaid AD 2500 Whitesmiths All gone sold their products largely for gotten Strangely Wind River didn t advertise in that issue But they sure bought a lot of others who did during the stock bubble of the early 2000s In one acquisition spree ISI after buying Diab and SDS was In turn purchased by Wind River all in a matter of weeks One friend worked for all of those companies without ever changing jobs Intel which now owns Wind River had a full page ad for an 8051 in cir cuit emulator Other companies have been born in the intervening decades Some with the biggest ads in recent ESDs didn t exist in 1990 like Express Logic and
41. ister transfer level RTL code The first step algorithm design is usually done in C or C where the high level code that describes how the system will function is cre ated To be implemented in hardware this high level code must be converted to RTL code using a synthesis tool It s almost never the case however that high level synthesis using the result of the algorithm design phase will produce a desirable RTL implementation An ar chitecture design phase that precedes high level synthesis is required in or der to produce RTL code with the de sired characteristics Making a translation to SystemC for this step has become the preferred high level design method In this arti cle I ll give some examples of steps taken in the architecture design phase that can help you achieve good RTL code High level design has many ad vantages over the more commonplace design flow that begins with RTL code Among the most compelling advantages is the improved verifica tion efficiency that a higher level of abstraction offers It s apparent to the www embedded com embedded systems design JUNE2010 17 Leading Embedded Development Tools High level design flow Algorithm design Architectural design High level synthesis Logic synthesis For Microcontroller Software development tools for ARM Cortex M Cortex R 8051 and 166 MCUs RTOS and middleware libraries USB JTAG adapter and evaluation boar
42. ith Express Logic s award winning BenchX IDE or use tools from over 20 commercial offerings including those from ARM Freescale Green Hills Microchip MIPS Renesas and Wind River Ll With Express Logic s small fast royalty free and industry leading RTOS TCP IP stack FileX9 FAT file system and USBX USB stack Easily With Express Logic s graphical TraceX event analysis tool and new StackX stack usage analysis tool See exactly what is happening in your system which is essential for both debugging and optimization gt S TS Confidently No matter what it is you re developing Express Logic s solutions will k help you build it analyze it run it and ship it better and in less time Join the success of over 600 000 000 deployed products using Express Logic s ThreadX BEN CH THREAD TRACE STAC K logic For a free evaluation copy visit www rtos com 1 888 THREADX wing Teno system M EMBEDDED SYSTEMS DESIGN Editorial Director Richard Nass 201 288 1904 rich nass ubm com Managing Editor Susan Rambo susan rambo ubm com Contributing Editors Michael Barr John Canosa Jack W Crenshaw Jack G Ganssle Dan Saks Larry Mittag Art Director Debee Rommel debee rommel ubm com European Correspondent Colin Holland colin holland ubm com Embedded com Site Editor Bernard Cole bccole acm org Production Director Donna Ambrosino
43. itting BY CHRIS THRON n many embedded systems design applications line fitting tech niques particularly minimax algorithms are used instead of the more well known regression methods to fit noisy data More of ten than not minimax fitting is preferred to regression when the goal is to find a fitting line with minimum tolerance such as some automatic control applications My first exposure to minimax line performance was not a priority be fitting came via an engineer who asked cause the computations would be me to help him fit some sampled sen done off line sor data He was getting unacceptable This article presents my own at results with regression and thought tempts to meet these requirements It that minimax might do better The en describes both useful strategies and gineer told me that he wanted some pitfalls to avoid in tackling similar thing quick and simple and that small problems code size was required but that high www embedded com embedded systems design JUNE 2010 25 REGRESSION DOES NOT ALWAYS GIVE THE BEST LINEAR FIT By far the most common way to fit noisy data with a line is to use simple regression If the noisy data consists of points n 1 N then the re gression equations give where and are defined In terms of the accessory values Xx Lyx and Xy as follows There are cases where regression is not the best option when
44. ld a half day tuto rial on how to get started in an embedded design using Android as your OS The class was packed to say the least The next day at ESC I moderated a panel called What it takes to build a device using An droid That too was packed So there must be something to this phe nomenon As was the case with Linux some of the well known operating system suppliers have either released or are readying a commercial ver sion of Android or will support it in some fashion That list includes Green Hills Mentor Graphics and Wind River I expect like Linux it will have an impact but only in cer tain niches We ll have to wait and see how packed those classes are next year Richard Nass rich nass ubm com www embedded com embedded systems design JUNE 2010 MIRSA Critical Control the sea Cutting edge reliability E S Royal Navy Astute 2 bc m d Class nuclear powered hi attack submarine E E x es E Thales periscope provides EOM a 360 scan of the surface Te above with minimal risk of detection Wind River embedded solutions deliver the breakthrough dependability and performance essential innovation To control the sea submarine depends on remaining invisible But when designing and building a sub visibility is critical That s why Thales partnered with Wind River to create a breakthrough in periscope design for the Royal Navy s new Ast
45. le 11 1 gt CY CUp Cend Y CUpCend 1 C11 UpCend Up Up 1 end 1 if Clength Up 1 break endif end Up Up 11 end Compute Lower envelope via Graham scan for 11 3 1 length CY while CY 1i1 YCLoCend CLoCend LoCend 1 lt CYCLoCend YCLoCend 1 i11 LoCend Lo Lo 1 end 1 if Clength Lo 1 break endif end Lo Lo 11 end 2 Find max Lo distance between all consecutive pairs of Up points jj 2 max_dist 0 max up index 0 max lo index 0 for 11 2 1 length CUp 2 1 For given pair of Up points find the Lo point between with largest distance a temp CYCUpCT1 YCUpC11 1 CUpC11 Up C11 1 b temp YC UpCii 1 UpCii YCUpCi i UpCii DD2 CUpCi i UpCii D5 while Lo Cjj2 UpCii temp dist Lo jj a temp b temp YCLo jj if Ctemp dist gt max dist max up index 11 1 max lo index jj max dist temp dist endif jj jj 1 end end 4 4 1 Similarly find max Up distance between all consecutive pairs of Lo points jj 2 max_d1st2 0 max up index2 O0 max lo index2 0 for 11 2 1 length Lo a temp CY CLo 11 Y CLo C11 1 Lo C11 Lo CT11 1 b temp CY CLo C11 1 Lo CT11 Y Lo C11 Lo C11 1 Lo C11 Lo CT11 1 while Up J1J lt Lo C11 temp dist Y Up jj Up JJ a temp b temp if Ctemp dist gt max dist2 max lo index2 11 1 max up index2 jj max dist2 temp dist end jj jj 1
46. loping directly and exclusively on the embedded target Also he apparent ly means API level fidelity of the code so you compile the embedded code with a host compiler and run the code natively on the host This is contrast to much harder to achieve binary fidelity where you compile the code with a cross compiler for your embedded tar get and execute the binary in a simula tor on the host Now to achieve API level fidelity you typically cannot access the device registers directly because they don t ex ist on the host Instead you need to plug in some other code in all these places For example instead of toggling an LED by writing to a register on the host you might call a function to change a bitmap on your simulated dis play And here is where the technique recommended by Dan comes in For example the old fashioned way of toggling an LED is shown in List ing 1 This code is difficult to replace with a function call on the host In C you could use operator overload ing so the operation could indeed become a function but in C you can t In contrast Dan recommends something like that shown in Listing 2 This code is very easy to re implement The technique is not only safer as Dan describes It is also much more TDD friendly on the host So the technique is not only safer as Dan describes It is also much more TDD friendly Samek state machine com See more comments on this article at
47. mial to be a minimax polynomial Assuming that the given interval is a b Cheby Upper envelope Lower envelope Case B shev s criteria states that if P x is the minimax polynomial of degree n then there must be at least n 2 points in this interval at which the error function attains the absolute maximum value with alternating sign Now here was something I could take to the bank In the case of a linear fit 1 1 there had to be at least three data points where the maximum error was achieved here we denote the three points as P5 and P4 where and x lt x lt x Furthermore there were only two possibilities for these three points Largest vertical distance between upper edge and lower vertex upper edge and lower vertex Minimax line parallel to upper edge and halfway between edge and lower vertex Minimax line parallel to upper edge and halfway between edge and lower vertex Figure 3 28 JUNE 2010 embedded systems design www embedded com A P P and P lie above below and above the fitted line respectively B P P and P lie below above and Segment P P must be parallel to the fitted line This is necessarily true because P and P have the same er D xx v2 v1 u2 ul v1 xu2 v2xul u2 ul y below the fitted line respectively ror hence the same vertical distance 3 Select the upper vertices to the line ul v1 u2 v2
48. more than a few lines of code before testing again I m never more than mildly surprised if they don t work I guess you could call this approach programmed programming JUNE 2010 embedded systems design www embedded com THEORY VS PRACTICE I have another reason to start coding early I don t know exact ly how the program should be structured Like the potential fish or duck many things are not clear yet In the old discred ited waterfall approach this was not a problem We were sup posed to assume that the guys who wrote the top level require ments document got it perfect the first time From then on it was simply a matter of meeting those requirements To be fair some visionaries of this approach had the sense to add feedback loops from each phase back to the previous one This was so that in the completely improbable off chance that someone made a mistake further back upstream there was a mechanism to fix it Practically speaking it was almost impossible to do that Once a given phase had been completed each change required a formal engineering change request ECR and engineering change notice ECN We avoided this like the plague The guys in the fancy suits just kept telling the customer that the final product would meet the original spec Only those of us in the back room knew the truth This is why I like the spiral development approach also known as incremental or prototype approaches As the pro gram evolves
49. my usu al ultra tactful manner why on earth they chose the de velopment environment without discussing it with those of us who had to use it Second I d campaign mightily for an environment more suited to my approaches As an aside I used to teach a short course in the devel opment process for embedded microprocessors I told the management folks that they should plan to give their soft www embedded com embedded systems design JUNE 2010 gt d T c N a m Z ILI a ware folks every possible computer tool available hang the expense I pointed out that software development is very labor intensive so the front end cost of good tools would be quickly made up by increased programmer productivity Needless to say sometimes I m successful in changing the managers minds More often I m not So what do I do then I make do as best I can but I discreetly tweak the system and my approach to make the environment behave more like an IDE For example I might add script files hot keys etc so that pressing a single button would invoke one tool from another REQUIREMENTS Crenshaw s Law 42 says Before setting out to solve a prob lem find out what the problem is Law 43 says design it be fore you build it not after In the software world this means performing requirements analysis Write down in as much detail as you can what prob lem you want the software to solve how
50. n as below it only requires four registers instead of 1024 for int j 0 j lt 1024 1 4 1 for int 1 0 1 lt 4 i 1buf 1 in getQ obuf fC 1buf 0 ibuf 1 ibuf 2 ibuf 3 out put obuf Example 2 way The algorithm in software will simply iterate over the whole im age while the hardware implemen sc uint 5 idx tation will work on a smaller win sc uint 8 data array 64 data array idx array idx 32 dow that moves over the image as Example 1 demonstrates e Conditional expressions are cheap in software but can be expensive The array is flattened into hardware registers so accessing it with a in hardware This is illustrated variable index requires two 64 to 1 8 bit muxes between the registers when accessing array elements and the adder By rewriting the code as follows the muxing can be re with a variable index when the ar duced to half that taking advantage of the knowledge that the array is ray is mapped onto dedicated only being accessed in two contiguous subsets The loop will simply hardware registers shown in turn into a set of wires Example 2 SC uint 5 1dx H sc uint 8 data array 64 The same algorithm sc uint 8 tmp array1 32 tmp array2 32 e implemented in hardware for unsigned j 0 j lt 32 j i tmp arrayl j array j can often be done with a e much smaller window of data tmp arrayl idx tmp_array2 idx 32 the data being processed
51. n even more so now with gate oxide thicknesses just five atoms thick What an amazing world we engineers have built There was no Linux and any vari ant of Unix was only rarely found in an embedded system Windows CE didn t exist GUIs of a sort were some times found in the embedded world powered by home grown libraries or a few commercial products But a high end embedded CPU then was a fast like 20 MHz 16 bitter so processor cycles were in short supply in January 1991 made some predictions Let s see how they fared thought C would win Wrong And thought cubicles would disappear PREDICTIONS Bill Vaughn noted The groundhog is like most other prophets it delivers is predictions and then disappears Well in January 1991 I made some predictions in this column Let s see how they fared I thought C would win Wrong at least so far Its market share in firmware struggles along at about 30 This is still unfortunately the world of C I like C it s fun it s ex pressive and one can do anything with it Which is the problem C worked well when programs were small but it scales poorly as line counts explode The siren call of reuse seduced me and I wrote that we d find vendors selling chunks of code just as they push ICs Databooks would list lots of firmware modules completely spec ed out We d just string them together and build the system out of compo nents Strike two And what th
52. nctions as programmable Stop mode 200nA typ 2 0 max wakeup timer e Wide 1 7V to 3 6V operating voltage range IR timer simplifies support for low e IP protection speed infrared communication Secure MMU supports multiple privilege IR driver capable of 25mA levels helps protect code from copying and sink current reverse engineering Part Program Data Operating Price Memory Memory Voltage V MAXQ610B 0 to 70 64KB flash 2KB SRAM 171036 40 TQFN MAXQ is a registered trademark of Maxim Integrated Products Inc SPI is a trademark of Motorola Inc 11000 up recommended resale Prices provided are for design guidance and are FOB USA International prices will differ due to local duties taxes and exchange rates Not all packages are offered in 1k increments and some may require minimum order quantities www maxim ic com MAXQ610 info eae SANNET IU 2131 www maxim ic com shop www em avnet com maxim INNOVATION DELIVERED For free samples or technical support visit our website Innovation Delivered is a trademark and Maxim is a registered trademark of Maxim Integrated Products Inc 2010 Maxim Integrated Products Inc All rights reserved m A a MT R wl ET DOE a uci EM C mos x x5 a i een AM ull 1 1 A Il i a
53. ng incremental and agile ap proaches and extreme programming XP I m a big fan of XP though I m not sure that what I do fits the mold Today no one in their right mind would still support the waterfall approach right Well I don t know In 1984 our soft ware managers had a rule you were not allowed on penalty of something bad to even run the compiler until your soft ware had passed code review Even then the compiler was nev er to be used for developing test drivers and supporting unit testing It was only to be used on the entire system build after all integration had been done You should go back and reread that paragraph to really get your arms around the concept We had a nice and relatively modern timeshare system Unix with a nice compiler pro gramming editor debugger and other aids but we weren t al lowed to use the compiler We were perfectly free to use the ed itor to write the code but only to document our designs for the code reviews We were expressly forbidden to actually run the compiler How brilliant was that But that was 25 years ago We don t do anything so ridicu lous now right Well let me see more recent project I heard a manager berate a col league for actually writing code before the requirements re view If he had been working in his old company the manager said he would have fired the guy for such a violation of the rules That was way back in let me
54. ng place real time and is continually adjust ed as new data comes In e there is a possible alias in the y val ue for instance with angle data there may be an ambiguity of k 7 or 2k 7t This article will discuss minimax fit Additional articles which will appear later this month on Embedded com will deal with the other cases MINIMAX FITTING POLYNOMIALS AND LINES Minimax fitting is preferred to regres sion when the goal is to find a fitting line with minimum tolerance This makes it appropriate for some automat ic control applications The difference between minimax and least squares fitting is most appar ent when the deviations are not sym metrical as shown in Figure 1 The re gression line follows the bulk of the data while the minimax line tries to split the difference between high and low deviations In the case shown in Figure 1 the minimax line gives an er ror tolerance about 40 smaller than that achieved via regression LIBRARIES OF DOWNLOADABLE ALGORITHMS At the time I started working on the problem I was not aware of a linear minimax fitting algorithm However I did know of a general method for poly nomial minimax fitting called the Re mez algorithm polynomial fitting in cludes linear fitting as a special case There are numerous references to the Remez algorithm on the web includ ing Wikipedia and in numerical analy sis textbooks With a little searching I found that there is
55. omorrow EE EMBEDDED SYSTEMS DESIGN VOLUME 23 NUMBER 5 JUNE 2010 16 E Cover Feature Transitioning from C C to SystemC in high level design BY JOHN SANGUINETTI 75 far easier to do architecture esign in SystemC than it is to do it in C and If co designing hardware and software using high level design methods much of your work will be done in an archi tecture design phase in SystemC Here s why Line fitting algorithms for exceptional cases minimax line fitting BY CHRIS THRON Minimax fitting is often preferred to regression when the goal is to find a fitting line with minimum tolerance such as some automatic control applications EMBEDDED SYSTEMS DESIGN ISSN 1558 2493 print ISSN 1558 2507 PDF electronic is published 10 times a year as follows Jan Feb March April May June July August Sept Oct Nov Dec by the EE Times Group 600 Harrison Street 5th floor San Francisco CA 94107 415 947 6000 Please direct advertising and editorial inquiries to this address SUBSCRIPTION RATE for the United States is 55 for 10 issues Canadian Mexican orders must be accompanied by payment in U S funds with addi tional postage of 6 per year All other foreign subscriptions must be prepaid in U S funds with additional postage of 15 per year for surface mail and 40 per year for airmail POSTMASTER Send all changes to EMBEDDED SYSTEMS DESIGN PO Box 3404 Northbrook IL 60
56. or faster run time Part 2 and 3 of this article will be online on Embedded com in the near future Point 2 slope Point 1 slope intercept Chris Thron is currently assistant profes sor of mathematics at Texas A amp M Univer sity Central Texas and does consulting in algorithm design numerical analysis system analysis and simulation and sta tistical analysis Previously Chris was with Freescale Semiconductor doing R amp D in cellular baseband processing amplifier predistortion internet security and semiconductor device performance He has six U S patents granted plus three published applications His web page is www tarleton edu faculty thron and he can be reached at thron tarleton edu ENDNOTES 1 The convex hull of a set S is the smallest convex set containing S Alternatively it is the intersection of all half planes that contain S REFERENCES boost libraries resources for minimax polynomial fitting e Minimax Approximations and Remez Algorithm Available from www boost org doc libs 1_36_0 libs math do c sf_and_dist html math_toolkit toolkit in ternals2 minimax html accessed 18 March 2010 describes code The Remez Method Available from www boost org doc libs 1_36_0 libs math do c sf_and_dist html math_toolkit back grounders remez html accessed 18 March 2010 describes Remez algorithm JUNE 2010 embedded systems design www embedded com MathworksTM resources
57. pect of any endeavor is learn ing After nearly a half century of sail ing for instance I still learn new aspects of the sport every year In elec tronics and firmware things change at a much more dizzying rate than in the ancient world of rope and sails Not a day goes by that one doesn t pick up something new The same goes for writing Gram mar and style are important so I ve learned to keep English reference books at hand And I ve learned that the Chicago Manual of Style is not only useful it s a pretty darn interesting read in its own right at least for those who love language learned that no matter how JUNE 2010 35 36 E a l ve learned how smart and at times funny ESD readers can be Over two decades of writing for this magazine I ve exchanged over 100 000 e mails with you some of whom have become good friends carefully one prunes all hint of politics and religion from a column at times a vocal few will get outraged for a per ceived right left wing bias I ve been accused of being a miserable conserva tive shill and a raging left wing social ist But as America s political dialog has been getting more charged and less reasoned and as the Internet has erod ed all sense of manners responses from ESD s readers are nearly always well thought out and polite You are getting more diverse I don t know the magazine s demo graphics but e mail inc
58. pringer New York NY 2006 e Kurup P T Abbasi and R Bedi It s the Methodology Stupid ByteK Designs Inc Palo Alto CA 1998 SEGGER E Emulator win ARM and Cortex USB to JTAG Emulator Fast 720kb s Download Speed s Serial Wire Debug SWD Support s Multicore Debugging Support Auto JTAG Speed Recognition 8 12 00 J Link ARM PRO Adds Ethernet Conectivity and Licensing for All Enhancement Modules The J Link can be coupled with a number of available software modules to fit your application needs J Flash is a stand alone application used with the J Link to program internal and external flash devices J Link RDI permits the use of the J Link with an RDI compliant debugger J Link GDB Server is a remote server for GDB J Link Flash Breakpoint permits you to set an unlimited number of wi ue breakpoints while debugging in flash As the original manufacturer of the J Link and its OEM derivatives we are happy to inform you that this software also su ports the DIGI JTAG Link Atme IAR J Link KS SAM ICE and 60 Special Offer I 8 08 90 J Link EDU Educational Use J Link Includes Flash Breakpoints Includes J Link GDB Server www segger us com edu html J Link Educational Use EDU Bundle 1 ee ESTE ESTO RETE CEPS 29 5 b y i Pra RET S res add rn MET 3x5 estara so ar Pop oA www embedded com
59. reasingly comes from areas of the world where engineering was nearly unknown 20 years ago Occasionally that correspon dence is framed more aggressively than one expects in the West Required ur gently schematics and source code to TT ws E 5 T ae build a system that What I haven t learned but want to is if this is a result of some intriguing differ ence in our cultures or perhaps a dif ferent take on etiquette Some of that diversity includes a wider range of languages English is of ten not an ESD reader s native tongue If I were wiser I d adopt that essential fact and stick to simpler sentence struc ture and mostly monosyllabic words If the goal is to communicate it makes sense to subset the language to one that is comprehensible to the entire reader ship Rather like applying MISRA to C or SPARK to Ada But that s no fun English is mar velously rich in expressive words and constructs It s delightful to surf the language I ve learned the peril of idioms which will trip up a conversation even between an American and a English man Add those to a publication read by folks from a hundred more distant cultures and you re sure to come a cropper For instance I recently re ceived this e mail Dear Professor Recently I have read your ar ticle The last section of the arti cle At the risk of sounding like a new age romantic
60. rs and scientists in virtually every industry are creating new ways to measure and fix industrial machines and processes so they can do their jobs better and more efficiently And along the way they are creating innovative solutions to address some of today s most pressing environmental issues zx cao ar pes passu ak OU DOP le Tae TY 1 he TNH l a l axe lava XN ar a Ya 4 gt iiiI A M 4 li cA 0 Bist 16 Case STI TY i I T7910 e1010 Z U O OIM DUUM oE EIFL ATARE aww A Ww NATIONAL J INSTRUMENTS How write software n the two decades or so that I ve been writing this column we ve covered a lot of topics ranging from the best implementation of abs to CRC algorithms to logic theory Karnaugh maps and electronic gates to vector and matrix calculus to Fourier and z transforms to control theory to quaternions and lots more I even wrote about whether or not the ancient Egyptians really built the val ues of T and into the Great Pyramid they did And v2 too Almost all of the topics involved math but they also required software either for embedded systems or just to illustrate a given algorithm But I ve never talked much about the way I write software I thought the 1s sue of my own personal software development methodolog
61. sGroup cover feature Possible configurations of maximum error points for minimax linear fit Equal maximum distances above and below the minimax line Case A Figure 2 codes in Table 1 are designed for gener al purpose and were far too large and complex for the specific application I wanted My first thought was to try to sim plify one the codes based on the docu mentation provided As shown in Table 1 only two libraries provided documentation of the algorithm while the others gave references to the litera ture I wanted to avoid digging through textbooks and journals if pos sible so I started hopefully through the www boost org article on the Remez algorithm My enthusiasm was some what dampened when I encountered several mathematical statements that 1 Properties 1 3 for Cases A amp Upper envelope 78 Oo os Lower envelope Largest vertical distance between P3 pue 0 Equal maximum distances above and below the minimax line could easily prove were not true My guess is that the article was written by an implementer who did not fully un derstand the algorithm caveat lector THE HEART OF THE ALGORITHM The Mathworks documentation on the other hand I found to be accurate and very understandable with clear accu rate and illustrated with excellent fig ures There I found the following pearl of wisdom Chebyshev gave the criteria for a polyno
62. sequently PoC algorithms processed at a time and either writ you to the architecture design step often simply store a lot of data in ten once or passed on to another where you ll improve whatever rele memory then access it in whatever processing phase Image processing vant design criteria have not been met fashion is convenient for the algo algorithms are usually done this This loop back to the architecture de sign step is a key part of the high level design process Support for ARCHITECTURE DESIGN The architecture design step in Fig ARC ure 1 is the fundamental hardware ARM design step in a high level design BlackFin flow High level n EW8051 when done using Plain old 1s of ten presented as a process where the HEB HERE designer simply takes a C algorithm MIPS32 MIPS64 runs it through a high level synthesis NIOS XTENSA tool and gets high quality RTL This SH3 SH4 high quality result however almost never happens and over 60 other The architecture design step is processor architectures where hardware design is done for a fundamental reason Algorithms de veloped in C are software representa tions and there are very different costs Consumer and benefits between hardware and software implementations Some of the fundamental differ ences between software and hardware implementations are Debug Features e Unrivalled functionality e Multi core and co processor debugging
63. swamped so it takes days for me to reply but the questions comments and critiques are so perceptive and interesting I try to respond to every one This discourse with you gentle readers is the best part of writing a column As Dean Martin used to say keep those cards and letters coming And thanks for the dialog AS EMBEDDED TECHNOLOGY ADVANCES WE RE RIGHT THERE WITH YOU Li lio 3 L E B E TS Tae TA MoO 01 0 1501 071 0 4 0 0 1 0 4 657 STREET 01010101101010101010101010 1zG1 1 TU 8101010151010101080 010 2 ica e Ss afta NE CREMAS 77 7 7 cna ANDROID NUCLEUS LI NU X MENTOR EMBEDDED Innovation is boundless Mastering its possibilities requires a partner with the very latest in embedded software solutions Mentor Embedded delivers solutions that reduce your development risk and shorten project cycles We provide proven software and tools along with services for Linux and Android development that enable our customers to succeed in emerging areas such as Android beyond mobile multi OS multicore and advanced 3D user interfaces As the industry s leading independent vendor Mentor Embedded stands ready for your next innovation To learn more visit www mentor com embedded 2010 Mentor Graphics Corporation All Rights Reserved Mentor Graphics is a registered trademark of Mentor Graphics Corpor
64. ted to loop back to the beginning of the section and read it again Programmatically this is the familiar www embedded com embedded systems design JUNE2010 11 12 toolbox wh1le 1 infinite loop structure If you re particularly dense you could be stuck here forever Alternatively and better you might be directed to a sepa rate section which explains the facts in more detail It s a sort of hypertext Ideally the writers of the text were smart enough to tell when a given student needed extra instruction The inventors of programmed learning were careful to point out that those writing such textbooks should give the information in very small steps You don t write a whole chapter on say the quadratic formula and save all the questions for the end of the chapter You teach a very few simple concepts two or three at most and ask the ques tions immediately The reason they say is that people need lots of positive feedback If they get too many answers wrong they get dis couraged and give up By giving them easy questions often you give them lots of warm fuzzies and make the study seem a lot more fun than drudgery Everybody knows that people like to succeed more than to fail and they like the feeling that they can actually complete the task The notion of programmed learning capitalizes on these natural tendencies I think that s why I start with the null program I like my warm f
65. tions of the inner most loop In the first ver sion of elementloop a multicycle pipelined part can be created that will do four multiply operations and three additions producing a resulting ma trix element every cycle after an initial latency This code required hard cod ing the three addition operations so if DIM were a value other than four that line of code would have to be changed The second version of elementloop results in a much smaller implemen tation using a sin gle multiply and addition that will produce a resulting matrix element every four cycles The synthesis di rectives to unroll the loops flatten the arrays pipeline the inner loops and create custom datapath functional units are not shown Example 3 shows two alternatives to writing the inner loop of the matrix multiply and it shows the difference between writing code as software and writing it for hardware implementa tion Executed on a standard proces sor both of these versions would have the same performance since there is only one multiplier and one adder available However when using high level synthesis the synthesis tool is able to use more than one multiplier and more than one adder in the first case In the second case the synthesis tool would use just one multiplier and one adder or a combined multiply accumulate functional unit A NEW STEP TOWARD QUALITY The architecture design step is where hardware design is done
66. too big to be useful Or you can start bottom up with a lot of neat little functions only to discover that you can t figure out how to connect them together In ei ther case you don t know until the very end that the system is not going to work That s why I prefer what I call the outside in approach I start with both a stubbed out main program and the low level 2010 Actel Corporation All rights reserved Innovative Intelligent Integration AG se k KX Civ XN LT gt N 4 war FR oN TA 7 Ta ONLO Ww ed 089 254 CN NN hu a JS AAA ia zu lt POS um s c y S MAY NC T hs a Y AVe l XS Ln MN M LAN DR PY 8 RAY nek TD We Im NONEM Wi SMARTFUSION FPGA ARM Cortex M3 Programmable Analog 25 WS 4 A vj v a Y AD C at gt AS N f a Actel POWER MATTERS 14 toolbox functions I know I m going to need anyway Quite often these low level functions are the ones that talk to the hardware In a recent column I talked about how we wrote little test pro grams to make sure we could interface with the
67. ute Class submarine Relying upon the proven innovation reliability performance of our VxWorks RTOS platform Thales developed state of the art imaging system that provides stable high resolution views in the world s most demanding conditions It s the kind of teamwork supportthat s made Wind River trusted leading provider of advanced embedded solutions for aerospace and defense To see how Wind River can help you innovate with confidence download our Mission Critical Toolkit at www windriver com missioncritical performance 2010 Wind River Systems Inc The Wind River logo is a trademark and Wind River is a registered trademark of Wind River Systems Inc Other marks are the property of their respective owners Photograph by Jonathan Massey Crown Copyright MOD image from www photos mod uk oarit TDD and models for memory mapped devices is article Dan Saks Alternative models for memory mapped de vices May 2010 p 9 www embed ded com 224700534 ties very nicely to the recent discussion about Test Driven Development see www embedded com 224200702 and www embedded com 224700535 The relevance of the tech niques that Dan recommends here is critical for TDD but it is not obvious at first glance so let me explain From both interviews with James Grenning about TDD it is obvious that he recommends development and test ing the code on the host as opposed to deve
68. uzzies early and often When I m writing code I want to expect success I m mild ly surprised if a bit of code doesn t compile without error the first time I m shocked to my core if it compiles but doesn t run properly or doesn t give the right answer Some programmers I submit have never experienced that feeling Certainly not those poor souls that had to write and integrate the entire system before even trying to compile it How certain of success would they be THE BIOLOGICAL ANALOGY Think of a human egg cell Once fertilized it starts dividing first into two cells then four then sixteen and so on The egg has become a zygote Early on every part looks like every other one Later they will differentiate some cells becoming skin cells some nerve cells some heart and muscle cells But in the early stages they re completely undifferentiated The organism may ultimately become a lizard a fish a bird or a fern but at this point all the cells are alike I think of my null program as the software equivalent of a zygote At the early stages they can be any program at all That s why I don t sweat the requirements too much The null program and its cousins will satisfy any set of requirements to some degree of fidelity The requirements will flesh out dif ferentiate along with the program that satisfies them As I continue the software development process I stick to the philosophy of programmed learning I never write
69. y would be at best a distraction from the topic at hand and at worst a subject of great hilarity I ve always known that the way I write software is different from virtually everyone else on the planet Is this true for everyone I don t have a clue That s why I thought it would be fun to share with you the way I write software If you do it the same way that s great It would be nice to know that there are other folks who share my approaches On the other hand if it s not the same way you do it we have three possible outcomes Either you ll learn from me and decide that some of my approach es have merit I ll learn from you and decide that I ve been doing it wrong all these years or my revelations will serve as a subject of great hilarity Any of those outcomes I submit would be good It s a win win win situation THE ENVIRONMENT Let s begin with the software development environment In Jack Crenshaw is a systems engineer and the author of Math Toolkit for Real Time Programming He holds a PhD in physics from Auburn University E mail him at jcrens earthlink net My own personal software devel opment methodology would be at best a distraction and at worst a subject of great hilarity orogrammer lt Kole 0 my time used some rotten development environments I ve worked with systems whose only I O device was a Teletype ASR 33 We got so tired of emptying the chad catcher on
70. you want it to solve the problem and how you want people to interface with it In the 1980s the popular project plan was to start with an analysis of the system requirements Then you decompose into software requirements design requirements etc At the end of each phase you hold a formal review before moving onto the next step No fair skipping ahead They called this process the waterfall approach If you were writing a formal proposal to NASA DoD or whoever a clever picture of the waterfall could win you the contract In the waterfall diagram the code and unit test phase of the plan was usually the next to last step in the process the last being integration and test And woe be upon anyone who skipped ahead to writing code Today the waterfall approach has been completely discred ited and deemed ineffective Personally I think the only reason it seemed to work was that nobody actually followed it Some of us practitioners broke the rules and skipped ahead to try out our ideas on the side The whole thing was a sham We had slick looking and impeccably dressed salespersons giving for mal presentations to the customer showing them how won derfully the waterfall approach was working and assuring the customer that we were 90 complete Meanwhile a few of us slaved away in a secret back room using approaches that actu ally worked But those were the bad old days Today the hot keywords are spiral development prototypi
71. ystemC from the original C is a small step compared with the iterative process that takes place while refining the hardware im path widths and developed for just reason plementation elementloop i j sc uint lt 3 gt J mp c 2 temp c 3 sc uint lt 3 gt J i1 reads the A and B matrices writes the resulting C matrix www embedded com embedded systems design JUNE 2010 21 cover feature Example 2 shows a SystemC frag ment that adds two elements from an array where each operand is half the array apart The straightforward origi nal code results in two big muxes when implemented in hardware The less obvious modified code results in a much smaller hardware implementa tion The examples show transforma tions made to source code to produce a better hardware result out of high level synthesis These are examples of optimization where the modified code will result in a smaller more efficient hardware implementation when high level synthesis is applied In many cas es the design process is one of succes sive optimizations in order to get a hardware implementation that is as small fast and or power efficient as possible This is a manual process where the hardware designer uses his This is a manual process e Where the hardware designer uses his knowl e edge and experience to make the appropriate e code transformations knowledge and experience to make the appropriate cod

Find the way from C/C++ to SystemC

Contents

Download Pdf Manuals

Related Search

Related Contents