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Preliminary User`s Manual

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1. Table 8 Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Pinout appraisal connector X2 Ball Bemerkung Signal IO GMO GMO Lane E T P Lane B T Ni GAO GMO Lane PPab Lane E Fa PN GAO GMO Lane O T P Lane DO T PN GMO GMO Lane Q K P Lane D Re M GMO GMO SO_REFCLE_2 SO_REFCLE_2 GMO EC LGEICLZ 09 EC GPIO3_ 10 EC Gra TI EC GPIO3_ 12 EC GPIO3_ 13 EC GPIO3_ 14 EC LGEICLZ Q GMO EC GPIO3_ 21 EC GPIO3_ 22 EC GPIO3_ 23 EC GFOS 24 EC GPIO dh EC GPIOS_ 2b EC GPIO3 27 GO EC3 GPIO4 02 ECs GPIO4 03 EC3 GPIO4 04 EC GRIDA 05 EC3 GPIO4 Q EC GRIDA oF EC3 GPIO4 Op GMO WART EXT BASE GFPIO116 LART EXT BASE GFPIOLI1F LART EXT BASE GPiO_is LART EXT BASE Gplio 19 LART EXT BASE GPIOL 20 ARAT EXT BASE GP a LART EAT BASE Gabi z GMO JTAG JTAG JTAG JTAG JTAG GMO Pin P vi v4 wi 73 80 v1 31 a2 v2 88 84 Aa 85 86 v Aad 89 90 31 92 Pi 93 94 mi 95 96 P2 37 98 N3 99 100 P3 101 102_ M4 103 104 Fa 105 106_ Ball Signal Bemerkung GAO Lane 4 T P Lane oa T NM GAO GAO Lane A Pa b Lane A Ha hN GAO GAO Lane C T P Lane C T Ni GAO GAO Lane Lab Lane CPahN GAO GAO SO_AREFCLE_1 S0 REFCLE 1 GAO Wb GPIO3_d2 EC AA GPIOS_O3 EC T GPIO3_04 EC D GPIOS_O5 EC v GO Q EC Ti GPIOS 07 EC GAO DA Gjo 15 EC Aa GFIO3_16 EC T GJO 17 EC T GJO t EC T GPIO3_19 EC US G
2. 125 C HC bus 3 3 V supply Programmable ALERT and T_CRIT 0utputs Table 11 SA56004X slave addresses Tabie 4 Slave addresses Type number Device slave address SAS56004AD 1001 000 SAS6004ADP SAS6004ATK SA560048D 1001 001 SAS6004BDP SA56004CD 1001 010 SAS56004COP SA56004D0 1001 O11 SA56004D0P SA56004EDE 1001 100 SAS6004EDPL SASG004ETKL SAS6004FD 1001101 SA56004FDP SA56004GD 1001 110 SASGOOSGDP SAS6DOSHD 1001 111 SA56004HDP The communication is done via the RC bus The slave address of the device is factory programmed Programmable warning signals ALERT The trigger level of the open drain signal is freely programmable and can be used as a warning The signal is routed to the connector No pull up is provided on the TQMLS102xA to remain variable If this is implemented on the carrier board any voltage can be switched T_CRIT The trigger level of the open drain signal is freely programmable Depending on the programming this value can also signal the most critical value This signal provides the option to trigger RESET independently or to send the signal to the power management uController placement option The signal is routed to the connector without pull up IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 22 The following Illustration shows the connection of the temperature sensor LS102x Pet Illustration 13 Wiring of temperature sensor For the rem
3. TQMLS102xA The TQMLS102xA is designed to be insensitive to vibration and impact Middle grade connectors which guarantee at least 100 mating cycles were used for the TQMLS102xA 7 6 Environment protection 7 6 1 RoHS The TQMLS102xA is manufactured RoHS compliant e All used components and assemblies are ROHS compliant e RoHS compliant soldering processes are used 7 6 2 WEEE The company placing the product on the market is responsible for the observance of the WEEE regulation To be able to reuse the product it is produced in such a way a modular construction that it can be easily repaired and disassembled 7 6 3 REACH The EU chemical regulation 1907 2006 REACH regulation stands for registration evaluation certification and restriction of substances SVHC Substances of very high concern e g carcinogen mutagen and or persistent bio accumulative and toxic Within the scope of this juridical liability TQ Systems GmbH meets the information duty within the supply chain with regard to the SVHC substances insofar as TQ Systems GmbH is informed by suppliers accordingly 16 4 EuP The guideline 2005 32 EC EuP is the next step after WEEE and RoHS for an environmentally friendly production of electric and electronic products The consideration of environmental requirements with the product design creation appropriate for the environment ecological design with the aim to improve the environmental compatibility of the product du
4. and contact IP00 Adequate protection has to be guaranteed by the surrounding system 45 Thermal management To cool the TQMLS102xA approximately 3 W have to be dissipated The power dissipation originates primarily in the CPU the DDR3L SDRAM and the PMIC The power dissipation also depends on the software used and can vary according to the application See Freescale Application Note 3 for further information The CPU belongs to a performance category in which a cooling system may be essential in certain applications It isthe responsibility of the customer to define a suitable cooling method depending on the specific mode of operation e g dependence on clock frequency stack height airflow and software 4 6 Structural requirements The TQMLS102xA is held in the mating plug connectors by the retention force of the pins a total of 280 For high requirements with respect to vibration and shock firmness an additional holder has to be provided in the final product to hold the TQMLS102xA in its position For this purpose TQ Systems GmbH can provide a suitable solution As no heavy and big components are used no further requirements are given 4 7 Notes of treatment To avoid damage caused by mechanical stress the TQMLS102xA may only be extracted from the carrier board by using the extraction tool MOZI8XXL that can also be obtained separately 2 5mm should be kept free on the carrier board along the longitudinal edges on both
5. sides of the TQMLS102xA for the extraction tool IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 26 5 TECHNICAL DATA 5 1 Vibration load Table 16 Vibration test Parameter Details Oscillation sinusoidal According to DIN EN 60068 2 6 Frequency ranges 2 9 Hz 9 200 Hz 200 500 Hz VVobble rate 1 0 octaves min Excitation axes X Y Z axis Number of frequency cycles 20 frequency cycles 2 FS 9Hz 3 5ms Amplitude 9Hz 200Hz 10msi 200 Hz 500Hz 15ms 5 2 Shock load Table 17 Shock test Parameter Details Shocks According to DIN EN 60068 2 27 The values shown are based on the guidelines of the standard DIN ETS 300019 Environmental tests for telecommunications equipment 6 SOFTWARE The TQMLS102xA is delivered with a preinstalled boot loader and a BSP which is configured for the Starterkit STK MBLS102xA The boot loader provides module specific as well as board specific settings e g e CPU configuration e PMIC configuration e RAM configuration and timing e eMMC configuration e Multiplexing e Clocks e Pin configuration e Driver strengths More information can be found in the Support Wiki for the TQMLS102xA IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 27 da SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS 7 1 EMC The TQMLS102xA was developed according to the requirements of electromagnetic compatibility EMC Depending on
6. the target system anti interference measures may still be necessary to guarantee the adherence to the limits for the overall system The TQMLS102xA it designed to pass the following tests e EMC Interference radiation Measurement of the electrically radiated emission for standard residential commercial and light industrial environments in the range of 30 MHz to 1 GHz according to DIN EN 61000 6 3 or DIN EN 55022 e EMC Interference radiation Measurement of the electrically radiated emission for industrial environmentsin the range of 30 MHzto 1 GHz according to DIN EN 61000 6 4 or DIN EN 55011 e EMC Immunity according to EN 61000 4 2 Electrostatic discharge immunity ESD e EMC Immunity according to EN 61000 4 3 Radiated radio frequency electromagnetic field immunity e EMC Immunity to fast transients according to EN 61000 4 41 Electrical fast transient BURST e EMC lmmunity to surge according to EN 61000 4 57 Surge immunity test SURGE In DC networks an inlet length of less than 10 m is assumed For the audit a reference power supply has to be defined supplied Signal and 1 0 lines gt 30 m must be checked for SURGE e EMC Immunity according to EN 61000 4 6 Immunity to conducted disturbances induced by radio frequency fields e EMC Immunity according to EN 61000 4 11 Immunity to voltage dips voltage variation and short interruptions in the mains supply VOLTAGE DIPS e EMC Immunity according to EN 61000 4 297 Immunity t
7. 015 TQ Group Page 12 The QSPI interfaces 1 and 2 are routed to the connector as well Depending on how the QSPI interface is used SPIl and I C_3 are available by suitable multiplexing These signals are also routed to the connector MOR Flash 112 IFC Interface Illustration 5 IFC interface at the connector If the IFC interface is not used because the TQMLS102xA only boots from NOR flash some pins of this interface can be configured as GPIOs by suitable pin multiplexing These are available at the connectors The POR pin strapping pins according to Table 4 define the source for the RCW Reset Configuration Word Handshake PEL racer _ i PBL En QSPIICM Leg f PBL Error code SDHC ICM tntertace Be fomio COP gt IFCICM Ip Illustration 6 Block diagram PBL The following configuration pins are used as follows Table 5 Further configuration pins vvith optional vviring Configuration Signal Implementation Required for IFC Boot cfg_ifc_te IFC TE Sets the polarity Signal at optional X3 but with active pin strapping on the TQMLS102xA Defines the type of DDR cig_dram_type de Active pin strapping on the TQMLS102xA fix configured to DDR3L cfg_gpinput 0 7 IFC_AD 0 7 Available at X3 No PU PD option on the TQMLS102xA planned Default value 1111 1111 IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group EK Freescale provides a pin multiplexing table in Ex
8. A er rete ete NANA nete 22 Illustration 14 KOSI 24 REVISION HISTORY Rev Date Name Pos Modification First issue German English 0002 26 05 2015 Pez Document translated IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 1 1 ABOUT THIS MANUAL 1 1 Copyright and licence expenses Copyright protected 2015 by TQ Systems GmbH This Preliminary User s Manual may not be copied reproduced translated changed or distributed completely or partially in electronic machine readable or in any other form without the written consent of TQ Systems GmbH The drivers and utilities for the used components as well as the BIOS are subject to the copyrights of the respective manufacturers The licence conditions of the respective manufacturer are to be adhered to Boot loader licence expenses are paid by TQ Systems GmbH and are included in the price Licence expenses for the operating system and applications are not taken into consideration and must be separately calculated declared 1 2 Registered trademarks TQ Systems GmbH aims to adhere to the copyrights of all the graphics and texts used in all publications and strives to use original or license free graphics and texts Allthe brand names and trademarks mentioned in the publication including those protected by a third party unless specified otherwise in writing are subjected to the specifications of the current copyright laws and the proprietary
9. AG interface The power rail OVDD 1 8 V is used for the J TAG interface An external level conversion is necessary if applicable la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 17 3 2 6 Deep Sleep Deep Sleep is an especially efficient energy saving mode LPM 35 a variation of the LPM 20 with which parts of the Core Supply are switched off The transition into Deep Sleep isa complicated multistage process which is partly controlled by software and partly by a CPU internal State Machine which also has to be configured by software The supply PROG SFP is exclusively required to program the Security Fuses In case it is used a suitable switchable supply must be provided on the carrier board for this special use case 3 3 DDR3L SDRAM The maximum memory size is 2 Gbyte plus ECC 1 Gbyte is assembled by default plus ECC The LS102x CPU provides the following DDR features e DDR3Lmemory interface e Data bus width 32 36 Bit incl ECC LS1022 16Bit ECC There are the following options e 2x8Gbit 2 Gbyte ECC e 2x4Gbit 1 Gbyte ECC e 2 X2 Gbit 512 Mbyte ECC la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 18 3 4 On board flash The following flash expansion is possible NOR 1 QSPI Bis zu 256M Byte I 6x8mm TFBGA NOR 2 QSPI Bis zu 256M Byte I 6x8mm TFBGA eMMC Illustration 8 On board flash maximum expansion QSPI is used as an interfa
10. IO4 t GE TOME OTP SDA 39 40 GND OTF SCL A 42 IG CLEN GE TOME EVOO qr 44 M5 CLEI2 GE TOME DOR AST Control JA _RST_CTAL 45 46 GD Reset Ausgang RST OUT ar IA CLES SCFG_QUEI GNO A9 50 CLE10 SCFG_OUEI DDF Clock nach aube DOR CLE a 52 GND GNO aj 54 CLETI SCFG_QUE SYSCLE nach auben SYSCLE 85 56 CLkA2 SCFG_QUEI GMO Bi 58 GND SDHC SDHC DATA H2 59 60 E2 SOHC CMD SDHC_EXT SDHC SOHC DATE Hi 61 62 El SOHC_OATC SOHC EST SDHC SDHC DAT J2 63 64 F2 SOHC DAT SDHC_EXT SDHC SOHC DAT J 65 66 Fl SOHC DAT SOHC EXT GMO r 68 Gi SDHC_OAT SOHC_EXT USB DM 69 70 Of SOHC CLE SDHC_EXT USE DP Fi 72 GNO GNO USB D USB RE M1 75 76 USET RESREF USD DV P USB WENES GNO 73 BO M RQS DO ENT USE TH M 1 82 GND USD TK P 3 Ba IFC QSFI GMO 5 86 IFC QSFI IFC SPH IFC QSFI IFC SPN 9 30 GD IFC SPN OH oF IFC GSP IFC SPN 93 94 IFC GSP IFC SPH 95 96 IFC SP IFC SPN OF 38 IFC QSFI GNO 99 100 IFC QSFI IFC SPN 101 102 IFC QSFI IFC SPN 103 104 GD IFC SP PC 105 106 IFC GSFI IFC QSPI PC 107 108 IFC SP SYSCLEIODRCLE dis CLE_OE 109 110 IFC GSP I ATC Control Estern Control Extern m me IFC GSP OTP Spannung f r Pe YOO OTP 3 114 IFC GSPI GNO TiS 116 IFC GSP Temperatursensor wa ALERT u7 18 PO Temperatursensor va T CRIT 419 120 GMO
11. KS ctrcareceeconineeacenmmreecononnteeeeoonnnececeqcnneeeenqnnteesenonnreeseenqnnessononreesanenoreesoonontsesononniseseonnanseononnseenonmeeencenannensnnmnt 10 Table 4 Configuration of the DOOt SOUTCE an 11 Table 5 Further configuration pins with optional wiring aauanaaacaacnccoccnccnccn serre rrenen eee ren eee eee re nee NANA rere NGANAN NGANAN NENGNA NGENE 12 Table 6 PIU OPEN ODEON e 13 Table 7 Pinout appraisal connector AE 14 Table 8 Pinout appraisal connector SE 15 Table 9 Pinout appraisal connector STE 16 Table 10 PC bus addresses penisi 19 Table 11 SS 21 Table 12 Pin assignment CPU internal PN JUNnCtION nen aana aa anana Nana NARA NANANG NANG NANG ANANE NANG NENGNA NANA N ENE NENENG 22 Table 13 Nee E ele E 23 Table 14 Plug connectors on the TONI E mm 24 Table 15 Suitable carrier board mating plug Connectors c sssssesssssssssesssssssessssssssssessssessesssssssecsesessessessssessessssessssssassssaseessessseesseeses 24 Table 16 Villes 26 Table 17 NDO os aa aa NANA A AA AA NANA AA KA A NANA NA AD AA A AA A A ANAA AA NANA ANA AAN AA AAN ADINAGARA NA NANA GA AAN NAUN AA AA NA AA 26 Table 18 Climate and operational COnditiOT game 28 Table 19 Is ll 30 Table 20 Further applicable documents 0000aaa enen sen z n z n AA aaa a rent s tentene ente r r r n r r m r r n NA ANAA r n rent n tet ANANA NT NANA NAN NANA NANA NENG 31 ILLUSTRATION DIRECTORY Illustration 1 Block diagram SS 4 Illustration 2 Block di
12. RIOS 20 EC GAO Vi GPIO3_ 25 ECs vi GPIOS_ 249 ECs Wi GPIO3_30 EC vi GPIO3_ 31 ECs Ta GO 00 EC3 v GPIO4 01 ECs GAO D I GRIOs_o0 MDC MON D I Gjo 01 MOC d MI GAO Eid RATC ES ASLEEP OF EVTS E GE IO Wi Aa MI Gjo UART_EaT BASE GAO Ha GJOKA 09 GE t TOMIA J3 GPID4 10 GE 1 TOMIA d GPIO4 TI QEN TOMIA J5 GPIO4 Tz GE TOMIA H GPIO4 13 GE t TOMIA GAO KS CLE GE t TOMIA LA CLE 10 GE 1 TOMIA GIO la Page 15 la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 16 Table 9 Pinout appraisal connector X3 Bemerkung Signal Ball Pin Ball Signal Bemerkung GND C GND IFC_ A000 IFC_WEO_EB IFIC_4001 IFC_CLE IFC_ A002 IFC wu E IFC_ A003 GAO EC A004 IFC_CLEO GMO GAO IFC_ A005 IFC CLE1 IFC_ A006 GAO EC SDO IFC_MOOOR_CLE EC ADI GAO FC Ab FEMODOS GMO EC AV IFC_BCTL IFC_TE EC COP EC QE E IFC PU E GMO 3 2 9 JTAG interface The J TAG interface is routed to the connector From Wati T veer i MAESET 8 boani sources it ary PORESET B md PORESET_S Otur TASI 6 souco Ur ampa boundary ran CI Cl wo i E F Hiebctch And Cortes 10 p n header WWM Cortes Hm Z crear Mote I GN ere t on opteral hoari baten Check ath b party tui veriu d Thee Geach a nc ns p pencaqhon it SES teeing The path waah be Oe Gara RSO warang P soi BOLANG NAN qani the TRET pa E BAN murg zc baang peri TT der m DS Geen Choad Illustration 7 JT
13. TQMLS102xA UM 0002 26 05 2015 Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page TABLE OF CONTENTS 1 About this MAN E 1 1 1 Copyngnt and Nenes INS aira daa aaa aaa daa daa daja aa aaa ja AA aaa a Aa AA a AA aaa aaa aaa aaa aaa aaa aia 1 1 2 Registered Reie Cen ET te 1 1 3 DIOR 1 1 4 TRA e AAA A a NE a a 1 15 le E i Te a AN e YAA YE I EA AN 2 1 6 Symbols and typographic CONVENTIONS ENEE 2 1 7 Handling and SR 2 1 8 Kulisse EIAI 3 1 9 Further applicable documents presumed knowledge xa ac uccncencencencencencencencence nene nene ee err rere terren teren eee 3 2 Brief description auaan aaa ncenccncoen cen ccnce en eence nen eee eeneerereene ren eee teren ren NANG ANANE AANE NANG ANANE ren reeee tere re nte ren etee ner rte rene tren NANA NENENG AANE NENENG 4 2 1 Key ROOM Ee 5 2 2 PAN AA JE Te d E 5 ES Beeler e e ele ANNA NAN ANGGANA EEEE EAEE ENG A NA NG A Na a KN AN NAN AN 6 3 1 NI EEN AN NA TAN RETNA NE KEN NANA E NENEKA KAN KANAN NA RAN EN KANEA NGA KANA KANAN NAN AN ENE KAEN ANAN KANAAN TA A neh 6 S Li System architecture block diagram EEN 6 3 1 2 Ske 2008288 a8a AAN ANA ANANA ANANA ANAA nnn ener ee ee a ene ere 7 3 2 SEKR ee 7 3 2 1 OT Sco secu coannsnccennannuce venice uahicesuuuvutceaunidesusiucoauissiecssasetceinudece vuiceivvutc emule co mulccoaumuumtecabunaceoouamniecoaunnncennINeeINTIG 7 3 22 BOOt OPTIONS ssssssssessessessssessssessecsessssucsesossussussssessussusessussusassessucassessusausessusausassuss
14. agram TQMLSIO2XA nana nccccuccncenconeo en cence nen tentene ren eeere nen nenen a anana anana anana NARA AANE RANEH rere eee rere nene eee net nte eee netet eee ene 6 Illustration 3 TQMLS102xA Product d CT 7 Illustration 4 LS1021A CPU Block diagram csssssecssssssessssssssssessssessesssssssessesessessesassessusassessucsssassessssassessusassessucacsassussnsassessucansessusansassessnsassessseans 10 Illustration 5 IF Cie ace at rie CONG CO E 12 Illustration 6 Block diagram PBL cssessesssssssessssssssssesssssssessssessessessssessessssessucsesessucsusassessucassessusassessusausassessusassessucasassecansassessssassessusansessesansesaeaseass 12 Illustration 7 JTAG interface uu vuan cncencnnen zonen anaa anaa rete teen rete re ee re ner re nente rere nente nte NARA NANA NANA ANANA NANA ANAN NANA NANA NANA NANA NANA NENGENA NANANG 16 Illustration 8 On board flash MAXIMUM EXPANSION sasinan aga en rence nen recent ere rente ren ree cen ner rente ner S eter rere rere nenen re nente renie 18 Illustration 9 Connection of the eMMC at the SDHC INterface cssssssssssessssesssssssesssssssessesssssssessssessessesesscsesassessessssessssseesansessesaseessesssees 18 Illustration 10 HC bus COMPONENTS on the TQMLS102XA ENNEN 19 Illustration 11 RTC function DIOCK JA 20 Illustration 12 RTC function DIOCK 2 EE 20 Illustration 13 Wiring of temperature SEN SON aaa nc cuccucenccnco ren cen zonen ren ANANA ANANA NANA ete ner NANANG NANA NANA N ENE NANA NANA NAN
15. ce A suitable CPU derivative LS1020 LS1021 and LS1022 can be selected for each requirement DORIL SDRAM ECC Protection LULI Caches C 181 0 GHzN Mual Cortex A a 281 0 GHz N 517 kB Coheren H 32 kB VO LI Cache 12 kB Coherent 32 kB VD LI Cache L Cache Cache Coherent Interconnect CC 400 QUICC Engine HDLC TOM NOR Flash EEPROM Modulsteckverbinder 280 Pins Alle CPU Funktionalitaten verfugbar Illustration 1 Block diagram TQMLS102xA simplified The SERDES lines are multiplexed and can therefore not be used simultaneously Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 5 2 1 Key functions and characteristics The TQMLS102xA provides the following key functions and characteristics e Graphics e SD card interface e On Board flash NOR eMMC NAND e DDR3LSDRAM e USB 2 0 Hi Speed interface with PHY e USB 3 0 Hi Speed interface with PHY e Ethernet 10 100 1000 e CAN e SATA e PCle e PC 12S SPI UART e RTC optional e Software support possible for o Linux o VxWorks o QNX o PikeoS All essential CPU pins are routed to the connectors There are therefore no restrictions for customers using the TQMLS102xA with respect to an integrated customised design 2 2 Available versions The default versions offer the following basic features e CPUs LS1020 LS1021 LS1022 e DDR3 4L RAM 1 Gbyte ECC e QSPINORlash 512 Mbyte e EEPROM 64
16. ce NOR flashes are connected at QSPI_A QSPI_A chip select AO is used as a boot source The flashes support the 4 bit QSPI interface The following illustration shows how the eMMC is connected eMMe 4Bit Illustration 9 Connection of the eMMC at the SDHC interface The SDHC interface is connected with 8 bit to the eMMC and is also routed with 4 bit to the connector to connect an SD card eMMC and SD card cannot operate simultaneously eMMC memory Manufacturer Micron Series MTFC2GMDEA Size 2 4 8 16 or 32 Gbyte Functions ECC bad block management wear levelling Optionally the reset signal is connected to PORESET 3 5 Reset structure A LED indicates the RESET condition A suitable driver is provided The system RESET is routed to the connector via a buffer HRESET of the CPU is directly routed to the connector A 1 kO pull up to OVDD 1 8 V is required A 1 KQ pull up to OVDD is provided at RESET _REQ of the CPU la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 19 3 6 Housekeeping 3 6 1 Overview The following components are present on the TQMLS102xA e RTC optional e Temperature sensor local and remote in the CPU e EEPROM The components are connected via the I C_1 interface The following illustration shows the implementation Power Managemen controler Temp EEPROM Sensor PHC Illustration 10 1 C bus components on the TQMLS102xA RC 1
17. cel format for registered users Multiplexing Table 6 Pin multiplexing options E L E RE Tiin iii La Laj i Ca CAN e 7 LAN d p u D P Y a D LN Pa r Ca KE TARE 4 A e 4 HALI AD LANA d 4 A PN d USH DE Z 01 The respective povver rail of a certain block has to be taken into account Page 13 SAN ZI i u e Mil IN 14 i i Hi 4 CHO UU PHA LH PHE REWIECZJ 3b 101 TIRZ OI r FIMZ CHT rTM LHJ Liri ALI FIMI TTT _ ASA te NA FIM CH4 PIM Lish IMI FIMI FIM rime SI CHO la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 14 3 2 4 The following pinout is a preliminary appraisal Pinout connectors Table 7 Pinout appraisal connector X1 Bemerkung Signal Ball Fin Ball Signal Bemerkung WOCSY3 VC VC 2 sea VC 2 WOC3V3 DIE VC 2 WOC3V3 Fg YOC3Y3 VEAT 9 10 BODO OIvDD We i LYDD LO OUT 13 14 GMO LOO OUT tm 16 M lo Sol PCEXTIPC_BASE LYDD im P ICLEDA POESTIPO BASE GNO 1 20 ki SOHC CO EPCEXT PC_BASE Main Reset RESIN 2a 22 Lio SOHC WP PCEXT PC_BASE Reset Request RESET REG 23 24 pp IRS DO ENT HASET HRESET ae 26 L IRG4 DO ENT RATC_CLEOUT ar 28 GD ATO INT 20 30 K GPIO 14 GE TOME STBY 31 32 L3 GPIO4 15 GE TOME ATC Reset 33 34 M GPIO4 16 GE TOME DMIC EN 35 36 IM Gjo 17 DE TOME GNO ar 38 K4 GP
18. duct would render the guarantee invalid Proper ESD handling The electronic components of your TQ product are sensitive to electrostatic discharge ESD Always wear antistatic clothing use ESD safe tools packing materials etc and operate your TQ product in an ESD safe environment Especially when you switch modules on change jumper settings or connect other devices la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 3 1 8 Naming of signals A hash mark at the end of the signal name indicates a low active signal Example RESET If a signal can switch between two functions and if this is noted in the name of the signal the low active function is marked with a hash mark and shown at the end Example C DH If a signal has multiple functions the individual functions are separated by slashes when they are important for the wiring The identification of the individual functions follows the above conventions Example WE2 OE 1 9 Further applicable documents presumed knowledge e Specifications and manual of the used modules These documents describe the service functionality and special characteristics of the used module incl BIOS e Specifications of the used components The manufacturer s specifications of the used components for example CompactFlash cards are to be taken note of They contain if applicable additional information that must be taken note of for safe and reliab
19. ed Table 14 Plug connectors on the TQMLS102xA Manufacturer Part number Remark 0 8 mm pitch TE connectivity 120 pin 5177985 5 Plating Gold 0 2 um 40 C to 125 C 0 8 mm pitch TE connectivity 40 pin 5177985 1 Plating Gold 0 2 um 40 C to 125 C The TQMLS102xA is held in the plug connectors with a considerable retention force To avoid damaging the plug connectors of the TQMLS102xA as well as the carrier board plug connectors while removing the TQMLS102xA the use of an extraction tool is strongly recommended See section 4 7 for further information The following table shows some suitable mating plug connectors for the carrier board Table 15 Suitable carrier board mating plug connectors Manufacturer Part number Stack height X 40 pin 5177986 1 120 pin 5177986 5 40 pin 1 5177986 1 120 pin 1 5177986 5 7mm TE connectivity TE connectivity TE connectivity 120 pin 2 5177986 5 40 pin 3 5177986 1 TE connectivity 120 pin 3 5177986 5 4 2 TQMLS102xA image Illustration 14 TQMLS102xA la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 25 4 3 Adaptation to the environment The overall dimensions length x width of the TQMLS102xA are 55 x 44 mm The maximum height of the TQMLS102xA above the carrier board is approximately 8 5 mm 4 4 Protection against external effects As an embedded module the TQMLS102xA is not protected against dust external impact
20. en wakes the CPU Since the RTC is optionally the CLKOUT signal is routed to the connector and is not used on the TQMLS102xA A simple implementation of the RTC function block is shown in the following block diagram Modutstocie Vertinder sy STANCIRY i IV TANDHAN vi A A LA gt bai 4 Le INT cotional CLAOUT Illustration 11 RTC function block 1 When the RTC is supplied with the standby voltage it can be configured or read by the CPU via RC during runtime In standby mode all further operations can be initiated using the low active interrupt which is available at the connector The logic to wake the TQMLS102xA must therefore be provided externally An alternative with independent RTC wakeup function is described in the following block diagram Modubitech Vern des INT iplional CLADUT Illustration 12 RTC function block 2 The RTC interrupt can be used to wake the TQMLS102xA from standby The PMC reacts to the RTC interrupt and starts the Power Sequencing The current consumption is approximately 0 8 uA in addition to power mode VLLS1 The uController is specified with a maximum of 5 5 uA at 85 C in power mode VLLSI IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 21 3 6 3 Temperature supervision The NXP SA56004X is used The parameters are Local and remote temperature sensor Accuracy 1 C remote 2 C local 11 bit resolution 0
21. inued Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page il Safety requirements and Protective FEQuIAtIONS cscssessecsscsecsecsessessesssssssssssssessessssssecseesscssesssesseseessessessessessessecseesestesceaseaseeeses 27 ENI ee 27 SC nn 27 Operational Safety and Personal security sessessssssssessesscssssesssssssssssssssssssssssssssssssscsscsscsecssssssaseassasssssssssseseesesuesscscsessesseaseneeneess 28 Climatic and operation al conditionS nuku aaa cen ccccucenccnconen ren cenee aa ANANA ANANA NANA ANANG NANG ANANG ANANA AANE AANE nete ete nee rete nene rene netet eee 28 Reliability and service lifC c sssssssssssssssssssesssssssesssssssessesssssssessesessessssossucsssossassussssossusassassucassassossueaseassusassassusasassassueassassusaseassasassasestasees 28 Environment PrOteCtiONn c sssssssssssssssesssssssesssssssecssssssessessssessessssessessssossssesossessesassessussssessussssassessueassessucausessusassassesseassesssassessesansesaesasees 28 ROH EEE 28 WEEE aaa aaa aaa NANA AAN NGANAN NA A GA ANNA GA AAN NA ANARA NA ARA AA NA SANAN NAN SANAN NAN AAN aaa aaa a Na aana aana anaa 26 Hie hy 26 SI 28 EINEN 29 e OOA AA NAGA ANA Tab ASA ANAA AA NAGA dd 29 ol 30 Acronyms and ell Lg Le 30 FETE CIC EE 31 IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page iii TABLE DIRECTORY Table 1 NS 2 Table 2 Functional Giterences OF th LS102x family CPUS nim 8 Table 3 E IO function bIOC
22. is supplied via voltage block D1VDD D1VDD is supplied with 3 3 V therefore the I C bus subscribers also have to be supplied with 3 3 V The addresses of the respective PC bus subscribers are configurable using address pins or already hardwired by the manufacturer The following addresses are used Table 10 I2C bus addresses Function block Device Address Remark 1010 000b EEPROM M24C64 Ha Oe EO E1 E2 connected to GND SA56004EDP 118 Address is defined by order code Kinetis uController freely programmable la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group See Page 20 3 6 2 RTC An RTC is optionally available The NXP PCF850637TP is used as an RTC It has the following characteristics e Real Time clock calendar 1 8 V 5 5 V power supply HC interface up to 400 kHz Current consumption max 50 A in operation lt 0 6 LA in standby Programmable register offset to increase precision The follovving functions of the RTC are available e RTC function block INT at the connector The RTC on the TQMLS102xA is a separate function block It can be configured using the CPU 12C The interrupt signal is routed to the connector so every reaction wakeup sequence must be carried out external e RTC function with power management uController The RTC is also an independent function block It can be configured during runtime using the CPU In Standby mode the RTC can wake the PMC with a wakeup event which th
23. kbit All versions of the TQMLS102xA are fully pin compatible and therefore interchangeable The functionality of the different TQMLS102xA is mainly determined by the features provided by the respective CPU IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 6 3 ELECTRONICS SPECIFICATION The information in this User s Manual is only valid in connection with the boot loader adapted for the TQMLS102xA which is preinstalled on every TQMLS102xA see also section 6 and the BSP provided by TQ Systems GmbH 3d System overview Lil System architecture block diagram Illustration 2 Block diagram TQMLS102xA la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group S L System components e CPU LS1020A LS1021A LS1022A e DDR3LSDRAM e On board flash NOR and eMMC e Powersupply e Voltage supervision e Power management or Housekeeping Microcontroller PMC e RIC e Temperature sensor e EEPROM All CPU pins with useful functionality are routed to the connectors 3 2 CPU LS102xA 3 2 1 CPU versions The following CPUs from the LS102x family are used for the TQMLS102xA e LS1020A e LS1021A e LS1022A LS1920 Family i All feature Dual Cortex A7 Cores ann Networking industrial Entry Consumer Printing amp Industrial Up to Aen e Upto IGH e Up to BOOM ZIW Typ e 22W Typ LOW Typ Adds LCDC Adds CAN ECC and Trust on Soard bor x Software 4 a mp Klappt Illu
24. laws of the present registered proprietor without any limitation One should conclude that brand and trademarks are rightly protected by of a third party 1 3 Disclaimer TQ Systems GmbH does not guarantee that the information in this Preliminary User s Manual is up to date correct complete or of good quality Nor does TQ Systems GmbH assume guarantee for further usage of the information Liability claims against TQ Systems GmbH referring to material or non material related damages caused due to usage or non usage of the information given in the Preliminary User s Manual or due to usage of erroneous or incomplete information are exempted as long as there is no proven intentional or negligent fault of TQ Systems GmbH TQ Systems GmbH explicitly reserves the rights to change or add to the contents of this Preliminary User s Manual or parts of it without special notification 1 4 Imprint TQ Systems GmbH Gut Delling M hlstra e 2 D 82229 Seefeld Tel 49 0 8153 9308 0 Fax 49 0 8153 9308 134 Email info tgq group com Web http www tq group com la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 2 1 5 Tips on safety Improper or incorrect handling of the product can substantially reduce its life span 1 6 Symbols and typographic conventions Table 1 Terms and Conventions Meaning This symbol represents the handling of electrostatic sensitive modules and or components These compone
25. le operation These documents are stored at TQ Systems GmbH e Chip errata It is the user s responsibility to make sure all errata published by the manufacturer of each component are taken note of The manufacturer s advice should be followed e Software behaviour No warranty can be given nor responsibility taken for any unexpected software behaviour due to deficient components e General expertise Expertise in electrical engineering computer engineering is required for the installation and the use of the device The following documents are required to fully comprehend the following contents e Circuit diagram MBLS102xA e Documentation of boot loader U Boot http www denx de wiki U Boot Documentation e Documentation of PTXdist http www ptxdist de la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 4 2 BRIEF DESCRIPTION This Preliminary User s Manual describes the TQMLS102xA and refers to some software settings A certain derivative of the TQMLS102xA does not necessarily provide all features described in this User s Manual This Preliminary User s Manual does also not replace the Freescale Reference Manuals of the CPU The TQMLS102xA is a universal Minimodule based on the Freescale ARM CPU Dual Cortex A7 with QorlQ technology Layerscape The Cortex A7 cores of this CPU are clocked with up to 1 GHz The TQMLS102xA extends the TQC product range and offers an outstanding computing performan
26. nts are often damaged destroyed by the transmission of a voltage higher than about 50 V A human body usually only experiences electrostatic discharges above approximately 3 000 V This symbol indicates the possible use of voltages higher than 24 V Please note the relevant statutory regulations in this regard Non compliance with these regulations can lead to serious damage to your health and also cause damage destruction of the component This symbol indicates a possible source of danger Acting against the procedure described can lead to possible damage to your health and or cause damage destruction of the material used This symbol represents important details or aspects for working with TQ products A font with fixed width is used to denote commands contents file names or menu items 1 7 Handling and ESD tips General handling of your TQ products The TQ product may only be used and serviced by certified personnel who have taken note of the information the safety regulations in this document and all related rules and regulations A general rule is do not touch the TQ product during operation This is especially important when switching on changing jumper settings or connecting other devices without ensuring beforehand that the power supply of the system has been switched off Violation of this guideline may result in damage destruction of the TQMLS102xA and be dangerous to your health Improper handling of your TQ pro
27. nual TQMLS102xA UM 0002 2015 TQ Group Page 10 Table 3 LS102x function blocks WE LPUART UART NG Dooa 7 KANANE TAN DECH SPDIF SD Jespre BCEE a TRUST EVENTS RTC In this User s Manual the TQMLS102xA Is referred to since it offers the greatest expansion stage System Control System Interfaces E Core Complex 1 Basic Peripherals and Interconnect Accelerators and Memory Control P Networking Elements Illustration 4 LS1021A CPU Block diagram IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 11 3 2 2 Boot options The LS102x provides the following boot options e Parallel NOR flash e NAND flash e QSPI e SD MMC eSDHC The SDHC interface is part of the pin multiplexing and routed to the connectors The boot options Parallel NOR NAND and QSPI are connected via the configurable IFC interface The serial NOR flash on the TQMLS102xA is connected via QSPI see 3 4 The whole IFC interface is routed to a connector to use the CPU to its full extent The IFC interface also offers the option to run a parallel bus NOR NAND GPCM GASIC The multiplexing is configured to boot the TQMLS102xA from the On Board SPI flash Table 4 Configuration of the boot source Signal Parallel NOR 8 bit Parallel NOR 16 bit QSPI SDHC Fran Ga ron sr Li Fam ams XK Fran cfg ews hh Fran efg rows hh FCE mmm nh la Preliminary User s Manual TQMLS102xA UM 0002 2
28. o voltage dips and short interruptions on the DC input power supply 1 The test level and test criteria are taken from the generic standards the EN 61000 6 1 generic standard immunity for standard residential commercial and light industrial environments and the EN 61000 6 2 generic standard for industrial environments 2 The test criteria are not fixed here yet because there are still no generic standards or product standards on which to base this standard When required the test criteria have to be defined with the customer The following measures are recommended e Robust ground planes adequate ground planes on the printed circuit board e A sufficient number of blocking capacitors in all supply voltages e Fast or permanent clocked lines eg clock should be kept short avoid interference of other signals by distance and or shielding besides take note of not only the frequency but also the signal rise times e Filtering of all signals which can be connected externally also slow signals and DC can radiate RF indirectly Because the TQMLS102xA is used on an application specific carrier board EMC or ESD tests only make sense for the whole device 72 ESD In order to avoid interspersion on the signal path from the input to the protection circuit in the system the protection against electrostatic discharge should be arranged directly at the inputs of a system As these measures always have to be implemented on the carrier boa
29. on with respect to the European Waste Directory as at 1 12 01 source of information BGBI 2001 3379 This information is to be seen as notes Tests or certifications were not carried out in this respect la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 30 8 APPENDIX 8 1 Acronyms and definitions The follovving acronyms and abbreviations are used in this document Table 19 Acronyms Acronym Meaning Advanced RISC Machine Advanced Technology Attachment Basic Input Output System Board Support Package DN German industry standard Deutsche Industrienorm POO IngressProtection DO NOR NO DAN Random AccessMemory O Universal Asynchronous Receiver Transmitter WEEE Waste Electrical and Electronic Equipment IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 31 8 2 References Table 20 Further applicable documents Hey Date Company No Name QorlQ LS1021A Family Communications Processor Product Brief LS1021APB 9 10 2014 Freescale QorlQ LS1021A Fact Sheet LS1021AFS 2 4 2015 Freescale 3 Thermal Solutions AN4871 2 7 2014 Freescale TQ Systems GmbH puhta SC ree SE ae Technology in Quality
30. ote temperature measurement a 2 2 nF capacitor is recommended between D tand D noise suppression The CPU internal PN junction for temperature measurement is connected here Table 12 Pin assignment CPU internal PN junction maen beet LE Iel Je TDIGATHODE beet e jop h IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 23 3 6 4 EEPROM An EEPROM with 64 kBit is assembled on the TQMLS102xA The ST M24C64 series is used e 64kKbit e HRC interface 100 kHz 400 kHz 1 MHz e 1 8V 5 5V e 40 C 85 C The EEPROM is supplied with 3 3 V According to the I C bus addresses see section 3 6 1 E0 E1 E2 are connected to GND 3 7 Power supply 3 7 Power estimation The single values are estimated and assume an average load Table 13 Power estimation Component Power consumption 3 8 External interfaces 3 8 1 SERDES All three SERDES interfaces require 100 nF AC coupled capacitors The coupling capacitors are not assembled on the TQMLS102xA to enable the usage of the interface for other purposes 3 8 2 USB3 0 According to the specification the AC transmit lines are AC coupled Recommendation 100 nF Permitted 75 nF 200 nF la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 24 4 MECHANICS 4 1 Connectors The TQMLS102xA is connected to the carrier board with 280 pins on three connectors The following table shows details of the plug connector us
31. rd no special preventive measures were planned on the TQMLS102xA Following measures are recommended for a carrier board e Generally applicable Shielding of the inputs shielding connected well to ground housing on both ends e Supply voltages Protection by suppressor diode s e Slow signal lines RC filtering Zener diode s e Fast signal lines Integrated protective devices e g Suppressor diode arrays IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 28 7 3 Operational safety and personal security Due to the occurring voltages lt 5 V DC tests with respect to the operational and personal safety haven t been carried out 7 4 Climatic and operational conditions The possible temperature range strongly depends on the installation situation heat dissipation by heat conduction and convection hence no fixed value can be given for the whole assembly In general a reliable operation is given when following conditions are met Table 18 Climate and operational conditions Parameter Remark Permitted Environment temperature 40 85 C Se l Permitted storage temperature 40 100 C a Relative humidity operating storage 10 90 Not condensing Detailed information concerning the thermal characteristics of the CPU is to be taken from Freescale s Product Brief and Fact Sheet 1 and 2 75 Reliability and service life No detailed MTBF calculation has been done for the
32. ring its whole life cycle should be taken into consideration The guideline appropriate for the product embedded PC is applied la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 29 T 1 Battery No batteries are used on the TQMLS102xA 7 8 Other entries By environmentally friendly processes production equipment and products we contribute to the protection of our environment The energy consumption of this subassembly is minimised by suitable measures Printed PC boards are delivered in reusable packaging Modules and devices are delivered in an outer packaging of paper cardboard or other recyclable material Due to the fact that at the moment there is still no technical equivalent alternative for printed circuit boards with bromine containing flame protection FR4 material such printed circuit boards are still used No use of PCB containing capacitors and transformers polychlorinated biphenyls These points are an essential part of the following laws e Thelaw to encourage the circular flow economy and assurance of the environmentally acceptable removal of waste as at 27 9 94 source of information BGBI 1994 2705 e Regulation with respect to the utilization and proof of removal as at 1 9 96 source of information BGBI 1996 1382 1997 2860 e Regulation with respect to the avoidance and utilization of packaging waste as at 21 8 98 source of information BGBI 1998 2379 e Regulati
33. stration 3 TOMLSI02KA product family Page 7 la Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 8 In the following tables more details of the different features is shown Table 2 Functional differences of the LS102x family CPUs LS1021A LS1020A L DDR3L ves ves ves MEO 1 Pe oora Yes Yes DDR 8 bit YES E B i ent yea ves ves SE Juves Eec pyes oo e JU ves ves Don ves Controller Lon 2 cem Ethernet n MIb S sja S 5D PHY USB 3 0 Yes USB 3 0 PHY USB 2 0 Yes NoPHY USB 2 0 Yes Cewe iusan ves ves ves LPUART2 K za Loge ve LPUART3 Power LPUARTA ves_ Yes Yes UART LPUARTS PS S Sis es LPUART6 i SE ee Tua NEH Yes Y smie ua si 2wire uara Yes ves Yes UARTA k mz IO Preliminary User s Manual TQMLS102xA UM 0002 2015 TQ Group Page 9 Table 2 Functional differences of the LS102x family CPUs continued Flex Timer 3 Channelfo 1 Yes Yes i ves _ channel 1 Yes Channelfo i yes Yes ves san JL Yes Yes i Yes sa Yes Yes ve SA3 Yes Ye Yes saa Yes Yes i ves a ZE output BRGO 14 Yes Yes i No Input CLK 9 12 Yes TDMA TDMB deel dee TDMJHDLC The LS1022A CPU contains some function blocks like both other CPUs but a lower number of the corresponding blocks see following table la Preliminary User s Ma
34. ueassessucansassusausassussueassessusansassusassassessusassessucansassesansassessnees 11 3 2 3 Multipleking sescsssssessessesessessssessesssssssussesossussussssessusausessussusassusaueansessucassossusausossussueassessucansassusausassussseassessusassassusansassessusassessucansassueansassesanees 13 3 2 4 Pinout CON NG CO CN 14 3 2 5 dil 16 3 2 6 Deep Sleep EN 17 33 DORE DRA M E E E ee 17 3 4 1 SENU E r E O E T AE E O N N E NAN 18 3 5 SST 18 3 6 RUSI EEEE 19 3 6 1 ONAE en rr 19 3 6 2 Ne E 20 3 0 3 Ululsf cflCE eil 21 3 6 4 KERR ON na e 23 3 1 POWED SUPDLY anaa aaa aana aaa a anana aaa nana aa anana aa anana aa anana a NA Anaa ANARA ANNA ANAN NAHAN NANA ANANA NANA NANA NAN NANA NANA NANANG 23 3 1 1 Power estimation E 23 3 8 External IN LEA EEEE NANA nera 23 3 8 1 DE KAGAN LAA KAN re 23 3 6 2 EE 23 4 D ET Te 24 4 1 OA eee AN EA ANANE ANAN ANANE GAN ANAN AN AN ANAN AGA EA EA EA EA EA ENENGENA EA EA E NA A Na 24 4 2 TOME OZA M E 24 4 3 Adaptation to the environment E 25 4 4 EEGENEN 25 4 5 Thermal FIVE AC SITS N pam 25 4 6 Structural CUI IGS EC 25 4 7 PMI FT AI NG NANG ANAN NA AANE AANE AANE NANG NANGEN NENENG NAN E NAN ANANE ENENG NAN 25 S Technical data DA 26 5 1 Vibration load 0ssseseseseree8e20 0849 0989058 n e ena na ena AAN NNAN AN NNANAN ONANG GAGANA ANANA ANANA ONANG ONANG ANANE ANANA ONANG ONANG ANANA NNANANONANAN ONANG ETANG ANANE NNANENN NATE 26 5 2 SNOCK LOA EN 26 6 STOLA a Es AEE 26 IO TABLE OF CONTENTS cont

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