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42 service manual.p65

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1. 6 a a aratate eelte te aia jajaja lt lt lt lt lt lt lt lt lt lt jac jac Jac 02 JO jac ac Jac Jac Jac Ja J ax lac jac ac jac 107 02 lac jac ac Jac jac Jac JO Jac ax ac ac Jor Jac aa 8 R R 8 B G 8G 1 2 6 8 DV33 267 DV25 DVi2 26 Dv12 1 2 3 4 6 7 8 GND gt 1 4 8 ORESET REQUEST 1 READY OSDAO 25080 OSCLO b OPWMO gt ew 6 OXTALI p OXTALO 6 gt gt EXo0 GLOBAL SIGNAL z TS1DATA 0 7 TS1DATA 0 7 4 TS1SYNC TS1VALID 4 TSTERROR TS1CLK TS INPUT z 7 RDQ O 31 7 RDQS 0 3 7 RDQM 0 3 7 131 7 RBA 0 1 7 RCLKO 7 RCLKO RERO 7 5 RRAS 7 RRAS RCASH 7 RCAS 7 RWE RCKE RCLK1 7 RCLK1 RCLK1 7 RCLK1 RVREF 6 RVREF DDR MEMORY af POCEO POOEOR POWER POWER 22 0 22
2. R0603 SM OXTALI OXTALO vec 0 1uF R0603 SMD 5 NS 27MHz C0603 SMD NC GND lt C23 TP7 AV33 AV33 1 2 5 CAPVPLL CAPVGND APLLCAP1 APLLCAPO C22 TP SMD D1 0 NS 20pF NS 20pF 1 2 5 8 DV33 AV33 5600pF C24 C25 R40 R41 C0603 SMD C0603 SMD 25 AV33 mE C0603 SMD 1500pF 1500pF NS 50 NS 50 2 5 7 DV25 DV12 C0603 SMD C0603 SMD R0603 SMD R0603 SMD 2 5 DV12 CAPVGND GND ATP1 ATP2 TUER UNES due SDAO 5 OSDAO lt 3 5 OSCLO DV33 OSDA MST cue EA GLOBAL SIGNAL R0603 SMD 0 1uF i i TRESTATE C0603 SMD C0603 SMD C0603 SMD n ve OXTALI 0 FS CB54 VCXO FR270003 R0603 SMD 5 FS gt 10 10 4 TuF 0 1uF 0 1uF 4 TuF 0 1uF 0 1uF 4 7uF 0 1uF 0 1uF 0 1uF 0 1uF OSC 6P SMD 7X5 lt y BYDDKP C0805 SMD C0603 SMD C0603 SMD C 603 SMD CO603 SMD C0603 SMD C 603 SMD CO603 SMD 0603 8 C 603 SMD C0603 SMD 5 10 2 5 LEFT SIDE RIGHT SIDE m TOP SIDE i 2 5 2 5 AVDDRKP DV25 2 5 AVDD DMPLLO AVDD DMP 2 5 AVDD DMPLL1 AVDD VPLL 25 AVDD VPLL 1 AVDD_APLL1 C101 C138 C140 CB57 C183 C184 C185 C186 C104 C179 Q 4222 AVDD 10 10 4 TuF 0 1uF 4 7uF 0 1uF 0 1uF 0 1uF 0 1uF 0 tuF 0 1uF TOUT CAPVPLL C0805 SMD
3. 2 ms 2 INGE AGE 2 HDCP Decryption Engine and Mask nnne rsen nnns 3 M MT 3 Panel Interface Logic and Configuration 3 beer a 4 Absolute Maximum 4 Normal Operating 4 _ eee ae 5 _ _ _____________________ 6 Timing MR RT TE E 8 PERMET 8 eo IAE 8 PTO m TUE 11 adn 11 RETE 11 ce 8 12 Power Management 12 Diferential Signal Data PINS 12 ROS 12 Power ond Ground NS Tm 13 Fee ele MTOM ONY E EET 14 ges Od Deter FUNGCUOM MR 14 NN T m TU 14
4. CN808 629 60 CN809 171825 2 PSU operation method S W Auto Automatic On Off QE without Vsc B D Normal On Off with Vsc B D E 2 CNO3 E Live From inlet Live m Neutral gt gt Neutral Before connecting with S W After connecting with S W Adjustment detail Product Specification of Power Supply Unit 9 Adjustment detail 10987654321 CN808 D gi 11 805 CN806 CN807 2 8 4321 87654321 4 2 7 Vs Vs Voltage Variabe Resistor Turn right increase Voltage CN804 Turn left decrease Voltage 1 2 3 NS Selection S W Va Voltage Variabe Resist Va Voltage Variabe Resistor CN803 24V 30V IO Turn right increase Voltage 1 Turn left decrease Voltage 3 5 7 8 9 is You can select output Audio Voltage 24V or 30V CN809
5. 1 Selection S W CN802 Normal Auto Mode1 Mode2 3 4 PSU driving method S W Auto Mode2 Driving without CN801 interface B D Normal Mode1 Driving with interface B D Connect with Noisefilter Cable Connect with S W Cable Connect with S W Cable CNO2 CNO3 Live Live 0 Ou Neutral Neutral 01 The color of is red The color of CNO2 are natural Product Specification of PDP Module 9 LABEL LABEL Sticking Position Coner Plate ae lt PAN carved LLLI ABA LL Identification Label LABEL 7 0 MODEL PDP42V60000 403K242V600017 D LS In Korea 4 Model Name 2 Bar Code Code 128 Contains the manufacture No 3 Manufacture No trade name of LG Electronics amp Manufactured date Year amp Month 6 Manufactured place Trouble Shooting Manual of PDP Module Introduction Precautions Basic Trouble shooting 21 Introduction COMPOSITION BOARDS 42 V6 MODEL WEE utu WA PSU Y DRI VE TOP Z SUS B D Y SUS B D Y DRI VE BOTTOM X RIGHT
6. R130 TV R90 18 CVBSO 22 R132 TV GND 0 FB2 0 9 R135 AV1 IN _ R8Q 18 CVBS1 22 R138 1 GND FB1 0 0 R105 M R140 AV2 IN CVBS2 18 22 R142 AV2 GND FB8 0 0 S SIF1 OUT R146 C80 15pF NC V AF1 OUT R149 C84 15pF C59 330pF C65 330pF C71 330pF Close to 8205 C57 0 47nF C60 CVBSO 47nF C63 CVBS1 47nF C67 CVBS1 47nF C69 CVBS2 47nF 72 CVBS2 47nF CE43 47uF 16v N C78 1 4 C81 15pF NC V C82 47nF NC CE44 4TuF 16v C85 52 15 128 55 100 47nF C58 47nF R133 C61 CB 100 1 R137 C66 CR CR 100 47nF CR 100 47nF R108 R143 673 lt 47 SY sy 3 47nF R114 R149 SC 4TnF C79 SC GND1 50 47nF 0 Close to 8205 FB BEAD SMD 0603 RED_GND FB BEAD SMD 0603 GRN_GND FB BEAD SMD 0603 BLU_GND Close VGA input interface Close to MT8205 Title Size Doc Number Rev AUDIO VIDEO IN CIRCUIT V1 2 Date Wednesday October 12 2005 Sheet 8 of 15 vijo 25 VI 0 23 DVIDE Ee T P8 DVI I DIP DIODE SMD DVIHSYNC 1N4148 SMD D22 DVIVSYNC DVIPWR DVIPWR DVIPWR DVIPWR DVIPWR DVIPWR DVIPWR DVIVSYNC 8205UP1 2 gt DATA2 018 0604 0604 DATA2 DVI PLUGPWR 1N4148 SMD DVISCL DVISDA DVISDA 461
7. RR m 14 e 48 14 TFT Panel Data Mapping 16 OVS AAS HH 22 E E EE 23 RET 23 Sil 169 Implementado css ccs nosis Ra UU 24 HDCP DDG 40 nennt tenente te tete teet te tete 24 Video Requirement for C 25 25 Using Sil 169 in Sil 28 EXT IIR 29 gt 30 Receiver DDC Bus Levak snp __ 30 Voltage Ripple Regulation 31 PS COMMING snc 32 ON asters asics 32 gt 33 Considera 33 PCB 33 Determining Heat Dissipation Requirements 33 Implementation Guidelines for Thermal Land 34 Board Mounting 36 vic gel MB olo MENT 37 PNE
8. aa a 558 aaa lt gt gt gt gt x gt gt gt gt lt lt lt lt lt lt lt lt lt lt jojo a a jaja jo jojo jaja ja jojo jojo a jojo jojo jo 222222222 13 Sg SSSSosseeopmSSS 9000 SF z222122x225905222122x2595 GASHSELSHE 85885822 25 20222222222222044564 4 42 8888888888 DV33 0000000090 5 9 X20 sees EERE EER OLEE EEE EE Eso 652 9 lt 4 5 lt OOD 5 25252 44444 gt zz 856000009884 555 gt G aaaaaaaaaaaaaaao ooo00000000 zi GG 5 Y OO r rr rrtr 26 0 pa 5 55 POWER 27 _____ IOVDD POWE POCEO B28 1 IOVDD POCEO POOEOR 26 ____ ____ IOVDD POOEO IOVDD POCE1 27 IOVDD POOE1 28 x VCXOO IOVDD POCE2 i IOVDD D26 ODR TP SMD D1 0 IOVDD 227 IOVDD PARE 228 IOVDD PACE EZS gt IOVDD PACLE 26 IOVDD PAALE E2 x IOVDD
9. 1 24V 30V 4 3 S9V 171825 4 KST2222A C518 C519 104 104 5VCTRL gt CN809 1 2 lt 9 5 1 171825 2 171825 9 CON GP390 04P TS 390 10 5 1 1123723 8 171825 8 0 171825 2 USP490M 42LP MT8205E PBGA388 LCDTV BOARD 4 LAYERS 1 INDEX ux 2 LDO down Reset circuit 3 8205 88 NN ig 4 MT8205 ANALOG DECOUPLING d CN 5 DDR MEMORY amp FLASH um Eun 107 6 VGA IN amp PC AUDIO IN pun 1 7 VIDEO IN amp TUNER IO _ 8 AUDIO VIDEO IN CIRCUIT 9 DVI INPUT 10 LVDS CRT TTL OUT 11 BACK LIGHT KEYPAD 12 WM8776 amp A V BYPASS 13 ATSC INTERFACE 14 PDP INTERFACE oe NVERTER E 220uF 16v C220UF 16V D6H11 5VSB __ g3 ADD BY MTK PWR GND 5 2 8x1 W HOUSING DIP8 W H P2 54 HOLE GND 5VSB 5VSB 5 Q SYSTEM EEPROM 8205UP3 1 HIGH POWER OFF 8112 82050 3 1 LOW POWER ON R4 R 10K R0603 SMD DVD1 8205UP3 1 Add by SOT23 SMD 4 7 2N3904 EEPROM 24C16 SOP8 SMD 5x1 W HOUSING 5 2 0 4 1 W HOUSING DIP4 W H P2 0 N 12V For Tuner L44 L50 TUNER 12V FB FB FB CES BEAD SMD 0805 BEAD SMD 120 BEAD SMD 1206 220uF 16v C220UF16V D6H11 ATUF 16v CB2 0 1uF M T AUIO IN OUT GND ANALOG INPU
10. nee e a D sourev 1 T MM AW ark E XR 2 9 3 E car cua 2 1 2N3904 x D D 2 DC GNDS GND V AGND v AGND MUTEB ROUT E7 Dai am 5 2 9 9 2 Y 2 3904 2 2 5 9 1960 Q2 21995 L aw 1 8 3 8 3 3 mes 871 xen 27 5 7 4 4 4 i 4 D 6 5 6 5 6 5 6 5 09 GND V GNDS ub AGND a omy 02 GRO GRO GRO RO AUDIO GROUND VIDEO GROUND E INA148 sep C 22 o www OUT 12 Keun 18 OUT 07 Tu vcc GNDS GNDS 1015 ___ TUS R27 AGND Tide Size Number Revision D Date 21 2005 Sheet of File TVCD TV DidBrawn 1 2 B 4 5 6 T 8 MT5351RA V2 MT5111 MT5351 REFERENCE DESIGN 4 LAYERS pe F16V D6H1 INITIAL VERSION E 2005 06 15 4 5V Q 12V roweroreor g 8 1 W HOUSING 220uF 16v 2 5 6 8 DV33 pi tE 1 4 5 8 ORESET POWER INPUT FROM MAIN BOARD GLOBAL SIGNAL INDEX AND INTERFACE NS NON STUFF POWER RU usur AUD CTRL 5 ASPDIF
11. 28 gt IOVDD IOVDD ELREQ 25 IOVDD 26 gt IOVDD ECNTLO EZL IOVDD ECNTL1 28 IOVDD EDATAO 825 IOVDD EDATA1 G26 IOVDD EDATA2 27 gt ERAS 828 25 OSDAO EDATA4 OSCLO EDATAS 26 lt ospat EDATAG 27 gt lt 2 oscit 28 gt ELPS 428 R0603 SMD UOTX ELINKON 28 gt ___ 0 __________ 22 UORX Pipes U1TX ORESET 427 ORESET 128 OIRI 5 U1RX OIRI U2IX GBT 25 lt IR PRK Oo TP SMD Di O CE22 U2CTS K26 SNA TUF 16v U2CTS 51 C10UF16V D5H11 TUNER SW UoRTS icso 27 28 x H3 AO1SDATA3 IDAO 025 lt 2 AO1SDATA2 IDA1 026 gt IINTRQ 22 Soe 54 AO1SDATAO IDMACKst 28 AO1LRCK AO1LRCK 25 gt AO1BCK H AO1BCK IDIOR 26 lt AO1MCLK AO1MCLK M27 gt AO2SDATAO IDMARQ 28 gt lt 2 AO2LRCK 10015 25 gt AO2BCK 1 N26 gt x K4 AO2MCLK 10014 N27x ASPDIF AUDODTRE ASPDIF N28 gt 5 2 10013 25 VOBO 1002 E26 soa 2 10012 gt VOB1 o vor 1 IDD3 28 voB2 10011 H28 IDD4 127 lt M2 IDD10 126 voss 1005 125 VOB6 Soo
12. BEAD SMD 0805 14 14 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD 1 25 x 1 100 100 2 5V POWER SUPPLY 2V5 FOR MT5351 AND DDR CB146 47 0uF 16v NC 0 1uF NC C220UF16V D6H1 C0603 SMD 5V_TUNER FB BEAD SMD 1206 NG CE31 CB147 70uF 16v NC 0 1uF NC C220UF16V D6H1 CO0603 SMD MP2105 R112 21 CB151 10uF C0805 SMD 499 R0603 SMD CB150 10uF C0805 SMD R113 249k R0603 SMD Compatible With 06 DV33 U7 6 a 15 15 lt R13 2 117 100 SOT223 SMD lt R0603 SMD 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD R14 0 R0603 SMD FB BEAD SMD 0805 CE16 CB16 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD 1 25 x 1 0 100 1 25V POWER SUPPLY 1V2 FOR MT5351 1 12V 1 6 5 DV33 1 5 6 8 DV33 5 TUNER DV33 DM 4 DV18 5 6 AV33 5 6 7 DV25 5 6 DV12 1 3 4 5 6 7 8 d GLOBAL SIGNAL itle POWER Size Document Number Rev Custom MT5351RA V2 1 Date Monday September 26 2005 Sheet 2 of 8 TwinSon Chan H FB 2 __ CB17 CE17 BEAD SMD 0805 0 1uF 10uF 16v E C0603 SMD Outdoor PS VS splitter 5 OP NC RF AGC p 317 NS ROSOS SMDI ofS 8 100 R0603 SMD 5 TUNER 100 _ R0603 5MD VS Tuner 5
13. gt 1N5236B 35V 47 R117 R118 R119 6120 R2 112 0104 ovS 180KF 180KF 180 160KF 160 330pF C109 KTC3209 Q106 R124 68PF KSP2907 R122 220KF 18KF Q105 1281 35V 470 gt 0101 UC3854N 8125 R126 R127 R128 8 gt 0 VR 75 75 75 75 VER ki i 0 001uF 6 la D111 R607 TN 1N4148 130KF gt 5 o o lo R608 Q207 120KF 5 15 KRC103M Q702 KTC3207 VR601 R132 33KF T100 STBY EE1927 L301 gt gt 0211 u 1N5234B R615 R143 R145 ueg R302 18KF 3W 470K 2W 240K NS 1 02KF Ln C301 301A lt 1 10V 22004 2 T206 D700 2 4042 FSF10A60 D107 R140 KTC3198Y N 199 196 R193 189 7 5 6 6 6 A 12300 R303 R253 m KA431AZ 1KF 2W 240K R700 700 R198 R195 R192 R190 PC100 9 2208 T 6 6 6 gt GND BYV26EGP D226 1W10 1KV 100pF 8142 a 5M0280R YDTU LL4148 6 8KF gt m C213 8141 ON OFF gt 630V 0 01uF C701 702 704 4 7 118 0209 100 0 01uF 4 sPwiinsoc3 O 126 8175 m 50V 0 47uF 0 N D R229 D209 1W 4 7 gt VA DET N 114148 o ST a Og PC102 n Q208 R245 1281 gt GND lt p 0106 C128 US1M ee gt KTC3198Y D303 lt 35V 470uF 1N5245B PFCGND
14. 0603 5 060 Co603 SME 0603 6 CQ603 SMD C0603 SMD P 2 CAPVGND c APLLCAP1 APLLCAP1 LEFT SIDE BOTTOM SIDE APLLCAPO R0603 SMD R0603 SMD E 359 1 2 un 5 2 ANALOG PART C31 CB65 CB66 CB67 CB68 CB69 CB70 CB71 72 CB73 CB74 CB75 CB76 OSDA MST dixi CB77 10uF 10v 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 400 0 1uF C0805 SMD C0603 SMD C0603 SMD C 603 SMD C0603 SMD C0603 SMD C 603 SMD C0603 SMD C0603 SMD C 603 SMD C0603 SMD C0603 SMD C0603 SMD R0603 SMD C0603 SMD MEM VREF lt RVREF 5 LEFT SIDE RIGHT SIDE TOP SIDE BOTTOM SIDE Deli G0 5 OPWMO lt gt R0603 SMD XTALI 5 OXTALI lt 5 OXTALO 12 FB7 DVDDKP 0 AV33 5 VCXOO gt DV33 U2CTS FB CB78 CB79 AVDDBGKP 5 U2CTS gt BEAD SMD 0603 4 TuF 0 1uF OIRI C0603 SMD C0603 SMD CB80 lt 0 1uF C0603 SMD AVDDYKP OSCL_MST OSDA_MST L31 CB82 MEM VREF RVREF 0 1uF EEPROM 24616 C0603 SMD SOP8 SMD NC FB C129 C128 L0603 SMD 0 1uF 0 1uF C0603 SMD C0603 SMD AVDDRKP MT5351 SYSTEM EEPROM 0 1uF C0603 SMD AVDD_DMPLLO 0 1uF C0603 SMD AVDD 1 0 1uF C0603 SMD AVDD_VPLL 0 1uF C0603 SMD 0 1uF C0603 SMD 0 1uF C0603 SMD itle MT5351 PERIPHERAL Size Document Number Custom MT53
15. 16 9 Typical 1000cd 1 25 White Window Average 60 1 In a bright room with 150Lux at center Typical 3000 1 In a dark room 1 25 White Window pattern at center Typical 220 W Full White more than 60 000 Hours of continuous operation gt Life time is defined as the time when the brightness level becomes half of its initial value Y Display Dot Diagram Ist 2nd 851th 852th pixel pixel pixel pixel column column column column pixel Pixel Pitch width Cell pitch R 0 338 1 0800 GOG 0 374 lt gt AU i i row 2nd pixel 31 3rd pixel c 52 1 d Eo d do Eo 1 d 1 1 d og 1 dog od m row 1 O3 3 1 480th pixel os SERGE Product Specification of PDP Module 7 CONNECTORS and CONNECTIONS Power Input Connector gt Connector P3001 Pin Assignment Symbol 00 6 0 0 1 1123723 8 Pin numbers Top View viewed from the pin connection side Module side connector 1 1123723 8 Header Y Mating Connector 1 1123722 8 Housing Y Connector Supplier AMP gt Connector P2005 Pin Assignment p se 3 5 Module side connector 1 1123723 10 Header Y Mating Connector 1 1123722 10 Housing Y Connector Supplier
16. Repetition case 2 Array resistor fail IC1 gt 16 line IC2 gt 16 line open case3 IC fail 96 line open 4 Trouble shooting 2 Horizontal bar Most horizontal defects can be repaired In case of adherence part of the Film and rear panel electrode defect or panel electrode open short replace the panel 1 Connector It can make a horizontal bar that connector on Y b d and Z b d did not plugged well Because sustain voltage can not be supplied to panel So check connectors FPC Y drv Y drv first t Horizontal bar Disconnected 1 Disconnected Screen off 4 Trouble shooting 2 Scan IC check Check diode value of the right side part of output pin Normal diode value in case of Panasonic IC 1 035 Defect diode value 0 018 It can be different from each IC Maker in case of TI IC 0 6 0 7 Check here with DMM either forward reverse is ok PADOSOP1 27 4 Trouble shooting 2 Horizontal line 1 Check FPC In case of horizontal 1 or more line it is due to FPC or panel inside ctrl b d Y b d is just normal FPC electrode open Panel electrode Insulation break down Horizontal 1 line 2 Check sc
17. UT 2 Date Sheet of 9V 12V O CES CB5 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD CE6 5V_TUNER BEAD SMD 0805 CB6 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD AP1084 TO220 DIP bV TO220 DIP POWER SUPPLY 5 FOR TUNER CB3 R5 AZ1117 adj 110 SOT223 SMD R0603 SMD 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD R6 180 RO0603 SMD FB BEAD SMD 0805 4 CB4 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD 1 25 x 1 180 110 3 3V POWER SUPPLY 3V3 FOR MT5351 R7 AZ1117 adj 110 C220UF16V D6H1 SOT223 SMD R0603 5MD R8 180 R0603 5MD DV33 DM BEAD SMD 0805 CE8 CB8 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD 1 25 x 1 180 110 3 3V POWER SUPPLY 3V3 FOR MT5111 DV33 CE9 CB9 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD AV33 FB BEAD SMD 0805 CE10 CB10 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD POWER SUPPLY 3V3 FOR MT5351 ANALOG DV33_DM 2 OUT g Q T R9 AZ1117 adj 270 SOT223 SMD R0603 SMD R11 120 R0603 SMD DV18 BEAD SMD 0805 12 CB12 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD 1 25 x 1 120 270 1 8V POWER SUPPLY 1V8 FOR MT5111 5V U6 OUT ADJ GND CE13 CB13 R10 220uF 16v 0 1uF C220UF16V D6H1 C0603 SMD AZ1117 adj 100 SOT223 SMD R0603 5MD R12 100 0603 5 0 DV25
18. 57 19 58 18 ovcc 0081 59 17 QE7 5 60 2 Qo10 e1 15 QE5 9 e2 SII 169 14 QE4 2 0012 63 100 pin TQFP 13L oges F Qo13 64 Top View 12 2 0014 65 1 QE1 m 0015 66 10 67 9 PDO GND _ 68 8 SCDT 0016169 7 5 OUT 0017 70 6 0018 71 5 9 9 72 2 0020 73 3 36 0021174 2L Pp4 2 0022175 1 a A O O d A x 4 00 0 DIFFERENTIAL SIGNALS i Figure 1 5 169 Pin Diagram Sil DS 0049 B 1 PanelLinlc D I G I TAL 169 HDCP PanelLink Receiver EE Data Sheet Silicon Image Functional Description The Sil 169 is a DVI 1 0 compliant digital output receiver with built in High bandwidth Digital Content Protection HDCP It provides a simple cost effective solution for DT Vs implementing DVI HDCP Pre programmed HDCP keys simplify manufacturing while providing the highest level of security There is no need to use encrypted keys program EEPROMs or cure epoxy coating Figure 2 shows the functional blocks of the chip STAG OUT PIXS OCK INV HS DJTR RESET HDCP HDCP Decryption Keys Engine EEPROM CTL3 QE 23 0 XOR Panel QO 23 0 ODCK PanelLink ted Mask Digital
19. ASPDIF MT5111 ASIC dn MT5351 ASIC ROTOR 58 UORX 5351 PERIPHERAL 58 UZIX 2 3 DDR MEMORY UART RS232 NOR FLASH JTAG UART 1 1 5 VOR O 7 5 VOG O 7 VOBIU UOTX BN B VOPOLKO E UDRX 4 2 58 VOHSYNC VNE U2TX 5 8 VOVSYNC VODE AO1MCLK d jc aps Hi 43 H e DIGITAL VIDEO OUTPUT R49 75 T 5 AO1SDATAO R50 75 29 DEVICE 86 5 Zo e 12V POWER 12V POWER SUPPLY NO CSISND 14 c ASPDIE TON POWER 5V POWER SUPPLY VOBS DIGITAL AUDIO INTERFACE VOB 5V tuner POWER 5V TUNER POWER 3354 RNOG603 SMD 277211 DV33 DM POWER 3 3 MT5111 POWER 961 AA sanien goya DV18 POWER 1V8 MT5111 POWER 7 2 0 33 POWER 3V3 5351 n AV33 POWER 3V3 MT5351 ANALOG POWER VOGS 21 0 25 POWER 2 5 MT5351 DDR POWER mms DV12 POWER 1 2 MT5351 POWER VORO BNL 8 VOR1 32 VOR2 33 VOR3 ___34 AA 5 GROUND GROUND VORS a VOR7 39 3354 RNO603 SMD ___40 VOHSYNC RNI ___41 VOVSYNC 42 D VM ae ASPDIF 33 4 RN0603 SMD _ 45 3 ORESET 8 48 R0603 SMD READY ___47 REQUEST 48 A inm 33 4 RN0603 SMD 9 _ RCA SPDIF 5P DIP 5 0 5 BOTTOM 1 En Sinis wu DIGITAL OUTPUT SPDIF CIRCUIT
20. PH10 2 0 DVI R 15K R86 DVI L 15K R84 DVIL YPBPR2 R15K R97 YPBPR2R YPBPR2 L 15K R94 YPBPR2 AVIR 15K R103 AV AVIL 15K R102 AV L YPBPR1 R15K 692 __ 1 YPBPR1 L 15K R87 __ 1 R118 R119 R120 R121 122 R123 R124 5 5K 75K R125 75K 4 7nF Y1SOY 22uF 10V 15 Y1 GNDB Y1 GNDB CB1 INB 22uF 10V CB1SWB x CB1 GNDB CB1 GNDB CR1 INB 22uF 10V CR1SWB d CR1 CR1 GNDB VCC j 4 7nF 250 Y2SWB Y1 GNDB Y2 GNDB VCC CB2_INB 22uF 10V CB2SWB CB1 GNDB CB2 GNDB CR2 INB 22uF 10V CR2SWB CR1 GNDB CR2 GNDB 4 7nF Y3SOY DVD Y IN 22uF 10V Y3SWB DVD Y GND Y3 GNDB VCC DVD CB IN 22uF 10V CB3SWB DVD CB GND CB3 GNDB DVD CR IN 22uF 10V CR3SWB DVD CR GND CR3 GNDB VCC COMPONENTS SWITCH IDTQS3VH257 TIV330 IDTQS3VH257 T1V330 TSSOP16 SMD TSSOP16 SMD vcc T 0 CB 9 05 R272 0 CE82 AVI L gt 22uF 25v Tee js Q R275 vcc 4 es 5 121 R 3 22 8 2277 47 R299 R300 CB116 E 10K 0 1uF AV2 L 10K 22uF 25v 2 I 0 __ 14 AVIR v 75 AVIL R279 45 47k 21 CE85 2 4 T VCC 0 22uF 2bv Fc GPIO DVDo _ CD 4052BC S
21. integrating the following 180mQ power MOSFETs Start up shut down pop elimination Short circuit protection circuits Mute Stand By The MP7720 utilizes a single ended output structure capable of delivering 20W into 40 speakers MPS Class D Audio Amplifiers exhibit the high fidelity of a Class A B amplifier at efficiencies greater than 90 The circuit is based on the MPS proprietary variable frequency topology that delivers excellent PSRR fast response time and operates on a single power supply Ordering Information Part Number Package Temperature MP7720DS SOIC8 40 C to 85 C MP7720DP PDIPS8 40 C to 85 C EV0030 Evaluation Board For Tape amp Reel use suffix Z e g MP7720DS Z For Lead Free use suffix LF e g MP7720DS LF VDD 7 5V 24V Audio 40 Figure 1 Typical Application Circuit MP7720 Rev 1 5 06 17 04 MP7720 20W Class D Mono Single Ended Audio Amplifier PRELIMINARY INFORMATION Features 20W output at Vpp 24V into 40 load THD N 0 04 0 1W 80 93 efficiency at 20W Low noise 190uV typical Switching Frequency to 1MHz 9 5V to 24V operation from single supply Integrated Start Up and Shut Down Pop Elimination Circuit Thermal protection Integrated 180mO switches Mute Standby mode Sleep Tiny 8 Pin SOIC or PDIP Package Evaluation Board Available Applications Surround Sound DVD Systems Televisions Flat Panel Monitors Mul
22. 15 A13 D13 R28 SDV25 3 9 16 14 014 0 3 VV 4 DRAN 75x4 48 15 015 16 19 4 PWR 13 RN6 F A18 A16 A18 10k R29 PCE 3 AT sis NOT 0 3 22x4 D 11 2 R30 A20 RYBY WP ACC 00 71 3 10 631 22 D 10 D RAS 6 Del By Ada i p F A 0 20 3 50 8 P FLASHVCC 10k d RN7 75x4 PWR E SE PM la 7 g 0 1uF NEA eine d 51 001 501 D 10 R32 75 M a Ow B p s DV33A0 RESET 003 4 V 2 D DG MX29LV160BT RN9 47 4 D DQO 8 TSOP 48 pin 004 7 8 D 004 5 001 6 ADOS D DQ5 D DQ2 4 D1V25 A DQ6 3 V 4 D 006 D_DQ3 Ror 1 D DAT D1V25 75x4 RN10 47x4 RN11 008 D D 004 8 one M13L128168 8Mx16 6 0010 3 4 D 0010 006 4 0 1uF A DQM 4 v 2 DOT D_DQ7 RN12 47x4 75x4 0012 7 anaaga 050912 RN13 A DOS Dats D 8 A 0014 3 4 D 0014 D DQ9 6 D1V25 A DQi5 4 00095 0010 4 2911 47 4 75x4 CB78 RN14 0 1uF RN15 D 0012 B 0016 7 8 050016 66 6013 A A Dans 0018 5 2918 5 0015 3 0019 4 Vv 2 D DQ19 D 5017 030 5 2918 0029 75 4 D1V25 RN16 47x4 6 6 RN17 DQ20 7 8 00020 5 0019 0928 D 0016 5 amp 0021 0020 0027 0017 4 002 3 0 0022 2018 6 C
23. 8 Figure 4 Digital Output Transition 8 Figure 5 Receiver Clock Cycle High Low 5 8 Figure 6 Output Signals Setup Hold 9 Figure 7 Output Signals Disabled Timing from 9 Figure 8 Output Signals Disabled Timing from Input Clock 9 Figure 9 Input Clock Active to Output Active 9 Figure 10 SCDT Timing from DE 10 Figure 11 TFT Two Pixels per Clock Staggered Output Timing Diagram 10 Figure 12 Data Valid Delay driving Read Cycle 10 Figure 13 Block Diagram for _1 15 Figure 14 HDCP System Architecture 23 Figure 15 Byte 8 9 24 Figure 16 Byte 00 9 24 Figure 1 4 Short Read __ _ ______ 25 Figure 18 Design Using 51 1618 or 511169 29 Figure 19 DDC Bus Voltage Level Shifting using Fairchild NDC7002N 30 Figure 20 Voltage Regulation using Texas Instruments 11431
24. gt 38 Ordering TIT OME AU ON 38 Sil DS 0049 B lil PanelLinlc D I G I TAL Sil 169 HDCP PanelLink Receiver aga en Data Sheet Silicon Image LIST OF TABLES Table 1 One Pixel per Clock Mode Data 16 Table 2 Two Pixel per Clock Mode Data 16 Table 3 One Pixel per Clock Input Output Mode P amp D and FPDI 2 17 Table 4 Two Pixels Clock Input Output TFT 18 Table 5 24 bit One Pixel per Clock Input with 24 bit Two Pixel per Clock Output 19 Table 6 18 bit One Pixel per Clock Input with 18 bit Two Pixel per Clock Output 20 Table 7 Two Pixel per Clock Input with One Pixel per Clock Output 21 Table 8 Power Management Functionality 22 Table 9 Register 26 10 27 Table 11 Link Impedance vs EXT RES Value all values in 29 Table 12 Power Consumption 30 Table 13 Recommended Components 32 LIST OF FIGURES FOU ______ 1 Figure 2 Functional Block 2 Figure Channel to Channel Skew
25. 75x4 RDQ18 4 MEM 0018 4 LDM 46 CLKA WEZ LDM 46 CLKB i RBA1 3 4 MEM MEM BAO 3 4 20019 1 2 05019 __1 2 CLK 45 CLK 45 MEM_CLKB 0 1 agar MEM_ADDR1 MEM_CS 6 RDQ20 8 47x4 DQ20 8 75 4 RAS CAS CLK 24 MEM MEM RAS CAS CLK MEM CLKEN 5 RCLKO RCLKO RA4 8 4 8 25021 6 6021 6 5 RAS pe 43 CS RAS ks 43 5 RCLKOR RCS RDQ22 3 4 0022 3 4 25 42 MEM ADDR12 25 42 MEM ADDR12 RCS RRAS R67 22 ADDR7 MEM ADDR3 R68 75 RDQ23 0023 MEM BAO RSS 4 MEM ADDR11 MEM BAO hoe MEM ADDR11 5 RCAS RDQS2 REC 47 DQS2 R7 75 21 40 ADDRS 21 40 ADDR9 RWE R71 22 MEM_ADDR11_ MEM 11 R72 75 RDQM2 R73 47 DOM R74 75 MEM ADDR1O BSI A9 MEM_ADDR8 MEM_ADDR10 851 9 39 8 RWE RCKE RDQM3 R75 47 DOMS R76 75 ADDRO fe 3 MEM_ADDR7 MEM_ADDRO 4 8 5 RCLK1 RCKE R77 22 MEM CLKEN CLKEN R78 NS 78 20053 279 47 MEM DQS3 __280 75 ADDR1 37 ADDR1 a7 ADDR6 RCLK1 1 RDQ24 RNG 8 47 4 MEM 0024 8 75 4 2 pi 6 5 2 i a 6 5 qon T M
26. A21 E 104 105 C106 C107 C108 C109 C110 C111 C112 C113 C100 C101 C102 C103 DATAO A 220pF 10uF 10v 220pF 10uF 10v 220pF 10uF 10v 220pF 10uF 10v 220pF 10uF 10v 220pF 10uF 10v 220pF 10uF 10v DDCDVISCL R161 100 DDC SCLg 8 DATAO DDCDVISDA 100 DDC SDA Q R163 DVISCDT R167 R DVIPDO _ 10k DVICAB R177 0 8205UP1 2 Add By MTK DVICAB DDC SCL DDC SDA D29 D30 D31 D32 R164 SOT23 SMD SOT23 SMD SOT23 SMD SOT23 SMD 100k vec VCC 131 DVIPWR DVIPWR 0 117 DVIPWR DVIPWR 100uF 16v 0 1uF D33 D34 D35 SOT23 SMD SOT23 SMD SOT23 SMD VCC VCC L32 DVIPWR DVIAVCC DVIHSYNCO DATAO DATA1 DATA2 BEAD SMD 0603 DVIVSYNCO CB118 DVIDEO C95 C96 D36 D37 D38 10uF 10 0 1uF 220pF DVIAVCC DVIODCKO je De SOT23 SMD SOT23 SMD SOT23 SMD 1 83 WO e CTL3 TP9 vec DATA1 8 __ DATAT 86 HS DJTR 11 DVIAVCC go Sil 1 61 B DVI23 CHANGE DATAO 90 DVI22 DATAO DVI21 RXO 9 DVI20 R165 9 DVI19 390 9 Sil 169 DVI18 DVIHSYNCO RN2 DVIHSYNC 46 DVI17 DVIVSYNCO 4 A M A 3 DVIVSYNC DVIPWR EXT RST ELT Bi TQFP100 SMD DVI16 DVIDEO DVIDE DVIPWR DVIODCKO DVIODCK PVCC PGND dd DVI15 R170 RESERVED k Euri L33 0 120 RN2 VI20 10k DVIPWR DVIPVCC DVI21 A VI21 DVI22 26 VI22 FB BEAD SMD 0603 DVI23 VI23 RED DVIPD DVIPDO Sth OS C97 C98 3 DVI16 RN2 116 8344 1
27. Page 1 October 2004 MTK MEDIATEK MT8205 8203 Specifications are subject to change without notice Applica tion Notes MT8205 8203 Application Notes MT8205 8203 is a highly integrated single chip for LCD TV supporting video input and output format up to HDTV It includes 3D comb filter TV Decoder to retrieve the best image from popular composite signals On chip advanced motion adaptive de interlacer converts accordingly the interlace video into progressive one with overlay of a 2D Graphic processor Optional 27 HDTV or SDTV inputs allows user to see multi programs on same screen Flexible scalar provides wide adoption to various LCD panel for different video sources on chip audio processor decodes analog signals from Tuner with lip sync control delivering high quality post processed sound effect to customers On chip microprocessor reduces the system BOM and shortens the schedule of Ul design by high level C program MT8205 8203 is a cost effective and high performance HDTV ready solution to TV manufactures FEATURES B Video Input Input Multiplexing Without external switch it supports 1 Component 1 S video 1 VGA Component dual function ports 1 Digital and Composite inputs All the input sources can be flexibly routed to Main PIP internally Input Formats Support VGA input up to SXGA 1280x1024 60HZ including SOG VGA Support HDTV 480p 720p 1080i input Support DVI 24 bit RGB
28. 1 ct Up Connect ADIA LS oe a 7 T p E separate the fixed Screw of Z Board Condition in Lock part is pulled Pull FPC Connector Pull out Lock as shown in arrow as shown in arrow 3 Y drive B D 1 This is a path to supply SUSTAIN RESET waveform which made from Y SUSTAIN B D to panel through SCAN DRIVER IC 2 Supply a wave form that select Horizontal electrode Y SUSTAIN electrode sequentially potential difference is OV between GND and Vpp of DRIVER IC in SUSTAIN period being generated potential difference between GND and Vpp only in SCAN period In case of 42 V6 use DRIVER IC IC 8 EA TOP BOTTOM each 4EA 4 Y sustain generates SUSTAIN RESET waveform Vsc SCAN voltage and supplies it Y DRIVER B D Composed with IPM DIODE electrolytic capacitor FET 5 Control Board creates signal processing Contour noise reduction ISM and an order of many FET on off of each DRIVER B D with R G B each 8bit input Use 3 3V 5V 2 kinds of power 6 DC DC Converter part Being impressed 5V Va Vs DC DC converter makes 5V Va Vs Vset up Vsc which is essential for each B D There is no DC DC B D in model 40 42 1 POWER B D 60 embedded DC DC B D separately because of high power consumption 7 FPC Flexible Printed Circuit
29. 44 9 9 0 9 6 0 0 1 1123723 10 Pin numbers Top View viewed from the pin connection side gt Connector P2006 Pin Assignment eem me 0000 1 1123723 4 Pin numbers Top View viewed from the pin connection side Module side connector 1 1123723 4 Header Y Mating Connector 1 1123722 4 Housing Y Connector Supplier Pin A ssignment Product Specification of Power Supply Unit 8 Input Output pin assignment amp specification 10987654321 87654321 CN808 Ug m m CN805 432 1 Co JO 014 COPn2 e e 1 3 5Vsc 4 6 7 8 12Vsc 9 10 GND 11 12 NC CGO00 1O 014 COh2 lt N80 171825 7 02 1718254 809 CN803 1 171825 2 Selection S W iw v
30. Production keys when requesting samples Before receiving samples of the Sil 169 with production keys a customer must have signed the HDCP license agreement Panel Interface Logic and Configuration Logic Unencrypted video data is sent to the display logic by way of a 48 bit output interface The functionality of this interface is affected by several of the externally strapped configuration logic options as follows e The data output can be presented in either one pixel per clock or two pixels per clock format depending on the PIXS configuration setting polarity of the output clock can be inverted to accommodate both rising and falling edge clocking through the OCK_INV configuration setting e Using the STAG OUT configuration setting the odd and even data output groups can be staggered in time to reduce EMI e The HS_DJTR configuration setting can compensate for host side jitter on the HSYNC input to the transmitter he PD and inputs select chip power down modes and allow for disabling of the outputs to the panel The RESET input must be in the HIGH state during normal operation in both HDCP and non HDCP modes Its primary purpose is to reset the digital block circuitries including the HDCP engine and registers at initial chip power up time The VSYNC HSYNC DE and CTL3 signals will be driven low while RESET is asserted If it is necessary to disable the HDCP engine while leaving the chip fully o
31. i 3 5 E Emi 104 10 D 105 1NF 22P 27P 66 103 1 2 2 PGND IN EN 2 1 2 i 4 s 2N3904 5 I I CONS WIHOUSING 2 8 E E LOUT E 107 168 o Ni 820pF1560pF 20 ROUT INTR E INIL m 99 SAY v GND V trie Y 5 7805 eons ov C63 C61 sove 100n 100n 330U 16V Toe Qs GND V GNDV GNDV GNDV 2 2N30p4 INT O EXT 1 i 68 NCIOR 10K R55 2 t cia ret 15 FB 2 i MUTEC rm A WW qu sot 1 2 f 7 2 1 5 E ces ces 3l des Nu 100 cas 2 P 1 1 DT 21 2 65 P 10K esr TU 1 2 p n MEME We AW AMI OSDA m Ls 5 O4MV cas E 1 1 9 400K tn tn E D6 2N3906 e tok MUTE GNDS Y AGND LOUT m qwe GNDS m is 103 ROUT 3 2N3904 ATF 10K 5 5 AGND AGND AGND AGND s 1 2 cO SEN 2 m R56 Mas D8 LOUT ces
32. supply a driving waveform to PANEL by connecting a PAD electrode of PANEL with PCB Y and Z there is two type of this for Y B D One is single sided another is double side These are having pattern on it for Z B D there is no pattern single sided and Beta type all of copper surface weer P i 1 TO T LERRA 8 FFC Flat Flexible Cable for connecting a Logic signal between B D and B D There is 0 5mm pitch 50pin type 1mm pitch 30pin type EET VL NE 9 Chip On Film supply a waveform which made from X B D to panel and select a output pin that is controlled by COF when be on or off 96 output pin per IC the more the resolution higher the less spare space where can set IC on it in B D without using IC PACKAGE 4 525 7 gt 1 Pts p M E NL rai we can use a BARE IC so we can get IC with LOW COST V7620 Rev B a soldering defect rate decrease composition 1 FPC Heat Sink FPC for COF must have a Low Spec decline with getting damp because we do not solder IC on PCB directly LIT 2 CHIP resistor CHIP CAPACITOR 42 VG is the same as 42V5 3 BARE IC STV 610A WAF GOLD WIRE AL WIRE 4 EPOXY MOLDING 10 IPM Intelligent Power Module composition HEATSINK CAPACITOR DIODE IC LINEAR RESISTORTANSISTOR FETS description Attached at
33. Broad IF OP IF AGC Narrow IF OP1 Narrow IF OP2 PORT TUNER TD1336 FGHP L11 5V TUNER Q FB CB18 18 5 0805 0 1uF 10uF 16v cosas C10UF16V D5H11 R20 4 7K R0603 SMD 10nF C0603 SMD 5V_TUNER Q R16 10K R0603 SMD R0603 SMD TUNER_SCLO TUNER SDAO IF AGC 510 1 R0603 SMD 0 1 R0603 SMD i ades mum 29 ____________ 5 S 3 NS GND L IND SMD 0805 PORT SAW FILTER X6965D 5 5 C7 SIP5K DIP 1uF C0603 SMD IF SAW FILTER AND AMPLIFIER 5 TUNER O VCC_ 5V GND IN 1 1 IN2 092 GND C SOP8 SMD R23 2nd ROUTE SYMMETRICALLY 4 7K R0603 SMD 5 TUNER 2 4 5V TUNER 1 2 4 5 6 7 8 GND GLOBAL SIGNAL 4 lt 4 A 2nd lt 2 IF TUNER SCLO 4 TUNER SDAO cu MGE c C TUNER INTERFACE itle TUNER Size Document Number Rev Custbm MT5351RA V2 1 Date Monday September 26 2005 Sheet 3 of 8 TwinSon Chan 2nd IF 2nd DVDD33 Q as 5 0 MT5111 RF AGC RF AGC 2 of 2 89 e olg 1 C9 a Qo 2 R0603 S5MD 47nF lt lt 8 C0603 SMD O aft a b e s 55 MT5111 IF AGC Es a R0603 SMD 47nF C0603 SMD Close to MT51
34. R519 q 1 5KF 4 2 O gt caos sovoes 5 400 R417 p 1 1 408 8411 412 5 m C404 50V O 1uF N caos 403 caos C407 50 O 1uF m c M C408 50V O 1uF i u gt C409 0 1uF n i o 9 9 o TX 5 E T N t 1 1 16 ha 17 9 3 13 12 15 CN809 i i n jJ d 4 a FR REE Sm 2 2 t evsc C gt 1 n 2 D 02 Z hm 5 5 gt 0 90 0 lt 5 gt 0 gt gt gt gt oo 0 9 5 2 gt 9 lt gt lt 2 puo D 2 9 1 171825 2 1 1123723 4 1 1123723 0 1 1123723 8 171825 2 LX lt gt N CNO1 F101 CNO2 C207 C307 R31 176976 2 550v ga 3 176976 1 1 316 7 2W100 2kV47p 2kV 7p 2100 R102 R105 A 520 5W15 D102 gt CNO3 1 1905 60VA L105 FEP30JP DP gt 3 176976 1 R101 0205 0303 2W470K RY101 DP F10A60 F10A80 LKP1aF 18V R204 ES ed L101 R138 10M 224 C308 C3509 RYC C208 2kV47p 100V 100V C101 VA ADJ 470uF 470uF Ga a 250v i 105 pi
35. Saar 1 2 56 DV33 PDD5 GND PDA7 D5 PDD6 R82 R83 1 2 3 4 5 6 7 GND lt bia PDD7 NS 4 7K NS 4 7K PDAS R0603 SMD R0603 SMD ORESET PDA10 PDAO PDA1 PDA2 1 4 5 ORESET gt a GLOBAL SIGNAL PDA13 D11 ORESETZ NS 4 7K PDA14 He 0 R0603 SMD PDA15 R0603 SMD C32 POCEO 6 Tin PDAO NS 10pF 5 POOEO PDA17 5 C0603 SMD POOEO POWE DV33 PDA18 NOR WP R86 p POWER PDA1 CC NOR RY BY PDDJ O 7 RY BY Of ATK TRAP CIRCUIT 5 PDD O 7 PDA21 BYTE E R0603 SMD FB9 DV33 5 PDA O 22 R87 PDA22 Vus FLASH INTERFACE R0603 SMD aaa CB145 CE27 BEAD SMD 0603 POWE GND1 6 0 1uF 10uF 16v DV33 R88 GND2 C0603 SMD C10UF16V D5H11 O JTRST ORESET NOR_RST JTRST JTDI 0 b JTDI JTMS 683 R0603 SMD IC FLASH MX29LV320 32Mb TSOP 48 R89 R90 p JTMS JTCK 5 JTCK 10pF TSOP48 SMD 4 7K 4 7K JRTCK C0603 SMD R0603 SMD R0603 SMD 9 JRTCK JTDO NOR FLASH 0 5 JTDO JTAG PORT 4x1 W HOUSING UORX CLI OUTPUT DIP4 W H P2 0 Me oen UOTX U1RX 5 U1RX DV33 9 UTTX U2TX 1 5 U2TX 15 U2RX R91 R93 DV33 UART RS232 1K 4 7K R0603 SM R0603 SMD R R94 R95 SR B TVTREF 1 4 7K 4 7K E G JTRST R0603 SMD lt RO0603 SMD VOHSYNG 1 5 VOHSYNC VOVSYNGC 1 5 VOVSYNC JRTCK R96 R0603 SMD R0603 5MD 4x1 WIHOUSING SOFTWARE DEBUG PORT R99 4 7K DIP10X2 W H IDE P2 54 R0603 SMI
36. 5 Plastic screws for fixing micro switches When replacing AC primary side components transformers power cords noise blocking capacitors etc wrap ends of wires securely about the terminals before soldering gt Make sure that wires do not contact heat pts generating parts heat sinks oxide metal film resistors fusible resistors etc Check if replaced wires do not contact sharply edged or pointed parts Make sure that foreign objects screws solder droplets etc do not remain inside the set The lightning flash with arrowhead symbol within an equilateral triangle is intended to alert the user to the presence of uninsulated dangerous voltage within the product s enclo sure that may be of sufficient magnitude to constitute a risk of electric shock to persons The exclamation point within an equilateral triangle is intended to alert the user to the presence of important operating and maintenance servicing instructions in the literature accompanying the appliance MAKE YOUR CONTRIBUTION TO PROTECT THE ENVIRONMENT Used batteries with the ISO symbol eS for recycling as well as small accumulators rechargeable batteries mini batteries cells and starter batteries should not be thrown into the garbage can Please leave them at an appropriate depot WARNING Before servicing this TV receiver read the SAFETY INSTRUCTION and PRODUCT SAFETY NOTICE SAFETY INSTRUCTION The s
37. 5 TS1VALID b TS1ERROR TONGUE 5 TS1CLK OSCL MST TS INPUT DVDD18 OSDA MST OSDA_MST 6 OSDA_MST DVDD33 10 2 OSCL MST DVDD18 TS1ERROR 4 TS1VALID TS1CLK TS1SYNC DVDD33 3354 RN0603 SMD BN12 TS1DATAO _ TSIDATA1 DVDD18 5 _ TSIDATA2 a TS1DATA3 3354 RN0603 SMD DVDD33 DV33 DM Q CB148 0 1uF C0603 SMD TS1CLK TS1DATA7 T RH 1 TS1DATA7 74HC74 74HC74 R0603 SMD SOP14 SMD SOP14 SMD DV33_DM 149 0 1uF C0603 SMD TS1CLK amp 2 TS1CLK TS1DATA7 T TS1ERROR 74 00 74 00 74 00 74 00 SOP14 SMD SOP14 SMD SOP14 SMD SOP14 SMD 5V_TUNER DV33_DM 230 232 10K 4 7K 4 7K R0603 SMIS R0603 SMD R0603 SMBy R0603 SMD TUNER SDA1 QF1 TUNER SDA 2N7002 N MOSFET TUNER SCL1 TUNER SCL 2N7002 N MOSFET L TUNER SDA1 3 TUNER SDAO RRA R0603 SMD TUNER_SCL1 3 TUNER_SCLO 1 itle R0603 SMD MT5111 ASIC Size Document Number Rev C MT5351RA V2 TwinSon Chan 1 Monday September 26 2005 Date Sheet 4 of 8 TP6 TUNER S TP SMD D1 0 TP1 IOR Y6 5 1 2 Y5 5 1 YA P SMD D1 0 z9 es ol a gt ajaja 555 oS g ERR ek o eNe
38. OSC X1 Probe Touching point Check oscillating state normal 100 MHZ Be careful with physical shock Input voltage Teeth TETTE Check IC 11 13 DMM DMM GND 4 Trouble shooting 5 Y sus B D 1 Check FUSE FS1 5v FS2 Vs 2 Check voltages Vsetup Vy Vscw 3 Check DIODE between GND and Y SUS output SUSUP OC2 SUSDN OC1 forward 0 4 reverse OVERLOAD 4 Check whether output voltages agrees with voltage that represented in label 4 Trouble shooting Check whether output voltages agrees with voltage that represented in label Check diode value GND between Y SUS output am p om E cat JS NNNM PEDEM i 1 i al diode value 0 4 forward 4 Trouble shooting 6 Z sus B D 1 Check the FUSE 2 Check input voltages Va 5V 15V 3 Check FPC out put diode value 4 Check ramp waveform Check input voltages Check the FUSE 5V FUSE Va FUSE 6 3A Vs FUSE 2A or 4A 4 4 Trouble shooting B Variable resistance of Z RAMP waveform slope Ne og Check FPC output diode value caution check certainly after removing FPC Normal diode valuez0 375 forward Normal diode LOAD reverse
39. Power protection It is power protection when power is off automatically within 2 3 min from power on Power protection function protect the boards when occurred short on circuits of PDP module or power problem If can not impress power even after replacing PSU find out where the short occurred PSU makers DAEGIL PSU UNICON PSU 4 Trouble shooting Vertical defect bar Check each section with following method if there is problem replace or repair that part If not go to the next section 1 Connector Check here Check COF connector If not connected well it will Make a bar defect Check here 2 Checking COF Confirm whether COF was torn And then check input of COF resistor and IC COF 6 is torn partly Tearing 4 Trouble shooting 9 Checking address COF input of resistor and IC resistor checking Check the both side of resistor With Digital multi meter DMM If the resistor is normal the resistor value will be 10 2 10 8 But if not the value will be 0 or infinity and replace the resistor 4 Trouble shooting 9 Checking address COF input of resistor and IC B IC input checking Inside of IC there is 4 ea diodes which separated in 2 series input 2 output 2 how to check 1 contact DMM terminal to a right terminal of condenser GND and DMM terminal to a right terminal of IC normal value 0 66 fig 1 2 contact DMM terminal to Output termin
40. R0603 SMD DV33 Q R100 R101 4 7K 4 7K R0603 SMD lt RO0603 SMD FOR SOFTWARE LINK DIP4 W H P2 0 VOHSYNC VOVSYNC itle NOR FLASH JTAG UART 1 Size Document Number Custom MT5351RA V2 TwinSon Chan Date Monday September 26 2005 Sheet 8 of 8 Basic Operations 8 Circuit Description MODULE There are 1 pcs panel and 8 pcs PCB including 2 pcs Y Z Sustainer board 2 pcs Y Drive board 2 pcs X left and right Extension PCB 1 pcs Control Signal Input and 1 pcs Power board in the Module SET There are 6 pcs PCBs including 1 pcs Tuner Audio board 1 pcs Keypad board 1 pcs Remote Control Receiver board 1 pcs L R Speakers and 1 pcs Main Video board 1 pcs ATSC 1 pcs ATSC board in the SET Parts position Internal Speaker Right Power Supply Internal Speaker Left Y Drive Top Z Sustainer Y Sustainer Y Drive External Speaker Bottom Terminal X Left Extension Power SW ATSC Main EMI Filter AC Inlet Local Key Tuner Audio X Right Extension remote control receiver Control Signal Input PCB function 1 Power 1 Input voltage AC 110V 240V 47Hz 63Hz Input range AC 90V Min 265V Max auto regulation 2 To provide power for PCBs 2 Main board To converter TV signals S signals AV signals Y Pb Cb Pr Cr signals DVI signals and D SUB signals to digital ones and to transmit to Control board 3 Control board Dealing with the digital signal for output to panel 4 Y Sustai
41. additional card or equivalent Minolta CA100 photometer 1 6 Magnetic field no restricted 1 Control settings Brightness Contrast Tint Color set at Center 50 1 8 Power input 110 120Vac 60Hz 1 9 Ambienttemperature 20 C 5 C 68 F 9 F 1 10 Display mode 31 5KHz 60Hz Resolution 852 x 480 1 11 Other conditions 1 11 1 With image sticking protection of PDP module the luminance will descend by time on a same still screen and rapidly go down in 5 minutes When measuring the color tracking and luminance of a same still screen be sure to accomplish the measurement in one minute to ensure its accuracy 1 11 2 Due to the structure of PDP the extra high bright same screen should not hold over 5 minutes for fear of branding on the panel CONTINUATION PAGE Technical Specifications NUMBER 3 or 10 ELECTRICAL CHARACTERISTICS 2 Power Input 2 1 Voltage 110 120VAC 2 2 Input Current 3 3 2 3 Maximum Inrush Current 30 A FOR AC110V ONLY Test condition Measured when switched off for at least 20 mins 2 4 Frequency 60Hz 3Hz 2 5 Power Consumption lt 330W Test condition full white display with maximum brightness and contrast 2 6 Power Factor Meets IEC1000 3 2 2 Withstanding voltage 1 5kVac or 2 2kVdc for 1 sec 3 Display 3 1 Screen Size 42 Plasma display 3 2 Aspect Ratio 16 9 3 3 Pixel Resolution 852x480 3 4 Peak Brightness 1000 cd m Panel module without filter 3 5 C
42. is easy to implement and cost effective PanelLink further simplifies the display interface design by resolving many of the system level issues associated with high speed mixed signal circuits Features e Integrated 25 165MHz PanelLink core to support VGA to UXGA resolutions Supports HDTV resolutions 720p 1080i protected content Pre programmed HDCP keys provide highest level of key security simplify manufacturing Enhanced jitter tolerance e Time staggered data output for reduced ground bounce High Skew Tolerance 1 full input clock cycle 6ns at 165MHz Integrated HDCP decryption engine for viewing Backwards compatible with 511 1618 sync Detect for Hot Plugging e Flexible low power modes with automatic power down when input clock is inactive e Low power 3 3V core operation Compliant with DVI 1 0 Standard and Pb free packages see page 38 SiI 169 Pin Diagram OUTPUT CLOCK CONTROLS EVEN 8 bits RED 9 o 2 OQ OI gt lt 2 m 0021 51 25 0 13 2 5 0031152 24 912 9 a 4 53 23 11 m o 005 54 22 10 Qoe 55 21 QE9 007 56 20 QE8
43. 0kg without stand Gross weight 41 0 kg 15 3 Dimensions with stand Width 1040 mm Height 690 Depth i 290 mm Product Specification of PDP Module Vs 180V 190V LVDS Input Memory Controller Input Va 55V 65V Interface Controller 20007 Control Signal Serial Interface Driver Timing APL Data Controller Color Plasma Display Panel 852 X 480 pixels Scan Driver gt c C3 gt un un c Applied Voltage level is specified at the time when Full White pattern is displayed the panel Block Diagram X6965D SAW Filter U9 UPC3218 AGC Amplifier U10 Coaxial CUP S Connect with MT8205 SE Block Diagram LSGELIN o 9 0 x _ 5 Control Signals O 3 566 e CN Y BAA rs I2C MT8205 12 5V gt VII2C gt V BYPASS p _ 0 31 _ Address 0 11 2 l S Video 2 5V RS232 5V tL VGAI2C gt Bypass Out TTL Signals 3 3V gt Used by MT8205 lt 4 Communication with MT5351 4 UART2 MT5351 DownLoad Pr Audio in AVI Audio AVE Rudio Circuit Diagram Power
44. 1 Bab 5 265 5 lolz 152621 zz KERE SEIEIEISISISISIS A RA O 11 5 lt O o o o o O 0 gt lt O O O O 7 gt o O a 02 c en O olo ze zm zm s 2 5 2 2 0 gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt BA O 1 5 gt lolelclolol A DQMIO 1 5 aa la d d il d d d e da m o DQ 0 31 5 XTALI Q i co lt 0 04 lt 4 4 lt c aj lt lt gt 8 5 Cl 2 ij P e a lt a A i en d C ai d C Z 3 gt Om lt dj 2i JAA cO lt en q en lt cn lt lt 2 a CY lt en PI XALO _____ 1 07 5 4 o Q AZA On 2 2 Oo na H ANALOGVDD SSANALOGVDD 4 9912020200 5020000 505009 8556877099 566 069902860 5 08052062045562009 3 ADCVDD 2 gt gt gt gt gt gt lt gt gt gt gt 1 5 ADCVDD 4 gt gt gt gt gt gt gt o eee APLLVDD 4 t 80060504 78 8
45. 1 Component 2 VGA 9 DVI or DTV 6 DTV Press to choose DTV directly Dot Press number buttons with it to select the channels directly in DTV VOL Press to adjust the volume 9 CH Press to select the channel forward or backward MTS Press repeatedly to cycle through the Multi channel TV sound MTS options Mono Stereo and SAP Second Audio Program 4 Enter Press 4 A to move the on screen cursor select an item press Enter to confirm And it can also press A or V to select channels press 4 or to adjust the volume Exit Press this button to exit Menu Press to enter into the on screen setup menu press again to exit V Chip Press to select the child protect mode Press to select the Closed Caption mode Freeze Press to freeze the picture press again to restore the picture Display Press to display the channel information and it disappear after 3 seconds Favorite Press repeatedly to cycle through the favorite channel list Add Erase Press to add or delete favorite or dislike channels S Mode Press repeatedly to cycle through the sound mode Normal News Cinema Flat and User PIC Size Press repeatedly to cycle through the picture size that best corresponds your viewing requirements Normal Full Wide1 Wide2 Wide3 4 3 No Scale and Panoramic 2 N Continued on next page CONTINUATION PAGE Technical Specifications PD
46. 4 RDQSO 47 __ _5050 R 75 na ee EG y 2 RAG 5 6 MEM_ADDR6 MEM_ADDR8 5 6 RDQMO R57 47 DOMO R58 75 MEM 003 Feo MEM 0012 MEM 0019 60 0028 5 MEM ADDR8 MEM 7 4 RDQMi R59 47 DOQMi R60 75 MEM DQ4 pos Del MEM DQ11 MEM DQ20 DOS 0012 MEM 0027 GND A MEM DRE DQ4 DQ11 32 DQ4 29 1 2 3 4 5 6 8 GND lt RAS 1 2 ADDRS 20051 261 47 0051 __262 75 8 VE wen 8 RDQS RX X 474 7 X 75 4 MEM DQ5 Q 57 MEM_DQ10 0021 Q 57 MEM 0026 RA12 R63 22 ADDR12 MEM ADDR12 R64 75 RDQ9 6 MEM DQ9 6 MEM DQ6 DOS 756 MEM DQ9 MEM DQ22 DOS 56 MEM 025 GLOBAL SIGNAL B EROS 006 Dag 006 Dag RDQ10 3 4 MEM_DQ10 3 4 55 55 L RA13 R65 22 ADDR13 MEM_CAS R66 75 RDQ11 MEM DQ11 MEM 007 ee 4 008 0023 e 4 0024 25012 8 47 4 12 8 75 2 NE NO 53 ME ND 53 RDQ13 5 6 50913 5 6 RDQ14 4 MEM 0014 4 0050 un MEM 0051 0052 MEM 0053 RDQI5 1 2 00915 1 2 ADDR13 ND 95 50 ADDR13 ND 95 50 R 49 VREF 49 VREF 4 2 gt VREF 49 VDD VREF 49 b RDQS O 3 RDQ16 RN28 47x4 MEM 0016 RN2 8 75 4 E REF Rs un RDQ17 5 6 02017 5 6 MEM DQMO AT MEM DOM MEM DQM2 AT MEM DQM3 p RDQMIO 3 RRAS 4 0 2 22x4 MEM_RAS MEM BA1
47. Burning Address 0 H EX Custom Burning End 900000 Direct Control Key p H Clear MSG A NtkTool 8205 Flash Upgrade TAK Baud Rate Window Help M WB Load Bin file E AKAN pelp_0923 workspace pdp bin gt Browse Check Sum Backup file beckup bin Browse E Backup USE Config 6 RS 232 gt Flash C Ush Dram C Ush 1818 56 LOG Init Rs232 Verity Use YGA Pot v High Speed ERR terminate upqrede hackup flash USB to UART Bridge Controller ShakeHand LOG SetMarmal Off LOG Startto upgrade Custom Burning Address LOG Init Custom Burning End HE LOG Flash Type 5 600000 Direct Control LOG Updating l LOG Begin Fri Sep 23 11 00 38 2005 Clear MSG 9 The update process is successful as progress bar is 100 After update process is turn off power and wait indicator light is off Turn on power and TV can work Checking It 1 needed to check the version of the firmware for MT8205AE which has been download into the Plasma TV Press Menu button of the remote control for a little long time and the OSD menu for Factory Setting is appeared on the screen Use the remote control and select the mode of the Factory Setting then enter the mode of the Factory Setting Use the remote control and
48. C105 C106 D209 1000uF BYV26EGP So C210 VS ADJ L103 BD101 450V 0202 R218 2100 630V c212 V osve 65181560 330uF 2 0201 A BOC3 104 aii TNR101 1102 L104 30k R320 104 14D621K ca 10 R10510W 0 02 25 7 102 C103 R07 R317 102 102 1W4 7 R322 R225 R321 AN N N 10 470 Ik C214 R221 FB2 R319 1 105 30k gt can ke 3 224 FG 471 D202 FBI R226 R227 42 C304225 PC301 R318 1N4148W 470 2 x 30k C204225 1k pin x H11A817BSD R323 REF 4 1 30k 100 R117 RIB RII9 20 R121 a 8214 m ig CT OUT 2 gt CT 1201 OUT Rm 3 Y 334 7552 0302 SE TL431 180k 180k 160k 160k 160k KA7552 20 BST IS 4 190VS ON 30 R228 ON FB END 5227 18k ens 680 Q303 684 Goa R2 KST2222A i R123 KST2222A C202 Mn 30k 5W0 085 7 2 530k RE PK 15 6 ae 182 R212 R125 R126 R127 R128 U101 GT gt 10 50 035 R229 75 75 75 75 R129 150k UC3854DW om 10k 2 2 D 10 5 V 5VB RYC R137 10k Q501 5 FDS4435 C511 gt SB5V 105 Eu 1k DP 0503 L PICI6LC72A R134 C115 C116R135 0 R133 39k 20k 10uF 122 10k REF gt 50y 5VB S5VSC gt 5 C407 C408 ME 402 D404 S60V L3 RA AN PQ3ORV21 41N4148W C501 S190V gt 5 RA2 AN2 473 5 24V 30V 630V R510 G ADJ gt R418 470 4 R420 1k
49. C412 10uF R419 C510 RCO TICK1 RC7 RX 13k 30X 22 RC1 CCP2 RC6 TX mo RC2 CCP1 RC5 1 912 IN4148W H11A817BSD R507 A L gt 12VSC 470 DES 8423 390 R421 iy COM 2W22 C413 C414 CIS 8 2k R426 C418 C9 220uF 2 404 EXER gt 471 22 PQ30RV31 144148 0 gt 9 5 0407 5422 F5LC20U 170 404 105 gt 144148 T C420 C421C422 24V 50V 60VA N 25V 4709 3 gt 5 HEUS 2294 19075 H11A817BSD eo gt 5VCTRL 100k 100k 9VSC 60VA 5V ON 4 G18V 190 5 256 SV C424 C425 1500uF R525 dio EM 2 6 2298 ecsos N H11A817BSD KST2222A RHL C426C427 428 429 C430 C431C432C433 A 4 5W 10V 1500uF 8 e DIS C 190 0 190 5 ON 5 2 R526 52500 3 R438 C436 0410 MMSZ5245B N 3 e IN4148W gt 5VSC PC504 0404 E 2SK2903 01MR R534 501 60VA ON L403 10 60V ON S 12956 1500uF sg 12V 9P4M R538 2 3 12VFAN 12k 5 gt 0502 e 2 513 R522 C516 R535 zs FB3 5 2 10k 104 oN pcso LIVE 0 300VDC 5 lt HI1AB17BSD PULS VOLTAGE PC401 HI1A817BSD x RLY C gt 0503 NEUTRAL 100VDC REFERENCE KST2907A x DaD C 150V SECONDRAY 0405 SVB NOTE VALUE FOR ALL CAPACITOR ARE IN uF ELSE SPECIFY RATED WATTAGE FOR ALL RESISTOR ARE 1 10W ELSE SPECIFY LAST NO
50. Date _ Wednesday October 12 2005 Sheet 12 of 12V TXD RXD DVIVSYNC DVIHSYNC DVIDE DVIODCK 8205UP1 3 DACMCLK DACBCLK DACLRC READ Y REQUEST OGO4 0605 0606 3 12V TXD RXD DVIVSYNC DVIHSYNC DVIDE DVIODCK 8205UP1 3 DACMCLK DACBCLK DACLRC READY REQUEST OGO4 OGO5 OGO6 VI 0 23 gt VI 0 23 0603 0601 0602 SW PCRXD PCTXD WE PWR 5VSB 252 3 OGO3 OGO1 OGO2 SW PCRXD PCTXD WE PWR DV33A 10k NC R253 10k 74LVCOOA NC 1 7 10 14 1 3 1 3 JP3 3x1 JP3 DIP P2 54 SW 5V 12V 12V CE77 CE78 IRF7314 CB134 SOIC8 SMD 220uF 16v 0 1uF 12V LO gt DTV BOARD POWER ON HI gt DTV BOARD POWER OFF T4HCTO4A NC DV33A O R248 10k R251 DV33A 5VSB R243 22k 33 amp R339 R244 R245 C120 C121 OGO5 Q9 1uF 1uF 2N3904 0 SOT23 SMD Add by MTK 5VSB R246 10k R249 READ Ys 10k NC 5VSB pv33A 010 READYO s amp 2N3904 L46 L47 SOT23 SMD FB NCC FB MTK Modify TXD 2 5 PCTXD RXD 2 RXD 0 PCRXD 6 PCRXD TXD 0 TX R254 IDTQS3VH257 10k TSSOP16 SMD REQUEST Function PC lt gt MT5351 UO ais ae REQUESTO MT5351 U2 lt gt MT8205 SOT23 SMD lt gt 8205 gt MT5351 UORX VCC Trace width of 12V gt 30mil T Trace
51. M ippg 28 VOB7 1006 27 lt VOGO NH VOCO ipps 126 lt IDD7 925 oe EH 2 1 28 7063 P vos 04 2 voG4 22 gt VOG5 Sa 5 DCLK 26 lt VOG6 VOG6 25 42 DDATAO 128 gt voro DDATA1 ZZ DDATA2 M26 So YH vor DDATA3 23 VORS U2 ors Vora MDETECT 128 gt VOR5 vor H2EX MBS 126 gt VOR7 MDATAO 25 lt VOPCLK VOPCLK MDATA1 AA28 VOHSYNG VOHSYNC MDATA2 27 ope VoVSYNC 28 25 JTRST om SOS REQUEST JTDI READY sO JTDI STSDIN AB27 ts SPWRSEL SDETECT 4 JRICK CV JRTCK 4228 __5199 JTDO SRST AC2L ae SCLK 28 R0603 SMD GND SDATA 29 lt GND GND GND LED1 EA A WLED DIP2 54 AH LED DIP P2 54 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND onos Oe e HE S9S9359959902z20
52. T207 35V A7uF MULTI EER4042 R500 C500 Eu 1W 10 1KVO 001uF gt MULTI ON OFF 550 554 504 555 557 10V 2200uF 2200uF 4 R209 gt 5VCTRL 2W 240K D500 lt ON OFF SF30SC6 0202 gt 5VSC D200 BYV26EGP 05001 0701 MULTI L gt SF30SC6 KTC3207 LL4148 C200 630V 0 01uF 2 gt 5 DET Q201 SPW11N80C3 5 BOUE PC206 D206 IC500A 214 PC 17K1C LL4148 R210 KA431AZ PC205 0 01uF D212 D203 1W 10F PC 17K1C C226 1N5234B 114148 0 001uF R505 C505 KA317 R212 1W 4R7 1 0 001uF 200 10KF DAT 281 Output gt 30V 1 0A 24 1 25 R400 LED401 R237 SUF30J _ gt 30V DET 1KF RED 5W 0 1 5VCTRL R401 1KF C506 C507 220uF 35V 47 1 C202 35V 47 H SEL 4 CABLE _ KIA7045AP GND IC501 KIA278R12PI LED400 CRST400 R220 C519 R531 AMHZ 1 4W 1008 12V 1 0A 5 0202 9 D KRC103M 4 1200 gt 12 DET KA7552A C510 C511 R516 35V 470uF 35V 47 TKF 2 gt 2228 c lt ox N e R262 IC502 5 5 9 1 78 R217 C208 C520 R526 5 i 10KF 470pF 50 HMS87C1304A 2 A PC202 2 z C201 PC 17K1C 9 _ e 0 01uF 3 3 2 3 5 5 m 9 5 262 227 0101200 oc rc 5 4 7uF 0 001uF C516 C514 gt 9 DET i222 35V 1000uF 35V 47 lt lt m gm DE
53. _ DACBCLK ADCREFGND VMIDADC VMIDADC ORO4 3 DACBCLK VMIDADC 77770807 OROT 3 DACMCLK AUXL 2 11 CE67 ___0607 AOSDATA1 ET pes 312 2 2 E 7 10uF 25v CB126 PWM DACLRC U Q HPVDD CE69 0 1uF sen 22 3 DACLRC DACREFP 30 1OuE 25v BEES soar SCL 10 ZFLAGR DACREEN 22 M DACBCLK A VMIDDAG 57 VOUTR DACMCLK VOUTR COD_VOUTL ADCMCLK VOUTL 28 C DOUT DOUT P NC 10uF 25v CB128 DACLRC 9 Foor 0 1uF V 5288 8598 9 229 V 1k 8776 V CE71 COD VOUTR AUSPR E 9 10uF 25V R231 3 DV33 CODHPOUTR GND 10k catio TO AUDIO BD V MUST USE SHIELD CABLE 7 COD VOUTL 0 1uF TWO WIRE SERIAL CONTROL DEVICE ADDRESS 0 34 10uF 25v 10k Bypass R233 0 R0805 SMD DACVA BEAD SMD 0805 CB132 EN VCC Tu 5 5 100uF 16V V CE74 100uF 16V id lt 0607 ADINO MTK pulls PWM 1 Repalce ADIN1 MTK AUDIO BYPASS R13 022 0 V BYPASS AOSDATA3 R234 SDATA AOUTL L BYPASS DACBCLK DACLRC R236 DEM SCLK VA LRCK AGND DACMCLK MCLK AOUTR R BYPASS 84334 2 CH AUDIO DAC SOP8 SMD V 1 5x1 W HOUSING VCC PH6 2 0 V BYPASS IN3 IN2 GND R239 7612 75 Title Size Doc Number WM8776 WM8766 AUDIO CODEC
54. data data Interface Logic HSYNC VSYNC SCDT control Figure 2 Functional Block Diagram PanelLink TMDS Core The PanelLink TMDS core accepts as inputs the three TMDS differential data lines and the differential clock The core senses the signals on the link and properly decodes them providing accurate pixel data The core outputs the necessary sync signals HSYNC VSYNC clock and a display enable DE signal that drives high when video pixel data is present The SCDT signal is output when there is active video on the DVI link and the PLL has locked on to the video SCDT can be used to trigger external circuitry indicating that an active video signal is present or used to place the device outputs in power down when no signal is present by tying SCDT to PDO A resistor tied to the EXT RES pin is used for impedance matching Interface and Registers The 51 169 uses a slave interface capable of running at 400kHz for communication with the host HDCP authentication is managed by reading and writing to registers through the interface This bus called DDC in the DVI specification is also tied to the EDID EEPROM that contains information about the display s capabilities resolution aspect ratio etc address of the Sil 169 is 74h specified by HDCP This interface is not 5V tolerant and it is recommended that a voltage level shifter be used between the SiI 169 and the DVI connector as the D
55. disconnecting cable from the product be sure to turn off the power Be sure to hold the connector when disconnecting cables Pulling a cable with excessive force may cause the core of the cable to be exposed or break the cable and this can lead to fire or electric shock 5 This product should be moved by two or more persons If one person attempts to carry this product alone he she may be injured 6 This product contains glass The glass may break causing injuries if shock vibration heat or distortion is applied to the product T The temperature of the glass surface of the display may rise to 80 or more depending on the conditions of use If you touch the glass inadvertently you may be burned 8 Do not poke or strike the glass surface of the display with a hard object The glass may break or be scratched If the glass breaks you may be injured 9 If you glass surface of the display breaks or is scratched do not touch the broken pieces or the scratches with bare hands You may be injured 10 Do not place an object on the glass surface of the display The glass may break or be scratched Spare Part List for PDP4210EA Part Number Part Description Usage Unit Item Unit E6205 001003 42 ED PDP Module ow 79 1 1 piece piece E3421 926083 Connection Cable 3 piece piece 10 11 12 13 14 15 16 17 18 Spare Part List for PDP
56. domna A_CAS 5 VPLLVDD ADCVDD4 gt lt lt lt lt gt lt lt lt lt 650900 lt lt 2 4 DVIDE A 5 oO VPLLVDD 4 VFEVDD1 gt DE DVI ADCPLLVDD1 ADCVDD4 D DATTOD D24 DVIVSYNC SDV25 5 ae SS ADCPLLVDD1 4 ADCVDD4 lt lt VSYNC DVI ADCPLLVDD MPX1 A24 DVIHSYNC VREF 5 ADCPLLVDD 4 SIF DVI nra 2 4 DV18A ORO AUXBOTTOM lt lt 4 GND AF DVDD18 H So 12 4 ADCVSS4 AOSDATAO H ORO4 12 REXTA VREFP4 D A26 AOSDATA1 REXTA 4 AOSDATA1 0802 i APLL CAP VREEN4 D B26 23 13 APLL CAP 4 REFN4 AOSDATA2 PWM2VREF GND DV33A F A 0 20 5 PWM2VREF 4 ADCVSS DVDD3I ADCVDDO D4 B AOSDATA3 D 0 7 5 ADCVDDO 4 ADIN4 AOSDATA3 ADCVDD4 ADIN B24 DOUT 5 ADCVDD4 4 ADIN3 4 ADIN2 6 DACBCLK AVCM 4 ADIN2 AOBCK VOCM DACLRC VOCM 4 ADIN1 AOLRCK VICM ADINO 4 1 R7 VICM 4 ADINO AOMCLK VREFP4 ADCVDD N GND 10K NC VREFP4 4 ADCVDD DVSS3 VREFN4 PWM2VREF 6 0024 VREFN4 4 PWM2VREF DACFS AUXTOP 0025 DACVREF BALES A AUXVTOP DQ25 0026 4 AUXVBOTTOM 0026 E28 8205UP3 0 DACVDD GND 4 SDV25 DACVDD 4 VPLLVSS DVDD2 MPX1 8 LVDDA VPLLVDD 5927 LVDDA 4 VPLLVDD DQ27 MPX2 8 IR VPLLVDD H 6 0028 7 11 DLLVDD DQ28 GND ET pyss GND VSYNC 10 GND KA 0929 CET 9 HSYNC 10 BGVSS DQ29 REXTA 7 4 SDV25 VPLLVDD rs D26 083
57. product 5 Before turning on power to the product check wiring of product and confirm that the supply voltage is within the rated voltage range If the wiring is wrong or if a voltage outside the rated range is applied the product may malfunction or be damaged 6 Do not store this product in a location where temperature and humidity are high This may cause the product to malfunction Because this product uses a discharge phenomenon it may take time to light operation may be delayed when the product is used after it has been stored for a long time In this case it is recommended to light all cells for about 2hours aging T If the glass surface of the display becomes dirty wipe it with a soft cloth moistened with a neutral detergent Do not use acidic or alkaline liquids or organic solvents 8 Do not tilt or turn upside down while module package is carried product may be damaged 9 This product is made from various materials such as glass metal and plastic When discarding it be sure to contact a professional waste disposal operator Repair and Maintenance Because this product combines the display panel and driver circuits in a single module it cannot be repaired or maintained at user s office or plant Arrangements for maintenance and repair will be determined later Product Specification of PDP Module 1 GENERAL DESCRIPTION DESCRIPTION The 2 is a 42 inch 16 9 color plas
58. select the mode of Firmware Version and then enter the mode of Firmware Version It is easy to be found the version of the current firmware for MT8205AE is as the following Firmware Version Process of update MT5351AG Preparing 1 Connect RS232 VGA download line One connector is connected to VGA connect port of Plasma TV while another side is connected to PC COM port 2 Store the MtkTool into the PC Downloading 3 Turn on AC power switch of the Plasma TV and then press the button standby of the remote control The image could be found on the screen of the Plasma TV while the color of the power indicator 15 green the mode of the Plasma TV will be standby mode if after turn on the main power switch only 4 Execute MTKtool and select the chipset as MT5351AG the software of MTKtool will be sent to your side 1 5351 Flash Upgrade 2 Fort Baud Rate Window Help 4 s gt 115200 PG n i Load Bin Backup file backup bin ark Upgrade Check Sum Browse Backup USB Contig 55 232 Usb Flash Usb gt Dram C Usb MT1818 Verify UseVG4 High Speed USE to UART Bridge Controller ShakeHand Custom Burning Address 0 HEX Custom Burning Enid Direct Control Set Normal Clear MSG 5 Select current COM port please try to check the COM port of your
59. supply board of PDP Module DGP 420WXGA Power supply board of PDP Module USP490M 42LP Main Video board Audio Tuner board ATSC board Keypad board Remote control receiver board External L R Speakers board Remote control board 5 4 3 2 1 F101 CNO1 VI 250VAC 8A 3 176976 2 T204 205 D600 45 on VS EER4042 FSF10A60 L101 eee AS CH1082008 CH108200S 5W15 5W20 2102 pici gt 19075 200 CNO2 3 176976 1 3 176976 1 R226 2W 240K C600 R102 C222 1W 390KJ L RELAY1 Q102 Q103 Q109 D205 630V 2 5 SDT SH 118DM uN SPW20N60C3 3 105 106 BYV26EGP 1WAR7 1 220pF ME C104 450V 330uF R610 TNR101 54 630V 1uF 140 621 gt 0204 Q203 204 p LL4148 C206 SPW11N80C3 2 N 630V 0 047uF D601 114148 104 L gt FSF10A60 10W 0 02 611 TNATO2 300KF L102 14D 621K 23mH BD101 R603 C601 i N D25XB60 102 103 vs DET 250V 0 001uF VEO 1W4R7 1KV 220pF C110 470pF R144 R113 10F 24 0206 gt GND C111 1281 R116 O 1uF 10KF D109 C123
60. to VGA connect port of Plasma TV while another side is connected to PC COM port 2 Store the MtkTool into the Downloading 3 Turn on AC power and wait TV entering standby mode while the color of the power indicator 15 Red 4 Execute MTKtool and select the chipset as 8205 the software of MTKtool will be sent to your side EtkIool 5351 Flash Upgrade Sele 7 Fort Baud Rate Window Help COM 5 115200 Load Bin file ak Upgrade Check Sum Backup Browse Backup USB Contig 5 232 Usb Hash Usb gt Dram Usb 1818 verify E High Speed ShakeHand Custom Burning Address 0 HEX Custom Burning Enid Direct Control Normal Clear MSG 5 Select current COM port please try to check the COM port of your PC usnm 8205 Flash Upgrade 7 Fort Baud Lindow Help 205 coms 1520020 B hM Load Bin Backup file backup bin C Usb gt Flash C Usb gt Dram C Usb gt MT1818 Verify High Speed USE to UART Bridge Controller ShakeHand Custom Burning Address 0 HEX Custom Burning Enid Direct Control Clear MSG 6 Choose the bit rate as 115200 7 Select the update binary by pressing browse button For exemple the binary file name is PDP4210EA_VIORE_XXXXXX_XXXX_VXX bin t
61. 0 42 bin image logl bin image bin 3E T 1 258 MB Bin _1303 9 _ Browse i Backup file backup bin 1 Browse 27284 Compare USB Contig fe H5 232 C Usb Dram C MT1888 flashless C Usb Flash Verify Use VGA High Speed USB ta UART Bridge Controller ShakeHand Custom Burning Address o MEX Custom Burning End 800000 Direct Control 0 Clear MSG EtkTool 8205 Flash Upgrade 5 Help 205 1 115200 4 ms aad Bin EXAKAlSpdp D9823 workspacexpdp bin w Backup backup bin LOG Init Rs23e LOG Flash Unknown Flash LOG Erasing LOG Erasing LOG Erasing ERR terminate upgrade backup flash LOG SetNormal Off LOG Start to upgrade LOG Init Rs23e LOG Flash 4249L 1 BOABB Mez SLY BOB LOG Begin Fri Sep 23 11 00 38 2005 OX QM Browse Browse USE Config Check Sum Verify High Speed g ShakeHand Custom Burning Address HEX HE Custom Burning End Direct Control Clear MEG 9 The update process is successful as the progress bar is 100 After the update process is ok turn off power and
62. 0 10uF 25v NC LVDDA Q30 0031 OGO 0 6 7 9 13 LVDDA DQ31 gt T 0053 7 0083 H26 OBO 0 7 11 DQM1 D14 GND 0 7 10 CLK2P DVSS18 0952 0 61 10 CLK2N 0082 M12 Vssa 0023 226 Internal Reset Circuit R 10 AP6 0022 0022 10 6 P16 GND B A6N DVSS2 B 10 AP5 K26 Dazi AN5 ASP DQ21 020 RED RED 8 LVDDA ASN 0920 DV18A RED RED 8 3 DYDDA 5619 DV33A GREEN GREEN 8 0019 SDV25 GREEN GREEN 8 2 4N DVDD2 y 0918 BLUE 4 8 AN M1 ASN 0018 0017 BUE BLUE 8 GND M Q17 0016 R8 CVBST lt 51 8 CLK1 N2_ LVSSB 0016 4 47k CVBS1 CVBS1 8 CERT GND CVBS2 CVBS2 8 AP2 pz CLKIN DVSS2 54 CVBS2 CVBS2 8 AN2 p pci CVBSO CVBSO 8 LVDDA M Kod DACBCLK 50 CVBSO 8 AP1 LVDDC SOY SOY 7 R1 RAB GND GND SY 7 SY 8 APO DVSS18 2 SY SY 8 ANO p Ses M 11 SCF SC 8 GND N N26 CKE SC c 8 DACVDD LVSSC SDV25 8 DACVDDC DVDD2 ee DACVREF Md 26 A CLK Y Y 8 DACFS VREF RCLK A_CLK CBF 8 GND N14 ES RCLKB GND CB CB 8 DACVSSC DVSS2 65 7 M24 CRF CR 8 DACVDD p3 SVM RAS FY 2 CR CR 8 DACVDDB RA2 GND R N24 C
63. 0 SCLP CRT OUT J11 SCL 2N7002 5VSB DV33A SOT23 SMD R295 0 80 1 R191 4 7k QF2 R298 SDA SDA 8 0 2N7002 R296 0 SDAP SOT23 SMD 8x1 W HOUSING DIP8 W H P2 54 CHANGE Title Size Doc Number Rev LVDS CRT OUT Date _ Wednesday October 12 2005 Sheet 10 of 15 0 7 E 0 7 08000 71 3 IR PWR GND 3 7 PANEL INVERTER POWER INVERTER PWR EON 4 Inverter PWR Inverter PWR INVERTER SSINVERTER PWR 1 gt 0 3 OBO1 CES50 CE51 CB122 gt gt OBO1 3 470uF 50v 470uF 50v 0 1uF 9802 gt gt OBO2 3 PWR GND 4 gt gt 3 0804 0804 3 FOR AU 32 INVERTER CONNECTOR 0805 vee gt gt 0805 3 J12 0806 0806 3 Inverter PWR 1 2 Pond D 22 22 41 R199 E 3 14 TUR H 5 8209UPT 2 w 8205UP 2 p ci GND pwr 1 aps Dimming m 9 12 100k __ __13 PWMO R201 4 7k 05 123 PWR L1 14 R202 2N3904 0 1uF SOT23 SMD 14x1 WIHOUSING DIP14 WH P2 0 R R203 SELECT 10k R204 External PWM input Back Light circuit BL ON OFF for dimming control R205 8205UP3 0 Q6 2N3904 4 7k SOT23 SMD J13 Inverter PWR Sines 3 4 OC s5 el 7 8 9 10 1 PWR 10x1 W HOUSING DIP10 WH P2 0 R FB BEAD SMD 120
64. 0004 31 Figure 21 Voltage Regulation using National Semiconductor 317 31 Figure 22 Decoupling and Bypass 5 32 Figure 23 Decoupling and Bypass Capacitor 32 Figure 24 DVI to Receiver Routing Top 33 Figure 25 Bottom View of Thermally Enhanced 100 pin TQFP 34 Figure 26 Thermal Land Design on 35 Fig re 27 Thermal u oBui uclmE S 36 Figure 28 Recommended Stencil 37 Figure 29 Package Diagram E T 38 PanelLinlc iv SiI DS 0049 B D I G I TAL 51 169 HDCP PanelLink Receiver Data Sheet Silicon Image General Description The 51 169 Receiver uses PanelLink Digital technology to support HDIV and high resolution digital displays for DTV and PC applications It features High bandwidth Digital Content Protection HDCP for secure delivery of high definition video in consumer electronics products The SiI 169 comes with integrated pre programmed HDCP keys greatly simplifying manufacturing and providing the highest level of security For improved ease of use the 51 169 has enhanced jitter tolerance and a low power standby mode PanelLink Digital technology is the world s leading DVI solution providing a digital interface solution that
65. 0uF 10v 220pF DVI17 A d 7 R176 ADD BY MTK DVI18 VI18 R NC R NC DVI19 VI19 DVI PLUGPWR 0 9RSSESEESEE EE DVI12 112 gx 2 RRA A 1 DVI PLUGPWR slol DVI13 igh PE DVI PLUGPWR gt gt gt gt DVI14 5 VI14 CHANGE gt 55 DVI15 7 VI15 33x4 GREEN DVI8 2 RM29 A 1 VI8 R169 DVI9 Ac m VI9 C99 10k DVI10 VI10 T DUI Ph ERE EIER WHEN USE Sil169 Sil161 ADD R175 NC R345 yu WHEN USE Sil1169 ADD R345 NC R175 DVI5 VI5 DVI6 VI6 EEPROM 24 02 12 DVI7 VI7 d 34 BLUE DVIO RN3 VIO DVI2 ob VI2 DVI PLUGPWR DVIPWR O R0603 SMD DDCDVISCL DVISCL MOSFET N 2N7002 SOT23 SMD DDCDVISDA DVISDA MOSFET 2N7002 SOT23 SMD HEN USE Sil169 sil1169 ADD R0603 SMD DVIPWR O DVIPWR R346 10k NC R347 10k NC When 51169 51161 R346 NC Add R347 When use Sil169 Sil1169 R172 NC Add R326 WHhen use 511161 R326 NC Add R172 Add by MTK DVI3 E RAAT VI3 3x4 DVIPWR DVIPWR DVIPWR DVISDA DVISCL R327 4 R328 4 7K NC R329 4k7 NC R174 10k NC HS_DJTR OCK_INV DVISTAG DVISCL REPLACE OCK_INV NET DVISDA REPLACE ST WHEN SIL161 ADD R173 R174 WHEN 51169 Sil1169 R173 R174 N use 1169 511161 ADD R333 Size Doc Number
66. 11 eoogonxsr2os a 9 4059 ee gt C11 ADVDD33 1 ee Y 9 ADVDD33 C0603 SMD L13 g NC NS 220nH AVDD33 AVSS L IND SMD 0808 C0603 SMD 81 AOR C13 82 N T AVDD33 83 C0603 SMD C14 0 1uF AVDD C0603 SMD NC C15 0 1uF REFBOT J 86 REIS 0603 5 0 C16 VCMEXT EET 4 10uF 10v Lees C17 0 1uF C0805 SMD REFTOP a9 C0603 SMD 99 AG AVDD33 a LO DVDD18 FB2 AVDD3 AVDD AVDD33 AVDD BEAD SMD 0603 0 1uF 955 xrA2 T 96 55 19 T 99 AVSS Y1 18pF oo AVDD 25MHz C0603 SMD AVSS CRYS DIP SMD C20 C0603 SMD gt lt DV18 DVDD18 DVDD18 FB CB19 CB23 CB24 CB25 CB20 CB21 BEAD SMD 0805 19 CB22 0 1uF 0 1 0 1uF 0 1uF 0 1uF 0 1uF 10uF 16v 0 1uF C0603 SMD C0603 SMD C0603 SMD C0603 SMD C0603 SMD C0603 SMD C10UF16V D5H11 C0603 SMD zi Digital 1 8V Bypass Caps DV33_DM DVDD33 DVDD33 FB CB29 CB30 CB31 CB32 CB33 CB83 BEAD SMD 0805 CB28 0 1uF 0 1 0 1uF 0 1uF 0 1uF 0 1uF 10uF 16v 0 1uF C0603 SMD C0603 SMD C0603 SMD C0603 SMD C0603 SMD C0603 SMD C10UF16V D5H11 C0603 SMD Sle Digital 3 3V Bypass Caps DV33_DM AVDD33 AVDD33 FB CB35 CB36 CB37 CB38 CB39 BEAD SMD 0805 21 CB40 0 1uF 0 1 0 1uF 0 1uF 0
67. 1uF C0603 SMO C0603 SMD C0603 SMO C0603 SMD C0603 SMD 10uF 16v 0 1uF C10UF16V D5H11 C0603 SMD L Analog 3 3V Bypass Caps Q 100 DVDD33 ADVDD33 ADVDD33 2 DVDD18 DVDD33 U11 MT5111AE e CY 2 e 0 AO NC RESET 25 HOST CLK 5 DGND HOST DATA 43 BN 1 DVDD TZI xm DEBRIS TS VAL 57 TS ERAT DVDD33 34 TS DATAO 32 TS DATA1 31 DEDI TS DATAS3 27 SD L25 e 2 i DVDD33 M 92 moss asc gt gt aia RN13 33 4 RN0603 SMD 3 ux lt lt lt lt AVDD33 AVDD3 FB3 FB CB26 BEAD SMD 0603 C0603 SMD AVDD33 AVDD5 4 GB27 BEAD SMD 0603 0 1uF C0603 SMD AVDD33 ADVDD33 1 FB5 FB CB34 BEAD SMD 0603 C0603 SMD AVDD33 ADVDD33 2 FB6 LNN FB CB41 BEAD SMD 0603 0 1uF C0603 SMD 213 5V_TUNER 2 DV33 DM DV18 1 2 3 5 6 7 8 GND gt 1 5 8 ORESET g SBESEIE GLOBAL SIGNAL AG 3 IF noo 4 B 2nd_IF 5 3 2 TUNER SCL TUNER 500 TUNERCEDAO 8 TUNER SDAO TUNER INTERFACE TS1DATA O 7 TS1DATA O 7 5 TS1SYNC
68. 1uF 0603 5 C0603 SMD GND R101 R0805 SMD 08 CM1117 3 3V VDD EP Vout ADC VDD FB BEAD SMD 0805 E CE18 10uF 25v CB17 220uF 16v a CE16 100uF 16v SOT223 SMD VDD L10 ADCVDDO DV18A L12 ADCPLLVDD1 FB BEAD SMD 0603 CB32 4 TuF 0 1uF 0603 SMD C0603 SMD GND L14 ADCVDDO ADCVDD CB36 CB35 4 TuF 0 1uF 0 1uF 0603 SMD C0603 SMD GND GND PWM2VREF CB42 CE22 0 1uF 47uF 16v C0603 SMD GND FB CB24 BEAD SMD 0805 0 1uF C0603 SMD GND ADCVDDO CB28 CB30 0 1uF 0 1uF DV33A GND ADCVDDO FB DV18A BEAD SMD 0603 4 7uF 0 1uF CB37 0 1uF DACVREF C33 O TuF NC GND CAP C32 1500pF GND REXTA 24 A GND C28 3300pF 33pF 33pF GND DACFS R27 A900 GND C0603 SMD C0603 SMD 0603 PUT ON NEARLY BGA DIGITAL DECOUPLING C23 3300pF CB40 0 1uF C0603 SMD C29 C30 3300 C0603 SMD C31 3300pF C0603 SMD DV33A 17 FB BEAD SMD 0603 C10 0 1uF R20 0 R22 0 AV33 R23 t11 FB BEAD SMD 0603 0 1uF CE21 ds AV33 FB BEAD SMD 0603 C16 4TuF 16v 4TuF 16v ANALOGVDD C8 4 7 0603 SMD GND ADCPLLVDD C13 CB13 CE14 4 7 0 1uF 22uF 25v C0603 SMD GND ANALOGVDD C15 CB15 15 4 7 0 1uF 47uF 16v C0603
69. 3 e Burst Sequential and Interleave e BurstLength 2 4 8 e inputs except data amp DM are sampled at the rising edge of the system clock CLK e Data transitions on both edges of data strobe DQS e 005 is edge aligned with data for reads center aligned with data for WRITE e Data mask DM for write masking only Vpp 2 375V 2 75V 2 375 2 75V e Auto amp Self refresh e 7 8us refresh interval e SSTL 2 I O interface e TSOPII package Operating Frequencies PRODUCT NO MAX FREQ PACKAGE 135128168 5T 200MHz 2 5 TSOPII 135128168 6T 166MHz Elite Semiconductor Memory Technology Inc Publication Date Mar 2004 Revision 1 3 2 48 ESMT Functional Block Diagram Clock Generator Address D CS RAS A 9 Pin Arrangement Mode Register amp Extended Mode Register Control Logic CLK CLK Das 66 PIN TSOP II vssa 400mil x 875 NC 0 65 mm PIN PITCH Elite Semiconductor Memory Technology Inc M13S128168A DM Latch Circuit gt 2 2 5 DLL DQS Publication Date Mar 2004 Revision 1 3 3 48 Monolithic Power Systems General Description MP7720 is a 20W Class D Audio Amplifier It is one of MPS second generation of fully integrated audio amplifiers which dramatically reduces solution size
70. 4210EA Part Number Part Description Usage Unit Item Unit 1 420107 08 PCBASWeWBok 483 49D103 01 PCBA Shield Top Cover 1 piece 2 6 Terminal Fame 1 0001406 Metal Back Cover 493 2D1E 015 Power Switch Metal Fame 1 51042101 MTUO2K TopCaronBox 31050400401 Poly bag for Main Unit 1 piece Poly bag for Instruction Manual S80 P42AAEM TUOQL Instruction Manual 42980401 Power Socket Plate 1 38842010301 Caution Pee J GWAIAADLMTUGH Model Pie 1 piece 37 Spare Part List for PDP4210EA Part Number Part Description Usage Unit Item Unit 579 42D102 09 Model Plate Serial Number Ls svo api 02 Cw remo Dek es Sind DWG REV ZONE DESCRIPTION DATE REVISOR NOTE THIS RELEASED DRAWING WAS PRODUCED BY COMPUTER DO NOT UPDATE MASTER MANUALLY R R CR 6 CR 2 6 3 2 30 R 29 R 28 2 27 1 26 25 2 24 4 23 21 C 1 34 20 9 5 8 5 J 23 6 423
71. 4251 1 5 423 421 2 4 423 428 3 553 0560 2 C 553 095 2 900 42010 1 0 614 4 2 9 277 42 8 388 42D101 01 PC SHEET FOR KEY PCB 1 6 614 260208 10 STP SCREW 2 6X8 5 5 388 42D102 01 PC SHEET FUR REMOTE PCB 1 4 REMOTE 3 269 421101 01 LENS e 263 421101 015 POWER LEN 1 200 421131 FRONT CABINET 1 PART ESCRIPTODN QTY TOLERENCE UNLESS OTHERWISE SPECIFIED ELECTRONIC R amp D CENTRE TITLE MODEL NO PART NO DWG NO B0MM 250MM 0 3 2 3rd ANGLE 250MM ABOVE PROJECTION ANGULAR ET QTY SHEET OF Exploded View If you forget your V Chip Password Omnipotence V Chip Password 8205 Using the Change Password item When enter the Parental menu select Change Password Press A or button to highlight the Change Password item Press Enter button to confirm and pop up a menu gt Input Your Password Please OK Use 0 9 buttons input the omnipotence password 8205 then Press Enter button to enter and pop up a menu OK Cancel Use 0 9 buttons input your new password Press button to move to confirm blank Use 0 9 buttons input your new password again Press Enter button to confirm Suggest Change to your familiar Password again Software upgrade Process of update 8205 Preparing 1 Connect RS232 VGA download line One connector is connected
72. 51RA V2 Date Monday September 26 2005 1 Rev TwinSon Chan Sheet 6 of 8 1V25 DDR 1V25 DDR Q 2 DV25 DV25 DV25 DV25 RWE 22x4 MEM_WE MEM ADDR5 75 4 RDQO RAIG 47 4 MEM 000 RNI g 75x4 9 9 9 9 RCAS 5 A 6 CAS MEM_ADDR4 RDQ1 001 6 RCS 3 4 MEM_CS ADDR13 3 4 RDQ2 3 4 MEM DQ2 3 4 U15 U18 RBAO WE RDQ3 003 66 66 RA10 22x4 MEM ADDRIO ADDR1O 7 8 75 4 2504 7 8 47 4 004 7 8 75 4 MEM DQO 1 1 voo VSS 65 0015 MEM 0016 to von VSS MEM_DQ31 0015 DQO DQ15 RAO MEM_ADDRO MEM_ADDRO RDQ5 005 G 3 64 1 3 64 3 174 4 RDQ6 096 4 MEM_DQ1 4 1 6 0014 0017 4 Er Bd G MEM DQ30 1 2 MEM ADDR2 1 2 RDQ7 1 2 607 1 2 002 5 DQ Q14 62 0013 DQ18 5 DQ Q14 62 0029 RAS 8 22 4 MEM ADDR5 ADDRO 7 75
73. 6 BEAD SMD 1206 R109 J14 KEYPAD MAX 8 KEYS DIP13 W H P2 0 13x1 W HOUSING LI 8205UP1 2 R207 R0603 SMD 8205UP1 2 R0603 SMD Q7 2N3906 LED RED Q8 LED GRN 2N3906 CONN RCPT 5 IR amp POWER ON LED Title Size Doc Number BACK LIGHT KEYPAD Date Wednesday October 12 2005 Sheet 11 145 10uF 25v R21 100k VGA INL WA INR Q ONL 10uF 25v VGAINR 6 Sha C114 YPBPRTL 7 YRBPRAR CB124 LWPBDRETL ou F YPBPR2 55 10uF 25v 0 1uF YDBERPR Keok 3 10uF 25v SCL1 R21 100 SCL14 KL 4 YPBPR2 56 10uF 25v DVR DVR Jia SDA1 R21 100 SDA14 __ DACBCLK DACBCLK 3 1 CE57 10uF 25v e V 4 DACMCLK 3 CODHPOUTR C12 ____ __ lt lt DACLRC 3 1 59 10uF 25v HPVDD cit C116 pour 4 DOUT 3 100 100 5 lt lt 1 3 10uF 10v C 46 AOSDATA3 3 S amp 10uF 25v BI IB CODHPOUTL gt 10uF 25v Vv x ada 10uF 10v LL MUME 5 R14 10uF 25v CB125 4 33 0 1uF ___ ____ 45 cr 2r2c2u mgo Change 9829222269502 NL VGA IN RCE64 10uF 25v R226 a AVR T VGA IN L CE65 SES 6 HPVDD Ave IN ee 7 8 AIN2L AVDD ADCREFP ADCREFP AV2 IN 7 8 AIN1R ADCREFP ___ 4__
74. 8 PDD O 7 FLASH INTERFACE 5 h AO1MCLK AE MERK 1 AO1LRCK AOTBCK 1 AO1BCK AO1SDATAO 1 AO1SDATAO 1 ASPDIF gt gt APOE AUDIO INTERFACE JTRST JTRST TTDI 8 JTDI JTMS B JTMS JTCK JTCK JRTCK JRTCK JTDO 8 JTDO JTAG PORT e 1 8 UORX i hoe U1RX B U1TX TU 6 OIRI gt gt et 1 8 U2TX U2RX 0275 1 8 U2RX 6 U2CTS lt gt UART 85232 h VOR O 7 b FS gy 1 h voB o 7 b gt gt wee 1 1 8 WVOVSYNGC 2 6 AVDDBGKP eiua 1 8 VOVSYNC 2 6 AVDDYKP LM h vopE MODE 26 AVDDRKP DIGITAL VIDEO OUTPUT AVDD DMPLLO 1 2 6 AVDD_DMPLLO AVDD DMPLET 26 AVDD DMPLL1 AVDD VPLL 216 AVDD VPLL DD APT 2 6 AVDD APLLI NDD APLEO 2 6 AVDD APLLO Td Spe 1 AUD CTRL ALP ETRE APLLCAPO b p 2 C116 C117 C118 0 10 0 1uF 0 1uF C0603 SMD C0603 SMD Add C0603 SMD by Ada Title MT5351 ASIC Size Document Number Rev Custom MT5351RA V2 TwinSon Chan 1 Date Monday September 26 2005 Sheet 5 of 8 1 FS R37 5 560 R0603 SMD
75. 9gzx9 i 09500580220 OOGOOGOQGOOGOOOOGOOGOOGOOGOd4ggOgOOOgOOOOOODDDDDDUSSOZxTorogosoensoLt U EDODOOOOO00000000909000000800000080080090998899988 gt gt gt gt ooooooaoaoao lt lt lt lt lt lt lt 44 aoooooo 2 0 22 02 05 02 0202 2 2 2 62 0 02 02 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 MT5351 4244444494494494494444444444 0 25 uL als lt eo lt ko ex eo r eo o 1 1 elle serez je o 0 t o o lex eo 1 s ex 2 e ex ext ex ex lex lex en x
76. B D i e 1 Introduction 2 Definitions B Definition of MODULE position long 1 Back side of module Exhaust hole COF long2 1 long 2 7 B identification label 1 MODEL PDP42V 63 Model Name 2 Bar Code Code 128 Contains the manufacture No 3 cue o 4 The trade name of LG Electronics 402 242 6000266 51 2 LG Electronica inc Date 200402 Made In Korea amp Manufactured date Year amp Month 4 5 6 The place Origin 0 Model Suffix 1 Introduction B Voltage label Attached on back side of module B Part No label Attached on board BOARD ASS Y PART NO BOARD NAME BOARD CTRL 10 PARTNO 68700680148 LUL NU PO CS BOARD SERIAL NO PCB PART NO serial No label attached on COF SERIAL NO 1 Introduction Terms of defect Add short line on Add open line off Sus short line on Sus open line off 2 Safely precautions Be sure to read this before service When using handling this PDP module Please pay attention to the below warning and cautions 1 Before repairing there must be a preparation for 10 min 2 Do not impress a voltage that higher than represented on the product 3 Since PDP module uses high voltages Be careful a electric shock and after removing power some current remains in drive circuit SO you can touch circuit after 1 min 4 Drive circuits must be pr
77. B76 23 1 44 2 D DOR D DQ21 5 0026 0019 8 0 1uF 0022 0025 RN18 47x4 75x4 0024 7 8 DDQ24 0023 D 0024 RN19 0025 5 DQ25 D DQ20 0026 3 0026 i D_DQ21 4 D1V25 A DQ27 4 V 2 D DON D DQ22 6 0023 8 RN20 47x4 CE24 C34 0028 7 D DQ28 75x4 C41 9029 5 V Vw 6 D 0029 CB79 RN21 20uF 16v 3300pF A DQ30 3 4 D DQ30 D DQ27 D post 0026 4 0 1uF 0025 6 47 4 0024 8 75x4 A DQS0 R33 47 D 0050 RN22 D 0051 R34 47 D 0081 0030 4 wey 5 0029 6 A 0052 R35 47 D DQS2 D 0028 8 DQS3 R36 47 D 0083 75x4 RN23 SDV25 M13L128168 8Mx16 6 NC FOR ENTRY Tem D_CS 6 50 25 50 25 RN24 D BAO 4 A CS Z 8 0 D A RASE 5 3 CASE 75x4 CB87 2 WES 1 D WER 0 1uF 22x4 D DQS2 R37 75 R38 22 SDV25 D 0083 R39 75 R40 22 D GND VIT SD PVIN D CAS amp R42 75 SDV25 DQMO R43 22 D DQMO e __ ___4 EET EDS 7 D 844 75 A 1 R45 22 25 CB91 CB92 CB93 CB94 0 ATuF 16v D DOM R46 75 A CKE R47 22 D 0 1uF 0 1uF CB95 CE26 D 0081 R48 75 A CLK R49 22 220uF 16v 0 tuF D 0080 R50 75 A CLK amp R51 22 D iiia D DOMO R52 75 SDV25 SDV25 C49 3300pF SDV25 CB109 vcc CM1117 2 5V 0 1uF CB104 0 1uF 9 FB VREF VREF DECOU
78. DC bus is specified to support 5V signaling PanelLinlc 2 SiI DS 0049 B D I G I TAL up SiI 169 HDCP PanelLink Receiver Silicon Image Data Sheet HDCP Decryption Engine and XOR Mask The HDCP decryption engine contains all the necessary logic to decrypt an incoming video signal on a pixel by pixel basis The host system microcontroller initiates an authentication sequence with the receiver to initialize the Sil 169 HDCP decryption engine Upon successful completion of the authentication process the SiI 169 is ready to decrypt the incoming video via the XOR mask Encrypted and unencrypted video will be sent at different times Therefore the host HDCP transmitter uses the CTL3 signal to indicate to the Sil 169 receiver whether the incoming video is encrypted or not HDCP Keys EEPROM The 5 169 comes pre programmed with a production set of HDCP keys in its internal EEPROM In this way the keys are provided the highest level of protection as required by the HDCP specification Silicon Image manages all aspects of the key purchasing and programming There is no need for the customer to purchase HDCP keys from the licensing authority For security reasons the keys cannot be read out of the device Samples of the 51 169 are available with the B1 public keys as listed the back of the HDCP specification These are marked with a PUB part number as noted in the Ordering Information section Make sure to request either Public or
79. DVI INPUT Wednesday October 12 2005 Sheet Date LVDS OUT Include PDP and 32 LCD LVDS interface CLK1 3 5VSB SS 0 6 3 6 0 3 4 _ 5 d HSYNG 4 VSYNC 3 J10 gt SS HSYNC 3 R361 R ADIN2 R301 3 SCL SCL 16 SDA 17 sig Yorde p J 12V 6 2 3 14 li 111 ORO3 3 14 ooo aera g 8208011 OROS 3 S20uFIt6v 82050 1_4 3 42 spar seus 12 179 SCL 8205 ____16 E 9 20 8180 8286 4 DISPEN PDWN READYR18 0 95 F1 SCL P R186 100 NC 26 151 BEAD SMD 1206 4 7k SDA P RN 100 NC 27 FB 152 BEAD SMD 1206 L52 BEAD SMD 1206 sou 2 E 2N3904 BEAD SMD 1206 FUSE DIP P10 CEA Change By Wa 04 T C330UF25V D8H14 LVDS 30P P1 25 S 3 3 gt ERE CB119 CB120 220uF 16v 220uF 16v 0 1uF 0 1u WHEN USE LG V6 PDP ADD R185 R286 Must del R193 R194 WHEN USE LG V7 PDP ADD R185 R286 R179 WHEN USE SangsungSD1 PDP ADD R186 R187 R185 R286 WHEN USE Fujitsu 42 PDP ADD R179 R186 R187 R185 R286 R291 R293 REMOVE R178 R290 R292 WHEN NOT USE PDP ADD L49 R178 R290 R292 REMOVE R179 R185 R186 R187 R291 R293 ORO 3 ORO1 3 14 ons 4 7K REPALAC 47K 5VSB DV33A R188 0 SCL1 R182 4 7k R297 R183 0 4 7 SCL 8205 R192
80. DVI R 12 0606 GPIO DVDO GPIO GPIO DVD2 IR VCC 122 TUNER 12V Y GND CB GND CR GND AV2_GND IN AV1_GND 0 lt 2 w CO OO 00 CO gt SIF1 OUT AF1 OUT SCL SDA eoo TUNER 12V 1 3 9 13 ORO2 3 AV 12 12 YPBPR1 12 1_ 12 12 YPBPR2 R 12 L 12 DVI 12 12 1 10 13 14 0606 3 GPIO 3 GPIO 3 10 GPIO DVD2 3 IR 3 11 41 C53 1000uF 16v 0 1uF 1000uF 16v C54 0 1uF 8 18 modify by steve R12 10k GPIQ 5 0 FB4 0 0 NEARLY YPBPR2 CON 7 Y2 GNDB CB2 GNDB CR2 GNDB Y1 GNDB CB1 GNDB CR1 GNDB FB6 0 0 FB10 0 5 FB11 0 FB12 0 EB13 0 4x1 WIHOUSING DI 2 0 2 RCA2 4P DIP TUNER IN TU_12V SIF1 OUT AF1 OUT RCA1X3 RCAS 9P Y YPBPR1 R YPBPR2 R RCA2 DVI L DVI R lt per RCA1X3 RCA2X2 6P DIP Change by MICO AV2 IN AV2 GND 4 1 W HOUSING DIP4 W H P2 0 JP1 CON SVHS SC IN SC GND1 DVD CB GND DVD CB IN DVD Y GND DV D Y DVD CR GND DVD CR IN EMC Ready YPBPRI L YPBPR2 L RCA2X2 6P DIP L 10 1 W HOUSING AV1 amp S VIDEO AUDIO IN C52 100pF
81. EM VREF RDQ25 5 6 MEM DQ25 5 6 35 ADDRA 35 ADDRA RDQ26 4 5026 4 Nes PUN s 20027 5027 CLOSED TO 5351 CLOSED TO DDR RDQ28 7 8 47 4 0028 7 R 8 75 4 16M x 16 DDR TSOP 66 16M x 16 DDR TSOP 66 DDR MEME LINE LENGTH RDQ29 0029 G TSOP_OD65_22D6LX9D7W_66SP TSOP_OD65_22D6LX9D7W_66SP RDQ30 3 4 5030 3 4 RDQ31 0031 DDR 1 DDR 2 RCLKO R1 MEM CLKA 4 ROBOS SMD m CLOSED TO MT5351 CLOSED TO DDR R0603 SMD RCLKO R105 MEM_CLKA PORN R0603 SMD RCLK1 196 MEM CLKB 4 R0603 SMD R107 100 R0603 SMD RCLK1 R108 MEM 1V25 DDR PORN R0603 SMD CLOSED MT5351 CLOSED TO DDR 4 MD DV25 1 25 DDR DV25 LP2996 DDR Termination 8 _ CE24 C168 C169 CB95 C171 C170 C180 C181 C142 C143 C144 C145 0 1uF SOP8 SMD 474 16 0 uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF C0603 SMD CATUF16V D5H5 5 C0603 SMD C0603 SMD C0603 SMD C0603 SMD 0603 5 0 C0603 SMD CE25 1 153 C154 1 155 C156 C157 1 158 C159 1 C172 7 21 220 16 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF C220UF16V D6H11 C0603 SMD C0603 SMD C0603 5MD C0603 SMD C0603 SMD C0603 SMD CO0603 SMD CO0603 SMD DV25 cs cs ce
82. LK1 CLK1 10 DACVDD DACVSSB R26 CLK1 CLK1 10 DACVDDA RAO G 7 P24 10 GND 75 E DACVSSA SDV25 SCL_8205 SCL_8205 10 8 mE DVDD2I DV18A SD 8205 SDA 8205 10 R DVDD18 ae 018 VSYNCO RCS Aor HSYNC SUM E 4 A_RAS R GND DACBCLK DACBCLK 12 bep CASE DACMCLK lt DACMCLK 12 4 DACLRC 12 E een N26 508 lt lt DOUT 12 509 lt lt AOSDATA1 12 DV33A acg 4 009 6 DQ10 7 lt lt AOSDATA3 12 DVDD3I DQ10 A SDV25 4 MUTE 12 DVDD2 2 0911 GND ERU 6 0012 VGASOG VGASOG 8 Q A DQ13 ___ HSYNC VGA 6 GND p14 ECO DQ13 GND DVSS18 DVSS2 VGAVSYNC 6 4 6 2606 0014 R A_DQ15 PWMO EGO5 0015 PWMO 11 AA A 0051 82050231 nag EGO4 0051 GND 8205UP1 2 AVSS18 82059213 lt lt 82050 1 2 9 1 2602 AVDD18 a sw 298205UP1 3 13 2601 2 SW 13 2 5518 L18 0607 12 6 DOMO DQMO PWM1 12 0050 ___0604 lt 9 13 0080 007 DVISCL DV18A 18 EROS DQ SDV25 9 A DVDD18 D
83. Lux at center Typical 3000 1 In a dark room 1 25 White Window pattern at center 6 9 Peak brightness Typical 1000cd m 1 25 White Window 6 10 Color Coordinate Uniformity Contrast Brightness and Color control at normal setting Full white pattern 2 Average of point A B C D and E 0 01 CONTINUATION PAGE Technical Specifications NUMBER 5 or 10 6 11 Color temperature Contrast at center 50 Brightness center 50 Colortemperature set at Natural 0 285 0 02 0 293 0 02 6 12 Cell Defect Specifications Subject to Panel supplier specification as appends T Front Panel Control Button 71 Up Down Button Push the key to changing the channel up or down When selecting the item on OSD menu Volume Up Down Button Push the key to increase the volume up or down When selecting the adjusting item on OSD menu increase or decrease the data bar Menu Button Enter to the OSD menu Input Select Button Push the key to select the input signals source 7 2 Stand by Button Switch main power switch off to enter power Saving modes 7 3 Main Power Switch Turn on or off the unit 8 OSD Function Full on screen display e CONTINUATION PAGE Technical Specifications NUMBER 6 or 10 PAGES 9 Agency Approvals Safety Emissions 10 Reliability 11 1 MTBF 11 Accessories UL60950 FCC class B 20 000 hours Use moving picture signal at 25 C ambien
84. P4210EA NUMBER 9 10 PAGES P Mode Press repeatedly to cycle through the picture mode Normal Standby Vivid Hi Bright User and Dark System Press repeatedly to cycle through the system options AUTO and NTSC3 58 Recall Press to return to previous channel 4 Sleep Press repeatedly until it displays the time in minutes 5 Min 10 Min 15 Min 30 Min 60 Min 90 6 Min 120 Min and OFF that you want the TV to remain on before 9 shutting off To cancel sleep time press SLEEP repeatedly until sleep OFF appears Red Press this button to access the red item or page Blue Press this button to access the blue item or page Green Press this button to access the green item or page Yellow Press this button to access the yellow item or page Note Press on the remote control can turn on TV set from standby mode Insertion of Batteries Turn the remote control upside down press and slide off the battery cover Insert two 1 5V AAA batteries into the compartment take care to observe the and markings indicated inside Replace the cover and slide in reverse until the lock snaps e CONTINUATION PAGE Technical Specifications NUMBER 10 or 10 PacHs PHYSICAL CHARACTERISTICS 14 Power Cord Length 1 8m nominal Type optional 15 Cabinet 15 1 Color Black colour as defined by colour plaque reference number 15 2 Weight Net weight 36 2 kg with stand 34
85. PC amp usnm 8205 Flash Upgrade 7 Fort Paud Lindow Help 205 115200 20 m Et hM Load Bin Backup file backup bin 6 Choose bit rate as 115200 Browse 4 Backup USB Contig p5 23 Usb gt Flash Usb gt Dram Usb gt 1818 Verify Use VG4 amp High Speed USE to UART Bridge Controller ShakeHand Custom Burning Address 0 HEX Custom Burning Enid Direct Control Clear MSG 7 Select the update binary by pressing browse button For exemple the binary file name is XXXX 4210 ATSC IT 000000XX X this update firmware will be sent to your side m ac a 5 lt 1 1 8205 Flash Upgrade fo Port Baud hate Window Help XfFRIFEXf wrs205 coms 115200 20 ms Load Bin d t Upgrade Check Sum C Usb gt Flash C sb MTIBIB akai ATSC 00000039 2 B bin akai PDP42DGEA ATSC 00000053 1 B bin akai 0 42 ATSC 00000059 1 E4 bin ATSC 00000059 1 E bin UseVGA High Speed akai 00000054 4 bin Bndae Controller ShakeHand backup bin Address dbg image 720 bin apdemon image bin j End 800 1000
86. PLING BEAD SMD 0805 lt m 220uF 16v 220uF 16v 220uF 16v 220uF 16v SOT223 SMD 220uF 16v CB114 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF Title Size Doc Number Rev DDR MEMORY amp FLASH V1 2 Date Wednesday October 12 2005 Sheet 5 of 15 IN L VGA INL 12 NVGA INR SSvGA INR 12 P2 HSYNC IN SSHSYNC VGA 3 VGAVSYNG VGAVSYNC 3 RED GND RED GND 8 VGA IN R GRN GND GRN GND 8 BLUGND 8 RED 8 VGA IN L GREEN En 4 PHONEJACK STEREO BLUE BLUE 8 RSRXD RSRXD 1 PHONEJACK DIP RSTXD 2 R60 75K Change by MICO L17 VSYNCH VGAVSYNC BEAD SMD 0603 HSYNC odified by Bin_wang 22 7 05 RED GND L18 HSYNC HSYNC VGA 014 VSYNC BEAD SMD 0603 SOT23 SMD GRN GND D15 SOT23 SMD VGA PLUGPWR VGA PLUGPWR BLU GND VGA PLUGPWR Q RSRXD RED RED GND VCC VGASDA R55 100 VGA SDA GREEN R54 GRN GND DIODE SMD 10k HSYNC BLUE 1N4148 SMD D2 3 BLU GND VSYNC RSTXD D3 DIODE SMD VGA PWR VGA PLUGPWR 1N4148 SMD VGASDA VGASCL R57 100 SCL 24 02 Title Size Doc Number Rev VGA AUDIO IN V1 2 Date Wednesday October 12 2005 Sheet 6 of 15 AV2 GND TV GND AV1 IN AV1 GND SIF1 OUT AF1 OUT SCL SDA TUNER 12V 060 0 6 L AV YPBPR1 2 YPBPR2 R DVI L
87. RL SOP16 SMD 5 CE86 6 DVD L ADD BY MICO T VCC R282 22uF 25v 47k AVIL R350 A R283 AV1 R R351 A AVIR CE87 DVD R 22uF 25v 8 2 5 12 29 2N3904 Q2 Change by MTK IR7314 L48 DVD 5V DVD 5V DVD 5V FB BEAD SMD 1206 5x1 W HOUSING R A PH5 2 5 Title Size Doc Number Rev VIDEO IN amp TUNER IO V1 2 Date Wednesday October 12 2005 Sheet 7 of 15 VGASOG RED BLUE BLUE SC 0 CVBSO CVBS1 CVBS1 CVBS2 CVBS2 gt gt 5 RED gt gt gt gt BLUE gt gt BLUE gt gt CB DCB CR gt gt CR gt gt Y gt lt gt SY gt gt SY gt gt SC gt SC gt gt CVBSO gt CVBSO gt gt CVBS1 gt gt CVBS1 gt gt CVBS2 gt gt CVBS2 gt gt 1 gt gt MPX2 OUTPUT DY Y_GND gt GND CR CND gt gt GND SOY gt soy SY_IN EX MM SY GND1 SC IN IN 2C CNL gt gt GND1 AV2 IN gt gt AV2 IN AV2 GND 2 GND TEND gt ENTUM IN AV1 GND gt gt AV1_GND SIF1 OUT gt gt sIF1_OUT a gt gt AF1_OUT RED gt gt RED GREEN gt gt GREEN BLUE gt BLUE RED GND GND GND BLU GND
88. SERVICE MANUAL Model 4210 oafety Precaution Technical Specifications Block Diagram Circuit Diagram Basic Operations amp Circuit Description Main IC Specifications Product Specification of PDP Module Trouble Shooting Manual of PDP Module opare Part List Exploded View If you forget your V Chip Password ooftware Upgrade This manual is the latest at the time of printing and does not include the modification which may be made after the printing by the constant improvement of product Safety Precaution CAUTION RISK OF ELECTRIC SHOCK CAUTION TO REDUCE THE RISK OF ELECTRIC SHOCK DO NOT REMOVE COVER OR BACK NO USER SERVICEABLE PARTS INSIDE REFER SERVICING TO QUALIFIED SERVICE PERSONNEL ONLY PRECAUTIONS DURING SERVICING In addition to safety other parts and assemblies are specified for conformance with such regulations as those applying to spurious radiation These must also be replaced only with specified replacements Examples RF converters tuner units antenna selection switches RF cables noise blocking capacitors noise blocking filters etc Use specified internal Wiring Note especially 1 Wires covered with PVC tubing 2 Double insulated wires 3 High voltage leads Use specified insulating materials for hazardous live parts Note especially 1 Insulating Tape 2 PVC tubing 3 Spacers insulating barriers 4 Insulating sheets for transistors
89. SMD GND APLLVDD C17 CB20 CE20 4 7 0 1uF 22uF 25v C0603 SMD GND ANALOGVDD C18 CB22 4 TuF 0 1uF 0603 5 C0603 SMD GND VPLLVDD 4 TuF 0 1uF 0603 5 C0603 SMD GND VPLLVDD C21 CB29 4 7 0 1uF 0603 5 C0603 SMD GND VPLLVDD CB34 0 1uF C0603 SMD GND CB19 0 1uF C0603 SMD GND CB21 0 1uF C0603 SMD GND CB23 0 1uF C0603 SMD 5 50 478 AUXTOP TP6 50 478 _ AUXBOTTOM Title Rev Size Doc Number MT8205 DECOUPOMG ANALOG V1 2 Date _ Wednesday October 12 2005 Sheet 4 of 15 F A1 9 DO D1V25 0 00 01 00810 31 3 ARA3 7 AAA 8 DRA3 66 A1 D1 02 RA 0 11 3 D 5915 RN2 4 A2 D2 F D3 ABAD 3 Se EL e e ne D RAO E45 oe 8 5 A DQM 0 1 3 ARAO 1 2 D DQ14 6 o D4 40 05 DQ 0 31 3 D DQ13 4 7 5 05 06 22 4 6 6 8 6 06 07 3 ARM 7 AAA 8 D 012 41 07 30 3 amp VA A amp D DQ11 75x4 10 08 3 3 4 RN4 6 49 09 34 DV33A A_CS 3 1 2 DURA D 5910 DRA4 g 12 10 010 36 A_RAS 3 D 649 6 4 11 011 A_CAS 3 5 22x4 DRAG 4 14 12 012 DV33A WES 3 ARAB 7 8 amp 8 DRA8 DV33A
90. T GND DIGITAL GND From Power board J21 1 m 1 9 v2 1 9 159 v1 19 v2 1 1 9 v4 Title Size Doc Number Rev INDEX V1 2 Date _ Wednesday October 12 2005 Sheet 1 of 15 5 220uF 16v Rag O NC R0805 SMD 03 CM111743 3V L2 IN 6 lt BEAD SMD 0805 4 0 1uF SOT223 SMD R99 R0805 SMD U5 1117 3 3 14 2 IN OUT lt BEAD SMD 0805 SOT223 SMD DV33 Vout DV33 CE6 220uF 16v CB5 0 1uF AV33 CE8 220uF 16v C6 CB7 10uF 10v 0 1uF Power ON alive source 04 CM1117 3 3V i 5VSB a L3 IN 5 OUT 4 lt BEAD SMD 0805 CB3 220uF 18v 0 1uF 220uF 16v CB6 SOT223 SMD 0 1uF DV33A 06 1117 1 8 2 15 2 DV18A IN OUT FB lt BEAD SMD 0805 CEQ CE10 100uF 16v 220uF 16g CB9 0 1uF SOT223 SMD 0 1uF TEST POINT DIP1 0 DV18A gt gt 1 3 Title Size Doc Number Rev LDO V1 2 Date _ Wednesday October 12 2005 Sheet 2 of 15 5VSB U27 LM809 SOT23 SMD DVIODCK DVIDE 8 8 DVIHSYNE Du die 2 lt C hVIVSYNC See lt eo lt amp amp SSDVIVSYNC 9 13 M EU 2 ENIM ENS Erle Se 00810 31 5 o co Xo als 2
91. VDD2 DVISDA 9 006 ERO4 HAA A DOS ACS EROS pas 26 ae A ERO2 DVSS2 AD 6 A_DQ3 ____ _ 1 DVD1 GPIO DVD1 DQ3 Y AD N24 SDV25 GPIO DVD2 GPIO DVD2 OBO7 AD3 EROO DVDD2 DVD GPIO PORTS OBO7 DQ2 0806 AD4 AD26 1 OBO5 AE1 2806 DQ1 080 0805 ORO1 e 9532909890525 242 49 88 5 OROS gt gt 8205 5 RSE aL onan 8205UP1 4 SEES UP 8205UP1 4 4 ddl ol eld d dede 4 dodddaddddddd sd d dl 144 MUR dure iu AO 444414444 444444444429 lt 4 4 a 440 4 lt lt 01 om lt t 41 40 lt 4 lt 41 41 i x i 44444144444 4 4141 i lt lt 4444444144444 44 444 4 414444144444 4 ai 44144 4 4 xl em ol ES cee Io eue 2 5 9lolol loo loo90 lolo o tte er oe oss olojo 4 lt oua amp xS aiEES REQUEST 2 2 lu u u u u u u 5 ju u ju 2 u fo u u SO gt 0 012 2 2 2 a I O
92. Z B D and Y B D make Sustain waveform Sustainer supply a square wave to panel to make a video Sustain IPM 4 Trouble shooting 2 Fast check up Check model No of module all connectors and cables No display Check panel appearance Check PSU output Va Vs 5v 3 Check Y Z b dinput voltage Replace ctrl b d 3 Replace Y Z b d vertical defect Check panel appearance Check Replace X b d Replace ctrl b d Horizontal defect Check FPC 3 Replace Y b d 3 Replace Y sus b d gt Replace ctrl b d Mis discharge on screen Replace Y drv b d gt Replace Y sus b d Replace ctrl b d 4 Trouble shooting Logical judgment What kind of defect No display Please follow the no display trouble shooting Bar defect appeared Line defect Please follow the line defect trouble shooting vertical defect Please follow bar defect trouble shooting Horizontal defect Mis discharge on screen Please follow the mis discharge trouble shooting 4 Trouble shooting e display Check each section with following method if there is problem replace or repair that part If not go to the next section 1 Connector Confirm every Connector PSU Y SUS CTRL Z SUS gt module may not be normal by mis connection which can not send signal and power Also Mis c
93. a ac z Ta ja 02 HWSDA R15 R NC SDA 8205 READ Y S gt gt gt gt gt END TT SS READY 13 o a a 9 ojo 9 SCL 8205 PE A21 9 ADINA ADINA 14 R9 URST 4 1k DV18A DV18A 12 Title DV33A DV18A Size Doc Number Rev C MT5205BGA388 V1 2 Date _ Wednesday October 12 2005 Sheet 3 of 15 DV18A 45 4 7 GND VOCM CB46 GND VICM CB47 1 GND VREFP4 48 4 7 C0603 SMD VREFN4 gt gt DV18A 123 DACVREF 3 DACFS S9DACFS 3 ADCPLLVDD1 ADCPLEVDD1 ADCPLLVDD1 ADCPLLVDD ADCPLLVDD 3 APLLVDD _APUNED 5 ANALOGVDD ANALOG VDD SS ANALOGVDD VPLLVDD VPLLVDD 3 LVDDA 3 ADCVDD 8 DACVDD DACVDD 3 AVCM AVCM 3 VOCM VOCM 3 VICM 3 VREFP4 3 VREFN4 VREFN4 3 ADCVDDO ADCVDDO 3 ADCVDD4 ADCVDD4__ lt Sapcvpb4 PWM2VREF PWM2VREF 3 AUXTOP AUXBOTTOM AUXTOP 3 AUXBOTTOM 3 REXTA 3 CAP 3 XTALI 3 XTALO 3 AVCM C0603 SMD 44 4 7uF GND CB49 4 7uF C0603 SMD m MT8205 ANALOG DECOUPLING amp DIGITAL DECOUPLING FOR DACVDD DACVDD CE12 FB C7 CB10 d CB11 BEAD SMD 0603 CE13 4 7uF 0 1uF 0603 5 C0603 SMD 10uF 25v 0 1uF GND 10uF 25v DACVDD CB12 4 7uF 0 1uF 0603 5 C0603 SMD GND DACVDD CB14 4 7uF 0
94. al of resistor and DMM terminal to a right terminal of IC normal value 0 73 fig 2 terminal DMM terminal DMM terminal DMM terminal 4 Trouble shooting 3 Ctrl B D CTRL B D supplies video signal to COF So if there is a bar defect on screen It may be the ctrl b d problem A flow of address signal Diagram of ctrl b d io TC74AC54 1 In this figure we can easily suppose j what will be appeared on screen when a specific part failed MCM F 1 2 3 4 5 6 7 8 9 0 ICA 96 output 4 Trouble shooting 2 Vertical defect line In case of 1 line open or short check foreign substances in COF connector First blow up foreign substances with your mouth And then if the same line appears replace the panel 1 line open or short This phenomenon is due to COF IC inside short or adherence part of the Film and rear panel electrode problem In this case replace the panel 1 line open 1 electrode open Line open or short with same distance This is of Ctrl b d defect can not be replaced separately So replace the ctrl b d Dae MCM Multi Chip Module ________________ 0 4 Trouble shooting line defect from each parts Case 1 Buffer IC fail 16 line open IC 1 2 gt 192 line 96 96 open IC 3 4 gt 64 line open with fixed interval there is on off
95. an IC Check with same method that presented in Horizontal bar 4 Trouble shooting e How to check IPM ER UP Forward test 1 GND Sus out 2 Sus out Vs ER DN 4 ER COM when each 4 TEST Diode value is over 0 4 gt Reverse test 1 GND Sus out 2 Sus out Vs ER DN 4 ER COM when each 4 nodes TEST Diode value is infinity gt OK Specially the value of ER UP COM DN in the Y Z board should be checked all of them but the terminal of Vs Sus out GND we must aware to know after check one of IPM because it is parallel gt problems check 15V Y Z B D with GND gt Forward value 0 3V Reverse value infinite If no problems CAUTION General 1 Do not place this product in a location that is subject to heavy vibration or unstable surface such as inclined surface The product may fall off or fall over causing injuries 2 When moving the product be sure to turn off the power and disconnect all the cables While moving the product watch your step The product may be dropped or fall leading to injuries of electric shock 3 Do not place this product in a location that is subject to heavy vibration or on an unstable surface such as an inclined surface The product may fall off or fall over causing injuries 4 Before
96. ce transform to any other format or send transmit any part of this documentation without the expressed written permission of Silicon Image Inc Trademark Acknowledgment Silicon Image the Silicon Image logo PanelLink and the PanelLink Digital logo are registered trademarks of Silicon Image Inc TMDS is a trademark of Silicon Image Inc is a registered trademark of the Video Electronics Standards Association All other trademarks are the property of their respective holders Disclaimer This document provides technical information for the user Silicon Image Inc reserves the right to modify the information in this document as necessary The customer should make sure that they have the most recent data sheet version Silicon Image Inc holds no responsibility for any errors that may appear in this document Customers should take appropriate action to ensure their use of the products does not infringe upon any patents Silicon Image Inc respects valid patent rights of third parties and does not infringe upon or assist others to infringe upon such rights Revision History Revision Date Comment A 07 18 2002 Release to Production with complete parametric information B 08 14 2002 Correction to DDC bus voltage level shifting diagram add Pb free part number 2002 Silicon Image Inc PanelLinlc SiI DS 0049 B D I G I TAL 169 HDCP PanelLink Receiver Silicon Image aia neat TABLE OF CONTENTS Functional
97. digital input Support CCIR 656 601 digital input B IV decoder For PIP POP Dual identical TVD on chip Single on MT8203 3D Comb for both path Dual VBI decoders for the application of V Chip Supporting formats Support PAL B G D H M N I Nc PAL NTSC NTSC 4 43 SECAM Automatic Luma Chroma gain control Automatic TV standard detection NTSC PAL Motion Adaptive 3D comb filter Motion Adaptive 3D Noise Reduction decoder for Closed Caption XDS Teletext WSS VPS Macrovision detection Page 2 October 2004 MT8205 DOCUMENT ARE SUBJECT TO CHANGE WITHOUT NOTICE CONFIDENTIAL NO DISCLOSURE MEDIATEK B 2D Graphic OSD processor Two OSD planes For example Teletext and V Chip will occupy one planes Support alpha blending among these two planes and video Support Text Bitmap decoder Support line rectangle gradient fill Support bitblt Support color Key function Support Clip Mask 65535 256 16 4 2 color bitmap format OSD A Automatic vertical scrolling of OSD image Support OSD mirror and upside down B Host Micro controller Turbo 8032 micro controller Built in internal 373 8 bit programmable lower address port 2048 bytes on chip RAM Up to 4M bytes FLASH programming interface Supports 5 3 3 Volt FLASH interface Supports power down mode Supports additional serial interface R control serial input Support RS232 interface Support single inter
98. e Input Current Ven 5V mE Thermal Shutdown Thermal Shutdown Trip Point T Rising Thermal Shutdown Hysteresis 14 Table 2 Operating Specifications Circuit of Figure Vpp 24V 5 Ta 25 C Standby Current 130 lt 5 E lt dM 5 2 NO 91 2 o o mE a THD N 10 4QLoad TO 0 ps o l SS ic Maximum Power Bandwidth 1 1 DynamcRange 0002 Note 1 Exceeding these ratings may damage the device Note 2 The device is not guaranteed to function outside its operating rating lt azar T cles MP7720 1 5 06 17 04 www monolithicpower com 2 7720 20W Class D Mono Single Ended Audio Amplifier Monolithic Power Systems PRELIMINARY INFORMA TION VDD Fn 9 5 to 24V R3 VDD A70uF 35V oN En C5 TOOR FF 1uF 35V C3 5 6nF PGND ai PIN L MP7720 0 1uF C9 R2 NIN BS 1000 D2 6 2V 100KQ 25V AGND L1 10uH M ae M 16V _ Audio Input bs E 1A 30V 50V Metal E R4 82KO ha C1 R1 10 C4 1uF 16V 10pF Figure 3 20W Mono Typical Application Circuit MP7720 Rev 1 5 06 17 04 www monolithicpower com Product Specification of PDP Module 0 Warnings and Cautions WARNING indicates ha
99. ending for Video and two OSD planes Frame rate conversion B Audio Input Output 2 path TV audio in Support AF SIF decode from Tuner 2 channel audio L R digital line in Total support 12 channel digital outputs optional for general stereo 2 1 channel with subwoofer 5 1 channel and headphone out B Audio Features Support BTSC EIAJ A2 NICAM decode Stereo demodulation SAP demodulation Mode selection Main SAP Stereo Equalizer Sub woofer Bass enhancement MTK proprietary 3D surround processing Virtual surround Audio and video lip synchronization Support Reverberation B JPEG Decoder Decode base line progressive JPEG file thru memory card i f SD MS MMC Maximum 1000 files depend on DRAM size FW is not finished yet 10 E will be ready B Video Output 480 576 480 576 720 1080 Up to 1280x1024 m 7 5Hz 1366 768 60 2 Dual channel 6 8 bit LVDS TTL output Support video output mirror and upside down DRAM Usage For features of 8205 2pcs of 8x16 DDR166 is necessary For features of 8203 2 1pcs of 8x16 DDR limited PIP POP features Here is a comparison chart between 2xDDR and 1xDDR Page 4 July 2004 DOCUMENT SUBJECT TO CHANGE WITHOUT NOTICE DDR 1 16Mb 180079 For 10801 input 8203 only support bob mode de interlacing With single DDR we could support very limited PIP POP mode B Flash Usage Flash is used to store FW code fo
100. ervice should not be attempted by anyone unfamiliar with the necessary instructions on this apparatus The following are the necessary instructions to be observed before servicing 1 An isolation transformer should be connected in the power line between the receiver and the AC line when a service is performed on the primary of the converter transformer of the set 2 Comply with all caution and safety related provided on the back of the cabinet inside the cabinet on the chassis or picture tube 3 To avoid a shock hazard always discharge the picture tube s anode to the chassis ground before removing the anode cap 4 Completely discharge the high potential voltage of the picture tube before handling The picture tube is a vacuum and if broken the glass will explode When replacing MAIN PCB in cabinet always be certain that all protective are installed properly such as control knobs adjustment covers or shields barriers isolation resistor networks etc When servicing is required observe the original lead dressing Extra precaution should be given to assure correct lead dressing in the high voltage area Keep wires away from high voltage or high tempera ture components Before returning the set to the customer always perform an AC leakage current check on the exposed metallic parts of the cabinet such as antennas terminals screwheads metal overlay control shafts etc to be sure the set is safe to operate wi
101. etected MT8205 will send ON Control signals to Power Then Power sends 5Vsc 9Vsc 12Vsc 24V and RLY ON Vs ON to PCBs working This time VIF will send signals to display back light OSD on the panel and start to search available signal sources If the audio signals input them will be amplified by Audio AMP and transmitted to Speakers 3 If some abnormal signals are detected for example over volts over current over temperature and under volts the system will be shut down by Power off Main IC Specifications MT8205 Sil169 135128168 MP7720 MTK MEDIATEK MT8205 8203 Specifications are subject to change without notice Applica tion Notes History 004 09 12 Chen for customer design in 1 0 004 09 30 Dragon Chen Add feature list 004 09 30 Runma Chen for PIP POP 444 support 004 10 01 Chen hardware limitation I 2004 10 18 Dragon Chen amp PIP POP hardware limitation II amp video front end component 1 Wen Hsu 004 10 20 Dragon Chen Update functional block 004 10 21 Dragon Chen Correct function block fault to V1 4 2004 11 04 Dragon Chen 1 Delete power spec About power spec please reference another document i 2 Add AC amp DC characteristics 3 Add pin description 4 Add audio out mapping rule 2004 11 05 Dragon Chen Descript more detail for pin power initial state amp remove some description to another document MT8205 product brief
102. face directly supporting SD MS MMC memory Support 2 PWM output Support DDC2Bi DDC2B DDC1 DDCCI Maximum 48 programmable GPIO pins DRAM Controller Supports up to 32M byte SDR DDR DRAM Supports 16 bit DDR or 32 bit SDR DDR bus interface Build in a DRAM interface programmable clock to optimize the DRAM performance Programmable DRAM access cycle and refresh cycle timings Maximum DRAM clock rate is 166MHz Support 3 3 2 5 Volt SDR DDR Interface B Video Processor Color Management Flesh tone and multiple color enhancement For skin sky and grass Gamma anti Gamma correction Color Transient Improvement Saturation hue adjustment Contrast Brightness Sharpness Management Sharpness DLTI DCTI Brightness and contrast adjustment Black level extender White peak level limiter Adaptive Luma Chroma management De interlacing Automatic detect film or video source Page 3 July 2004 MT8205 DOCUMENT ARE SUBJECT TO CHANGE WITHOUT NOTICE CONFIDENTIAL NO DISCLOSURE 3 2 2 2 pull down source detection Advanced Motion adaptive de interlacing Scaling Arbitrary ratio vertical horizontal scaling of video from 1 32X to 32X Advanced linear and non linear Panorama scaling Programmable Zoom viewer Picture in Picture PIP Picture Out Picture POP Display 12 10 10 8 8 6 Dithering processing for LCD display 10bit gamma correction Support Alpha bl
103. fter the power has been turned off Confirm that the voltage has dropped to a safe level before disconnecting or connecting the connector Otherwise this may cause fire electric shock or malfunction 7 Do not pull out or insert power cable from to an outlet with wet hands It may cause electric shock 8 Do not damage or modify the power cable It may cause fire or electric shock 9 If the power cable is damaged or if the connector is loose do not use the product otherwise this can lead to fire or electric shock 10 If the power connector or the connector of the power cable becomes dirty or dusty wipe it with a dry cloth Otherwise this can lead to fire Product Specification of PDP Module 1 Because this product uses a high voltage connecting or disconnecting connectors while power is supplied to the product may cause malfunctioning Never connect or disconnect the connectors while the power is on Immediately after power has been turned off a residual voltage remains in the product Be sure to confirm that the voltage has dropped to a sufficiently low level 2 Watching the display for a long time can tire the eyes Take a break at appropriate intervals 3 PDP s brightness and contrast ratio is lower than that of the CRT The picture is dimmer with surrounding light and better for viewing in dark condition 4 Do not cover or wrap the product with a cloth or other covering while power is supplied to the
104. his update firmware will sent to your side ue SEE c 1895113 8205 Flash Upgrade EMERE Baud Rate Window Help Port 1 5 115200 20 M Load Bin file a Upgrade Check Sum C 056 gt akai Mico IT 00000039 2 Usb dk 32 akai ATSC 00000053 1 B bin SCHOL 4 ATSC 00000059 1 E4 bin 2 PDP4 0BEA ATSC 00000059 1 E bin Use VGA Port High Speed kh akai 00000054 4 HT Bridge Controller ShakeHand ne backup bin j Address 0 dbg 1 _720 bin l apdemon_image bin HAHH _1 bin E PDPAZ BE image logl bin SERT FE Re IFDFAZ BEA image bin A ae Sees T 1 25 3 TF 6 Press Upgrade button and start update process A EtkTool 8205 Flash Upgrade Load Bin CADTVABL 1902 powllospdp Check Sum Backup file backup bin i Compare USB Config H5 232 C Usb MT1818 Usb Dram C MT1888 flashless C Usb Flash Verify UYGA High Speed iw USB ta UART Bridge Controller ShakeHand Custom
105. ma display module with resolution of 852 H X 480 V pixels This is the display device which offers vivid colors with adopting AC plasma technology by LG Electronics Inc FEARURES High peak brightness 1000cd m Typical and high contrast ratio 3000 1 Typical enables user to create high performance PDP SETs APPLICATIONS Public information display Y Video conference systems Y Education and training systems Product Specification of PDP Module ELECTRICAL INTERFACE OF PLASMA DISPLAY The PDP42V 6 requires only 8bits of digital video signals for each RGB color In addition to the video signals six different DC voltages are required to operate the display The PDP42V 6 15 equipped with P CUBE function which analyzes display signals to optimize system control factor for showing the best display performance GENERAL SPECFICATIONS 42 6 42 V 6 Model 852 H X 480 V 1pixel 3 RGB cells 1080 H 10800 V 367 H 1080 V Green Cell basis 920 1 H X 518 4 V 0 5mm 1005 H X 597 V 61 1mm RGB Closed type 256 G 256 B 256 16 7 Mega colors 14 8 Kg 0 5 Kg Net IEA Y Model Name Y Number of Pixels v Pixel Pitch Cell Pitch Y Display Area Y Outline Dimension Y Pixel Type Y Number of Gradations Y Weight Aspect Ratio Y Peak Brightness Contrast Ratio Y Power Consumption Y Life time 111 Kg 5 Kg 5
106. ner Z Sustainer board 1 Receiving the signals from Control and high voltage supply 2 Output scanning waveform for Module 5 Y Drive board Receive signal from Y sustainer output horizontal scanning wave form to the panel 6 X left and right extension board Output addressing signals 7T Tuner Audio Board Amplifying the audio signal to the internal or external speakers of which selected To convert TV RF signal to video and SIF audio signal to Main board 8 ATSC Board Receiver and converter ATSC TV signal to transmit to main board PCB failure analysis CONTROL Abnormal noise on screen b No picture 2 MAIN a Lacking color Bad color scale b No voice c No picture but with signals output OSD and back light d Abnormal noise on screen 3 POWER No picture no power output 4 Z Sustainer a No picture b Color not enough c Flash on screen 5 Y Sustainer Darker picture with signals 6 Tuner Audio a No voice Make sure status Mute Internal External speaker b Noise c No ATV signals 7 2 Sustainer The component working temperature is about 55 C If the temperature rises abnormal this may be a error point 8 ATSC a No ATSC TV signal Basic operation of Plasma Display 1 After turning on power switch power board sends 5Vst by Volt to Main IC MT8205 waiting for ON signals from Key Switch or Remote Receiver 2 When the ON signal from Key Switch or Remote Receiver is d
107. nts bitmaps big tables for VGA Video Gamma n our demo system we can support 2 4 languages within 1MB flash For single country we need around 20KB to store font data For more bitmaps we need more flash space to store them 2Mbytes is recommended to build a general TV model B Outline 388 pin BGA package 3 3 1 8 Dual operating voltages 0 18um UMC process Page 5 MT8205 CONFIDENTIAL NO DISCLOSURE July 2004 182 05 PRELIMINARY SUBJECT CHANGE WITHOUT NOTICE CONFIDENTIAL NO DISCLOSURE BLOCK DIAGRAM CVBS AV Analog Front End m wo mmwo ain ra Customer ADC External YPbPr MLC Switches _ADC EE _ Digital Control Signal GPIO TTL LVDS Page 6 July 2004 Silicon Image PanelLink Technology SII 169 HDCP PanelLink Receiver Data Sheet Document SiI DS 0049 B 169 HDCP PanelLink Receiver EE Data Sheet Silicon Image Silicon Image Inc SiI DS 0049 B August 2002 Application Information To obtain the most updated Application Notes and other useful information for your design contact your local Silicon Image sales office Please also visit the Silicon Image web site at www siliconimage com Copyright Notice This manual is copyrighted by Silicon Image Inc Do not reprodu
108. o 6162 1 C163 1 C164 1 C165 C166 1V25 DDR FOR DDR TERMINATOR 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF Co603 SMD 0603 5 0 Co603 SMD CO603 SMD 0603 9 4 MEM VREF FOR DDR AND 5351 VREF __ CE26 1 CB125 126 173 C174 C175 C176 177 178 21 220 16 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 1V25 DDR C220UF16V D6H11 CO603 SMD _C0603 SMD _C0603 SMD _C0603 SMD _C0603 SMD_C0603 SMD _C0603 SMD 0603 5 0 usi TE BYPASS CAP FOR TERMINATOR FOR DDR 2 1V25_DDR Q0 tuF 0 1uF COG03 SMD CO603 SMD EVERY 2 RESISTOR PUT 1 BYPASS CAP CE28 CE29 220uF 16v 220uF 16v DV25 C220UF16V D6H11 C220UF16V D6H11 C182 C102 C105 C106 C107 C108 C109 C110 C111 C103 0 1uF Q 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF C0603 SMD C0603 SMD C0603 SMD 5 C0603 SMO COG03 SMC CO603 SMD Co603 SMC Co603 SMt 0603 6 D ADD by Ada itle DDR MEMORY Size Document Number Custom MT5351RA V2 TwinSon Chan Date Monday September 26 2005 Sheet 7 of 5 4 3 2 1 017 PDA1 PDDO PDA2 PDD1 PDA3 PDD2 DV33 DV33 ae 5V PDA4 bs PDD3 2 DV33 aoe D3
109. onnection for a long time has a specific b d failed CTRL Y SUS CTRL Z 505 CTRL X B D Signal input LVDS 4 Trouble shooting 2 Exhaust tip Crack Confirm exhausting Tip and find Crack with naked eyes to check vacuum state If there is problem replace the module in case of vacuum breakdown module makes a shaking noise because of inside gas ventilation there may be a small crack which could not see with naked eyes And this noise is different from Capacitor noise NORMAL CRACKED 4 Trouble shooting _ 3 PSU Power Supply Unit 1 Check each unit part of PSU inside with naked eyes capacitor FET a kind of IC resistor 2 Check FUSE and SW1 on Normal 3 Check Output voltage which is converted from AC V to DC V voltage Check 5V Va Vs When PSU Protection occurred Check Short between Y SUS Z SUS if not same 8 E 4 E Multi meter Touch point 5V Va Vs must accord with Module Label 9 Eur PE fee E Vs Voltage ADJ Vs About 180 195 V Va 5V VCC Voltage ADJ B Va About 55 65 V 5V VCOC 5V 5 5V IEEE n EE 4 Ctrl B D 1 Confirm LED D17 flashing 13 lighting 2 If not CHECK OSC X1 output 3 Check CTRL input voltage CONNECTOR P300 4 CHECK 3 3V 5V 15V 5 Check IC 11 3 3V IC3 2 5V
110. ontrast Ratio Dark room 3000 1 Panel module without filter 3 6 Viewing Angle Over 1602 3 7 OSD language English Spaish French 4 Signal 4 1 AV amp Graphic input 4 1 1 TV standard NTSC ATSC 4 1 2 TV Tuning system 181CH for NTSC 2 69CH for ATSC 4 1 3 CATV 125CH for NTSC 4 1 4 Composite signal 4 1 5 Signal S Video 4 1 6 Component signal Y Pr Cr HDTV compatible 4 1 7 Graphic I P Analog D sub 15pin detachable cable Digital DVI 4 1 8 PnP compatibility 1 0 4 1 9 frequency 31 5kHz to 6OkKHZ fy 56 252 to 75Hz 640x480 recommended CONTINUATION PAGE Technical Specifications NUMBER 4 or 10 4 2 Audio input Audio I P L Rx5 1 for DVI 1 for D Sub 2 for YPbPr 1 for S Video AV 4 3 Audio output Audio O P L Rx1 Monitor out L R SPDIF Optical x 1 5 Environment 5 1 Operating environment 5 1 1 Temperature 5 to 33 C 5 1 2 Relative humidity 20 to 85 non condensing 5 2 Storage and Transport 5 2 1 Temperature 20 C to 60 C 4 to 140 F 5 2 2 Relative humidity 5 to 95 6 Panel Characteristics 6 1 Type LG V6 6 2 Size 42 1005mm width x597mm height x61mm depth 1 mm 6 3 Aspect ratio 16 9 6 4 Viewing angle Over 160 6 5 Resolution 852x480 6 6 Weight 14 8kg 0 5 kg Net 6 7 Color 16 77 million colors by combination of 8 bits R G B digital 6 8 Contrast Average 60 1 In a bright room with 150
111. otected from static electricity 5 he PDP module must be Moved by two man 6 Be careful with short circuit of PDP boards when measuring any voltages 2 Before request service 1 Check panel surface and appearance of B D 2 Check the model label Whether it is boards of same model with label 3 Before requesting Service please inform us a detail defect phenomenon and history of module it can be helpful to us for a smooth sevice Ex long 2 1 fail address 1 line open Y b d problem mis discharge e Handle with COF is the most important component in the PDP module Even a little imperfection of COF can make a serious screen problem BEING PUSHED SCRATCHING TEARING BENDING 1 X B D receiving LOGIC signal from CONTROL B D and make ADDRESS PULSE generates Address discharge by ON OFF operation and supplies this waveform to COF data ES 4 i 7 em Y M dae i COF Separating gt Pull COF Lift up lock as shown as shown in narrow in narrow 2 Z sustain SUSTAIN PULSE and ERASE PULSE that generates SUSTAIN discharge in panel by receiving LOGIC signal from CONTROL B D this waveform is supplied to panel through FPC Z composed with IPM FET DIODE electrolytic capacitor E R coil IPM Intelligent Power Module FPC Separating gt E R Energy recovery
112. perational for reception of unencrypted video use the software reset feature located at bit of register OxFF by setting it to 1 SiI DS 0049 B 3 PanelLinlc D I G I TAL ESMT M13S128168A Revision History Revision 0 1 15 Jan 2002 Original Revision 0 2 19 Nov 2002 changed ordering information amp DC AC characteristics 13 128168 5T M138128168A 6T 135128168 6 135128168 7 5AB Revision 0 3 8 Aug 2003 Change IDD6 from 3mA to 5mA Revision 0 4 27 Aug 2003 Change ordering information amp DC AC characteristics Revision 1 0 21 Oct 2003 Modify tWTR from 2tck to 1tck Revision 1 1 10 Nov 2003 Correct some refresh interval that is not revised Correct some CAS Lantency that is not revised Revision 1 2 12 Jan 2004 Correct IDD1 IDD4R and IDD4W test condition Correct tRCD tRP unit Add tCCD spec Add tDAL spec Revision 1 3 12 Mar 2004 Add Cas Latency 2 2 5 Elite Semiconductor Memory Technology Inc Publication Date Mar 2004 Revision 1 3 1 48 ESMT DDR SDRAM 2M x 16 Bit x 4 Banks Double Data Rate SDRAM M13S128168A Features e Standard e Internal pipelined double data rate architecture two data access per clock cycle e Bi directional data strobe 005 e On chip DLL e Differential clock inputs CLK and CLK e DLlLaligns DQ and 005 transition with CLK transition e Quad bank operation e CAS Latency 2 2 55
113. sw 7 218 2 4 i IE LOUT TU ut Hm 11 aue 3 6 E ROUT 455 AGND VPP 10000 25 E SX 2 im zs i Bog us T E it Be odds 852 22 4 unos XR Ra z VIDEO OUT MUTEC 2 1 3 09922 gt 42 lt 22 lt lt 4 O OO zm P i 10 E versio ay 7 sele Es our E Tu cvas 1 20 AF1 OUT CONT Ne m xm m EET GNDS NDS e mi 20 ca d GNDS 2 1 du E 144001 sc BY TU 80 E i 2 ei 14001 Tu cves CONS D IN GNDS 1 1 AW 5 E 100K F mr E 3 con dis 1 ZI fS E 2 xm AUDPR 3 8 4 RB PGND T 5 22 2 2 NIN sw 2 1 Fas K p ROUT 4x1 WIHOUSING RA E pus Y 1 3 AGND ve 3 ES 4 EN ps 5 Ic udio cas 10 TUNER1 SIF1 BPF 1 ae R22 Ra LEE H 10K MBRS130LTR nu al NTSC 4 5MHz PAL 6MHz 2 E 2 m A 5 Da n m TS 9 58240 s a D dm n EXTR JOnF 623 pd POND Y ma E 1 2 se 2
114. t User manual x1 Remote control x1 Stand x1 Power cord x1 Battery x 2 CONTINUATION PAGE Technical Specifications PDP4210EA NUMBER 7 or 10 PAGES 13 Support the Signal Mode VGA DVI mode Horizontal Vertical Dot Clock Resolution Frequency lir ru Frequency KHz MHz 1 6040 3147 7008 2517 __2 640 480 3150 6000 2518 6 800 600 3516 5625 3600 8 800x600 4690 7500 4950 9 800 600 4808 7219 50 00 B HDTV Mode YPbPr Horizontal Vertical Dot Clock Resolution Frequency Frequency Frequency KHz Hz MHz 15 734 59 94 13 50 480p 720x480 31 468 59 94 27 00 6 1080 1920x1080 3375 6000 7425 When the signal received by the Display exceeds the allowed range a warning message Main Not Support shall appear on the screen You can confirm the input signal format from the on screen DVI could not support somePC Graphic cards CONTINUATION PAGE Technical Specifications PDP4210EA NUMBER 8 or 10 Remote Control Standby Press to turn on and off Mute Press to mute the sound 2 Press again to restore sound 0 9 Number Buttons Press 0 9 to select a channel and used to input the password the channel changes after 2 seconds 4 4 EPG Press to display EPG mode Press it again to exit EPG mode Input Press to select the signal 6 source such as TV AV S Video Component
115. tes for a higher voltage wattage etc The replacement parts which have these special safety characteristics are identified by N marks on the schematic diagram and on the parts list Before replacing any of these components read the parts list in this manual carefully The use of substitute replacement parts which do not have the same safety characteristics as specified in the parts list may create shock fire or other hazards 9 Must be sure that the ground wire of the AC inlet is connected with the ground of the apparatus properly MODEL PDP4210EA Technical Specifications 42 Plasma Display DATE FIRST ISSUED RAISED BY CHECKED BY NUMBER OF PAGES REVISIONS ISSUED DATE DESCRIPTION RAISED BY amp DEPARTMENT COMMERCIAL DEPARTMENT PRODUCTION DEPARTMENT Q A DEPARTMENT CUSTOMER SPECIFICATION APPROVED SIGNATURE NOTE Only documents stamped Controlled Document to be used for manufacture of production parts e CONTINUATION PAGE Technical Specifications NUMBER 2 or 10 1 Standard Test Conditions All tests shall be performed under the following conditions unless otherwise specified 1 1 Ambient light 150ux When measuring lg the ambient luminance 0 1Cd m 1 2 Viewing distance 50cm in front of PDP 1 3 Warm up time 30 minutes 1 4 PDP Panel facing no restricted 1 5 Measuring Equipment PC Chroma 2225 signal generator with Chroma digital
116. thout danger of electrical shock Plug the AC line cord directly to the AC outlet do not use a line isolation transformer during this check Use an AC voltmeter having 5K ohms volt sensitivity or more in the following manner Connect a 1 5K ohm 10 watt resistor paralleled a 0 15uF AC type capacitor between good earth ground water pipe conductor and the exposed metallic parts one at a time Measure the AC voltage across the combination of the 1 5K ohm resistor and 0 15 uF capacitor Reverse the AC plug at the AC outlet and repeat the AC voltage measurements for each exposed metallic part The measured voltage must not exceed 0 3V RMS This corresponds to 0 5mA AC Any value exceeding this limit constitutes a potential shock hazard and must be corrected immediately The resistance measurement should be done between accessible exposed metal parts and power cord plug prongs with the power switch ON The resistance should be more than 6M ohms AC VOLTMETER Good earth ground such as the water pipe conductor etc Place this probe on each exposed 1500 ohms metallic part AC Leakage Current Check PRODUCT SAFETY NOTICE Many electrical and mechanical parts in this apparatus have special safety related characteristics These characteristics are offer passed unnoticed by visual spection and the protection afforded by them cannot necessarily be obtained by using replacement components ra
117. timedia computers Home stereo 40 Ww Figure 2 vs Power 24V 1KHz www monolithicpower com 1 7720 20W Class D Mono Single Ended Audio Amplifier Monolithic Power Systems PRELIMINARY INFORMATION Absolute Maximum Ratings Note 1 Recommended Operating Conditions Note 2 Supply Voltage Vpp 26V Supply Voltage Vpp 9 5V to 24V BS Voltage Vsw 0 3V to Vswt6 5V Operating Temperature 40 to 85 Enable Voltage 0 3V to 6 Vsw 1V to Package Thermal Characteristics AGND to PGND 0 3V to 0 3V Thermal Resistance SOIC8 105 C W Junction Temperature 150 C Thermal Resistance SOIC8 50 C W Lead Temperature 260 C Thermal Resistance PDIP8 95 C W Storage Temperature 65 C to 150 C Thermal Resistance O c PDIP8 55 C W Table 1 Electrical Characteristics Vpp 24V Ven 5V Ta 25 C Supply Current Supply Current Standby Current pA Quiescent Current 30 mA Output Drivers SW On Resistance Sourcing and Sinking 1018 __ Q Short Circuit Current Sourcing and Sinking 1501 A PIN NIN Input Common Mode Voltage Range MEE NEN PIN NIN Input Current 12 EN Enable Threshold Voltage Ven Falling EN Enabl
118. wait indicator light 15 off Turn on power and TV can work Checking It 15 needed to check the version of the firmware for MT5351AG which has been download into the Plasma TV Press Menu button of the remote control and the main OSD menu is appeared on the screen Use the remote control and select the mode of the adjustment Use the remote control and select the mode of DTV Entry the mode of DTV Input 0000 zero zero zero zero of the remote control while the Plsama TV 15 under the above condition Then enter the mode of factory after input the digits It is easy to be found the version of the current firmware for MT5351AG is XXX X_PDP4210EA_ATSC_IT_000000XX_X_P under the mode of factory RS232 VGA download line PC PDP 2 11 RXD 5 5 GND D Sub 9 RS232 D Sub 15A VGA
119. width of 5V 40mil J17 GND Need Very Strong TXD 0 MT5351 Transmit D 0 MT5351 Receiver 5 D 2 53518 MT8205 Communication XD 2 MT5351 amp MT8205 Communication DIP8 W H P2 54 ZU EU 741 244 030 18 120 121 122 123 9 DVIHSYNC DVIVSYNC DVIODCK 8 50 WHEN 0604 HIGH DVI OUPUT WHEN 4 LOW ATSC OUPUT ADD 22 9 Title Size Doc Number om ATSC INTERFACE Date Wednesday October 12 2005 Rev V1 2 Sheet 13 of 15 12 ORO3 PWMO ADIN4 PWMO ADIN4 ADIN4 CE80 220uF 16v C220UF16V D6H11 12V CN2 DIP7 P2 0 220uF 16v C220UF16V D6H11 DEL ACD Net MTK pU DV33A SV SB 284 R257 4 7k NC 1k RELAY ON 2N3904 Q12 DV33A SYSB R294 4 7k NC R260 1k VS ON Q13 2N3904 Title Doc Number A Wednesday October 12 2005 14 of 15 Date DV33A R354 10K R259 Q15 2N3904 USE WHEN LG V6 DV33A R35 10K R262 Q16 2N3904 USE WHEN LG V6 PDP interface R288 10k NC ORO3 2 R289 10k NC Rev V1 2 From 0 1 To V1 2 change item 1 Add R109 10K R107 4 7K C135 56pF 0603 R88 R91 R104 R106 OKK YE 0805 R96 RII R101 OKK4E 2 Reset IC 9 5 Supply DVI AUDIO ADD CONNECTOR 8 3 ADIN4 CHANGE TO PWMO Size Number Rev A History V1 2 Date Wednesda
120. y October 12 2005 Sheet 15 of 15 BE 1 TUNER1 IN 2 5 1 TUNER1 ADDRESS Rm 424 m TUNER V i 2 z lt AW wok 5 c2 86 a FQ1236 NTSCTV cu E XR Tis a 100NF e m a ut Es 1 1 8 AV TUNER I O 1 H 1 qp 2 2 5 14 2 NIN
121. zards that may lead to death or injury if ignored Y CAUTION indicates hazards that may lead to injury or damage to property if ignored N WARNING 1 This product uses a high voltage 450 V max Do not touch the circuitry of this product with your hands when power is supplied to the product or immediately after turning off the power Be sure to confirm that the voltage is dropped to a sufficiently low level 2 Do not supply a voltage higher than that specified to this product This may damage the product and may cause a fire 3 Do not use this product in locations where the humidity is extremely high where it may be splashed with water or where flammable materials surround it Do not install or use the product in a location that does no satisfy the specified environmental conditions This may damage the product and may cause a fire 4 If a foreign substance such as water metal or liquid gets inside the product immediately turn off the power Continuing to use the products it may cause fire or electric shock 5 If the product emits smoke an abnormal smell or makes an abnormal sound immediately turn off the power If noting is displayed or if the display goes out during use immediately turn off the power Continuing to use the product as it is may cause fire or electric shock 6 Do not disconnect or connect the connector while power to the product is on It takes some time for the voltage to drop to a sufficiently low level a

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