MS91501BD FPGA ボード取扱説明書
Contents
1. SW FPGA SW _ xQ 0o S o MS91501BDA m x Y E24 _ c SW2 Y smi LED 5 i Nc ESI N 2 12V M9 c U3 P y 3 m T 15 Ve LED 4 1 IO z E n o 1 2 SW ROM 3 1 1 501804 eaan ft a Iw Io ti m 20 fu S R18 9 8 ALIOS B 3 1 2 Mega Sys Co Ltd 3 2 3 8V 2 5V 1 O 2 5V 2 5V TO 2 5V FPGA 1 2V FPGA 3 To IW2. 3 5 Mega Sys Co Ltd 35 FPGA 1 CN3 6PIN 2 CN4 2PIN 2 PIN CN3 6PIN PIN 1 2 3 4 5 6 SCK SI SO SS_B GND VCC CN4 2PIN PIN 1 2 CRESET B CDONE 2 FPGA SW1 2 2 2 1 3 4 3
3. 2 2 1 Mega Sys Co Ltd 2 1 1 A e O MS91501BDA SW2 SW1 S z U4 S C U6 9s 4 N 40mm U3 p 3 1 P U2 Q Y am 60mm p 2 1 1 Mega Sys Co Ltd 2 22 2 2 1 2 2 1 FPGA iCE40LPA4KCMS81 IO 56 CN1 28 CN2 28 M25P20 Micron serial ROM ROM DC3 3VDC2 5V 2 5VIO FPGA 1 27MH z 2 32 768kHz LED 1 ON LED1 LED 2
4. bin OK iCE40 iCE40LP4K Device Properties CRAM Programming 13 Mega Sys Co Ltd 6 Design Program FPGA CRAM amond Programm File Edit View Desi TS eeu ls e a EL Device Family lattice iCE40 File Name iOE40LFAK Prog Fast k fpea Implmnt sbt outputs bitmap clock top bitmapbin 09 Detect Cable Cable HusBN 2a v Port E USB 0 zi customport HBG PVO Settings Use default I O settings C Use custom I O settings T INIT pin connected T DONE pin connected T TRST pm connected Set TRST hieh Set TRST low Cable and VO Settings T PROGRAMN pin connected ispEN pin connected G Set ispEN high Set ispEN low 1l j 2j Output Lattice VM Drivers detected HW DLN 3O ParalleD HW USBN 2A erammer device database loaded save save 2
5. 8 5 1 2 2 1 JP1 JP2 CN3 CN4 SCK SI SO SS B CDONE CRESET B FPGA CRAM GND OFF TCK TDO TDI ispEN INITN TRST 2 3 SPI open ON TCK TDI TDO ispEN INITN TRST 1 2 FPGA NVCM GND OFF TCK TDO TDI ispEN INITN TRST 2 3 SPI open ON TCR TDI TDO GspEN INITN TRST 1 2 UA Ea FPGA NVCM VCC OFF TCK TDO TDD GspEN NITN TRST 1 2 CN3 GND VCC GND VCC SPI FPGA NVCM VCC GND OPEN OK 10 Mega Sys Co Ltd SPI FPGA NVCM
6. 21 Mega Sys Co Ltd O 2015 Mega Sys Co Ltd T 4071 0014 uA RAE TEE R3 16 37 TEL 0551 23 0576 FAX 0551 23 0576 URL http www megasys co jp 22
7. SW 1 FPGA 2 FPGA NVCM 3 FPGA ROM ROM ROM FPGA 3 SW1 JP1 SW2 JP2
8. CNS3 CN4 OPEN OK TF EROJ v akt oy OPEN FPGA NVCM NVCM NVCM 11 Mega Sys Co Ltd 4 FPGA 3 5 1 4 1 FPGA CRAM 1 Lattice Semiconductor Diamond Programmer 2 Diamond Programmer 3 Create a new blank project OK Lattice VM Drivers detected HW DLN 3C ParalleD HW USBN 24 Programmer device database loaded 12 Mega Sys Co Ltd 4 Device Family ice40 Device LP4K la Lattice VM Drivers detected HW DLN 3C Parallel HW USBN 2A Programmer device database loaded 5 Operation CRAM Programing
9. DIO 3 2 5V TO R10 R11 0Q 3 TO R10 R11 3 8V 2 5V RKI 3 3V 3 3 27MHz 32 768kHz 2 82 768kHz R26 FPGA R26 FPGA 32 768kHz JO Qc Mega Sys Co Ltd 34
10. 1t T 4 5 FPGA NVCM SW JP1 JP2 3 5 1 FPGA NVCM SW1 ON OFF SPI FPGA NVCM Programmer Pan 18 Mega Sys Co Ltd 5 5 1 19 Mega Sys Co Ltd 5 2 SENSEVDD GND MR RESET CT RESET B aav o E 47k oU CN2 2 PH 2X40SG EDA T 33v pup CRESET B TRST pen CDONE INITN A3 M spLvccG3V E mont i E Lu 1ok SIoE on VP E emo Ag B4 85 2 R24 w Sck TcK L3 SL TI n amp UO ICE40LPAK CMBI SO TDO En SAT AT IOT 224 E6 CDONE SLEPEG E n AL A2 10T 221 HB CRESET B Sud A3 IOT 217 U2 M25P20 VMN6 voc os KC2m20ME CINE A4IOT 208 FT OB 108 SS Sor spo D5 INHN VCC C5 m5 AG IOT 185 G6 10B 105 500 sok D5 AIOT 177 67 108 107 SCK MEM otu 0 ABMIOT 174 H7 08 106 501
11. FPGA ROM iCE40 3 FPGA ROM SPI FPGA FPGA NVCM FPGA NVCM 3
12. 3 Open an existing programmer project 5 6 LUE 14 Mega Sys Co Ltd 4 2 SPI 1 4 4 1 5 Operation SPI Flash Programing bin SPI Flash Micrn SPI M25P20 8 pin SOIC OK f iCE40 iCE40LP4K Device Properties Device Operation Access mode ISPI Flash Programming Operation sPr Flash Erase Program Verify Programming Options Programming file V clock fpea Implmnt sbt outputs bitmap clock top bitmapbin y li T Device Options 1 2 Reinitialize part on program error SPI Flash Options Family ISPI Serial Flash x Vendor Micron v Device s PI M25P20 X Package 8 pin SOIC X SPI Programming Data file size Bytes 1351 78 Load from File Start address Hex 0xo0000000 v End address Hex 0x00030000 Md Erase SPI part on programming error Secure SPI flash golden pattern sectors C
13. F6 GND F9 GND 25V M sl n i our T T F T CN1 CN4 zx x JP12 C12 13 14 15 C16 17 18 19 SW1 2 0 1uF 01uF LED1 2 C1 C24 R1 R28 MS91501BDA 2015 09 14 megasys BUR AURR 20 Mega Sys Co Ltd 5 3 MS91501BD NO UO FPGA 1 iCE40LP4K CM81 Lattice Semiconductor U1 Voltage regulator 1 MCP1700T 1202E TT SOT23 Micro Chip etc U2 Serial Flash 1 M25P20 VMN6 SO8 Micron etc KC2520B C1XE or KC2520C U3 OSC 1 Kyocera etc C2XE Texas Insturuments U4 Reset 1 TPS3808G01DBV SOT23 etc Voltage regulator Texas Insturuments U5 1 TLV117112DCY SOT223 2 etc U6 OSC2 1 SG 3030CM EPSON etc SW1 2 Tact Switch 2 B3U 1000P Omron etc ON Semiconductor D1 Diode 1 MBR0520L SOD 123 etc LED1 2 LED 2 LHQ974 1608size etc Chip type LED JP1 Jumper SW 3 2 54mm pitch 3PINx1 Harwin etc JP2 Jumper SW 2 2 54mm pitch 2PINx1 Harwin etc CN1 2 Connector 2 2x20 40PIN 2 54mm pitch CN3 Connector 6 2 54mm pitch 6PINx1 Harwin etc CN4 Connector 2 2 54mm pitch 2PINx1 Harwin etc 6 FPGA FPGA
14. CSN p GND ouT A HLDN B310T 218 Gaios sivoas G4 G4 B410T 211 G5OB 103 CBSELO vec BS OT 188 Hi IOB 54 B6 OT 183 HA IOB 82 GBINA 2 33v E BoT e0 HeIOBJO4GBSEL E ON JIMIOB 55 E sc 3030 cu 1 4 101 198 G8INO e 08 56 PH 2X40SG 1 4 c24 C5 IOT 197 GBIN1 anoe 57 D5 IOT 212 J4 108 70 ou E5 IOT 214 2 5 GND our ANY ASIA R26 B9 OR 120 B1 0L 3A BBL p 0 C9VIOR 148 B2 0L 28 Dv AoR 115 iors D79R 11 C2AOL2A D amp MOR 4I GBNZ 03 0L78 D99R 119 pioioA EAR 118 D240L7A EROR 140 GBIN3 D3 10L 38 G5N7 FaAIOR13 E1701 108 GAOR 14 E2 I0L 19A MCP1700 1202E TT RI horni I ganot ias 3 2 0 12v J8 IOR 109 FIMIOL 22A SOR io FAOL 28 TM T aioe qe TA ns AS vccIOO GV OL 24A li C6 VCCIO1 H3 VCCIO3 U5 5 J5 VCCIO2 TLV117112DCY R2 Soo gea x H8 VOC SPI 3 ORRE 12V qe IN ou ww AA G2 VCO PLL IOL26A VN H2 GND PLL IOL26B 1 GND T C23 CT VPP FAST 2 1uF C8 VPP 2V5 J7 VCC PLL0 IOB41 J6 GND PLLO IOB36 GBINA p4Voo E9 VCG P2 VoG FA GND F5 GND
15. Mega Sys Co Ltd MS91501BD FPGA Ver 1 00 2015 09 28 27 09 28H Megasys Mega Sys Co Ltd 1 1 2 1 2 2 3 1 3 2 3 3 3 4 3 5 4 1 4 2 4 3 4 4 4 5 5 1 5 2 5 3 1 Mega Sys Co Ltd 4 01 MT E 4 IE MEE o deer Descendente Au 5 ESOS DIE La AP RPARENQUUDARE BURNER AIA DUC INANE DEDI DERBI IIR UR 5 dix E CP A EE 6 gm BH Cio scent aae A hant 7 LH UNCERT 7 nj TRUM 8 zo 8 Bc ecu wee quu ec sus SW ott 9 RARA MM bes a p 10 FPGA 3172447 USAS esiste tsestsssstttesesesssottttttettsssttttttt 12 EPGAMNH CRAM aS ZAI pesto SS EE ones eit Deed 12 xiu NUASDU E CR I LE EE 15 EPOATISUONVOM RAA TA Roana uenanRaRCAS esas tb AD xu 17 SPI ANAN 18 FPGA NVCM NKK 18 19 TETAI P ENSURE NOE ERNEUT URN OCC ON 19 STIEN EE E E E E E 20 EDERA E A N O A NA 21 iii Mega Sys Co Ltd 1 MS91501BD FPGA 1 1 Lattice Semiconductor iCE40 LP4K FPGA
16. NG LED2 1 SW1 2 SW2 TPS3808GO1DBV IO 2 54mm 40PIN X2 CN1 CN2 2 54mm 6PIN CN3 1 2 54mm 2PIN CN4 2 2 54mm 3PIN JP1 2 54mm 2PIN JP2 6 1 0t 40x 60mm 9g CN1 CN2 1 2 2 2X20PIN 2 ffi 3 2X20PIN 2 Mega Sys Co Ltd 3 3 1 3 1 1 3 1 2
17. ancel 15 Mega Sys Co Ltd 6 Design Program D SPI Fan z P x d FPGA o File Edit View Design Help Jexes ei l2 19 G3 e n 18 1 Enable Status Device Vendor Device Family Device Operation File Name Fi Oeble Settines Micron iCE40 ICE40LP4K SPI Flash Erase Progr Er ss impImnt sbt outputs bitmap clock top bitmapbin 09 Detect Cable HW USEN 2A z 3 EzUSB 0 Custom port HEX VO Settings Use default I O settings C Use custom I O settings A T INITN pin connected T DONE pin connected T TRST pim connected Set TRST hieh Set TRST low Cable and IO Settings T FROGRAMN pin connected T ispEN pin connected Set fspEN high Set ispEN low Debug Mode Lattice VM Drivers detected HW DLN 3C ParalleD HW USBN 24 Programmer device database loaded PA Ready 16 Mega Sys Co Ltd 4 3 FPGA NVCM 1 4 4 1 4 2 5 Operation NVCM ProgramingMode nv
18. cm bin nvem iCE40 iCE40LP4K Device Properties NVOM Programming Mode NVCM Program Verify Secure x flock fpea Implmnt sbt outputs bitmap clock top bitmapnvem A 6 Design Program FPGA NVCM FPGA HW USBN 2A z Lattice VM Drivers detected HW DLN 3C Parallel HW USBN 2A Programmer device database loaded 17 Mega Sys Co Ltd 4 4 SPI SW JP1 JP2 3 5 1 SPI SW1 ON OFF SPI SPI Trogrammer
Download Pdf Manuals
Related Search