STD 7000 7503/7506 Optoisolated Input Card USER'S MANUAL
Contents
1. The 1 0 Address Mapping and Jumper Selection Table for one address per card shows where to place jumper straps to obtain any port address in the hexa decimal range 00 FF Using the lower of the 2 digit hexadecimal addresses desired find the most significant hexadecimal address digit along the vertical axis and the least significant hex digit on the horizontal axis For example port address 40 is obtained by connecting jumpers at X2 YO and ZO The pad matrices adjacent to U3 Uh and U5 are on 0 10 inch 0 25cm centers The jumper wires may be conveniently replaced by wirewrap post if frequent address selection changes are anticipated CARO SELECT sz O Address Decoder And Schematic For 1 Address Per ie JUMPER senmicant gt L aboness 01 2 23 24 25 26 27 20 2 22 23 2 5 IS 22 lt Cw 8 I O Address Mapping And Jumper Selection Table For 1 Address Per 7503 AND 7506 ENVIRONMENTAL SPECIFICATIONS RECOMMENDED OPERATING LIMITS ABSOLUTE NON OPERATING LIMITS units Free Air Temperature 25 75 D Non condensing relative humidity ELECTRICAL SPECIFICATIONS FOR THE 7503 7503 Optoisolated input Card Electric2. 15 25v 5V C15 anal onen OPTOISOLATOR CIRCUIT 5 R25 4 oe se SOV 470 RI R CR9 2 q 3 IOK 6 4 q 16 58 ae _ 2 4 25 1727 Y 2654 V OPTOISOLATOR CIRCUIT amp A R25 3 Lu tach EN 470 6 F 21 LD 464 105 7415244 2 2K 1 o Jea oonan UZW 5 OPTOISOLAYOR arcata oC kT 4 0 R25 2 epe epe 470 2 9 4 LD 464 2 57K RI RB O rd 7415244 22K 33K ARS ven 9 mDA920A 7 8 ue Gar 12 22 OPTOISOLATOR CIRCUIT 3 Ob 2 tov R26 2 EV 4 5 CRS y 1 OK CRIO I 9748 10 464 8 2 103 RIS R20 3 6NI39 PER lt 7415244 OPTOISOLATOR CIRCUIT 2 CRIO 2 LD 464 R22 3 29 338 BR vew mDA920A 7 5V 45y OPTOISOLATOR CIRCUIT 1 Ge ER eee N R26 4 50V 470n R7 CR7 CRIO 3 14148 EU podes tQ LD 464 6 191 823 _ 824 3 31012120 2 BRB ENI39 2258 A a T 19 7415244 yzw 5 o mDA920A 7 5 525 4 5V Cel 15 OPTOISOLATOR CIRCUIT O Dur 159 R26 5 50 470 CRB CRIO 4 677 5 i IOK 469 10 424 bio 6 542 1 SPARE 16N139 _______
3. 9 1 4 1561155 j uxv Designates Active Low Level Logic a 7503 7506 Edge Connector Pin List MECHANICAL O Refer to the Component Placement Diagram for component placement information The 7503 7506 meets all STD BUS general mechanical specifications The 7503 7506 requires clearances of 0 150 on the circuit side and 0 600 the component side of the printed circuit board when placed a Series 7000 card rack Clear plastic shields are provided on both sides of the assembly for protection From high voltage Both adjacent slots must be vacant for clearance of the shields and the input connector The user can connect the 7503 7506 by using a PC board edge connector with solder tail connections The recommended card edge connector is supplied with assembly 6518 Also included a protective hood all hard ware and keys The keys must be installed the position shown in the component placement diagram _ 7503 AND 7506 OPERATING SUBROUTINE MODULE This section provides a flow diagram and subroutine to operate your 7503 7506 card It may be used intact or used as a model to construct subroutines for a specific application The subroutine 15 written 8080 family assembly code and will execute on 8080 8085 and Z80 processors The memory addresses selected are compatible with Pro Log s 7801 8085A and 7803 280 processor cards The 7503 7506 port
4. n O ds Ko N EIA L1 o 5 7415244 AS 5 16139 d se opwsoaroraruts gt R2S 2 470 1 Der a oras 87 CONNEC TOR 9 7K 22 ex 100 220 BRE 2 ne 1 9 mDAS2DA 7 Y Y LS A4 21 d OPTOISOLATOR CIRCUIT 3 Dr npe 6 RS 23 Wo EN RS f 3 fox t VOR A CID le 1038 E 100K E BAG 5 urn url 2 7 5V 5V q leae 5 32 196 OPTOISOLATOR CIRCUIT 3 CRI0 2 10 464 e 3 6 024 A 27 gt A Ret R22 2 7415244 CD qu le p 2 wee 9 04 17 25 45 T 23 o OPTOISOLATOR CIRCUIT 1 ron 2 pan R26 4 50 578 pen ea ag MEC 50 4 eco Gi a OR t eros 5 En Bo 9 tore G R23 R24 3 431 1 f 416244 5 133 _____ 1 0 r SPARES 24 15 1257 1 zes 2 5 OPTOISOLATOR CIRCUIT O R26 5 45V 5v 5 470 4 45v C1 3 10 13 8 n nd POF ane Gnd sov T 507 D o SPARE TALS244 GND Em 9 1 8 6 4 3 1074 1005 Revisions CI 15 REVISEDFER FON 9262133 45 REF
5. 799 ITEM DESCRIPTION REF DESIGNATION A PRO LOG CORPORATION 2 LOCKTITE TO SCREWS AS RLY 7500 INDICATES PIN NO OF SOCKETS TYP SCHEMATIC 105298 E 2 2 FOR ASSY PROCEDURES SEE 5004 PARTS LIST 105300 PAPE ___ 280 VAC 1L0 NOTES UNLESS OTHERWISE SPECIFIED Z 299 101105759 PRO LOG 012725 nm 8 7 6 5 4 3 2 1 2 44 4247 4 2 2 licia nn s mama USER S MANUAL PRO LOG CORPORATION 2411 Garden Road Monterey California 93940 Telephone 408 372 4593 TWX 910 360 7082 106678A 300 9 81
6. of the decoder circuit select signal SZ is active only when the card is addressed to read This signal is used to enable the input port U2 CHANGING THE PORT ADDRESS OF THE 7503 AND 7506 Refer to the assembly diagrams documents 105120 7503 or 105299 7506 Locate decoders U3 U4 and 05 74 542 adjacent to the STD BUS edge connector Each decoder device has a dual row of pads of which form decoder output select matrices Make one and only one connection to each of the matrices adjacent to U3 U4 and US The decoder jumper pad numbering figure shows the numbering of the pads adjacent to the decoder chips on the 7503 and 7506 Also shown are the jumpers at X2 YO and 20 which produce the hexadecimal port address 40 the selection made when the card is shipped The 1 0 address mapping and jumper selection table for one address per card shows where to place jumper straps to obtain any port address in the decimal range 00 FF Using the lower of the 2 digit hexadecimal addresses desired find the most significant hexadecimal address digit along the vertical axis and the least significant hex digit on the horizontal axis For example port address 40 is obtained by connecting jumpers at X2 YO and ZO m o 24 n r Dre N ae 15 SERENA AER 22 2223222232
7. 5 comme A 22 47ON NETWORK 21 OK eF aw 5 _________ Di o coss es c pe 17 7 1 4 REQD of oc AA A 65 AG 8 REQD aj o CR9 0 u Our cov 2750 2 o ooon iO iur sov ja 7 REF DESIGNATIONS ARE FOR LOCATING PURPOSES ONLY AND MAY NOT APPEAR ON ACTUAL PART he eae eee 3 LA IDENTIFY WITH ASSY REV LETTER USING RUBBER STAMP 7 Tour 507 __ JA INDICATES CATHODE PIN OF LED MAPPED TO PORT 40 JA APPLY LOCKTITE TO SCREWS TEM DESCRIPTION REF DESIGNATION A gt RO LOG CORPORATION ASSEMELY 7523 INPUT AX DENOTES PIN 1 END OF 105 SCHEMATIC 105119 ET CAED 4 5 80 VAC vC BOARD TO CONFORM WITH ASSEMBLY STANDARD 51004 PARTS LIST 10521 NOTES UNLESS OTHERWISE SPECIFIED c D e T ET 1 8 7 6 5 4 3 2 8 6 5 4 3 n9 RIO SIGN CrP UTS ec eni vzw von 9204 7 5v 4 5y OPTOISOLATOR CIRCUIT 7 i rales EP 1 Uk qon 1074 42 168139 _____ T fr 741544 9 UNO j 45V OPTOSOLATOR CIRCUIT b Ote CARD SELECT DECODERS 6 ue 1 55 2785 o gt GR e eem t 000001 403 o ven sew 2 x5 I rd 5 x OPTOISOLATOR CIRCUIT 5 ru
8. CORPORATION PRO LOG STD 7000 7503 7506 Optoisolated Input Card USER S MANUAL o 7503 7506 Optoisolated Input Card USER S MANUAL 7501SOLATED INPUT CARD USER S MANUAL SE SE SE SE SE SE SE TABLE OF Product Overview 7503 Data Sheet 7506 Data Sheet CS18 Data Sheet C818 Data Sheet Functional Description General Purpose Insterface Mapping and Address Decoder Operation Changing the 7503 7506 Port Address 7503 7506 Environmental Specifications Electrical Specifications Mechanical 7503 7506 Operating Subroutine Modules Maintenance OOO 7503 STO 5US OPTOISOLATED INPUT CARD O 4 5 80VAC VDC The 7503 provides eight independent AC DC inputs for the Series 7000 STD BUS An optical coupling circuit isolates each circuit from the STD BUS system and from each other The 7503 offers a choice of two input ranges Range selection is independent for each input and is selected through the installation of wire jumpers The low range responds to input voltages between 4 5 VRMS and 22 VRMS for 5V 6V and 12V applications The high range responds to input voltages of between 20 VRMS and 80 VRMS and is useful for systems using 24V 28V and 48V An LED provides a visual indication of the state of each input FEATURES e 500V Minimum Isolation Between inputs and Between Each Input and System Ground e Independent Rang
9. ERENCE ONL IN SAYSELECTS OF 6 BLOCKS 32 PORTS PER BLOCK SYKSELECTS OF 4 BLOCKS FONTS PER BLOCK SZESELECTS 1 OF 8 PORT ADDRESSES NOTES UNLESS OTHERWISE SPECIFIED ASSEMBLY 10 lt 29 9 PARTS LIST 105 300 PRO LOG CORPORATION E MATIC cT GENE TR UEM 00078 23 23 8 7 6 5 4 3 2 PSION ny PCR 630 eas P0 DETAIL 6 REF 37 READ 34 BREAD 5 48 SEE DETAIL B DETAIL A oeg po I o creo o 7 0 Fo OFF pq oj 13 OA 2 0 9 2 2 EK 00090000 21 3 REGD 100600000 vmm 2 sx O CRABI O RE 2 o of ASSY 10529977 r E 23 2 5 O O o o DANGER B borg 90130 HIGH 2222 6 NO VOLTAGE ie O Di 4 822 E A 3 PLACES 4 SEE DETAIL A o ER MIO k A 2 2 2 OKCE vaw 5408 pj x E KI E A 55 15 14448 CRL Se So 3 4 Do tr 45 en m A KERN BREQ Our 25V 2 5 9 4 12 10 ur 5 EN N IDENTIFY WITH ASSEMEL REV o joson A A SETTER USING RUBBER STAMP 2 1 4 n es LED
10. M ASSEMBLY FORM SENTITI 7 77 Frege _ 0 lui Lsemuler o o gt _ 1 L la _____ _ 21 jy o HH LEE EN MCI A 1770 077 NE 4b lipe _ j 2172 _________ _ 1 23 69 752 Cid o o O ejz 1010 CHANGES HA ea anaes iy 22 OA 18 rBtoromrA n A __ ______ AWA gt cocoon oro _ 23 _ 2178 _______ o o Y o _ 3 12 _______ amp 277 _________ fe Bish owel s C j j LGA 2 and Rinder 414 1 0 s NM ex el 1 1 oto DATA CARD SELECT DECODERS IOE XP amp 35 0 A7 15 17 AS 19 33 2 23 3741532 82 Jue 5V 45 4 GND 3 50V 50 GND 4 XI AC DC INTERFACE CONNECTOR SIGNAL CONVERSION CIRCUITS R9 RIO NEZ 224 33K BRI 127 mDAQ20A 7 5V 5V 8 E OPTOISOLATOR CIRCUIT 7 ACE 5 R25 5 Re CRO ED 310K 2 8 E 5 e pola 107 370 N x N T 5244 Vew 9 ven 9 920 7
11. _ _ Tour iof 7415244 5 250 gt 15 3 5 4 3 2 1 A REVISED PER PCN 0952 D INPUT PORT i B IN Sk SELECTS OF 6 BLOCKS PORTS PER BLOCK SELECTS OF 4 BLOCKS B FORT PER BLOCK 57 SELECTS OF 8 PORT ADDRESSES NOTES UNLESS OTHERWISE SPECIFIED ASSEMBLY PARTS LIST 105121 PRO LOG CORPORATION BE SCHEMATIC 7503 OPTOISOLATOR NFUT 105120 een GENE 5 15 79 m 4 e 4 ar EA are JREVISED PER 0252 za 1 B REVISED PER PCN 146 REF D DETAIL B 57 8 34 RED 5 JN SEE DETAIL DETAIL A Fo 1 o OF O Bal oj Lo to 0 6 C un o po www r bo HERNO 36 ms eg REQD 58220 0 4 e e m RARO 5 5 EA a O O edle O O ASSY 1051201 ota b O DANGER 000 Y 2 HIGH do 0439 to VOLTAGE B eers OA 1 0 nx vn 9 0 E T2 gm o Q RED or 0 _ E Ua 5 59 Ub ug po en M 24 1330 CF 5 1500 4 02 46 20 02 i T a oca HO CW 57 1618 20 22 4 en om
12. addresses used are the address jumper selections made when the 7503 7506 is shipped To use the subroutine in systems other than those described above the memory and or 1 0 port addresses may require change for compatibility The flow diagram presented can be easily translated into the assembly code used by any microprocessor since they show the steps required to acheive 7503 7506 operation without reference to particular microprocessor The following subroutine will compare the present port status with the port Status from the last time that the port was read To use the routine the HL pointer must point to a place in memory where port status 15 stored Also the port must be read into the accumulator before calling the routine Upon return from the routine the location that the HL pointer was previously set will contain new port status Plus the next four locations will contain change status Uses Registers A H and L XX New Data XX Old Data XX Changes XX Changes XX Bits to Zero XX Bits to One Memory after Return Location HL was set to CHECK BITS SAVE 8 6 C LOAD B WITH OLD DATA EXCLUSIVE OR OLD DATA WITH NEW DATE STORE BITS THAT CHANGED OLD DATA WITH CHANGES STORE BITS THAT ENT TO ZERO OLD DATA WITH CHANGES STORE BITS THAT WENT TO ONE RESTORE 5 RETURN i H PRO LOG CORPORATION PROGRA
13. al Specifications man NON OPERATING LIMITS NON TIN MNEM PARAMETER User Electrical Characteristics over Recommended Operating Limits MNEM PARAMETER HIGH RANGE UNK UNIT tow fever userinputvorase 0 Low level user input leakage Rio Isolation resistance Isolation resistance 109 1079 9 STD BUS Electrical Characteristics over Recommended Operating Limits LOW RANGE HIGH RANGE MIN MAX MIN TYP MAX UNIT STD Bus soppy current ____ 80 25 150 20 mA See STD 7503 Edge Connector Pin List _ See STD 7503 Edge Connector Pin List MNEM PARAMETER Switching Characteristics over Recommended Operating Limits BOTH T PHL Active inactive User Interface STD Data Lec mn See ELECTRICAL SPECIFICATIONS FOR THE 7506 7506 Optoisolated input Card Electrical Specifications RECOMMENDED ABSOLUTE OPERATING LIMIT MNEM PARAMETER 5 NON OPERATING LIMITS User Electrical Characteristics over Recommended Operating Limits LOW RANGE HIGH RANGE a oe BROSSE current Rio isolation resistance 10 109 PARAMETER STD BUS Electrical Characteristics over Recommended Operating Limits ee sra sus say comen mo zm 10 2 m STD BUS input load See STD 7506 Edge Connector Pin List STD BUS output drive See STD 7506 Edge Connector Pin List Switchi
14. ange jumper out high range The 7503 is shipped with the jumper out which selects the 20 80 5 range To select the 4 5 22 VRMS range insert the jumper for each circuit desired The 7506 is also shipped with the jumper out selecting the 140 280 VRMS range instead of the optional 70 150 VRMS range The second step of the conversion process involves full wave rectification of the input current by using a diode bridge This step allows AC voltages as well as DC voltages of either polarity to be detected The third step takes the direct current from the bridge and produces an optically coupled TTL signal which is read by the input port The optical coupling provides electrical isolation between the AC circuits and logic circuits of the STD system O The optoisolated system is free of problems caused by ground loops and varying ground potentials Analog pulse stretching is provided to assure a constant output signal when a 50Hz or higher frequency AC input signal is applied This signal is monitored by an LED indicator and the STD 8US input port RI A INPUT VOLTAGE TEMO TYPICAL INPUT CIRCUIT ADDRESS DECODER OPERATION Refer to the schematics documents 105119 7503 105298 7506 The 7503 and 7506 use three cascaded 74LS42 decoders U3 U4 and US to decode address lines 0 7 These decoders are enabled only when ORQ RD and IOEXP are active The output
15. e Selection for Each Input e Low Input Voltage Range from 4 5 VRMS to 22 VRMS High Input Voltage Range from 20 VRMS to 80 VRMS 10 0mA RMS Maximum Input Loading Typical Turn On Time of 11msec Typical Turn Off Time of 36msec LED Indicator for Each Input Circuit DC Voltages may be Applied with Either Polarity User selectable Input Port Address Keyed Interface Connector Clear Plastic Safety Shield Single 5V Operation Socketed ICs TTL SIGNAL SIGNAL 07 06 CONVERSION RECTIFICATION amp amp CONDITIONING CONVERSION 7 1 SELECT CIRCUITS 6 IOREQ Q cur OPTOISOLATED INPUT CARD 4 5 80VAC VDC INDICATES ACTIVE LOW LOGIC DIL PRO LOG CORPORATION 17000 PRELIMINARY 7506 SiMDBUS 0PTOISOLATED INPUT CARD 70 280VAC VDC The 7506 provides eight independent AC DC inputs for the Series 7000 STD BUS An optical coupling circuit isolates each circuit from the STD BUS system and from each other The 7506 offers a choice of two input ranges Range selection is independent for each input and is selected through the installation of wire jumpers The low range responds to input voltages of between 70 VRMS and 150 VRMS for 120V applications The high range responds to input voltages between 140 VRMS and 280 VRMS and is useful for systems using 240V An LED provides a visual indication of the state of each input FEATURES e Independent Range Sel
16. ection for Each Input e Low Input Voltage Range from 70 VRMS to 500V Minimum Isolation Between Inputs and Between Each Input and System Ground 150 VRMS High Input Voltage Range from 140 VRMS to 280 VRMS 2 0mA RMS Maximum Input Loading Typical Turn On Time of 11msec Typical Turn Off Time of 35msec LED Indicator for Each Input Circuit DC Voltages may be Applied with Either Polarity User selectable Input Port Address Keyed Interface Connector Clear Plastic Safety Shield Single 5V Operation Socketed ICs BUFFER TTL INPUT SIGNAL SIGNAL 07 06 lt CONVERSION RECTIFICATION amp amp CONDITIONING CONVERSION IOREQ RD OPTOISOLATED INPUT CARD 70 280VAC VDC INDICATES ACTIVE LOW LOGIC raue OOO STD BUS SOLDER TAIL CONNECTOR The 518 card edge connector is used on industrial interface cards requiring more than 50VDC and or 0 5A per contact FEATURES 5A Maximum Per Contact Multiple Sourced Accepts PCBs of 062 Thickness Pierced Solder Tails Accept 3 22 AWG Wires Includes Mating Hood Hardware and Keys UL Listed ELECTRICAL Material UL rated 94V 0 or 94V 1 flame rating Contact spacing 0 156 centers Contact rating 5A Maximum voitage drop 30mV at 5A Operating voitage 350V at sea level Operating temperature 55 C to 105 C at sea level e PCB thickness 054 to 071 inches insertion withdrawal force
17. ng Characteristics over Recommended Operating Limits BOTH RANGES T PHL Active Inactive Data em 36msec Prem See Timing diagram USER INPUT VOLTAGE iaa VALIO OUTPUT STATE STO OUTPUT STATE INPUT CIRCUIT TIMING DIAGRAM ADORESS 200000000 SX 500000000 0000 SY 2000 lt 2 12717213 m 21221206 7503 COMPONENT ADDRESS Y 2 gt 5 4 m 1 1 1 1 1 8 INPUT CONNECTOR KEY BETWEEN ____ gt PINS 2 8 ANO KEY BETWEEN PINS 12 4 13 9 PLACEMENT DIAGRAM INPUT LED 9 z gt 1 1 1 1 1 INPUT CONNECTOR KEY BETWEEN PINS 2 8 ANO VC KEY BETWEEN PINS 11 M ANO IUN gt 7506 COMPONENT PLACEMENT DIAGRAM INTERFACE CONNECTOR PIN LIST 2 78 ACINPUTSA ACUNPUTSA 59 4 Hol 12 ACUNPUT IA 1 ws 5 5 vce ja2 yec 5 VOLTS GROUNO fenol 4 3 _ GNO GROUNO 221236 2222 52 23 5 391 15115 status LO wma 1 Tallar T 41151 _Iwarno 121 4949 a E 511901 PAUXGNO _ 54 153
18. ntact rating 10A circuit continuous e Breakdown voitage 2500V Operating temperature 55 C to 105 C at sea level PCB thickness 054 to 071 inches e Not recommended for more than 20 insertion withdrawals CONNECTOR ORDERING INFORMATION The part number of various connector manufac turers is given below Pro Log CB18 Buchanan PCB2B Connector PC17 Keying plug Includes two keying plugs 2 972 7 55 156 40 28188151818181 INTER CONTACT KEYING SLOT 4 078 20 CM TYP 3 658 9 29 344 3 408 8 66 gt 874 MATING BOARD 5 x 4 156 40 CM TYP 0000000 Qo Q Q Q Q Q HOLES 136 DIAMETER Ses CIS 79 CM Barrier Strip Connector FUNCTIONAL DESCRIPTION The 7503 and the 7605 Optoisolated Input Cards convert an AC DC input voltage into a TTL level signal that is read by an on card STD BUS input port The functional operation of the two cards is identical only component values are changed to permit operation over the wide range of voltages The conversion from high voltage to TTL takes place in three steps A typical input circuit is shown below The first step uses the input range resistors to obtain a current proportional to the input voltage The resistor value may be altered for input voltage range selection with the insertion of a jumper wire jumper in low r
19. s 2 02 to 8 oz per contact pair 2 2 652 005 m 6 74 01 CS18 I O EDGE CONNECTOR 0 128 DIAMETER 2 PLACES 325 CM 054 to 071 137 to 180 CM P C BOARD THICKNESS Th 031 078 30 INSERTION 762 DEPTH ACCEPTS 3 22 AWG WIRES CS18 SOLDER TAIL CONNECTOR ORDERING INFORMATION 61 020 Pro Log CS18 includes connector hood hardware c 222 and key Part numbers given for other manufac turers are for connectors and hoods only 1 f 1 40 400 Connector ee Viking 2VH18 1AB5 Sullins EMM18 SREH TRW Cinch 250 18 30 220 Hood 05 2 03 CM Viking 036 0097 002 Kel Am CH 18 6H 3 406 AMP 530088 3 pem STRAIN RELIEF QUANTITY PRICING INFORMATION 1 9 10 24 25 99 100 249 Typical Hood with Cable Clamp 518 51500 1350 12 50 11 50 18 STD BUSS EDGE CONNECTOR BARRIER STRIP CONNECTOR The CB18 card edge connector is used on industrial interface cards requiring more than 50VDC and or 0 5A per contact FEATURES e 10A Maximum Per Contact e Single Sourced e Accepts PCBs of 062 Thickness Tubular Contact Plate Accepts 12 to 22 AWG Wires e Includes Keys UL Listed ELECTRICAL e Material UL rated 94V 0 flame rating e Contact spacing 0 156 centers Co
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