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Transcend 400x CompactFlash Card, 64GB

1. Cyl Low 4 Cylinder Low Sec Num 3 Sector Number Sec Cnt 2 Sector Count Feature 1 Transcend Information Inc 82 V1 0 TS16G 64GCF400 400X CompactFlash Card m Write Sector s 30h or 31h sito 7 e os 4 s a 1 o Command 7 30h or 31h com usa 1 ome Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 sector Count m Write Sector s without Erase 38h mj 7 dejs eajsj seajsj e i cmi 1 tea 1 orve Head BA2T24 Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 eT Sec Cnt 2 Sector Count awen CS m Write Verify 3Ch ws fs fs fs CO EN cime i ux owe memammm Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 sector Count Feature 1 X Transcend Information Inc 83 TS16G 64GCF400 400X CompactFlash Card m Error Posting f ek une ione aenr amr onov owr psc corn EAR Gwewenws LL LV LL L Le Execute Dive Diagnosi J m meemen v Y v LY DD v Fusce v FomaTek v v v v v vwv vy Rem pece J vi v Jv v Jv we Vil Jv dle immediate J v mmm Parameters Key Management Structure Read lt lt lt L lt lt lt lt L lt lt lt lt lt lt lt
2. TS16G 64GCF400 400X CompactFlash Card B Output Drive Characteristics Table 4 Output Drive Characteristics Symbol Conditions MIN V 1 Output Voltage V V 2 Output Voltage V V 3 Output Voltage V oh ol oh ol oh ol loz Tri State Leakage Current Transcend Information Inc loh 2 4 mA lol 4 mA loh 2 4 mA lol 4 mA loh 2 4 mA lol 4 mA Vol Gnd Voh Vcc Vcc 0 8V Vcc 0 8V Vcc 0 8V Volts Gnd 0 4V al Gnd 0 4V Volts 0 4V V1 0 TS16G 64GCF400 400X CompactFlash Card Signal Description Signal Name Dir Pin scription O 8 10 11 12 These address lines along with the REG signal are used to select the following 14 15 16 17 The I O port address registers within the CompactFlash Storage Card the A10 A00 PC Card Memory Mode A10 A00 PC Card I O Mode A02 A00 True IDE Mode BVD1 PC Card Memory Mode STSCHG PC Card I O Mode Status Changed PDIAG True IDE Mode BVD2 PC Card Memory Mode SPKR PC Card I O Mode DASP True IDE Mode CD1 CD2 PC Card Memory Mode CD1 CD2 PC Card I O Mode CD1 CD2 True IDE Mode 18 19 20 18 19 20 memory mapped port address registers within the CompactFlash Storage Card a byte in the card s information structure and its configuration control and status registers This signal is the same as the PC Card Memory Mode
3. 3 4 5 7 8 9 10 11 12 Transcend Information Inc 7 V1 0 TS16G 64GCF400 400X CompactFlash Card B Input Leakage Current Note In Table 1 below x refers to the characteristics described in table 2 For example 11U indicates a pull up resistor with a type 1 input characteristic Table 1 Input Leakage Current Symbol Conditions MINN Input Leakage Current IL Vih Vcc Vil Gnd Pull Up Resistor Vcc 5 0V Pull Down Resistor RPDI Vcc 5 0V Note The minimum pull up resistor resistance meets the PCMCIA PC Card specification of 10k ohms but is intentionally higher in the CompactFlash Specification to reduce power use B Input Characteristics Table 2 Input Characteristics Type Parameter Symbo wm Tve max MN TYP max VCC 3 3 V VCC 5 0 V Input Voltage Vih Volts i Volts Input Voltage Vih Volts Input Voltage Vth 1 8 2 8 rigger Notes 1 The host provides a logic output high voltage for a CMOS load of 9 x VCC For a 5 volt product this translates to 9 x 4 5 4 05 volts minimum Voh B Output Drive Type Note In Table 3 below x refers to the characteristics described in Table 4 For example OT3 refers to Totem pole output with a type 3 output drive characteristic Table 3 Output Drive Type Output Type Valid Conditions Totempole loh amp lol Tri State N P Channel loh amp lol P Channel Only loh Only N Channel Only lol Only Transcend Information Inc 8 V1 0
4. 400X CompactFlash Card Description Dedicated to fulfill the demanding requirements of performance conscious photographers Transcend proudly releases its Extreme 400X CompactFlash cards With its amazing performance the Transcend 400X CompactFlash memory card allows the professional photographers and enthusiasts to get the most from your digital single lens reflex DSLR camera Users are guaranteed to make consecutive shooting and non stop video recording and share their digital artwork with the world Placement A Transcend CompactFlash UU DER Dimensions 36 40 0 150 43 0 005 42 80 0 100 69 0 004 13 8 D 0630070 002 0000 Features CompactFlash Specification Version 4 1 Compliant RoHS compliant products Single Power Supply 3 3V 5 or 5Vt10 Operating Temperature 25 C to 85 C Storage Temperature 40 C to 85 C Operating Storage Humidity 596 to 9596 Operation Modes v PC Card Memory Mode v PC Card IO Mode v True IDE Mode True IDE Mode supports v Ultra DMA Mode 0 to Ultra DMA Mode 6 Ultra DMA mode 5 6 must supply with 3 3V Y MultiWord DMA Mode 0 to MultiWord DMA Mode 4 v PIO Mode 0 to PIO Mode 6 PC Card Mode supports up to Ultra DMA Mode 6 True IDE mode Fixed Disk Default PC Card Mode Removable Disk Default Durability of Connector 10 000 times Built in 15 bit ECC Error Correction Code functionality Support Global Wear Leveling to extend pro
5. B True IDE Mode Addressing When the CompactFlash Storage Card is configured in the True IDE Mode the I O decoding is as follows ra AT ao mack 10RD9 aowa Note Lo 1 Poroa amass Sana c x o omARDDAIA OMAWRDaa 1001 ro 1 3 EnorRegiter Features sm Lie 31 secnm SecorCount swm Di 1 3 seciorno sew em Lo owe oyindertow 5m Li 3r oWweng oyindertigh sm To seeGarmead Select Carticad Bwt _ r sms command abt o 1 Wisiatus Device conor ait _ 92 o o o o Transcend Information Inc 53 V1 0 TS16G 64GCF400 400X CompactFlash Card B CF ATA Registers The following section describes the hardware registers used by the host software to issue commands to the CompactFlash device These registers are often collectively referred to as the task file gt Data Register Address 1F0h 170h Offset 0 8 9 The Data Register is a 16 bit register and it is used to transfer data blocks between the CompactFlash Storage Card data buffer and the Host This reaister overlans the Error Reaister ume mimm mpm Memory and I O Modes Word Word Data Register Word Data Register anp ss phi 9 CEE 3 3 1 7 s ere wmm o x s9 e EmeremeRee 9 1 orso _ OI ism Error Etror Feature Register Etror Feature Register Di5D8 Data Register
6. Data Valid from Address Change tvA tAXOX Note All times are in nanoseconds Dout signifies data provided by the CompactFlash Storage Card to the system The CE signal or both the OE signal and the WE signal shall be de asserted between consecutive cycle operations tei R a LJ F ta HA e NE ISU HA tv H ta CEx r Bu tdis CEx HOE bon NE ten HOE on pp CEx tdis HOE Transcend Information Inc 22 V1 0 TS16G 64GCF400 400X CompactFlash Card B Configuration Register Attribute Memory Write Timing Specification The Card Configuration write access time is defined as 250 ns Detailed timing specifications are shown in Table below Table Configuration Register Attribute Memory Write Timing Write Cycle Time 280 Write Pulse Width 150 L assess tng CS E wieren me Teng o _ Data Soup Tine wE wampswem 80 _ Omm mo a Note All times are in nanoseconds Din signifies data provided by the system to the CompactFlash Storage Card Ici vv N HA l TN o_o HREG trec HWE Sut HA CEx tdis CEx tw HWE V HWEZ tsu HD HWEH HD ee Da HD Data Valid D Transcend Information Inc 23 V1 0 TS16G 64GCF400 400X CompactFlash Card B Common Memory Read Timing Specification _ CyeeTmeMode 250ns t20ns 100ns sons a IE E r awe mo a osse mes ua
7. Command 7 50h Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 X LBA 7 0 Sec Cnt 2 Count LBA mode only Transcend Information Inc 62 V1 0 TS16G 64GCF400 400X CompactFlash Card B identify Device Ech Bit gt X di Ae Cyl High 5 Cyl Low 4 nm X semo E Feature 1 The Identify Device command enables the host to receive parameter information from the CompactFlash Storage Card This command has the same protocol as the Read Sector s command The parameter words in the buffer have the arrangement and meanings defined in Table as below All reserved bits or words are zero Hosts should not depend on Obsolete words in Identify Device containing 0 Table 47 specifies each field in the data returned by the Identify Device Command In Table as below X indicates a numeric nibble value specific to the card and aaaa indicates an ASCII string specific to the particular drive Word Default Total s t Value Bytes Data Field Type Information EB 5 CEN re _ e SECO General configuration signature for the CompactFlash Storage Card General configuration Bit Significant with ATA 4 definitions 10 19 2 7 2 2 2 23 26 XXXXh o Serial numberin aseensa OOOO m oom e oe m omm 2 Omme 22 oam 2 Number of ECC bis passed on ReadWite Long Commands mas 27 46 XXXXh 40 Model number in ASCII Left Justified Big Endian Byte Order
8. Feature 1 Translate Sector Information 00h 01h Cylinder MSB 00 Cylinder LSB 01 Q4h 06h LBA MSB 04 LSB 06 ish 43h Erased Flag FFh Erased 00h Not Erased Hot Count MSB 18 LSB 1A 07n 12h Transcend Information Inc 80 V1 0 TS16G 64GCF400 400X CompactFlash Card Wear Level F5h ws zlslslslisisislils Smmm Eh cme x x x om rm wmmm SSCS amm X Write Buffer E8h esp Te le sts ls comma em come x o Xx ECCO X ECCO mna X seem X reste Xx m Write DMA CAh ws Te TTT Tea commana Cit cmH 1 isa 1 Drive Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Transcend Information Inc 81 V1 0 TS16G 64GCF400 400X CompactFlash Card m Write Long Sector 32h or 33h BEN SEEN CIDIH 6 e Du ome Head LBA 27 24 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Feature 1 m Write Multiple Command C5h go 7 e sj aja z2 3j 0 Command O S emm 1 te 1 ome Head Cyl High 5 Cylinder High Cyl Low 41 Cylinder Low Sec Num 3 Sector Number Feature 1 m Write Multiple without Erase CDh sito 7 e 6 4 0 2 1 o commana n O S o ganei x usa 1 ome Heat Cyl High 5 Cylinder High
9. High Z High Z Data In High Z Data Out Odd Byte Even Byte In H Odd Byte Even Byte In L see Note 2 Odd Byte Even Byte In Odd Byte Even Byte Out Odd Byte Even Byte Out See Note 3 Odd Byte Even Byte Qut Dont Care Control In H L H Highz Status Out pm e H Henz patacu X X X X Standby Mode Task File Write Task File Read PIO Data Register Write DMA Data Register Write Ultra DMA Data Register Write PIO Data Register Read DMA Data Register Read Ultra DMA Data Register Read Control Register L L L L L rr Alt Status Read Drive Address e z O35 05 95 Transcend Information Inc 48 V1 0 TS16G 64GCF400 400X CompactFlash Card Host Configuration Requirements for Master Slave or New Timing Modes The CF Advanced Timing modes include PCMCIA PC Card style I O modes that are faster than the original 250 ns cycle time These modes are not supported by the PCMCIA PC Card specification nor CF by cards based on revisions of the CF specification before Revision 3 0 Hosts shall ensure that all cards accessed through a common electrical interface are capable of operation at the desired faster than 250 ns I O mode before configuring the interface for that I O mode Advanced Timing modes are PCMCIA PC Card style I O modes that are 100 ns or faster PC Card Memory modes that are 100ns or faster True IDE PIO Modes 5 6 and Multiword DMA Modes 3 4
10. ima Access 099 Awtue Wie ___ Transcend Information Inc 38 V1 0 TS16G 64GCF400 400X CompactFlash Card Table PC Card Memory Mode UDMA Function DMARDY STROBE DMARQ DMACK HIOE WAIT CE2 CE1 INPACK REG R WAIT R HIOE W W Standby Device UDMA Transfer Request Assert DMARQ SEA Host Acknowledge Preparation Host Acknowledge Preparation DMA Acknowledge Stopped eo ores se Burst Initiation Active o o f o x o ves Static BurstTranster e e e Der e i E rr of o Sort RD Static Data In Burst Device fae ENER LN E E ESEME RR T Dori Static Host Acknowledement of Device Initiated Burst Termination 1 1 1 1 1 Oori YES Static Device Acknowledging Host Initiated Burst Termination Device Aligning STROBE to Asserted ate coi G Table CompactFlash Storage Card Configuration Registers Decoding cz ces nea oE we mo no aeaa as a2 m a0 SELECTED REGISTER rx fo fo 0 3 0 9 9 0 0 e Coniguraion Opion Reg Read Cx s fo fs fo fo o 9 99 9 coniguration opion Reg Wee rx fo fo o r fo ls o foot e cassaus RegsierRead rx fo fof o lo ls o ole 9 casaus Register wits Px fo fo Pots ofr o os 9 o Pinrepieccment Register Read a o fe Pr fo 0 00 Pols 9 9 replacement Register vinto _ ae 9 Pots po e 9 e socket and Copy Register Road Dp fo fs fo Led eio Le Le seeker an Copy Regier
11. 34 connector 3 The parameter tCYC shall be measured at the recipient s connector farthest from the sender 2 All signal transitions for a timing parameter shall be measured at the connector specified in the measurement location 1 All timing measurement switching points low to high and high to low shall be taken at 1 5 V Transcend Information Inc Notes TS16G 64GCF400 400X CompactFlash Card 4 The parameter tLI shall be measured at the connector of the sender or recipient that is responding to an incoming transition from the recipient or sender respectively Both the incoming signal and the outgoing response shall be measured at the same connector 5 The parameter tAZ shall be measured at the connector of the sender or recipient that is driving the bus but must release the bus the allow for a bus turnaround tecvcrvP Typical sustained average two cycle time tcyc Cycle time allowing for asymmetry and clock variations from STROBE edge to STROBE edge Two cycle time allowing for clock variations from rising edge to next rising edge or from falling edge to next falling edge of STROBE Data setup time at recipient from data valid until STROBE edge Data hold time at recipient from STROBE edge until data may become invalid tecvc ZFS Time from STROBE output released to driving until the first transition of critical timing DS DH CS CH 2 5 2 5 3 3 2 2 3 3 t t t tDZFS Time from data ou
12. 80h or the permitted value of OOh Bits 7 0 of this word define the maximum number of sectors per block that the CompactFlash Storage Card supports for Read Write Multiple commands gt Word 49 Capabilities Bit 13 Standby Timer If bit 13 is set to 1 then the Standby timer is supported as defined by the IDLE command If bit 13 is set to 0 then the Standby timer operation is defined by the vendor Bit 11 IORDY Supported If bit 11 is set to 1 then this CompactFlash Storage Card supports IORDY operation If bit 11 is set to 0 then this CompactFlash Storage Card may support IORDY operation Bit 10 IORDY may be disabled Bit 10 shall be set to 0 indicating that IORDY may not be disabled Bit 9 LBA supported Bit 9 shall be set to 1 indicating that this CompactFlash Storage Card supports LBA mode addressing CF devices shall support LBA addressing Bit 8 DMA Supported If bit 8 is set to 1 then Read DMA and Write DMA commands are supported Bit 8 shall be set to 0 Read Write DMA commands are not currently permitted on CF cards gt PIO Data Transfer Cycle Timing Mode The PIO transfer timing for each CompactFlash Storage Card falls into modes that have unique parametric timing specifications The value returned in Bits 15 8 shall be 00h for mode 0 01h for mode 1 or 02h for mode 2 Values 03h through FFh are reserved Translation Parameters Valid Bit 0 shall be set to 1 indicating that words 54 to 58 are valid and reflect the current number of
13. DMA Queued commands If bit 2 of word 86 shall be set to one the CompactFlash Storage Card supports the CFA feature set If bit 3 of word 86 is set to one the Advanced Power Management feature set has been enabled via the Set Features command Bit 4 of word 86 shall be set to zero the CompactFlash Storage Card does not support the Removable Media otatus feature set gt Word 88 Ultra DMA Modes Supported and Selected Word 88 identifies the Ultra DMA transfer modes supported by the device and indicates the mode that is currently selected Only one DMA mode shall be selected at any given time If an Ultra DMA mode is selected then no Multiword DMA mode shall be selected If a Multiword DMA mode is selected then no Ultra DMA mode shall be selected Support of this word is mandatory if Ultra DMA is supported Bits 15 Reserved Bit 14 1 Ultra DMA mode 6 is selected 0 Ultra DMA mode 6 is not selected Bit 13 1 Ultra DMA mode 5 is selected 0 Ultra DMA mode 5 is not selected Bit 12 1 Ultra DMA mode 4 is selected 0 Ultra DMA mode 4 is not selected Bit 11 1 Ultra DMA mode 3 is selected 0 Ultra DMA mode 3 is not selected Bit 10 1 Ultra DMA mode 2 is selected 0 Ultra DMA mode 2 is not selected Transcend Information Inc 69 V1 0 TS16G 64GCF400 400X CompactFlash Card Bit 9 1 Ultra DMA mode 1 is selected 0 Ultra DMA mode 1 is not selected Bit 8 1 Ultra DMA mode 0 is selected 0 Ultra DMA mode 0 is not selec
14. Option Register Base 00h in Attribute Memory The Configuration Option Register is used to configure the cards interface address decoding and interrupt and to issue a soft reset to the CompactFlash Storage Card or CF Card Operation DI DE DS D4 D3 D2 D1 DO Configuration Option Register SRESET Soft Reset setting this bit to one 1 waiting the minimum reset width time and returning to zero 0 places the CompactFlash Storage Card or CF Card in the Reset state Setting this bit to one 1 is equivalent to assertion of the RESET signal except that the SRESET bit is not cleared Returning this bit to zero 0 leaves the CompactFlash Storage Card or CF Card in the same un configured Reset state as following power up and hardware reset This bit is set to zero 0 by power up and hardware reset For CompactFlash Storage Cards using the PCMCIA Soft Reset is considered a hard Reset by the ATA Commands Contrast with Soft Reset in the Device Control Register LevIREQ this bit is set to one 1 when Level Mode Interrupt is selected and zero 0 when Pulse Mode is selected Set to zero 0 by Reset Conf5 Conf0 Configuration Index set to zero 0 by reset It is used to select operation mode of the CompactFlash Storage Card or CF Card as shown below Note Conf5 and Conf4 are reserved for CompactFlash Storage cards and shall be written as zero 0 These bits are vendor defined for CF Cards CompactFlash Storage Card Configurati
15. Transcend Information Inc 16 V1 0 TS16G 64GCF400 400X CompactFlash Card B Input Power Maximum Average RMS Current Measurement Method 3 3V 5 75 mA 500 mA in Power Level 1 3 3V at 25 C 2 0V 10 100 mA 500 mA in Power Level 1 2 0V at 25 C B input Characteristics for UDMA mode gt 4 In UDMA modes greater than 4 the following characteristics apply Voltage output high and low values shall be met at the source connector to include the effect of series termination Table Input Characteristics UDMA Mode gt 4 Parameter Symbol MIN MAX Units Difference between input thresholds w c Vae V 320 Volts V current value E V current value ne Average of thresholds Vs eie are BI Output Drive Characteristics for UDMA mode gt 4 In UDMA modes greater than 4 the characteristics specified in the following table apply Voltage output high and low values shall be met at the source connector to include the effect of series termination Table Output Drive Characteristics UDMA Mode gt 4 Symbol MIN MAX Units DC supply voltage to drivers 3 3 896 3 3 8 Voltage output high at 6 mA to 3 mA at VoH2 the output shall i be able to supply and sink current toVDD3 Vote Vppa 0 51 Vpps O 3 Volts Voltage output low at 6 mA Vas 051 Volts Notes 1 loLpase shall be 12 mA minimum to meet legacy timing and signal integrity 2 lou value at 400 p A is insufficient in
16. and Card signal capacitance limits for Ultra DMA operation The host interface signal capacitance at the host connector shall be a maximum of 25 pF for each signal as measured at 1 MHz The card interface signal capacitance at the card connector shall be a maximum of 20 pF for each signal as measured at 1 MHz gt Series termination required for Ultra DMA operation Series termination resistors are required at both the host and the card for operation in any of the Ultra DMA modes Table describes typical values for series termination at the host and the device Table Typical Series Termination for Ultra DMA 82 ohm NOTE Only those signals requiring termination are listed in this table If a signal is not listed series termination is not required for operation in an Ultra DMA mode Shows signals also requiring a pull up or pull down resistor at the host The actual termination values should be selected to compensate for transceiver and trace impedance to match the characteristic cable impedance Transcend Information Inc 20 V1 0 TS16G 64GCF400 400X CompactFlash Card Table Ultra DMA Termination with Pull up or Pull down Example gt Printed Circuit Board PCB Trace Requirements for Ultra DMA On any PCB for a host or device supporting Ultra DMA v Thelongest D 15 00 trace shall be no more than 0 5 longer than either STROBE trace as measured from the IC pin to the connector v The shortest D 15 00 trace shall be no mor
17. in Word wmm 5 00008 8 0 1 2 7 8 9 0 4 5 Transcend Information Inc 63 V1 0 TS16G 64GCF400 400X CompactFlash Card Rata A Data Field Type Information 51 PIO data transfer cycle timing mode 52 Obsolete 53 Field Validity 54 Current numbers of cylinders 55 Current numbers of heads 56 Current sectors per track 57 58 Current capacity in sectors LBAs Word 57 LSW Word 58 MSW 59 Multiple sector setting 60 61 Total number of sectors addressable in LBA Mode 62 Reserved 63 Multiword DMA transfer In PC Card modes this value shall be Oh 64 Advanced PIO modes supported 65 2 ea DMA transfer cycle time per word In PC Card modes this value 2 Recommended Multiword DMA transfer cycle time In PC Card modes this value shall be Oh z 69 79 20 3 z B3 z T 3 T 91 Current Advanced power management value 92 Master password revision code 93 127 Reserved 128 Security status 129 159 Vendor unique bytes 160 Power requirement description 161 Reserved Transcend Information Inc 64 Minimum PIO transfer cycle time without flow control Minimum PIO transfer cycle time with IORDY flow control Reserved Major version number Minor version number Command sets supported Command sets supported Command sets supported Command sets enabled Command sets enabled Command sets enabled Ultra DMA Mode Supported and Selected Time required for Security erase unit completion Time required for Enhanced sec
18. in the Card Information Structure CIS The following configuration registers are used to coordinate the I O spaces and the Interrupt level of cards that are located in the system In addition these registers provide a method for accessing status information about the CompactFlash Storage Card that may be used to arbitrate between multiple interrupt sources on the same interrupt level or to replace status information that appears on dedicated pins in memory cards that have alternate use in I O cards Multiple Function CompactFlash Storage Cards Table CompactFlash Storage Card Registers and Memory Space Decoding ea LES REG oE we mo se wem mo new a SELECTEDSPACE fo o fe Po e x x 9 coniguraion Registers Read 3 3 Po fe x Do x x commen Memory nease s0700 e ft 9 x fx xm x x x x common Memory Read 68101500 ro 9 3 9 C X fx xm x x x 0 common Memory Read 168101500 _ Px fo fo fs fol oft xm x x x eonan Regios wits L3 9 o a Po X DOC x CX LX common mony Wie 880709 Cs 3 p ps x Do x X X common Memory wie 6801509 rope pe ps fo X e x x DE x e commen Memory Wee 16 8015 00 _ co s Po fs Po fof xm x Px x 0 cara nfomaton Sructure nea rao fo fs foo fof xm x xl x 0 vais access ciwo C p fo 9 x DE ie ese oaa Atte Read L3 9 9 fa fo X DEC Die es 096 Atte Wis e fo fof X DOC x x x x ie sese 094 Awbus Read ___ Lo 3 po fa fof x DOO x x x Dx
19. in word 68 If bit 1 of word 53 is set to one because a CompactFlash Storage Card supports a field in words 64 70 other than this field and the CompactFlash Storage Card does not support this field the CompactFlash Storage Card shall return a value of zero in this field gt Word 68 Minimum PIO transfer cycle time with IORDY Word 68 of the parameter information of the Identify Device command is defined as the minimum PIO transfer with IORDY flow control cycle time This field defines in nanoseconds the minimum cycle time that the CompactFlash Storage Card supports while performing data transfers while utilizing IORDY flow control If this field is supported Bit 1 of word 53 shall be set to one Any CompactFlash Storage Card that supports PIO mode 3 or above shall support this field and the value in word 68 shall be the fastest defined PIO mode supported by the CompactFlash Storage Card If bit 1 of word 53 is set to one because a CompactFlash Storage Card supports a field in words 64 70 other than this field and the CompactFlash Storage Card does not support this field the CompactFlash Storage Card shall return a value of zero in this field gt Words 82 84 Features command sets supported Words 82 83 and 84 shall indicate features command sets supported The value 0000h or FFFFh was placed in each of these words by CompactFlash Storage Cards prior to ATA 3 and shall be interpreted by the host as meaning that features command sets supported
20. lt lt lt lt lt Key Management Read Keying Material Key Management Change Key Management Value No vL j v Reaa Bue vj J vj v vy v vy fp EEA Reed utile v v v v vw Pv Pv tv tv fv Read Long Sector V BEN V Reaa sector v v v v v v v tv v fv Read Very ses v v V v Y LY LO Recaibrate vj J vyj v vy o mE lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt Request Sense V Security Disable Password lt lt lt lt lt lt lt o T Security Erase Prepare C Security Erase Unit o Security Freeze Lock Security Set Password a Security Unlock dd Seek Pt L1 1 Set Features Transcend Information Inc 00 N V1 0 TS16G 64GCF400 400X CompactFlash Card sek une ione wan mme onov owe psc comm ERA dna i i ee ee ee Ee Set Sleep Mode VI jv Stand By Stand By Immediate Translate Sector Wear Level Write Buffer Write DMA Write Long Sector Write Multiple Write Multiple w o Erase Write Sector s Write Sector s w o Erase Write Verify Invalid Command Code Error and Status Register summarizes the valid status and error value for all the CF ATA Command set D Transcend Information Inc 85 V1 0 TS16G 64GCF400 400X CompactFlash Card Smart Command Set e SMART Command Set SMART Feature Register Values
21. on ATA device and turns off Removable Media and Removable Device while zeroing all Retired bits in the word Bit 15 12 Configuration Flag If bits 15 12 are set to 8h then Word 0 shall be 848Ah If bits 15 12 are set to Oh then Bits 11 0 are set using the definitions below and the Card is required to support for the CFA command set and report that in bit 2 of Word 83 Bit 15 12 values other than 8h and Oh are prohibited Bits 11 8 Retired These bits have retired ATA bit definitions It is recommended that the value of these bits be either the preferred value of Oh or the value of 4h that preserves the corresponding bits from the 848Ah CF signature value Bit 7 Removable Media Device If Bit 7 is set to 1 the Card contains media that can be removed during Card operation If Bit 7 is set to 0 the Card contains nonremovable media Bit 6 Not Removable Controller and or Device Alert This bit will be considered for obsolescence in a future revision of this standard If Bit 6 is set to 1 the Card is intended to be nonremovable during operation If Bit 6 is set to 0 the Card is intended to be removable during operation Bits 5 0 Retired Reserved Alert Bit 2 will be considered for definition in a future revision of this standard and shall be 0 at this time Bits 5 1 have retired ATA bit definitions Bit 2 shall be O Bit 0 is Reserved and shall be O It is recommended that the value of bits 5 0 be either the preferred value of 00h or t
22. on IORD Y is 1 LSTTL with a 50 pF 40 pF below 120 nsec cycle time total load All time intervals are recorded in nanoseconds Although minimum time from JORDY high to HIOW high is 0 nsec the minimum HIOW width is still met HD refers to data provided by the CompactFlash Card to the system Although adhering to the PCMCIA specification of 12 us the Wait Width time is intentionally lower in this specification tsuHA HIOW tsuHREG HIOW thin IhHREG HIOW i tsuCEx HIOW SZ CEx thCEx HIOW hae LOO wH IOA HIOW A N fsul HOW di a th MIOW HD pat Valid IdIQRD Y HIOW M tdrHIOWI IORDY IORDY Transcend Information Inc 27 V1 0 TS16G 64GCF400 400X CompactFlash Card B True IDE PIO Mode Read Write Timing Specification Cycle time min Address Valid to HIOE HIOW 30 setup min t2 HIOE HIOW min 165 125 100 t2 HIOE HIOW min Register 8 bit 290 290 min min tO 1 t HIOE data setup min HIOE data hold min HIOE data tristate max Address valid to IOCS16 assertion max Address valid to IOCS16 released max HIOE HIOW to address valid hold Read Data Valid to IORDY active min if IORDY initially low after tA IORDY Setup time 35 IORDY Pulse Width max IORDY assertion to release max 5 Notes All timings are in nanoseconds The maximum load on IOCS16 is 1 LSTTL with a 50 pF 40pF below 120nsec Cycle Time total load All times are in na
23. on the cable these timing measurements are not valid in a normally functioning system 4 For all modes the parameter tZIORDY may be greater than tENV due to the fact that the host has a pull up on IORDY giving it a known state when released 5 The parameters tDS and tDH for mode 5 are defined for a recipient at the end of the cable only in a configuration with a single device located at the end of the cable This could result in the minimum values for tDS and tDH for mode 5 at the middle connector being 3 0 and 3 9 ns respectively Fet fe de fer fe et e pep e Fet Notes 1 All timing measurement switching points low to high and high to low shall be taken at 1 5 V 2 The correct data value shall be captured by the recipient given input data with a slew rate of 0 4 V ns rising and falling and the input STROBE with a slew rate of 0 4 V ns rising and falling at tDSIC and tDHIC timing as measured through 1 5 V 3 The parameters tDVSIC and tDVHIC shall be met for lumped capacitive loads of 15 and 40 pF at the IC where all signals have the same capacitive load value Noise that may couple onto the output signals from external sources has not been included in these values Transcend Information Inc 36 TS16G 64GCF400 400X CompactFlash Card Name Comment Min Max V ns V ns SRISE Rising Edge Slew Rate for any signal o di ft Falling Edge Slew Rate for any signal que Note 1 The sender shall be tested while driving an
24. signal is the same as the PC Card Memory Mode signal In True IDE Mode except in Ultra DMA modes this output signal may be used as IORDY In all modes when Ultra DMA mode DMA Write is active this signal is asserted by the device during a data burst to indicate that the device is ready to receive Ultra DMA data out bursts The device may negate DDMARDY to pause an Ultra DMA transfer In all modes when Ultra DMA mode DMA Read is active this signal is the data in strobe generated by the device Both the rising and falling edge of DSTROBE cause data to be latched by the host The device may stop generating DSTROBE edges to pause an Ultra DMA data in burst This is a signal driven by the host and used for strobing memory write data to the registers of the CompactFlash Storage Card when the card is configured in the memory interface mode It is also used for writing the configuration registers In PC Card I O Mode this signal is used for writing the configuration registers In True IDE Mode this input signal is not used and should be connected to VCC by the host Memory Mode The CompactFlash Storage Card does not have a write protect switch This signal is held low after the completion of the reset initialization sequence I O Operation When the CompactFlash Storage Card is configured for I O Operation Pin 24 is used for the I O Selected is 16 Bit Port IOIS16 function A Low signal indicates that a 16 bit or odd byte only o
25. the case of DMARQ that is pulled low by a 5 6 KQ resistor 3 Voltage output high and low values shall be met at the source connector to include the effect of series termination 4 A device shall have less than 64 u A of leakage current into a 6 2 KO pull down resistor while the INTRQ signal is in the released state Transcend Information Inc 17 V1 0 TS16G 64GCF400 400X CompactFlash Card B Signal Interface Electrical specifications shall be maintained to ensure data reliability Additional requirements are necessary for Advanced Timing Modes and Ultra DMA modes operations See next sections for additional information Pull up to Vcc 500 KO gt R2 50 KO and Control Signal shall be sufficient to keep inputs inactive when the pins are not connected at the host ME Puttuptoverso0ka gt Ra SOKQM 0000000 RESET pull up to Voc 500 KQ gt Rz 50KQ es READY Status Signal oi Pull up to Vec R 10 KQ In PCMCIA PC Card modes Pull up to Vec Rz 10kQ In True IDE mode if DMA operation is supported by the host Pull down to Gnd R gt 5 6KQ INPACK PC Card True IDE hosts switch the pull up to pull down in True IDE mode if DMA operation is supported The PC Card mode Pull up may be left active during True IDE mode if True IDE DMA operation is not supported Ar 0 00 D 15 00 Card Detect CD 2 1 Connected to GND in the card onmes to GND in the Sea 1 Volt
26. 0 400X CompactFlash Card B l O Primary and Secondary Address Configurations Table Primary and Secondary I O Decoding res moma A Ae m A0 ono aaea Note o wem o o o o Eero Tampa 12 o wem poo o 1 Erorregser Fetws 12 o wam oo 1 o seorcom Tenen o wam o o i sesto sen o wam 0 i o o otim oynar o ram 0 1 o 1 Teams Taan o ram 0 1 1 0 Tapan Tamara Co tetra 0 1 1 1 sati commana o sem 0 1 1 o arsau oencecoma o arem 0 1 1 1 Dienes Reserved Note 1 Register 0 is accessed with CE1 low and CE low and AO Don t Care as a word register on the combined Odd Data Bus and Even Data Bus D15 D0 This register may also be accessed by a pair of byte accesses to the offset 0 with CE1 low and CE2 high Note that the address space of this word register overlaps the address space of the Error and Feature byte wide registers which lie at offset 1 When accessed twice as byte register with CE1 low the first byte to be accessed is the even byte of the word and the second byte accessed ts the odd byte of the equivalent word access 2 A byte access to register 0 with CE1 high and CE2 low accesses the error read or feature write register Transcend Information Inc 51 TS16G 64GCF400 400X CompactFlash Card B Contiguous I O Mapped Addressing When the system decodes a contiguous block of I O registers to se
27. 0 400X CompactFlash Card Ordering Information TS XG CF400 Transcend Product Capacity CompactFlash Card 400X 16G 64G 16GB up to 64GB The above technical information is based on industry standard data and has been tested to be reliable However Transcend makes no warranty either expressed or implied as to its accuracy and assumes no liability in connection with the use of this product Transcend reserves the right to make changes to the specifications at any time without prior notice JAPAN E mail sales transcend co jp T Transcend m E mail sales transcendchina com www transcendchina com TAIWAN GERMANY No 70 XingZhong Rd NeiHu Dist Taipei Taiwan R O C E mail vertrieb transcend de TEL 886 2 2792 8000 www transcend de Fax 886 2 2793 2222 HONG KONG E mail sales transcend com tw E mail sales transcend com hk www transcend com tw www transcendchina com Korea E mail sales transcend co kr USA www transcend co kr Los Angeles THE NETHERLANDS E mail sales transcendusa com E mail sales transcend nl Maryland www transcend nl E mail sales md transcendusa com United Kingdom WWw transcendusa com E mail sales transcend uk com www transcend uk com Transcend Information Inc 88 V1 0
28. 1 WAIT is not supported in this mode 2 The maximum load on WAIT is 1 LSTTL with 50 pF 40pF below 120nsec nanoseconds Din signifies data provided by the system to the CompactFla ignored if the HWE cycle to cycle time is greater than the Wait Width time Wait Width Timez sol fat Js s Jef Jef e Js Cycle Time total load All times are in sh Storage Card The WAIT signal may be The Max Wait Width time can be determined from the Card Information Structure The Wait Width time meets the PCMCIA PC Card specification of 12us but is intentionally less in this specification HA HREG FLEUIHA V Ih HA isu CEx a CEx th CEx twi HWE trec HWE HWE y ISu HD HWEH HD HD 4 Data Valid E rs WORDY IORD Y N WORD Y i vi Mo Transcend Information Inc 25 V1 0 TS16G 64GCF400 400X CompactFlash Card B lO input Read Timing Specification Cycle Time Mode IEEE Data DataDelayafferHIOE after DataDelayafferHIOE MdHIOE MdHIOE GLAV 100 seme pese Bex Pot TEL DT te HIOE Width Time Ww HOE GLIGH 165 70 65 55 AMEN be 12 1614 tet CI master WOE T m Tw wt fw Sessor eemex um e e fs fs corn namen D e e To WEG Sous wow HOE wns ce maus a aa e l el el avoar oe emos Prawns 5 TS ET 19 wes rom wats aoon www o s o e Wait Width Time uu tea n C7 N
29. 18 inch long 80 conductor cable with PVC insulation material The signal under test shall be cut at a test point so that it has not trace cable or recipient loading after the test point All other signals should remain connected through to the recipient The test point may be located at any point between the sender s series termination resistor and one half inch or less of conductor exiting the connector If the test point is on a cable conductor rather than the PCB an adjacent ground conductor shall also be cut within one half inch of the connector The test load and test points should then be soldered directly to the exposed source side connectors The test loads consist of a 15 pF or a 40 pF 596 0 08 inch by 0 05 inch surface mount or smaller size capacitor from the test point to ground Slew rates shall be met for both capacitor values Measurements shall be taken at the test point using a 1 pF 100 Kohm 1 Ghz or faster probe and a 500 MHz or faster oscilloscope The average rate shall be measured from 20 to 80 of the settled VOH level with data transitions at least 120 nsec apart The settled VOH level shall be measured as the average output high level under the defined testing conditions from 100 nsec after 8096 of a rising edge until 2096 of the subsequent falling edge Transcend Information Inc 37 TS16G 64GCF400 400X CompactFlash Card Card Configuration The CompactFlash Storage Cards is identified by appropriate information
30. 30 m mseme wm row a T CEx Setup before HOE tsucey etek 15 5 5 5 mE SEx Ho folowing HOE as ol pu cup ateo woo ewe 9 o ro Wait Width Timez tWTLWTH u 350 NM 350 aN 350 o Jm Notes 1 WAIT is not supported in this mode 2 The maximum load on WAIT is 1 LSTTL with 50 pF 40pF below 120nsec Cycle Time total load All times are in nanoseconds Dout signifies data provided by the CompactFlash Storage Card to the system The WAIT signal may be ignored if the OE cycle to cycle time is greater than the Wait Width time The Max Wait Width time can be determined from the Card Information Structure The Wait Width time meets the PCMCIA PC Card specification of 12us but is intentionally less in this specification Sra LJ pue El GR T T ED m HREG a Sut _ F thi HA tsu CEx CE YR th CEx HOE F ML ldis HOE HD vi IORDY HOE IORDY Transcend Information Inc 24 V1 0 TS16G 64GCF400 400X CompactFlash Card B Common Memory Write Timing Specification Cycle Time Mode ETRE C ee WEE eof Data Setup before HWE tsu HD HWEH tDVWH Data Hold following HWE th HD tWMDX sol HWE Pulse Width tw HWE tWLWH 150 Address Setup Time tsu HA tAVWL af CEx Setup before HWE iaae wey EN m Write Recovery Time Address Hold Time CEx Hold following HWE Wait Delay Falling from HWE WE High from Wait Release tv IORDY WTHWH tw IORDY WTLWTH Notes
31. 4 of word 82 shall be set to one the CompactFlash Storage Card supports the NOP command Bit 15 of word 82 is obsolete Bit O of word 83 shall be set to zero the CompactFlash Storage Card does not support the Download Microcode command Bit 1 of word 83 shall be set to zero the CompactFlash Storage Card does not support the Read DMA Queued Transcend Information Inc 68 V1 0 TS16G 64GCF400 400X CompactFlash Card and Write DMA Queued commands Bit 2 of word 83 shall be set to one the CompactFlash Storage Card supports the CFA feature set If bit 3 of word 83 is set to one the CompactFlash Storage Card supports the Advanced Power Management feature set Bit 4 of word 88 shall be set to zero the CompactFlash Storage Card does not support the Removable Media Status feature set gt Words 85 87 Features command sets enabled Words 85 86 and 87 shall indicate features command sets enabled The value 0000h or FFFFh was placed in each of these words by CompactFlash Storage Cards prior to ATA 4 and shall be interpreted by the host as meaning that features command sets enabled are not indicated Bits 1 through 15 of word 86 are reserved Bits 0 13 of word 87 are reserved Bit 14 of word 87 shall be set to one and bit 15 of word 87 shall be cleared to zero to provide indication that the features command sets enabled words are valid The values in these words should not be depended on by host implementers Bit O of word 85 shall be set
32. 6 bits Care H Odd Byte Even Byte Word Write 16 bits omi Even Byte Care Odd Byte Read Only 8 bits Ultra DMA Write Write Even Byte Ultra DMA Read Read Even Byte Don t Care Don t LC O 2 a Odd Byte Write Only 8 bits D D Transcend Information Inc 47 V1 0 TS16G 64GCF400 400X CompactFlash Card True IDE Mode I O Transfer Function The CompactFlash Storage Card can be configured in a True IDE Mode of operation The CompactFlash Storage Card is configured in this mode only when the OE input signal is grounded by the host during the power off to power on cycle Optionally CompactFlash Storage Cards may support the following optional detection methods 1 The card is permitted to monitor the OE ATA SEL signal at any time s and switch to PCMCIA mode upon detecting a high level on the pin 2 The card is permitted to re arbitrate the interface mode determination following a transition of the RESET pin 3 The card is permitted to monitor the OE ATA SEL signal at any time s and switch to True IDE mode upon detection of a continuous low level on pin for an extended period of time Table True IDE Mode I O Function defines the function of the operations for the True IDE Mode A0 A2 DMACK JORD JIOWR D15 D8 D7 DO Undefined Undefined In Out In Out Undefined Undefined Qut Undefined Undefined In Undefined Undefined Out Function Code Invalid Modes Undefined Undefined In
33. A Protocol is supported by the host and the host has enabled Ultra DMA protocol on the card the host shall keep the REG signal negated during the execution of any DMA Command by the device The signal shall also be active low during I O Cycles when the I O address is on the Bus In PC Card I O Mode when Ultra DMA Protocol is supported by the host and the host has enabled Ultra DMA protocol on the card the host shall keep the REG signal asserted during the execution of any DMA Command by the device This is a DMA Acknowledge signal that is asserted by the host in response to DMARQ to initiate DMA transfers In True IDE Mode while DMA operations are not active the card shall ignore the DMACK signal including a floating condition If DMA operation is not supported by a True IDE Mode only host this signal should be driven high or connected to VCC by the host A host that does not support DMA mode and implements both PC Card and True IDE modes of operation need not alter the PC Card mode connections while in True IDE mode as long as this does not prevent proper operation all modes The CompactFlash Storage Card is Reset when the RESET pin is high with the following important exception The host may leave the RESET pin open or keep it continually high from the application of power without causing a continuous Reset of the card Under either of these conditions the card shall emerge from power up having completed an initial Rese
34. Cyl High 5 senmo 0X Feature 1 The extended error code is returned to the host in the Error Register 2n ti Command ooo Invalid Address Requested Head or Sector Invalid 2Fh Address Overfiow Address Too Large Seek 7Xh sto 7 e s 4 8 2 1 0 Command 7 cime 1 um ome Taa Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Lema x Set Features EFh gno 7 e j 8 3 2 1 command l ee ile Cyl High 5 V1 0 ed Cyl Low 4 E RN TS16G 64GCF400 400X CompactFlash Card Feature Supported Enable Extended Power operations Alert It has been proposed to remove this feature from a future revision of the specification Please notify the CFA if you Disable Extended Power operations Alert It has been proposed to remove this feature from a future revision of the specification Please notify the CFA if you quirement for this feature Set the host current source capability Allows tradeoff between current drawn and read write spee Features 01h and 81h are used to enable and clear 8 bit data transfer modes in True IDE Mode If the 01h feature command is issued all data transfers shall occur on the low order D 7 0 data bus and the IOIS16 signal shall not be asserted for data register accesses The host shall not enable this feature for DMA transfers Features 02h and 82h allow the
35. Cyl Low 4 TEO Wi Read DMA C8h ws slslslslslsls ET RI cme ua 1 ome memuszrz Green aes Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 o Fexue O O X m Read Long Sector 22h or 23h sto T e s a s ja t 0o Cy High 5 Sec Num 2 Sector Number LBA 7 0 Sec Cnt 2 X Transcend Information Inc 75 V1 0 TS16G 64GCF400 400X CompactFlash Card Read Multiple C4h ee 2 a oT omm Du ww Taman Cylinder High LBA 23 16 Cylinder Low LBA 15 8 Feature 1 m Read Sector s 20h or 21h LL iealataia le ome un 1 me eemmum Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 sector Count Feature 1 B Read Verify Sector s 40h or 41h 9e 7 ej sjeayj sj 2j t j o Command 7 40h or 41h Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 sector Count Feature 1 X B Recalibrate 1Xh sito 7 e os 4 fos 2 fit fo Cyl High 5 Sec Num 3 Sec Cnt 2 e X Transcend Information Inc 76 V1 0 TS16G 64GCF400 400X CompactFlash Card m Request Sense 03h es 7 s lslslslslsls emmmp m come 5 Tx owl x mE CE
36. DMARQ REG REG LO LONE I3U 44 DMACK I3U DMACK 1 HEL 11Z 1 1 11Z 11Z 1 nope fe Te oe p n or Note 1 These signals are required only for 16 bit accesses and not required when installed in 8 bit systems Devices should allow for 3 state signals not to consume current The signal should be grounded by the host The signal should be tied to VCC by the host The mode is required for CompactFlash Storage Cards The CSEL signal is ignored by the card in PC Card modes However because it is not pulled upon the card in these modes it should not be left floating by the host in PC Card modes In these modes the pin should be connected by the host to PC Card A25 or grounded by the host 6 If DMA operations are not used the signal should be held high or tied to VCC by the host For proper operation in older hosts while DMA operations are not active the card shall ignore this signal including a floating condition Signal usage in True IDE Mode except when Ultra DMA mode protocol is active Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Write is active Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Read is active Signal usage in PC Card I O and Memory Mode when Ultra DMA mode protocol DMA Write is active Signal usage in PC Card I O and Memory Mode when Ultra DMA mode protocol DMA Read is active Signal usage in PC Card I O and Memory Mode when Ultra DMA protocol is active 2
37. DOh Read Data Read Attribute Threshold Enable Disable Autosave Enable SMART Operations Save Attribute Values Disable SMART Operations Execute OFF LINE Immediate Return Status If reserved size is below the Threshold the status can be read from Cylinder register by Return Status command DAh e SMART Data Structure BYTE F V 2 114 115 116 117 361 36 36 6 O o 3 Self test execution status byte 364 365 Total time in seconds to complete off line data collection activit 6 7 1 Off line data collection capabilit 368 369 SMART capabilit Error logging capability F 7 1 Reserved O 1 Device error logging Short self test routine recommended polling time in minutes Extended self test routine recommended polling time in minutes 3 3 3 3 3 70 T 12 13 3 Transcend Information Inc 86 V1 0 TS16G 64GCF400 400X CompactFlash Card PEE F Conveyance self test routine recommended polling time in minutes 4 4 374 375385 R Reseved o Vendor specific F the content of the byte is fixed and does not change V the content of the byte is variable and may change depending on the state of the device or the commands executed by the device X the content of the byte is vendor specific and may be fixed or variable R the content of the byte is reserved and shall be zero N Nth Management Unit 4 Byte value MSB 2 1 LSB Transcend Information Inc 97 TS16G 64GCF40
38. E ua Bus True IDE Mode PIO Word PIO Word Data Register PIO Word Data Register DBD DO DMA Word Dala Regi pep TO PIO Byte Data Register Selected Using Set Features Command Notes 1 REG signal is mode dependent Signal shall be 0 for YO mode and 1 for Memory Mode Error Register Address 1F1h 171h Offset 1 ODh Read Only This register contains additional information about the source of an error when an error is indicated in bit O of the Status register D7 DE D5 D4 D3 D2 D1 DO This register is also accessed in PC Card Modes on data bits D15 D8 during a read operation to offset O with CE2 low and CE1 high Bit 7 BBK ICRC this bit is set when a Bad Block is detected This bit is also set when an interface CRC error is detected in True IDE Ultra DMA modes of operation Bit 6 UNC this bit is set when an Uncorrectable Error is encountered Bit 5 this bit is O Bit 4 IDNF the requested sector ID is in error or cannot be found Bit 3 this bit is O Bit 2 Abort This bit is set if the command has been aborted because of a CompactFlash Storage Card status condition Not Ready Write Fault etc or when an invalid command has been issued Bit 1 This bit is O Bit 0 AMNF This bit is set in case of a general error Transcend Information Inc 54 V1 0 TS16G 64GCF400 400X CompactFlash Card gt Feature Register Address 1F1h 171h Offset 1 ODh Write Only This register prov
39. EE High Z Even ins a L Don t Care Even ree Word Word Input Access f6bis Access 16 bits B n opus opus E nasa Transcend Information Inc 45 V1 0 TS16G 64GCF400 400X CompactFlash Card Table PC Card I O Mode UDMA Function DMARDY STROBE DMARQ DMACK STOP HIOE WAIT DMA A10 CE2 CE1 INPACK REG HIOW R WAIT R HIOE CMD A00 operation W W X X alil a XX Standby 00000 Low emt Penn Assert DMARQ a Pepe L Ls OX pue ES sae meTawe 0 o oer se see aan gusti as 0 0 Oo RD Static Data In Burst Device Pause Lao 3 esr We sas aa 0 Buio rass DESERESEREJEJE3 77 EN EN 1 Device Initiating BurstTermination 0 or 1 Static Host Acknowledement of Device Initiated Burst Termination TT 0 or EN sc Static Host Initiating BurstTermination 1 1 1 1 1 1 oer YES Static Device Acknowledging Host Initiated Burst Termination l Device Aligning STROBE to Asserted CTT TFs se ennai ptt 1 jo 1 f 1 1 YES Static Burst Completed 1 DX x pp pe i Lp pa pe Lp 23 pe SEIN po pe e pe x x foo NENNEN NENNEN lillo o o o DEANEM Transcend Information Inc 46 V1 0 TS16G 64GCF400 400X CompactFlash Card Common Memory Transfer Function The Common Memory transfer to or from the CompactFlash Storage can be either 8 or 16 bits Table Common Memory Function Standby Mode Byte Read 8 bits Care L Don t Care Even P Don t Word Read 1
40. Flash Storage Card to set BSY enter the Idle mode clear BSY and generate an interrupt If the sector count is non zero it is interpreted as a timer count with each count being 5 milliseconds and the automatic power down mode is enabled If the sector count is zero the automatic power down mode is disabled Note that this time base 5 msec is different from the ATA specification est fe fs s sy e m Idle Immediate 95h or Eth This command causes the CompactFlash Storage Card to set BSY enter the Idle mode clear BSY and generate an interrupt Bit gt Command 7 95h or Eth oun Cyl Low 4 Sec Num 3 Sec Cnt 2 m Initialize Drive Parameters 91h This command enables the host to set the number of sectors per track and the number of heads per cylinder Only the Sector Count and the Card Drive Head registers are used by this command Bit gt Command 7 9 cme x o X pre MaxHead no of heads Cyl High 5 X m NOP 00h Transcend Information Inc 74 V1 0 TS16G 64GCF400 400X CompactFlash Card This command always fails with the CompactFlash Storage Card returning command aborted Bit gt Command 7 ECCO E IT E RR Read Buffer E4h The Read Buffer command enables the host to read the current contents of the CompactFlash Storage Card s sector buffer This command has the same protocol as the Read Sector s command Bit gt commana E omo x m X
41. GCF400 400X CompactFlash Card Block Diagram 1 5V 2 AN Power On Voltage Reset Detector CF Host dig CF Interface Controller Memory Multiplexer Program RAM LIV Core 3 3V to 1 8V Regulator System Voltage Oscillator Detector Micra Processor Flash Controller Flash U D 3 Flash 1 D s Flash 2 Flash 3 Transcend Information Inc V1 0 CF Reader i CSEL PDIA GH DASP HIRO TESTER F I i i AGLK RST LI i E TO T1 T2 1 i Built in POR VDT OSC Regulator 3 3V to 1 8V Flash Interface FINE 400X CompactFlash Card Flash Channel Flash Channel tea T Transcend Information Inc V1 0 TS16G 64GCF400 400X CompactFlash Card Pin Assignments and Pin T PC Card ni Mode True IDE Modea E noe ET bea e e oo 0 nos a ww uo neces s ow 0 nzors 4 ws wo zos ws vo zo 4 005 10 izoz 5 me wo mnzoz s te vo mzoz s Dos vo nzozs e oo wo nzoz s por vo uzoz s por vo izoz toe ao 7 oe 1 0 7 911 9 No i nz e Ao 1 nz e Ao 1 nz L9 Se ti mr s e m 9 ums t mu to A 1 nz w aw nz 10 Aw nz uM we 1 2 v we 1 nz wP 1 n ta a nz te wr 1 nz te a 1 nz 8 wc __ Power 13 voc Power 13 veo Power bi ii S
42. These modes are permitted to be used only when a single card is present and the host and card are connected directly without a cable exceeding 0 15m in length Consequently the host shall not configure a card into an Advanced Timing Mode if two cards are sharing I O lines as in Master Slave operation nor if it is constructed such that a cable exceeding 0 15 meters is required to connect the host to the card The load presented to the Host by cards supporting Ultra DMA is more controlled than that presented by other CompactFlash cards Therefore the use of a card that does not support Ultra DMA in a Master Slave arrangement with a Ultra DMA card can affect the critical timing of the Ultra DMA transfers The host shall not configure a card into Ultra DMA mode when a card not supporting Ultra DMA is also present on the same interface When the use of two cards on an interface is otherwise permitted the host may use any mode that is supported by both cards but to achieve maximum performance it should use its highest performance mode that is also supported by both cards Metaformat Overview The goal of the Metaformat is to describe the requirements and capabilities of the CompactFlash Storage Card as thoroughly as possible This includes describing the power requirements IO requirements memory requirements manufacturer information and details about the services provided Table Sample Device Info Tuple Information for Extended Speeds speed A
43. Write Transcend Information Inc 39 V1 0 TS16G 64GCF400 400X CompactFlash Card B Attribute Memory Function Attribute memory is a space where CompactFlash Storage Card identification and configuration information are stored and is limited to 8 bit wide accesses only at even addresses The card configuration registers are also located here For CompactFlash Storage Cards the base address of the Card configuration registers is 200h Table Attribute Memory Function HighZ HighZ Odd Byte DES Don t Even Care Byte Even UDMA Operation see section 4 3 18 Ultra DMA Mode Read Write Timing Specification Write B Access CIS 8 bits Invalid Head Byte Access Configuration CompactFlash Storage 8 bits Write Byte Access Don t Even Configuration CompactFlash H L Care Byte Storage 8 bits y bas Word Access CIS Not Valid Write Word Access CIS Dont Even bits Invalid Care Byte Head Word Access Even Configuration CompactFlash Not Valid Bvte Storage 16 bits y Write Word Access Don t Even Care Byte Notes 1 In UDMA operation the REG DMACK signal shall be asserted only in response to DMARQ Configuration CompactFlash Storage 16 bits 2 The CE signals or both the OE signal and the WE signal shall be de asserted between consecutive cycle operations to IT UJ Co IT UJ ITI lt lt lt lt lt lt D 35 D D 5 os Transcend Information Inc 40 V1 0 m Configuration
44. age Card is configured to use the I O interface The clocking shall occur on the negative to positive edge of the signal trailing edge IOWR In True IDE Mode while Ultra DMA mode protocol is not active this signal has the same function as in PC Card I O Mode When Ultra DMA mode protocol is True IDEM E t Ult Rut i i i H i pnan supported this signal must be negated before entering Ultra DMA mode rotocol Active protocol STOP In All Modes while Ultra DMA mode protocol is active the assertion of this signal All Modes Ultra DMA Protocol causes the termination of the Ultra DMA data burst OE This is an Output Enable strobe generated by the host interface It is used to PC Card Memory Mode read data from the CompactFlash Storage Card in Memory Mode and to read the CIS and configuration registers OE In PC Card I O Mode this signal is used to read the CIS and configuration PC Card I O Mode registers S G A To enable True IDE Mode this input should be grounded by the host rue ode READY In Memory Mode this signal is set high when the CompactFlash Storage Card is PC Card Memory Mode ready to accept a new data transfer operation and is held low when the card is busy At power up and at Reset the READY signal is held low busy until the CompactFlash Storage Card has completed its power up or reset function No access of any type should be made to the CompactFlash Storage Card during this time Note however that when a
45. age Sense ie pt to Vcc 10 KO x Rs 100KQ Bater Detect BVDPS Piu soka Notes 1 Control Signals each card shall present a load to the socket no larger than 50 pF io at a DC current of 700 u A low state and 150 yu A high state including pull resistor The socket shall be able to drive at least the following load 10 while meeting all AC timing requirements the number of sockets wired in parallel multiplied by 50 pF with DC current 700 p A low state and 150 u A high state per socket 2 Resistor is optional 3 Status Signals the socket shall present a load to the card no larger than 50 pF io at a DC current of 400 u A low Transcend Information Inc 18 V1 0 TS16G 64GCF400 400X CompactFlash Card state and 100 u A high state including pull up resistor The card shall be able to drive at least the following load 10 while meeting all AC timing requirements 50 pF at a DC current of 400 u A low state and 100 u A high state 4 Status Signals the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 u A low state and 100 u A high state including pull up resistor The card shall be able to drive at least the following load 10 while meeting all AC timing requirements 50 pF at a DC current of 400 u A low state and 100 y A high state 5 Status Signals the socket shall present a load to the card no larger than 50 pF io at a DC current of 400 u A low state and 100 u A high state including pull up resisto
46. are not indicated Bits 1 through 13 of word 83 and bits 0 through 13 of word 84 are reserved Bit 14 of word 83 and word 84 shall be set to one and bit 15 of word 83 and word 84 shall be cleared to zero to provide indication that the features command sets supported words are valid The values in these words should not be depended on by host implementers Bit O of word 82 shall be set to zero the SMART feature set is not supported If bit 1 of word 82 is set to one the Security Mode feature set is supported Bit 2 of word 82 shall be set to zero the Removable Media feature set is not supported Bit 3 of word 82 shall be set to one the Power Management feature set is supported Bit 4 of word 82 shall be set to zero the Packet Command feature set is not supported If bit 5 of word 82 is set to one write cache is supported If bit 6 of word 82 is set to one look ahead is supported Bit 7 of word 82 shall be set to zero release interrupt is not supported Bit 8 of word 82 shall be set to zero Service interrupt is not supported Bit 9 of word 82 shall be set to zero the Device Reset command is not supported Bit 10 of word 82 shall be set to zero the Host Protected Area feature set is not supported Bit 11 of word 82 is obsolete Bit 12 of word 82 shall be set to one the CompactFlash Storage Card supports the Write Buffer command Bit 13 of word 82 shall be set to one the CompactFlash Storage Card supports the Read Buffer command Bit 1
47. are not used in True IDE mode 1 2 3 4 Several signal lines are redefined to provide different functions during an Ultra DMA data burst These lines assume their UDMA definitions when 1 anUltra DMA mode is selected and 2 ahost issues a READ DMA or a WRITE DMA command requiring data transfer and 3 the device asserts DMARQ and 4 the host asserts DMACK These signal lines revert back to the definitions used for non Ultra DMA transfers upon the negation of DMACK by the host at the termination of an Ultra DMA data burst With the Ultra DMA protocol the STROBE signal that latches data from D 15 00 is generated by the same agent either host or device that drives the data onto the bus Ownership of D 15 00 and this data strobe signal are given either to the device during an Ultra DMA data in burst or to the host for an Ultra DMA data out burst During an Ultra DMA data burst a sender shall always drive data onto the bus and after a sufficient time to allow for propagation delay cable settling and setup time the sender shall generate a STROBE edge to latch the data Both edges of STROBE are used for data transfers so that the frequency of STROBE is limited to the same frequency as the data Words in the IDENTIFY DEVICE data indicate support of the Ultra DMA feature and the Ultra DMA modes the device is capable of supporting The Set transfer mode subcommand in the SET FEATURES command shall be used by a host to select the U
48. card is powered up and used with RESET continuously disconnected or asserted the Reset function of the RESET pin is disabled Consequently the continuous assertion of RESET from the application of power shall not cause the READY signal to remain continuously in the busy state IREQ I O Operation After the CompactFlash Storage Card Card has been PC Card I O Mode configured for I O operation this signal is used as Interrupt Request This line is strobed low to generate a pulse mode interrupt or held low for a level mode interrupt INTRQ True IDE Mode In True IDE Mode signal is the active high Interrupt Request to the host Transcend Information Inc 13 V1 0 TS16G 64GCF400 400X CompactFlash Card Signal Name FEE CEE REG PC Card Memory Mode Except Ultra DMA Protocol Active Attribute Memory Select REG PC Card I O Mode Except Ultra DMA Protocol Active DMACK PC Card Memory Mode when Ultra DMA Protocol Active DMACK PC Card I O Mode when Ultra DMA Protocol Active DMACK True IDE Mode RESET PC Card Memory Mode RESET PC Card I O Mode RESET True IDE Mode VCC PC Card Memory Mode VCC PC Card I O Mode VCC True IDE Mode Transcend Information Inc This signal is used during Memory Cycles to distinguish between Common Memory and Register Attribute Memory accesses High for Common Memory Low for Attribute Memory In PC Card Memory Mode when Ultra DM
49. cle Memory Mode Heserved Bits 8 6 Maximum PC Card I O UDMA timing mode supported Indicates the Maximum PC Card I O UDMA timing Transcend Information Inc 72 V1 0 TS16G 64GCF400 400X CompactFlash Card mode supported by the card when bit 15 is set 0 PC Card I O UDMA mode O supported 6 PC Card VOUDMA mode 6 supported Bits 11 9 Maximum PC Card Memory UDMA timing mode supported Indicates the Maximum PC Card Memory UDMA timing mode supported by the card when bit 15 is set 0 PC Card Memory UDMA mode 0 supported 1 PC Card Memory UDMA mode 1 supported 2 PC Card Memory UDMA mode 2 supported 3 PC Card Memory UDMA mode 3 supported 4 PC Card Memory UDMA mode 4 supported 5 PC Card Memory UDMA mode 5 supported 6 PC Card Memory UDMA mode 6 supported Bits 14 12 PC Card Memory or I O UDMA timing mode selectedIndicates the PC Card Memory or I O UDMA timing mode selected by the card 0 EC Card VOUDMAmodeOselected Bit 15 PC Card Memory and IO Modes Supported This bit when set indicates that the PC Card UDMA support values in bits 11 6 are valid When this bit is cleared PC Card Memory and IO Modes are not supported by the device Transcend Information Inc 73 V1 0 TS16G 64GCF400 400X CompactFlash Card B idle 97h or E3h This command causes the Compact
50. cylinders heads and sectors If bit 1 of word 53 is set to 1 the values in words 64 through 70 are valid If this bit is cleared to 0 the values reported in words 64 70 are not valid Any CompactFlash Storage Card that supports PIO mode 3 or above shall set bit 1 of word 53 to one and support the fields contained in words 64 through 70 gt Current Number of Cylinders Heads Sectors Track These fields contains the current number of user addressable Cylinders Heads and Sectors Track in the Transcend Information Inc 66 V1 0 TS16G 64GCF400 400X CompactFlash Card current translation mode gt Current Capacity This field contains the product of the current cylinders times heads times sectors gt Multiple Sector Setting Bits 15 9 are reserved and shall be set to 0 Bit 8 shall be set to 1 indicating that the Multiple Sector Setting is valid Bits 7 0 are the current setting for the number of sectors that shall be transferred per interrupt on Read Write Multiple commands gt Total Sectors Addressable in LBA Mode This field contains the total number of user addressable sectors for the CompactFlash Storage Card in LBA mode only gt Multiword DMA transfer Bits 15 through 8 of word 63 of the Identify Device parameter information is defined as the Multiword DMA mode selected field If this field is supported bit 1 of word 53 shall be set to one This field is bit significant Only one of bits may be set to one in this field b
51. duct life Transfer rate up to read 90MB s write 60MB s based on TestMetrix Transcend Information Inc V1 0 TS16G 64GCF400 400X CompactFlash Card Specification Interface Specification Drivers No Device Driver Required ATA ATAPI 7 m PIO Mode 0 6 ATA Compatibility Multiword mode 0 4 UDMA Mode 0 6 Form Factor N Cars Dimensions mm Width 42 80 0 10 Environmental Specifications Operating Temperature 25 c to 85 c Storage Temperature 40 c to 85 c Humidity Operating Humidity Non condensation 5 to 95 Storage Humidity Non condensation 5 to 95 Note 24 hours chamber test on ASUS Striker 2 Extreme 1GB RAM Windows XP Version 2002 SP3 Power Consumption Product TSt GF400 TS32GCF400 TS64GCF400 Power Standby 0 2mA Consumption 221 0mA 225 7mA 231 6mA DC 3 3V 25 C 213 2mA 231 7mA 205 7mA Transcend Information Inc 2 V1 0 400X CompactFlash Card Note 25 C according to IDE to CF card transferring board test on ASUS P4S800 MX 1GB RAM IDE interface support UDMAG Windows XP Version 2002 SP2 CrystalDiskMark copied file 100MB Actual Capacity ActualCapacity Model PIN UsertBA Cylinder Med Sector Note FAT32 format 1 60mm 05 063 in 002 3 30mm 10 1380 in A 04 A N 2 LIO uu gs E e de e M a GEL E A A E i C ra ie b H AAR 020 in Transcend Information Inc 3 V1 0 TS16G 64
52. e CompactFlash Storage Card and the CPU Hosts that support a single socket per interface logic such as for Advanced Timing Modes and Ultra DMA operation may ignore the INPACK signal from the device and manage their input buffers based solely on Card Enable signals This signal is a DMA Request that is used for DMA data transfers between host and device It shall be asserted by the device when it is ready to transfer data to or from the host For Multiword DMA transfers the direction of data transfer is controlled by HIOE and IOWR This signal is used in a handshake manner with DMACK i e the device shall wait until the host asserts DMACK before negating DMARQ and re asserting DMARQ if there is more data to transfer In PCMCIA I O Mode the DMARQ shall be ignored by the host while the host is performing an I O Read cycle to the device The host shall not initiate an I O Read cycle while DMARQ is asserted by the device In True IDE Mode DMARQ shall not be driven when the device is not selected in the Drive Head register While a DMA operation is in progress CSO CE1 and CS1 CE2 shall be held negated and the width of the transfers shall be 16 bits If there is no hardware support for True IDE DMA mode in the host this output signal is not used and should not be connected at the host In this case the BIOS must report that DMA mode is not supported by the host so that device drivers will not attempt DMA mode operat
53. e ee eee TII See N A k Oo O1 18 po x pops 9 po RT L nz e at nz s aw 1 nz 1 1 1 1 row o a0 62 20 _s00 a io won a we 10 wzom s po vo nz 0z i nzo z po vo mzom z poi vo nz oz uo wzom s w vo wzom s po o nzon o om a oss o om 2 0 oe o cora 25 c o Grouna s c 0 croua o coma c o Groua 26 c 0 Ground Tio zor z ow vo zo z on vo nzon Luo mzon z ww vo mzom s DIE vo fuz ozo wo nzo s ww vo mzom s ww vo nz ozo Luo mzon x bw vo mzon s ww vo nz oza vo won si os vo zos ar ww vo nzon cep m e m se on a vst o Groune ss vst o Ground Transcend Information Inc V1 0 TS16G 64GCF400 400X CompactFlash Card PC Card L Mode PC Card I O Mode True IDE Modes Pin Signal Name In Qui Pin Signal Name In Qui Pin Signal Name In Out Num a Type Num one Type Num a Type HIOE HIOE HIOE 34 HSTROBE HSTROBE HSTROBE HDMARDY HDMARDY E 4OWR 4OWR 4OWR sca a EM Se c pee o pe pr poe o pop poma o p Cw wc Power se we Power se we Power wwe pa pe pepe pa pe woe 3 p 9 LINK ABER IK ANE NRI IR ANE BERE 3 Reset i pm e we 3 reser 3 m O WAT O WAT IORDY ON1 s ETT OT DDMARDY on DSTROBE DSTROBE DSTROBE p M OT1 43 DMARQ OZ1 DMARQ
54. e than 0 5 shorter than either STROBE trace as measured from the IC pin to the connector Ultra DMA Mode Cabling Requirement Y Operation in Ultra DMA mode requires a crosstalk suppressing cable The cable shall have a grounded line between each signal line V For True IDE mode operation using a cable with IDE ATA type 40 pin connectors it is recommended that the host sense the cable type using the method described in the ANSI INCITS 361 2002 AT Attachment 6 standard to prevent use of Ultra DMA with a 40 conductor cable Transcend Information Inc 21 V1 0 TS16G 64GCF400 400X CompactFlash Card B Attribute Memory Read Timing Specification Attribute Memory access time is defined as 300 ns Detailed timing specs are shown in Table below Speed Version 80S Hem Symbol IEEE Symbol Minns Maxns Read Cycle Time te R tAVAV 8300 Address Access Time ta A tAVOV y 300 Card Enable Access Time ta CE tELOV o 300 Output Enable Access Time taOE tGLOV 150 Output Disable Time from CE tdis CE tEHQZ 100 Output Disable Time from OE tdis OE tGHOZ 100 X Address Setup Time isu A tAVGL 830 O Output Enable Time from CE ten CE tELQNZ 5 O Output Enable Time from OE ten OE tGLQNZ_ 5 y O
55. eature 24 Set Multiple Mode 25 Set Sleep Mode 26 CD CD D D x tandby 27 Standby Immediate ECCO m ECh Support E3h or 97h CD upport E6h or 99h LD upport E2 or 96h CD upport EO or 94h CD upport r Suppor E1h or 95h 23 ere re H ar ES ES m E ca EX m f DT E Swn E Swn a mm Transcend Information Inc C1 CLO V1 0 TS16G 64GCF400 28 Security Disable Password F6h 29 Security Erase Prepare F3h F4h 30 Security Erase Unit 31 Security Freeze Lock F5h 32 Security Set Password Fih 33 Security Unlock F2h 34 Translate Sector 87h 35 Wear Level F5h 36 Write Buffer E8 i 37 Write DMA CAh 38 32h or 33h Write Long Sector 39 Write Multiple C5h 40 Write Multiple w o Erase CDh 41 Write Sector s 30h or 31h 42 Write Sector s w o Erase 38h 43 Write Verify 3Ch 1 This command is optional depending on the key Management scheme in use 2 Use of this command is not recommended by CFA Definitions FR Features Register SC Sector Count register OOH to FFH OOH means 256 sectors SN Sector Number register CY Cylinder Low High register DH Head No 0 to 15 of Drive Head register LBA Logic Block Address Mode Support Not used for the command Y Used for the command Transcend Information Inc 60 bdd fpf teh fey Ki fl fi i i a Ki iii uc kkk A 400X C
56. ecurity mode is enabled indicates that the security level is high Bit 5 Enhanced security erase unit feature supported If set to 1 indicates that the Enhanced security erase unit feature set is supported Bit 4 Expire If set to 1 indicates that the security count has expired and Security Unlock and Security Erase Unit are command aborted until a power on reset or hard reset Bit 3 Freeze If set to 1 indicates that the security is Frozen Bit 2 Lock If set to 1 indicates that the security is locked Bit 1 Enable Disable If set to 1 indicates that the security is enabled If set to 0 indicates that the security is disabled Bit 0 Capability If set to 1 indicates that CompactFlash Storage Card supports security mode feature set If set to O indicates that CompactFlash Storage Card does not support security mode feature set gt Word 160 Power Requirement Description This word is required for CompactFlash Storage Cards that support power mode 1 Bit 15 VLD Transcend Information Inc 70 V1 0 TS16G 64GCF400 400X CompactFlash Card If set to 1 indicates that this word contains a valid power requirement description If set to O indicates that this word does not contain a power requirement description Bit 14 RSV This bit is reserved and shall be O Bit 13 XP If set to 1 indicates that the CompactFlash Storage Card does not have Power Level 1 commands If set to O indicates that the CompactFlash Storage Card has Po
57. ed Multiword DMA transfer cycle time Word 66 of the parameter information of the Identify Device command is defined as the recommended Transcend Information Inc 67 V1 0 TS16G 64GCF400 400X CompactFlash Card Multiword DMA transfer cycle time This field defines in nanoseconds the cycle time that if used by the host may optimize the data transfer from by reducing the probability that the CompactFlash Storage Card will need to negate the DMARQ signal during the transfer of a sector If this field is supported bit 1 of word 53 shall be set to one The value in word 66 shall not be less than the value in word 65 This field shall be supported by all CompactFlash Storage Cards supporting DMA modes 1 and above If bit 1 of word 53 is set to one but this field is not supported the Card shall return a value of zero in this field gt Word 67 Minimum PIO transfer cycle time without flow control Word 67 of the parameter information of the Identify Device command is defined as the minimum PIO transfer without flow control cycle time This field defines in nanoseconds the minimum cycle time that if used by the host the CompactFlash Storage Card guarantees data integrity during the transfer without utilization of flow control If this field is supported Bit 1 of word 53 shall be set to one Any CompactFlash Storage Card that supports PIO mode 3 or above shall support this field and the value in word 67 shall not be less than the value reported
58. ed to select the drive and head It is also used to select LBA addressing instead of cylinder head sector addressing Bit 7 this bit is specified as 1 for backward compatibility reasons It is intended that this bit will become obsolete in a future revision of the specification This bit is ignored by some controllers in some commands Bit 6 LBA is a flag to select either Cylinder Head Sector CHS or Logical Block Address Mode LBA When LBA 0 Cylinder Head Sector mode is selected When LBA 1 Logical Block Address is selected In Logical Block Mode the Logical Block Address is interpreted as follows LBA7 LBAO Sector Number Register D7 DO LBA15 LBA8 Cylinder Low Register D7 DO LBA23 LBA16 Cylinder High Register D7 DO LBA27 LBA24 Drive Head Register bits HS3 HSO Bit 5 this bit is specified as 1 for backward compatibility reasons It is intended that this bit will become obsolete in a future revisions of the specification This bit is ignored by some controllers in some commands Bit 4 DRV DRV is the drive number When DRV 0 drive card 0 is selected When DRV 1 drive card 1 is selected Setting this bit to 1 is obsolete in PCMCIA modes of operation If the obsolete functionality is support by a CF Storage Card the CompactFlash Storage Card is set to be Card 0 or 1 using the copy field Drive of the PCMCIA Socket amp Copy configuration register Bit 3 HS3 when operating in the Cylinder Head Sector mode this is bit 3 of
59. ee Dll NOTE 1 ORDY is not supported in this mode 2 Maximum load on IORD Y is 1 LSTTL with a 50 pF 40 pF below 120 nsec cycle time total load All time intervals are recorded in nanoseconds Although minimum time from JORDY high to HIOE high is 0 nsec the minimum HIOES width is still met HD refers to data provided by the CompactFlash Card to the system Although adhering to the PCMCIA specification of 12 us the Wait Width time is intentionally lower in this specification HA x o F tsuHA HIOE HREG N isuHREGIHIOE Eee thHA HIOE IhHREG HIOE pt A isuCEx HIDE CEx i ihCEx HIOE tw HIOE E HIQE ARIDO infHIDE HD 4 lt E HdiORDY HIDE K IORDY IORDY i iwilORDY Transcend Information Inc 26 V1 0 TS16G 64GCF400 400X CompactFlash Card m lO Output Write Timing Specification IEEE Data Hold following HIOW th HIOW tIWHDX 3 fao s s5 HIOW Width Time tw HIOW Address Setup before HIOW tsuA HIOW Address Hold following HIOW thA HIOW CEx Setup before HIOW tsuCE HIOW uwe 5 5 5 s CEx Hold following HIOW thCE HIOW wHEH 20 20 to 10 HREG Setup before HIOW tsuREG HIOW aReuwe 5 s s s HREG Hold following HIOW thREG HIOW tiwHRGH o ol of o Wait Delay Falling from HIOW tdWT HIOW awewe 35 38 85 Na HIOW high from Wait high tdrHIOW IORDY wriwH fof Jof Jol Na NOTE 1 JORDY is not supported in this mode 2 The maximum load
60. er at the end of the command Transcend Information Inc 61 V1 0 TS16G 64GCF400 400X CompactFlash Card B Erase Sector s COh This command is used to pre erase and condition data sectors in advance of a Write without Erase or Write Multiple without Erase command There is no data transfer associated with this command but a Write Fault error status can Occur Command 7 SITIO oad LBA 2728 Cyl High 5 Cylinder High LBA 23 16 m Flush Cache E7h This command causes the card to complete writing data from its cache The card returns status with RDY 1 and DSC 1 after the data in the write cache buffer is written to the media If the Compact Flash Storage Card does not support the Flush Cache command the Compact Flash Storage Card shall return command aborted Bit gt Command 7 ommo o oS oooO Cyl Low 4 Sec Num 3 Sec Cnt 2 Feature 1 Format Track 50h This command writes the desired head and cylinder of the selected drive with a vendor unique data pattern typically FFh or 00h To remain host backward compatible the CompactFlash Storage Card expects a sector buffer of data from the host to follow the command with the same protocol as the Write Sector s command although the information in the buffer is not used by the CompactFlash Storage Card If LBA 1 then the number of sectors to format is taken from the Sec Cnt register 0 256 The use of this command is not recommended Bit gt
61. et to the card This register can be written even if the device is BUSY The bits are defined as follows D7 D D5 Dd D3 D2 D1 DO xo x xo xo x swe den 0 Bit 7 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to 0 Bit 6 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to O Bit 5 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to O Bit 4 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to O Bit 3 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to 0 Bit 2 SW Rst this bit is set to 1 in order to force the CompactFlash Storage Card to perform an AT Disk controller Soft Reset operation This does not change the PCMCIA Card Configuration Registers as a hardware Reset does The Card remains in Reset until this bit is reset to 0 Bit 1 IEn the Interrupt Enable bit enables interrupts when the bit is 0 When the bit is 1 interrupts from the CompactFlash Storage Card are disabled This bit also controls the Int bit in the Configuration and Status Register This bit is set to 0 at power on and Reset Bit 0 this bit is ignored by the CompactFlash Storage Card Transcend Information Inc 57 V1 0 TS16G 64GCF400 400X CompactFlash Card gt Card Drive Address Register Address 3F7h 377h O
62. f the word CE1 accesses the even byte or the Odd byte of the Card Enable word depending on AO and CE2 A multiplexing scheme based on AO CE1 CE2 allows 8 bit hosts to access all data on DO D7 See Table 27 Table 29 Table 31 Table 35 Table 36 and Table 37 CE1 CE2 This signal is the same as the PC Card Memory Mode signal PC Card I O Mode Card Enable CSO CS1 In the True IDE Mode CS0 is the address range select for the task file True DE Mode registers while CS1 is used to select the Alternate Status Register and the Device Control Register While DMACK is asserted CS0 and CS1 shall be held negated and the width of the transfers shall be 16 bits CSEL This signal is not used for this mode but should be connected by the host to PC PC Card Memory Mode Card A25 or grounded by the host CSEL This signal is not used for this mode but should be connected by the host to PC PC Card I O Mode Card A25 or grounded by the host CSEL This internally pulled up signal is used to configure this device as a Master or a True IDE Mode Slave when configured in the True IDE Mode When this pin is grounded this device is configured as a Master When the pin is open this device is configured as a Slave D15 DOO 31 30 29 28 These lines carry the Data Commands and Status information between the host PO Cara Memory Mode 27 49 48 47 land the controller DOO is the LSB of the Even Byte of the Word D08 is the LSB B of
63. ffset Fh This register is provided for compatibility with the AT disk drive interface It is recommended that this register not be mapped into the host s I O space because of potential conflicts on Bit 7 DI DE D5 D4 D3 D2 D1 DO x we ass 82 HS nso nDS noso Bit 7 this bit is unknown Implementation Note Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operating at the same addresses as the CompactFlash Storage Card Following are some possible solutions to this problem for the PCMCIA implementation 1 Locate the CompactFlash Storage Card at a non conflicting address i e Secondary address 377 or in an independently decoded Address Space when a Floppy Disk Controller is located at the Primary addresses 2 Donotinstall a Floppy and a CompactFlash Storage Card in the system at the same time 3 Implement a socket adapter that can be programmed to conditionally tri state D7 of I O address 3F7h 377h when a CompactFlash Storage Card is installed and conversely to tristate D6 DO of I O address 3F7h 377h when a floppy controller is installed 4 Do not use the CompactFlash Storage Card s Drive Address register This may be accomplished by either a If possible program the host adapter to enable only I O addresses 1FOh 1F7h 3F6h or 170h 177h 176h to the CompactFlash Storage Card or b if provided use an additional Primary Secondary configuration in the Compac
64. forming CompactFlash Storage Card operations This bit is cleared at power up and remains cleared until the CompactFlash Storage Card is ready to accept a command Bit 5 DWF This bit if set indicates a write fault has occurred Bit 4 DSC This bit is set when the CompactFlash Storage Card is ready Bit 3 DRQ The Data Request is set when the CompactFlash Storage Card requires that information be transferred either to or from the host through the Data register During the data transfer of DMA commands the Card shall not assert DMARQ unless either the BUSY bit the DRQ bit or both are set to one Bit 2 CORR This bit is set when a Correctable data error has been encountered and the data has been corrected This condition does not terminate a multi sector read operation Bit 1 IDX This bit is always set to O Bit 0 ERR This bit is set when the previous command has ended in some type of error The bits in the Error register contain additional information describing the error It is recommended that media access commands such as Read Sectors and Write Sectors that end with an error condition should have the address of the first sector in error in the command block registers Transcend Information Inc 56 V1 0 TS16G 64GCF400 400X CompactFlash Card gt Device Control Register Address 3F6h 376h Offset Eh This register is used to control the CompactFlash Storage Card interrupt request and to issue an ATA soft res
65. gured This signal remains true until the condition that caused the interrupt request has been serviced If interrupts are disabled by the IEN bit in the Device Control Register this bit is a zero 0 Transcend Information Inc 42 400X CompactFlash Card m Pin Replacement Register Base 04h in Attribute Memory Operation D7 D6 D5 D4 D3 D2 D1 DO Read 0 0 cReady cwrrot 1 1 RReady WProt Wite o o CReady CWProt o o MReady MWPro Pin Replacement Register CReady this bit is set to one 1 when the bit RReady changes state This bit can also be written by the host CWProt this bit is set to one 1 when the RWprot changes state This bit may also be written by the host RReady this bit is used to determine the internal state of the READY signal This bit may be used to determine the state of the READY signal as this pin has been reallocated for use as Interrupt Request on an I O card When written this bit acts as a mask MReady for writing the corresponding bit CReady WProt this bit is always zero 0 since the CompactFlash Storage Card or CF Card does not have a Write Protect switch When written this bit acts as a mask for writing the corresponding bit CWProt MReady this bit acts as a mask for writing the corresponding bit CReady MWProt this bit when written acts as a mask for writing the corresponding bit CWProt Pin Replacement Changed Bit Mask Bit Values Final ur 13 B i
66. he input is specified as an I2Z because the resistor is not necessarily detectable in the input current leakage test 10 Host and card restrictions for CF Advanced Timing Modes and Ultra DMA modes Additional Requirements for CF Advanced Timing Modes and Ultra DMA Electrical Requirements for additional required limitations on the implementation of CF Advanced Timing modes and Ultra DMA modes respectively m Additional Requirements for CF Advanced Timing Modes The CF Advanced Timing modes include PC Card I O and Memory modes that are 100ns or faster PC Card Ultra DMA modes 3 or above and True IDE PIO Modes 5 6 Multiword DMA Modes 3 4 and True IDE Ultra DMA modes 3 or above When operating in CF Advanced timing modes the host shall conform to the following requirements 1 Only one CF device shall be attached to the CF Bus 2 The host shall not present a load of more than 40pF to the device for all signals including any cabling 3 The maximum cable length is 0 15 m 6 in The cable length is measured from the card connector to the host controller 0 46 m 18 in cables are not supported 4 The WAIT and IORDY signals shall be ignored by the host Devices supporting CF Advanced timing modes shall also support slower timing modes to ensure operability with systems that do not support CF Advanced timing modes Transcend Information Inc 19 V1 0 TS16G 64GCF400 400X CompactFlash Card m Ultra DMA Electrical Requirements gt Host
67. he value of OAh that preserves the corresponding bits from the 848Ah CF signature value gt Word 1 Default Number of Cylinders This field contains the number of translated cylinders in the default translation mode This value will be the Transcend Information Inc 65 V1 0 TS16G 64GCF400 400X CompactFlash Card same as the number of cylinders gt Word 3 Default Number of Heads This field contains the number of translated heads in the default translation mode gt Word 6 Default Number of Sectors per Track This field contains the number of sectors per track in the default translation mode gt Words 7 8 Number of Sectors per Card This field contains the number of sectors per CompactFlash Storage Card This double word value is also the first invalid address in LBA translation mode gt Words 10 19 Serial Number This field contains the serial number for this CompactFlash Storage Card and is right justified and padded with spaces 20h gt Word 22 ECC Count This field defines the number of ECC bytes used on each sector in the Read and Write Long commands This value shall be set to 0004h gt Words 23 26 Firmware Revision This field contains the revision of the firmware for this product gt Words 27 46 Model Number This field contains the model number for this product and is left justified and padded with spaces 20h gt Word 47 Read Write Multiple Sector Count Bits 15 8 shall be the recommended value of
68. hen tRD shall be met and t5 is not applicable 4 t7 and t8 apply only to modes 0 1 and 2 For other modes this signal is not valid 5 IORDY is not supported in this mode Transcend Information Inc 28 V1 0 TS16G 64GCF400 400X CompactFlash Card 1B 10 H Ex XL LEX i HIOE n a p ae HD TT Read E HD Ala i hl er a Bz IOC S168 i IORDY es See Note 4a IORDY see Note 4b Figure 11 True IDE Mode Read Write Timing NOTE 1 Device address comprises CET s CE2 and HA 2 0 2 Data comprises HD 15 0 16 bit or HD 7 0 8 hit 3 lOCS 164 is shown for PIO modes 0 1 and 2 For other modes this signal is ignored 4 The negation of IORD Y by the device is used to lengthen the PIO cycle Whether the cycle is to be extended is determined by the nost after t from the assertion af HIOEF or HIOW The assertion and negation of IORDY is described in the following three cases a The device never negates IORD Y No wait is generated b Device drives IORD low before th a wait is generated The cycle is completed after JORDY is reasserted For cycles in which a wait is generated and HIOE is asserted the device places read data on D15 D000 for tRD before IORD is asserted Transcend Information Inc 29 V1 0 TS16G 64GCF400 400X CompactFlash Card B True IDE Multiword DMA Mode Read Write Timing Specification Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 ns ns ns ns C
69. host to enable or disable write cache in CompactFlash Storage Cards that implement write cache When the subcommand disable write cache is issued the CompactFlash Storage Card shall initiate the sequence to flush cache to non volatile memory before command completion Feature O3h allows the host to select the PIO or Multiword DMA transfer mode by specifying a value in the Sector Transcend Information Inc 78 V1 0 TS16G 64GCF400 400X CompactFlash Card Count register The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value One PIO mode shall be selected at all times For Cards which support DMA one Multiword DMA mode shall be selected at all times The host may change the selected modes by the Set Features command Set Multiple Mode C6h sesta Te TT Ta Ta Ta Te ECCO E come x x X Cyl High 5 eum E ESTONE Sec Cnt 2 Sector Count m Set Sleep Mode 99h or E6h Lm Terprersla Is a X Iml E enone Peyton X _ senma X EC NE SN m Standby 96h or E2h ws fe fe tele fells eme xd oe emem x Transcend Information Inc 79 V1 0 400X CompactFlash Card m Standby Immediate 94h or EOh TT Tsao E Cyl Low 4 rmmmem Xx m Translate Sector 87h Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 n
70. ides information regarding features of the CompactFlash Storage Card that the host can utilize This register is also accessed in PC Card modes on data bits D15 D8 during a write operation to Offset O with CE2 low and CE1 high gt Sector Count Register Address 1F2h 172h Offset 2 This register contains the numbers of sectors of data requested to be transferred on a read or write operation between the host and the CompactFlash Storage Card If the value in this register is zero a count of 256 sectors is specified If the command was successful this register is zero at command completion If not successfully completed the register contains the number of sectors that need to be transferred in order to complete the request gt Sector Number LBA 7 0 Register Address 1F3h 173h Offset 3 This register contains the starting sector number or bits 7 0 of the Logical Block Address LBA for any CompactFlash Storage Card data access for the subsequent command gt 6 1 5 5 Cylinder Low LBA 15 8 Register Address 1F4h 174h Offset 4 This register contains the low order 8 bits of the starting cylinder address or bits 15 8 of the Logical Block Address gt Cylinder High LBA 23 16 Register Address 1F5h 175h Offset 5 This register contains the high order bits of the starting cylinder address or bits 23 16 of the Logical Block Address gt Drive Head LBA 27 24 Register Address 1F6h 176h Offset 6 The Drive Head register is us
71. ion A host that does not support DMA mode and implements both PC Card and True IDE modes of operation need not alter the PC Card mode connections while in True IDE mode as long as this does not prevent proper operation in any mode This signal is not used in this mode This is an I O Read strobe generated by the host This signal gates I O data onto the bus from the CompactFlash Storage Card when the card is configured to use the I O interface In True IDE Mode while Ultra DMA mode is not active this signal has the same function as in PC Card I O Mode In all modes when Ultra DMA mode DMA Read is active this signal is asserted by the host to indicate that the host is ready to receive Ultra DMA data in bursts The host may negate HDMARDY to pause an Ultra DMA transfer In all modes when Ultra DMA mode DMA Write is active this signal is the data out strobe generated by the host Both the rising and falling edge of HSTROBE cause data to be latched by the device The host may stop generating HSTROBE edges to pause an Ultra DMA data out burst 12 V1 0 TS16G 64GCF400 400X CompactFlash Card Signal Name D CI IOWR This signal is not used in this mode PC Card Memory Mode Except Ultra DMA Protocol Active IOWR The I O Write strobe pulse is used to clock I O data on the Card Data bus into PC Card I O Mode Except Ultra the CompactFlash Storage Card controller registers when the CompactFlash DMA Protocol Active Stor
72. later time to continue DMA transfer operations 2 The host may negate this signal to suspend the DMA transfer in progress B True IDE Ultra DMA Mode Read Write Timing Specification Ultra DMA operations can take place in any of the three basic interface modes PC Card Memory mode PC Card I O mode Transcend Information Inc 31 V1 0 TS16G 64GCF400 400X CompactFlash Card and True IDE the original mode to support UDMA The usage of signals in each of the modes is shown in Table 24 Ultra DMA Signal Usage In Each Interface Mode Pin Non l PC CARD MEM PCCARDIO MODE TRUE IDE MODE UDMA Signal Type UE MODE UDMA UDMA UDMA DMARQ Output 43 INPACK DMARQ DMARQ DMARQ 4 HREG REG DMACK DMACK DMACK HIOW 35 HIOW STOP 1 STOP 1 STOP 1 44 5 HDMARDY R HDMARDY R HDMARDY R HIE 94 CHIOE SHSTROBE W HSTROBE W HSTROBE W 9 4 DDMARDY W DDMARDY W DDMARDY W al 9 7 too 7 CE1 CE1 CE1 CS0 31 CE2 CE2 CE2 CS1 Notes 1 The UDMA interpretation of this signal is valid only during an Ultra DMA data burst The UDMA interpretation of this signal is valid only during and Ultra DMA data burst during a DMA Read command The UDMA interpretation of this signal is valid only during an Ultra DMA data burst during a DMA Write command The HSTROBE and DSTROBE signals are active on both the rising and the falling edge 5 Address lines 03 through 10
73. lect the CompactFlash Storage Card the registers are accessed in the block of I O space decoded by the system as follows Table Contiguous I O Decoding as x at some oa 3owns nores o o o o 0 amn anes 1 o o 0 1 1 emo reus 2 Lo o a o 2 seaorcam secorcom Lo 0 1 3 serno sew o ror aeie indertow ofa fo la s omn Omm Lo 1 1 0 s saec Gard ead Saman EB zi s ome EN 1 EB To o fo s bwetenobm ou evenwe data 2 i 0 0 1 o bonas pu ammas 2 rata fo a o betm berews 2 ro c maas De rata Pa 1 or p bie adios mea Transcend Information Inc 52 V1 0 TS16G 64GCF400 400X CompactFlash Card B Memory Mapped Addressing When the CompactFlash Storage Card registers are accessed via memory references the registers appear in the common memory space window 0 2K bytes as follows Gc ei Ea E i Lid im MI K iW EHH KH EE L mc 34 x CH U HUK eee K E Ri CH ere n meme www 1 1 fol x o 0 1 1 3 Sedorto SebrNo 1 0 x 0o 1 0 0 4 cyindertow Cyinderton i fe x ofafjof1 5 OleHoh awena LOIR je t 1 8 e ieiunus Lt ja x gessi rp mue cm _ __ ja x e s s u 4 teen nb EREA COODER L Ea a uem te _ Lt 5 x aa ale win bosa _ pt fol x 1 1 t 1 E DeAdies Reserved pt 1 X x x x o 8 evenropata EvnWRDsa 3 1 1 X x x x t 9 OdRDDsa odwroaa 3
74. ltra DMA mode at which the system operates The Ultra DMA mode selected by a host shall be less than or equal to the fastest mode of which the device is capable Only one Ultra DMA mode shall be selected at any given time All timing requirements for a selected Ultra DMA mode shall be satisfied Devices supporting any Ultra DMA mode shall also support all slower Ultra DMA modes Transcend Information Inc 32 V1 0 TS16G 64GCF400 400X CompactFlash Card An Ultra DMA capable device shall retain the previously selected Ultra DMA mode after executing a software reset sequence or the sequence caused by receipt of a DEVICE RESET command if a SET FEATURES disable reverting to defaults command has been issued The device may revert to a Multiword DMA mode if a SET FEATURES enable reverting to default has been issued An Ultra DMA capable device shall clear any previously selected Ultra DMA mode and revert to the default non Ultra DMA modes after executing a power on or hardware reset Both the host and device perform a CRC function during an Ultra DMA data burst At the end of an Ultra DMA data burst the host sends its CRC data to the device The device compares its CRC data to the data sent from the host If the two values do not match the device reports an error in the error register If an error occurs during one or more Ultra DMA data bursts for any one command the device shall report the first error that occurred If the device detects that a CRC err
75. noseconds Minimum time from IORDY high to HIOE high is 0 nsec but minimum HIOE width shall still be met t2i t3 t4 t5 t6 6Z T e t8 9 t 3 tA tB tC 1 t0 is the minimum total cycle time t2 is the minimum command active time and t2i is the minimum command recovery time or command inactive time The actual cycle time equals the sum of the actual command active time and the actual command inactive time The three timing requirements of tO t2 and t2i shall be met The minimum total cycle time requirement is greater than the sum of t2 and t2i This means a host implementation can lengthen either or both t2 or t2i to ensure that t0 is equal to or greater than the value reported in the device s identify device data A CompactFlash Storage Card implementation shall support any legal host implementation 2 This parameter specifies the time from the negation edge of HIOE to the time that the data bus is no longer driven by the CompactFlash Storage Card tri state 3 The delay from the activation of HIOE or HIOW until the state of IORDY is first sampled If IORDY is inactive then the host shall wait until IORDY is active before the PIO cycle can be completed If the CompactFlash Storage Card is not driving IORDY negated at tA after the activation of HIOE or HIOW then t5 shall be met and tRD is not applicable If the CompactFlash Storage Card is driving IORDY negated at the time tA after the activation of HIOE or HIOW t
76. ode or 16 bit UO mode so CF cards may respond to this bit XE this bit is set and reset by the host to disable and enable Power Level 1 commands in CF cards If the value is 0 Power Level 1 commands are enabled if it is 1 Power Level 1 commands are disabled Default value at power on or after reset is 0 The host may read the value of this bit to determine whether Power Level 1 commands are currently enabled For CompactFlash cards that do not support Power Level 1 this bit has value 0 and is not writeable Audio this bit is set and reset by the host to enable and disable audio information on SPKR when the CF card is configured This bit should always be zero for CompactFlash Storage cards PwrDwn this bit indicates whether the host requests the CompactFlash Storage Card or CF Card to be in the power saving or active mode When the bit is one 1 the CompactFlash storage Card or CF Card enters a power down mode When PwrDwn is zero 0 the host is requesting the CompactFlash Storage Card or CF Card to enter the active mode The PCMCIA READY value becomes false busy when this bit is changed READY shall not become true ready until the power state requested has been entered The CompactFlash storage Card automatically powers down when it is idle and powers back up when it receives a command Int this bit represents the internal state of the interrupt request This value is available whether or not the VO interface has been confi
77. ompactFlash Card Not Support Not Support Not Support Not Support Not Support Not Support CD upport upport upport upport Not Support 2 upport upport upport upport CD upport V1 0 TS16G 64GCF400 400X CompactFlash Card B Check Power Mode 98h or E5h If the CompactFlash Storage Card is in going to or recovering from the sleep mode the CompactFlash Storage Card sets BSY sets the Sector Count Register to 00h clears BSY and generates an interrupt If the CompactFlash Storage Card is in Idle mode the CompactFlash Storage Card sets BSY sets the Sector Count Register to FFh clears BSY and generates an interrupt Bit gt Command 7 98h or E5h Cyl High 5 Cyl Low 4 Sec Num 3 Sec Cnt 2 Feature 1 B Execute Drive Diagnostic 90h When the diagnostic command is issued in a PCMCIA configuration mode this command runs only on the CompactFlash Storage Card that is addressed by the Drive Head register This is because PCMCIA card interface does not allows for direct inter drive communication such as the ATA PDIAG and DASP signals When the diagnostic command is issued in the True IDE Mode the Drive bit is ignored and the diagnostic command is executed by both the Master and the Slave with the Master responding with status for both devices Bit gt Command 7 90h caya Cyl High 5 gite X mmQp ooo 000 sem X en Diagnostic Codes are returned in the Error Regist
78. ons eee con cono cont ont conp card Were __ o fo fo temine 000 Pounda po po fo fo fs S L 1 u 400X CompactFlash Card Transcend Information Inc 41 V1 0 400X CompactFlash Card Card Configuration and Status Register Base 02h in Attribute Memory The Card Configuration and Status Register contains information about the Card s condition Operation DT D6 D5 D4 D3 D2 D1 DO Read XE Aso won m 0 wie song ow xE Ado Pwan o 0 Card Configuration and Status Register Changed indicates that one or both of the Pin Replacement register CReady or CWProt bits are set to one 1 When the Changed bit is set STSCHG Pin 46 is held low if the SigChg bit is a One 1 and the CompactFlash Storage Card or CF Card is configured for the VO interface SigChg this bit is set and reset by the host to enable and disable a state change signal from the Status Register the Changed bit controls pin 46 the Changed Status signal If no state change signal is desired this bit is set to zero 0 and pin 46 STSCHG signal is then held high while the CompactFlash Storage Card or CF Card is configured for lO lOis8 the host sets this bit to a one 1 if the CompactFlash Storage Card or CF Card is to be configured in an 8 bit VO Mode The CompactFlash Storage Card is always configured for both 8 and 16 bit I O so this bit is ignored Some CF cards can be configured for either 8 bit UO m
79. or has occurred before data transfer for the command is complete the device may complete the transfer and report the error or abort the command and report the error NOTE If a data transfer is terminated before completion the assertion of INTRQ should be passed through to the host software driver regardless of whether all data requested by the command has been transferred Transcend Information Inc 33 V1 0 400X CompactFlash Card UDMA UDMA UDMA UDMA UDMA Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 TS16G 64GCF400 Measure location see Note 2 Device Host Sender Recipient Device Device Qo O os Ico N Note 5 Host Cw mer vin wax win vex in usc win wef a fol e el el e p E el feo qe mI qs fol le le Joe m pe dere belle m pep eI qe pe me pep epe le sien m per dere o se of pe foo so so ome m sof so so so qe me qe for ooo pel fre mI per oe ooo roo fre CIO CREE ERN ERN G ERN RN foo e e 5 pv e Max m pep e e epe so 0 p o o 0 o e spo a nm eL e de a C C E C C a Cp I A A B TB UDMA Mode 1 Min bau Mode 40 30 2 230 t2cYCTYP tcyc t2CYC tovs tDVH tcvs tCVH izrs ipzrs Fs MLI tul LAZ ZAH ZAD tENV tRFS tRP tloRDYZ lZIORDY tack V1 0 column For example in the case of tRFS both STROBE and DMARDY transitions are measured at the sender
80. peration can be performed at the addressed port In True IDE Mode this output signal is asserted low when this device is expecting a word data transfer cycle 15 V1 0 TS16G 64GCF400 400X CompactFlash Card Electrical Specification The following tables indicate all D C Characteristics for the CompactFlash Storage Card Unless otherwise stated conditions are Vcc 5V 10 Vcc 3 3V 5 B Absolute Maximum Conditions a input Power 0 3V min to 6 5V max Voltage on any pin except Vcc with respect to GND 0 5V min to Vcc 0 5V max B DC Characteristics CompactFlash Interface I O at 5 0V Parameter Symbol Min Max Unit Remark Supply Voltage Veo I 8 5 a e E High level output voltage yoa Ye 98 m T 83 Low level output voltage 0M pn Ww EEA schmitt trigger eae RT Schmitt trigger LL os V ensem tigger O BEL VOMRUE 317 Vv Schmitttrigger Pull up resistance a o a op emere _ Pull down resistance Rep 50 97 KOm CompactFlash Interface I O at 3 3V aa ee oe vd igh icp mi Ya ee oa D Y Tow level output voltage Va 88 TV ee alee api ee dei Schmitt trigger Mesi X ge Non sohmit trigger 125 Schmitt trigger Pull up resistance Rey 527 14 T Rann Pull down resistance Rep 475 17 KOm 1 Include CE1 CE2 HREG HOE HIOE HWE HIOW pins 2 Include CE1 CE2 HREG HOE HIOE HWE HIOW CSEL P35 PDIAG DASP pins
81. port Indicates the maximum True IDE Multiword DMA mode supported by the card 0 0 Specifiedinword 3 0 0 00 000 Multiword DMA Mode 3 Multiword DMA Mode 4 Reserved Bits 8 6 Advanced True IDE PIO Mode Selected Indicates the current True IDE PIO mode selected on the card Current PIO timing mode selected Transcend Information Inc 71 V1 0 TS16G 64GCF400 400X CompactFlash Card 0 Specifiedinword64 S PIO Mode 5 PIO Mode 6 Bits 11 9 Advanced True IDE Multiword DMA Mode Selected Indicates the current True IDE Multiword DMA Mode Selected on the card Bits 15 12 are reserved gt Word 164 CF Advanced PCMCIA I O and Memory Timing Modes Capabilities and Settings This word describes the capabilities and current settings for CFA defined advanced timing modes using the Memory and PCMCIA I O interface Notice The use of PCMCIA I O or Memory modes that are 100ns or faster impose significant restrictions on the implementation of the host Additional Requirements for CF Advanced Timing Modes Bits 2 0 Maximum Advanced PCMCIA I O Mode Support Indicates the maximum I O timing mode supported by the card 0 255nsCyclePCMCIAVOMode o Reserved o Heserved Bits 5 3 Maximum Memory timing mode supported Indicates the Maximum Memory timing mode supported by the card Maximum Memory timing mode Supported 0 250ns Cycle Memory Mode 120ns Cycle Memory Mode 100ns Cycle Memory Mode 80ns Cy
82. r The card shall be able to drive at least the following load 10 while meeting all AC timing requirements 50 pF at a DC current of 400 u A low state and 1100 u A high state 6 BVD2 was not defined in the JEIDA 3 0 release Systems fully supporting JEIDA release 3 SRAM cards shall pull up pin 45 BVD2 to avoid sensing their batteries as Low 7 Address Signals each card shall present a load of no more than 100pF 10 at a DC current of 450p A low state and 150y A high state The host shall be able to drive at least the following load 10 while meeting all AC timing requirements the number of sockets wired in parallel multiplied by 100pF with DC current 450u A low state and 150y A high state per socket 8 Data Signals the host and each card shall present a load no larger than 50pF 10 at a DC current of 450u A and 150y A high state The host and each card shall be able to drive at least the following load 1o while meeting all AC timing requirements 100pF with DC current 1 6mA low state and 300u A high state This permits the host to wire two sockets in parallel without derating the card access speeds 9 Reset Signal This signal is pulled up to prevent the input from floating when a CFA to PCMCIA adapter is used in a PCMCIA revision 1 host However to minimize DC current drain through the pull up resistor in normal operation the pull up should be turned off once the Reset signal has been actively driven low by the host Consequently t
83. ransfer modes supported Bits 7 through 0 of word 64 of the Identify Device parameter information is defined as the advanced PIO data transfer supported field If this field is supported bit 1 of word 53 shall be set to one This field is bit significant Any number of bits may be set to one in this field by the CompactFlash Storage Card to indicate the advanced PIO modes it is capable of supporting Of these bits bits 7 through 2 are reserved Bit 0 if set to one indicates that the CompactFlash Storage Card supports PIO mode 3 Bit 1 if set to one indicates that the CompactFlash StorageCard supports PIO mode 4 Support for PIO modes 5 and above are specific to CompactFlash are reported in word 163 gt Word 65 Minimum Multiword DMA transfer cycle time Word 65 of the parameter information of the Identify Device command is defined as the minimum Multiword DMA transfer cycle time This field defines in nanoseconds the minimum cycle time that if used by the host the CompactFlash Storage Card guarantees data integrity during the transfer If this field is supported bit 1 of word 53 shall be set to one The value in word 65 shall not be less than the minimum cycle time for the fastest DMA mode supported by the device This field shall be supported by all CompactFlash Storage Cards supporting DMA modes 1 and above If bit 1 of word 53 is set to one but this field is not supported the Card shall return a value of zero in this field Recommend
84. register when configured in a twin card configuration It is recommended that the host always write 0 for the drive number in this register and in the DRY bit of the Drive Head register for PCMCIA modes of operation X the socket number is ignored by the CompactFlash Storage Card Transcend Information Inc 44 V1 0 TS16G 64GCF400 400X CompactFlash Card I O Transfer Function The I O transfer to or from the CompactFlash Storage can be either 8 or 16 bits When a 16 bit accessible port is addressed the signal IOIS16 is asserted by the CompactFlash Storage Otherwise the IOIS16 signal is de asserted When a 16 bit transfer is attempted and the IOIS16 signal is not asserted by the CompactFlash Storage the system shall generate a pair of 8 bit references to access the word s even byte and odd byte The CompactFlash Storage Card permits both 8 and 16 bit accesses to all of its I O addresses so IOIS16 is asserted for all addresses to which the CompactFlash Storage responds The CompactFlash Storage Card may request the host to extend the length of an input cycle until data is ready by asserting the WAIT signal at the start of the cycle Table PCMCIA Mode I O Function Function Code at Lau soo os 0 se new msn D7 D0 NES Standby Mode Mode X Hignz HghZ HghZ HghZ e pep I EE eem pe UDMA Read Read Read EN xi Odd Byte Odd Byte Even Even Byte ES PE
85. signal In True IDE Mode only A 02 00 are used to select the one of eight registers in the Task File the remaining address lines should be grounded by the host This signal is asserted high as BVD1 is not supported This signal is asserted low to alert the host to changes in the READY and Write Protect states while the I O interface is configured Its use is controlled by the Card Config and Status Register In the True IDE Mode this input output is the Pass Diagnostic signal in the Master Slave handshake protocol This signal is asserted high as BVD2 is not supported This line is the Binary Audio output from the card If the Card does not support the Binary Audio function this line should be held negated In the True IDE Mode this input output is the Disk Active Slave Present signal in the Master Slave handshake protocol These Card Detect pins are connected to ground on the CompactFlash Storage Card They are used by the host to determine that the CompactFlash Storage Card is fully inserted into its socket This signal is the same for all modes This signal is the same for all modes Transcend Information Inc 10 V1 0 TS16G 64GCF400 400X CompactFlash Card Signal Name Dir Pin Desorption These input signals are used both to select the card and to indicate to the card CE1 CE2 whether a byte or a word operation is being performed CE2 always accesses PC Card Memory Mode the odd byte o
86. t The CompactFlash Storage Card is also Reset when the Soft Reset bit in the Card Configuration Option Register is set This signal is the same as the PC Card Memory Mode signal In the True IDE Mode this input pin is the active low hardware reset from the host 5 V 43 3 V power This signal is the same for all modes This signal is the same for all modes 14 V1 0 TS16G 64GCF400 400X CompactFlash Card Signal Name ci True IDE Mode PC Card Memory Mode Except Ultra DMA Protocol Active WAIT PC Card I O Mode Except Ultra DMA Protocol Active IORDY True IDE Mode Except Ultra DMA Protocol Active DDMARDY All Modes Ultra DMA Write Protocol Active DSTROBE All Modes Ultra DMA Read Protocol Active WE PC Card Memory Mode WE PC Card I O Mode WE True IDE Mode WP PC Card Memory Mode Write Protect JOIS16 PC Card I O Mode lOCS16 True IDE Mode Transcend Information Inc Voltage Sense Signals VS1 is grounded on the Card and sensed by the Host so that the CompactFlash Storage Card CIS can be read at 3 3 volts and VS2 is reserved by PCMCIA for a secondary voltage and is not connected on the Card This signal is the same for all modes This signal is the same for all modes The WAIT signal is driven low by the CompactFlash Storage Card to signal the host to delay completion of a memory or I O cycle that is in progress This
87. t Unchanged Unchanged Cleared by Host Set by Host Transcend Information Inc 43 V1 0 TS16G 64G 400X CompactFlash Card m Socket and Copy Register Base 06h in Attribute Memory This register contains additional configuration information This register is always written by the system before writing the card s Configuration Index Register This register is not required for CF or CF Cards If present it is optional for a CF Card to allow setting bit D4 Drive number to 1 If two drives are supported it is intended for use only when two cards are co located at either the primary or secondary addresses in PCMCIA I O mode The availability and capabilities of this register are described in the Card Information Structure of the CF Card Hosts shall not depend on the availability of this functionality Operation D7 D6 D5 D4 D3 D2 D1 DO Read Reserved Obsolete Drive Write Obsolete x X X X Drive Socket and Copy Register Reserved this bit is reserved for future standardization This bit shall be set to zero 0 by the software when the register is written Obsolete Drive this bit is obsolete and should be written as U If the obsolete functionality is not supported it shall be read as written or shall be read as 0 If the obsolete functionality is supported the bit shall be read as written If supported this bit sets the drive number which the card matches with the DRV bit of the Drive Head
88. tFlash Storage Card which does not respond to accesses to I O locations 3F7h and 377h With either of these implementations the host software shall not attempt to use information in the Drive Address Register Bit 6 WTQ this bit is 0 when a write operation is in progress otherwise it is 1 Bit 5 HS3 this bit is the negation of bit 3 in the Drive Head register Bit 4 HS2 this bit is the negation of bit 2 in the Drive Head register Bit 3 HS1 this bit is the negation of bit 1 in the Drive Head register Bit 2 HS0 this bit is the negation of bit 0 in the Drive Head register Bit 1 nDS1 this bit is 0 when drive 1 is active and selected Bit 0 nDS0 this bit is 0 when the drive 0 is active and selected Transcend Information Inc 58 V1 0 TS16G 64GCF400 CF ATA Command Set 400X CompactFlash Card CF ATA Command Set summarizes the CF ATA command set with the paragraphs that follow describing the individual commands and the task file for each Command Check Power Mode Execute Drive Diagnostic Erase Sector Flush Cache Format Track Identify Device Idle Immediate Initialize Drive Parameters Key Management Structure Read Key Management Read Keying Material Key Management Change Key Management Value Read Buffer C1 ead DMA Head Long Sector JJ JU Z O U ead Multiple Read Sector s 9 Read Verify Sector s 20 Recalibrate 21 Request Sense 22 23 Set F
89. ted Bits 7 Reserved Bit 6 1 Ultra DMA mode 6 and below are supported Bits 0 5 Shall be set to 1 Bit 5 1 Ultra DMA mode 5 and below are supported Bits 0 4 Shall be set to 1 Bit 4 1 Ultra DMA mode 4 and below are supported Bits 0 3 Shall be set to 1 Bit 3 1 Ultra DMA mode 3 and below are supported Bits 0 2 Shall be set to 1 Bit 2 1 Ultra DMA mode 2 and below are supported Bits 0 1 Shall be set to 1 Bit 1 1 Ultra DMA mode 1 and below are supported Bit 0 Shall be set to 1 Bit 0 1 Ultra DMA mode 0 is supported gt Word 89 Time required for Security erase unit completion Word 89 specifies the time required for the Security Erase Unit command to complete This command shall be supported on CompactFlash Storage Cards that support security Value not specified 1 254 Value 2 minutes gt 508 minutes gt Word 90 Time required for Enhanced security erase unit completion Word 90 specifies the time required for the Enhanced Security Erase Unit command to complete This command shall be supported on CompactFlash Storage Cards that support security is Value not specified 1 254 Value 2 minutes gt 508 minutes gt Word 91 Advanced power management level value Bits 7 0 of word 91 contain the current Advanced Power Management level setting gt Word 128 Security Status Bit 8 Security Level If set to 1 indicates that security mode is enabled and the security level is maximum If set to 0 and s
90. the Odd Byte of the Word D15 DOO This signal is the same as the PC Card Memory Mode signal PC Card I O Mode Le In True IDE Mode all Task File operations occur in byte mode on the low order bus D 7 0 while all data transfers are 16 bit using D 15 0 GND PC Card Memory Mode GND This signal is the same for all modes PC Card I O Mode GND This signal is the same for all modes True IDE Mode Transcend Information Inc 11 V1 0 TS16G 64GCF400 400X CompactFlash Card Signal Name ka Po __beesipfon INPACK PC Card Memory Mode except Ultra DMA Protocol Active INPACK PC Card I O Mode except Ultra DMA Protocol Active Input Acknowledge DMARQ PC Card Memory Mode Ultra DMA Protocol Active DMARQ PC Card I O Mode Ultra DMA Protocol Active DMARQ True IDE Mode HIOE PC Card Memory Mode except Ultra DMA Protocol Active HIOE PC Card I O Mode except Ultra DMA Protocol Active HIOE True IDE Mode Except Ultra DMA Protocol Active HDMARDY All Modes Ultra DMA Protocol DMA Read HSTROBE All Modes Ultra DMA Protocol DMA Write Transcend Information Inc This signal is not used in this mode The Input Acknowledge signal is asserted by the CompactFlash Storage Card when the card is selected and responding to an I O read cycle at the address that is on the address bus This signal is used by the host to control the enable of any input data buffers between th
91. the head number It is Bit 27 in the Logical Block Address mode Transcend Information Inc 55 V1 0 TS16G 64GCF400 400X CompactFlash Card Bit 2 HS2 when operating in the Cylinder Head Sector mode this is bit 2 of the head number It is Bit 26 in the Logical Block Address mode Bit 1 HS1 when operating in the Cylinder Head Sector mode this is bit 1 of the head number It is Bit 25 in the Logical Block Address mode Bit 0 HSO when operating in the Cylinder Head Sector mode this is bit 0 of the head number It is Bit 24 in the Logical Block Address mode gt Status amp Alternate Status Registers Address 1F7h 177h amp 3F6h 376h Offsets 7 amp Eh These registers return the CompactFlash Storage Card status when read by the host Reading the Status register does clear a pending interrupt while reading the Auxiliary Status register does not The status bits are described as follows D7 D D5 D4 D3 D2 D1 DO Busy Roy DwF psc pra CORR o ERR Bit 7 BUSY the busy bit is set when the CompactFlash Storage Card has access to the command buffer and registers and the host is locked out from accessing the command register and buffer No other bits in this register are valid when this bit is set to a 1 During the data transfer of DMA commands the Card shall not assert DMARQ unless either the BUSY bit the DRQ bit or both are set to one Bit 6 RDY RDY indicates whether the device is capable of per
92. to zero the SMART feature set is not enabled If bit 1 of word 85 is set to one the Security Mode feature set has been enabled via the Security Set Password command Bit 2 of word 85 shall be set to zero the Removable Media feature set is not supported Bit 3 of word 85 shall be set to one the Power Management feature set is supported Bit 4 of word 85 shall be set to zero the Packet Command feature set is not enabled If bit 5 of word 85 is set to one write cache is enabled If bit 6 of word 85 is set to one look ahead is enabled Bit 7 of word 85 shall be set to zero release interrupt is not enabled Bit 8 of word 85 shall be set to zero Service interrupt is not enabled Bit 9 of word 85 shall be set to zero the Device Reset command is not supported Bit 10 of word 85 shall be set to zero the Host Protected Area feature set is not supported Bit 11 of word 85 is obsolete Bit 12 of word 85 shall be set to one the CompactFlash Storage Card supports the Write Buffer command Bit 13 of word 85 shall be set to one the CompactFlash Storage Card supports the Read Buffer command Bit 14 of word 85 shall be set to one the CompactFlash Storage Card supports the NOP command Bit 15 of word 85 is obsolete Bit O of word 86 shall be set to zero the CompactFlash Storage Card does not support the Download Microcode command Bit 1 of word 86 shall be set to zero the CompactFlash Storage Card does not support the Read DMA Queued and Write
93. tput released to driving until the first transition of critical timing First STROBE time for device to first negate DSTROBE from STOP during a data in burst 1 1 1 Envelope time from DMACK to STOP and HDMARDY during data in burst initiation and from DMACK to STOP during data out burst initiation tRFS Ready to final S TROBE time no STROBE edges shall be sent this long after negation of DMARDY t Fs i t m UI AZ i tENV Time from STROBE edge to negation of DMARQ or assertion of STOP when sender terminates a burst tss Transcend Information Inc 35 V1 0 TS16G 64GCF400 400X CompactFlash Card Notes 1 The parameters tUI tMLI Ultra DMA Data In Burst Device Termination Timing and Ultra DMA Data In Burst Host Termination Timing and tLl indicate sender to recipient or recipient to sender interlocks i e one agent either sender or recipient is waiting for the other agent to respond with a signal before proceeding tUI is an unlimited interlock that has no maximum time value tMLI is a limited time out that has a defined minimum tLl is a limited time out that has a defined maximum 2 80 conductor cabling shall be required in order to meet setup tDS tCS and hold tDH tCH times in modes greater than 2 3 Timing for tDVS tDVH tCVS and tCVH shall be met for lumped capacitive loads of 15 and 40 pF at the connector where the Data and STROBE signals have the same capacitive load value Due to reflections
94. ttnbute Code Notes Memory Relative Offset AL Dh Function Specific B 1h 250 nsec Lu Lu Les om Dn Fc Spe 1 T tuedei oF heels a Dese P n cepe Eee prae puer Lee T om ns rm sese 1 meten cn owe om o reso inert mee ee Note The value 1 defined for D3 of the N 0 words indicates that no write protect switch controls writing the ATA registers The value 0 defined for D7 in the N 2 words indicates that there is not more than a single speed extension byte Transcend Information Inc 49 V1 0 TS16G 64GCF400 400X CompactFlash Card CF ATA Drive Register Set Definition and Protocol The CompactFlash Storage Card can be configured as a high performance I O device through a The standard PC AT disk I O address spaces 1F0h 1F7h 3F6h 3F7h primary or 170h 177h 376h 377h secondary with IRQ 14 or other available IRQ b Any system decoded 16 byte I O block using any available IRQ c Memory space The communication to or from the CompactFlash Storage Card is done using the Task File registers which provide all the necessary registers for control and status information related to the storage medium The PCMCIA interface connects peripherals to the host using four register mapping methods Table 39 is a detailed description of these methods 1FOh 1F 7h Primary VO Mapped 3F6h 3F7h 170h 17 h Secondary I O Mapped 376h 377h Transcend Information Inc 50 V1 0 TS16G 64GCF40
95. urity erase unit completion V1 0 TS16G 64GCF400 400X CompactFlash Card 0000h Key management schemes supported 163 0092h CF Advanced True IDE Timing Mode Capability and Setting 164 8D9Bh CF Advanced PC Card I O and Memory Timing Mode Capability 165 175 0000h Reserved 176 255 0000h Reserved gt Word 0 General Configuration This field indicates the general characteristics of the device When Word 0 of the Identify drive information is 848Ah then the device is a CompactFlash Storage Card and complies with the CFA specification and CFA command set It is recommended that PCMCIA modes of operation report only the 848Ah value as they are always intended as removable devices Bits 15 0 CF Standard Configuration Value Word 0 is 848Ah This is the recommended value of Word 0 Some operating systems require Bit 6 of Word 0 to be set to 1 Non removable device to use the card as the root storage device The Card must be the root storage device when a host completely replaces conventional disk storage with a CompactFlash Card in True IDE mode To support this requirement and provide capability for any future removable media Cards alternatehandling of Word 0 is permitted Bits 15 0 CF Preferred Alternate Configuration Values 044Ah This is the alternate value of Word O turns on ATA device and turns off Removable Media and Removable Device while preserving all Retired bits in the word 0040h This is the alternate value of Word 0 turns
96. wer Level 1 commands Bit 12 XE If set to 1 indicates that Power Level 1 commands are disabled If set to O indicates that Power Level 1 commands are enabled Bit 0 11 Maximum current This field contains the CompactFlash Storage Card s maximum current in mA gt Word 162 Key Management Schemes Supported Bit 0 CPRM support If set to 1 the device supports CPRM Scheme Content Protection for Recordable Media If set to 0 the device does not support CPRM Bits 1 15 are reserved for future additional Key Management schemes gt Word 163 CF Advanced True IDE Timing Mode Capabilities and Settings This word describes the capabilities and current settings for CFA defined advanced timing modes using the True IDE interface Notice The use of True IDE PIO Modes 5 and above or of Multiword DMA Modes 3 and above impose significant restrictions on the implementation of the host Additional Requirements for CF Advanced Timing Modes There are four separate fields defined that describe support and selection of Advanced PIO timing modes and Advanced Multiword DMA timing modes The older modes are reported in words 63 and 64 Word 63 Multiword DMA transfer and 6 2 1 6 19 Word 64 Advanced PIO transfer modes supported Bits 2 0 Advanced True IDE PIO Mode Support Indicates the maximum True IDE PIO mode supported by the card Maximum PIO mode timing selected Specified in word 64 PIO Mode 6 Bits 5 3 Advanced True IDE Multiword DMA Mode Sup
97. y the CompactFlash Storage Card to indicate the multiword DMA mode which is currently selected Of these bits bits 15 through 11 are reserved Bit 8 if set to one indicates that Multiword DMA mode 0 has been selected Bit 9 if set to one indicates that Multiword DMA mode 1 has been selected Bit 10 if set to one indicates that Multiword DMA mode 2 has been selected Selection of Multiword DMA modes 3 and above are specific to CompactFlash are reported in word 163 Word 163 CF Advanced True IDE Timing Mode Capabilities and Settings Bits 7 through 0 of word 63 of the Identify Device parameter information is defined as the Multiword DMA data transfer supported field If this field is supported bit 1 of word 53 shall be set to one This field is bit significant Any number of bits may be set to one in this field by the CompactFlash Storage Card to indicate the Multiword DMA modes it is capable of supporting Of these bits bits 7 through 2 are reserved Bit 0 if set to one indicates that the CompactFlash Storage Card supports Multiword DMA mode O Bit 1 if set to one indicates that the CompactFlash Storage Card supports Multiword DMA modes 1 and O Bit 2 if set to one indicates that the CompactFlash Storage Card supports Multiword DMA modes 2 1 and 0 Support for Multiword DMA modes 3 and above are specific to CompactFlash are reported in word 163 Word 163 CF Advanced True IDE Timing Mode Capabilities and Settings gt Word 64 Advanced PIO t
98. ycle time min otel all HIOE data access max 350 te HIOE data hold min S ta HIOE HIOW data setup min Sel ae EN HIOW data hold min 3 5 HREG to HIOE HIOW setup min HIOE HIOW to HREG hold min NOTE 1 Where 10 is the minimum total cycle time and tO is minimum command active time whereas tKR and KVV are minimum command recovery time or command inactive time for input and output cycles respectively Actual cycle time equals the sum of actual command active time and actual command inactive time The three timing requirements of t0 i e tD KR and tK VV must be met The minimum total cycle time requirement exceeds the sum of tD and tKR or KVN for input and output cycles respectively implying that a host implementation can extend either or both tD and tKR or tV as deemed necessary to ensure that t0 equals or exceeds the value reported in the device s identity data A CompactFlash Card implementation supports any legal hast implementation Transcend Information Inc 30 V1 0 400X CompactFlash Card tO HIOE i Pee _______________ _1f i TT Read kN HD j tl DMACKE OO HREG LJ Figure 12 True IDE Multiword DMA Mode Read Write Timing NOTE 1 If a card cannot sustain continuous minimum cycle time OMA transfers it may negate DMARO during the time from the start of a DMA transfer cycle to suspend DMA transfers in progress and reassertion of the signal at a relatively

Transcend 400x CompactFlash Card, 64GB

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