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KPCI-3101, -3102, -3103, -3104 Series PCI Bus Data Acquisition

1. Trigger Clock Ext A D Clock Logic Ext TTL Trig AID Clk A D Counter 24 bits TScan Counter CGL Reg eh Sel 24 bit 1 K Entry Channel gt Gain Sel 20 MHz Clock CGL FIFO t _ gt Parameter He nput Sel Reg gt Discard sample Analog In Se 16 Channel Mux Bidirectional E We oe rei 8 bit Latch 7 0 BE DIO Port A a Bidirectional 17 0 Gain Sel Gain Amp 8 bit Latch 1 2 4 8 y 4 User Lg User Clk 3 0 20 MHz Counter User Gate 3 0 A D Cik gt ADC Clock Timers Gr l p User Out 3 0 DIO Ports Ay y 16 bit ea and B Tette Bui em Chi SE bei Input Sel pe State Butlers ultiplying nalog P DAC Output 1 1 kSample A SW_CIkO _ Input FIFO Ser_Da Multiplying Analog DAC Output 0 Ser k DIO Port C 6 0 PCI Bus Interface a ort C 6 0 D f Analog input features PCI Bus DACs not included on KPCI 3101 or KPCI 3103 boards This section describes the features of the analog input A D subsystem including the following e Input resolution e Analog input channels e Input ranges and gains e A D sample clock sources e Analog input conversion modes e Trigger sources and trigger acquisition modes e Data formats and transfer e Error conditions KPCI 3101 KPCI 3104 Series User s M anual Principles of O peration 2 3 Input resolution Table 2 1 lists the input resolutions supported by the KPCI 3101 4 Series boards The resolu tion is fix
2. Chan 1 Chant A D Sample Clock Pre trigger data acquired A iii cquisition stops q q p Pre trigger event occurs Post trigger event occurs Figure 2 5 illustrates the same example using internally retriggered scan mode The multiscan count is 2 indicating that the channel gain list will be scanned twice per trigger or retrigger In this example pre trigger analog input data is acquired on each clock pulse of the A D sample clock until the channel gain list has been scanned twice then the board waits for the internal retrigger event When the internal retrigger occurs the process repeats Acquisition stops when the post trigger event occurs Figure 2 5 Continuous pre trigger mode with triggered scan Chan 0 Chan2 ChanO Chan Chan0 Chan2 Chan Chan 1 Chan 1 Chan 1 AID 8 o Sample Clock Board waits for Pre trigger event occurs retrigger event Retrigger event occurs Post trigger event pre trigger data is acquired pre trigger data is occurs acquisition for two scans of the CGL acquired until post stops trigger event occurs KPCI 3101 KPCI 3104 Series U ser s M anual Principles of O peration 2 13 About Trigger acquisition Use about trigger acquisition mode continuous about trigger mode when you want to acquire data both before and after a specific external event occurs This operation is equivalent to doing both a pre tri
3. C Y User Clock Input 0 l Figure 3 16 shows an example of how to cascade two counters externally to perform an event counting operation using user counters 0 and 1 Note that you can also internally cascade counters using software if you internally cascade the counters you do not need to make the external cascading connections Note also that this example shows the use of an external gate however this connection is not required Figure 3 16 Cascading counters shown for event counting using counters 0 and 1 and external gate 0 STA 300 Panel Digital Ground User Counter D TB27 Output 0 Gate 0 Signal Source User Clock Input 0 User Clock Ul Gate 1 O G TB32 Input 1 External Gating e Switch An internal 22 kQ pull up Digital Ground resistor to 5 V is used No KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 23 Connecting frequency measurement signals This section describes two examples of how to connect frequency measurement signals to the STA 300 screw terminal panel The first configuration uses the same wiring as an event counting application that does not use an external gate signal see Figure 3 15 on page 3 22 the software uses the Windows timer to specify the duration of the frequency measurement In this configuration the frequency of the c
4. acquired Figure 2 7 Continuous about trigger mode with triggered scan A D Sample Clock ChanO Chanod ChanO Chan Chan 0 Chanod Chan 1 Chan 1 GER i Chan 1 Chan 1 Chan 1 Ch1 S Re trigger event Pre trigger event occurs Re trigger event occurs Post trigger event occurs occurs pre trigger data is pre trigger data is post trigger data is post trigger data is acquired for two scans of acquired until post trigger acquired until the end of acquired for two the CGL occurs the number of scans scans of the CGL Data format KPCI 3101 4 Series boards use offset binary data encoding to represent signals In DriverLINX software the analog input value is returned as a code or voltage depending on user input DriverLINX provides single value and buffer methods to convert between voltages and analog codes The single value functions are Volts2Code and Code2 Volts Refer to DriverLINX manuals provided with DriverLINX Data transfer The board packs two input samples an even and an odd sample into each transfer to the host computer Samples corresponding to entries 0 2 4 and so on in the channel gain list are con sidered even samples samples corresponding to entries 1 3 5 and so on in the channel gain list are considered odd samples Using flags internally the board determines whether the acquired samples are pre trigger or post trigger samples These flags are not transferred to the host computer The host computer can r
5. A D converter calibrating 5 3 A D Over Sample erro A D sample clock 2 6 external 2 7 internal 2 6 A D E specification about trigger acquisition modd 2 13 accessories 1 6 acquisition modes about trigge 2 13 post trigger 2 10 pre trigger 2 11 Adobe Acrobat Reader installing 3 2 using 1 4 aliasing 2 6 analog I O panel using to test configuration 4 2 analog input current loopg_3 18 differential configuration _3 15 B 17 pseudo differential configuratio screw terminal assignments 3 12 single ended configuratio analog input features 2 2 A D sample clock 2 6 channel channel conversion modes data format data transfe error conditions 2 15 resolutio specifications A 2 trigger acquisition modes 2 10 trigger source 2 10 Analog input hardware est Analog input software test C 20 Analog inputs hardware a software test C 20 analog inputs calibration 5 3 analog output screw terminal assignments 3 13 wiring 3 19 analog output features 2 16 channel conversion mode 2 17 data format 2 17 sai 216 output range resolutio specification Analog output hardware Ser Analog output software test C 22 Analog outputs hardware Ser software test C 22 analog outputs calibration 5 3 analog to digital converter calibrating 5 3 API DriverLINX 3 3 application program LabVIEW description _3 4 TestPo
6. 7 Again determine the PCI resources detected by your computer after the KPCI 3 101 4 board is installed Windows 95 Plug and Play should find and configure the new board as a PCI resource if all of the following are true Do a The board functions properly as a PCI device The contacts of the expansion slot in which the OK board is installed are in good condition The OK board is seated properly in the expansion slot the following as you did in step 5 Insert an unbootable diskette b Turn on the computer and allow the boot cycle to stall at the Non system disk or disk d error message Again note the displayed list of PCI devices A new device should be listed likely as an unidentified peripheral If your resource listing includes PCI slot numbers the slot num ber for the new device should match the number of the slot in which your board is installed Remove the diskette and allow the boot cycle to finish 8 If you removed KPCI 3101 4 boards from other PCI slots in step 1 then repeat steps 6 and 7 with the good board in each of these other slots KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 5 9 Based on the results of steps 5 through 8 do one of the following a If the good board is recognized as a PCI component in all slots tested then the PCI slots are apparently satisfactory DriverLINX may not be installed correctly and or the board may not be properly confi
7. Indicates that the host computer is not handling data from the board fast enough This error is reported if the board completes the transfer of a block of input data to the circular buffer in the host computer before the host computer has finished reading the last block of data The host computer can clear this error To avoid this error ensure that you allocated at least three buffers at least as large as the sampling rate for exam ple if you are using a sampling rate of 100kSamples s 100kHz specify a buffer size of 100 000 samples If any of these error conditions occurs the board stops acquiring and transferring data to the host computer NOTE DriverLINX reports any of these errors as a DATA LOST message 2 16 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Analog output features An analog output D A subsystem is provided on the KPCI 3102 and KPCI 3104 boards only This section describes the following features of the D A subsystem e Output resolution e Analog output channels e Output ranges and gains e Conversion modes e Data formats and transfer e Error conditions Output resolution Table 2 5 lists the output resolutions supported by the KPCI 3102 and KPCI 3104 boards The resolution is fixed for each board type therefore it cannot be programmed in software Table 2 5 Supported analog output resolutions Board Type Supported Resolution KPCI 3102 12 bits
8. retrigger 2 9 retrigger cloc retrigger frequenc S retriggered scan mode externally 2 9 internally 2 8 rising edge gate type 2 21 Safety Precautions 1 sample clock external A D 2 7 internal A D sample road 2 7 scan mode externally ee internally retriggered 2 8 scan per trigger A 9 screw terminal panel 1 6 analog input assignment setting up the computer single buffer wrap mod single value operation analog input 2 7 single ended channels A 10 number off A 10 single ended G t size board 7 screw terminal panel A 8 slot selection 3 5 Software systematic problem isolatio tests analog input software test C 20 analog output software test C 22 general purpose digital I O software test C 25 software DriverLINX descriptio installation 3 4 included with board LabVIEW description 3 4 LabView installation 3 4 options synopsis 1 5 TestPoint descriptio installation 3 4 software calibratio software supported 1 3 software trigger 2 10 A 10 specifications analog input A 2 analog output A 4 counter time environmenta power A 7 specifying a single channel analog ee digital I O specifying one or more channels analog eg digital I O SST signal generator used in DriverLINX Analog I O Panel 4 3 STA 300 screw terminal panelf 1 6 subsystem descriptions Deal C T 2 19 D A DIN and emen System req
9. In addition to the analog input channels the KPCI 3101 4 Series board allows you to read 16 digital I O lines Port A lines 0 to 7 and Port B lines 0 to 7 using the analog input channel list This feature is particularly useful when you want to correlate the timing of analog and digital events To read these 16 digital I O lines specify channel 0 in the DriverLINX analog input channel list with a special gain modifier Refer to the DriverLINX Analog I O Programming Guide provided with DriverLINX NOTE If channel 0 is programmed with digital capabilities and is the only channel in the channel gain list the board can read this channel at a rate of 3MSamples s Refer to the DriverLINX Analog I O Programming Guide provided with DriverLINX The digital channel is treated like any other channel in the analog input channel list therefore all the clocking triggering and conversion modes supported for analog input channels are sup ported for these digital I O lines if you specify them in this manner Input ranges and gains Each channel on the KPCI 3101 KPCI 3102 KPCI 3103 and KPCI 3104 board can measure unipolar and bipolar analog input signals A unipolar signal is always positive 0 to 10V ona KPCI 3101 4 Series board while a bipolar signal extends between the negative and positive peak values 10V on a KPCI 3101 4 Series board Through software specify the range as 0 to 10 V for unipolar signals or 10 V to 10 V for bi
10. KPCI 3101 KPCI 3104 Series User s M anual Overview 1 5 System requirements Software The system capabilities required to run the KPCI 3 101 4 Series board and to use the Driver LINX software supplied with the board are listed in Table 1 2 Table 1 2 System requirements CPU Type Pentium or higher processor on motherboard with PCI bus version 2 1 Operating system Windows 95 or 98 Windows NT version 4 0 or higher Memory 16 MB or greater RAM when running Windows 95 or 98 32 MB or greater RAM when running Windows NT Hard disk space 4 MB for minimum installation 50 MB for maximum installation Other A CD ROM drive A free PCI bus expansion slot capable of bus mastering Enough reserve computer power supply capacity to power the KPCI 3101 4 Series board which draws 0 9A at 5VDC and 48mA at 12VDC A VGA or compatible display 640 x 480 or higher 256 colors recommended Any CD ROM drive that came installed with the required computer should be satisfactory However if you have post installed an older CD ROM drive or arrived at your present system by updating the microprocessor or replacing the motherboard some early CD ROM drives may not support the long file names often used in 32 bit Windows files The user can select a fully integrated data acquisition software package such as TestPoint or LabVIEW or write a custom program supported by DriverLINX DriverLINX is the basic
11. Figure 3 7 Connecting differential voltage inputs shown for channel 0 STA 300 Panel z Bs Analog In 0 idea o TB2 q TB18 Floating R oe oO O Signal s D 0 Source A Analog In 0 D D Z Return O O D O R1 O O Analog Ground You can use resistor R1 to connect the low side of channel 0 to analog B STA 300 Panel Bridge D TB1 Analog In 0 D TB2 q TB18 o Analog In 0 D QD Return D O O L DC Supply Analog Ground 3 18 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual Note that since they measure the difference between the signals at the high and low inputs differential connections usually cancel any common mode voltages leaving only the sig nal However if you are using a grounded signal source and ground loop problems arise connect the differential signals to the STA 300 screw terminal panel as shown in Figure 3 8 In this case make sure that the low side of the signal is connected to ground at the signal source not at the STA 300 screw terminal panel and do not tie the two grounds together Figure 3 8 Connecting differential voltage inputs from a grounded signal source shown for channel 0 STA 300 Panel TB1 D Analog In 0 D TB2 D TB18 Grounded a oO O Signal Es D O Source 3 Analog I
12. The following summarizes the test procedure e Wire an STA 300 screw terminal accessory in a loop back configuration Connect the chan nel 0 digital I O terminals bit for bit to the channel 3 digital I O terminals Connect the channel 1 terminals bit for bit to the channel 2 terminals e Using a DriverLINX graphical interface configure the channel 0 and 1 bits as outputs and the channel 2 and 3 bits as inputs e Using the same DriverLINX graphical interface set the channel 0 and 1 outputs in a particu lar bit pattern and check channels 2 and 3 inputs for the same bit pattern Repeat using a sec ond bit pattern The digital I O of the board is performing satisfactorily if all bits respond appropriately Choose bit patterns that check both for direct ON OFF response and for shorts between bits Specified software UO tests The tests in this section check whether your application software correctly performs analog and digital I O tasks The I O are tested using a KPCI 3101 4 board known to work properly thereby bypassing potential board problems These tests are intended to be used when specified in the preceding systematic problem isolation procedure NOTE During these tests disconnect all user circuits from the board except for connections specified in individual test procedures Analog input software test This basic analog input test checks whether your application software correctly monitors DC analog inputs You ground an
13. 67 53 Digital I O Port C Line 2 68 19 Digital I O Port C Line 3 69 52 Digital I O Port C Line 4 70 18 Digital I O Port C Line 5 71 51 Digital I O Port C Line 6 72 17 Digital Ground Table B 3 lists the screw terminal assignments for connector J2 on the STA 300 screw terminal panel Table B 3 Pin assignments for connector J2 on the STA 300 Pin Number D escription Pin Number D escription 1 Analog Input 0 14 Analog Input 12 2 Analog Input 8 15 Analog Ground 3 Analog Ground 16 Analog Input 13 4 Analog Input 9 17 Analog Input 5 5 Analog Input 1 18 Analog Ground 6 Analog Ground 19 Analog Input 6 7 Analog Input 2 20 Analog Input 14 8 Analog Input 10 21 Analog Ground 9 Analog Ground 22 Analog Input 15 10 Analog Input 11 23 Analog Input 7 11 Analog Input 3 24 Analog Ground 12 Analog Ground 25 Amp Low 13 Analog Input 4 26 Not Connected Systematic Problem Isolation C 2 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series U ser s M anual If you were unable to isolate the problem by using Section 6 then try to isolate the problem sys tematically using the schemes detailed in this Appendix For clarity the systematic problem isolation procedure is divided into seven schemes each of which checks for eliminates and or resolves problem causes Each scheme consists of a flow chart and in most cases an amplified written procedure The numbers of flo
14. In this way you can create a 32 bit counter without externally connecting two counters together C T Clock sources The following clock sources are available for the user counters e Internal C T clock e External C T clock e Internally cascaded clock Refer to the following subsections for more information on these clock sources 2 20 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Internal C T clock The internal C T clock uses a 20MHz time base Counter timer operations start on the rising edge of the clock input signal Through software specify the clock source as internal and the frequency at which to pace the counter timer operation this is the frequency of the clock output signal The maximum fre quency that you can specify for the clock output signal is 1OMHz For a 16 bit counter the min imum frequency that you can specify for the clock output signal is 305 17Hz For a 32 bit cascaded counter the minimum frequency that you can specify for the clock output signal is 0 00465Hz which corresponds to a rate of once every 215 seconds External C T clock The external C T clock is useful when you want to pace counter timer operations at rates not available with the internal C T clock or if you want to pace at uneven intervals The rising edge of the external C T clock input signal is the active edge Using DriverLINX software specify the clock source as external and the clock divider used to det
15. Return Out 23 24 DAC 1 Output 24 59 DACT Reference In and Out 25 42 Digital Ground 26 41 User Clock Input 0 27 40 User Counter Output 0 28 39 External Gate 0 29 8 Digital Ground 30 7 User Clock Input 1 31 6 User Counter Output 1 32 5 External Gate 1 33 8 Digital Ground 34 36 User Clock Input 2 35 37 User Counter Output 2 36 38 External Gate 2 37 42 Digital Ground 38 User Clock Input 3 39 3 User Counter Output 3 40 External Gate 3 41 1 5V Output 1A 42 35 Power Ground 43 55 Digital Ground 44 55 Digital Ground 45 55 Digital Ground 46 56 External A D Trigger 47 21 Digital Ground 48 22 External A D Sample Clock Input 49 50 Digital I O Port A Line 0 50 16 Digital I O Port A Line 1 51 49 Digital I O Port A Line 2 52 15 Digital I O Port A Line 3 53 48 Digital I O Port A Line 4 54 14 Digital I O Port A Line 5 55 47 Digital I O Port A Line 6 56 13 Digital I O Port A Line 7 57 46 Digital I O Port B Line 0 58 12 Digital I O Port B Line 1 59 45 Digital I O Port B Line 2 60 11 Digital I O Port B Line 3 61 44 Digital I O Port B Line 4 62 10 Digital I O Port B Line 5 63 43 Digital I O Port B Line 6 64 9 Digital I O Port B Line 7 B 4 Connector Pin Assignments KPCI 3101 KPCI 3104 Series U ser s Manual Table B 2 Pin assignments for connector J1 on the STA 300 cont TB J 1 Pin Description TB J 1 Pin Description 65 54 Digital I O Port C Line 0 66 20 Digital I O Port C Line 1
16. Specified Ward ware I O tests aaen sasasesilesiac tends east yhbedeanasbhcsevssepubavens sonecdasceskatsundaseanesvnacsedsipenbdbenseis C 14 Analog ele e C 14 Analog Output hard Ware test sei cessescsssstasieesseshiacs castases cssaasssaensvanest EEEE EA EEEE EERE EAR EEN C 17 General purpose digital I O hardware rest C 20 Specified software I O tOSts eebe soastassenlcedatssencseanes stbacedsivehbasevscepabbnans dpncepiesbigansnaleaastennadveasibaabesntsoss C 20 Analog imput software EE C 20 Analog output EE C 22 General purpose digital I O software test C 25 iii iv 2 Figure 2 1 Figure 2 2 Figure 2 3 Figure 2 4 Figure 2 5 Figure 2 6 Figure 2 7 Figure 2 8 Figure 2 9 Figure 2 10 Figure 2 11 Figure 2 12 Figure 2 13 Figure 2 14 Figure 2 15 Figure 2 16 Figure 2 17 Figure 2 18 Figure 2 19 Figure 2 20 Figure 2 21 Figure 2 22 List of Illustrations Principles of O peration Block diagram of the KPCI 3101 4 series boardes Continuous post trigger mode without triggered scan oo ee eee ceeeeeceeeeeeeeeeeeeecaeesaecaeesaecaeenseeeensees Continuous post trigger mode with triggered scan ole eeeee cee ceeeceeceseesecseeseseeceeeeeaeeeessaeeseecaeesaeraey Continuous pre Mi ser MOE es ccsicssssscessccaitentnesceasssvneseaedbuacsvanssbdsbapnces save ENEE EENEG Continuous pre trigger mode with triggered SCAN eee eeeeeceecesececeseeseceseeeseeeeeeseeeeeessaeeseecaeesaeraey Continuous about trip Per Mode c cscscsassesse
17. decimal addresses in the DriverLINX Device Configure dialog box e Invalid IRQ level or Invalid DMA level Selected level does not match hardware setting conflicts with another board s IRQ DMA levels or is dedicated to the computer s internal functions COM port disk drive controller network adapter etc e Hardware does not match configuration Operating mode range switch or jumper set ting does not match selection s made in the DriverLINX Device Configuration dialog box KPCI 3101 KPCI 3104 Series U ser s M anual Troubleshooting 6 3 Problem isolation If you encounter a problem with a KPCI 3101 4 Series board perform the following steps to determine whether the problem is in the computer in the KPCI 3101 4 Series board or in the VO circuitry 1 Remove power connections to the host computer 10 Unplug the accessory connector s or cable s from the KPCI 3101 4 Series board s keep ing the connections intact on the accessory or expansion board s Remove the KPCI 3101 4 Series board s from the computer and visually check for dam age If a board is obviously damaged refer to page 6 7 for information on returning the board With the KPCI 3101 4 Series board s out of the computer check the computer for proper operation Power up the computer and perform any necessary diagnostics When you are sure that the computer is operating properly remove computer power again and install a
18. systematic problem isolation _C S Installation and Configuration 3 1 installing DriverLINX 3 4 installing the board 3 5 installing the KPCI 3101 4 Series Support Software 3 3 internal clock A 11 A D sample 2 6 C T 2 20 internal gate A internal retriggey A 9 internal retrigger clock 2 8 internally retriggered scan modd 2 8 J1 connector pin assignments KPCI 1301 4 Series mel RTE STA 300 screw terminal pane J2 connector pin assignments STA 300 screw terminal panelf B 4 jumper WI 3 10 KPCI 3101 4 Series documentation installing 3 2 viewing 1 4 LabVIEW function libraries for programming in 1 3 installation _3 4 LabVIEW software description 3 4 Learn DriverLINX description 1 3 level gate type high 2 2 low edge gate type 2 21 low level gate type A 11 low to high pulse output 2 22 measuring frequency 2 24 memory required for computer 1 5 messages A 9 multiple buffer wrap modd A 9 number of differential channels A 10 DMA channels A 9 extra clock extra trigger a gain T O channel resolutions A 10 scans per trigge single ended channels voltage range Nyquist Theorem 2 6 offset analog to digital converter offset zeroing 5 3 digital to analog converter offset zeroing 5 3 one shot modd 2 28 A 11 online help for DriverLINX 1 3 Operating system OS required 1 5 operation modes continuous dig
19. terminal accessory connected tO JI Table C 8 Test connections and correct readings for mid range analog output using an STA 300 screw terminal accessory connected to the KPCI 3101 4 board viii 1 Overview 1 2 Overview Features KPCI 3101 KPCI 3104 Series U ser s Manual The KPCI 3101 4 Series is a family of low cost multifunction data acquisition boards for the PCI bus The KPCI 3101 4 Series consists of the following boards KPCI 3101 KPCI 3102 KPCI 3103 and KPCI 3104 These board types differ in analog I O resolution analog input sample frequency analog input ranges and the number of analog output channels as shown in Table 1 1 Table 1 1 Differences among KPCI 3101 4 Series boards Analog O Analog Input Analog Input Analog Output Board Type Resolution Sample Frequency Ranges Channels KPCI 3101 12 bit 225kHz 10V 0 to 10V 0 KPCI 3102 12 bit 225kHz 10V 0 to 10V 2 KPCI 3103 12 bit 400kHz 10V 0 to 10V 0 KPCI 3104 12 bit 400kHz 10V 0 to 10V 2 1 Assumes a gain of 1 Using these ranges with gains of 2 4 or 8 yields a number of effective input ranges refer to page 2 4 for more information All KPCI 3101 4 Series boards share the following major features e PCI bus mastering capability for analog inputs e 16 single ended or pseudo differential analog input channels or 8 differential analog input channels for information on pseudo differential analog in
20. then your board apparently has analog input problems Stop here and return to the problem isolation step in Problem isolation Scheme F the board that asked you to perform the Analog input hardware test e If the channel 00 voltage displayed in step 8 is OV and the channel 01 voltage displayed in step 9 nominally agrees with the applied voltage then the analog inputs are apparently satisfactorily Stop here and return to the problem isolation step in Problem isolation Scheme F the board that asked you to perform the Analog input hardware test NOTE If the analog inputs appear to work satisfactorily but the displayed channel 00 and channel 01 voltages appear to be nominally outside specified limits you may wish to calibrate your board after concluding the systematic problem isolation procedure For board specifications refer to Appendix A For calibration procedures refer to Section 5 Calibration KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 17 Analog output hardware test This test applies only to a board having analog outputs The analog output test checks whether the two digital to analog converters DACs of the board are working correctly Zero voltages are set at the two analog outputs using the on screen level control utility that is supplied with DriverLINX The two output voltages are then measured with a digital voltmeter to verify rea sonable DAC offsets Similarly a mid ran
21. 0 04 Gain 4 0 05 0 05 Gain 8 0 05 0 05 Nonlinearity integral 1 0 LSB 1 0 LSB Differential linearity 0 5 LSB no missing 0 5 LSB no missing codes codes Range V Bipolar 1 25 2 5 5 10 1 25 2 5 5 10 Unipolar 0 to 1 25 0 to 1 25 0 to 2 5 0 to 2 5 0 to 5 0 to 5 0 to 10 0 to 10 Drift Zero 30UV 20uV Gain C 30UV 20UV Gain C Gain 30ppm C 30ppm C Input impedance Off 100M9 10pF On 100M 100pF Input bias current 20nA Common mode voltage 11V maximum operational Maximum input voltage 40V maximum protection A D converter noise 0 3 LSB rms Amplifier input noise 20uV rms 20uV rms 10uV rms gain ON rms gain 200pA rms current Channel to channel offset 40 0u V Channel acquisition time 3us lus A D conversion time 6 6us 3us KPCI 3101 KPCI 3104 Series User s M anual Table A 1 Specifications A 3 A D subsystem specifications cont K PCI 3101 302 K PCI 3103 304 Feature Specifications Specifications Effective number of bits ENOB 11 5 bits 11 5 bits Total Harmonic Distortion 80 dB typical 80 dB typical Channel crosstalk 80 dB 1kHz Data throughput Single analog channel 225kSamples s 400kSamples s 0 03 Multiple channels scan Single digital channel 0 03 accuracy accuracy 225kSamples s 0 05 accuracy 400kSamples s 0 05 accuracy 200kSamples s 03 accuracy 360kSamples s
22. 1320 21 Fax 91 80 509 1322 ITALY Keithley Instruments s r l Viale S Gimignano 38 e 20146 Milano e 02 48 30 30 08 Fax 02 48 30 22 74 NETHERLANDS Keithley Instruments B V Postbus 559 e 4200 AN Gorinchem e 0183 635333 Fax 0183 630821 SWITZERLAND Keithley Instruments SA Kriesbachstrasse 4 e 8600 D bendorf e 01 821 94 44 e Fax 01 820 30 81 TAIWAN Keithley Instruments Taiwan 1 Fl 85 Po Ai Street Hsinchu Taiwan R O C e 886 3572 9077 Fax 886 3572 9031 6 99 KPCI 3101 3102 3103 3104 Series PCI Bus Data Acquisition Board User s M anual DriverLIN X SSTN ET and LabO BJX are registered trademarks and DriverLIN X VB are trademarks of Scientific Software Tools Inc Microsoft and Windows are registered trademarks and Visual C and Visual Basic are trademarks of Microsoft Corporation Borland is a registered trademark and Borland C Delphi and Turbo Pascal are trademarks of Borland International Inc IBM is a registered trademark of International Business Machines Corporation Acrobat is a registered trademark of Adobe Systems Incorporated All other brand and product names are trademarks or registered trademarks of their respective companies Copyright Keithley Instruments Inc 1999 All rights reserved Reproduction or adaptation of any part of this documentation beyond that permitted by Section 117 of the 1979 United States Copyright Act without permission of the Copyright owner is unlawful 1999 Keith
23. 28 AWG Dimensions 4 9 inches W x 6 9 inches L x 0 90 inches H on 0 062 inches G10 FR4 Terminal material Nickel plated brass Board material FR4 Weight 7 ounces Mounting via four 4 40 screws Environmental Storage temperature range 25 C to 85 C derated operation Operational 0 C to 55 C Relative humidity To 95 noncondensing Table A 8 lists the specifications for the cable CAB 305 Table A 8 CAB 305 cable specifications Feature Specifications Length 2 meters Conductors 34 twisted pairs shielded 28 AWG on 50 mil centers Connectors 1 AMP 68 pin self locking receptacle 787170 7 KPCI 3101 KPCI 3104 Series User s M anual Supported capabilities Specifications A 9 The KPCI 3101 4 Series DriverLINX Software provides support for A D D A DIN DOUT and C T subsystems For information on how to install DriverLINX refer to Section 3 Installa tion and Configuration Table A 9 summarizes the board features available for use with DriverLINX DriverLINX pro vides functions that return support information for specified subsystem capabilities at runtime The first row in the table lists the subsystem types The first column in the table lists all possible subsystem capabilities NOTE Blank fields represent unsupported options Table A 9 KPCI 3101 4 series supported options K PCI 3101 4 Series A D D A DIN DOUT C T Total Subsystems on
24. 4 Series boards every six months NOTE Ensure that you installed the DriverLINX software prior to using the DriverLINX KPCI 3101 4 Series Calibration Utility Refer to the DriverLINX Online Documentation for more information This section describes how to run the KPCI 3101 4 Series DriverLINX Calibration Utility and calibrate the analog I O circuitry of the KPCI 3101 4 Series boards Your KPCI 3101 4 Series board was initially calibrated at the factory You are advised to check the calibration of a board every six months and to calibrate again when necessary This section provides the information you need to calibrate a KPCI 3101 4 Series board Objectives For analog inputs the objective of this procedure is to zero the offsets and adjust the combined gain of the A D converter and instrumentation amplifier For analog outputs the objective is to independently zero the offset and adjust the gain for each of the digital to analog converters DACs on your KPCI 3101 Series board Calibration summary Analog inputs and outputs are calibrated using a DC calibrator a DVM DMM and the Driver LINX Calibration Utility The DriverLINX Calibration Utility was installed on your computer when you installed the DriverLINX software No calibration potentiometers must be adjusted Instead on board trimming digital to analog converters trim DACs are adjusted digitally through the Calibration Utility software No test points on the board are u
25. Analog Input 4 Return 11 30 Analog Input 5 12 29 Analog Input 13 R6 ES Analog Input 5 Return 13 62 Analog Input 6 14 61 Analog Input 14 R7 ER Analog Input 6 Return 15 28 Analog Input 7 16 27 Analog Input 15 R8 EIS Analog Input 7 Return 17 26 Amp Low Jumper W1 Connects Amp Low to 18 25 Analog Ground Analog Ground KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 13 Analog output and power screw terminals Table 3 2 lists the screw terminal TB assignments for analog output and power connections on the STA 300 screw terminal panel Wee SE and power screw terminal assignments on the STA 300 TB J1Pin Description 19 58 DACO Output 20 57 DACO Return 21 60 DACO Reference 22 23 DACT Return 23 24 DAC1 Output 24 59 DAC Reference 41 1 5V Output 1A 42 35 Power Ground Counter Timer and digital UO screw terminals Table 3 3 lists the screw terminal TB assignments for digital I O connections on the STA 300 screw terminal panel Cu cane and digital UO screw terminal assignments on the STA 300 TB J 1 Pin Description TB J 1 Pin Description 25 42 Digital Ground 50 16 Digital I O Port A Line 1 26 41 User Clock Input 0 51 49 Digital I O Port A Line 2 27 40 User Counter Output 0 52 15 Digital I O Port A Line 3 28 39 External Gate 0 53 48 Digital I O Port A L
26. Application Programming Interface API for the KPCI 3101 4 Series boards e It supports programmers who wish to create custom applications using Visual C C Visual Basic or Delphi e Jt accomplishes foreground and background tasks to perform data acquisition e It is the needed interface between TestPoint and LabVIEW and a KPCI 3101 4 Series board DriverLINX software and user s documentation on a CD ROM are included with your board TestPoint is an optional fully featured integrated application package with a graphical drag and drop interface which can be used to create data acquisition applications without programming LabVIEW is an optional fully featured graphical programming language used to create virtual instrumentation Refer to Section 3 Installation and Configuration for more information about DriverLINX TestPoint and LabView 1 6 Overview Accessories KPCI 3101 KPCI 3104 Series User s Manual The following optional accessories are available for the KPCI 3101 4 Series board STA 300 screw terminal panel Screw terminal panel with two connectors The STP 300 includes features such as jumpers for selecting AMP LO connections for use with pseudo differential input convenient locations for addition of bias return resisters for use when measuring floating inputs in differential mode convenient locations for current sense shunt resistors for sensing current loops Connector J1 accommo
27. If only one KPCI 3101 4 board was installed you replace or repair it If more than one KPCI 3101 4 board was installed you use PCI connection tests and if necessary I O tests to find which board is bad NOTE This is not a stand alone procedure Use it only when it is called for by another procedure Problem isolation Scheme G verification of problem solution In Scheme G you put your system back together and verify that it works after apparently resolving the problem in prior schemes NOTE This is not a stand alone procedure Use it only when it is called for by another procedure Follow these instructions as you perform Scheme G 1 Assuming that the problem has been resolved do the following a Turn off the computer b Install good KPCI 3101 4 boards in good slots C 14 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual c Reconnect all external circuits If you left external circuits connected to the screw termi nal accessory connect the accessory to your board If you disconnected external circuits from the screw terminal accessory reconnect them and the accessory as discussed in Section 3 Installation and Configuration d Turn on the computer and start your data acquisition software 2 Repeat the task that you were doing with your data acquisition system when the problem occurred and observe the performance 3 Based on the results of step 2 do one of the following e If
28. KPCI 3101 KPCI 3104 Series User s M anual Specifications A 7 Table A 5 lists the power physical and environmental specifications for the KPCI 3101 4 Series board Table A 5 Power physical and environmental specifications Feature Specifications Power 5V 0 25V 1 2A nominal 5V not used 12V 55mA maximum 48mA nominal 12V 50mA maximum 38mA nominal 5V Power Out J1 1 1A maximum with resettable fuse Physical Dimensions 8 5 inches length by 4 2 inches width Weight 5 95 ounces 170 grams Environmental Operating temperature range Storage temperature range Relative humidity 0 C to 70 C 25 C to 85 C To 95 noncondensing Table A 6 lists the connector specifications for the KPCI 3101 4 Series board Table A 6 Connector specifications Feature Specifications Connector part number AMP 68 pin 0 05 Subminiature D 749621 7 Shielded enclosure with jack screws Recommended shielded cable AMP 750752 1 Madison 28 GA Twisted Pair 68KDK00029 A 8 Specifications KPCI 3101 KPCI 3104 Series U ser s Manual Table A 7 lists the specifications for the STA 300 screw terminal panel Table A 7 STA 300 specifications Feature Specifications Mechanical J1 AMP 68 pin connector SCSI II 787170 7 J2 AMP 26 pin connector 104341 6 Terminal block insulator Polyamide 6 6GV Screw type M 2 5 x 5 Chrome plated steel Wire size 14 to
29. L Digital Ground 2 28 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Figure 2 16 shows an example of performing an enabled rate generation operation using an external C T clock source with an input frequency of 4kHz a clock divider of 4 a low to high pulse type and a duty cycle of 75 The gate type does not matter for this example A 1kHz square wave is the generated output Figure 2 17 shows the same example using a duty cycle of 25 Figure 2 16 Example of rate generation mode with a 75 duty cycle Rate Generation Operation Starts l External C T Clock Input Signal 4kHz Pulse 75 duty cycle Output Signal Figure 2 17 Example of rate generation mode with a 25 duty cycle Continuous Pulse Output Operation Starts l emer UUU UUU Input Signal 4kHz Pulse Output Signal 25 duty cycle One Shot Use one shot mode to generate a single pulse output signal from the counter when the operation is triggered determined by the gate input signal You can use this pulse output signal as an external digital TTL trigger to start other operations such as analog input or an external instrument When the one shot operation is triggered and a single pulse is output then the one shot opera tion s
30. O o Digital Ground 2 30 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Figure 2 19 shows an example of performing a one shot operation using an external gate input rising edge a clock output frequency of 1 kHz pulse period of 1 ms a low to high pulse type and a duty cycle of 99 99 Figure 2 20 shows the same example using a duty cycle of 50 Figure 2 19 Example of one shot mode using a 99 99 duty cycle LJ One Shot Operation Starts External Gate Signal a ims period gt 99 99 duty cycle Pulse Output Signal Figure 2 20 Example of one shot mode using a 50 duty cycle One Shot Operation Starts External g Gate Signal 1ms period a S Pulse Output Signal 50 duty cycle Repetitive one shot Use repetitive one shot mode to generate a pulse output signal each time the board detects a trig ger determined by the gate input signal You can use this mode to clean up a poor clock input signal by changing its pulse width then outputting it When the one shot operation is triggered determined by the gate input signal a pulse is output When the board detects the next trigger another pulse is output This operation continues until you stop the operation KPCI 3101 KPCI 3104 Series User s M anual Principles of O peration 2 31 The period of the output pulse is determined by the cloc
31. Series boards support a number of trigger sources and trigger acquisition modes described in the fol lowing subsections Trigger sources The KPCI 3101 4 Series board supports a software trigger and an external digital TTL trigger A software trigger event occurs when you start the analog input operation the computer issues a write to the board to begin conversions Specify the software trigger source in software An external digital trigger event occurs when the KPCI 3101 4 Series board detects either a ris ing or falling edge on the External TTL Trigger input signal connected to screw terminal TB46 on the STA 300 screw terminal panel pin 56 of connector J1 The trigger signal is TTL com patible Using software specify the trigger source as a rising edge external digital trigger or fall ing edge external digital trigger Trigger acquisition modes KPCI 3101 4 Series boards can acquire data in post trigger mode pre trigger mode or about trigger mode These trigger acquisition modes are described in more detail in the following sub sections Post Trigger acquisition Use post trigger acquisition mode continuous mode when you want to acquire data when a post trigger or retrigger if using triggered scan mode occurs Using DriverLINX software specify e The dataflow as continuous and e The trigger source to start the post trigger acquisition the post trigger source as any of the supported trigger sources
32. U ser s M anual Principles of O peration 2 7 External A D sample clock The external A D sample clock is useful when you want to pace acquisitions at rates not avail able with the internal A D sample clock or when you want to pace at uneven intervals Connect an external A D sample clock to screw terminal TB48 on the STA 300 screw terminal panel pin 22 on connector J1 Conversions start on the falling edge of the external A D sample clock input signal Using software specify the clock source as external Refer to the DriverLINX Analog I O Pro gramming Guide provided with DriverLINX For the KPCI 3101 4 Series board the clock fre quency is always equal to the frequency of the external A D sample clock input signal that you connect to the board through the screw terminal panel Analog input conversion modes KPCI 3101 4 Series boards support the following conversion modes e Single value operations are the simplest to use but offer the least flexibility and efficiency Using software you can specify the range gain and analog input channel among other parameters acquire the data from that channel and convert the result The data is returned immediately For a single value operation you cannot specify a clock source trigger source trigger acquisition mode scan mode or buffer Single value operations stop automatically when finished you cannot stop a single value operation e Scan mode takes full advantage of the capabi
33. a significant part of the signal or when common mode voltage exists When you choose the differential configuration eight analog input channels are available NOTE It is recommended that you connect all unused analog input channels to analog ground This section describes how to connect single ended pseudo differential and differential voltage inputs as well as current loop inputs to the STA 300 screw terminal panel Connecting single ended voltage inputs Figure 3 5 shows how to connect single ended voltage inputs channels 0 1 and 8 in this case to the STA 300 screw terminal panel Figure 3 5 Connecting single ended voltage inputs shown for channels 0 1 and 8 Signal STA 300 Panel Jumper W1 Source CEA Installed A Amp Low TB18 4 Vsource 0 Analog In 0 Q TB1 P w1 Analog In 8 D TB2 0 t 7 A Analog In 1 o TB3 O V Vsource 8 O n D 0 D O D O Vsource 1 O Analog Ground 3 16 Installation and Configuration Connecting pseudo differential voltage inputs KPCI 3101 KPCI 3104 Series User s M anual Figure 3 6 shows how to connect pseudo differential voltage inputs channels 0 1 and 8 in this case to the STA 300 screw terminal panel Figure 3 6 Connecting pseudo differential voltage inputs shown for channels 0 1 and 8 Signal Source _ Vsource 8 TB17 Vsource 0 Analog In 0
34. alue V M Synchr Digital I O Val 0 0 0 0 0 9 A Number of Channels 176 2 1 1 1 Q SE Support Yes SE Channels 16 0 0 0 0 DI Support Yes Yes Yes Yes DI Channels 8 2 1 1 1 Filter Channel Support Number of Filters 1 1 1 1 0 Number of Voltage Ranges 2 4or 18 0 0 0 Range per Channel Support Software Programmable Resolution Yes Yes 0 Number of Resolutions 1 1 29 Se 1 Binary Encoding Support Yes Yes Yes Yes Yes Twos Complement Support Data Encoding Resolution Ranges Filters Channd Type Channds Software Trigger Support Yes Yes Yes Yes Yes External Trigger Support Yes Yes Threshold Trigger Support Threshold Trigger Support Analog Event Trigger Support Triggers Digital Event Trigger Support Timer Event Trigger Support Number of Extra Triggers EX 0 0 0 0 KPCI 3101 KPCI 3104 Series U ser s M anual Specifications A 11 Table A 9 KPCI 3101 4 series supported options cont K PCI 3101 4 Series A D D A DIN DOUT C T Total Subsystems on Board 1 2 3 3 4 Internal Clock Support Yes Yes Yes External Clock Support Yes Yes Number of Extra Clocks 0 0 0 0 0 3 Base Clock Frequency 20MHz 0 0 0 20MHz U Maximum External Clock Divider 1 0 1 0 1 0 1 0 65536 Minimum External Clock Divider 1 0 1 0 1 0 1 0 2 0 Maximum Throughput 3MHz 1 0Hz 0 0 10MHz Minimum Throughput 1 2Hz 1 0Hz 0 0 0 005Hz 3 Cascading Support Yes Event Count Mode Support Yes Gene
35. data acquisition applications without programming for TEEE 488 instruments data acquisition boards and RS232 485 instruments and devices TestPoint includes features for controlling external devices responding to events processing data creating report files and exchanging information with other Windows programs It pro vides libraries for controlling most popular GPIB instruments TestPoint interfaces with your KPCI 3101 4 Series board through DriverLINX using a driver that is provided by the manufacturer 3 4 Installation and Configuration KPCI 3101 KPCI 3104 Series U ser s M anual LabVIEW LabVIEW is a fully featured graphical programming language used to create virtual instrumen tation It consists of an interactive user interface complete with knobs slide switches graphs strip charts and other instrument panel controls Its data driven environment uses function blocks that are virtually wired together and pass data to each other The function blocks which are selected from palette menus range from arithmetic functions to advanced acquisition con trol and analysis routines Also included are debugging tools help windows execution high lighting single stepping probes and breakpoints to trace and monitor the data flow execution LabVIEW can be used to create professional applications with minimal programming A Keithley VI palette provides standard virtual instruments VIs for Lab VIEW that interface with yo
36. depth A10 random A 10 sequential A 10 zero start A 10 Channel Gain List FIFO 2 4 channels analog input 2 3 analog output 2 16 counter timer digital I O number of A 10 Checks troubleshooting systematic problem isolation C 2 clock sources external A D sample clock 2 7 external C T clock 2 20 internal A D sample clock 2 6 internal C T cloc internal retrigger cloc internally cascaded C T coach 2 20 clocks base frequency A 11 externa internal A 11 maximum external clock divide A 11 maximum throughput A 11 minimum external clock divider A 11 minimum throughpu _A 11 number of extralA 11 common ground sense jumper 3 10 connecting KPCI 3101 4 Series board I O pin assignments _3 7 connecting signal analog outputs _3 19 current loop analog inputs 3 18 differential analog inputs 3 17 digital inputs and outputs_3 20 event counting applications _3 21 3 22 externally cascaded counter timers _3 22 B 24 frequency measurement ee pseudo differential analog inputs 3 16 pulse output applications 3 23 single ended analog inputs 3 15 Connector expansion slot systematic problem isolatio connector J1 pin assignments KPCI 3101 4 Series board B 2 STA 300 screw terminal pane connector J2 pin assignments STA 300 screw terminal panel B 4 Connector Pin Assignments continuous operation about trigge continuously p
37. number of scans per trigger A 9 retrigger frequency _A 9 scan per trigger A 9 Triggered Scan Counte triggered scan mode U V triggers external 2 10 number of extr software 2 10 Troubleshooting systematic problem isolation specified hardware I O tests _C 14 specified software I O tests C 20 tests problem isolation scheme specified analog input hardware test C 14 analog input software test C 20 analog output hardware test C 17 analog output software test C 22 general purpose digital I O hardware tes general purpose digital I O software test troubleshooting procedure 6 2 troubleshooting table 6 4 TTL trigger 2 10 Turbo Paxcal function libraries for programming inf 1 3 unipolar signals 2 4 unpacking the board 3 2 Verification to conclude systematic problem isolation _C 13 verifying board operatior _4 2 viewing the KPCI 3101 4 Series documentatio Visual Basic DriverLINX driver fol 3 3 function libraries for programming in 1 3 CO 1 4 Z Visual C C DriverLINX driver bai 3 3 voltage ranges number off A 10 voltmeter in DriverLINX Analog I O Panel 4 2 W1 jumper 3 10 Windows messages A 9 Windows operating system required versio Wiring systematic problem isolation scheme Tod C 13 wiring recommendations 3 14 wiring signalg 3 14 analog outputs 3 19 current loop analog inputs 3 18 differential analog inp
38. output level control Table C 8 Test connections and correct readings for mid range analog output using an STA 300 screw terminal accessory connected to the KPCI 3101 4 board connect the DVM or DMM to these terminals on an STA 300 If board works correctly the accessory following voltages should agree To test this Analog output Analog ground Level control Voltage reading analog output screw terminal screw terminal setting at DVM or DMM Analog output 0 DACO Output 5 0V 5 0V pin 58 TB19 TB18 Analog output 1 DAC1 Output pin 25 5 0V 5 0V pin 24 TB23 KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 25 10 Based on the measured voltages in steps 7 and 9 take action as follows e If the voltages measured with the DVM DMM do not agree with the application software settings then there could be a problem with the way your application software program interfaces with DriverLINX or the way it prepares the analog data being sent to the board Stop here and return to step 3 of Problem isolation Scheme C application soft ware where you were directed to do analog output software tests e If the voltages measured with the DVM DMM agree with your application software set tings then your software is probably working correctly with the analog outputs Stop here and return to step 3 of Problem isolation Scheme C application software where you were di
39. programming technical reference and infor mation specific to the KPCI 3101 4 Series hardware 1 4 Overview KPCI 3101 KPCI 3104 Series U ser s Manual Viewing the KPCI 3101 4 series documentation online The DriverLINX Manuals and this manual have been provided in electronic form in PDF file format on the KPCI 3101 4 Series CD ROM To view these documents you need to install Rev 3 01 or later of Adobe Acrobat Reader on your hard drive refer to DriverLINX for installation instructions View the KPCI 3101 4 Series documentation by clicking the manual title Here are a few helpful hints about using Adobe Acrobat Reader To navigate to a specific section of the document click a heading from the table of contents on the left side of the document Within the document click the text shown in blue to jump to the appropriate reference the pointer changes from a hand to an index finger To go back to the page from which the jump was made click the right mouse button and Go Back or from the main menu click View then Go Back To print the document from the main menu click File then Print To increase or decrease the size of the displayed document from the main menu click View then Zoom By default text and monochrome images are smoothed in Acrobat Reader resulting in blurry images If you wish you can turn smoothing off by clicking File then Preferences General and unchecking Smooth Text and Monochrome Images
40. single channel The simplest way to acquire data from a single channel is to specify the channel for a single value analog input operation using software refer to page 2 7 for more information on single value operations You can also specify a single channel using the analog input channel list described in the next section 2 4 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Specifying one or more channels On the KPCI 3 101 4 Series board you can read data from one or more analog input channels using an analog input channel list You can group the channels in the list sequentially either starting with 0 or with any other analog input channel or randomly You can also specify a sin gle channel or the same channel more than once in the list Using DriverLINX software specify the channels in the order you want to sample them The analog input channel list corresponds to the Channel Gain List FIFO first in first out buffer on the board You can enter up to 1 024 entries in the channel list The channels are read in order using continuous paced mode or triggered scan mode from the first entry to the last entry in the channel list You can read the channels in the channel list up to 256 times per trigger for a total of 262 144 samples per trigger using triggered scan mode Refer to page 2 7 for more informa tion on the supported conversion modes Specifying digital input lines in the analog input channel list
41. the screw terminal accessory as indicated in Table C 7 3 Connect the STA 300 screw terminal accessory to the KPCI 3101 4 board 4 Turn on the host computer and boot Windows 95 98 or NT 5 Start DriverLINX and your application software 6 Set your application software to output OV at analog outputs 0 and 1 7 Measure and compare the analog output voltages as indicated in Table C 7 a Measure the voltages at analog outputs 0 and 1 with your DVM DMM b Compare the voltages you measured in step 7a with the voltages you set via the analog output level control Table C 7 Test connections and correct readings for zero voltage analog output using an STA 300 screw terminal accessory connected to J1 connect the DVM or DMM to these terminals on an STA 300 If board works correctly the accessory following voltages should agree To test this Analog output Analog ground Level control Voltage reading analog output screw terminal screw terminal setting at DVM or DMM Analog output 0 DACO Output 0 0V 0 0V pin 58 TB19 TB18 Analog output 1 DAC1 Output pin 25 0 0V 0 0V pin 24 TB23 8 Set your application software to output 5V at analog outputs 0 and 1 9 Measure and compare the analog output voltages as indicated in Table C 8 a Measure the voltages at analog outputs 0 and 1 with your DVM DMM b Compare the voltages you measured in step 9a with the voltages you set via the analog
42. 0 03 accuracy 3MSamples s 3MSamples s External A D sample clock Input type Input load High level input voltage Low level input voltage Hysteresis High level input current Low level input current Minimum pulse width Maximum frequency Schmitt trigger falling edge sensitive 1 HCT14 TTL 2 0V minimum 0 8V maximum 0 4V minimum 1 5V maximum 1 0uA 1 0uA 100ns high 100ns low See Data Throughput spec above Termination 22kQ resistor pullup to 5V External A D digital TTL trigger Input type Schmitt trigger edge sensitive Input load 1 HCT14 TTL High level input voltage Low level input voltage Hysteresis High level input current Low level input current Minimum pulse width Termination 2 0V minimum 0 8V maximum 0 4V minimum 1 5V maximum 1 0uA 1 0nA 100ns high 100ns low 22kQ resistor pullup to 5V A 4 Specifications KPCI 3101 KPCI 3104 Series U ser s Manual Table A 2 lists the specifications for the D A subsystem Table A 2 D A subsystem specifications Feature Specifications Number of analog output channels KPCI 3102 and KPCI 3104 2 Resolution KPCI 3102 KPCI 3104 12 bits Data encoding input Offset binary Nonlinearity integral KPCI 3102 KPCI 3104 1LSB Differential linearity KPCI 3102 KPCI 3104 0 5LSB monotonic Output range KPCI 3102 KPCI 3104 Zero Error 10V 0 to 10V 5V 0 to 5V Softw
43. 01 4 board is listed under Keithley KPCI 3101 4 Series e The lamp icon next to the specific board part number is uncolored e The amplifier icon next to Keithley KPCI 3101 4 Series is colored yellow b Click the Configure button The Select Logical Device dialog box appears c Select your next action based on the criteria given in the following alternatives e If only one KPCI 3101 4 board is installed a default device number of 0 in the text box is correct Click OK e If other KPCI 3101 4 boards are installed and configured and have been assigned device numbers then type in a device number for the board you are configuring the next unassigned number in the numbering sequence Then click OK The Configure DriverLINX Device dialog box appears as well as the Device Manager d No changes in the Device dialog box changes are normally required Click OK e If a Device Change message appears then click OK C 8 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series U ser s M anual f If more than one unconfigured board was found in the DriverLINX Configuration Man ager in step 4 configure the additional boards now Repeat substeps 7a through 7e for each remaining unconfigured board g Close out all programs and reboot your computer to complete the configuration process h Open and check the Device Manager as you did in step 4 Your KPCI 3 101 4 board s should now be listed under the DriverLINX with no exclamation
44. 2 and KPCI 3104 boards support four output ranges 10V 0 to 10V 5V and 0 to 5V A 12 Specifications KPCI 3101 KPCI 3104 Series U ser s M anual Ka When configured for 16 bits of resolution both element 0 and element use DIO bits 15 to 0 Ports A and B are combined however you cannot use both elements at the same time When configured for 8 bits of resolution element 0 uses bits 7 to 0 Port A and element 1 uses bits 15 to 8 Port B Port C element 2 always uses a fixed resolution of 7 and cannot be combined with Port A or Port B OL_TRG_EXTERN is the rising edge external digital TTL trigger input OL_TRG_EXTRA is the falling edge digital external TTL trigger input For KPCI 3101 and KPCI 3102 boards the maximum throughput for analog input channels is 225kHz for KPCI 3103 and KPCI 3104 boards and the maximum throughput for analog input channels is 400kHz For all boards if the channel gain list contains channel 16 only the digital input channel the maximum throughput is 3MHz If using cascaded counter timers this value is 5MHz Any two adjacent counter timers such as 1 2 or 2 3 or 3 4 can be cascaded If you are not using cascaded counter timers this value is approximately 305 18Hz High edge and low edge are supported for one shot and repetitive one shot modes High level and low level are supported for event counting and rate generation modes ka wn A Connector Pin Assignments B 2 C
45. 3101 4 board was listed in the Device Manager or if the same board was listed in more than one place then repeat substeps d e and f of step 10 until no KPCI 3101 4 boards are listed anywhere in the Device Manager 11 Uninstall only the KPCI 3101 4 version of DriverLINX from your system using the Win dows 95 98 NT Add Remove Programs feature Proceed as follows a b C NOTE d In the Start menu of Windows 95 98 NT click Settings Control Panel In the Control Panel that appears click Add Remove Programs In the Add Remove Programs Properties dialog box that appears select DriverLINX for Keithley 3101 4 Uninstall only DriverLINX for Keithley 3101 4 If additional Driver LINX versions are installed leave them installed At the bottom of the Add Remove Programs Properties dialog box click Add Remove and then follow the remainder of the Windows uninstall prompts CAUTION During the course of an uninstall procedure you will typically be 12 Rei asked if you wish to uninstall certain files that may be shared by other programs In such cases always click Vo Mistakenly uninstalling files needed by other programs causes serious problems Mistakenly keeping files causes no harm and some uninstalled files may be overwritten anyway when you subsequently reinstall DriverLINX nstall DriverLINX referring to the brief DriverLINX installation instructions on the Read This First sheet that was shipped with your K
46. 4 for more informa tion on specifying digital input lines for a continuous digital input operation Refer to Using DriverLINX with Your Hardware provided with DriverLINX for information about this function KPCI 3101 KPCI 3104 Series U ser s M anual Principles of O peration 2 19 Counter Timer features The counter timer circuitry on the board provides the clocking circuitry used by the A D sub system as well as several user counter timer features This section describes the following user counter timer features e Counter timer channels e C T clock sources e Gate types e Pulse types and duty cycles e Counter timer operation modes Counter Timer channels The KPCI 3101 4 Series board supports four user 16 bit counter timer channels called counters counters are numbered 0 1 2 and 3 Figure 2 8 Counter Timer channel Clock Input Signal internal external or Counter internally cascaded Pulse Output Signal Gate Input Signal software or external input Each counter corresponds to a counter timer C T subsystem To specify the counter to use in software specify the appropriate C T subsystem For example counter 0 corresponds to C T subsystem element 0 counter 3 corresponds to C T subsystem element 3 Using software you can internally route the clock output signal from one user counter to the clock input signal of the next user counter to internally cascade the counters
47. 41Hz KPCI 3101 KPCI 3104 Series U ser s M anual Principles of O peration 2 9 To select internally retriggered scan mode use software to specify the following parameters e The dataflow as continuous continuous pre trigger or continuous about trigger e Triggered scan mode usage as enabled e The retrigger mode as internal e The number of times to scan per trigger or retrigger also called the multiscan count e The frequency of the retrigger clock The initial trigger source depends on the trigger acquisition mode you use refer to page 2 10 for more information on the supported and trigger sources and trigger acquisition modes Externally Retriggered scan mode Use externally retriggered scan mode if you want to accurately control the period between con versions of individual channels and retrigger the scan based on an external event Like internal retrigger scan mode this mode allows you to acquire 262 144 samples per trigger 256 times per trigger x 024 location channel gain list NOTE Use externally retriggered scan mode with continuous post trigger acquisitions only refer to page 2 10 for more information on post trigger acquisitions When a KPCI 3101 4 Series board detects an initial trigger post trigger source only the board scans the channel gain list up to 256 times then waits for an external retrigger to occur You can specify any supported post trigger source as the initial trigger Specify the external dig
48. Board 1 2 3 3 4 Single Value Operation Support Yes Yes Yes Yes f Continuous Operation Support Yes Yes Yes A 3 Continuous Operation until Trigger Event Support Yes z Continuous Operation before and after Trigger Event Yes S Asynchronous Operation Support Yes 32 Buffer Support Yes P Single Buffer Wrap Mode Support Yes Multiple Buffer Wrap Mode Support Yes Inprocess Buffer Flush Support Yes Number of DMA Channels 0 0 0 0 0 Supports Gap Free Data with No DMA Yes A Supports Gap Free Data with Single DMA Supports Gap Free Data with Dual DMA Triggered Scan Support Yes Maximum Number of CGL Scans per Trigger 2564 0 0 0 0 S Supports Scan per Trigger Event Triggered Scan Yes Supports Internal Retriggered Triggered Scan Yes Extra Retrigger Support Ys i Maximum Retrigger Frequency 155kHz 0 0 0 0 T or 219kHz Minimum Retrigger Frequency 1 2Hz5 0 0 0 0 A 10 Specifications KPCI 3101 KPCI 3104 Series U ser s M anual Table A 9 KPCI 3101 4 series supported options cont K PCI 3101 4 Series A D D A DIN DOUT C T Total Subsystems on Board 1 2 3 3 4 Maximum Channel Gain List Depth 1024 1 0 0 0 9 44 Sequential Channel Gain List Support Yes f Zero Start Sequential Channel Gain List Support Yes U Random Channel Gain List Support Yes Programmable Gain Support Yes U Number of Gains 4 1 1 1 0 o Synchronous Digital I O Support aximum Synchronous Digita
49. DMM will be connected to these terminals To check this analog output Analog output screw terminal Analog ground screw terminal Analog output 0 pin 58 TB19 TB18 pin 25 Analog output 1 pin 24 TB23 TB18 pin 25 C 18 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual CAUTION The following test procedure involves changing DVM DMM connec tions while the computer and K PC1 3101 4 board are powered Take care not to short analog outputs to the adjacent 10 V refer ence terminal or nearby ground terminal Shorting the analog out puts can damage the digital to analog converters DACs Asa precaution do the following e Before powering the computer connect the DVM D MM negative lead to a ground screw terminal e After powering the computer connect the DVM DMM positive lead to each specified analog output screw terminal by touching the tip of the lead to the screw head of the screw terminal for example via a probe Procedure for the analog output hardware test 1 Turn off the host computer H EE Connect the negative lead of the DVM DMM to a ground terminal of the screw terminal accessory Connect the STA 300 screw terminal accessory to the KPCI 3101 4 J1 connector Turn ON the host computer and boot Windows 95 98 or NT In the Start menu click Programs Find the DriverLINX Test Panels folder under which you should find the AIO Panel entry NOTE
50. Driver Selection Case B If all three of the following statements are true then skip to step 14 Driver LINX and your board are installed properly and are working together More than one type of board is installed in your computer under DriverLINX The DriverLINX Analog I O Panel initially appears but perhaps with any or all of the following differences 1 tiny buttons located at the right side of the Driver Selection text box and or the Device Selection text box 2 a different board driver under Driver Selection 3 a different device number under Device Selection 4 different tabs at the top of the screen To change the tabs at the top of the screen use the tiny buttons next to the text boxes 1 select the board driver under Driver Selection to be KPCI3101 4 and 2 select the correct device number under Device Selection which is 0 if only one KPCI 3101 4 board is installed Case C If neither of the two scenarios above apply neither Case A nor Case B then continue with step 3 there may be a problem with the DriverLINX installation and or the board configuration C 6 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series U ser s M anual 3 Select the next step in Scheme B based on the criteria given in the following alternatives If you have already reconfigured or reinstalled DriverLINX and the board yet still cannot successfully start the Analog I O Panel then the cause of your problem may be o
51. If more than one type of board is installed in your computer under Driv erLINX the Analog I O your board type and device number may not be displayed initially and fewer tabs may be displayed at the top of the screen If so click the scroll buttons next to the Driver Selection and Device Selection text boxes until your KPCI 3101 4 board type and device number are displayed All six tabs will then be displayed Click the Level Control tab The on screen analog output level control appears Using your mouse slide the CHO level control button until the tiny display at the bottom of the level control reads 0 0 volts In the same way set the CH1 level control so that its tiny display reads 0 0 volts KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 19 10 Measure and compare the analog output voltages as indicated in Table C 3 a Measure the voltages at analog outputs 0 and 1 with your DVM DMM b Compare the voltages you measured in step 10a with the voltages you set via the analog output level control Table C 3 Test connections and correct readings for zero voltage analog output using an STA 300 screw terminal accessory connected to J1 connect the DVM or DMM to these terminals on an STA 300 If board works correctly the accessory following voltages should agree To test this Analog output Analog ground Level control Voltage reading analog output screw terminal screw termina
52. KPCI 3101 4 Series board that you know is functional Do not make any I O connections Apply computer power and check operation with the functional KPCI 3101 4 Series board in place This test checks the computer accessory slot If you are using more than one KPCI 3101 4 Series board check the other slots you are using If the accessory slots are functional check the I O hookups Connect the accessory and expansion boards one at a time and check operation If operation is normal the problem is in the KPCI 3101 4 Series board s originally in the computer Try the KPCI 3101 4 Series board s one at a time in the computer to determine which is faulty Use the troubleshooting information in the next section to try to isolate the problem If you cannot isolate the problem refer to Appendix C for a more detailed problem isolation scheme If you cannot isolate the problem after further investigation refer to page 6 6 for instructions on getting technical support 6 4 Troubleshooting Troubleshooting table KPCI 3101 KPCI 3104 Series U ser s Manual If you still experience problems try using the information in Table 6 1 to isolate and solve the problem If you cannot identify the problem refer to Technical support Table 6 1 Troubleshooting problems Symptom Possible C ause Possible Solution Board does not respond The board configuration is incorrect Check the configuration of your devic
53. KPCI 3104 12 bits Analog output channels The KPCI 3102 and KPCI 3104 boards support two serial multiplying DC level analog output channels DACO and DAC1 Refer to Section 3 Installation and Configuration for informa tion on how to wire analog output signals to the board using the screw terminal panel You con figure the channel type as differential through software Within each DAC the digital data is double buffered to prevent spurious outputs then output as an analog signal Both DACs power up to a value of OV 10mV Resetting the board does not clear the values in the DACs The KPCI 3101 4 Series board can output data from a single analog output channel only Spec ify the channel for a single value analog output operation using software Refer to Analog out put conversion modes on this page for more information on single value operations O utput ranges and gains For the KPCI 3102 and KPCI 3104 board you can specify one of the following ranges for each DAC using software 10V 0 to 10V 5V or 0 to 5V In software specify a gain of 1 for analog output operations KPCI 3101 KPCI 3104 Series User s M anual Principles of O peration 2 17 Analog output conversion modes KPCI 3102 and KPCI 3104 boards can perform single value operations only Use software to specify the range gain and analog output channel among other parameters then output the data from the specified channel You cannot specify a clock so
54. NN software The following software is available for use with the KPCI 3101 4 Series board KPCI 3101 4 Series standard software package Shipped with KPCI 3101 4 Series boards Includes DriverLINX for Microsoft Windows and function libraries for writing application programs under Windows in a high level language such as C C Visual Basic Delphi and Test Point LabVIEW support files utility programs and language specific example programs DriverLINX the high performance real time data acquisition device drivers for Windows application development includes e DriverLINX API DLLs and drivers supporting the KPCI 3101 4 Series hardware e Analog I O Test Panel a DriverLINX program that verifies the installation and opera tion of your KPCI 3101 4 Series board and demonstrates several virtual bench top instruments e Learn DriverLINX an interactive learning and demonstration program for DriverLINX that includes a Digital Storage Oscilloscope e Source Code for the sample programs e DriverLINX Application Programming Interface files for the KPCI 3101 4 Series interfaces e DriverLINX Calibration Utility used to calibrate the ADC and DAC functions of the KPCI 3 101 4 Series board e DriverLINX On line Help System provides immediate help as you operate Driver LINX e Supplemental Documentation on DriverLINX installation and configuration analog and digital I O programming counter timer
55. Oscilloscope e Measure analog voltages using the Digital Volt Meter e Generate Sine Square and Triangle waves using the SST Signal Generator e Output DC Level voltages using the Level Control e Set and read all digital input and output bits on your board The Analog I O Panel is useful for e Testing the KPCI 3101 4 Series board DriverLINX installation and configuration e Verifying signal inputs to your KPCI 3101 4 Series board e Sending test signals to external devices e Controlling the DC output voltages of two analog output channels e Setting and reading all digital input and output bits on your board Start the DriverLINX Analog I O Panel as follows 1 In the Start menu click Programs 2 Find the DriverLINX Test Panels folder under which you should find the AIO Panel entry 3 Click on the AIO Panel entry The Analog I O Panel setup screen appears e Ifa KPCI 3101 4 Series board is the only board in your computer installed under Driver LINX only one item appears under Driver Selection e If more than one type of board is installed in your computer under DriverLINX the Ana log I O Panel will list multiple drivers under Driver Selection and multiple devices listed under Device Selection for example Device0 Device1 etc Your board type and device number may not be displayed initially If so click the scroll buttons next to the Driver Selection and Device Selection text boxes until your KPCI 3108 board
56. Output Reference to TB21 the board provides an internal 10V reference Figure 3 11 as shown in Figure 3 11 Connecting analog output voltages using the board s internal 10V reference shown for channel 0 STA 300 Panel Analog Output 0 O Analog Output 0 Return Load KPCI 3101 4 Series DACO 10kQ 10V Reference 3 20 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual Connecting digital UO signals Figure 3 12 shows how to connect digital input signals lines 0 and 1 of digital Port A in this case to the STA 300 screw terminal panel Figure 3 12 Connecting digital inputs shown for channels 0 and 1 port A STA 300 Panel gt Digital O Port A LineO TT q TB49 TTL Inputs C e Digital UO Port A Line 1 Se TB50 O L OD i O D Digital Ground TB43 D OD O 09 0 09 Figure 3 13 shows how to connect a digital output signal line 0 of digital Port B in this case to the STA 300 screw terminal panel Figure 3 13 Connecting digital outputs shown for channel 0 port B STA 300 Panel e 0 Out LED On A D TBS7 5000 e Digital UO Port B Line 0 t OD 5V OD O Digital Ground 0 TB43 D 00900000 KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 21 Connecting counter timer signals T
57. PCI 3101 4 board and is also provided on the CD ROM containing this manual Make sure that DriverLINX installs smoothly and completely 13 Rei nstall the board s CAUTION Wear a grounded wrist strap to avoid electrostatic damage to the NOTE board Do not touch board components or conductors when han dling the board If you are performing Scheme B independently as an installation check then reinstall all boards that you removed in step 9 If you are perform ing Scheme B as part of the systematic problem isolation procedure then reinstall only the good board that you began using near the end of Scheme A Proceed as follows a Shut down and turn off the computer b Install the board s in its expansion slot s following this brief procedure in Section 3 of the manual c Turn ON and reboot the computer Run the procedure for configuring the board to work with DriverLINX in Section 3 Return to step 1 and run the installation check again C 10 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual 14 You arrived at this step from step 2 after successfully starting the Analog I O Panel Select your next action based on the criteria given in the following alternatives e If you are performing Scheme B independently as an installation check then Driver LINX and your KPCI 3101 4 board are installed correctly Return to Section 3 and finish installing your data acquisition system e I
58. RMS 42 4V peak or 60VDC are present A good safety practice is to expect that hazardous voltage is present in any unknown circuit before measuring Users of this product must be protected from electric shock at all times The responsible body must ensure that users are prevented access and or insulated from every connection point In some cases connections must be exposed to potential human contact Product users in these circumstances must be trained to protect themselves from the risk of electric shock If the circuit is capable of operating at or above 1000 volts no conductive part of the circuit may be exposed As described in the International Electrotechnical Commission IEC Standard IEC 664 digital multimeter measuring circuits e g Keithley Models 175A 199 2000 2001 2002 and 2010 are Installation Category II All other instruments signal terminals are Installation Category I and must not be connected to mains Do not connect switching cards directly to unlimited power circuits They are intended to be used with impedance limited sources NEVER connect switching cards directly to AC mains When con necting sources to switching cards install protective devices to lim it fault current and voltage to the card Before operating an instrument make sure the line cord is connect ed to a properly grounded power receptacle Inspect the connecting cables test leads and jumpers for possible wear cracks or breaks before ea
59. Refer to page 2 7 for more information on the supported conversion modes refer to page 2 10 for information on the supported trigger sources Post trigger acquisition starts when the board detects the post trigger event and stops when the specified number of post trigger samples has been acquired or when you stop the operation If you are using triggered scan mode the board continues to acquire post trigger data using the specified retrigger source to clock the operation Refer to page 2 8 for more information on trig gered scan mode Figure 2 2 illustrates continuous post trigger mode using a channel gain list with three entries channel 0 channel 1 and channel 2 Triggered scan mode is disabled In this example post trigger analog input data is acquired on each clock pulse of the A D sample clock When it reaches the end of the channel gain list the board wraps to the beginning of the channel gain list and repeats this process Data is acquired continuously continuously paced scan mode KPCI 3101 KPCI 3104 Series User s M anual Principles of O peration 2 11 Figure 2 2 Continuous post trigger mode without triggered scan Chan 0 Chan2 ChanO Chan2 ChanO Chan2 ChanO Chan Chan 1 Chan 1 Chan 1 Chan 1 A D Sample Clock g Post trigger data acquired Post trigger event occurs continuously Figure 2 3 illustrates the same example using triggered scan mode eit
60. SOFTWARE Limitation of Liability KEITHLEY INSTRUMENTS SHALL IN NO EVENT REGARDLESS OF CAUSE ASSUME RESPONSIBILITY FOR OR BE LIABLE FOR 1 ECONOMICAL INCIDENTAL CONSEQUENTIAL INDIRECT SPECIAL PUNITIVE OR EXEMPLARY DAMAGES WHETHER CLAIMED UNDER CONTRACT TORT OR ANY OTHER LEGAL THEORY 2 LOSS OF OR DAMAGE TO THE CUSTOMER S DATA OR PROGRAM MING OR 3 PENALTIES OR PENALTY CLAUSES OF ANY DESCRIPTION OR INDEMNIFICATION OF THE CUSTOMER OR OTHERS FOR COSTS DAMAGES OR EXPENSES RELATED TO THE GOODS OR SERVICES PROVIDED UNDER THIS WARRANTY KEITHLEY Keithley Instruments Inc 28775 Aurora Road Cleveland OH 44139 e 440 248 0400 e Fax 440 248 6168 e http www keithley com BELGIUM Keithley Instruments B V Bergensesteenweg 709 e B 1600 Sint Pieters Leeuw e 02 363 00 40 e Fax 02 363 00 64 CHINA Keithley Instruments China Yuan Chen Xin Building Room 705 12 Yumin Road Dewai Madian Beijing 100029 e 8610 62022886 Fax 8610 62022892 FRANCE Keithley Instruments Sarl B P 60 3 all e des Garays e 91122 Palaiseau C dex e 01 64 53 20 20 e Fax 01 60 11 77 26 GERMANY Keithley Instruments GmbH Landsberger Strasse 65 D 82110 Germering 089 84 93 07 40 Fax 089 84 93 07 34 GREAT BRITAIN Keithley Instruments Ltd The Minster e 58 Portman Road Reading Berkshire RG30 1EA e 0118 9 57 56 66 Fax 0118 9 59 64 69 INDIA Keithley Instruments GmbH Flat 2B WILOCRISSA 14 Rest House Crescent Bangalore 560 001 91 80 509
61. TB1 Analog In 8 TB2 Analog In 1 TB3 D me NS Low as a remote ground sense 0990090 0 TB18 0099009 Remove Jumper W1 to use Amp Analog Ground L STA 300 Panel Make this connection as close to Vy sources as possible to reduce ground loop errors Vem is the common mode voltage for all 16 analog inputs KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 17 Connecting differential voltage inputs Figure 3 7A illustrates how to connect a floating signal source to the STA 300 screw terminal panel using differential inputs A floating signal source is a voltage source that has no connec tion with earth ground You need to provide a bias return path by adding resistors R1 to R8 for channels 0 to 7 respectively for floating signal sources If the input signal is 10V then the common mode voltage could be 1V Theoretically the resis tor value OR should be 1V divided by the input bias current 20nA or SOM However when you add noise from external sources to the high impedance a resistor value of 100Q to 100kQ is more practical In Figure 3 7B the signal source itself provides the bias return path therefore you do not need to use bias return resistors R is the signal source resistance while R is the resistance required to balance the bridge Note that the negative side of the bridge supply must be returned to analog ground
62. User s M anual KPCI 3101 3102 3103 3104 Series PCI Bus Data Acquisition Boards KEITHLEY WARRANTY Hardware Keithley Instruments Inc warrants that for a period of three 3 years from the date of shipment the Keithley Hardware product will be free from defects in materials or workmanship This warranty will be honored provided the defect has not been caused by use of the Keithley Hardware not in accordance with the instructions for the product This warranty shall be null and void upon 1 any modification of Keithley Hardware that is made by other than Keithley and not approved in writing by Keithley or 2 operation of the Keithley Hardware outside of the environmental specifications therefore Upon receiving notification of a defect in the Keithley Hardware during the warranty period Keithley will at its option either repair or replace such Keithley Hardware During the first ninety days of the warranty period Keithley will at its option supply the necessary on site labor to return the product to the condition prior to the notification of a defect Failure to notify Keithley of a defect during the warranty shall relieve Keithley of its obligations and liabilities under this warranty Other Hardware The portion of the product that is not manufactured by Keithley Other Hardware shall not be covered by this warranty and Keithley shall have no duty of obligation to enforce any manufacturers warranties on behalf of the cust
63. ab The D A Calibration dialog box appears 2 To calibrate each DAC follow the on screen instructions in the D A Calibration dialog box 5 4 Calibration KPCI 3101 KPCI 3104 Series U ser s Manual Troubleshooting 6 2 Troubleshooting KPCI 3101 KPCI 3104 Series U ser s M anual General checklist Should you experience problems using the KPCI 3101 4 Series board please follow these steps 1 Read all the appropriate sections of this manual Make sure that you have added any Read This First information to your manual and that you have used this information 2 Check your distribution disk fora README file and ensure that you have used the latest installation and configuration information available 3 Check that your system meets the requirements stated in this manual 4 Check that you have installed your hardware properly using the instructions in this manual 5 Check that you have installed and configured DriverLINX properly using the instructions in the DriverLINX manuals that come with the DriverLINX software If your KPCI 3101 4 Series board is not operating properly use the information in this section to help you isolate the problem If the problem appears serious enough to require technical sup port refer to page 6 6 for information on how to contact an applications engineer If you encounter a problem with a KPCI 3101 4 Series board use the instructions in this section to isolate the cause of the proble
64. aced scan modd 2 7 event counting 2 23 externally retriggered scan mode 2 9 internally retriggered scan modd 2 8 post trigger A 9 pre trigger A 9 pulse output _2 26 conversion modes 2 7 continuously paced scan modd_2 7 externally retriggered scan mode 2 9 internally triggered scan mode 2 8 single value analog input 2 7 single value analog output 2 17 conversion rate 2 7 P 8 counter timer cascading externally 3 22 B 24 connecting event counting signals 3 21 connecting frequency measurement signals 3 23 connecting pulse output signals _3 23 screw terminal assignments 3 13 counter timer features _2 19 CIT clock sources 2 19 A 1T een channel duty cycle 2 22 event counting mode _2 23 A 11 frequency measurement _2 24 high edge gate type 2 21 A 11 high level gate typd_2 21 A 11 high to low output pulse A 11 internal gate typed 2 21 low edge gate type_2 21 A 11 low level gate type A 11 low to high output pulse A 11 one shot mode 228 pulse output types 2 22 rate generation mode_2 26 A 11 repetitive one shot modd_2 30 A 11 specifications _A 6 counting events 2 23 CPU required for KPCI 3101 4 Series_1 5 current loop inputs 3 18 D A subsystem _2 16 specifications _A 4 DACs digital to analog converters calibrating 5 3 data ear binary A 10 data flow modes continuous about trigger operations A 9 continuous C T ope
65. alog channel 0 apply a DC voltage to channel 1 and measure the results NOTE During this test ensure that no user circuits are connected to the KPCI 3101 4 board via the required screw terminal accessory except for analog input connections specified for the test KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 21 NOTE NOTE The analog input test is a software function test not a calibration check although readings from a properly calibrated board should correspond to a known test voltage within the accuracy specifications of the board If you wish to check and adjust the accuracy refer to Section 5 Calibration The analog input software test is only a basic check of your application software You are encouraged to perform additional tests that exercise your software more thoroughly Equipment for the analog input software test The following equipment is needed for the analog input test e A voltage source supplying a known voltage at lt 5V Refer to Table C 5 for more details e Optional A Digital Voltmeter DVM or a Digital Multimeter DMM to accurately deter mine the voltage of the voltage source e An STA 300 screw terminal accessory wired as shown in Table C 5 This is the same wiring scheme as used in the analog input hardware tests e If possible use a screw terminal accessory that is reserved for I O tests Avoid using a screw terminal accessory that is normally conne
66. ard s is listed under Keithley KPCI 3101 4 The lamp icon next to the specific board part number is uncolored KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 7 e If you see the following on the screen for a KPCI 3101 4 board then the board is recognized as a device under DriverLINX and is properly configured Keithley KPCI 3101 4 Series is listed under DriverLINX The amplifier icon next to Keithley KPCI 3101 4 Series is colored pale gray A device number for example Device or Device1 Device2 etc is listed under Keithley KPCI 3101 4 Series instead of a specific board part number The lamp icon next to the device number is colored green j Leave the DriverLINX Configuration Panel open for now and continue with step 5 5 Based on the results of step 4 do one of the following e If your board is properly installed and configured your inability to run the Analog I O Panel may be due to an improperly installed component of DriverLINX Skip to step 9 and begin uninstalling then reinstalling DriverLINX and the board e If one of your KPCI 3101 4 boards is apparently recognized by DriverLINX but is listed in the Device Manager under DriverLINX with a large exclamation point then try con figuring it with the DriverLINX Configuration Panel Skip to step 7 e If one of your KPCI 3101 4 boards is listed under Other Devices or is listed in the Device Manager at multiple
67. are adjustable to zero Gain Error KPCI 3102 KPCI 3104 2LSB reference Current output 5mA minimum 10V 2kQ Output impedance 0 3Q typical Capacitive drive capability 0 001uF minimum no oscillations Protection Power on voltage Short circuit to Analog Common OV 10mV maximum Settling time to 0 01 of FSR 50us 20V step 10 0us 100mV step Slew rate 2V us Multiplying Zero Error 10mV maximum External Reference Output 10V 10mV Reference Input Impedance 5kQ typical KPCI 3101 KPCI 3104 Series User s M anual Specifications Table A 3 lists the specifications for the DIN DOUT subsystems Table A 3 DIN DOUT subsystem specifications A 5 Feature Number of lines PortA Specifications 8 bidirectional Port B Specifications 8 bidirectional Port C Specifications 7 bidirectional High level input voltage Low level input voltage 2 0V minimum 0 8V maximum 2 0V minimum 0 8V maximum Termination 22kQ resistor pullup to 5V 22Q series resistor Inputs Input type Level sensitive Level sensitive Level sensitive Input load 2 FCT2574 TTL 2 FCT2574 TTL 1 ASIC TTL 2 0V minimum 0 8V maximum High level input current 3uA 3uA 1004A Low level input current 3uA 3uA 100uA Outputs Output driver FCT2574 TTL FCT2574 TTL ASIC TTL Output driver high voltage 2 4V mini
68. arent damage If the board looks okay you check the independent functionality of your computer If the computer is okay you check the expansion slots that held your KPCI 3101 4 board s Follow these instructions as you perform Scheme A 1 Remove and inspect the KPCI 3 101 4 board s for damage as follows a b Shut down Windows 95 98 NT and turn off power to the host computer Turn off power to all external circuits and accessories connected to the KPCI 3101 4 board s that is installed c Disconnect STA 300 screw terminal accessories from your KPCI 3101 4 board s e Remove the KPCI 3101 4 boards from the computer making note of the socket s in which the board s was installed If more than one KPCI 3101 4 board is installed remove all boards and note which board was in which socket Visually inspect all removed KPCI 3101 4 board s for damage Based on the results of step 1 do the following If the board s you removed is obviously damaged then repair or replace the board Refer to Section 6 Technical support for information on returning the board for repair or replacement Skip to Problem isolation Scheme G verification of problem solution If the board s you removed is not obviously damaged then continue with step 3 and check for host computer malfunction Check if the computer functions satisfactorily by itself Proceed as follows a Place the board s that you removed from t
69. ave the same configuration For example if you use Port A as an input port lines 0 to 7 of Port A are configured as inputs Likewise if you use Port C as an output port lines 0 to 6 of Port C are configured as outputs DriverLINX lets you dynamically reconfigure digital I O ports at run time using a Digital Setup Event Refer to DriverLINX Digital I O Programming Guide for information and limitations of this function For fast clocked digital input operations you can enter the digital I O lines from Ports A and B as a channel in the analog input channel list refer to page 2 4 for more information By default the digital I O lines power up as digital inputs On power up or reset no digital data is output from the board 2 18 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Combining or splitting logical channels DriverLINX supports a software extension to Logical Channel addressing that allows applica tions to combine adjacent Logical Channels into a single channel or split a Logical Channel into smaller addressable parts For instance applications can address individual bits on the digital TO ports or read and write multiple channels with a single operation In DriverLINX Native units refer to the hardware defined digital channel size 8 bits for KPCI 3101 4 When using extended Logical Channel addressing DriverLINX groups digital bits in units defined by a size code and then assigns consecu
70. ble to find out elsewhere whether you have the correct version of software e If you are uncertain at this point that your application program is properly installed then reinstall it now When you are satisfied that it is properly installed go to step 11 and retry selected I O software tests Problem isolation Scheme D expansion dot connectors In Scheme D you further check and try to remedy apparent expansion slot malfunctions NOTE This is not a stand alone procedure Use it only when it is called for by another procedure 1 Remove computer power again and install a KPCI 3101 4 board that you know is func tional Do not make any I O connections 2 Turn computer power on and check operation with the functional board in place This test checks the computer accessory slot If you were using more than one board when the prob lem occurred use the functional board to also test the other slot 3 If the accessory slots are functional use the functional board to check the I O connections Reconnect and check the operation of the I O connections one at a time 4 If operation fails for an I O connection check the individual inputs one at a time for shorts and opens 5 If operation remains normal to this point the problem is in the KPCI 3101 4 board s origi nally in the computer If you were using more than one board try each board one at a time in the computer to determine which is faulty KPCI 3101 KPCI 3104 Series U ser
71. ceseeseceeeeeeeeeeeteeeead 3 Installation and Configuration Figure 3 1 Inserting the KPCI 3101 4 series board in the computer eee eee eeeeeeseeceeeseecaecsaecaeeaeeaeenseeereeeeeees Figure 3 2 Attaching the STA 300 screw terminal panel to a KPCI 3101 4 series board Figure 3 3 Layout of the STA 300 screw terminal pang Figure 3 4 Removal of jumper W1 for remote ground sensing 0 0 0 eeeesesecseeeeeeeseteeeececneeeeeseceecseestesesaeceteseeaeeaeeeel Figure 3 5 Connecting single ended voltage inputs shown for channels 0 1 and Mi Figure 3 6 Connecting pseudo differential voltage inputs shown for channels 0 1 and Ri 3 16 Figure 3 7 Connecting differential voltage inputs shown for channel ON 3 17 Figure 3 8 Connecting differential voltage inputs from a grounded signal source shown for channel 0 3 18 Figure 3 9 Connecting current inputs Shown for channel 0 3 18 Figure 3 10 Connecting analog output voltages using an external 10V reference shown for channel 0 3 19 Figure 3 11 Connecting analog output voltages using the board s internal 10V reference shown for channel 0 3 19 Figure 3 12 Connecting digital inputs shown for channels 0 and 1 port A 3 20 Figure 3 13 Connecting digital outputs shown for channel 0 port BI 3 20 Figure 3 14 Connecting event counting signals shown for clock input 0 and external gate 0 3 21 Figure 3 15 Connecting event counting signals without an ex
72. ch use For maximum safety do not touch the product test cables or any other instruments while power is applied to the circuit under test ALWAYS remove power from the entire test system and discharge any capacitors before connecting or disconnecting cables or jump ers installing or removing switching cards or making internal changes such as installing or removing jumpers Do not touch any object that could provide a current path to the common side of the circuit under test or power line earth ground Always make measurements with dry hands while standing on a dry insulated surface capable of withstanding the voltage being measured The instrument and accessories must be used in accordance with its specifications and operating instructions or the safety of the equip ment may be impaired Do not exceed the maximum signal levels of the instruments and ac cessories as defined in the specifications and operating informa tion and as shown on the instrument or test fixture panels or switching card When fuses are used in a product replace with same type and rating for continued protection against fire hazard Chassis connections must only be used as shield connections for measuring circuits NOT as safety earth ground connections If you are using a test fixture keep the lid closed while power is ap plied to the device under test Safe operation requires the use of a lid interlock Ifa screw is present connect it to
73. ciceeccssasescessecbeuscevascbeessdesscuseasigussbscessscbersvesbesces soedotersecenesedeaseveeess Device initialization error messages Problem 1sOlatiOmisyse cccsesdaveecs secs cpaskcas reese News chacscdatach ecesaeescusibeds chieathdts Mees E EA E E Eet deet o Troubleshooting Goble A Testing the board and host computer Testing the accessory slot and I O connections Technical Support ET Returning equipment to Keithley occ eeeceencessecessecescecsseeenceceneecseceseeesecesaeceseecaeeenaeceeeecaeceeaeceeeesaeceaeecsaes Specifications leren Rene UE A 9 Connector Pin Assignments Systematic Problem Isolation Problem isolation Scheme A basic system eee eee eseeeseeeecesceseceeceeeeeeeeeeecaeeseecaeesaecaeesaecseseseeteeeeeeenes C 3 Problem isolation Scheme B installation 0 0 0 ee esse eeseeseceeeeseceeeeeeeeeeeeeesaeeseecaeesaecaessaecsessaeeeeneeeersees C 5 Problem isolation Scheme C application software 0 eee ceeeeseceeceseceeceseeeeceseteeeeseseeeeaeeseecaeeeaeenaeaaee C 10 Problem isolation Scheme D expansion slot Connectors 0 0 0 0 ee eeceeeceeceseeeeceeeeeeeeeeeeeeeseeeaecaeetaeeaeeaee C 12 Problem isolation Scheme E user Wiring e cee eeecscessececeseecseceseceeceseeseeeseeeeceeeseeseeeeneseaeeeaecaeesaesaeenaeed C 13 Problem isolation Scheme E the board o0 eee ceesecsceeeececeseceeceaeeeeeeseeeeseaeeseeeaeeeeeeaeeeaesaeesaesaeeeaeey C 13 Problem isolation Scheme G verification of problem souen
74. ck hazards and are familiar with the safety precautions re quired to avoid possible injury Read the operating information carefully before using the product The types of product users are Responsible body is the individual or group responsible for the use and maintenance of equipment for ensuring that the equipment is operated within its specifications and operating limits and for en suring that operators are adequately trained Operators use the product for its intended function They must be trained in electrical safety procedures and proper use of the instru ment They must be protected from electric shock and contact with hazardous live circuits Maintenance personnel perform routine procedures on the product to keep it operating for example setting the line voltage or replac ing consumable materials Maintenance procedures are described in the manual The procedures explicitly state if the operator may per form them Otherwise they should be performed only by service personnel Service personnel are trained to work on live circuits and perform safe installations and repairs of products Only properly trained ser vice personnel may perform installation and service procedures Exercise extreme caution when a shock hazard is present Lethal voltage may be present on cable connector jacks or test fixtures The American National Standards Institute ANSI states that a shock hazard exists when voltage levels greater than 30V
75. crew terminal TB31 pin 6 of connector J1 e For Counter 2 the C T output signal is screw terminal TB35 pin 37 of connector J1 e For Counter 3 the external C T output signal is screw terminal TB39 pin 3 of connector J1 The KPCI 3101 4 Series board supports the following pulse output types on the clock output signal e High to low transitions The low portion of the total pulse output period is the active por tion of the counter timer clock output signal e Low to high transitions The high portion of the total pulse output period is the active portion of the counter timer pulse output signal Using software you can specify the duty cycle of the pulse The duty cycle or pulse width indi cates the percentage of the total pulse output period that is active A duty cycle of 50 then indi cates that half of the total pulse is low and half of the total pulse output is high Figure 2 9 illustrates a low to high pulse with a duty cycle of approximately 30 Figure 2 9 Example of a Low to High pulse output type Active Pulse Width pa High Pulse i LI ap Total Pulse Period Counter Timer operation modes The KPCI 3101 4 Series board supports the following counter timer operation modes e Event counting e Frequency measurement e Rate generation e One shot e Repetitive one shot Refer to the following subsections for more information on these operation modes KPCI 3101 KPCI 3104 Series U
76. cted to your external circuits You thereby avoid the extra labor and potential wiring errors involved in disconnecting and later reconnecting your external circuits Table C 5 Wiring for analog input hardware test using an STA 300 screw terminal accessory connected to the Analog I O connections e A voltage divider e g 10kW or 20kW between the 5V board power output terminal TB1 pin 41 and analog ground terminal TB18 pin 25 between this and an analog input analog ground Connect this test voltage terminal terminal OV via a short between the analog input terminal and TBI TB18 ground Analog In0 Analog Ground pin 68 Pin 25 lt 5V from one of the following TB3 TB3 e A battery Analog In 1 Analog Ground e An isolated power supply pin 34 pin 25 For example composed of two 5KQ or 10KQ resistors Observe the CAUTION below CAUTION If you use the 5V board power to energize a voltage divider ensure that the 5V board power terminal cannot accidentally short to ground A short to ground can damage one or more of the following the screw terminal accessory the board the computer C 22 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual Procedure for the analog input software test Perform the analog input test as follows 1 Turn off the host computer H Oy ZS E Wire a screw terminal accessory as described under Equipment f
77. dates the analog and digital I O signals from the KPCI 3101 4 Series board and connector J2 allows you to connect 5B sig nal conditioning backplanes In addition the STA 300 in conjunction with the CAB 305 cable is the configuration in which KPCI 3101 4 was tested for CE emissions STP 68 screw terminal panel Screw terminal panel with one connector The 68 pin con nector accommodates the analog and digital I O signals from the KPCI 3101 4 Series board The screw terminals are wired so that when connected using a CAB 305 cable the terminal number corresponds to a terminal number on the attached plug in board The STP 68 is not shielded and was not used in CE emission testing CAB 305 cable A 2 meter twisted pair shielded cable that connects the 68 pin connector J1 on the KPCI 3101 4 Series board to the J1 connector on the STA 300 screw terminal panel or to the 68 pin connector on the STP 68 screw terminal panel Principles of O peration Principles of O peration KPCI 3101 KPCI 3104 Series U ser s Manual This section describes the analog input analog output digital I O and counter timer features of the KPCI 3101 4 Series board To frame the discussions refer to the block diagram shown in Figure 2 1 Note that bold entries indicate signals you can access Figure 2 1 Block diagram of the KPCI 3101 4 series boards
78. e 3 9 on page 3 18 for an example of using cur rent shunt resistors with current loop inputs Screw terminal assignments With the connector held up the screw terminals on the right side of the STA 300 match pins 23 to 34 and pins 57 to 68 of the standard 68 pin connector on the KPCI 3101 4 Series boards these screw terminals represent the analog I O signal connections The remaining screw termi nals are located on the left side of the STA 300 screw terminal panel and are provided for the digital I O counter timer and 5V power signals The following subsections describe the screw terminal assignments on the STA 300 screw ter minal panel by function 3 12 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual Analog input screw terminals Table 3 1 lists the screw terminal TB assignments for analog input connections on the STA 300 screw terminal panel Table 3 1 Analog input screw terminal assignments on the STA 300 Resistor U se Bias Return Current Shunt TB J1Pin Description Resistor Resistor 1 68 Analog Input 0 2 67 Analog Input 8 RI i Analog Input 0 Return 3 34 Analog Input 1 4 33 Analog Input 9 R2 SE Analog Input 1 Return 5 66 Analog Input 2 6 65 Analog Input 10 R3 SR Analog Input 2 Return 7 32 Analog Input 3 8 31 Analog Input 11 R4 Se Analog Input 3 Return 9 64 Analog Input 4 10 63 Analog Input 12 R5 E
79. e KPCI 3101 4 boards using the Windows 95 98 Device Manager as follows a Shut down and turn off the computer b Open the Device Manager by right clicking the My Computer icon clicking Properties on the menu that appears then clicking the Device Manager tab A list of installed devices appears c Select your next step based on the criteria given in the following alternatives e If the Device Manager lists a DriverLINX drivers item click the sign to the left of this item A second level list may appear with the specific model number of your KPCI 3101 4 board More than one KPCI 3101 4 board may be listed if you previ ously installed more than one KPCI 3101 4 board Alternatively if a previously installed board is not properly recognized by DriverLINX it may not be listed here or may be listed with a large exclamation point over it e Ifthe Device Manager lists an Other Devices item also click the sign to the left of this item You should not but could find a KPCI 3101 4 board listed under this item if it is not properly recognized by DriverLINX KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 9 Select any one of the KPCI 3101 4 boards that you find in the Device Manager wher ever you find it At the bottom of the list of devices click Remove On the Confirm Device Removal dialog box that appears click OK The board is removed from the list of devices If more than one KPCI
80. e board to work with DriverLINX 0 eee ceseeseceeceseceeeeseeeeeeeeseeesaeeeaeeseecaecaaecaecaeaeseeaeens Checking the combined board and DriverLINX installations 0 eee eee ceceeeceeeeeeeeeeeeesenetaeesaeeseecaeesaes 3 7 Attaching the STA 300 screw terminal Done 3 8 PUA PEL EE 3 10 E 3 11 Screw terminal ASSIS enee shed sdusneahevsasues sesneadiaoobaosaee dvobuduaysduapeuberviuameanevacs 3 11 EE eege Ke EE Connecting analog input signals eee eee eseeseeceeeseeceecsaecaeceaeaecsseeseceeseseseeseseseeeeaseaeeseecaeesaesaseaeeaeens 3 15 Connecting analop OUtpUl Signal cc cccssckiebsteksesasssbencsvecesuseesnevoasaeaseeveenstestsessed bose SET EEEE SES EEE EEEE e 3 19 Connecting digital VO Sipmals i cssscsvcessescssscensessssucvess nbaescastepuennnaasebiaes aT EEEE REEERE SEENTE E EE EERE ERE S 3 20 Connecting GOUD DD BIER ergeet dE een EENS EES Attaching the STP 68 screw terminal oan 3 25 Testing the Board Driver INX analog VO Pane ssnin crearea aen ro oee E eE ER EEE EE EERE OEE 4 2 Calibration tree lee ln Calibration summary Ee OT Calibration procedure Preparing Tor the CaliDrations sssr siriene ieee eese EE aTe EEEE KERERE RT KAES REK Eas nE aa e Calibrating the anal g Inputs cc cocii sesudces setiasvectsesveacesalsiSontsesvavsieevesavetsvivaceuuesebbensssbsnbesdeeUvensenlsgoabvbslecssuenesuts Calibrating the analog outputs Troubleshooting General CHECKS ccrois Using the DriverLINX event viewer cccccceccsss
81. e driver to ensure that the board name and type are correct The board is incorrectly aligned in a PCI expansion slot The board is damaged Check that the slot in which your KPCI 3101 4 Series board is located is a PCI slot and that the board is correctly seated in the slot Contact Keithley Instruments Intermittent operation Loose connections or vibrations exist Check your wiring and tighten any loose connections or cushion vibration sources The board is overheating Check environmental and ambient temperature consult the board s specifications in the Appendix of this manual and the documentation provided by your computer manufacturer for more information Electrical noise exists Check your wiring and either provide better shielding or reroute unshielded wiring Data appears to be invalid An open connection exists Check your wiring and fix any open connections A transducer is not connected to the channel being read The board is set up for differential inputs while the transducers are wired as single ended inputs or vice versa Check the transducer connections Check your wiring and ensure that what you specify in software matches your hardware configuration Computer does not boot Board is not seated properly Check that the slot in which your KPCI 3101 4 Series board is located is a PCI slot that the board is correctly seated in the slot and that
82. e following paragraph for information on obtain ing technical support 6 6 Troubleshooting Technical support KPCI 3101 KPCI 3104 Series U ser s Manual Before returning any equipment for repair call Keithley for technical support at 1 888 KEITHLEY Monday Friday 8 00 a m 5 00 p m Eastern Time An applications engineer will help you diagnose and resolve your problem over the telephone Please make sure you have the following information available before calling the factory for technical support K PCI 3101 4 Board Configuration Computer Operating System Software Package Compiler if applicable Accessories Model Serial Revision code Base address setting Interrupt level setting Number of channels Manufacturer CPU type Clock speed MHz KB of RAM Video system BIOS type DOS version Windows version Windows mode Name Serial Version Invoice Order Language Manufacturer Version Type Type Type Type Type Type Type Type KPCI 3101 KPCI 3104 Series User s M anual Troubleshooting 6 7 Returning equipment to Keithley If a telephone resolution is not possible the applications engineer will issue you a Return Mate rial Authorization RMA number and ask you to return the equipment Include the RMA num ber with any documentation regarding the equipment When returning eq
83. ead the register on the board to determine where the post trigger data starts Note that the host computer cannot read data directly from the board the data must be transferred to the host computer Using PCI bus mastering the board transfers the analog input data to a 256KB circular buffer in the host computer this buffer is dedicated to the hardware Therefore unlike ISA and EISA boards the KPCI 3101 4 Series board requires no DMA resources The board treats each buffer as two consecutive 128 KB blocks of memory KPCI 3101 KPCI 3104 Series U ser s M anual Principles of O peration 2 15 NOTE When you stop an analog input operation a final block of two samples is transferred even if only one sample is required The host software ignores the extra sample DriverLINX accesses the KPCI 3101 4 hardware circular buffer to fill user buffers that you allocate in software It is recommended that you allocate a minimum of three buffers for analog input operations and the stop events controlling them Refer to DriverLINX manuals for more information If Counter Timer Event is specified data is written to the allocated buffers until no more empty buffers are available at that point the operation stops If Command Digital or Analog event is specified data is written to the allocated mul tiple buffers continuously when no more empty buffers are available the board overwrites the data in the filled buffers star
84. easure the frequency The Windows timer uses a resolution of lms In this configuration frequency is determined using the following equation Frequency Measurement dee UI Ot EN q S Duration of the Windows Timer If you need more accuracy than the Windows timer provides you can connect a pulse of a known duration such as a one shot output of another user counter to the external gate input as shown in Figure 2 13 Figure 2 13 Connecting frequency measurement signals shown for clock input 0 and external gate 0 Digital Ground QM TB25 O TB26 O o TB28 Signal Source Gate 0 Q TB29 f User Clock Input 0 D Hear D TB31 Counter C O Output 1 STA 300 Panel In this configuration use DriverLINX software to set up the counter timers as follows 1 Set up one of the counter timers for one shot mode specifying the clock source clock fre quency gate type type of output pulse high or low and pulse width 2 Set up the counter timer that will measure the frequency for event counting mode specifying the clock source to count and the gate type this should match the pulse output type of the counter timer set up for one shot mode 3 Start both counters events are not counted until the active period of the one shot pulse is generated 4 Read the number of events counted allow enough time to ensure that the active period of the one shot occurred and
85. ed for each board type therefore it cannot be programmed in software Table 2 1 Supported analog input resolutions Board Type Supported Resolution KPCI 3101 12 bits KPCI 3102 12 bits KPCI 3103 12 bits KPCI 3104 12 bits Analog input channels The KPCI 3101 4 Series board supports 16 single ended or pseudo differential analog input channels or 8 differential analog input channels on board Refer to Section 3 Wiring signals for a description of how to wire these signals You configure the channel type through Driver LINX software NOTE For pseudo differential inputs specify single ended in software in this case how you wire these signals determines the configuration Choose this configuration when noise or common mode voltage the difference between the ground potentials of the signal source and the ground of the STA 300 screw terminal panel or between the grounds of other signals exists and the differential configuration is not suitable for your applica tion This option provides less noise rejection than the differential con figuration however all 16 analog input channels are available The KPCI 3101 4 Series board can acquire data from a single analog input channel or from a group of analog input channels Onboard channels are numbered 0 to 15 for single ended and pseudo differential inputs or 0 to 7 for differential inputs The following subsections describe how to specify the channels Specifying a
86. elp in isolating the cause of your problem You are at this point after having debugged the source code at least once and after having failed the I O software tests at least a second time You have tried to find more code bugs after two or more I O test failures and cannot find any more bugs e If none or only one of the above statements are true then continue with step 11 and selectively redo I O software tests Select your next step in Scheme C based on the criteria given in the following alternatives e If you have done the analog input software test at least once AND your software did not pass the analog input software test the last time then return to step 1 and redo that test e If you have done the analog input software test at least once AND your software passed the analog input software test the last time then assume that you do not need to repeat it Continue with step 12 Select your next step in Scheme C based on the criteria given in the following alternatives e Tf all three of the following apply then return to step 3 and redo the analog output soft ware test Your board has analog outputs You have done the analog output software test at least once Your software did not pass the analog output software test the last time you tried C 12 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual e If all three of the following apply then assume that you do not need to repeat the ana
87. entries channel 0 and channel 1 In this example pre trigger analog input data is acquired continuously on each clock pulse of the A D sample clock until the post trigger event occurs When the post trigger event occurs post trigger analog input data is acquired continuously on each clock pulse of the A D sample clock Figure 2 6 Continuous about trigger mode Chan 0 Chan 0 Chan 0 Chan 0 Chan 0 Chan 0 i Chan 1 Chan 1 Chan 1 Chan 1 Chan 1 Chan 1 A D Sample Clock Pre trigger data acquired Post trigger data acquired lt p q p Pre trigger event occurs Post trigger event occurs 2 14 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Figure 2 7 illustrates the same example using internally retriggered scan mode The multiscan count is 2 indicating that the channel gain list will be scanned twice per trigger or retrigger In this example pre trigger analog input data is acquired on each clock pulse of the A D sample clock for two scans then the board waits for the internal retrigger event When the internal retrigger occurs the board begins acquiring pre trigger data until the post trigger event occurs Then the board finishes scanning the channel gain list the specified number of times acquiring the data as post trigger samples On all subsequent internal retriggers post trigger data is
88. er recommended that you connect the return to the adjacent ground screw terminal A 5V output signal TB41 is available on the STA 300 screw terminal panel for low current signal conditioning applications up to 1A Wiring signals This section describes how to wire signals to the STA 300 screw terminal panel CAUTION TIP To avoid electrical damage ensure that power is turned off to the computer and to any attached devices before wiring signals to the STA 300 screw terminal panel When first installing the board try wiring a function generator or a known voltage source to analog input channel 0 use the differential configuration an oscilloscope or voltage meter to analog output chan nel 0 a digital input to digital I O Port A and an external clock or scope to counter timer channel 0 Then run DriverLINX Analog I O Panel to verify that the board is operating properly Once you have determined that the board is operating properly wire the signals according to your application 5 requirements Keep the following recommendations in mind when wiring signals to the STA 300 screw termi nal panel e Use individually shielded twisted pair wire size 14 to 26 AWG when using the KPCI 3101 4 Series board in a highly noisy electrical environment e Separate power and signal lines by using physically different wiring paths or conduits e To avoid noise do not locate the STA 300 screw terminal panel and cabling next to sources
89. ermine the frequency at which to pace the operation this is the frequency of the clock output signal The minimum clock divider that you can specify is 2 0 the maximum clock divider that you can specify is 65535 For example if you supply an external C T clock with a frequency of SMHz and specify a clock divider of 5 the resulting frequency of the external C T clock output signal is 1MHz The resulting frequency of the external C T clock output signal must not exceed 2 5MHz Connect the external C T clock source to the board through the STA 300 screw terminal panel as follows e For Counter 0 connect the external C T clock signal to screw terminal TB26 pin 41 of connector J1 e For Counter 1 connect the external C T clock signal to screw terminal TB30 pin 7 of connector J1 e For Counter 2 connect the external C T clock signal to screw terminal TB34 pin 36 of connector J1 e For Counter 3 connect the external C T clock signal to screw terminal TB38 pin 2 of connector J1 Internally cascaded clock The KPCI 3101 4 Series board supports internal cascading on counters 0 and 1 1 and 2 and 2 and 3 Cascading counters internally is an effective way to create a 32 bit counter without exter nally connecting two counters together To specify internal cascading use DriverLINX software to set the internal cascade mode then specify the clock input and gate input for the first counter in the cascaded pair Specify the clock source o
90. external gate input Triggers a counter timer operation on the transition from the high level to the low level falling edge In software this is called a low edge gate type Note that this gate type is used only for one shot and repetitive one shot mode refer to page 2 22 for more information on these modes Rising edge external gate input Triggers a counter timer operation on the transition from the low level to the high level rising edge In software this is called a high edge gate type Note that this gate type is used only for one shot and repetitive one shot mode refer to page 2 22 for more information on these modes Specify the gate type in software Connect an external gate input to the board through the STA 300 screw terminal panel as follows For Counter 0 connect the external gate signal to screw terminal TB28 pin 39 of connector J1 For Counter 1 connect the external gate signal to screw terminal TB32 pin 5 of connector J1 For Counter 2 connect the external gate signal to screw terminal TB36 pin 38 of connector J1 For Counter 3 connect the external gate signal to screw terminal TB40 pin 4 of connector J1 2 22 Principles of Operation KPCI 3101 KPCI 3104 Series U ser s M anual Pulse outputs The KPCI 3101 4 Series boards provide the following C T pulse output signals e For Counter 0 the C T output signal is screw terminal TB27 pin 40 of connector J1 e For Counter 1 the C T output signal is s
91. f the second counter as C Ty_ The clock output signal from first counter is the clock input signal of the second counter For example if counters and 2 are cascaded specify the clock input and gate input for counter 1 The rising edge of the clock input signal is active KPCI 3101 KPCI 3104 Series U ser s M anual Principles of O peration 2 21 Gate types The active edge or level of the gate input to the counter enables counter timer operations The operation starts when the clock input signal is received The KPCI 3101 4 Series board provides the following gate input types None A software command enables any specified counter timer operation immediately after execution This gate type is useful for all counter timer modes Logic low level external gate input Enables a counter timer operation when the external gate signal is low and disables the counter timer operation when the external gate signal is high Note that this gate type is used only for event counting frequency measurement and rate generation refer to page 2 22 for more information on these modes Logic high level external gate input Enables a counter timer operation when the exter nal gate signal is high and disables a counter timer operation when the external gate signal is low Note that this gate type is used only for event counting frequency measurement and rate generation refer to page 2 22 for more information on these modes Falling edge
92. f you performed Scheme B as part of the systematic problem isolation procedure AND arrived at this point after reconfiguring the board or reinstalling DriverLINX and the board then go to Problem isolation Scheme G verification of problem solution e If you performed Scheme B as part of the systematic problem isolation procedure AND arrived at this point without performing any remedial efforts then your problem must lie elsewhere Go to Problem isolation Scheme C application software and check for application software issues Problem isolation Scheme C application software In Scheme C you check for bugs in custom application software assuming that you can access the source code Alternatively you check for compatibility and installation issues in commercial application software In Scheme A you temporarily installed a KPCI 3101 4 board that is known to be good in place of a KPCI 3101 4 board that you removed from the computer This substitution still in place eliminates possible board I O problems during Scheme C You now perform I O tests using your application software You debug custom code if necessary and recheck NOTE This is not a stand alone procedure Use it only when it is called for by another procedure Follow these instructions as you perform Scheme C 1 Perform the procedure outlined in the Analog input hardware test found later in this appendix 2 Based on the results of the Analog input softwa
93. fos isiesuses essen deseeeccnds coesessesiveng cuvdgund oascssetedesutwguss sabsnesdeesateaneot inset ev ccabeuvivesngsceusravurstengeseucs 2 16 Output resolution ER Analog output channel Output ranges and TEE 2 16 Analog output conversion modes sestese tt Data ee EE 2 17 Dis tak EELER Digital T O line EE 2 17 Combining or splitting logical channel Using single value and continuous digital input ec cece ceeceeeeeeeeeeeeeeeseecseesaecaecsaecaessaeeeeeseeeeees Counters Timer EE 2 19 Counter Timer channels sirini ecien n cassis eines Bee Ain ele ein age de ete adden E 2 19 C T Wl 2 19 IEN Pulse OULU earen renen er E R I EEEE E E E RRS 2 22 Counter Timer operation modes ccssessescscsssesonescesseevecesseeeesrserssccosssonsecnestessesnesnavsoeeseeraresseossons 2 22 ii Installation and Configuration Unpacking E Installing the software Software options Installine Driver LINX seerne Sect ieeesscasepscievextvcansbensvuuvonbes ovens venebseatso cases sates ban teeateacsn tne EETAS RE aS RERE ESTS Installing application software and drvers Installing the DO EE Setting Up the COMPULSL iiss cocks Seve ctiecsdcedacesiaaesiecsscbsasaancusedahcoesuustabcescbest sebwsanevosnscbueevvanbancissuussaloapeuenedbes Selecting anceXpansiOn Slot c ccssscbssaccsiseasscesSasassaeavnsesassndesseansobepcnesaevsusvsseces ievnaastapasedhasesansudnaseadtentaesbeaesundy Inserting the KPCI 3101 4 series board in the computer Configuring th
94. g output voltages You set zero volts at the two analog outputs using your application software The two output volt ages are then measured with a digital voltmeter to verify reasonable DAC offsets Similarly a mid range voltage is set for each of the two analog outputs and the procedure is repeated NOTE During this test ensure that no user circuits are connected to the KPCI 3101 4 board via the required screw terminal accessory except for analog input connections specified for the test The analog output software test is a software function test not a calibra tion check If you wish to check and adjust the accuracy refer to Section 5 Calibration The analog output software test is only a basic check of your application software You are encouraged to perform additional tests that exercise your software more thoroughly C 23 KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation Equipment for the analog output software test The following equipment is required to perform the analog output test e A Digital Voltmeter DVM or a Digital Multimeter DMM set to the 10V range e AnSTA 300 screw terminal accessory to which you connect the DVM DMM as indicated in Table C 6 These are the same connections as made for the analog output hardware test If possible use a screw terminal accessory that is reserved for I O tests Avoid using a screw terminal accessory that is normally connected to your e
95. ge voltage is set for each of the two analog outputs and the procedure is repeated to verify proper digital to analog conversion NOTE During this test ensure that no user circuits are connected to the KPCI 3101 4 board via the required screw terminal accessory except for analog output connections specified for the test The analog output test is primarily a functional test not a calibration check although measured outputs from a properly calibrated board should correspond to DAC settings within the accuracy specifications of the board If you wish to check and adjust the accuracy refer to Section 5 Calibration Equipment for the analog output hardware test The following equipment is required to perform the analog output test e A Digital Voltmeter DVM or a Digital Multimeter DMM set to the 10V range e An STA 300 screw terminal accessory to which you connect the DVM DMM as indicated in Table C 2 These are the same connections as made for the analog output software test If possible use a screw terminal accessory that is reserved for I O tests Avoid using a screw terminal accessory that is normally connected to your external circuits You thereby avoid the extra labor and potential wiring errors involved in disconnecting and later reconnecting your external circuits Table C 2 Terminals on STA 300 screw terminal accessory to which DVM DMM will be connected during analog output hardware test nn the DVM or
96. gger and a post trigger acquisition Using software specify e The dataflow as continuous about trigger e The pre trigger source as the software trigger e The post trigger source as the external digital TTL trigger e The retrigger mode as the internal retrigger if you are using triggered scan mode Refer to page 2 7 for more information on the supported conversion modes refer to page 2 10 for information on the supported trigger sources NOTE When using about trigger acquisition you cannot use externally retriggered scan mode refer to page 2 8 for more information on triggered scan mode The about trigger acquisition starts when you start the operation When it detects the selected post trigger event the board stops acquiring pre trigger data and starts acquiring post trigger data If you are using internally retriggered scan mode and the post trigger event has not occurred the board continues to acquire pre trigger data using the internal retrigger clock to clock the opera tion If however the post trigger event has occurred the board continues to acquire post trigger data using the internal retrigger clock to clock the operation The about trigger operation stops when the specified number of post trigger samples has been acquired or when you stop the operation Refer to page 2 8 for more information on internally retriggered scan mode Figure 2 6 illustrates continuous about trigger mode using a channel gain list of two
97. gured Continue with Problem isolation Scheme B installation If the good board is not recognized as a PCI component in a slot s then the PCI slot connector s is suspect Continue with Problem isolation Scheme D expansion slot connectors Problem isolation Scheme B installation In Scheme B you check whether DriverLINX and your board are installed correctly and work together properly A proper start of the DriverLINX Analog I O Panel utility means that the com bined DriverLINX board installation is okay If the installation is not okay you try to diagnose and fix the problem ultimately reinstalling DriverLINX and the board if necessary NOTE This is not a stand alone procedure Use it only when it is called for by another procedure Follow these instructions as you perform Scheme B 1 Try starting the DriverLINX Analog I O Panel Proceed as follows a b C In the Start menu click Programs Find the DriverLINX Test Panels folder under which you should find the AIO Panel entry Click on the AIO Panel entry 2 Based on the results of Step 1 select one of the following Case A If both of the following statements are true then skip to step 14 DriverLINX and your board are installed properly and are working together A KPCI 3101 4 board is the only board in your computer installed under DriverLINX The DriverLINX Analog I O Panel appears with the KPCI3101 4 board listed under
98. have the following two software options In both cases the software interfaces with your system via the DriverLINX software provided with your board e The user can run a fully integrated data acquisition software package such as TestPoint or LabVIEW e The user can write and run a custom program in Visual C C Visual Basic or Delphi using the programming support provided in the DriverLINX software A summary of the pros and cons of using integrated packages or writing custom programs is provided in the Keithley Full Line Catalog The KPCI 3101 4 Series has fully functional driver support for use under Windows 95 98 NT NOTE The DriverLINX Installation and Configuration Guide explains the DriverLINX installation process To display this manual from your DriverLINX KPCI 3101 Series CD ROM open the Windows Explorer then double click on X Drvlinx4 DocsMnstconf pdf where X the letter of the CD ROM drive Acrobat Reader must already be installed on the other system If necessary you can first install Acrobat Reader directly from the CD ROM by double clicking X Acrobat setup exe KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 3 DriverLINX driver software for Windows 95 98 NT DriverLINX software supplied by Keithley with the KPCI 3101 4 Series board provides con venient interfaces to configure analog and digital I O modes without register level programming Most importantly however Drive
99. he KPCI 3101 4 Series board and STA 300 screw terminal panel provide counter timer chan nels that you can use to perform the following operations e Event counting e Frequency measurement e Pulse output rate generation one shot and repetitive one shot This section describes how to connect counter timer signals to perform these operations Refer to Counter Timer features on page 2 19 for more information on using the counter timers Connecting event counting signals Figure 3 14 shows one example of connecting event counting signals to the STA 300 screw ter minal panel using user counter 0 In this example rising clock edges are counted while the gate is active Figure 3 14 Connecting event counting signals shown for clock input 0 and external gate 0 STA 300 Panel Digital Ground TB25 D TB26 User Clock Input 0 Signal Source q TB28 Gate 0 o TB29 External Gating Switch No Digital Ground 3 22 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual Figure 3 15 shows another example of connecting event counting signals to the STA 300 screw terminal panel using user counter 0 In this example a software gate is used to start the event counting operation Figure 3 15 Connecting event counting signals without an external gate input shown for clock input 0 STA 300 Panel Digital Ground S gnal Source
100. he KPCI 3101 4 series boards eee eeeeeecsecneeseeeeceeeeeeseeeeeeeeees B 2 Table B 2 Pin assignments for connector J1 on the STIA 200 B 3 Table B 3 Pin assignments for connector J2 on the STA 300 occ ee eeessesecseceeeeeseteeeeceecneeeeesecnecseesetsecaeceseeeeaeeaseees B 4 C Systematic Problem Isolation Table C 1 Wiring for analog input hardware test using an STA 300 screw terminal accessory connected to the Analog I O connections c cccsesesesessescscsesceecsesesecessssescsesssecassesesessesesesesasscsessuececseseseceeseseseees Table C 2 Terminals on STA 300 screw terminal accessory to which DVM DMM will be connected during analog output hardware test Table C 3 Test connections and correct readings for zero voltage analog output using an STA 300 screw terminal accessory connected tO JI Table C 4 Test connections and correct readings for mid range analog output using an STA 300 screw terminal accessory connected to the upper Analog I O connector eee ceeeeeeseeeecseenseteeeeneenees C 19 Table C 5 Wiring for analog input hardware test using an STA 300 screw terminal accessory connected to the Analog VO COMMECHOMNS 6 c6 5653 sssicssocsetssqecossuses seuseeenoeiens TEDRE AES EEA EREEREER REN EiS Table C 6 Terminals on STA 300 screw terminal accessory to which DVM DMM will be connected during analog output hardware test C 23 Table C 7 Test connections and correct readings for zero voltage analog output using an STA 300 screw
101. he computer in an electrostatically safe loca tion Do not reinstall it Turn on power to the host computer Perform all needed diagnostics to determine whether your computer hardware and oper ating systems are functioning properly Based on the results of step 3 do one of the following If you find no computer or operating system malfunctions in step 3 then the problem likely lies elsewhere take action as follows If you do not have another KPCI 3101 4 board that you know is good i e works properly read the instructions in Section 6 Technical support Then contact Keithley for help in isolating the cause of your problem If you have another KPCI 3101 4 board that you know is good i e works properly then continue with step 5 If you find computer or operating system malfunctions in step 3 do the following a Determine the cause of the computer hardware or operating system malfunctions b Fix the computer hardware or operating system malfunctions c Assume that fixing the malfunctions has solved your problem and skip to Problem isolation Scheme G verification of problem solution C 4 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series U ser s M anual 5 Determine the PCI resources detected by your computer before any KPCI 3101 4 boards are installed Proceed as follows a Shut down Windows 95 98 NT and turn off power to the host computer b Insert a blank diskette or any di
102. her internally or exter nally retriggered The multiscan count is 2 indicating that the channel gain list will be scanned twice per trigger or retrigger In this example post trigger analog input data is acquired on each clock pulse of the A D sample clock until the channel gain list has been scanned twice then the board waits for the retrigger event When the retrigger event occurs the board scans the channel gain list twice more acquiring data on each pulse of the A D sample clock The process repeats continuously with every specified retrigger event Figure 2 3 Continuous post trigger mode with triggered scan Chan 0 Chan2 Chan0 Chan2 Chan 0 Ghan 2 Chan0 Chan 2 Chan 1 Chan 1 Chani Chan A D Sample Clock Board waits for Post trigger event occurs retrigger event Retrigger event occurs post trigger data acquired for post trigger data acquired for two scans of the CGL two scans of the CGL Pre Trigger acquisition Use pre trigger acquisition mode continuous pre trigger mode when you want to acquire data before a specific external event occurs Using software specify e The dataflow as continuous pre trigger e The pre trigger source as the software trigger e The post trigger source as the external digital TTL trigger e The retrigger mode as the internal retrigger if you are using triggered scan mode Refer to page 2 7 for more information o
103. ial wiring errors involved in disconnecting and later reconnecting your external circuits Table C 1 Wiring for analog input hardware test using an STA 300 screw terminal accessory connected to the Analog I O connections and an between this analog analog input ground Connect this test voltage terminal terminal OV via a short between the analog input terminal and ground TB1 TB18 Analog In 0 Analog pin 68 Ground Pin 25 lt 5V from one of the following TB3 TB3 e A battery Analog In 1 Analog e An isolated power supply pin 34 Ground e A voltage divider e g 10kW or 20kW between the pin 25 5V board power output terminal TB1 pin 41 and analog ground terminal TB18 pin 25 For example composed of two 5KQ or 10KQ resistors Observe the CAUTION below CAUTION If you usethe 5V board power to energize a voltage divider ensure that the 5V board power terminal cannot accidentally short to ground A short to ground can damage one or more of the following the screw terminal accessory the board the computer Procedure for the analog input hardware test Perform the analog input test as follows 1 Turn off the host computer H Oy ON e 9 Wire a screw terminal accessory as described under Equipment for the analog input hard ware test Connect the screw terminal accessory as wired in step 2 to the KPCI 3101 4 Turn on the host computer and boot Windo
104. ignal i 1ms period Jg period p gt Pulse 99 99 duty cycle 99 99 duty cycle 99 99 duty cycle Output Signal 2 32 Principles of Operation KPCI 3101 KPCI 3104 Series U ser s M anual Figure 2 22 Example of repetitive one shot mode using a 50 duty cycle Repetitive One Shot Operation Starts External Gate Signal 1ms period 1ms period a p al gt O 50 duty 50 duty Pulse cycle cycle Output Signal Installation and Configuration 3 2 Installation and Configuration KPCI 3101 KPCI 3104 Series U ser s M anual Unpacking Open the shipping box and remove the wrapped KPCI 3101 4 Series board Verify that the fol lowing items are present CAUTION Keep the board in its protective antistatic bag until you are ready to install it this minimizes the likelihood of electrostatic damage e KPCI 3101 4 Series data acquisition board e KPCI 3101 4 Series DriverLINX Software and Documentation CD ROM If an item is missing or damaged call Keithley at 1 888 KEITHLEY Monday Friday 8 00 a m 5 00 p m Eastern Time An application engineer will guide you through the appropriate steps for replacing missing or damaged items Installing the software NOTE Install the DriverLINX software before installing the KPCI 3101 4 Series board Otherwise the device drivers will be more difficult to install Software options Users of KPCI 3101 4 Series boards
105. ine 4 29 8 Digital Ground 54 14 Digital I O Port A Line 5 30 7 User Clock Input 1 55 47 Digital I O Port A Line 6 31 6 User Counter Output 1 56 13 Digital I O Port A Line 7 32 5 External Gate 1 57 46 Digital I O Port B Line 0 33 8 Digital Ground 58 12 Digital I O Port B Line 1 34 36 User Clock Input 2 59 45 Digital I O Port B Line 2 35 37 User Counter Output 2 60 11 Digital I O Port B Line 3 36 38 External Gate 2 61 44 Digital I O Port B Line 4 37 42 Digital Ground 62 10 Digital I O Port B Line 5 38 2 User Clock Input 3 63 43 Digital I O Port B Line 6 39 3 User Counter Output 3 64 9 Digital I O Port B Line 7 40 4 External Gate 3 65 54 Digital I O Port C Line 0 41 1 5V Output 1A 66 20 Digital I O Port C Line 1 3 14 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual Table 3 3 Counter Timer and digital UO screw terminal assignments on the STA 300 cont TB J 1 Pin Description TB J 1 Pin Description 42 35 Power Ground 67 53 Digital I O Port C Line 2 43 55 Digital Ground 68 19 Digital I O Port C Line 3 44 45 46 56 External A D Trigger 69 52 Digital I O Port C Line 4 47 21 Digital Ground 70 18 Digital I O Port C Line 5 48 22 External A D Sample Clock 71 51 Digital I O Port C Line 6 Input 49 50 Digital I O Port A Line 0 72 17 Digital Ground NOTE If you are connecting a high speed clock to the STA 300 it is Pow
106. int description 3 3 application programming interface DriverLINX 3 3 application wiring 3 14 analog outputs 3 19 current loop analog inputs 3 18 i 1 differential analog inputs 3 17 digital inputs and output event counting application externally cascaded counter timer frequency measurement applications 3 23 pseudo differential analog inputs 3 16 pulse output EE single ended analog input attaching the screw terminal panelf 3 8 banks digital I O 2 17 base clock frequenc binary data encoding A 10 bipolar signals 2 4 block deel Board systematic problem isolation C 13 board specification A 7 A 8 buffers A 9 inprocess flus multiple wrap model A 9 single wrap mod bus mastering PC C C function libraries for programming in 1 3 C T clock source cascaded C T doch 2 20 external C T clock 2 20 internal C T cloc C T subsystem 2 19 specifications _A 6 CAB 305 cabl 1 6 3 8 cable CAB 305 3 8 cables CAB 305 1 6 calibratio analog input e analog output calibratio DriverLINX calibration utility starting 5 3 equipment needed 5 2 potentiometers absence off 5 2 cascading counter timers 2 20 cascading counters externally 3 22 B 24 CD ROM drive required computer _1 5 channel mapping in DriverLINX Analog I O Panel 4 3 channel type differential channels A 10 single ended channel gain lis 2 4
107. ion software is not performing general purpose digital I O functions properly Stop here and return to step 5 of Problem isolation Scheme C application software procedure e If the observed channel 2 input bit pattern is the same OFF ON pattern continue with step 10 Using your application software configure bits 0 to 7 channel 1 for an alternating ON OFF bit pattern Using your application software observe the channel 2 input bits If the observed channel 2 input bit pattern is not the same ON OFF pattern your application software is not performing general purpose digital I O functions properly Stop here and return to step 5 of Problem isolation Scheme C application software procedure e Ifthe observed channel 2 input bit pattern is the same ON OFF pattern continue with step 13 Using your application software repeat the procedure for channels and 3 with OFF ON and ON OFF bit patterns If the observed channel 3 input bit pattern is not the same ON OFF pattern your application software is not performing general purpose digital I O functions properly Stop here and return to step 5 of Problem isolation Scheme C application software procedure e Ifthe observed channel 3 input bit pattern is the same pattern your application software is performing general purpose digital I O functions properly Stop here and return to step 5 of Problem isolation Scheme C application software procedure Index
108. ionality of the product If you are unsure about the applicability of a replacement component call a Keithley Instruments office for information To clean an instrument use a damp cloth or mild water based cleaner Clean the exterior of the instrument only Do not apply cleaner directly to the instrument or allow liquids to enter or spill on the instrument Products that consist of a circuit board with no case or chassis e g data acquisition board for installation into a computer should never require cleaning if handled according to in structions If the board becomes contaminated and operation is af fected the board should be returned to the factory for proper cleaning servicing Rev 2 99 Table of Contents Overview Gett ssh es ta E A A geen eegene giereg ege 1 2 Reg Ke 1 3 Viewing the KPCI 3 101 4 series documentation online eee eee ceeeecsceeseceecaeceeceaeeseceseeeceeseeeseeeeeeteneeags 1 4 System E UC 1 5 I OLEW ANC N Mes ches Moshe sires bie stiy bce uae EAE E A EEA E AE EEE TE T 1 5 EE 1 6 Principles of O peration Analog input features 2 2 Input resolution TTT 2 3 Analog MPU CANNES sipain eeo aE E EA E E R 2 3 Input ran es and Pais se ciessiss dev tisvaciecessaceaetisae ei i e a em Sae dosh Ave tienes 2 4 A D sample clock SOULCES ANERER Analog input CONVETSION Modes iion ni e Ea a aE EE Cones sh sea ceacd Ea aE RE 2 10 Data EEN IEN EE 2 14 Error condition Sennen EE Edel I GAVE A I ELS Analog output E
109. ital TTL trigger for the retrigger When the retrigger occurs the board scans the channel gain list the specified number of times then waits for another external retrigger to occur The process repeats continuously until either the allocated buffers are filled if buffer wrap mode is none or until you stop the operation if buffer wrap mode is single or multiple refer to page 2 14 for more information on buffers The conversion rate of each channel is determined by the frequency of the A D sample clock refer to page 2 6 for more information on the A D sample clock The conversion rate of each scan is determined by the period between external retriggers therefore it cannot be accurately controlled The board ignores external triggers that occur while it is acquiring data Only exter nal retrigger events that occur when the board is waiting for a retrigger are detected and acted on To select externally retriggered scan mode use software to specify the following parameters e The dataflow as continuous post trigger e The triggered scan mode usage as enabled e The retrigger mode as an external retrigger e The number of times to scan per trigger or retrigger also called the multiscan count e The retrigger source as the external digital TTL trigger 2 10 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Triggers A trigger is an event that occurs based on a specified set of conditions The KPCI 3101 4
110. ital input 2 18 continuously paced scan moded 2 7 event counting 2 23 frequency measurement 2 24 internally retriggered scan modd 2 8 one shot viele rate generatio repetitive one shot pulse outpu 2 30 single value analog input 2 7 single value analog een oscilloscope in DriverLINX Analog I O Panel 4 2 output pulse high to low_A 11 low to high _A 11 output ranges 2 16 outputs analog calibration 5 3 outputting pulses continuously one shot 2 28 repetitive one shot 2 30 1 6 PCI bus master 2 14 physical specifications A 7 A 8 pin assignments DT300 Series J1 connector B 2 STA 300 screw terminal panel J1 connecto STA 300 screw terminal panel J2 connecto port 2 17 post trigger acquisition mode 2 10 A 9 power 3 17 requirements for E screw terminal assignments 3 13 power specificationy A 7 A 8 precautions installation DriverLINX before board pre trigger acquisition mode 2 11 A 9 problem isolation 6 2 program application programmable resolutio programming languages DriverLINX driver for compatibility 3 3 pulse output duty cycle one shot 2 28 rate generation 2 26 repetitive one shot signals 2 22 typed 2 22 pulse train output 2 26 pulse widt random channel gain lis A 10 ranges resistors R1 to esch resistors R9 to R16 3 11 resolutio analog input analog output 2 16 number of A 10
111. k input signal In repetitive one shot mode the internal C T clock source is more useful than an external C T clock source refer to page 2 20 for more information on the internal C T clock source Using DriverLINX specify the counter timer mode as repetitive one shot the clock source as internal the polarity of the output pulses high to low transitions or low to high transitions the duty cycle of the output pulses and the gate type to trigger the operation Refer to page 2 22 for more information on pulse output types refer to page 2 21 for more information on gate types NOTE In the case of a repetitive one shot operation use a duty cycle as close to 100 as possible to output each pulse immediately after the trigger occurs Using a duty cycle closer to 0 acts as a pulse output delay Ensure that the signals are wired appropriately Refer to Figure 2 18 on page 2 29 for a wiring example NOTE Triggers that occur while the pulse is being output are not detected by the board Figure 2 21 shows an example of a repetitive one shot operation using an external gate rising edge a clock output frequency of 1kHz pulse period of 1 ms a low to high pulse type and a duty cycle of 99 99 Figure 2 22 shows the same example using a duty cycle of 50 Figure 2 21 Example of repetitive one shot mode using a 99 99 duty cycle Repetitive One Shot Operation Starts External Gate S
112. l setting at DVM or DMM Analog output 0 DACO Output 0 0V 0 0V pin 58 TB19 TB18 Analog output 1 DAC1 Output pin 25 0 0V 0 0V pin 24 TB23 11 Using your mouse slide the CHO and CH1 level control buttons until the tiny displays at the bottoms of the level controls read 5 0 12 Measure and compare the analog output voltages as indicated in Table C 4 a Measure the voltages at analog outputs 0 and 1 with your DVM DMM b Compare the voltages you measured in step 12a with the voltages you set via the analog output level control Table C 4 Test connections and correct readings for mid range analog output using an STA 300 screw terminal accessory connected to the upper Analog I O connector connect the DVM or DMM to these terminals on an STA 300 If board works correctly the accessory following voltages should agree To test this Analog output Analog ground Leed control Voltage reading analog output screw terminal screw terminal setting at DVM or DMM Analog output 0 DACO Output 5 0V 5 0V pin 58 TB19 TB18 Analog output 1 DAC1 Output pin 25 5 0V 5 0V pin 24 TB23 13 Based on the measured voltages in steps 10 and 12 take action as follows e If the voltages measured with the DVM DMM do not agree with the level control set tings then there is an apparent problem with the analog output part of your board Stop here and return to the problem isolation
113. ley Instruments Inc All rights reserved Cleveland Ohio U S A First Printing O ctober 1999 Document Number 98150 Rev A Manual Print History The print history shown below lists the printing dates of all Revisions and Addenda created for this manual The Revision Level letter increases alphabetically as the manual undergoes subsequent updates Addenda which are released between Revi sions contain important change information that the user should incorporate immediately into the manual Addenda are num bered sequentially When a new Revision is created all Addenda associated with the previous Revision of the manual are incorporated into the new Revision of the manual Each new Revision includes a revised copy of this print history page Revision A Document Number 98150 ccecessssesesseseeceeeeseeseeecseeseeseseeseeaeeceesaeeeeseeaeeaeeeeeeseeeeerens October 1999 All Keithley product names are trademarks or registered trademarks of Keithley Instruments Inc Other brand and product names are trademarks or registered trademarks of their respective holders Safety Precautions The following safety precautions should be observed before using this product and any associated instrumentation Although some in struments and accessories would normally be used with non haz ardous voltages there are situations where hazardous conditions may be present This product is intended for use by qualified personnel who recog nize sho
114. listed without the large exclamation point over it However this is not by itself a sufficient indication in at least one situation There fore if you find that all of your KPCI 3101 4 boards are listed in the Device Man ager without exclamation points do as follows Leave the Device Manager open for now Continue with substeps 4g through 4j in which you open and check the Driver LINX Configuration Panel e H the list of devices in the Device Manager includes an Other Devices item also click the sign to the left of this item If a KPCI 3101 4 board is listed under Other Devices then keep the Device Manager open and go directly to step 5 Skip substeps 4g through 4j e If one or more of your KPCI 3101 4 boards is not listed anywhere in the Device Manager then keep the Device Manager open and go directly to step 5 Skip substeps 4g through 4j g Inthe Start menu click Programs h Find the DriverLINX folder and under it click DriverLINX Configuration Panel The DriverLINX Configuration Panel appears Inspect the DriverLINX Configuration Panel e If you see the following on the screen for a KPCI 3101 4 board then the board is recognized as a device under DriverLINX but is not properly configured Keithley KPCI 3101 4 Series is listed under DriverLINX The amplifier icon next to Keithley KPCI 3101 4 Series is colored yellow The specific board part number s of the unconfigured Keithley KPCI 3101 4 bo
115. lities of the KPCI 3 101 4 Series boards In a scan you can specify a channel gain list clock source trigger source trigger acquisition mode scan mode buffer and buffer wrap mode using software Two scan modes are sup ported continuously paced scan mode and triggered scan mode These modes are described in the following subsections Using DriverLINX software you can stop a scan when the hardware fills the host buffer you specified or when your application issues a stop command Continuously Paced scan mode Use continuously paced scan mode if you want to accurately control the period between conver sions of individual channels in a scan When it detects an initial trigger the board cycles through the channel gain list acquiring and converting the value for each entry in the channel list this process is defined as the scan The board then wraps to the start of the channel gain list and repeats the process continuously until either the allocated buffers are filled or until you stop the operation Refer to page 2 14 for more information on buffers The conversion rate is determined by the frequency of the A D sample clock refer to page 2 6 for more information on the A D sample clock The sample rate which is the rate at which a sin gle entry in the channel gain list is sampled is determined by the frequency of the A D sample clock divided by the number of entries in the channel gain list To select continuously paced scan mode u
116. lock input is the number of counts divided by the duration of the Windows timer If you need more accuracy than the Windows timer provides you can connect a pulse of a known duration such as a one shot output of another user counter to the external gate input as shown in Figure 3 17 In this configuration the frequency of the clock input is the number of counts divided by the period of the external gate input Figure 3 17 Connecting frequency measurement signals shown for clock input 0 and external gate 0 STA 300 Panel Digital Ground TB25 TB26 S D TB28 gnal Source Gate 0 Q TB29 7 User Clock Input 0 D User TB31 Jl Counter C O Output 1 Connecting pulse output signals Figure 3 18 shows one example of connecting pulse output signals to the STA 300 screw termi nal panel using user counter 0 Figure 3 18 Connecting pulse output signals shown for counter output 0 and gate 0 STA 300 Panel Digital Ground _ eh TB25 RN 4 TB27 TB28 Heater Controller Se 1829 User Counter Output 0 0 JU O 3 O External Gate 0 Gating Switch O No Digital Ground 3 24 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual Figure 3 19 shows an example of how to externally cascade two counters to perform a rate gen eration operation usi
117. log output software test However by process of elimination you failed the digital I O soft ware test the last time you tried Go to step 5 and repeat the digital I O software test Your board has analog outputs You have done the analog output software test at least once Your software passed the analog output software test the last time you tried e If your board does not have analog outputs then by process of elimination you failed the digital I O software test the last time you tried Go to step 5 and repeat the digital I O software test 13 You arrived at this point from step 8 because presumably you have a commercial or other wise unmodifiable applications program that is assumed to be proven Contact the maker of your software to determine whether you have a version designed to work with the KPCI 311 4 version of DriverLINX For example not all versions of TestPoint will work with KPCI 3101 4 DriverLINX Also check whether the program is installed correctly 14 Select your next step in Scheme C based on the criteria given in the following alternatives e Ifyou are certain at this point that your application program is the correct version AND is properly installed then the cause of your problem may be outside the scope of these diagnostics Read the instructions in Section 6 Technical support and then contact Keithley for help in isolating the cause of your problem Also contact Keithley if you have been una
118. lse is determined by the clock input signal and external clock divider If you are using one counter not cascaded you can output pulses using a maximum frequency of 10MHz In rate generation mode either the internal or external C T clock input source is appropriate depending on your application refer to page 2 19 for more information on the C T clock source Using DriverLINX software specify the counter timer mode as rate generation rate the C T clock source as either internal or external the polarity of the output pulses high to low transi tions or low to high transitions the duty cycle of the output pulses and the gate type that enables the operation Refer to page 2 22 for more information on the pulse output types refer to page 2 21 for more information on gate types KPCI 3101 KPCI 3104 Series U ser s M anual Principles of O peration 2 27 Ensure that the signals are wired appropriately Figure 2 15 shows one example of connecting a pulse output operation to the STA 300 screw terminal panel using user counter 0 In this exam ple a software gate type is used Figure 2 15 Connecting rate generation signals shown for counter 0 a software gate is used Digital Ground TB25 QTB26 Ch TB27 P O Signal Source _ 4 TB29 E User Counter Input 0 O LI O O User Counter Output 0 Heater Controller S STA 300 Panel
119. lugs for future use Configuring Jumper W 1 Common Ground Sense When shipped from the factory jumper W1 connects the low side of the input amplifier Amp Low on the KPCI 3101 4 Series board to analog ground When using pseudo differential analog inputs remove jumper W1 and connect Amp Low to a remote common mode voltage to reject offset voltages common to all 16 input channels Refer to Figure 3 4 for an example of removing jumper W1 See page 3 15 Figure 3 4 Removal of jumper W1 for remote ground sensing STA 300 Panel Jumper W1 Signal Source Installed a Amp Low Analog In 0 Q TB1 Wi Analog In 8 oO TB2 e Analog In 1 ep TB3 Vsource 8 D O D A O Vsource 1 O d L Analog Ground Signal Source 8 SE Vsource 0 q TB17 Analog In 0 O TB1 4 TB18 Analog In 8 D E Analog In 1 Ee O sam Vsource 8 g D TB3 Panel D D D O O O D O 0 Remove Jumper W1 to use Amp Low as a remote ground sense L Make this connection as close to Vy sources as possible to reduce ground loop errors Vom is the common mode voltage for all 16 analog inputs Analog Ground KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 11 Resistors Locations are provided on the STA 300 screw terminal panel for installing bias retur
120. m before calling Keithley for technical support Using the Driver IN X event viewer The DriverLINX Event Viewer displays the Windows system event log Applications and hard ware drivers make entries in the system event log to assist in predicting and troubleshooting hardware and software problems DriverLINX uses the event log to report problems during driver loading or unexpected system errors The event log can assist in troubleshooting resource conflicts and DriverLINX configura tion errors If you are having trouble configuring or initializing a Logical Device check the event log for information from the DriverLINX driver Using the DriverLINX Event Viewer you can view save and e mail DriverLINX event log entries under Windows 95 98 or Windows NT DriverLINX event log entries can help you or technical support troubleshoot data acquisition hardware and software problems Device initialization error messages During device initialization DriverLINX performs a thorough test of all possible subsystems on the KPCI 3101 4 Series board as well as the computer interface If DriverLINX detects any problems or unexpected responses it reports an error message to help isolate the problem The device initialization error messages fall into three basic categories e Device not found Board address does not match hardware setting or conflicts with another board Verify the board s address settings Also don t confuse hexadecimal with
121. mage the bus connector If you encounter resistance when inserting the board remove the board and try again 6 Secure the board in place at the rear panel of the system unit using the screw removed from the slot cover KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 7 Configuring the board to work with DriverLIN X After physically installing the board turn on and reboot the computer The DriverLINX Plug and Play Wizard screen appears Run the Wizard immediately by following the progressive instructions on the screen If you do not run the Wizard immediately it will not appear the next time you reboot You must then restart the Wizard from a batch file as follows 1 Open the Windows Explorer 2 Double click on X DrvLINX4 Help kcpi3100 bat where X the letter of the drive on which you installed DriverLINX 3 The Wizard appears NOTE You can also start this batch file directly from the CD ROM by double clicking on Y DrvLINX4 Help kpci3100 bat where Y the drive letter of your CD ROM drive Checking the combined board and DriverLIN X installations Before making any connections to the board check whether DriverLINX and your board are installed correctly and working together properly Refer to Section 4 Testing the Board and the DriverLINX manuals Try starting the DriverLINX Analog I O Panel Proceed as follows 1 In the Start menu click Programs 2 Find the DriverLINX Te
122. mark over it i Open and check the DriverLINX Configuration panel as you did in step 4 If you success fully configured your board s you should now see the following listed below Keithley KPCI 3101 4 Series Refer back to step 4 e Instead of a specific board part number s there should now be a device number s for example Device0 e The lamp icon next to the device number s should be colored green 8 Based on the results of step 7 do one of the following e If the board was successfully configured return to step and retry starting the Analog TO Panel e If the board was not successfully configured continue with step 9 and begin uninstalling then reinstalling DriverLINX and the board 9 Remove all KPCI 3101 4 boards physically NOTE You should remove all KPCI 3 101 4 boards before reinstalling the KPCI 3101 4 version of DriverLINX because the installation order is DriverLINX first board second If a KPCI 3 101 4 board is present Physically or in the computer list of devices driver installation difficul ties may occur Proceed as follows a Turn off the computer b Remove all KPCI 3101 4 boards from their computer expansion slots CAUTION Wear a grounded wrist strap to avoid electrostatic damage to the board Do not touch board components or conductors when han dling the board 10 Remove all KPCI 3101 4 boards from the list of devices in your system If your operating system is Windows 95 98 remove th
123. mum 2 4V minimum 2 4V minimum 10H 15mA 10H 15mA 10H 4mA Output driver low voltage 0 5V maximum 0 5V maximum 0 8V maximum IOL 12mA IOL 12mA IOL 4mA A 6 Specifications KPCI 3101 KPCI 3104 Series U ser s Manual Table A 4 lists the specifications for the C T subsystems Table A 4 C T subsystem specifications Feature Number of counter timer channels Specifications A Clock Inputs Input type Input load High level input voltage Low level input voltage Hysteresis High level input current Low level input current Minimum pulse width Maximum frequency Termination Schmitt trigger rising edge sensitive 1 HCT14 TTL 2 0V minimum 0 8V maximum 0 4V minimum 1 5V maximum 1 0uA 1 0uA 100ns high 100ns low 5 0MHz 22kQ resistor pullup to 5V Gate Inputs Input type Input load High level input voltage Low level input voltage Hysteresis High level input current Low level input current Minimum pulse width Termination Schmitt trigger level sensitive 1 HCT14 TTL 2 0V minimum 0 8V maximum 0 4V minimum 1 5V maximum 1 0uA 1 0uA 100ns high 100ns low 22KQ resistor pullup to 5V Counter Outputs Output driver Output driver high voltage Output driver low voltage Termination ALS244 TTL 2 0V minimum OH 15mA 2 4V minimum 198 3mA 0 5V maximum OT 24mA DAN maximum OT 12mA 22Q series resistor
124. n 0 Return O O O OD O O O O Signal Source Ground Va Analog Ground Resistor R1 should be installed for bias return in case the external ground is floating Connecting current loop inputs Figure 3 9 shows how to connect a current loop input channel 0 in this case to the STA 300 screw terminal panel Figure 3 9 Connecting current inputs shown for channel 0 v rice STA 300 Panel O 4 to 20mA Analog Input 0 i D bi O b _ D T18 4 D NI Analog Input 0 Return R1 00990900900 0909000 Analog Ground Use current shunt resistor R9 to convert current to voltage 2500 for 4 to 20mA 1 to 5V The common side of the external loop supply must either connect to analog ground or if needed to a bias return resistor R1 in this case KPCI 3101 KPCI 3104 Series User s M anual Connecting analog output signals Installation and Configuration 3 19 Figure 3 10 shows how to connect an analog output voltage signal channel 0 in this case to the STA 300 screw terminal panel using an external 10V reference Figure 3 10 Connecting analog output voltages using an external 10V reference shown for channel 0 Load Analog Output 0 O O Analog Output 0 Return TB19 D TB20 Analog Output 0 Reference TB21 10V 10V OD OD OD STA 300 Panel If you do not connect the Analog
125. n and cur rent shunt resistors The following subsections describe these resistors and their use Configuring resistors R1 to R8 Bias return Resistor locations R1 to R8 connect the low side of analog input channels to analog ground These resistor locations are typically used when connecting differential inputs to analog input channels 0 to 7 where R1 corresponds to analog input channel 0 and R8 corresponds to analog input channel 7 The high side of the corresponding analog input channel returns the source input impedance through the bias return resistors to the low side of the channels then to analog ground Typical resistor values are 1kQ to 100kQ depending on the application Refer to Figure 3 7 on page 3 17 for an example of using bias return resistors with differential inputs Configuring resistors R9 to R16 Current shunt Resistor locations R9 to R16 are typically used to convert current to voltage on channels 0 to 7 where R9 corresponds to analog input channel 0 and R16 corresponds to analog input channel 7 The resistor location connects the high side of the channel to the low side of the corresponding channel thereby acting as a shunt If for example you add a 250Q resistor to location R9 then connect a 4 to 20mA current loop input to channel 0 the input range is converted to to 5V Note that depending on your application you may need to use resistors R1 to R8 with resistors R9 to R16 for proper operation Refer to Figur
126. n the supported conversion modes refer to page 2 10 for information on the supported trigger sources NOTE When using pre trigger acquisition you cannot use externally retriggered scan mode refer to page 2 8 for more information on triggered scan mode 2 12 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Pre trigger acquisition starts when you start the operation and stops when the board detects the selected post trigger source indicating that the first post trigger sample was acquired this sam ple is ignored If you are using internally retriggered scan mode and the post trigger event has not occurred the board continues to acquire pre trigger data using the internal retrigger clock to clock the opera tion When the post trigger event occurs acquisition stops Refer to page 2 8 for more informa tion on internally retriggered scan mode Figure 2 4 illustrates continuous pre trigger mode using a channel gain list of three entries channel 0 channel 1 and channel 2 In this example pre trigger analog input data is acquired on each clock pulse of the A D sample clock When it reaches the end of the channel gain list the board wraps to the beginning of the channel gain list and repeats this process Data is acquired continuously until the post trigger event occurs When the post trigger event occurs acquisition stops Figure 2 4 Continuous pre trigger mode Chan 0 Chan2 ChanO Chan2 Chan0
127. nal Panel Series Board e KPCI 3101 KPCI 3104 Series User s M anual Installation and Configuration Figure 3 3 shows the layout of the STA 300 screw terminal panel NOTE 32 40 48 Clk amp Trig Pwr Gnd 5V 6 plastic enclosure Figure 3 3 The STA 300 panel is designed to fit inside a standard 4 inch by 8 inch Layout of the STA 300 screw terminal panel Counter Timers 0909999009 25 Counter Timers 09990090096 33 099099090999 slooccecoo Digital I O 0090969099 57 Digital UO 72 666666 66 65 A O J1 68 Pin Connector O Spare R8 to R1 Jumpers R16 to R8 8 00099099 1 24 Analog Outputs Gnd Amp Low Analog Inputs 609006696 9 Wi 0909090090 17 J2 26 Pin Connector 5 Ip st S EE EE 3 9 Installation and Configuration KPCI 3101 KPCI 3104 Series U ser s M anual Jumper W1 The STA 300 screw terminal panel contains jumper W1 and jumpers W4 to W7 Jumper W1 provides a common ground sense jumpers W4 to W7 are not used The following subsections describe these jumpers NOTE The screw terminal panels are shipped with enough jumper plugs to select every possible configuration Spare jumper plugs are stored on the panel itself on the posts marked spare Save these jumper p
128. nel addressing of digital I O channels using Driver INN 2 18 3 Installation and Configuration Table 3 1 Analog input screw terminal assignments on the STA 200 Table 3 2 Analog output and power screw terminal assignments on the SIA 200 3 13 Table 3 3 Counter Timer and digital I O screw terminal assignments on the SIA 200 3 13 6 Troubleshooting Table 6 1 Troubleshooting problems ssc se cis cssceseeeccesesscsseresseaedossvsessutesccsvgasasescesiecteqvasssagcesesteuncanedsteGoes scneaeds sierf 6 4 A Specifications Table A 1 A D SUBSYSTEM SPECHICATIONS teen ste eege NEESS A 2 Table A 2 DA SUBSYSTEM specications seriene ee ee eE REE EERE EEE rae e EREE r GEKEER AEE AEE Eue IE E eTR Rii Table A 3 DIN DOUT subsystem Spe incaonS ee Aere dE EENEG ERR NEEN SEENEN A 5 Table A 4 C T subsystem sp cificationS sssrin on raia eenn aN EEN E aE EEE ee anes EENS Table A 5 Power physical and environmental specifications cece eeeeseceeceseceeceseeseceseeeeseeeeeeceaeeeeseaeeeeecaeeaaeras A 7 Table A 6 CONMECLOL SPECI e EE Table A 7 STA 300 SpECiACAHONS EE A 8 Table A 8 CAB 305 cable Speci Caton wississscessessheadessieossacsssneswaicesvesavabacedscasnbeusescdanssibescapesendenpsaesonddeesstevabivedsedans A 8 Table A 9 KPCI 3101 4 series supported Options c cccccieceiecesccssesstessesstevesasenetesdsessacencauseasedbsnssesbsvesnsserssesacesees A 9 Vil B Connector Pin Assignments Table B 1 Pin assignments for connector J1 on t
129. ng user counters 0 and 1 Note that you can also cascade counters internally using software if you internally cascade the counters you do not need to make the external cas cading connections In this example counter 1 gate is logic high Figure 3 19 Cascading counters shown for rate generation using counters 0 and 1 and external gate 0 STA 300 Panel User Counter Output 0 Digital Ground Signal Source User Clock Input 0 LI User Clock Input 1 External Gating aS Switch f Gate 0 l No Digital Ground Figure 3 20 shows an example of how to cascade two counters externally to perform a one shot operation using user counters 0 and 1 Note that you can also internally cascade counters using software if you internally cascade the counters you do not need to make the external cascading connections In this example counter 0 gate is logic high Figure 3 20 Cascading counters shown for one shot using counters 0 and 1 and external gate 1 STA 300 Panel Digital Ground User a D TB25 Counter TB26 Output 0 D Signal Source D TB27 giz User Clock Input 0 TB29 D TB30 User Clock TB32 Input 1 D Digital Ground One Shot Trigger Gate 1 KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 25 Attaching the STP 68 screw
130. nnels are connected to the same instrumentation amplifier and A D converter via the multiplexer e The multiplexer is unlikely to be a problem source Both the voltage and grounded input measurements are made in the single ended input mode NOTE During this test ensure that no user circuits are connected to the KPCI 3101 4 board except for analog input connections specified for the test The analog input test is a functional test not a calibration check although readings from a properly calibrated board should correspond to a known test voltage within the accuracy specifications of the board If you wish to check and adjust the accuracy refer to Section 5 Calibration KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 15 Equipment for the analog input hardware test The following equipment is needed for the analog input test A voltage source supplying a known voltage at lt 5V Refer to Table C 1 for more details Optional A Digital Voltmeter DVM or a Digital Multimeter DMM to accurately deter mine the voltage of the voltage source An STA 300 screw terminal accessory wired as shown in Table C 1 These are the same connections as made for the analog input software test If possible use a screw terminal accessory that is reserved for I O tests Avoid using a screw terminal accessory that is normally connected to your external circuits You thereby avoid the extra labor and potent
131. ny external circuits connected to the K PC1 3101 4 board before removing or replacing the board Removing or replacing a board with the power ON can damage the board the computer the external circuit or all three Handle the board at the mounting bracket using a grounded wrist strap Do not touch the circuit traces or connector contacts NOTE In the following procedure the term board always refers to a KPCI 3101 4 board The procedure never directs you to install or remove any type of board other than a KPCI 3 101 4 board The logic used in the systematic problem isolation schemes assumes that the problem has only one cause Therefore once a cause is found and corrected the reader is instructed to reassemble the system and verify proper operation Each individual scheme in this procedure except for Scheme A is designed to be used only if called for by other schemes or procedures For example Scheme B is called for by Scheme A Scheme B is also called for as a post installation check in Section 3 of this manual and in the Read This First sheet that shipped with your board If you attempt to use schemes independently you lose the benefits of systematic prob lem isolation KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 3 Problem isolation Scheme A basic system In Scheme A you start the systematic problem isolation procedure You remove your KPCI 3101 4 board s and check for app
132. o Section 3 Installation and Configuration for more informa tion about connecting these accessories 4 Turn ON the host computer Start the calibration utility as follows a Click on the Windows Start tab b In the Start menu click Programs c Find the DriverLINX folder and click the Test Panels gt KPCI 3101 4 Series Cali bration Utility entry The Select DriverLINX Device dialog box appears d In the Select DriverLINX Device dialog box select your board and click OK The KPCI 3101 4 Series Calibration Utility dialog box appears Calibrating the analog inputs In this part of the procedure offset and gain adjustments for the analog input and A D Converter ADC circuits are made Do the following 1 In the KPCI 3101 4 Series Calibration Utility dialog box click the A D Calibration tab The A D Calibration dialog box appears To calibrate the analog inputs follow the on screen instructions in the The A D Calibration dialog box When finished with the analog input calibration continue with the next section Calibrating the analog outputs Calibrating the analog outputs The KPCI 3101 4 Series boards each have two independent analog outputs provided by two digital to analog converters DACs or D A converters In this part of the procedure offset and gain adjustments for the DACs are made Do the following 1 In the KPCI 3101 4 Series Calibration Utility dialog box click the D A Calibration t
133. of the 16 digital input lines Refer to the DriverLINX Analog I O Programming Guide pro vided with DriverLINX The following subsections describe the internal and external A D sample clocks in more detail Internal A D sample clock The internal A D sample clock uses a 20 MHz time base Conversions start on the falling edge of the counter output the output pulse is active low Using software specify the clock source as internal and the clock frequency at which to pace the operation The minimum frequency supported is 1 2 Hz 1 2 Samples s the maximum fre quency supported differs depending on the board type as shown in Table 2 3 Table 2 3 Maximum frequency supported Board Type Maximum Frequency KPCI 3101 225kHz KPCI 3102 225kHz KPCI 3103 400kHz KPCI 3104 400kHz According to sampling theory Nyquist Theorem specify a frequency that is at least twice as fast as the input s highest frequency component For example to accurately sample a 20kHz sig nal specify a sampling frequency of at least 40kHz Doing so avoids an error condition called aliasing in which high frequency input components erroneously appear as lower frequencies after sampling NOTE If input channel 0 is programmed for Digital Capabilities and is the only channel programmed the maximum frequency is 3 MHz 3MSamples s Refer to the DriverLINX Analog I O Programming Guide provided with DriverLINX KPCI 3101 KPCI 3104 Series
134. omer On those other manufacturers products that Keithley purchases for resale Keithley shall have no duty of obligation to enforce any manufacturers warranties on behalf of the customer Software Keithley warrants that for a period of one 1 year from date of shipment the Keithley produced portion of the software or firmware Keithley Software will conform in all material respects with the published specifications provided such Keithley Software is used on the product for which it is intended and other wise in accordance with the instructions therefore Keithley does not warrant that operation of the Keithley Software will be uninterrupted or error free and or that the Keithley Software will be adequate for the customer s intended application and or use This warranty shall be null and void upon any modification of the Keithley Software that is made by other than Keithley and not approved in writing by Keithley If Keithley receives notification of a Keithley Software nonconformity that is covered by this warranty during the warranty period Keithley will review the conditions described in such notice Such notice must state the published specification s to which the Keithley Software fails to conform and the manner in which the Keithley Software fails to conform to such published specification s with sufficient specificity to permit Keithley to correct such nonconfor mity If Keithley determines that the Keithley Software does not conform wi
135. on KPCI 3101 KPCI 3104 Series U ser s M anual Figure 2 11 shows an example of performing an event counting operation In this example the gate type is low level Figure 2 11 Example of event counting High Level Disables Operation Gate Input Low Level Signal 0 Enables Operation External C T Clock 0 w Input Signal 3 events are counted while the operation is enabled Event Counting Event Counting Operation Starts Operation Stops Frequency measurement Use frequency measurement mode to measure the frequency of the signal from counter s associ ated clock input source over a specified duration In this mode use an external C T clock source refer to page 2 20 for more information on the external C T clock source One way to perform a frequency measurement is to use the same wiring as an event counting application that does not use an external gate signal as shown in Figure 2 12 Figure 2 12 Connecting frequency measurement signals without an external gate input shown for clock input 0 Digital Ground Q TB25 TB26 O Rp Signal Source O SS O User Clock Input 0 D STA 300 Panel KPCI 3101 KPCI 3104 Series User s M anual Principles of O peration 2 25 In this configuration use software to specify the counter timer mode as frequency measurement or event counting and the duration of the Windows timer over which to m
136. onnector Pin Assignments KPCI 3101 KPCI 3104 Series U ser s Manual Table B 1 lists the pin assignments of connector J1 on the KPCI 3101 4 Series board Ge EE for connector J1 on the KPCI 3101 4 series boards Pin Pin Number Signal Description Number Signal Description 34 Analog Input 1 68 Analog Input 0 33 Analog Input 9 1 Return 67 Analog Input 8 0 Return 32 Analog Input 3 66 Analog Input 2 31 Analog Input 11 3 Return 65 Analog Input 10 2 Return 30 Analog Input 5 64 Analog Input 4 29 Analog Input 13 5 Return 63 Analog Input 12 4 Return 28 Analog Input 7 62 Analog Input 6 27 Analog Input 15 7 Return 61 Analog Input 14 6 Return 26 Amp Low 60 DACO Reference 25 Analog Ground 59 DAC1 Reference 24 Analog Output 1 58 Analog Output 0 23 Analog Output Return 57 Analog Output 0 Return 22 External A D Sample Clock In 56 External A D Trigger 21 Digital Ground 55 Digital Ground 20 Digital I O Port C Line 1 54 Digital I O Port C Line 0 19 Digital I O Port C Line 3 53 Digital I O Port C Line 2 18 Digital I O Port C Line 5 52 Digital I O Port C Line 4 17 Digital Ground 51 Digital I O Port C Line 6 16 Digital I O Port A Line 1 50 Digital I O Port A Line 0 15 Digital I O Port A Line 3 49 Digital I O Port A Line 2 14 Digital I O Port A Line 5 48 Digital I O Port A Line 4 13 Digital I O Port A Line 7 47 Digital I O Port A Line 6 12 Digital I O Po
137. onsult the manual provided by National Instruments for LabVIEW installation instructions KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 5 Installing the board To install the board perform the following steps en rg Check the system requirements Section 1 Overview Set up the computer page 3 5 Select an expansion slot page 3 5 Insert the board into any available 32 bit or 64 bit PCI expansion slot in your computer page 3 6 NOTE The KPCI 3101 4 Series is factory calibrated and requires no further adjustment prior to installation If you decide later to recalibrate the board refer to Section 5 Calibration for instructions Setting up the computer CAUTION To prevent electrostatic damage that can occur when handling elec tronic equipment use a ground strap or similar device when per forming this installation procedure 1 Turn off the computer 2 Turn off all peripherals printer modem monitor and so on connected to the computer 3 Unplug the computer and all peripherals 4 Remove the cover from you computer Refer to your computer s user manual for instructions Selecting an expansion dot 1 Select a 32 bit or 64 bit PCI expansion slot PCI slots are shorter than ISA or EISA slots and are usually white or ivory Commonly three PCI slots one of which may be a shared ISA PCI slot are available If an ISA board exists in the shared slot you cannot use
138. or the analog input soft ware test Connect the screw terminal accessory as wired in step 2 to the KPCI 3101 4 board J1 Turn on the host computer and boot Windows 95 98 or NT Start DriverLINX and your application software Set your application software to measure and display report voltages from analog input channels 00 and 01 at a rate suitable for monitoring DC signals Configure your system as follows e The 5V input range e Single ended input Based on the displayed reported voltages in step 6 act as follows e If the measured channel 00 voltage is not OV and or if the measured channel 01 voltage does not agree with the applied voltage then there could be a problem with the way your application software program interfaces with DriverLINX or the way it deals with analog input data from the board Stop here and return to the systematic problem isolation Scheme C step 1 where you were directed to do analog input software tests e If the measured channel 00 voltage is OV and the measured channel 01 voltage agrees with the applied voltage then your software is treating DC analog input data correctly Stop here and return to the systematic problem isolation Scheme C step 1 where you were directed to do analog input software tests Analog output software test This test applies only to a board having analog outputs This basic analog input test checks whether your application software correctly sets direct current DC analo
139. places then the installation is faulty Skip to step 9 and begin uninstalling then reinstalling DriverLINX and the board e If your board is not listed at all in the Device Manager there are apparently issues other than the combined DriverLINX board installation Continue with step 6 6 Select the next step in Scheme B based on the criteria given in the following alternatives e If you are performing Scheme B independently as an installation check then non instal lation issues must apparently be resolved before you can successfully run your board Starting at Problem isolation Scheme A basic system proceed through the systematic problem isolation procedure e If you are performing Scheme B as part of the systematic problem isolation procedure then you should have seen your board listed in the device manager at this point in the procedure The cause of your problem may be outside the scope of these diagnostics Read the instructions in Section 6 Technical support and then contact Keithley for help in isolating the cause of your problem 7 Try to reconfigure your board using the DriverLINX configuration panel which you opened in step 4 and should still be open Proceed as follows a In the DriverLINX Configuration Panel select an unconfigured KPCI 3101 4 board by clicking on its part number An unconfigured KPCI 3101 4 board may be identified as follows e The specific board part number of the unconfigured Keithley KPCI 31
140. po lar signals Note that you specify the range for the entire analog input subsystem not the range per channel KPCI 3101 KPCI 3104 Series User s M anual Principles of O peration 2 5 KPCI 3101 4 Series boards provide gains of 1 2 4 and 8 which are programmable per chan nel Table 2 2 lists the effective ranges supported by the KPCI 3101 4 Series board using these gains Table 2 2 Gains and effective ranges Unipolar Analog Bipolar Analog Gain Input Range Input Range 1 0 to 10V 10V 2 O0to5V 5V 4 0to2 5V 2 5V 8 0 to 1 25V 1 25V For each channel choose the gain that has the smallest effective range that includes the signal you want to measure For example if the range of your analog input signal is 1 5 V specify a range of 10 V to 10V for the board and use a gain of 4 for the channel the effective input range for this channel is then 2 5 V which provides the best sampling accuracy for that channel The way you specify gain depends on how you specified the channels as described in the fol lowing subsections Specifying the gain for a single channel The simplest way to specify the gain for a single channel is to specify the gain for a single value analog input operation using software refer to page 2 7 for more information on single value operations You can also specify the gain for a single channel using an analog input gain list described in the next section Specifying
141. put channels see Connecting pseudo differential voltage inputs in Section 3 e Signal conditioning through connections to 5B Series backplanes e Input gains of 1 2 4 and 8 e Continuously paced and triggered scan capability e A 1024 location channel gain list that supports sampling analog input channels at the same or different gains in sequential or random order e Up to 256 scans per trigger for a total of 262 144 samples per trigger in triggered scan mode e Internal and external clock sources for the analog input subsystem e Digital TTL triggering for the analog input subsystem e Software calibration of the analog I O circuitry e Two 8 bit digital ports programmable as inputs or outputs on a per port basis digital input lines from these lines can be included as part of the analog input channel gain list to corre late the timing of analog and digital events digital outputs can drive external solid state relays e One 7 bit digital I O port programmable as a general purpose non clocked input or output port e Four user counter timers programmable for event counting frequency measurement rate generation continuous pulse output one shot pulse output and repetitive one shot pulse output e Programmable gate types e Programmable pulse output polarities output types and duty cycles For a discussion of these features in detail refer to Section 2 KPCI 3101 KPCI 3104 Series User s M anual Overview 1 3 Driver I
142. rLINX supports those programmers who wish to create cus tom applications using Visual C C Visual Basic or Delphi DriverLINX accomplishes fore ground and background tasks to perform data acquisition The software includes memory and data buffer management event triggering extensive error checking and context sensitive on line help DriverLINX provides application developers a standardized interface to over 100 services for creating foreground and background tasks for the following e Analog input and output e Digital input and output e Time and frequency measurement e Event counting e Pulse output e Period measurement In addition to basic I O support DriverLINX also provides e Built in capabilities to handle memory and data buffer management e A selection of starting and stopping trigger events including pre triggering mid point trig gering and post triggering protocols e Extensive error checking e Context sensitive on line help system DriverLINX is essentially hardware independent because its portable APIs Application Programming Interfaces work across various operat ing systems This capability eliminates unnecessary programming when changing operating system platforms TestPoint TestPoint is a fully featured integrated application package that incorporates many commonly used math analysis report generation and graphics functions The TestPoint graphical drag and drop interface can be used to create
143. rate Rate Mode Support Yes One Shot Mode Support Yes b Repetitive One Shot Mode Support Yes E High to Low Output Pulse Support Yes i Low to High Output Pulse Support Yes e None internal Gate Type Support Yes High Level Gate Type Support Yes 4 Low Level Gate Type Support Yes gt High Edge Gate Type Support Yes Low Edge Gate Type Support Yes F Interrupt Support fe FIFO in Data Path Support E A Software Calibration Support Yes Yes U wn D A subsystems are supported by the KPCI 3102 and KPCI 3104 boards only The DIN and DOUT subsystems use the same DIO lines All 16 bits of the DIO lines from Ports A and B are assigned to A D input channel 16 While the DIN subsystem itself is incapable of continuous operation you can perform a continuous DIN operation by specifying channel 16 in the channel gain list of the A D subsystem and starting the A D subsystem 4 The CGL depth of 1024 entries in conjunction with a multiscan count of 256 provides an effective CGL depth of up to 256K entries on The value of 1 2Hz assumes the minimum number of samples is 1 Channels 0 to 15 are provided for analog input channel 16 reads all 16 bits from the DIN subsystem Ports A and B If the channel gain list contains channel 16 only the board can read the digital input channels at a rate of 3MSamples s KPCI 3101 KPCI 3102 KPCI 3103 and KPCI 3104 boards support two input ranges 10V and 0 to 10V KPCI 310
144. ration refer to page 2 14 for more infor mation on buffers The sample rate is determined by the frequency of the A D sample clock divided by the number of entries in the channel gain list refer to page 2 6 for more information on the A D sample clock The conversion rate of each scan is determined by the frequency of the internal retrigger clock The internal retrigger clock is the Triggered Scan Counter on the board the Triggered Scan Counter is a 24 bit counter with a 20 MHz clock Using DriverLINX software specify the frequency of the internal retrigger clock The minimum retrigger frequency is 1 2 Hz 1 2 Samples s Table 2 4 lists the maximum retrigger frequency supported by the KPCI 3101 4 Series boards Table 2 4 Maximum retrigger frequency Maximum Board R etrigger Frequency KPCI 3101 3102 155kHz KPCI 3103 3104 219kHz The appropriate retrigger frequency depends on a number of factors determined by the follow ing equations No of CGL entries x No of CGLs per trigger Min Retri Period E A D sample clock frequency 2ps 1 Max Retri Baasch Beete Period ax Retrigger Frequency Min Retrigger Period For example if you are using 16 channels in the channel gain list CGL scanning the channel gain list 256 times every trigger or retrigger and using an A D sample clock with a frequency of 100kHz set the maximum retrigger frequency to 24 41Hz since 1 16 x 256 Im 7H 24
145. rations_A 9 continuous digital input operation continuous post trigger operations A 9 continuous pre trigger operationg A 9 single value operations A 9 data format analog input 2 14 analog output 2 17 data transfer 2 14 Delphi DriverLINX driver foi 3 3 function libraries for programming i description of the functional subsystems AID 22 cnt dea DIN and DOUT 2 17 differential channels A 10 number off A 10 differential inputs 3 15 Digital I O general purpose digital I O hardware test _C 20 software est C 25 digital I O screw terminal assignments 3 13 wiring 3 20 digital I O features 2 17 lines specifications _A 5 digital line specifying in analog input channel Del 2 4 digital trigger 2 10 digital to analog converter calibrating 5 3 DIN MA eT specification DMA eeu DOUT subsyste specifications A 5 DriverLINX analog I O panel description 1 3 API DLLs description _1 3 description _1 3 B 3 event viewe installatio test panels See underTest panels DriverLINX Analog I O Panel 4 2 duty cycld 2 22 1 3 edge gate type lo encoding data analog input 2 14 analog output 2 17 environmental specifications A 7A 8 error handlingf 6 2 errors analog input 2 15 event counting 2 23 21 event counting mode event viewer in DriverLINX using for troubleshooting 6 2 expansion slot requirement 1 5 expansion slot selec
146. re test do one of the following e If your software appears not to be working properly with your analog inputs skip to step 8 e If your software appears to be working properly AND your board does not have analog outputs skip to step 5 e If your software appears to be working properly AND your board has analog outputs continue with step 3 3 Perform the procedure outlined in the Analog output hardware test found later in this appendix 4 Based on the results of the Analog output software test do one of the following e If your software appears not to be working properly with your analog outputs skip to step 8 e If your software appears to be working properly with your analog outputs continue with step 5 5 Perform the procedure outlined in the General purpose digital I O hardware test found later in this appendix KPCI 3101 KPCI 3104 Series U ser s M anual Systematic Problem Isolation C 11 10 11 12 Based on the results of the General purpose digital I O hardware test do one of the following e If your software appears not to be working properly with your digital I O skip to step 8 e If your software appears to be working properly with your digital I O continue with step 7 Select the next step in Scheme C based on the criteria given in the following alternatives e If you reached this point without modifying the custom software or reinstalling the com mercial software if you expe
147. rected to do analog output software tests General purpose digital UO software test This test checks whether your application software is performing general purpose digital I O functions properly Test summary The following summarizes the test procedure e Wire an STA 300 screw terminal accessory in a loop back configuration Connect the chan nel 0 general purpose digital I O terminals bit for bit to the channel 3 general purpose dig ital I O terminals Connect the channel 1 terminals bit for bit to the channel 2 terminals These are the same loop back connections as made for the general purpose digital I O hard ware test e Using your application software set the channel 0 and 1 outputs in a particular alternating OFF ON bit pattern and check channels 2 and 3 inputs for the same bit pattern Repeat using a second ON OFF bit pattern Your application software is performing general purpose digital I O satisfactorily if all bits respond appropriately Equipment for general purpose digital UO software test All I O is set and read using your application software no instruments are required However you must wire an STA 300 screw terminal accessory in the loop back configuration If possible use a screw terminal accessory that is reserved for I O tests Avoid using a screw terminal acces sory that is normally connected to your external circuits You thereby avoid the extra labor and potential wiring errors involved in disconnec
148. rienced no problems in the tests at any point then the problem you originally experienced must lie elsewhere Go to Problem isolation Scheme E user wiring and check your external connections e If you reached this point by having to modify the custom software or reinstall the com mercial software if you no longer experience problems in the tests then assume that you have solved the original problem Go to Problem isolation Scheme G verification of problem solution and verify that the problem is solved You arrived at this point because one of the I O software tests failed Select the next step in Scheme C based on the criteria given in the following alternatives e If your applications program is a proven program potentially a commercial program that you cannot modify then the software may be installed incorrectly or perhaps is incompatible with DriverLINX Skip to step 13 e If your applications program is a custom program that can be modified the source code is available then continue with step 9 Check and debug the source code as necessary At this point you have presumably found and corrected some program bugs Select the next step in Scheme C based on the criteria given in the following alternatives e If both of the following statements are true then the cause of your problem may be outside the scope of these diagnostics Read the instructions in Section 6 Technical support and then contact Keithley for h
149. rt B Line 1 46 Digital I O Port B Line 0 11 Digital I O Port B Line 3 45 Digital I O Port B Line 2 10 Digital I O Port B Line 5 44 Digital I O Port B Line 4 9 Digital I O Port B Line 7 43 Digital I O Port B Line 6 8 Digital Ground 42 Digital Ground 7 User Clock Input 1 41 User Clock Input 0 6 User Counter Output 1 40 User Counter Output 0 5 External Gate 1 39 External Gate 0 4 External Gate 3 38 External Gate 2 3 User Counter Output 3 37 User Counter Output 2 2 User Clock Input 3 36 User Clock Input 2 1 5V Output 1A 35 Power Ground KPCI 3101 KPCI 3104 Series User s M anual Connector Pin Assignments B 3 Table B 2 lists the screw terminal assignments for connector J1 on the STA 300 screw terminal panel Table B 2 Pin assignments for connector J1 on the STA 300 TB J 1 Pin Description TB J 1 Pin Description 1 68 Analog Input 0 2 67 Analog Input 8 0 Return 3 34 Analog Input 1 4 33 Analog Input 9 1 Return 5 66 Analog Input 2 65 Analog Input10 2 Return 7 32 Analog Input 3 8 31 Analog Input 11 3 Return 9 64 Analog Input 4 10 63 Analog Input 12 4 Return 11 30 Analog Input 5 12 29 Analog Input 13 5 Return 13 62 Analog Input 6 14 61 Analog Input 14 6 Return 15 28 Analog Input 7 16 27 Analog Input 15 7 Return 17 26 Amp Low 18 25 Analog Ground 19 58 DACO Output 20 57 DACO Return 21 60 DACO Reference In and 22 23 DACI
150. s At this point if you have another KPCI 3101 4 board that you know is functional you can test the slot and I O connections using the instructions in the next section If you do not have another board call Technical Support Testing the accessory slot and I O connections When you are sure that the computer is operating properly test the computer accessory slot and T O connections using another KPCI 3101 4 board that you know is functional To test the com puter accessory slot and the I O connections follow these steps 1 Remove computer power again and install a KPCI 3101 4 board that you know is func tional Do not make any I O connections Turn computer power ON and check operation with the functional board in place This test checks the computer accessory slot If you were using more than one board when the prob lem occurred use the functional board to also test the other slot If the accessory slots are functional use the functional board to check the I O connections Reconnect and check the operation of the I O connections one at a time If operation fails for an I O connection check the individual inputs one at a time for shorts and opens If operation remains normal to this point the problem is in the KPCI 3101 4 board s origi nally in the computer If you were using more than one board try each board one at a time in the computer to determine which is faulty If you cannot isolate the problem refer to th
151. s M anual Systematic Problem Isolation C 13 Problem isolation Scheme E user wiring In Scheme E after having eliminated other problem causes you physically check your external connections to see if they are the problem cause NOTE This is not a stand alone procedure Use it only when it is called for by another procedure Follow these instructions as you perform Scheme E 1 Check the I O connections between each external signal source and the screw terminal accessory one at a time for short circuits and open circuits If KPCI 3101 4 boards were installed in more than one PCI slot check the I O connections for all boards NOTE Do not connect the screw terminal accessory to the board during this scheme 2 Based on the results of step 1 do the following e If any external I O connections are found to be faulty assume that the problem was caused by the faulty connections then proceed as follows a Correct the faulty external connections b Skip to Problem isolation Scheme G verification of problem solution e If all external I O connections are found to be normal then by process of elimination the KPCI 3101 4 board s originally installed in the computer is likely the cause of the problem Continue with Problem isolation Scheme F the board Problem isolation Scheme F the board In Scheme F after having eliminated other problem causes you assume that KPCI 3101 4 hard ware malfunctions are at fault
152. safety earth ground using the wire recommended in the user documentation The Ab symbol on an instrument indicates that the user should re fer to the operating instructions located in the manual The J symbol on an instrument shows that it can source or mea sure 1000 volts or more including the combined effect of normal and common mode voltages Use standard safety precautions to avoid personal contact with these voltages The WARNING heading in a manual explains dangers that might result in personal injury or death Always read the associated infor mation very carefully before performing the indicated procedure The CAUTION heading in a manual explains hazards that could damage the instrument Such damage may invalidate the warranty Instrumentation and accessories shall not be connected to humans Before performing any maintenance disconnect the line cord and all test cables To maintain protection from electric shock and fire replacement components in mains circuits including the power transformer test leads and input jacks must be purchased from Keithley Instru ments Standard fuses with applicable national safety approvals may be used if the rating and type are the same Other components that are not safety related may be purchased from other suppliers as long as they are equivalent to the original component Note that se lected parts should be purchased only through Keithley Instruments to maintain accuracy and funct
153. sdbescaionsspsesaaevenseodadcesvessonstcasneaveshuadscaaeseasessapsoeuaesoseosbnsossupedoay Continuous about trigger mode with triggered scan eee eee eceeeeeeceeeeeeecaeeeeecaeesaecaaesaeceeeeseeeeeeeesees Counter Timer channel sic sacsssssccsiseassssssupesussespavensevscndssantebess EE EEN ENEE EECH Example of a Low to High pulse output pe Connecting event counting signals shown for clock input 0 and external gate 0 sample Of eyent COUDU Es seet Set deeg EE SEENEN Connecting frequency measurement signals without an external gate input shown for clock input 0 2 24 Connecting frequency measurement signals shown for clock input 0 and external gate 0 Example of frequency measurement isisisi trinii asetan rantein ie Eaa na E ni E iE raa oa Connecting rate generation sIgnals shown for counter 0 a software gate is used eee eee eeeeeee Example of rate generation mode with a 75 duty cwcle z Example of rate generation mode with a 25 duty cwvcle Connecting one shot signals shown for counter output 0 and gate 0 Example of one shot mode using a 99 99 duty cycle oo ee eee eeeseeeeeeseeesecaeeceecseesaecsaeaeceeeeseeeseeeeeeeeees Example of one shot mode using a 50 duty cycle 0 eeeeeseseeeeeseeeeecaeecaecaeesaecsaeeaecaeeeseeeseeeeesees Example of repetitive one shot mode using a 99 99 duty cycle oe eee cee cee ceseeseceseeeceeeeeeeeeeeeeteetead Example of repetitive one shot mode using a 50 duty cycle oo ee eee cee cee cee ceeeeee
154. se software to specify the dataflow as continuous continuous pre trigger or continuous about trigger The initial trigger source depends on the trigger acquisition mode you use Refer to page 2 10 for more information on the supported trig ger sources and trigger acquisition modes 2 8 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Triggered scan mode KPCI 3101 4 Series boards support two triggered scan modes internally retriggered and externally retriggered These modes are described in the following subsections Internally Retriggered Scan Mode Use internally retriggered scan mode if you want to accurately control both the period between conversions of individual channels in a scan and the period between each scan This mode is useful when synchronizing or controlling external equipment or when acquiring a buffer of data on each trigger or retrigger Using this mode you can acquire up to 262 144 samples per trigger 256 times per trigger x 1024 location channel gain list When it detects an initial trigger the KPCI 3101 4 Series board scans the channel gain list a specified number of times up to 256 then waits for an internal retrigger to occur When it detects an internal retrigger the board scans the channel gain list the specified number of times then waits for another internal retrigger to occur The process repeats continuously until either the allocated buffers are filled or until you stop the ope
155. sed Only connections to the I O connector pins via a screw terminal accessory are needed Each of the twelve unipolar and twelve bipolar analog input ranges is individually calibrated For each range three eight bit trim DAC values are searched for and then adjusted a gain value a coarse offset value and a fine offset value Therefore a complete analog input calibration involves 72 adjustments 2 polarities x 12 gains polarity x 3 adjustments gain Equipment The following equipment is needed to calibrate your KPCI 3101 4 Series board e A digital voltmeter DVM or digital multimeter DMM accurate to 6 12 digits such as a Keithley Model 2000 e An STA 300 screw terminal accessory to make analog connections to the board e A Keithley CAB 305 cable to connect the screw terminal accessory to the I O connector of the KPCI 3101 4 board e ADC calibrator or precisely adjustable and metered power supply having up to a 1OVDC range and accurate to Gol digits KPCI 3101 KPCI 3104 Series User s M anual Calibration 5 3 Calibration procedure This section describes the steps required to calibrate the analog inputs and outputs of your KPCI 3 101 4 Series board Preparing for the calibrations Prepare your system for calibration as follows 1 Warm up the calibrator and the DVM DMM Turn OFF the host computer Connect the STA 300 screw terminal accessory to your KPCI 3101 4 Series board using the CAB 305 cable Refer t
156. ser s M anual Principles of O peration 2 23 Event counting Use event counting mode to count events from the counter s associated clock input source If you are using one counter the board can count a maximum of 65 536 events before the counter rolls over to 0 and starts counting again If you are using a cascaded 32 bit counter the board can count a maximum of 4 294 967 296 events before the counter rolls over to 0 and starts counting again In event counting mode use an external C T clock source refer to page 2 20 for more informa tion on the external C T clock source Using DriverLINX software specify the counter timer mode as event counting count the clock source as external and the gate type that enables the operation Refer to page 2 21 for more information on gate types Ensure that the signals are wired appropriately Figure 2 10 shows one example of connecting an event counting application to the STA 300 screw terminal panel using user counter 0 In this example rising clock edges are counted while the gate is active Figure 2 10 Connecting event counting signals shown for clock input 0 and external gate 0 Digital Ground Q TB25 TB26 User Clock Input 0 S G TB28 Signal Source Gateo Q TB29 SU O O O 7 STA 300 EE Panel External Gating Switch No Digital Ground An internal 22 kQ pull up resistor to 5V is used 2 24 Principles of O perati
157. skette that you are sure is unbootable into the A drive NOTE d e Turn on the computer and allow it to start the boot cycle The boot cycle stalls at a text screen listing system characteristics and resources and say ing at the bottom Non system disk or disk error Replace and press any key when ready This system characteristics and resources screen is normally displayed only fleetingly during the boot cycle Having an unbootable diskette in your computer automatically stops the boot cycle at this screen allow ing for convenient viewing This is not harmful to your computer The more common approach using the PAUSE key to pause the boot cycle at this screen requires fast reflexes with some systems Note the displayed list of PCI devices under a heading something like PCI device list ing If you have a printer print the screen by pressing the PRINT SCREEN key Remove the diskette and allow the boot cycle to finish 6 Install a good board a KPCI 3101 4 board that you know is fully functional as follows a b NOTE Shut down Windows 95 98 NT and turn off power to the host computer Install the good board in the slot from which you removed the potentially faulty board in step 1 Refer to Section 3 for board installation instructions If you removed more than one board in step 1 install only one good board in only one expansion slot Do not connect any external circuits to the board at this point
158. st Panels folder under which you should find the AIO Panel entry 3 Click on the AIO Panel entry 4 Ifa KPCI 3101 4 Series board is the only board in your computer installed under Driver LINX or if the DriverLINX Analog I O Panel lists the KPCI3101 4 board under Driver Selection then DriverLINX and your board are installed properly and are working together 5 If you cannot initially run the Analog I O Panel refer to Section 6 Troubleshooting After DriverLINX and your board are installed properly and working together continue with installation and wiring 3 8 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual Attaching the STA 300 screw terminal panel Before you can wire signals you first need to attach the STA 300 screw terminal panel to the KPCI 3101 4 Series board using the CAB 305 cable The STA 300 screw terminal panel and the CAB 305 cable are offered by Keithley as accessories to the KPCI 3101 4 Series boards Connector J1 on the STA 300 brings out all of the signals from connector J1 on the KPCI 3101 4 Series board Connector J2 on the STA 300 is provided for connecting a 5BO1 or 5B08 signal conditioning backplane Figure 3 2 illustrates how to attach the STA 300 screw terminal panel to a KPCI 3101 4 Series board Figure 3 2 Attaching the STA 300 screw terminal panel to a KPCI 3101 4 series board Connector J1 KE i STA 300 S KPCI 3101 4 CAB 305 J 300 Screw Termi
159. step in Problem isolation Scheme F the board that asked you to perform the Analog output hardware test e If the voltages measured with the DVM DMM agree with level control settings then the analog outputs are working satisfactorily Stop here and return to the problem isolation step in Problem isolation Scheme F the board that asked you to perform the Analog output hardware test C 20 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual NOTE If the analog outputs appear to work satisfactorily but some measured analog output voltages are outside the accuracy limits specified in Appendix A consider calibrating your board after concluding the sys tematic problem isolation procedure For calibration procedures refer to Section 5 Calibration General purpose digital UO hardware test This test checks whether the general purpose digital input and output circuits of the board are operating properly All I O is set and read using the DriverLINX Digital Input Output test panel and no instruments are required However you must wire an STA 300 screw terminal accessory in the loop back configuration If possible use a screw terminal accessory that is reserved for I O tests Avoid using a screw terminal accessory that is normally connected to your external circuits You thereby avoid the extra labor and potential wiring errors involved in disconnecting and later reconnecting your external circuits
160. terminal panel The smaller STP 68 screw terminal panel may be used instead of the STA 300 First attach the 68 pin connector to the KPCI 3101 4 Series board using the CAB 305 cable There is one to one correspondence between connector pins and terminals for example pin corresponds to terminal 1 pin 22 corresponds to terminal 22 etc See Table B 1 for pin terminal assignments 3 26 Installation and Configuration KPCI 3101 KPCI 3104 Series User s M anual 4 Testing the Board 4 2 Testing the Board KPCI 3101 KPCI 3104 Series U ser s Manual The test panels are small applications programs within DriverLINX that allow you to perform limited data acquisition functions You can use the panels to do tasks such as e Monitor one or two analog input channels on screen e Set the levels of one or two analog output channels e Monitor and set digital input and output bits Test panels are designed primarily for testing the functions of your board However one panel in particular the Analog I O panel can be useful for limited routine tasks This section describes how to use the DriverLINX Analog I O Panel and DriverLINX Test Panel utilities to verify the operation of your KPCI 3101 4 Series board DriverLIN X analog UO panel The DriverLINX Analog I O Panel is an application that demonstrates analog input output using DriverLINX With the Analog I O Panel you can e Analyze analog signals using the two channel
161. ternal gate input shown for clock input 0 3 22 Figure 3 16 Cascading counters shown for event counting using counters 0 and 1 and external gate OU 3 22 Figure 3 17 Connecting frequency measurement signals shown for clock input 0 and external gate Ui 3 23 Figure 3 18 Connecting pulse output signals shown for counter output 0 and gate OU 3 23 Figure 3 19 Cascading counters shown for rate generation using counters 0 and 1 and external gate OU 3 24 Figure 3 20 Cascading counters shown for one shot using counters 0 and 1 and external gate 1 3 24 Vi List of Tables 1 Overview Table 1 1 Differences among KPCI 3101 4 Series boards AA 1 2 Table 1 2 System TEGUITEMIENS scirecsi cirerer topo soere is cedtacsazadveavessvacusdstvenbesseegasehcuause dphansbdcuiaesesdaonsydessadcaasisenhessfensanse 1 5 2 Principles of O peration Table 2 1 Supported analog input resolutions 200 0 eee eee esses ceeeeeeceseeeeecaeecaecaaesaecsacsaecesceseceeeeeseeeesesenesaeecaesaaeeaees 2 3 Table 2 2 Gains and effective rang eS insenere nion dee EE REESEN EES 2 5 Table 2 3 Maximum frequency Supported 0 0 eee eceseeseseesececseeseesecsecsseecsaecaeeeceecsaeecsecsecsevseesesaecaseaesaecaeeaeeeenaeeases 2 6 Table 2 4 Maximum retrigger frequency i csic0 aiid ached hi Asiastock seen ei dea ea 2 8 Table 2 5 Supported analog output resolutions oo eee ceceseeeeceseeeeceseeeeeeseeesecaeecaecsaesaecsacaeceeeesesessesesenseaeeeas Table 2 6 Extended chan
162. th the published specifications Keithley will at its option provide either the programming services necessary to correct such nonconformity or develop a program change to bypass such nonconformity in the Keithley Software Failure to notify Keithley of a nonconformity during the warranty shall relieve Keithley of its obligations and liabilities under this warranty Other Software OEM software that is not produced by Keithley Other Software shall not be covered by this warranty and Keithley shall have no duty or obligation to enforce any OEM s warranties on behalf of the customer Other Items Keithley warrants the following items for 90 days from the date of shipment probes cables rechargeable batteries diskettes and documentation Items not C overed under Warranty This warranty does not apply to fuses non rechargeable batteries damage from battery leakage or problems arising from normal wear or failure to follow instructions Limitation of Warranty This warranty does not apply to defects resulting from product modification made by Purchaser without Keithley s express written consent or by misuse of any product or part Disclaimer of Warranties EXCEPT FOR THE EXPRESS WARRANTIES ABOVE KEITHLEY DISCLAIMS ALL OTHER WARRANTIES EXPRESS OR IMPLIED INCLUDING WITHOUT LIMITATION ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE KEITHLEY DISCLAIMS ALL WARRANTIES WITH RESPECT TO THE OTHER HARDWARE AND OTHER
163. that events have been counted 5 Determine the measurement period using the following equation 1 Measurement period Clock Frequency x Active Pulse Width Determine the frequency of the clock input signal using the following equation Number of Events Frequency Measurement __ _ Measurement Period 2 26 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual Figure 2 14 shows an example of performing a frequency measurement operation In this exam ple three events are counted during a duration of 300ms The frequency then is 10Hz since 10Hz 3 3 s Figure 2 14 Example of frequency measurement 3 Events Counted External C T Clock Input Signal lt q Duration over which the frequency is measured 300ms Frequency Measurement Frequency Measurement Starts Stops Rate generation Use rate generation mode to generate a continuous pulse output signal from the counter this mode is sometimes referred to as continuous pulse output or pulse train output You can use this pulse output signal as an external clock to pace other operations such as analog input or other counter timer operations While the pulse output operation is enabled determined by the gate input signal the counter outputs a pulse of the specified type and frequency continuously As soon as the operation is dis abled rate generation stops The period of the output pu
164. that produce high electro magnetic fields such as large electric motors power lines sole noids and electric arcs unless the signals are enclosed in a mumetal shield KPCI 3101 KPCI 3104 Series U ser s M anual Installation and Configuration 3 15 Connecting analog input signals The STA 300 screw terminal panel supports both voltage and current loop inputs You can connect analog input voltage signals to the STA 300 in the following configurations Single ended Choose this configuration when you want to measure high level signals when noise is not significant when the source of the input is close to the STA 300 screw ter minal panel and when all the input signals are referred to the same common ground When you choose the single ended configuration all 16 analog input channels are available Pseudo Differential Choose this configuration when noise or common mode voltage the difference between the ground potentials of the signal source and the ground of the STA 300 screw terminal panel or between the grounds of other signals exists and the differ ential configuration is not suitable for your application This option provides less noise rejec tion than the differential configuration however all 16 analog input channels are available Differential Choose this configuration when you want to measure low level signals less than 1V when you are using an A D converter with high resolution gt 12 bits when noise is
165. the board is secured in the slot with a screw The power supply of the computer is too small to handle all the system resources Check the power requirements of your system resources and if needed get a larger power supply consult the board s specifications in the Appendix of this manual System lockup Board is not seated properly Check that the slot in which your KPCI 3101 4 Series board is located is a PCI slot that the board is correctly seated in the slot and that the board is secured in the slot with a screw Refer to the following paragraphs to further isolate the problem KPCI 3101 KPCI 3104 Series U ser s M anual Troubleshooting 6 5 Testing the board and host computer To isolate the problem to the KPCI 3101 4 board or to the host computer use the following steps CAUTION Removing a board with the power ON can cause damage to your board and or computer 1 Turn the power to the host computer OFF and remove power connections to the computer While keeping connections to accessories intact unplug the cable to the main I O connector of the KPCI 3101 4 board Remove the board from the computer and visually check for damage If a board is obviously damaged refer to Technical support for information on returning the board With the KPCI 3101 4 board out of the computer check the computer for proper operation Power up the computer and perform any necessary diagnostic
166. the gain for one or more channels For KPCI 3101 4 Series boards you can specify the gain for one or more analog input channels using an analog input gain list Using software set up the gain list by specifying the gain for each entry in the channel list The gain list parallels the channel list The two lists together are often referred to as the channel gain list For example assume the analog input channel list contains three entries channels 5 6 and 7 the gain list might look like this 2 4 1 where a gain of 2 corresponds to channel 5 a gain of 4 corresponds to channel 6 and a gain of 1 corresponds to channel 7 NOTE For analog input channel 0 programmed with digital capabilities the 16 digital I O lines Refer to the DriverLINX Analog I O Programming Guide provided with DriverLINX 2 6 Principles of O peration KPCI 3101 KPCI 3104 Series U ser s M anual A D sample clock sources The KPCI 3101 4 Series board provides two clock sources for pacing analog input operations in continuous mode e An internal A D sample clock that uses the 24 bit A D Counter on the board and e An external A D sample clock that you can connect to the screw terminal panel You use an A D sample clock to pace the acquisition of each channel in the channel gain list this clock is also called the A D pacer clock NOTE If you specify Digital Capabilities for channel 0 the A D sample clock internal or external also paces the acquisition
167. the slot for a PCI board if a PCI board exists in the shared slot you cannot use the slot for an ISA board 2 Remove the cover plate from the selected expansion slot Retain the screw that held it in place you will use it later to install the board 3 6 Installation and Configuration KPCI 3101 KPCI 3104 Series U ser s M anual Inserting the KPCI 3101 4 series board in the computer 1 To discharge any static electricity hold the wrapped board in one hand while placing your other hand firmly on a metal portion of the computer chassis 2 Carefully remove the antistatic packing material from the board It is recommended that you save the original packing material in the unlikely event that your board requires servicing in the future 3 Hold the board by its edges and do not touch any of the components on the board 4 Position the board so that the cable connectors are facing the rear of the computer as shown in Figure 3 1 Figure 3 1 Inserting the KPCI 3101 4 series board in the computer KPCI 3101 4 Rear of Computer Series Board ee Ld Lz PCI expansion slot bus connector 5 Carefully lower the board into the PCI expansion slot using the card guide to properly align the board in the slot When the bottom of the board contacts the bus connector gently press down on the board until it clicks into place CAUTION Donot force the board into place Moving the board from side to side during installation may da
168. the system now performs satisfactorily you have successfully isolated and corrected the problem e Ifthe system still does not perform satisfactorily then the cause of your problem may be outside the scope of these diagnostics Read the instructions in Section 6 Technical sup port and then contact Keithley for help in isolating the cause of your problem Specified hardware I O tests The tests in this section check whether the analog and digital I O of the board work properly The I O are tested using proven DriverLINX utilities thereby bypassing any unresolved applica tion software issues These tests are intended to be used when specified in the preceding Speci fied software I O tests procedure However they may also be used at any time for general functional checks of your KPCI 3101 4 board NOTE During these tests disconnect all user circuits from board except for connections specified in individual test procedures Analog input hardware test The analog input test checks whether the analog inputs particularly the instrumentation ampli fier and A D converter are working correctly In this test a voltage applied to KPCI 3101 4 channel 01 is measured using the on screen digital voltmeter utility that is supplied with Driver LINX In the same way channel 00 is grounded and checked for offset voltage One voltage measurement and one grounded input measurement are sufficient because of the following e All analog cha
169. ting and later reconnecting your external circuits Procedure for general purpose digital UO software test NOTE The bit patterns described in this procedure are shown graphically as follows e OFF bits appear as white squares e ON bits appear as green squares when the manual is viewed in color or as light gray squares when the manual is viewed in black and white C 26 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual Perform the I O hardware test as follows 1 Turn off the host computer H eh Ee Ze R 10 11 12 13 14 If a screw terminal accessory is attached to the J1 connector of the KPCI 3101 4 I O board remove it No circuits should be connected to Analog I O connections during these tests Attach the wired screw terminal accessory Turn on the host computer and boot Windows 95 98 or NT Start DriverLINX and your application software Set up your application software to configure and monitor general purpose digital I O bits Using your application software do the following a Configure general purpose bits 0 to 7 channel 1 as outputs b Configure general purpose bits 8 to 15 channel 2 as inputs Using your application software configure bits 0 to 7 channel 1 for an alternating OFF ON bit pattern Using your application software observe the channel 2 input bits e Ifthe observed channel 2 output bit pattern is not the same as the input pattern your applicat
170. ting with the first location of the first buffer This process continues indefinitely until you stop it If you set Buffers 1 in DriverLINX usually not recommended for analog input opera tions data is written to a single buffer continuously when the buffer is filled the board overwrites the data in the buffer starting with the first location of the buffer This process continues indefinitely until you stop it Error conditions The KPCI 3101 4 Series board can report the following analog input error conditions to the host computer A D Over Sample Indicates that the A D sample clock rate is too fast This error is reported if a new A D sample clock pulse occurs while the ADC is busy performing a con version from the previous A D sample clock pulse The host computer can clear this error To avoid this error use a slower sampling rate Input FIFO Overflow Indicates that the analog input data is not being transferred fast enough from the Input FIFO across the PCI bus to the host computer This error is reported when the Input FIFO becomes full the board cannot get access to the PCI bus fast enough The host computer can clear this error but the error will continue to be generated if the Input FIFO is still full To avoid this error close other applications that may be running while you are acquiring data If this has no effect try using a computer with a faster processor or reduce the sampling rate Host Block Overflow
171. tion 3 5 external clock A 11 A D sample 2 7 SE external clock divider maximum minimu external digital trigge externally retriggered scan mode _2 9 extra retrigger A 9 falling edge gate type_2 21 features 1 2 Flowchart problem isolation Scheme problem isolation Scheme B C 5 problem isolation Scheme C C 10 problem isolation Scheme problem isolation Scheme problem isolation Scheme problem isolation Scheme formatting data analog input 2 14 analog output 2 17 frequency base doch A 11 Leen C 13 external A D sample clock 2 7 external C T clock 2 20 internal A D sample doc 2 6JA 11 internal C T clock 2 20 internal retrigger clock 2 8 frequency measurement 2 24 gain analog input _2 4 analog inputs RE analog output 2 16 analog outputs calibrating number off A 10 gain list analog input gap free ooo gate input signa gate typd 2 21 falling edg GCL dept generating continuous pulses 2 26 Grounding KPCI 3101 4 Series I O connector pin assignments 3 7 hard disk required free space 1 5 high edge gate type _2 21 A 11 high level gate type_2 21 A 11 high to low pulse output 2 22 inprocess buffers A 9 input configuration differential analog 3 15 single ended ow ene Input FIFO Overflow erroy 2 15 input ranges 2 4 inputs analog calibration 5 3 inserting the board 3 6 Installation
172. tive channel numbers starting from zero For example with three 8 bit ports the following channel addresses are supported for each size code Table 2 6 Extended channel addressing of digital UO channels using DriverLINX Unit Channels Address dec Address hex native 0 2 0 2 0 2 bit 0 23 4096 4199 1000 1017 half nibble 0 11 8192 8203 2000 200B nibble 0 5 12288 12293 3000 3005 byte 0 2 16384 16386 4000 4002 word 0 1 20480 20481 5000 5001 Refer to DriverLINX Digital I O Programming Guide for information and limitations of this extended channel addressing function U sing single value and continuous digital input DriverLINX uses the Digital I O Subsystem for single value outputs For continuous digital input DriverLINX uses the Analog I O subsystem see Specifying digital input lines in the ana log input channel list starting on page 2 4 e Single value operations stop automatically when finished you cannot stop a single value operation e Continuous digital input takes full advantage of the capabilities of the KPCI 3 101 4 Series board Program the digital input lines of Ports A and B as Analog Input Channel 0 enter the inputs through the DriverLINX A D subsystem You will assign a special gain code to this channel to distinguish it as digital You can specify parameters such as clock source scan mode and trigger source for the digital input operation Refer to page 2
173. tops All subsequent clock input signals and gate input signals are ignored KPCI 3101 KPCI 3104 Series User s M anual Principles of O peration 2 29 The period of the output pulse is determined by the clock input signal In one shot mode the internal C T clock source is more useful than an external C T clock source refer to page 2 20 for more information on the internal C T clock source Using DriverLINX software specify the counter timer mode as one shot the clock source as internal the polarity of the output pulse high to low transition or low to high transition the duty cycle of the output pulse and the gate type to trigger the operation Refer to page 2 22 for more information on pulse output types Refer to page 2 21 for more information on gate types NOTE In the case of a one shot operation use a duty cycle as close to 100 as possible to output a pulse immediately Using a duty cycle closer to 0 acts as a pulse output delay Ensure that the signals are wired appropriately Figure 2 18 shows one example of connecting a pulse output operation to the STA 300 screw terminal panel using user counter 0 Figure 2 18 Connecting one shot signals shown for counter output 0 and gate 0 Digital Ground Q TB25 0 Q TB27 TB28 Heater D TB2 Controller D 9 User Counter Output 0 0 O Tt D STA 300 Panel Gate 0 Gating Switch r L L
174. type and device number are displayed 4 Select the Logical Device you want to operate by dragging the pointer in the Device Selec tion section The Analog I O Panel displays the Scope Meter SST Level control tabs and Digital I O depending on the capabilities of your KPCI 3101 4 board 5 The Scope uses two analog input channels referred to as ChA and ChB Drag the channel selectors in the AI Channel Mapping section to map them to different channel numbers KPCI 3101 KPCI 3104 Series U ser s M anual Testing the Board 4 3 6 The SST Signal Generator uses two analog output channels referred to as ChA and ChB Drag the channel selectors in the AO Channel Mapping section to map them to different channel numbers 7 The Analog I O Level Control determines the DC output voltages of two analog output chan nels 8 The Digital I O Control allows you to set and read all digital input and output bits on your board You can now select the Scope Meter SST Level Control and Digital I O tabs to operate your KPCI 3101 4 Series board 4 4 Testing the Board KPCI 3101 KPCI 3104 Series U ser s M anual Calibration 5 2 Calibration Introduction KPCI 3101 KPCI 3104 Series User s Manual The KPCI 3101 4 Series boards are calibrated at the factory and should not require calibration for initial use It is recommended that you check and if necessary readjust the calibration of the analog I O circuitry on the KPCI 3101
175. uipment for repair include the following information e Your name address and telephone number e The invoice or order number and date of equipment purchase e A description of the problem or its symptoms e The RMA number on the outside of the package Repackage the equipment using the original anti static wrapping if possible and handle it with ground protection Ship the equipment to NOTE ATTN RMA Repair Department Keithley Instruments Inc 28775 Aurora Road Cleveland Ohio 44139 Telephone 1 888 KEITHLEY FAX 440 248 6168 If you are submitting your equipment for repair under warranty you must include the invoice number and date of purchase To enable Keithley to respond as quickly as possible you must include the RMA number on the outside of the package 6 8 Troubleshooting KPCI 3101 KPCI 3104 Series U ser s M anual A Specifications A 2 Specifications KPCI 3101 KPCI Table A 1 lists the specifications for the A D subsystem Table A 1 A D subsystem specifications 3104 Series U ser s M anual Feature Number of analog inputs Single ended K PCI 3101 302 Specifications K PCI 3103 304 Specifications 200pA rms current pseudo differential 16 Differential 8 Number of gains 4 1 2 4 8 Resolution 12 bits 12 bits Data encoding Offset binary System accuracy full scale Gain 1 0 03 0 03 Gain 2 0 04
176. uirements 1 5 System basic systematic problem isolation for C 3 Systematic problem isolation for application software C 10 for basic syste for expansion slot C 12 for installation C 5 for the board for user wiring C 13 Scheme Scheme B _C 5 Scheme C _C 10 Scheme Scheme Scheme Scheme specified hardware I O tests C 14 specified software I O test verification of problem solutio technical support 6 6 Test panels Analog I O Panel AIO Panel digital voltmeter utility using in Analog input hardware test C 15 level control utility using in Analog output hardware test C 18 using in installation check problem isolation C 5 test panels Analog I O Panel AIO Panel starting 4 2 using in installation check problem isolation 3 7 calibration utility using 5 3 Test Point function libraries for programming inf 1 3 Testing the Board 4 1 TestPoint installation 3 4 TestPoint software description 3 3 Tests analog input hardware tor analog input software test C 20 analog output hardware test _C 17 analog output software test C 22 general purpose digital I O hardware test _C 20 general purpose digital I O software test C 25 throughput maximum A 11 minimum A 11 transferring data analog input 2 14 trigger acquisition modes about trigger 2 13 post trigger 2 10 pre trigge triggered sca extra retrigge internal retrigge
177. ur KPCI 3101 4 Series board through DriverLINX The needed driver is provided on your DriverLINX CD ROM Installing D riverLINX Refer to the instructions on the Read this first sheet and the manuals on the DriverLINX CD ROM both shipped with your board for information on installing and using DriverLINX Installing application software and drivers Installing the TestPoint software and driver The DriverLINX driver for TestPoint is provided as part of the TestPoint software The driver therefore installs automatically when you install TestPoint You can install TestPoint application software made by Capital Equipment Corporation CEC at any time before or after installing DriverLINX and the KPCI 3101 4 Series board For TestPoint installation instructions consult the manual provided by CEC NOTE Before using TestPoint with the KPCI 3 101 4 version of DriverLINX check with CEC to ensure that your version of TestPoint is compatible with DriverLINX Installing the LabVIEW software and driver A DriverLINX driver for LabVIEW is provided on your DriverLINX CD ROM The LabVIEW driver does not install automatically when you install DriverLINX and your board You must first install the LabVIEW application program then install the DriverLINX driver Access the Lab VIEW driver installation routine by starting setup exe on the DriverLINX CD ROM then select ing LabVIEW Support from the Install These DriverLINX components screen C
178. urce trigger source or buffer Single value operations stop automatically when finished you cannot stop a single value operation Data format Data from the host computer must use offset binary data encoding for analog output signals DriverLINX converts this native format to a hardware independent format so that applications can use the numeric operations that are intrinsic to most high level languages A DriverLINX Service Request may be used for several types of data conversions such as VOLTS2CODE con version that converts analog voltage to D A code Because the data values depend on the selected gain at the time of the data transfer you should use DriverLINX to convert the data as it takes the gain properties of the Service Request into account NOTE Refer to the DriverLINX Analog I O Programming Guide provided with DriverLINX Digital UO features This section describes the following features of the digital I O subsystem e Digital I O lines e Combining or Splitting Logical Channels e Using Single Value and Continuous Digital Input Digital UO lines KPCI 3101 4 Series boards support 23 digital I O lines through the digital input DIN and out put DOUT subsystems DIN and DOUT subsystems use the same digital I O lines These lines are divided into the following ports e Port A lines 0 to 7 e Port B lines 0 to 7 e Port C lines 0 to 6 You can use each port for either input or output all lines within a port h
179. uts 3 17 digital inputs and outputs_3 20 event counting applications _3 21 22 externally cascading counter timer frequency measurement applications 3 23 pseudo differential analog input pulse output applications 3 23 single ended analog inputs 3 15 1 5 zero start sequential channel gain list A 10 This page intentionally left blank KEITHLEY Keithley Instruments Inc 28775 Aurora Road Cleveland Ohio 44139 Printed in the U S A
180. utside the scope of these diagnostics Read the instructions in Section 6 Technical support and then contact Keithley for help in isolating the cause of your problem If you have not yet tried to fix the combined DriverLINX board problem then continue with step 4 4 See if and how your KPCI 3101 4 board is listed in the Windows Device Manager Proceed as follows a Right click the My Computer icon on your desktop b On the menu that appears click Properties c On the System Properties dialog box that appears click the Device Manager tab The Device Manager appears d In the Device Manager look for a DriverLINX drivers item e If you find a DriverLINX drivers item click the sign to the left of this item A second level list may appear with the specific model number of your KPCI 3101 4 board More than one KPCI 3101 4 board may be listed here if you installed more than one KPCI 3101 4 board f Select your next action based on the criteria given in the following alternatives e Ifa board is recognized as a device under DriverLINX but is not configured to work with DriverLINX then the board is normally listed with a large exclamation point over it If you find a KPCI 3101 4 board listed with an exclamation point over it keep the Device Manager open and go directly to step 5 Skip substeps 4g through 4j e If aboard is recognized as a device under DriverLINX and is configured to work with DriverLINX then the board is
181. wchart blocks are keyed to the numbers of written steps For simplicity your problem is assumed to have only one cause One particular scheme may not alone isolate this cause Rather performance of several schemes in series may be required to analyze your problem One scheme may eliminate potential causes from further consideration then direct you to another scheme s that ultimately isolates the problem You need perform only those schemes to which you are directed If the cause of your problem appears to be outside the scope of the systematic isolation proce dure the procedure directs you to call Keithley for help The seven problem isolation schemes are as follows e Scheme A checks for three basic system problems e Scheme B checks DriverLINX installation and board recognition by DriverLINX e Scheme C addresses application software issues e Scheme D addresses apparent expansion slot malfunctions and attempted remedies e Scheme E addresses potential external connection problems e Scheme F addresses apparently malfunctioning board s e Scheme G verifies that earlier schemes have found and addressed the problem Start the systematic isolation procedure at the next section entitled Problem isolation Scheme A basic system unless you have been directed otherwise in this manual The board Driver LINX installation check in Section 3 of this manual sends you directly to Scheme B CAUTION Always turn off your computer and a
182. ws 95 98 or NT In the Start menu click Programs Find the DriverLINX Test Panels folder under which you should find the AIO Panel entry C 16 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual 7 Click on the AIO Panel entry The Analog I O Panel setup screen appears NOTE If more than one type of board is installed in your computer under Driv erLINX the Analog I O Panel your board type and device number may not be displayed initially and fewer tabs may be displayed at the top of the display If so click the scroll buttons next to the Driver Selection and Device Selection text boxes until your KPCI 3101 4 board type and device number are displayed All six tabs will then be displayed 8 Click the Meter tab An on screen digital voltmeter appears displaying the voltage con nected to Channel 00 Because Channel 00 is grounded the displayed voltage should be nominally zero 9 Using your mouse move the Channel Selection pointer of the on screen digital panel meter to 1 NOTE To move the Channel Selection pointer you must contact the wide part of the pointer with the tip of the cursor The on screen digital voltmeter now displays the voltage connected to channel 01 10 Based on the displayed voltages in steps 8 and 9 act as follows e If the channel 00 voltage displayed in step 8 is not OV and or if the channel 01 voltage displayed in step 9 does not nominally agree with the applied voltage
183. xternal circuits You thereby avoid the extra labor and potential wiring errors involved in disconnecting and later reconnecting your external circuits Table C 6 Terminals on STA 300 screw terminal accessory to which DVM DMM will be connected during analog output hardware test To check this analog output Analog output screw terminal Analog ground screw terminal nn the DVM or DMM will be connected to these terminals Analog output 1 pin 24 TB19 TB23 TB18 pin 25 TB18 pin 25 Analog output 0 pin 58 CAUTION The following test procedure involves changing DVM DMM connec tions while the computer and K PC1 3101 4 board are powered Be careful not to short analog outputs to the adjacent 10V reference terminal or nearby ground terminals Shorting the analog outputs can damage the D igital to A nalog C onverters DACs As a precau tion do the following e Before powering the computer connect the DVM D MM negative lead to a ground screw terminal e After powering the computer connect the DVM DMM positive lead to each specified analog output screw terminal by touching the tip of the lead to the screw head of the screw terminal for example via a probe C 24 Systematic Problem Isolation KPCI 3101 KPCI 3104 Series User s M anual Procedure for the analog output software test Turn off the host computer N Re Connect the negative lead of the DVM DMM to a ground terminal of

KPCI-3101, -3102, -3103, -3104 Series PCI Bus Data Acquisition

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